Mercurial > hg > truffle
view graal/com.oracle.graal.lir.amd64/src/com/oracle/graal/lir/amd64/AMD64ClearRegisterOp.java @ 21708:6df25b1418be
moved com.oracle.asm.** to jvmci-util.jar (JBS:GRAAL-53)
author | Doug Simon <doug.simon@oracle.com> |
---|---|
date | Wed, 03 Jun 2015 18:06:44 +0200 |
parents | 48c1ebd24120 |
children | d915361cc3a1 |
line wrap: on
line source
/* * Copyright (c) 2015, 2015, Oracle and/or its affiliates. All rights reserved. * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. * * This code is free software; you can redistribute it and/or modify it * under the terms of the GNU General Public License version 2 only, as * published by the Free Software Foundation. * * This code is distributed in the hope that it will be useful, but WITHOUT * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License * version 2 for more details (a copy is included in the LICENSE file that * accompanied this code). * * You should have received a copy of the GNU General Public License version * 2 along with this work; if not, write to the Free Software Foundation, * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA. * * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA * or visit www.oracle.com if you need additional information or have any * questions. */ package com.oracle.graal.lir.amd64; import com.oracle.jvmci.asm.amd64.*; import com.oracle.jvmci.asm.amd64.AMD64Assembler.*; import com.oracle.jvmci.meta.AllocatableValue; import static com.oracle.jvmci.asm.amd64.AMD64Assembler.AMD64BinaryArithmetic.*; import static com.oracle.jvmci.code.ValueUtil.*; import static com.oracle.graal.lir.LIRInstruction.OperandFlag.*; import com.oracle.graal.lir.*; import com.oracle.graal.lir.asm.*; public class AMD64ClearRegisterOp extends AMD64LIRInstruction { public static final LIRInstructionClass<AMD64ClearRegisterOp> TYPE = LIRInstructionClass.create(AMD64ClearRegisterOp.class); @Opcode private final AMD64RMOp op; private final OperandSize size; @Def({REG}) protected AllocatableValue result; public AMD64ClearRegisterOp(OperandSize size, AllocatableValue result) { super(TYPE); this.op = XOR.getRMOpcode(size); this.size = size; this.result = result; } @Override public void emitCode(CompilationResultBuilder crb, AMD64MacroAssembler masm) { op.emit(masm, size, asRegister(result), asRegister(result)); } }