Mercurial > hg > truffle
view src/cpu/x86/vm/assembler_x86.inline.hpp @ 11860:762dc2f23d1c
InvokeWithException: make next successor a special begin node which has the same locationidentity as the invoke
InvokeWithExceptionNode has the unpleasant property that it is a ControlSplit
and MemoryCheckPoint at the same time. In terms of scheduling, a node cannot
be placed after a ControlSplit node as it denotes the end of a block. Thus,
instead of connecting a FloatingReadNode to the InvokeWithException node
directly (as lastLocationAccess), we point rather to the BeginNode
(non-exceptional case) or ExceptionBeginNode.
To preserve consistency regarding memory dependencies, the former node must be
also a MemoryCheckPoint.
author | Bernhard Urban <bernhard.urban@jku.at> |
---|---|
date | Wed, 02 Oct 2013 11:16:21 +0200 |
parents | cd3d6a6b95d9 |
children | 90fb04cda7d6 |
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/* * Copyright (c) 1997, 2010, Oracle and/or its affiliates. All rights reserved. * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. * * This code is free software; you can redistribute it and/or modify it * under the terms of the GNU General Public License version 2 only, as * published by the Free Software Foundation. * * This code is distributed in the hope that it will be useful, but WITHOUT * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License * version 2 for more details (a copy is included in the LICENSE file that * accompanied this code). * * You should have received a copy of the GNU General Public License version * 2 along with this work; if not, write to the Free Software Foundation, * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA. * * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA * or visit www.oracle.com if you need additional information or have any * questions. * */ #ifndef CPU_X86_VM_ASSEMBLER_X86_INLINE_HPP #define CPU_X86_VM_ASSEMBLER_X86_INLINE_HPP #include "asm/assembler.inline.hpp" #include "asm/codeBuffer.hpp" #include "code/codeCache.hpp" #ifndef _LP64 inline int Assembler::prefix_and_encode(int reg_enc, bool byteinst) { return reg_enc; } inline int Assembler::prefixq_and_encode(int reg_enc) { return reg_enc; } inline int Assembler::prefix_and_encode(int dst_enc, int src_enc, bool byteinst) { return dst_enc << 3 | src_enc; } inline int Assembler::prefixq_and_encode(int dst_enc, int src_enc) { return dst_enc << 3 | src_enc; } inline void Assembler::prefix(Register reg) {} inline void Assembler::prefix(Address adr) {} inline void Assembler::prefixq(Address adr) {} inline void Assembler::prefix(Address adr, Register reg, bool byteinst) {} inline void Assembler::prefixq(Address adr, Register reg) {} inline void Assembler::prefix(Address adr, XMMRegister reg) {} inline void Assembler::prefixq(Address adr, XMMRegister reg) {} #endif // _LP64 #endif // CPU_X86_VM_ASSEMBLER_X86_INLINE_HPP