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view src/os_cpu/linux_x86/vm/bytes_linux_x86.inline.hpp @ 10185:d50cc62e94ff
8012715: G1: GraphKit accesses PtrQueue::_index as int but is size_t
Summary: In graphKit INT operations were generated to access PtrQueue::_index which has type size_t. This is 64 bit on 64-bit machines. No problems occur on little endian machines as long as the index fits into 32 bit, but on big endian machines the upper part is read, which is zero. This leads to unnecessary branches to the slow path in the runtime.
Reviewed-by: twisti, johnc
Contributed-by: Martin Doerr <martin.doerr@sap.com>
author | johnc |
---|---|
date | Wed, 24 Apr 2013 14:48:43 -0700 |
parents | f95d63e2154a |
children |
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/* * Copyright (c) 1999, 2010, Oracle and/or its affiliates. All rights reserved. * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. * * This code is free software; you can redistribute it and/or modify it * under the terms of the GNU General Public License version 2 only, as * published by the Free Software Foundation. * * This code is distributed in the hope that it will be useful, but WITHOUT * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License * version 2 for more details (a copy is included in the LICENSE file that * accompanied this code). * * You should have received a copy of the GNU General Public License version * 2 along with this work; if not, write to the Free Software Foundation, * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA. * * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA * or visit www.oracle.com if you need additional information or have any * questions. * */ #ifndef OS_CPU_LINUX_X86_VM_BYTES_LINUX_X86_INLINE_HPP #define OS_CPU_LINUX_X86_VM_BYTES_LINUX_X86_INLINE_HPP #include <byteswap.h> // Efficient swapping of data bytes from Java byte // ordering to native byte ordering and vice versa. inline u2 Bytes::swap_u2(u2 x) { #ifdef AMD64 return bswap_16(x); #else u2 ret; __asm__ __volatile__ ( "movw %0, %%ax;" "xchg %%al, %%ah;" "movw %%ax, %0" :"=r" (ret) // output : register 0 => ret :"0" (x) // input : x => register 0 :"ax", "0" // clobbered registers ); return ret; #endif // AMD64 } inline u4 Bytes::swap_u4(u4 x) { #ifdef AMD64 return bswap_32(x); #else u4 ret; __asm__ __volatile__ ( "bswap %0" :"=r" (ret) // output : register 0 => ret :"0" (x) // input : x => register 0 :"0" // clobbered register ); return ret; #endif // AMD64 } #ifdef AMD64 inline u8 Bytes::swap_u8(u8 x) { #ifdef SPARC_WORKS // workaround for SunStudio12 CR6615391 __asm__ __volatile__ ( "bswapq %0" :"=r" (x) // output : register 0 => x :"0" (x) // input : x => register 0 :"0" // clobbered register ); return x; #else return bswap_64(x); #endif } #else // Helper function for swap_u8 inline u8 Bytes::swap_u8_base(u4 x, u4 y) { return (((u8)swap_u4(x))<<32) | swap_u4(y); } inline u8 Bytes::swap_u8(u8 x) { return swap_u8_base(*(u4*)&x, *(((u4*)&x)+1)); } #endif // !AMD64 #endif // OS_CPU_LINUX_X86_VM_BYTES_LINUX_X86_INLINE_HPP