# HG changeset patch
# User bdelsart
# Date 1315989613 -7200
# Node ID 10ee2b297ccddde4fd6a8b99d080f4dff1988685
# Parent  2209834ccb591a2e1c587a37fe0ddc18cbe8f10f
7057978: improve robustness of c1 ARM back-end wrt non encodable constants
Summary: ARM only, avoid assertion failures for huge constants generated by C1 shared code
Reviewed-by: never, vladidan

diff -r 2209834ccb59 -r 10ee2b297ccd src/share/vm/c1/c1_LIR.cpp
--- a/src/share/vm/c1/c1_LIR.cpp	Tue Sep 13 11:46:51 2011 -0700
+++ b/src/share/vm/c1/c1_LIR.cpp	Wed Sep 14 10:40:13 2011 +0200
@@ -142,7 +142,8 @@
 #endif
 #ifdef ARM
   assert(disp() == 0 || index()->is_illegal(), "can't have both");
-  assert(-4096 < disp() && disp() < 4096, "architecture constraint");
+  // Note: offsets higher than 4096 must not be rejected here. They can
+  // be handled by the back-end or will be rejected if not.
 #endif
 #ifdef _LP64
   assert(base()->is_cpu_register(), "wrong base operand");