# HG changeset patch
# User dsamersoff
# Date 1304442091 14400
# Node ID f78b3a5497f223261129796f0a16aaf4caf0fa99
# Parent  da880ba4edf9ec639572081ce6fff1d77a9667d4# Parent  250642c729b42043ea99e5e4e27d153b0c766da0
Merge

diff -r 250642c729b4 -r f78b3a5497f2 src/os_cpu/linux_x86/vm/orderAccess_linux_x86.inline.hpp
--- a/src/os_cpu/linux_x86/vm/orderAccess_linux_x86.inline.hpp	Tue May 03 18:24:55 2011 +0400
+++ b/src/os_cpu/linux_x86/vm/orderAccess_linux_x86.inline.hpp	Tue May 03 13:01:31 2011 -0400
@@ -93,7 +93,7 @@
 
 inline void     OrderAccess::store_fence(jbyte*  p, jbyte  v) {
   __asm__ volatile (  "xchgb (%2),%0"
-                    : "=r" (v)
+                    : "=q" (v)
                     : "0" (v), "r" (p)
                     : "memory");
 }
@@ -155,7 +155,7 @@
 // Must duplicate definitions instead of calling store_fence because we don't want to cast away volatile.
 inline void     OrderAccess::release_store_fence(volatile jbyte*  p, jbyte  v) {
   __asm__ volatile (  "xchgb (%2),%0"
-                    : "=r" (v)
+                    : "=q" (v)
                     : "0" (v), "r" (p)
                     : "memory");
 }