# HG changeset patch
# User iveresov
# Date 1272392352 25200
# Node ID 314e17ca2c231d9902a3bc3658227e5ef57dc1a3
# Parent  b4776199210f7e5d1eb696bd370600393d07439d
6946892: c1 shouldn't sign-extend to upper 32bits on x64
Summary: c1 does sign-extension when it loads ints and shorts from memory to 64-bit registers. This causes problems for c2 because it relies on the fact the int passed in a 64-bit register is zero-extended.
Reviewed-by: never

diff -r b4776199210f -r 314e17ca2c23 src/cpu/x86/vm/c1_LIRAssembler_x86.cpp
--- a/src/cpu/x86/vm/c1_LIRAssembler_x86.cpp	Mon Apr 26 23:59:45 2010 -0700
+++ b/src/cpu/x86/vm/c1_LIRAssembler_x86.cpp	Tue Apr 27 11:19:12 2010 -0700
@@ -1244,8 +1244,7 @@
       break;
 #endif // _L64
     case T_INT:
-      // %%% could this be a movl? this is safer but longer instruction
-      __ movl2ptr(dest->as_register(), from_addr);
+      __ movl(dest->as_register(), from_addr);
       break;
 
     case T_LONG: {
@@ -1303,7 +1302,6 @@
         __ shll(dest_reg, 24);
         __ sarl(dest_reg, 24);
       }
-      // These are unsigned so the zero extension on 64bit is just what we need
       break;
     }
 
@@ -1315,8 +1313,6 @@
       } else {
         __ movw(dest_reg, from_addr);
       }
-      // This is unsigned so the zero extension on 64bit is just what we need
-      // __ movl2ptr(dest_reg, dest_reg);
       break;
     }
 
@@ -1329,8 +1325,6 @@
         __ shll(dest_reg, 16);
         __ sarl(dest_reg, 16);
       }
-      // Might not be needed in 64bit but certainly doesn't hurt (except for code size)
-      __ movl2ptr(dest_reg, dest_reg);
       break;
     }