# HG changeset patch
# User Roland Schatz <roland.schatz@oracle.com>
# Date 1421082121 -3600
# Node ID 437894ecd7c5d59bbaa6f7055a65e049a3e7720a
# Parent  f2f2897880c83ed1dba0aa04f83b32dedf84e680
Fix type error in code generation.

diff -r f2f2897880c8 -r 437894ecd7c5 graal/com.oracle.graal.lir.amd64/src/com/oracle/graal/lir/amd64/AMD64Arithmetic.java
--- a/graal/com.oracle.graal.lir.amd64/src/com/oracle/graal/lir/amd64/AMD64Arithmetic.java	Mon Jan 12 15:56:59 2015 +0100
+++ b/graal/com.oracle.graal.lir.amd64/src/com/oracle/graal/lir/amd64/AMD64Arithmetic.java	Mon Jan 12 18:02:01 2015 +0100
@@ -334,10 +334,10 @@
             if (isRegister(x)) {
                 switch (opcode) {
                     case IMUL:
-                        masm.imull(asIntReg(result), asIntReg(x), y.asInt());
+                        masm.imull(asIntReg(result), asIntReg(x), crb.asIntConst(y));
                         break;
                     case LMUL:
-                        masm.imulq(asLongReg(result), asLongReg(x), y.asInt());
+                        masm.imulq(asLongReg(result), asLongReg(x), crb.asIntConst(y));
                         break;
                     default:
                         throw GraalInternalError.shouldNotReachHere();
@@ -346,10 +346,10 @@
                 assert isStackSlot(x);
                 switch (opcode) {
                     case IMUL:
-                        masm.imull(asIntReg(result), (AMD64Address) crb.asIntAddr(x), y.asInt());
+                        masm.imull(asIntReg(result), (AMD64Address) crb.asIntAddr(x), crb.asIntConst(y));
                         break;
                     case LMUL:
-                        masm.imulq(asLongReg(result), (AMD64Address) crb.asLongAddr(x), y.asInt());
+                        masm.imulq(asLongReg(result), (AMD64Address) crb.asLongAddr(x), crb.asIntConst(y));
                         break;
                     default:
                         throw GraalInternalError.shouldNotReachHere();