# HG changeset patch # User Thomas Wuerthinger # Date 1326222848 -3600 # Node ID 504bc518a58256038fe7d211e7dc89b37cecef0e # Parent f03c71a0aeb8eaccffe6dd0318a771157dd1c7fe# Parent 81dc77ed0695f0899c093f76bb9f95296c877fa9 Merge. diff -r f03c71a0aeb8 -r 504bc518a582 graal/com.oracle.max.cri/src/com/oracle/max/cri/ci/CiValueUtil.java --- a/graal/com.oracle.max.cri/src/com/oracle/max/cri/ci/CiValueUtil.java Tue Jan 10 20:13:56 2012 +0100 +++ b/graal/com.oracle.max.cri/src/com/oracle/max/cri/ci/CiValueUtil.java Tue Jan 10 20:14:08 2012 +0100 @@ -98,4 +98,27 @@ assert value.kind == CiKind.Double; return asRegister(value); } + + + public static boolean sameRegister(CiValue...values) { + for (int i = 0; i < values.length; i++) { + for (int j = i + 1; j < values.length; j++) { + if (isRegister(values[i]) && isRegister(values[j]) && asRegister(values[i]) != asRegister(values[j])) { + return false; + } + } + } + return true; + } + + public static boolean differentRegisters(CiValue...values) { + for (int i = 0; i < values.length; i++) { + for (int j = i + 1; j < values.length; j++) { + if (isRegister(values[i]) && isRegister(values[j]) && asRegister(values[i]) == asRegister(values[j])) { + return false; + } + } + } + return true; + } } diff -r f03c71a0aeb8 -r 504bc518a582 graal/com.oracle.max.graal.compiler/src/com/oracle/max/graal/alloc/simple/AssignRegisters.java --- a/graal/com.oracle.max.graal.compiler/src/com/oracle/max/graal/alloc/simple/AssignRegisters.java Tue Jan 10 20:13:56 2012 +0100 +++ b/graal/com.oracle.max.graal.compiler/src/com/oracle/max/graal/alloc/simple/AssignRegisters.java Tue Jan 10 20:14:08 2012 +0100 @@ -1,5 +1,5 @@ /* - * Copyright (c) 2011, 2011, Oracle and/or its affiliates. All rights reserved. + * Copyright (c) 2011, 2012, Oracle and/or its affiliates. All rights reserved. * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. * * This code is free software; you can redistribute it and/or modify it @@ -48,10 +48,10 @@ ValueProcedure defProc = new ValueProcedure() { @Override public CiValue doValue(CiValue value) { return def(value); } }; ValueProcedure setReferenceProc = new ValueProcedure() { @Override public CiValue doValue(CiValue value) { return setReference(value); } }; - trace(1, "==== start assign registers ===="); + assert trace("==== start assign registers ===="); for (int i = lir.linearScanOrder().size() - 1; i >= 0; i--) { LIRBlock block = lir.linearScanOrder().get(i); - trace(1, "start block %s", block); + assert trace("start block %s", block); assert block.phis == null : "Register assignment must run after phi functions have been replaced by moves"; curRegisterRefMap = frameMap.initRegisterRefMap(); @@ -62,7 +62,7 @@ for (int j = block.lir().size() - 1; j >= 0; j--) { LIRInstruction op = block.lir().get(j); - trace(1, " op %d %s", op.id(), op); + assert trace(" op %d %s", op.id(), op); op.forEachOutput(defProc); op.forEachTemp(defProc); @@ -70,7 +70,7 @@ op.forEachAlive(useProc); if (op.info != null) { - trace(3, " registerRefMap: %s frameRefMap: %s", curRegisterRefMap, curFrameRefMap); + assert trace(" registerRefMap: %s frameRefMap: %s", curRegisterRefMap, curFrameRefMap); op.info.finish(new CiBitMap(curRegisterRefMap), new CiBitMap(curFrameRefMap), frameMap); if (op instanceof LIRXirInstruction) { @@ -85,13 +85,13 @@ // for the last time at this instruction are not part of the reference map. op.forEachInput(useProc); } - trace(1, "end block %s", block); + assert trace("end block %s", block); } - trace(1, "==== end assign registers ===="); + assert trace("==== end assign registers ===="); } private CiValue use(CiValue value) { - trace(3, " use %s", value); + assert trace(" use %s", value); if (isLocation(value)) { CiValue location = asLocation(value).location; frameMap.setReference(location, curRegisterRefMap, curFrameRefMap); @@ -103,7 +103,7 @@ } private CiValue def(CiValue value) { - trace(3, " def %s", value); + assert trace(" def %s", value); if (isLocation(value)) { CiValue location = asLocation(value).location; frameMap.clearReference(location, curRegisterRefMap, curFrameRefMap); @@ -115,16 +115,17 @@ } private CiValue setReference(CiValue value) { - trace(3, " setReference %s", value); + assert trace(" setReference %s", value); frameMap.setReference(asLocation(value).location, curRegisterRefMap, curFrameRefMap); return value; } protected abstract LocationMap locationsForBlockEnd(LIRBlock block); - private static void trace(int level, String format, Object...args) { - if (GraalOptions.TraceRegisterAllocationLevel >= level) { + private static boolean trace(String format, Object...args) { + if (GraalOptions.TraceRegisterAllocation) { TTY.println(format, args); } + return true; } } diff -r f03c71a0aeb8 -r 504bc518a582 graal/com.oracle.max.graal.compiler/src/com/oracle/max/graal/alloc/simple/DataFlowAnalysis.java --- a/graal/com.oracle.max.graal.compiler/src/com/oracle/max/graal/alloc/simple/DataFlowAnalysis.java Tue Jan 10 20:13:56 2012 +0100 +++ b/graal/com.oracle.max.graal.compiler/src/com/oracle/max/graal/alloc/simple/DataFlowAnalysis.java Tue Jan 10 20:14:08 2012 +0100 @@ -171,22 +171,22 @@ blockLiveIn = new BitSet[blocks().size()]; registerLive = new BitSet(); - trace(1, "==== start backward data flow analysis ===="); + assert trace("==== start backward data flow analysis ===="); for (int i = blocks().size() - 1; i >= 0; i--) { LIRBlock block = blocks().get(i); - trace(1, "start block %s loop %d depth %d", block, block.loopIndex(), block.loopDepth()); + assert trace("start block %s loop %d depth %d", block, block.loopIndex(), block.loopDepth()); variableLive = new BitSet(); for (LIRBlock sux : block.getLIRSuccessors()) { BitSet suxLive = liveIn(sux); if (suxLive != null) { - trace(1, " sux %s suxLive: %s", sux, suxLive); + assert trace(" sux %s suxLive: %s", sux, suxLive); variableLive.or(suxLive); } if (sux.phis != null) { curOpId = block.lastLirInstructionId(); - trace(1, " phis %d variableLive: %s", curOpId, variableLive); + assert trace(" phis %d variableLive: %s", curOpId, variableLive); sux.phis.forEachInput(block, phiInputProc); } } @@ -196,7 +196,7 @@ for (int j = block.lir().size() - 1; j >= 0; j--) { LIRInstruction op = block.lir().get(j); curOpId = op.id(); - trace(1, " op %d %s variableLive: %s registerLive: %s", curOpId, op, variableLive, registerLive); + assert trace(" op %d %s variableLive: %s registerLive: %s", curOpId, op, variableLive, registerLive); op.forEachOutput(outputProc); op.forEachTemp(tempProc); @@ -207,7 +207,7 @@ if (block.phis != null) { curOpId = block.firstLirInstructionId(); - trace(1, " phis %d variableLive: %s registerLive: %s", curOpId, variableLive, registerLive); + assert trace(" phis %d variableLive: %s registerLive: %s", curOpId, variableLive, registerLive); block.phis.forEachOutput(outputProc); } @@ -216,29 +216,29 @@ setLiveIn(block, variableLive); if (block.isLoopHeader()) { - trace(1, " loop header, propagating live set to loop blocks variableLive: %s", variableLive); + assert trace(" loop header, propagating live set to loop blocks variableLive: %s", variableLive); // All variables that are live at the beginning of a loop are also live the whole loop. // This is guaranteed by the SSA form. for (Block loop : block.loopBlocks) { BitSet loopLiveIn = liveIn(loop); assert loopLiveIn != null : "All loop blocks must have been processed before the loop header"; loopLiveIn.or(variableLive); - trace(3, " block %s loopLiveIn %s", loop, loopLiveIn); + assert trace(" block %s loopLiveIn %s", loop, loopLiveIn); } } - trace(1, "end block %s variableLive: %s", block, variableLive); + assert trace("end block %s variableLive: %s", block, variableLive); } - trace(1, "==== end backward data flow analysis ===="); + assert trace("==== end backward data flow analysis ===="); } private CiValue use(CiValue value, int killOpId) { - trace(3, " use %s", value); + assert trace(" use %s", value); if (isVariable(value)) { int variableIdx = asVariable(value).index; assert definitions[variableIdx] < curOpId; if (!variableLive.get(variableIdx)) { - trace(3, " set live variable %d", variableIdx); + assert trace(" set live variable %d", variableIdx); variableLive.set(variableIdx); kill(value, killOpId); } @@ -246,7 +246,7 @@ } else if (isAllocatableRegister(value)) { int regNum = asRegister(value).number; if (!registerLive.get(regNum)) { - trace(3, " set live register %d", regNum); + assert trace(" set live register %d", regNum); registerLive.set(regNum); kill(value, killOpId); } @@ -255,12 +255,12 @@ } private CiValue def(CiValue value, boolean isTemp) { - trace(3, " def %s", value); + assert trace(" def %s", value); if (isVariable(value)) { int variableIdx = asVariable(value).index; assert definitions[variableIdx] == curOpId; if (variableLive.get(variableIdx)) { - trace(3, " clear live variable %d", variableIdx); + assert trace(" clear live variable %d", variableIdx); assert !isTemp : "temp variable cannot be used after the operation"; variableLive.clear(variableIdx); } else { @@ -271,7 +271,7 @@ } else if (isAllocatableRegister(value)) { int regNum = asRegister(value).number; if (registerLive.get(regNum)) { - trace(3, " clear live register %d", regNum); + assert trace(" clear live register %d", regNum); assert !isTemp : "temp variable cannot be used after the operation"; registerLive.clear(regNum); } else { @@ -296,11 +296,11 @@ if (useBlock.loopDepth() > 0 && useBlock.loopIndex() != defBlock.loopIndex()) { // This is a value defined outside of the loop it is currently used in. Therefore, it is live the whole loop // and is not killed by the current instruction. - trace(3, " no kill because use in loop %d, definition in loop %d", useBlock.loopIndex(), defBlock.loopIndex()); + assert trace(" no kill because use in loop %d, definition in loop %d", useBlock.loopIndex(), defBlock.loopIndex()); return; } } - trace(3, " kill %s at %d", value, opId); + assert trace(" kill %s at %d", value, opId); Object entry = killedValues(opId); if (entry == null) { @@ -322,9 +322,10 @@ } } - private static void trace(int level, String format, Object...args) { - if (GraalOptions.TraceRegisterAllocationLevel >= level) { + private static boolean trace(String format, Object...args) { + if (GraalOptions.TraceRegisterAllocation) { TTY.println(format, args); } + return true; } } diff -r f03c71a0aeb8 -r 504bc518a582 graal/com.oracle.max.graal.compiler/src/com/oracle/max/graal/alloc/simple/ResolveDataFlow.java --- a/graal/com.oracle.max.graal.compiler/src/com/oracle/max/graal/alloc/simple/ResolveDataFlow.java Tue Jan 10 20:13:56 2012 +0100 +++ b/graal/com.oracle.max.graal.compiler/src/com/oracle/max/graal/alloc/simple/ResolveDataFlow.java Tue Jan 10 20:14:08 2012 +0100 @@ -1,5 +1,5 @@ /* - * Copyright (c) 2011, 2011, Oracle and/or its affiliates. All rights reserved. + * Copyright (c) 2011, 2012, Oracle and/or its affiliates. All rights reserved. * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. * * This code is free software; you can redistribute it and/or modify it @@ -50,11 +50,11 @@ ValueProcedure locMappingProc = new ValueProcedure() { @Override public CiValue doValue(CiValue value) { return locMapping(value); } }; PhiValueProcedure phiMappingProc = new PhiValueProcedure() { @Override public CiValue doValue(CiValue input, CiValue output) { return phiMapping(input, output); } }; - trace(1, "==== start resolve data flow ===="); + assert trace("==== start resolve data flow ===="); for (LIRBlock toBlock : lir.linearScanOrder()) { for (LIRBlock fromBlock : toBlock.getLIRPredecessors()) { - trace(1, "start edge %s -> %s", fromBlock, toBlock); + assert trace("start edge %s -> %s", fromBlock, toBlock); findInsertPos(fromBlock, toBlock); LocationMap toLocations = locationsForBlockBegin(toBlock); @@ -68,14 +68,14 @@ } moveResolver.resolve(); - trace(1, "end edge %s -> %s", fromBlock, toBlock); + assert trace("end edge %s -> %s", fromBlock, toBlock); } // Phi functions are resolved with moves now, so delete them. toBlock.phis = null; } moveResolver.finish(); - trace(1, "==== end resolve data flow ===="); + assert trace("==== end resolve data flow ===="); } private CiValue locMapping(CiValue value) { @@ -102,11 +102,11 @@ LIRInstruction instr = instructions.get(instructions.size() - 1); assert instr instanceof LIRBranch && instr.code == StandardOpcode.JUMP : "block does not end with an unconditional jump"; moveResolver.init(instructions, instructions.size() - 1); - trace(1, " insert at end of %s before %d", fromBlock, instructions.size() - 1); + assert trace(" insert at end of %s before %d", fromBlock, instructions.size() - 1); } else if (toBlock.numberOfPreds() == 1) { moveResolver.init(toBlock.lir(), 1); - trace(1, " insert at beginning of %s before %d", toBlock, 1); + assert trace(" insert at beginning of %s before %d", toBlock, 1); } else { Util.shouldNotReachHere("Critical edge not split"); @@ -117,9 +117,10 @@ protected abstract LocationMap locationsForBlockEnd(LIRBlock block); - private static void trace(int level, String format, Object...args) { - if (GraalOptions.TraceRegisterAllocationLevel >= level) { + private static boolean trace(String format, Object...args) { + if (GraalOptions.TraceRegisterAllocation) { TTY.println(format, args); } + return true; } } diff -r f03c71a0aeb8 -r 504bc518a582 graal/com.oracle.max.graal.compiler/src/com/oracle/max/graal/alloc/simple/SpillAllAllocator.java --- a/graal/com.oracle.max.graal.compiler/src/com/oracle/max/graal/alloc/simple/SpillAllAllocator.java Tue Jan 10 20:13:56 2012 +0100 +++ b/graal/com.oracle.max.graal.compiler/src/com/oracle/max/graal/alloc/simple/SpillAllAllocator.java Tue Jan 10 20:14:08 2012 +0100 @@ -164,12 +164,12 @@ PhiValueProcedure useSlotProc = new PhiValueProcedure() { @Override public CiValue doValue(CiValue value) { return useSlot(value); } }; ValueProcedure defSlotProc = new ValueProcedure() { @Override public CiValue doValue(CiValue value) { return defSlot(value); } }; - trace(1, "==== start spill all allocation ===="); + assert trace("==== start spill all allocation ===="); curInRegisterState = new Object[maxRegisterNum()]; curOutRegisterState = new Object[maxRegisterNum()]; curRegisterLocations = new LocationMap(lir.numVariables()); for (LIRBlock block : lir.linearScanOrder()) { - trace(1, "start block %s loop %d depth %d", block, block.loopIndex(), block.loopDepth()); + assert trace("start block %s loop %d depth %d", block, block.loopIndex(), block.loopDepth()); assert checkEmpty(curOutRegisterState); if (block.dominator() != null) { @@ -182,17 +182,17 @@ } else { curStackLocations = new LocationMap(lir.numVariables()); } - traceState(); + assert traceState(); if (block.phis != null) { - trace(1, " phis"); + assert trace(" phis"); block.phis.forEachOutput(defSlotProc); } for (int opIdx = 0; opIdx < block.lir().size(); opIdx++) { LIRInstruction op = block.lir().get(opIdx); curInstruction = op; - trace(1, " op %d %s", op.id(), op); + assert trace(" op %d %s", op.id(), op); assert curRegisterLocations.checkEmpty(); @@ -227,7 +227,7 @@ for (LIRBlock sux : block.getLIRSuccessors()) { if (sux.phis != null) { - trace(1, " phis of successor %s", sux); + assert trace(" phis of successor %s", sux); sux.phis.forEachInput(block, useSlotProc); } } @@ -237,11 +237,11 @@ setLocationsFor(block, curStackLocations); traceState(); - trace(1, "end block %s", block); + assert trace("end block %s", block); } moveResolver.finish(); - trace(1, "==== end spill all allocation ===="); + assert trace("==== end spill all allocation ===="); } private CiValue killNonLive(CiValue value) { @@ -254,7 +254,7 @@ private CiValue kill(CiValue value, boolean end) { if (isVariable(value)) { - trace(3, " kill variable %s", value); + assert trace(" kill variable %s", value); Variable variable = asVariable(value); curStackLocations.clear(variable); @@ -264,7 +264,7 @@ killLocation(loc); curRegisterLocations.clear(variable); - trace(3, " location %s", loc); + assert trace(" location %s", loc); assert isAllocatableRegister(loc.location); int regNum = asRegister(loc.location).number; @@ -274,7 +274,7 @@ } } else if (isAllocatableRegister(value)) { - trace(3, " kill register %s", value); + assert trace(" kill register %s", value); int regNum = asRegister(value).number; assert curOutRegisterState[regNum] == null || curOutRegisterState[regNum] instanceof LIRInstruction && curInstruction != null; @@ -289,7 +289,7 @@ } private CiValue killLocation(CiValue value) { - trace(3, " kill location %s", value); + assert trace(" kill location %s", value); assert isAllocatableRegister(asLocation(value).location); int regNum = asRegister(asLocation(value).location).number; @@ -301,7 +301,7 @@ private CiValue block(CiValue value) { if (isAllocatableRegister(value)) { - trace(3, " block %s", value); + assert trace(" block %s", value); int regNum = asRegister(value).number; assert curInstruction != null; assert curOutRegisterState[regNum] == null || curOutRegisterState[regNum] instanceof LIRInstruction; @@ -316,11 +316,11 @@ return useSlot(value); } if (isVariable(value)) { - trace(3, " load %s", value); + assert trace(" load %s", value); Location regLoc = curRegisterLocations.get(asVariable(value)); if (regLoc != null) { // This variable has already been processed before. - trace(3, " found location %s", regLoc); + assert trace(" found location %s", regLoc); } else { regLoc = allocateRegister(asVariable(value), curInRegisterState, mode == OperandMode.Alive ? curOutRegisterState : null, mode, flags); Location stackLoc = curStackLocations.get(asVariable(value)); @@ -340,7 +340,7 @@ return defSlot(value); } if (isVariable(value)) { - trace(3, " spill %s", value); + assert trace(" spill %s", value); assert curStackLocations.get(asVariable(value)) == null; Location regLoc = allocateRegister(asVariable(value), null, curOutRegisterState, mode, flags); if (mode == OperandMode.Output) { @@ -357,10 +357,10 @@ private CiValue useSlot(CiValue value) { if (isVariable(value)) { - trace(3, " useSlot %s", value); + assert trace(" useSlot %s", value); Location stackLoc = curStackLocations.get(asVariable(value)); assert stackLoc != null; - trace(3, " slot %s", stackLoc); + assert trace(" slot %s", stackLoc); return stackLoc; } else { return value; @@ -369,11 +369,11 @@ private CiValue defSlot(CiValue value) { if (isVariable(value)) { - trace(3, " assignSlot %s", value); + assert trace(" assignSlot %s", value); Location stackLoc = new Location(asVariable(value), frameMap.allocateSpillSlot(value.kind)); assert curStackLocations.get(asVariable(value)) == null; curStackLocations.put(stackLoc); - trace(3, " slot %s", stackLoc); + assert trace(" slot %s", stackLoc); return stackLoc; } else { return value; @@ -385,7 +385,7 @@ CiValue result = curInstruction.forEachRegisterHint(variable, mode, new ValueProcedure() { @Override public CiValue doValue(CiValue registerHint) { - trace(3, " registerHint %s", registerHint); + assert trace(" registerHint %s", registerHint); CiRegister hint = null; if (isRegister(registerHint)) { hint = asRegister(registerHint); @@ -430,7 +430,7 @@ } assert curRegisterLocations.get(variable) == null; curRegisterLocations.put(loc); - trace(3, " selected register %s", loc); + assert trace(" selected register %s", loc); return loc; } @@ -471,8 +471,8 @@ } - private void traceState() { - if (GraalOptions.TraceRegisterAllocationLevel >= 3) { + private boolean traceState() { + if (GraalOptions.TraceRegisterAllocation) { TTY.print(" curVariableLocations: "); curStackLocations.forEachLocation(new ValueProcedure() { @Override @@ -483,11 +483,13 @@ }); TTY.println(); } + return true; } - private static void trace(int level, String format, Object...args) { - if (GraalOptions.TraceRegisterAllocationLevel >= level) { + private static boolean trace(String format, Object...args) { + if (GraalOptions.TraceRegisterAllocation) { TTY.println(format, args); } + return true; } } diff -r f03c71a0aeb8 -r 504bc518a582 graal/com.oracle.max.graal.compiler/src/com/oracle/max/graal/alloc/util/MoveResolver.java --- a/graal/com.oracle.max.graal.compiler/src/com/oracle/max/graal/alloc/util/MoveResolver.java Tue Jan 10 20:13:56 2012 +0100 +++ b/graal/com.oracle.max.graal.compiler/src/com/oracle/max/graal/alloc/util/MoveResolver.java Tue Jan 10 20:14:08 2012 +0100 @@ -74,7 +74,7 @@ assert isLocation(from) || isConstant(from); assert from != to; - trace(3, "mr add mapping from %s to %s", from, to); + assert trace("mr add mapping from %s to %s", from, to); mappingFrom.add(from); mappingTo.add(to); @@ -86,12 +86,12 @@ if (mappingFrom.size() == 1) { // If there is only one mapping, it is trivial that this mapping is safe to resolve. - trace(3, "mr resolve mappings: %d", mappingFrom.size()); + assert trace("mr resolve mappings: %d", mappingFrom.size()); insertMove(mappingFrom.get(0), mappingTo.get(0)); mappingFrom.remove(0); mappingTo.remove(0); } else if (mappingFrom.size() > 1) { - trace(3, "mr resolve mappings: %d", mappingFrom.size()); + assert trace("mr resolve mappings: %d", mappingFrom.size()); doResolve(); } insertPos = -1; @@ -258,7 +258,7 @@ } private void insertExchange(Location from, Location to) { - trace(3, "mr XCHG %s, %s", from, to); + assert trace("mr XCHG %s, %s", from, to); // TODO create XCHG instruction and use it here insertionBuffer.append(insertPos, null); throw Util.unimplemented(); @@ -291,7 +291,7 @@ } } else { - trace(3, "mr MOV %s -> %s", src, dst); + assert trace("mr MOV %s -> %s", src, dst); insertionBuffer.append(insertPos, StandardOpcode.SPILL_MOVE.create(dst, src)); } } @@ -337,9 +337,10 @@ } - private static void trace(int level, String format, Object...args) { - if (GraalOptions.TraceRegisterAllocationLevel >= level) { + private static boolean trace(String format, Object...args) { + if (GraalOptions.TraceRegisterAllocation) { TTY.println(format, args); } + return true; } } diff -r f03c71a0aeb8 -r 504bc518a582 graal/com.oracle.max.graal.compiler/src/com/oracle/max/graal/alloc/util/RegisterVerifier.java --- a/graal/com.oracle.max.graal.compiler/src/com/oracle/max/graal/alloc/util/RegisterVerifier.java Tue Jan 10 20:13:56 2012 +0100 +++ b/graal/com.oracle.max.graal.compiler/src/com/oracle/max/graal/alloc/util/RegisterVerifier.java Tue Jan 10 20:14:08 2012 +0100 @@ -1,5 +1,5 @@ /* - * Copyright (c) 2009, 2011, Oracle and/or its affiliates. All rights reserved. + * Copyright (c) 2009, 2012, Oracle and/or its affiliates. All rights reserved. * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. * * This code is free software; you can redistribute it and/or modify it @@ -95,18 +95,18 @@ setStateFor(startBlock, curInputState); addToWorkList(startBlock); - trace(1, "==== start verify register allocation ===="); + assert trace("==== start verify register allocation ===="); do { LIRBlock block = workList.remove(0); assert block.phis == null : "phi functions must have been resolved with moves"; // Must copy state because it is modified. curInputState = copy(stateFor(block)); - trace(1, "start block %s loop %d depth %d", block, block.loopIndex(), block.loopDepth()); - traceState(); + assert trace("start block %s loop %d depth %d", block, block.loopIndex(), block.loopDepth()); + assert traceState(); for (LIRInstruction op : block.lir()) { - trace(2, " op %d %s", op.id(), op); + assert trace(" op %d %s", op.id(), op); op.forEachInput(useProc); if (op.hasCall()) { @@ -122,23 +122,23 @@ processSuccessor(succ); } - trace(1, "end block %s", block); + assert trace("end block %s", block); } while (!workList.isEmpty()); - trace(1, "==== end verify register allocation ===="); + assert trace("==== end verify register allocation ===="); } private void processSuccessor(LIRBlock succ) { Map savedState = stateFor(succ); if (savedState == null) { // Block was not processed before, so set initial inputState. - trace(2, " successor %s: initial visit", succ); + assert trace(" successor %s: initial visit", succ); setStateFor(succ, copy(curInputState)); addToWorkList(succ); } else { // This block was already processed before. // Check if new inputState is consistent with savedState. - trace(2, " successor %s: state present", succ); + assert trace(" successor %s: state present", succ); Iterator> iter = savedState.entrySet().iterator(); while (iter.hasNext()) { Map.Entry entry = iter.next(); @@ -148,7 +148,7 @@ if (savedValue != inputValue) { // Current inputState and previous savedState assume a different value in this register. // Assume that this register is invalid and remove it from the saved state. - trace(2, " invalididating %s because it is inconsistent with %s", savedValue, inputValue); + assert trace(" invalididating %s because it is inconsistent with %s", savedValue, inputValue); iter.remove(); // Must re-visit this block. addToWorkList(succ); @@ -163,7 +163,7 @@ while (iter.hasNext()) { Object value1 = iter.next(); if (value1 instanceof CiRegister && registerConfig.getAttributesMap()[((CiRegister) value1).number].isCallerSave) { - trace(2, " remove caller save register %s", value1); + assert trace(" remove caller save register %s", value1); iter.remove(); } } @@ -203,20 +203,20 @@ } private CiValue temp(CiValue value) { - trace(2, " temp %s -> remove key %s", value, key(value)); + assert trace(" temp %s -> remove key %s", value, key(value)); curInputState.remove(key(value)); return value; } private CiValue output(CiValue value) { - trace(2, " output %s -> set key %s", value, key(value)); + assert trace(" output %s -> set key %s", value, key(value)); curInputState.put(key(value), value); return value; } - private void traceState() { - if (GraalOptions.TraceRegisterAllocationLevel >= 2) { + private boolean traceState() { + if (GraalOptions.TraceRegisterAllocation) { ArrayList keys = new ArrayList<>(curInputState.keySet()); Collections.sort(keys, new Comparator() { @Override @@ -243,11 +243,13 @@ } TTY.println(); } + return true; } - private static void trace(int level, String format, Object...args) { - if (GraalOptions.TraceRegisterAllocationLevel >= level) { + private static boolean trace(String format, Object...args) { + if (GraalOptions.TraceRegisterAllocation) { TTY.println(format, args); } + return true; } } diff -r f03c71a0aeb8 -r 504bc518a582 graal/com.oracle.max.graal.compiler/src/com/oracle/max/graal/compiler/GraalCompilation.java --- a/graal/com.oracle.max.graal.compiler/src/com/oracle/max/graal/compiler/GraalCompilation.java Tue Jan 10 20:13:56 2012 +0100 +++ b/graal/com.oracle.max.graal.compiler/src/com/oracle/max/graal/compiler/GraalCompilation.java Tue Jan 10 20:14:08 2012 +0100 @@ -71,11 +71,12 @@ * @param context the compilation context * @param compiler the compiler * @param method the method to be compiled or {@code null} if generating code for a stub + * @param graph the initial graph * @param osrBCI the bytecode index for on-stack replacement, if requested * @param stats externally supplied statistics object to be used if not {@code null} * @param debugInfoLevel TODO */ - private GraalCompilation(GraalContext context, GraalCompiler compiler, RiResolvedMethod method, StructuredGraph graph, int osrBCI, CiStatistics stats, DebugInfoLevel debugInfoLevel) { + public GraalCompilation(GraalContext context, GraalCompiler compiler, RiResolvedMethod method, StructuredGraph graph, int osrBCI, CiStatistics stats, DebugInfoLevel debugInfoLevel) { if (osrBCI != -1) { throw new CiBailout("No OSR supported"); } @@ -91,11 +92,6 @@ } } - public GraalCompilation(GraalContext context, GraalCompiler compiler, RiResolvedMethod method, int osrBCI, CiStatistics stats, DebugInfoLevel debugInfoLevel) { - this(context, compiler, method, new StructuredGraph(method), osrBCI, stats, debugInfoLevel); - } - - public void close() { // TODO(tw): Check if we can delete this method. } diff -r f03c71a0aeb8 -r 504bc518a582 graal/com.oracle.max.graal.compiler/src/com/oracle/max/graal/compiler/GraalCompiler.java --- a/graal/com.oracle.max.graal.compiler/src/com/oracle/max/graal/compiler/GraalCompiler.java Tue Jan 10 20:13:56 2012 +0100 +++ b/graal/com.oracle.max.graal.compiler/src/com/oracle/max/graal/compiler/GraalCompiler.java Tue Jan 10 20:14:08 2012 +0100 @@ -32,6 +32,7 @@ import com.oracle.max.graal.compiler.stub.*; import com.oracle.max.graal.compiler.target.*; import com.oracle.max.graal.cri.*; +import com.oracle.max.graal.nodes.*; public class GraalCompiler { @@ -76,6 +77,10 @@ } public CiTargetMethod compileMethod(RiResolvedMethod method, int osrBCI, CiStatistics stats, CiCompiler.DebugInfoLevel debugInfoLevel, PhasePlan plan) { + return compileMethod(method, new StructuredGraph(method), osrBCI, stats, debugInfoLevel, plan); + } + + public CiTargetMethod compileMethod(RiResolvedMethod method, StructuredGraph graph, int osrBCI, CiStatistics stats, CiCompiler.DebugInfoLevel debugInfoLevel, PhasePlan plan) { context.timers.startScope(getClass()); try { long startTime = 0; @@ -92,7 +97,7 @@ CiTargetMethod result = null; TTY.Filter filter = new TTY.Filter(GraalOptions.PrintFilter, method); - GraalCompilation compilation = new GraalCompilation(context, this, method, osrBCI, stats, debugInfoLevel); + GraalCompilation compilation = new GraalCompilation(context, this, method, graph, osrBCI, stats, debugInfoLevel); try { result = compilation.compile(plan); } finally { diff -r f03c71a0aeb8 -r 504bc518a582 graal/com.oracle.max.graal.compiler/src/com/oracle/max/graal/compiler/GraalOptions.java --- a/graal/com.oracle.max.graal.compiler/src/com/oracle/max/graal/compiler/GraalOptions.java Tue Jan 10 20:13:56 2012 +0100 +++ b/graal/com.oracle.max.graal.compiler/src/com/oracle/max/graal/compiler/GraalOptions.java Tue Jan 10 20:14:08 2012 +0100 @@ -1,5 +1,5 @@ /* - * Copyright (c) 2009, 2011, Oracle and/or its affiliates. All rights reserved. + * Copyright (c) 2009, 2012, Oracle and/or its affiliates. All rights reserved. * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. * * This code is free software; you can redistribute it and/or modify it @@ -105,7 +105,7 @@ public static boolean PrintCodeBytes = ____; public static int PrintAssemblyBytesPerLine = 16; public static int TraceLinearScanLevel = 0; - public static int TraceRegisterAllocationLevel = 0; + public static boolean TraceRegisterAllocation = false; public static int TraceLIRGeneratorLevel = 0; public static boolean TraceRelocation = ____; public static boolean TraceLIRVisit = ____; diff -r f03c71a0aeb8 -r 504bc518a582 graal/com.oracle.max.graal.compiler/src/com/oracle/max/graal/compiler/lir/LIRCall.java --- a/graal/com.oracle.max.graal.compiler/src/com/oracle/max/graal/compiler/lir/LIRCall.java Tue Jan 10 20:13:56 2012 +0100 +++ b/graal/com.oracle.max.graal.compiler/src/com/oracle/max/graal/compiler/lir/LIRCall.java Tue Jan 10 20:14:08 2012 +0100 @@ -78,14 +78,6 @@ this.target = target; } - public RiMethod method() { - return (RiMethod) target; - } - - public CiRuntimeCall runtimeCall() { - return (CiRuntimeCall) target; - } - public CiValue targetAddress() { if (targetAddressIndex >= 0) { return input(targetAddressIndex); diff -r f03c71a0aeb8 -r 504bc518a582 graal/com.oracle.max.graal.compiler/src/com/oracle/max/graal/compiler/target/amd64/AMD64ArithmeticOpcode.java --- a/graal/com.oracle.max.graal.compiler/src/com/oracle/max/graal/compiler/target/amd64/AMD64ArithmeticOpcode.java Tue Jan 10 20:13:56 2012 +0100 +++ b/graal/com.oracle.max.graal.compiler/src/com/oracle/max/graal/compiler/target/amd64/AMD64ArithmeticOpcode.java Tue Jan 10 20:14:08 2012 +0100 @@ -38,22 +38,20 @@ FADD, FSUB, FMUL, FDIV, DADD, DSUB, DMUL, DDIV; - public LIRInstruction create(Variable result, CiValue left, CiValue right) { - assert (name().startsWith("I") && result.kind == CiKind.Int && left.kind.stackKind() == CiKind.Int && right.kind.stackKind() == CiKind.Int) - || (name().startsWith("L") && result.kind == CiKind.Long && left.kind == CiKind.Long && right.kind == CiKind.Long) - || (name().startsWith("F") && result.kind == CiKind.Float && left.kind == CiKind.Float && right.kind == CiKind.Float) - || (name().startsWith("D") && result.kind == CiKind.Double && left.kind == CiKind.Double && right.kind == CiKind.Double); + public LIRInstruction create(CiValue result, CiValue x, CiValue y) { + assert (name().startsWith("I") && result.kind == CiKind.Int && x.kind.stackKind() == CiKind.Int && y.kind.stackKind() == CiKind.Int) + || (name().startsWith("L") && result.kind == CiKind.Long && x.kind == CiKind.Long && y.kind == CiKind.Long) + || (name().startsWith("F") && result.kind == CiKind.Float && x.kind == CiKind.Float && y.kind == CiKind.Float) + || (name().startsWith("D") && result.kind == CiKind.Double && x.kind == CiKind.Double && y.kind == CiKind.Double); - CiValue[] inputs = new CiValue[] {left}; - CiValue[] alives = new CiValue[] {right}; + CiValue[] inputs = new CiValue[] {x}; + CiValue[] alives = new CiValue[] {y}; CiValue[] outputs = new CiValue[] {result}; return new AMD64LIRInstruction(this, outputs, null, inputs, alives, LIRInstruction.NO_OPERANDS) { @Override public void emitCode(TargetMethodAssembler tasm, AMD64MacroAssembler masm) { - assert !(alive(0) instanceof CiRegisterValue) || asRegister(output(0)) != asRegister(alive(0)) : "result and right must be different registers"; - AMD64MoveOpcode.move(tasm, masm, output(0), input(0)); - emit(tasm, masm, output(0), alive(0)); + emit(tasm, masm, output(0), input(0), alive(0)); } @Override @@ -70,10 +68,13 @@ }; } - protected void emit(TargetMethodAssembler tasm, AMD64MacroAssembler masm, CiValue leftAndResult, CiValue right) { - CiRegister dst = asRegister(leftAndResult); - if (isRegister(right)) { - CiRegister rreg = asRegister(right); + protected void emit(TargetMethodAssembler tasm, AMD64MacroAssembler masm, CiValue result, CiValue x, CiValue y) { + assert sameRegister(x, y) || differentRegisters(result, y); + AMD64MoveOpcode.move(tasm, masm, result, x); + + CiRegister dst = asRegister(result); + if (isRegister(y)) { + CiRegister rreg = asRegister(y); switch (this) { case IADD: masm.addl(dst, rreg); break; case ISUB: masm.subl(dst, rreg); break; @@ -95,30 +96,30 @@ case DDIV: masm.divsd(dst, rreg); break; default: throw Util.shouldNotReachHere(); } - } else if (isConstant(right)) { + } else if (isConstant(y)) { switch (this) { - case IADD: masm.incrementl(dst, tasm.asIntConst(right)); break; - case ISUB: masm.decrementl(dst, tasm.asIntConst(right)); break; - case IAND: masm.andl(dst, tasm.asIntConst(right)); break; - case IOR: masm.orl(dst, tasm.asIntConst(right)); break; - case IXOR: masm.xorl(dst, tasm.asIntConst(right)); break; - case LADD: masm.addq(dst, tasm.asIntConst(right)); break; - case LSUB: masm.subq(dst, tasm.asIntConst(right)); break; - case LAND: masm.andq(dst, tasm.asIntConst(right)); break; - case LOR: masm.orq(dst, tasm.asIntConst(right)); break; - case LXOR: masm.xorq(dst, tasm.asIntConst(right)); break; - case FADD: masm.addss(dst, tasm.asFloatConstRef(right)); break; - case FSUB: masm.subss(dst, tasm.asFloatConstRef(right)); break; - case FMUL: masm.mulss(dst, tasm.asFloatConstRef(right)); break; - case FDIV: masm.divss(dst, tasm.asFloatConstRef(right)); break; - case DADD: masm.addsd(dst, tasm.asDoubleConstRef(right)); break; - case DSUB: masm.subsd(dst, tasm.asDoubleConstRef(right)); break; - case DMUL: masm.mulsd(dst, tasm.asDoubleConstRef(right)); break; - case DDIV: masm.divsd(dst, tasm.asDoubleConstRef(right)); break; + case IADD: masm.incrementl(dst, tasm.asIntConst(y)); break; + case ISUB: masm.decrementl(dst, tasm.asIntConst(y)); break; + case IAND: masm.andl(dst, tasm.asIntConst(y)); break; + case IOR: masm.orl(dst, tasm.asIntConst(y)); break; + case IXOR: masm.xorl(dst, tasm.asIntConst(y)); break; + case LADD: masm.addq(dst, tasm.asIntConst(y)); break; + case LSUB: masm.subq(dst, tasm.asIntConst(y)); break; + case LAND: masm.andq(dst, tasm.asIntConst(y)); break; + case LOR: masm.orq(dst, tasm.asIntConst(y)); break; + case LXOR: masm.xorq(dst, tasm.asIntConst(y)); break; + case FADD: masm.addss(dst, tasm.asFloatConstRef(y)); break; + case FSUB: masm.subss(dst, tasm.asFloatConstRef(y)); break; + case FMUL: masm.mulss(dst, tasm.asFloatConstRef(y)); break; + case FDIV: masm.divss(dst, tasm.asFloatConstRef(y)); break; + case DADD: masm.addsd(dst, tasm.asDoubleConstRef(y)); break; + case DSUB: masm.subsd(dst, tasm.asDoubleConstRef(y)); break; + case DMUL: masm.mulsd(dst, tasm.asDoubleConstRef(y)); break; + case DDIV: masm.divsd(dst, tasm.asDoubleConstRef(y)); break; default: throw Util.shouldNotReachHere(); } } else { - CiAddress raddr = tasm.asAddress(right); + CiAddress raddr = tasm.asAddress(y); switch (this) { case IADD: masm.addl(dst, raddr); break; case ISUB: masm.subl(dst, raddr); break; diff -r f03c71a0aeb8 -r 504bc518a582 graal/com.oracle.max.graal.compiler/src/com/oracle/max/graal/compiler/target/amd64/AMD64Backend.java --- a/graal/com.oracle.max.graal.compiler/src/com/oracle/max/graal/compiler/target/amd64/AMD64Backend.java Tue Jan 10 20:13:56 2012 +0100 +++ b/graal/com.oracle.max.graal.compiler/src/com/oracle/max/graal/compiler/target/amd64/AMD64Backend.java Tue Jan 10 20:14:08 2012 +0100 @@ -34,6 +34,7 @@ import com.oracle.max.graal.compiler.stub.*; import com.oracle.max.graal.compiler.stub.CompilerStub.Id; import com.oracle.max.graal.compiler.target.*; +import com.oracle.max.graal.nodes.*; /** * The {@code X86Backend} class represents the backend for the AMD64 architecture. @@ -70,7 +71,7 @@ @Override public CompilerStub emit(GraalContext context, Id stub) { - final GraalCompilation comp = new GraalCompilation(context, compiler, null, -1, null, DebugInfoLevel.FULL); + final GraalCompilation comp = new GraalCompilation(context, compiler, null, new StructuredGraph(), -1, null, DebugInfoLevel.FULL); try { return new AMD64CompilerStubEmitter(comp, stub.arguments, stub.resultKind).emit(stub); } finally { @@ -80,7 +81,7 @@ @Override public CompilerStub emit(GraalContext context, CiRuntimeCall rtCall) { - final GraalCompilation comp = new GraalCompilation(context, compiler, null, -1, null, DebugInfoLevel.FULL); + final GraalCompilation comp = new GraalCompilation(context, compiler, null, new StructuredGraph(), -1, null, DebugInfoLevel.FULL); try { return new AMD64CompilerStubEmitter(comp, rtCall.arguments, rtCall.resultKind).emit(rtCall); } finally { @@ -100,7 +101,7 @@ @Override public CompilerStub emit(GraalContext context, XirTemplate t) { - final GraalCompilation comp = new GraalCompilation(context, compiler, null, -1, null, DebugInfoLevel.FULL); + final GraalCompilation comp = new GraalCompilation(context, compiler, null, new StructuredGraph(), -1, null, DebugInfoLevel.FULL); try { return new AMD64CompilerStubEmitter(comp, getArgumentKinds(t), t.resultOperand.kind).emit(t); } finally { diff -r f03c71a0aeb8 -r 504bc518a582 graal/com.oracle.max.graal.compiler/src/com/oracle/max/graal/compiler/target/amd64/AMD64CompareOpcode.java --- a/graal/com.oracle.max.graal.compiler/src/com/oracle/max/graal/compiler/target/amd64/AMD64CompareOpcode.java Tue Jan 10 20:13:56 2012 +0100 +++ b/graal/com.oracle.max.graal.compiler/src/com/oracle/max/graal/compiler/target/amd64/AMD64CompareOpcode.java Tue Jan 10 20:14:08 2012 +0100 @@ -35,14 +35,14 @@ public enum AMD64CompareOpcode implements LIROpcode { ICMP, LCMP, ACMP, FCMP, DCMP; - public LIRInstruction create(Variable left, CiValue right) { - assert (name().startsWith("I") && left.kind == CiKind.Int && right.kind.stackKind() == CiKind.Int) - || (name().startsWith("I") && left.kind == CiKind.Jsr && right.kind == CiKind.Jsr) - || (name().startsWith("L") && left.kind == CiKind.Long && right.kind == CiKind.Long) - || (name().startsWith("A") && left.kind == CiKind.Object && right.kind == CiKind.Object) - || (name().startsWith("F") && left.kind == CiKind.Float && right.kind == CiKind.Float) - || (name().startsWith("D") && left.kind == CiKind.Double && right.kind == CiKind.Double) : "left.kind=" + left.kind + ", right.kind=" + right.kind; - CiValue[] inputs = new CiValue[] {left, right}; + public LIRInstruction create(CiValue x, CiValue y) { + assert (name().startsWith("I") && x.kind == CiKind.Int && y.kind.stackKind() == CiKind.Int) + || (name().startsWith("I") && x.kind == CiKind.Jsr && y.kind == CiKind.Jsr) + || (name().startsWith("L") && x.kind == CiKind.Long && y.kind == CiKind.Long) + || (name().startsWith("A") && x.kind == CiKind.Object && y.kind == CiKind.Object) + || (name().startsWith("F") && x.kind == CiKind.Float && y.kind == CiKind.Float) + || (name().startsWith("D") && x.kind == CiKind.Double && y.kind == CiKind.Double); + CiValue[] inputs = new CiValue[] {x, y}; return new AMD64LIRInstruction(this, LIRInstruction.NO_OPERANDS, null, inputs, LIRInstruction.NO_OPERANDS, LIRInstruction.NO_OPERANDS) { @Override @@ -60,10 +60,10 @@ }; } - protected void emit(TargetMethodAssembler tasm, AMD64MacroAssembler masm, CiValue left, CiValue right) { - CiRegister lreg = asRegister(left); - if (isRegister(right)) { - CiRegister rreg = asRegister(right); + protected void emit(TargetMethodAssembler tasm, AMD64MacroAssembler masm, CiValue x, CiValue y) { + CiRegister lreg = asRegister(x); + if (isRegister(y)) { + CiRegister rreg = asRegister(y); switch (this) { case ICMP: masm.cmpl(lreg, rreg); break; case LCMP: masm.cmpq(lreg, rreg); break; @@ -72,22 +72,22 @@ case DCMP: masm.ucomisd(lreg, rreg); break; default: throw Util.shouldNotReachHere(); } - } else if (isConstant(right)) { + } else if (isConstant(y)) { switch (this) { - case ICMP: masm.cmpl(lreg, tasm.asIntConst(right)); break; - case LCMP: masm.cmpq(lreg, tasm.asIntConst(right)); break; + case ICMP: masm.cmpl(lreg, tasm.asIntConst(y)); break; + case LCMP: masm.cmpq(lreg, tasm.asIntConst(y)); break; case ACMP: - if (((CiConstant) right).isNull()) { + if (((CiConstant) y).isNull()) { masm.cmpq(lreg, 0); break; } else { throw Util.shouldNotReachHere("Only null object constants are allowed in comparisons"); } - case FCMP: masm.ucomiss(lreg, tasm.asFloatConstRef(right)); break; - case DCMP: masm.ucomisd(lreg, tasm.asDoubleConstRef(right)); break; + case FCMP: masm.ucomiss(lreg, tasm.asFloatConstRef(y)); break; + case DCMP: masm.ucomisd(lreg, tasm.asDoubleConstRef(y)); break; default: throw Util.shouldNotReachHere(); } } else { - CiAddress raddr = tasm.asAddress(right); + CiAddress raddr = tasm.asAddress(y); switch (this) { case ICMP: masm.cmpl(lreg, raddr); break; case LCMP: masm.cmpq(lreg, raddr); break; diff -r f03c71a0aeb8 -r 504bc518a582 graal/com.oracle.max.graal.compiler/src/com/oracle/max/graal/compiler/target/amd64/AMD64CompareToIntOpcode.java --- a/graal/com.oracle.max.graal.compiler/src/com/oracle/max/graal/compiler/target/amd64/AMD64CompareToIntOpcode.java Tue Jan 10 20:13:56 2012 +0100 +++ b/graal/com.oracle.max.graal.compiler/src/com/oracle/max/graal/compiler/target/amd64/AMD64CompareToIntOpcode.java Tue Jan 10 20:14:08 2012 +0100 @@ -40,7 +40,7 @@ public enum AMD64CompareToIntOpcode implements LIROpcode { CMP2INT, CMP2INT_UG, CMP2INT_UL; - public LIRInstruction create(Variable result) { + public LIRInstruction create(CiValue result) { CiValue[] outputs = new CiValue[] {result}; return new AMD64LIRInstruction(this, outputs, null, LIRInstruction.NO_OPERANDS, LIRInstruction.NO_OPERANDS, LIRInstruction.NO_OPERANDS) { diff -r f03c71a0aeb8 -r 504bc518a582 graal/com.oracle.max.graal.compiler/src/com/oracle/max/graal/compiler/target/amd64/AMD64ConvertFIOpcode.java --- a/graal/com.oracle.max.graal.compiler/src/com/oracle/max/graal/compiler/target/amd64/AMD64ConvertFIOpcode.java Tue Jan 10 20:13:56 2012 +0100 +++ b/graal/com.oracle.max.graal.compiler/src/com/oracle/max/graal/compiler/target/amd64/AMD64ConvertFIOpcode.java Tue Jan 10 20:14:08 2012 +0100 @@ -36,8 +36,8 @@ public enum AMD64ConvertFIOpcode implements LIROpcode { F2I, D2I; - public LIRInstruction create(Variable result, final CompilerStub stub, Variable input) { - CiValue[] inputs = new CiValue[] {input}; + public LIRInstruction create(CiValue result, final CompilerStub stub, CiValue x) { + CiValue[] inputs = new CiValue[] {x}; CiValue[] outputs = new CiValue[] {result}; return new AMD64LIRInstruction(this, outputs, null, inputs, LIRInstruction.NO_OPERANDS, LIRInstruction.NO_OPERANDS) { @@ -48,17 +48,17 @@ }; } - private void emit(TargetMethodAssembler tasm, AMD64MacroAssembler masm, CiValue result, CompilerStub stub, CiValue input) { + private void emit(TargetMethodAssembler tasm, AMD64MacroAssembler masm, CiValue result, CompilerStub stub, CiValue x) { switch (this) { - case F2I: masm.cvttss2sil(asIntReg(result), asFloatReg(input)); break; - case D2I: masm.cvttsd2sil(asIntReg(result), asDoubleReg(input)); break; + case F2I: masm.cvttss2sil(asIntReg(result), asFloatReg(x)); break; + case D2I: masm.cvttsd2sil(asIntReg(result), asDoubleReg(x)); break; default: throw Util.shouldNotReachHere(); } Label endLabel = new Label(); masm.cmp32(asIntReg(result), Integer.MIN_VALUE); masm.jcc(ConditionFlag.notEqual, endLabel); - AMD64CallOpcode.callStub(tasm, masm, stub, null, result, input); + AMD64CallOpcode.callStub(tasm, masm, stub, null, result, x); masm.bind(endLabel); } } diff -r f03c71a0aeb8 -r 504bc518a582 graal/com.oracle.max.graal.compiler/src/com/oracle/max/graal/compiler/target/amd64/AMD64ConvertFLOpcode.java --- a/graal/com.oracle.max.graal.compiler/src/com/oracle/max/graal/compiler/target/amd64/AMD64ConvertFLOpcode.java Tue Jan 10 20:13:56 2012 +0100 +++ b/graal/com.oracle.max.graal.compiler/src/com/oracle/max/graal/compiler/target/amd64/AMD64ConvertFLOpcode.java Tue Jan 10 20:14:08 2012 +0100 @@ -36,8 +36,8 @@ public enum AMD64ConvertFLOpcode implements LIROpcode { F2L, D2L; - public LIRInstruction create(Variable result, final CompilerStub stub, Variable input, Variable scratch) { - CiValue[] inputs = new CiValue[] {input}; + public LIRInstruction create(CiValue result, final CompilerStub stub, CiValue x, CiValue scratch) { + CiValue[] inputs = new CiValue[] {x}; CiValue[] temps = new CiValue[] {scratch}; CiValue[] outputs = new CiValue[] {result}; @@ -49,12 +49,14 @@ }; } - private void emit(TargetMethodAssembler tasm, AMD64MacroAssembler masm, CiValue result, CompilerStub stub, CiValue input, CiValue scratch) { + private void emit(TargetMethodAssembler tasm, AMD64MacroAssembler masm, CiValue result, CompilerStub stub, CiValue x, CiValue scratch) { + assert differentRegisters(result, scratch); + CiRegister dst = asLongReg(result); CiRegister tmp = asLongReg(scratch); switch (this) { - case F2L: masm.cvttss2siq(dst, asFloatReg(input)); break; - case D2L: masm.cvttsd2siq(dst, asDoubleReg(input)); break; + case F2L: masm.cvttss2siq(dst, asFloatReg(x)); break; + case D2L: masm.cvttsd2siq(dst, asDoubleReg(x)); break; default: throw Util.shouldNotReachHere(); } @@ -62,7 +64,7 @@ masm.movq(tmp, java.lang.Long.MIN_VALUE); masm.cmpq(dst, tmp); masm.jcc(ConditionFlag.notEqual, endLabel); - AMD64CallOpcode.callStub(tasm, masm, stub, null, result, input); + AMD64CallOpcode.callStub(tasm, masm, stub, null, result, x); masm.bind(endLabel); } } diff -r f03c71a0aeb8 -r 504bc518a582 graal/com.oracle.max.graal.compiler/src/com/oracle/max/graal/compiler/target/amd64/AMD64ConvertOpcode.java --- a/graal/com.oracle.max.graal.compiler/src/com/oracle/max/graal/compiler/target/amd64/AMD64ConvertOpcode.java Tue Jan 10 20:13:56 2012 +0100 +++ b/graal/com.oracle.max.graal.compiler/src/com/oracle/max/graal/compiler/target/amd64/AMD64ConvertOpcode.java Tue Jan 10 20:14:08 2012 +0100 @@ -39,8 +39,8 @@ L2F, L2D, MOV_I2F, MOV_L2D, MOV_F2I, MOV_D2L; - public LIRInstruction create(Variable result, Variable input) { - CiValue[] inputs = new CiValue[] {input}; + public LIRInstruction create(CiValue result, CiValue x) { + CiValue[] inputs = new CiValue[] {x}; CiValue[] outputs = new CiValue[] {result}; return new AMD64LIRInstruction(this, outputs, null, inputs, LIRInstruction.NO_OPERANDS, LIRInstruction.NO_OPERANDS) { @@ -59,35 +59,35 @@ }; } - private void emit(TargetMethodAssembler tasm, AMD64MacroAssembler masm, CiValue result, CiValue input) { + private void emit(TargetMethodAssembler tasm, AMD64MacroAssembler masm, CiValue result, CiValue x) { switch (this) { case L2I: - AMD64MoveOpcode.move(tasm, masm, result, input); + AMD64MoveOpcode.move(tasm, masm, result, x); masm.andl(asIntReg(result), 0xFFFFFFFF); break; case I2B: - AMD64MoveOpcode.move(tasm, masm, result, input); + AMD64MoveOpcode.move(tasm, masm, result, x); masm.signExtendByte(asIntReg(result)); break; case I2C: - AMD64MoveOpcode.move(tasm, masm, result, input); + AMD64MoveOpcode.move(tasm, masm, result, x); masm.andl(asIntReg(result), 0xFFFF); break; case I2S: - AMD64MoveOpcode.move(tasm, masm, result, input); + AMD64MoveOpcode.move(tasm, masm, result, x); masm.signExtendShort(asIntReg(result)); break; - case I2L: masm.movslq(asLongReg(result), asIntReg(input)); break; - case F2D: masm.cvtss2sd(asDoubleReg(result), asFloatReg(input)); break; - case D2F: masm.cvtsd2ss(asFloatReg(result), asDoubleReg(input)); break; - case I2F: masm.cvtsi2ssl(asFloatReg(result), asIntReg(input)); break; - case I2D: masm.cvtsi2sdl(asDoubleReg(result), asIntReg(input)); break; - case L2F: masm.cvtsi2ssq(asFloatReg(result), asLongReg(input)); break; - case L2D: masm.cvtsi2sdq(asDoubleReg(result), asLongReg(input)); break; - case MOV_I2F: masm.movdl(asFloatReg(result), asIntReg(input)); break; - case MOV_L2D: masm.movdq(asDoubleReg(result), asLongReg(input)); break; - case MOV_F2I: masm.movdl(asIntReg(result), asFloatReg(input)); break; - case MOV_D2L: masm.movdq(asLongReg(result), asDoubleReg(input)); break; + case I2L: masm.movslq(asLongReg(result), asIntReg(x)); break; + case F2D: masm.cvtss2sd(asDoubleReg(result), asFloatReg(x)); break; + case D2F: masm.cvtsd2ss(asFloatReg(result), asDoubleReg(x)); break; + case I2F: masm.cvtsi2ssl(asFloatReg(result), asIntReg(x)); break; + case I2D: masm.cvtsi2sdl(asDoubleReg(result), asIntReg(x)); break; + case L2F: masm.cvtsi2ssq(asFloatReg(result), asLongReg(x)); break; + case L2D: masm.cvtsi2sdq(asDoubleReg(result), asLongReg(x)); break; + case MOV_I2F: masm.movdl(asFloatReg(result), asIntReg(x)); break; + case MOV_L2D: masm.movdq(asDoubleReg(result), asLongReg(x)); break; + case MOV_F2I: masm.movdl(asIntReg(result), asFloatReg(x)); break; + case MOV_D2L: masm.movdq(asLongReg(result), asDoubleReg(x)); break; default: throw Util.shouldNotReachHere(); } } diff -r f03c71a0aeb8 -r 504bc518a582 graal/com.oracle.max.graal.compiler/src/com/oracle/max/graal/compiler/target/amd64/AMD64DivOpcode.java --- a/graal/com.oracle.max.graal.compiler/src/com/oracle/max/graal/compiler/target/amd64/AMD64DivOpcode.java Tue Jan 10 20:13:56 2012 +0100 +++ b/graal/com.oracle.max.graal.compiler/src/com/oracle/max/graal/compiler/target/amd64/AMD64DivOpcode.java Tue Jan 10 20:14:08 2012 +0100 @@ -33,28 +33,28 @@ import com.oracle.max.graal.compiler.util.*; public enum AMD64DivOpcode implements LIROpcode { - IDIV, IREM, UIDIV, UIREM, - LDIV, LREM, ULDIV, ULREM; + IDIV, IREM, IUDIV, IUREM, + LDIV, LREM, LUDIV, LUREM; - public LIRInstruction create(CiRegisterValue result, LIRDebugInfo info, CiRegisterValue left, Variable right) { - CiValue[] inputs = new CiValue[] {left}; - CiValue[] alives = new CiValue[] {right}; - CiValue[] temps = new CiValue[] {result.reg == AMD64.rax ? AMD64.rdx.asValue(result.kind) : AMD64.rax.asValue(result.kind)}; + public LIRInstruction create(CiValue result, LIRDebugInfo info, CiValue x, CiValue y) { + CiValue[] inputs = new CiValue[] {x}; + CiValue[] alives = new CiValue[] {y}; + CiValue[] temps = new CiValue[] {asRegister(result) == AMD64.rax ? AMD64.rdx.asValue(result.kind) : AMD64.rax.asValue(result.kind)}; CiValue[] outputs = new CiValue[] {result}; return new AMD64LIRInstruction(this, outputs, info, inputs, alives, temps) { @Override public void emitCode(TargetMethodAssembler tasm, AMD64MacroAssembler masm) { - emit(tasm, masm, asRegister(output(0)), info, asRegister(input(0)), asRegister(alive(0))); + emit(tasm, masm, output(0), info, input(0), alive(0)); } }; } - protected void emit(TargetMethodAssembler tasm, AMD64MacroAssembler masm, CiRegister result, LIRDebugInfo info, CiRegister left, CiRegister right) { + protected void emit(TargetMethodAssembler tasm, AMD64MacroAssembler masm, CiValue result, LIRDebugInfo info, CiValue x, CiValue y) { // left input in rax, right input in any register but rax and rdx, result quotient in rax, result remainder in rdx - assert left == AMD64.rax; - assert right != AMD64.rax && right != AMD64.rdx; - assert (name().endsWith("DIV") && result == AMD64.rax) || (name().endsWith("REM") && result == AMD64.rdx); + assert asRegister(x) == AMD64.rax; + assert differentRegisters(y, AMD64.rax.asValue(), AMD64.rdx.asValue()); + assert (name().endsWith("DIV") && asRegister(result) == AMD64.rax) || (name().endsWith("REM") && asRegister(result) == AMD64.rdx); int exceptionOffset; switch (this) { @@ -62,7 +62,7 @@ case IREM: masm.cdql(); exceptionOffset = masm.codeBuffer.position(); - masm.idivl(right); + masm.idivl(asRegister(y)); break; case LDIV: @@ -74,31 +74,31 @@ masm.movq(AMD64.rdx, java.lang.Long.MIN_VALUE); masm.cmpq(AMD64.rax, AMD64.rdx); masm.jcc(ConditionFlag.notEqual, normalCase); - masm.cmpl(right, -1); + masm.cmpl(asRegister(y), -1); masm.jcc(ConditionFlag.equal, continuation); masm.bind(normalCase); } masm.cdqq(); exceptionOffset = masm.codeBuffer.position(); - masm.idivq(right); + masm.idivq(asRegister(y)); masm.bind(continuation); break; - case UIDIV: - case UIREM: + case IUDIV: + case IUREM: // Must zero the high 64-bit word (in RDX) of the dividend masm.xorq(AMD64.rdx, AMD64.rdx); exceptionOffset = masm.codeBuffer.position(); - masm.divl(right); + masm.divl(asRegister(y)); break; - case ULDIV: - case ULREM: + case LUDIV: + case LUREM: // Must zero the high 64-bit word (in RDX) of the dividend masm.xorq(AMD64.rdx, AMD64.rdx); exceptionOffset = masm.codeBuffer.position(); - masm.divq(right); + masm.divq(asRegister(y)); break; default: diff -r f03c71a0aeb8 -r 504bc518a582 graal/com.oracle.max.graal.compiler/src/com/oracle/max/graal/compiler/target/amd64/AMD64LIRGenerator.java --- a/graal/com.oracle.max.graal.compiler/src/com/oracle/max/graal/compiler/target/amd64/AMD64LIRGenerator.java Tue Jan 10 20:13:56 2012 +0100 +++ b/graal/com.oracle.max.graal.compiler/src/com/oracle/max/graal/compiler/target/amd64/AMD64LIRGenerator.java Tue Jan 10 20:14:08 2012 +0100 @@ -305,11 +305,11 @@ switch(a.kind) { case Int: append(MOVE.create(RAX_I, load(a))); - append(UIDIV.create(RAX_I, state(), RAX_I, load(b))); + append(IUDIV.create(RAX_I, state(), RAX_I, load(b))); return emitMove(RAX_I); case Long: append(MOVE.create(RAX_L, load(a))); - append(ULDIV.create(RAX_L, state(), RAX_L, load(b))); + append(LUDIV.create(RAX_L, state(), RAX_L, load(b))); return emitMove(RAX_L); default: throw Util.shouldNotReachHere(); @@ -321,11 +321,11 @@ switch(a.kind) { case Int: append(MOVE.create(RAX_I, load(a))); - append(UIREM.create(RDX_I, state(), RAX_I, load(b))); + append(IUREM.create(RDX_I, state(), RAX_I, load(b))); return emitMove(RDX_I); case Long: append(MOVE.create(RAX_L, load(a))); - append(ULREM.create(RDX_L, state(), RAX_L, load(b))); + append(LUREM.create(RDX_L, state(), RAX_L, load(b))); return emitMove(RDX_L); default: throw Util.shouldNotReachHere(); @@ -393,8 +393,8 @@ public Variable emitUShr(CiValue a, CiValue b) { Variable result = newVariable(a.kind); switch (a.kind) { - case Int: append(UISHR.create(result, a, loadShiftCount(b))); break; - case Long: append(ULSHR.create(result, a, loadShiftCount(b))); break; + case Int: append(IUSHR.create(result, a, loadShiftCount(b))); break; + case Long: append(LUSHR.create(result, a, loadShiftCount(b))); break; default: Util.shouldNotReachHere(); } return result; diff -r f03c71a0aeb8 -r 504bc518a582 graal/com.oracle.max.graal.compiler/src/com/oracle/max/graal/compiler/target/amd64/AMD64LogicFloatOpcode.java --- a/graal/com.oracle.max.graal.compiler/src/com/oracle/max/graal/compiler/target/amd64/AMD64LogicFloatOpcode.java Tue Jan 10 20:13:56 2012 +0100 +++ b/graal/com.oracle.max.graal.compiler/src/com/oracle/max/graal/compiler/target/amd64/AMD64LogicFloatOpcode.java Tue Jan 10 20:14:08 2012 +0100 @@ -36,20 +36,18 @@ FAND, FOR, FXOR, DAND, DOR, DXOR; - public LIRInstruction create(Variable result, CiValue left, CiValue right) { - assert (name().startsWith("F") && result.kind == CiKind.Float && left.kind == CiKind.Float && right.kind == CiKind.Float) - || (name().startsWith("D") && result.kind == CiKind.Double && left.kind == CiKind.Double && right.kind == CiKind.Double); + public LIRInstruction create(CiValue result, CiValue x, CiValue y) { + assert (name().startsWith("F") && result.kind == CiKind.Float && x.kind == CiKind.Float && y.kind == CiKind.Float) + || (name().startsWith("D") && result.kind == CiKind.Double && x.kind == CiKind.Double && y.kind == CiKind.Double); - CiValue[] inputs = new CiValue[] {left}; - CiValue[] alives = new CiValue[] {right}; + CiValue[] inputs = new CiValue[] {x}; + CiValue[] alives = new CiValue[] {y}; CiValue[] outputs = new CiValue[] {result}; return new AMD64LIRInstruction(this, outputs, null, inputs, alives, LIRInstruction.NO_OPERANDS) { @Override public void emitCode(TargetMethodAssembler tasm, AMD64MacroAssembler masm) { - assert !(alive(0) instanceof CiRegisterValue) || asRegister(output(0)) != asRegister(alive(0)) : "result and right must be different registers"; - AMD64MoveOpcode.move(tasm, masm, output(0), input(0)); - emit(tasm, masm, output(0), alive(0)); + emit(tasm, masm, output(0), input(0), alive(0)); } @Override @@ -66,10 +64,13 @@ }; } - protected void emit(TargetMethodAssembler tasm, AMD64MacroAssembler masm, CiValue leftAndResult, CiValue right) { - CiRegister dst = asRegister(leftAndResult); - if (isRegister(right)) { - CiRegister rreg = asRegister(right); + protected void emit(TargetMethodAssembler tasm, AMD64MacroAssembler masm, CiValue result, CiValue x, CiValue y) { + assert sameRegister(x, y) || differentRegisters(result, y); + AMD64MoveOpcode.move(tasm, masm, result, x); + + CiRegister dst = asRegister(result); + if (isRegister(y)) { + CiRegister rreg = asRegister(y); switch (this) { case FAND: masm.andps(dst, rreg); break; case FOR: masm.orps(dst, rreg); break; @@ -79,18 +80,16 @@ case DXOR: masm.xorpd(dst, rreg); break; default: throw Util.shouldNotReachHere(); } - } else if (isConstant(right)) { + } else { switch (this) { - case FAND: masm.andps(dst, tasm.asFloatConstRef(right, 16)); break; - case FOR: masm.orps(dst, tasm.asFloatConstRef(right, 16)); break; - case FXOR: masm.xorps(dst, tasm.asFloatConstRef(right, 16)); break; - case DAND: masm.andpd(dst, tasm.asDoubleConstRef(right, 16)); break; - case DOR: masm.orpd(dst, tasm.asDoubleConstRef(right, 16)); break; - case DXOR: masm.xorpd(dst, tasm.asDoubleConstRef(right, 16)); break; + case FAND: masm.andps(dst, tasm.asFloatConstRef(y, 16)); break; + case FOR: masm.orps(dst, tasm.asFloatConstRef(y, 16)); break; + case FXOR: masm.xorps(dst, tasm.asFloatConstRef(y, 16)); break; + case DAND: masm.andpd(dst, tasm.asDoubleConstRef(y, 16)); break; + case DOR: masm.orpd(dst, tasm.asDoubleConstRef(y, 16)); break; + case DXOR: masm.xorpd(dst, tasm.asDoubleConstRef(y, 16)); break; default: throw Util.shouldNotReachHere(); } - } else { - throw Util.shouldNotReachHere(); } } } diff -r f03c71a0aeb8 -r 504bc518a582 graal/com.oracle.max.graal.compiler/src/com/oracle/max/graal/compiler/target/amd64/AMD64MulOpcode.java --- a/graal/com.oracle.max.graal.compiler/src/com/oracle/max/graal/compiler/target/amd64/AMD64MulOpcode.java Tue Jan 10 20:13:56 2012 +0100 +++ b/graal/com.oracle.max.graal.compiler/src/com/oracle/max/graal/compiler/target/amd64/AMD64MulOpcode.java Tue Jan 10 20:14:08 2012 +0100 @@ -35,17 +35,15 @@ public enum AMD64MulOpcode implements LIROpcode { IMUL, LMUL; - public LIRInstruction create(Variable result, CiValue left, CiValue right) { - CiValue[] inputs = new CiValue[] {left}; - CiValue[] alives = new CiValue[] {right}; + public LIRInstruction create(CiValue result, CiValue x, CiValue y) { + CiValue[] inputs = new CiValue[] {x}; + CiValue[] alives = new CiValue[] {y}; CiValue[] outputs = new CiValue[] {result}; return new AMD64LIRInstruction(this, outputs, null, inputs, alives, LIRInstruction.NO_OPERANDS) { @Override public void emitCode(TargetMethodAssembler tasm, AMD64MacroAssembler masm) { - assert !(alive(0) instanceof CiRegisterValue) || asRegister(output(0)) != asRegister(alive(0)) : "result and right must be different registers"; - AMD64MoveOpcode.move(tasm, masm, output(0), input(0)); - emit(tasm, masm, output(0), alive(0)); + emit(tasm, masm, output(0), input(0), alive(0)); } @Override @@ -62,22 +60,23 @@ }; } - protected void emit(TargetMethodAssembler tasm, AMD64MacroAssembler masm, CiValue leftAndResult, CiValue right) { - CiRegister dst = asRegister(leftAndResult); - if (isRegister(right)) { + protected void emit(TargetMethodAssembler tasm, AMD64MacroAssembler masm, CiValue result, CiValue x, CiValue y) { + assert sameRegister(x, y) || differentRegisters(result, y); + AMD64MoveOpcode.move(tasm, masm, result, x); + + CiRegister dst = asRegister(result); + if (isRegister(y)) { switch (this) { - case IMUL: masm.imull(dst, asRegister(right)); break; - case LMUL: masm.imulq(dst, asRegister(right)); break; - default: throw Util.shouldNotReachHere(); - } - } else if (isConstant(right)) { - switch (this) { - case IMUL: masm.imull(dst, dst, tasm.asIntConst(right)); break; - case LMUL: masm.imulq(dst, dst, tasm.asIntConst(right)); break; + case IMUL: masm.imull(dst, asRegister(y)); break; + case LMUL: masm.imulq(dst, asRegister(y)); break; default: throw Util.shouldNotReachHere(); } } else { - throw Util.shouldNotReachHere(); + switch (this) { + case IMUL: masm.imull(dst, dst, tasm.asIntConst(y)); break; + case LMUL: masm.imulq(dst, dst, tasm.asIntConst(y)); break; + default: throw Util.shouldNotReachHere(); + } } } } diff -r f03c71a0aeb8 -r 504bc518a582 graal/com.oracle.max.graal.compiler/src/com/oracle/max/graal/compiler/target/amd64/AMD64Op1Opcode.java --- a/graal/com.oracle.max.graal.compiler/src/com/oracle/max/graal/compiler/target/amd64/AMD64Op1Opcode.java Tue Jan 10 20:13:56 2012 +0100 +++ b/graal/com.oracle.max.graal.compiler/src/com/oracle/max/graal/compiler/target/amd64/AMD64Op1Opcode.java Tue Jan 10 20:14:08 2012 +0100 @@ -35,15 +35,14 @@ public enum AMD64Op1Opcode implements LIROpcode { INEG, LNEG; - public LIRInstruction create(Variable result, CiValue input) { - CiValue[] inputs = new CiValue[] {input}; + public LIRInstruction create(CiValue result, CiValue x) { + CiValue[] inputs = new CiValue[] {x}; CiValue[] outputs = new CiValue[] {result}; return new AMD64LIRInstruction(this, outputs, null, inputs, LIRInstruction.NO_OPERANDS, LIRInstruction.NO_OPERANDS) { @Override public void emitCode(TargetMethodAssembler tasm, AMD64MacroAssembler masm) { - AMD64MoveOpcode.move(tasm, masm, output(0), input(0)); - emit(masm, output(0)); + emit(tasm, masm, output(0), input(0)); } @Override @@ -58,10 +57,11 @@ }; } - private void emit(AMD64MacroAssembler masm, CiValue inputAndResult) { + private void emit(TargetMethodAssembler tasm, AMD64MacroAssembler masm, CiValue result, CiValue x) { + AMD64MoveOpcode.move(tasm, masm, result, x); switch (this) { - case INEG: masm.negl(asIntReg(inputAndResult)); break; - case LNEG: masm.negq(asLongReg(inputAndResult)); break; + case INEG: masm.negl(asIntReg(result)); break; + case LNEG: masm.negq(asLongReg(result)); break; default: throw Util.shouldNotReachHere(); } } diff -r f03c71a0aeb8 -r 504bc518a582 graal/com.oracle.max.graal.compiler/src/com/oracle/max/graal/compiler/target/amd64/AMD64ShiftOpcode.java --- a/graal/com.oracle.max.graal.compiler/src/com/oracle/max/graal/compiler/target/amd64/AMD64ShiftOpcode.java Tue Jan 10 20:13:56 2012 +0100 +++ b/graal/com.oracle.max.graal.compiler/src/com/oracle/max/graal/compiler/target/amd64/AMD64ShiftOpcode.java Tue Jan 10 20:14:08 2012 +0100 @@ -33,20 +33,18 @@ import com.oracle.max.graal.compiler.util.*; public enum AMD64ShiftOpcode implements LIROpcode { - ISHL, ISHR, UISHR, - LSHL, LSHR, ULSHR; + ISHL, ISHR, IUSHR, + LSHL, LSHR, LUSHR; - public LIRInstruction create(Variable result, CiValue left, CiValue right) { - CiValue[] inputs = new CiValue[] {left}; - CiValue[] alives = new CiValue[] {right}; + public LIRInstruction create(CiValue result, CiValue x, CiValue y) { + CiValue[] inputs = new CiValue[] {x}; + CiValue[] alives = new CiValue[] {y}; CiValue[] outputs = new CiValue[] {result}; return new AMD64LIRInstruction(this, outputs, null, inputs, alives, LIRInstruction.NO_OPERANDS) { @Override public void emitCode(TargetMethodAssembler tasm, AMD64MacroAssembler masm) { - assert !(alive(0) instanceof CiRegisterValue) || asRegister(output(0)) != asRegister(alive(0)) : "result and right must be different registers"; - AMD64MoveOpcode.move(tasm, masm, output(0), input(0)); - emit(tasm, masm, output(0), alive(0)); + emit(tasm, masm, output(0), input(0), alive(0)); } @Override @@ -63,27 +61,30 @@ }; } - protected void emit(TargetMethodAssembler tasm, AMD64MacroAssembler masm, CiValue leftAndResult, CiValue right) { - CiRegister dst = asRegister(leftAndResult); - if (isRegister(right)) { - assert asRegister(right) == AMD64.rcx; + protected void emit(TargetMethodAssembler tasm, AMD64MacroAssembler masm, CiValue result, CiValue x, CiValue y) { + assert sameRegister(x, y) || differentRegisters(result, y); + AMD64MoveOpcode.move(tasm, masm, result, x); + + CiRegister dst = asRegister(result); + if (isRegister(y)) { + assert asRegister(y) == AMD64.rcx; switch (this) { case ISHL: masm.shll(dst); break; case ISHR: masm.sarl(dst); break; - case UISHR: masm.shrl(dst); break; + case IUSHR: masm.shrl(dst); break; case LSHL: masm.shlq(dst); break; case LSHR: masm.sarq(dst); break; - case ULSHR: masm.shrq(dst); break; + case LUSHR: masm.shrq(dst); break; default: throw Util.shouldNotReachHere(); } - } else if (isConstant(right)) { + } else if (isConstant(y)) { switch (this) { - case ISHL: masm.shll(dst, tasm.asIntConst(right) & 31); break; - case ISHR: masm.sarl(dst, tasm.asIntConst(right) & 31); break; - case UISHR: masm.shrl(dst, tasm.asIntConst(right) & 31); break; - case LSHL: masm.shlq(dst, tasm.asIntConst(right) & 63); break; - case LSHR: masm.sarq(dst, tasm.asIntConst(right) & 63); break; - case ULSHR: masm.shrq(dst, tasm.asIntConst(right) & 63); break; + case ISHL: masm.shll(dst, tasm.asIntConst(y) & 31); break; + case ISHR: masm.sarl(dst, tasm.asIntConst(y) & 31); break; + case IUSHR: masm.shrl(dst, tasm.asIntConst(y) & 31); break; + case LSHL: masm.shlq(dst, tasm.asIntConst(y) & 63); break; + case LSHR: masm.sarq(dst, tasm.asIntConst(y) & 63); break; + case LUSHR: masm.shrq(dst, tasm.asIntConst(y) & 63); break; default: throw Util.shouldNotReachHere(); } } else { diff -r f03c71a0aeb8 -r 504bc518a582 graal/com.oracle.max.graal.compiler/src/com/oracle/max/graal/compiler/target/amd64/AMD64XirOpcode.java --- a/graal/com.oracle.max.graal.compiler/src/com/oracle/max/graal/compiler/target/amd64/AMD64XirOpcode.java Tue Jan 10 20:13:56 2012 +0100 +++ b/graal/com.oracle.max.graal.compiler/src/com/oracle/max/graal/compiler/target/amd64/AMD64XirOpcode.java Tue Jan 10 20:14:08 2012 +0100 @@ -154,7 +154,7 @@ break; case Shr: - emitXirViaLir(tasm, masm, AMD64ShiftOpcode.UISHR, AMD64ShiftOpcode.ULSHR, null, null, operands[inst.x().index], operands[inst.y().index], operands[inst.result.index]); + emitXirViaLir(tasm, masm, AMD64ShiftOpcode.IUSHR, AMD64ShiftOpcode.LUSHR, null, null, operands[inst.x().index], operands[inst.y().index], operands[inst.result.index]); break; case And: @@ -531,13 +531,13 @@ } if (code instanceof AMD64ArithmeticOpcode) { - ((AMD64ArithmeticOpcode) code).emit(tasm, masm, left, right); + ((AMD64ArithmeticOpcode) code).emit(tasm, masm, result, left, right); } else if (code instanceof AMD64MulOpcode) { - ((AMD64MulOpcode) code).emit(tasm, masm, left, right); + ((AMD64MulOpcode) code).emit(tasm, masm, result, left, right); } else if (code instanceof AMD64DivOpcode) { - ((AMD64DivOpcode) code).emit(tasm, masm, asRegister(result), null, asRegister(left), asRegister(right)); + ((AMD64DivOpcode) code).emit(tasm, masm, result, null, left, right); } else if (code instanceof AMD64ShiftOpcode) { - ((AMD64ShiftOpcode) code).emit(tasm, masm, left, right); + ((AMD64ShiftOpcode) code).emit(tasm, masm, result, left, right); } }