# HG changeset patch # User Stefan Anzinger # Date 1425033756 -3600 # Node ID 7d3afd4356a22742ff5d5c38441ba12a883c57f0 # Parent f6a01e64a87a116284f41cf573b814d624cb5073 [SPARC] Remove all object oriented fmt00 instructions (sethi, nop, cbcond) and use simple function calls diff -r f6a01e64a87a -r 7d3afd4356a2 graal/com.oracle.graal.asm.sparc/src/com/oracle/graal/asm/sparc/SPARCAssembler.java --- a/graal/com.oracle.graal.asm.sparc/src/com/oracle/graal/asm/sparc/SPARCAssembler.java Fri Feb 27 11:40:15 2015 +0100 +++ b/graal/com.oracle.graal.asm.sparc/src/com/oracle/graal/asm/sparc/SPARCAssembler.java Fri Feb 27 11:42:36 2015 +0100 @@ -31,6 +31,7 @@ import com.oracle.graal.compiler.common.*; import com.oracle.graal.compiler.common.calc.*; import com.oracle.graal.sparc.*; +import com.oracle.graal.sparc.SPARC.CPUFeature; /** * This class implements an assembler that can encode most SPARC instructions. @@ -65,152 +66,11 @@ protected static final int OP2_SHIFT = 22; protected static final int A_SHIFT = 29; - // @formatter:off - protected static final int A_MASK = 0b0010_0000_0000_0000_0000_0000_0000_0000; - protected static final int OP_MASK = 0b1100_0000_0000_0000_0000_0000_0000_0000; - protected static final int CBCOND_MASK = 0b0001_0000_0000_0000_0000_0000_0000_0000; // Used for distinguish CBcond and BPr instructions - protected static final int OP2_MASK = 0b0000_0001_1100_0000_0000_0000_0000_0000; - - // @formatter:off - /** - * Instruction format for Fmt00 instructions. This abstraction is needed as it - * makes the patching easier later on. - *
-     * | 00  |  ??    | op2 |               ??                        |
-     * |31 30|29    25|24 22|21                                      0|
-     * 
- */ - // @formatter:on - public abstract static class Fmt00 implements AssemblerEmittable { - - private int op2; - - public Fmt00(int op2) { - this.op2 = op2; - } - - public void write(SPARCAssembler masm, int pos) { - verify(); - masm.emitInt(getInstructionBits(), pos); - } - - public Op2s getOp2s() { - return Op2s.byValue(op2); - } - - protected int getInstructionBits() { - return Ops.BranchOp.getValue() << OP_SHIFT | op2 << OP2_SHIFT; - } - - public void verify() { - assert ((op2 << OP2_SHIFT) & OP2_MASK) == (op2 << OP2_SHIFT) : Integer.toHexString(op2); - assert Op2s.byValue(op2) != null : op2; - } - - /** - * Sets the immediate (displacement) value on this instruction. - * - * @see SPARCAssembler#patchJumpTarget(int, int) - * @param imm Displacement/imediate value. Can either be a 22 or 19 bit immediate (dependent - * on the instruction) - */ - public abstract void setImm(int imm); - - public abstract void emit(SPARCAssembler masm); - - public boolean hasDelaySlot() { - return true; - } - - public int getA() { - throw GraalInternalError.shouldNotReachHere(); - } - - public void setA(@SuppressWarnings("unused") int a) { - throw GraalInternalError.shouldNotReachHere(); - } - } - - // @formatter:off - /** - * Instruction format for sethi. - *
-     * | 00  |  rd    | op2 |               imm22                     |
-     * |31 30|29    25|24 22|21                                      0|
-     * 
- */ - // @formatter:on - public static class Fmt00a extends Fmt00 implements AssemblerEmittable { - - private static final int RD_SHIFT = 25; - private static final int IMM22_SHIFT = 0; - - // @formatter:off - private static final int RD_MASK = 0b00111110000000000000000000000000; - private static final int IMM22_MASK = 0b00000000001111111111111111111111; - // @formatter:on - - private int rd; - private int imm22; - - private Fmt00a(int rd, int op2, int imm22) { - super(op2); - this.rd = rd; - this.imm22 = imm22; - verify(); - } - - public Fmt00a(Op2s op2, int imm22, Register rd) { - this(rd.encoding(), op2.getValue(), imm22); - } - - @Override - protected int getInstructionBits() { - return super.getInstructionBits() | rd << RD_SHIFT | (imm22 & IMM22_MASK) << IMM22_SHIFT; - } - - public static Fmt00a read(SPARCAssembler masm, int pos) { - final int inst = masm.getInt(pos); - - // Make sure it's the right instruction: - final int op = (inst & OP_MASK) >> OP_SHIFT; - assert op == Ops.BranchOp.getValue(); - - // Get the instruction fields: - final int rd = (inst & RD_MASK) >> RD_SHIFT; - final int op2 = (inst & OP2_MASK) >> OP2_SHIFT; - final int imm22 = (inst & IMM22_MASK) >> IMM22_SHIFT; - - return new Fmt00a(op2, imm22, rd); - } - - @Override - public void emit(SPARCAssembler masm) { - verify(); - masm.emitInt(getInstructionBits()); - } - - @Override - public void verify() { - super.verify(); - assert ((rd << RD_SHIFT) & RD_MASK) == (rd << RD_SHIFT); - assert ((imm22 << IMM22_SHIFT) & IMM22_MASK) == (imm22 << IMM22_SHIFT) : String.format("imm22: %d (%x)", imm22, imm22); - } - - @Override - public void setImm(int imm) { - setImm22(imm); - } - - public void setImm22(int imm22) { - this.imm22 = imm22; - } - - @Override - public boolean hasDelaySlot() { - return false; - } - } + protected static final int A_MASK = 0b0010_0000_0000_0000_0000_0000_0000_0000; + protected static final int OP_MASK = 0b1100_0000_0000_0000_0000_0000_0000_0000; + protected static final int CBCOND_MASK = 0b0001_0000_0000_0000_0000_0000_0000_0000; // Used for + // distinguish CBcond and BPr instructions + protected static final int OP2_MASK = 0b0000_0001_1100_0000_0000_0000_0000_0000; protected static final int DISP22_SHIFT = 0; protected static final int DISP22_MASK = 0b00000000001111111111111111111111; @@ -223,159 +83,10 @@ protected static final int D16LO_SHIFT = 0; protected static final int D16LO_MASK = 0b0000_0000_0000_0000_0011_1111_1111_1111; - // @formatter:off - /** - * Instruction format CBcond. - *
-     * |00   |chi|1 | clo | 011 |cc2|d10hi|rs1  |i |d10lo|rs2/simm5|
-     * |31 30|29 |28|27 25|24 22|21 |20 19|18 14|13|12  5|4       0|
-     * 
- */ - // @formatter:on - public static class Fmt00e extends Fmt00 { - protected static final int CHI_SHIFT = 29; - protected static final int CLO_SHIFT = 25; - protected static final int CC2_SHIFT = 21; - protected static final int D10HI_SHIFT = 19; - protected static final int RS1_SHIFT = 14; - protected static final int I_SHIFT = 13; - protected static final int D10LO_SHIFT = 5; - protected static final int RS2_SHIFT = 0; - - // @formatter:off - protected static final int CHI_MASK = 0b0010_0000_0000_0000_0000_0000_0000_0000; - protected static final int CLO_MASK = 0b0000_1110_0000_0000_0000_0000_0000_0000; - protected static final int CC2_MASK = 0b0000_0000_0010_0000_0000_0000_0000_0000; - protected static final int D10HI_MASK = 0b0000_0000_0001_1000_0000_0000_0000_0000; - protected static final int RS1_MASK = 0b0000_0000_0000_0111_1100_0000_0000_0000; - protected static final int I_MASK = 0b0000_0000_0000_0000_0010_0000_0000_0000; - protected static final int D10LO_MASK = 0b0000_0000_0000_0000_0001_1111_1110_0000; - protected static final int RS2_MASK = 0b0000_0000_0000_0000_0000_0000_0001_1111; - // @formatter:on - - private int c; - private int cc2; - private int disp10; - private int rs1; - private int i; - private int regOrImmediate; - private Label label; - - public Fmt00e(int c, int cc2, int rs1, int disp10, int i, int regOrImmediate, Label label) { - super(Op2s.Bpr.getValue()); - this.c = c; - this.cc2 = cc2; - this.rs1 = rs1; - setDisp10(disp10); - this.i = i; - this.regOrImmediate = regOrImmediate; - this.label = label; - } - - @Override - public void setImm(int imm) { - setDisp10(imm); - } - - public void setDisp10(int disp10) { - this.disp10 = disp10 >> 2; - if (!isSimm10(this.disp10)) { - throw GraalInternalError.shouldNotReachHere("" + this.disp10); - } - assert isSimm10(this.disp10) : this.disp10; - } - - @Override - public void emit(SPARCAssembler masm) { - assert masm.hasFeature(CPUFeature.CBCOND); - if (label != null) { - if (label.isBound()) { - final int disp = label.position() - masm.position(); - setDisp10(disp); - } else { - patchUnbound(masm, label); - setDisp10(0); - } - } - verify(); - masm.emitInt(getInstructionBits()); - } - - private static int patchUnbound(SPARCAssembler masm, Label label) { - label.addPatchAt(masm.position()); - return 0; - } - - @Override - protected int getInstructionBits() { - int cSplit = 0; - cSplit |= (c & 0b1000) << CHI_SHIFT - 3; - cSplit |= (c & 0b0111) << CLO_SHIFT; - int d10Split = 0; - d10Split |= (disp10 & 0b11_0000_0000) << D10HI_SHIFT - 8; - d10Split |= (disp10 & 0b00_1111_1111) << D10LO_SHIFT; - int bits = super.getInstructionBits() | 1 << 28 | cSplit | cc2 << CC2_SHIFT | d10Split | rs1 << RS1_SHIFT | i << I_SHIFT | (regOrImmediate & 0b1_1111) << RS2_SHIFT; - int hibits = (bits & 0xFF000000); - if (hibits == 0xFF000000 || hibits == 0) { - throw GraalInternalError.shouldNotReachHere(); - } - return bits; - } - - public static Fmt00e read(SPARCAssembler masm, int pos) { - assert masm.hasFeature(CPUFeature.CBCOND); - final int inst = masm.getInt(pos); - - // Make sure it's the right instruction: - final int op = (inst & OP_MASK) >> OP_SHIFT; - final int op2 = (inst & OP2_MASK) >> OP2_SHIFT; - final int condFlag = (inst & CBCOND_MASK) >> CBCOND_SHIFT; - assert op2 == Op2s.Bpr.getValue() && op == Ops.BranchOp.getValue() && condFlag == 1 : "0x" + Integer.toHexString(inst); - - // @formatter:off - // Get the instruction fields: - final int chi = (inst & CHI_MASK) >> CHI_SHIFT; - final int clo = (inst & CLO_MASK) >> CLO_SHIFT; - final int cc2 = (inst & CC2_MASK) >> CC2_SHIFT; - final int d10hi = (inst & D10HI_MASK) >> D10HI_SHIFT; - final int rs1 = (inst & RS1_MASK) >> RS1_SHIFT; - final int i = (inst & I_MASK) >> I_SHIFT; - final int d10lo = (inst & D10LO_MASK) >> D10LO_SHIFT; - int regOrImmediate = (inst & RS2_MASK) >> RS2_SHIFT; - // @formatter:on - if (i == 1) { // if immediate, we do sign extend - int shiftcnt = 31 - 4; - regOrImmediate = (regOrImmediate << shiftcnt) >> shiftcnt; - } - int c = chi << 3 | clo; - - assert (d10lo & ~((1 << 8) - 1)) == 0; - final int d10 = ((short) (((d10hi << 8) | d10lo) << 6)) >> 4; // Times 4 and sign extend - Fmt00e fmt = new Fmt00e(c, cc2, rs1, d10, i, regOrImmediate, null); - fmt.verify(); - return fmt; - } - - @Override - public void verify() { - super.verify(); - assert (c & ~0b1111) == 0 : c; - assert (cc2 & ~1) == 0 : cc2; - assert isSimm(disp10, 10) : disp10; - assert (rs1 & ~0b1_1111) == 0 : rs1; - assert (i & ~1) == 0 : i; - if (i == 1) { - assert isSimm(regOrImmediate, 5) : regOrImmediate; - } else { - assert (regOrImmediate & ~0b1_1111) == 0 : regOrImmediate; - } - } - - @Override - public boolean hasDelaySlot() { - return false; - } - } + protected static final int D10LO_MASK = 0b0000_0000_0000_0000_0001_1111_1110_0000; + protected static final int D10HI_MASK = 0b0000_0000_0001_1000_0000_0000_0000_0000; + protected static final int D10LO_SHIFT = 5; + protected static final int D10HI_SHIFT = 19; // @formatter:off /** @@ -2410,24 +2121,35 @@ } } - public static class CBcondw extends Fmt00e { - public CBcondw(ConditionFlag flag, Register src1, Register src2, Label label) { - super(flag.getValue(), 0, src1.encoding(), -1, 0, src2.encoding(), label); - } - - public CBcondw(ConditionFlag flag, Register src1, int simm5, Label label) { - super(flag.getValue(), 0, src1.encoding(), -1, 1, simm5, label); - } + public void cbcondw(ConditionFlag cf, Register rs1, Register rs2, Label lab) { + cbcond(0, 0, cf, rs1, rs2.encoding, lab); + } + + public void cbcondw(ConditionFlag cf, Register rs1, int rs2, Label lab) { + assert isSimm(rs2, 5); + cbcond(0, 1, cf, rs1, rs2 & ((1 << 5) - 1), lab); + } + + public void cbcondx(ConditionFlag cf, Register rs1, Register rs2, Label lab) { + cbcond(1, 0, cf, rs1, rs2.encoding, lab); } - public static class CBcondx extends Fmt00e { - public CBcondx(ConditionFlag flag, Register src1, Register src2, Label label) { - super(flag.getValue(), 1, src1.encoding(), -1, 0, src2.encoding(), label); - } - - public CBcondx(ConditionFlag flag, Register src1, int simm5, Label label) { - super(flag.getValue(), 1, src1.encoding(), -1, 1, simm5, label); - } + public void cbcondx(ConditionFlag cf, Register rs1, int rs2, Label lab) { + assert isSimm(rs2, 5); + cbcond(1, 1, cf, rs1, rs2 & ((1 << 5) - 1), lab); + } + + private void cbcond(int cc2, int i, ConditionFlag cf, Register rs1, int rs2, Label l) { + int d10 = !l.isBound() ? patchUnbound(l) : (l.position() - position()) / 4; + assert isSimm(d10, 10) && isImm(rs2, 5); + d10 &= (1 << 10) - 1; + final int c_lo = cf.value & 0b111; + final int c_hi = cf.value >> 3; + final int d10_lo = d10 & ((1 << 8) - 1); + final int d10_hi = d10 >> 8; + int a = c_hi << 4 | 0b1000 | c_lo; + int b = cc2 << 21 | d10_hi << D10HI_SHIFT | rs1.encoding << 14 | i << 13 | d10_lo << D10LO_SHIFT | rs2; + fmt00(a, Op2s.Bpr.value, b); } public static class Edge8cc extends Fmt3p { @@ -3182,11 +2904,8 @@ } } - public static class Illtrap extends Fmt00a { - - public Illtrap(int const22) { - super(Op2s.Illtrap, const22, g0); - } + public void illtrap(int const22) { + fmt00(0, Op2s.Illtrap.value, const22); } public static class Jmpl extends Fmt10 { @@ -3582,11 +3301,8 @@ } } - public static class Sethi extends Fmt00a { - - public Sethi(int imm22, Register dst) { - super(Op2s.Sethi, imm22, dst); - } + public void sethi(int imm22, Register dst) { + fmt00(dst.encoding, Op2s.Sethi.value, imm22); } public static class Sir extends Fmt10 { diff -r f6a01e64a87a -r 7d3afd4356a2 graal/com.oracle.graal.asm.sparc/src/com/oracle/graal/asm/sparc/SPARCMacroAssembler.java --- a/graal/com.oracle.graal.asm.sparc/src/com/oracle/graal/asm/sparc/SPARCMacroAssembler.java Fri Feb 27 11:40:15 2015 +0100 +++ b/graal/com.oracle.graal.asm.sparc/src/com/oracle/graal/asm/sparc/SPARCMacroAssembler.java Fri Feb 27 11:42:36 2015 +0100 @@ -26,6 +26,8 @@ import static com.oracle.graal.asm.sparc.SPARCAssembler.ConditionFlag.*; import static com.oracle.graal.sparc.SPARC.*; +import java.util.function.*; + import com.oracle.graal.api.code.*; import com.oracle.graal.asm.*; import com.oracle.graal.compiler.common.*; @@ -45,14 +47,14 @@ @Override public void align(int modulus) { while (position() % modulus != 0) { - new Nop().emit(this); + nop(); } } @Override public void jmp(Label l) { bicc(Always, NOT_ANNUL, l); - new Nop().emit(this); // delay slot + nop(); // delay slot } @Override @@ -84,10 +86,10 @@ if (isCBcond) { assert isSimm10(disp); int d10Split = 0; - d10Split |= (disp & 0b11_0000_0000) << Fmt00e.D10HI_SHIFT - 8; - d10Split |= (disp & 0b00_1111_1111) << Fmt00e.D10LO_SHIFT; + d10Split |= (disp & 0b11_0000_0000) << D10HI_SHIFT - 8; + d10Split |= (disp & 0b00_1111_1111) << D10LO_SHIFT; setBits = d10Split; - maskBits = Fmt00e.D10LO_MASK | Fmt00e.D10HI_MASK; + maskBits = D10LO_MASK | D10HI_MASK; } else { assert isSimm(disp, 16); int d16Split = 0; @@ -117,7 +119,7 @@ @Override public final void ensureUniquePC() { - new Nop().emit(this); + nop(); } public static class Bclr extends Andn { @@ -298,13 +300,6 @@ } } - public static class Nop extends Sethi { - - public Nop() { - super(0, r0); - } - } - public static class Not extends Xnor { public Not(Register src1, Register dst) { @@ -353,9 +348,9 @@ } else if (isSimm13(value)) { new Or(g0, value, dst).emit(masm); } else if (value >= 0 && ((value & 0x3FFF) == 0)) { - new Sethi(hi22(value), dst).emit(masm); + masm.sethi(hi22(value), dst); } else { - new Sethi(hi22(value), dst).emit(masm); + masm.sethi(hi22(value), dst); new Or(dst, lo10(value), dst).emit(masm); } } @@ -372,7 +367,7 @@ private Register dst; private boolean forceRelocatable; private boolean delayed = false; - private AssemblerEmittable delayedInstruction; + private Consumer delayedInstructionEmitter; public Sethix(long value, Register dst, boolean forceRelocatable, boolean delayed) { this(value, dst, forceRelocatable); @@ -390,32 +385,41 @@ this(value, dst, false); } - private void emitInstruction(AssemblerEmittable insn, SPARCMacroAssembler masm) { + private void emitInstruction(Consumer cb, SPARCMacroAssembler masm) { if (delayed) { - if (this.delayedInstruction != null) { - delayedInstruction.emit(masm); + if (this.delayedInstructionEmitter != null) { + delayedInstructionEmitter.accept(masm); } - delayedInstruction = insn; + delayedInstructionEmitter = cb; } else { - insn.emit(masm); + cb.accept(masm); } + + } + + private void emitInstruction(final AssemblerEmittable insn, SPARCMacroAssembler masm) { + Consumer cb = eMasm -> insn.emit(eMasm); + emitInstruction(cb, masm); } public void emit(SPARCMacroAssembler masm) { - int hi = (int) (value >> 32); - int lo = (int) (value & ~0); + final int hi = (int) (value >> 32); + final int lo = (int) (value & ~0); // This is the same logic as MacroAssembler::internal_set. final int startPc = masm.position(); if (hi == 0 && lo >= 0) { - emitInstruction(new Sethi(hi22(lo), dst), masm); + Consumer cb = eMasm -> eMasm.sethi(hi22(lo), dst); + emitInstruction(cb, masm); } else if (hi == -1) { - emitInstruction(new Sethi(hi22(~lo), dst), masm); + Consumer cb = eMasm -> eMasm.sethi(hi22(~lo), dst); + emitInstruction(cb, masm); emitInstruction(new Xor(dst, ~lo10(~0), dst), masm); } else { int shiftcnt = 0; - emitInstruction(new Sethi(hi22(hi), dst), masm); + Consumer cb = eMasm -> eMasm.sethi(hi22(hi), dst); + emitInstruction(cb, masm); if ((hi & 0x3ff) != 0) { // Any bits? // msb 32-bits are now in lsb 32 emitInstruction(new Or(dst, hi & 0x3ff, dst), masm); @@ -448,14 +452,15 @@ // Pad out the instruction sequence so it can be patched later. if (forceRelocatable) { while (masm.position() < (startPc + (INSTRUCTION_SIZE * 4))) { - emitInstruction(new Nop(), masm); + Consumer cb = eMasm -> eMasm.nop(); + emitInstruction(cb, masm); } } } public void emitDelayed(SPARCMacroAssembler masm) { - assert delayedInstruction != null; - delayedInstruction.emit(masm); + assert delayedInstructionEmitter != null; + delayedInstructionEmitter.accept(masm); } } diff -r f6a01e64a87a -r 7d3afd4356a2 graal/com.oracle.graal.hotspot.sparc/src/com/oracle/graal/hotspot/sparc/SPARCHotSpotBackend.java --- a/graal/com.oracle.graal.hotspot.sparc/src/com/oracle/graal/hotspot/sparc/SPARCHotSpotBackend.java Fri Feb 27 11:40:15 2015 +0100 +++ b/graal/com.oracle.graal.hotspot.sparc/src/com/oracle/graal/hotspot/sparc/SPARCHotSpotBackend.java Fri Feb 27 11:42:36 2015 +0100 @@ -38,9 +38,10 @@ import com.oracle.graal.api.meta.*; import com.oracle.graal.asm.*; import com.oracle.graal.asm.sparc.*; -import com.oracle.graal.asm.sparc.SPARCAssembler.*; +import com.oracle.graal.asm.sparc.SPARCAssembler.Ldx; +import com.oracle.graal.asm.sparc.SPARCAssembler.Save; +import com.oracle.graal.asm.sparc.SPARCAssembler.Stx; import com.oracle.graal.asm.sparc.SPARCMacroAssembler.Cmp; -import com.oracle.graal.asm.sparc.SPARCMacroAssembler.Nop; import com.oracle.graal.asm.sparc.SPARCMacroAssembler.RestoreWindow; import com.oracle.graal.asm.sparc.SPARCMacroAssembler.Setx; import com.oracle.graal.compiler.common.cfg.*; @@ -240,7 +241,7 @@ new Cmp(scratch, inlineCacheKlass).emit(masm); } masm.bpcc(NotEqual, NOT_ANNUL, unverifiedStub, Xcc, PREDICT_NOT_TAKEN); - new Nop().emit(masm); // delay slot + masm.nop(); // delay slot } masm.align(config.codeEntryAlignment); diff -r f6a01e64a87a -r 7d3afd4356a2 graal/com.oracle.graal.hotspot.sparc/src/com/oracle/graal/hotspot/sparc/SPARCHotSpotJumpToExceptionHandlerInCallerOp.java --- a/graal/com.oracle.graal.hotspot.sparc/src/com/oracle/graal/hotspot/sparc/SPARCHotSpotJumpToExceptionHandlerInCallerOp.java Fri Feb 27 11:40:15 2015 +0100 +++ b/graal/com.oracle.graal.hotspot.sparc/src/com/oracle/graal/hotspot/sparc/SPARCHotSpotJumpToExceptionHandlerInCallerOp.java Fri Feb 27 11:42:36 2015 +0100 @@ -35,7 +35,6 @@ import com.oracle.graal.asm.sparc.SPARCAssembler.Lduw; import com.oracle.graal.asm.sparc.SPARCAssembler.Movcc; import com.oracle.graal.asm.sparc.SPARCMacroAssembler.Cmp; -import com.oracle.graal.asm.sparc.SPARCMacroAssembler.Nop; import com.oracle.graal.lir.*; import com.oracle.graal.lir.asm.*; import com.oracle.graal.sparc.*; @@ -79,6 +78,6 @@ } new Jmpl(asRegister(handlerInCallerPc), 0, g0).emit(masm); - new Nop().emit(masm); + masm.nop(); } } diff -r f6a01e64a87a -r 7d3afd4356a2 graal/com.oracle.graal.lir.sparc/src/com/oracle/graal/lir/sparc/SPARCArithmetic.java --- a/graal/com.oracle.graal.lir.sparc/src/com/oracle/graal/lir/sparc/SPARCArithmetic.java Fri Feb 27 11:40:15 2015 +0100 +++ b/graal/com.oracle.graal.lir.sparc/src/com/oracle/graal/lir/sparc/SPARCArithmetic.java Fri Feb 27 11:42:36 2015 +0100 @@ -30,17 +30,65 @@ import static com.oracle.graal.asm.sparc.SPARCAssembler.ConditionFlag.*; import static com.oracle.graal.lir.LIRInstruction.OperandFlag.*; import static com.oracle.graal.sparc.SPARC.*; +import static com.oracle.graal.sparc.SPARC.CPUFeature.*; import com.oracle.graal.api.code.*; import com.oracle.graal.api.meta.*; import com.oracle.graal.asm.*; import com.oracle.graal.asm.sparc.*; -import com.oracle.graal.asm.sparc.SPARCMacroAssembler.*; +import com.oracle.graal.asm.sparc.SPARCAssembler.Add; +import com.oracle.graal.asm.sparc.SPARCAssembler.Addcc; +import com.oracle.graal.asm.sparc.SPARCAssembler.And; +import com.oracle.graal.asm.sparc.SPARCAssembler.CC; +import com.oracle.graal.asm.sparc.SPARCAssembler.Faddd; +import com.oracle.graal.asm.sparc.SPARCAssembler.Fadds; +import com.oracle.graal.asm.sparc.SPARCAssembler.Fandd; +import com.oracle.graal.asm.sparc.SPARCAssembler.Fcmp; +import com.oracle.graal.asm.sparc.SPARCAssembler.Fdivd; +import com.oracle.graal.asm.sparc.SPARCAssembler.Fdivs; +import com.oracle.graal.asm.sparc.SPARCAssembler.Fdtoi; +import com.oracle.graal.asm.sparc.SPARCAssembler.Fdtos; +import com.oracle.graal.asm.sparc.SPARCAssembler.Fdtox; +import com.oracle.graal.asm.sparc.SPARCAssembler.Fitod; +import com.oracle.graal.asm.sparc.SPARCAssembler.Fitos; +import com.oracle.graal.asm.sparc.SPARCAssembler.Fmuld; +import com.oracle.graal.asm.sparc.SPARCAssembler.Fmuls; +import com.oracle.graal.asm.sparc.SPARCAssembler.Fnegd; +import com.oracle.graal.asm.sparc.SPARCAssembler.Fnegs; +import com.oracle.graal.asm.sparc.SPARCAssembler.Fsmuld; +import com.oracle.graal.asm.sparc.SPARCAssembler.Fstod; +import com.oracle.graal.asm.sparc.SPARCAssembler.Fstoi; +import com.oracle.graal.asm.sparc.SPARCAssembler.Fstox; +import com.oracle.graal.asm.sparc.SPARCAssembler.Fsubd; +import com.oracle.graal.asm.sparc.SPARCAssembler.Fsubs; +import com.oracle.graal.asm.sparc.SPARCAssembler.Fxtod; +import com.oracle.graal.asm.sparc.SPARCAssembler.Fxtos; +import com.oracle.graal.asm.sparc.SPARCAssembler.Mulx; +import com.oracle.graal.asm.sparc.SPARCAssembler.Opfs; +import com.oracle.graal.asm.sparc.SPARCAssembler.Or; +import com.oracle.graal.asm.sparc.SPARCAssembler.Sdivx; +import com.oracle.graal.asm.sparc.SPARCAssembler.Sll; +import com.oracle.graal.asm.sparc.SPARCAssembler.Sllx; +import com.oracle.graal.asm.sparc.SPARCAssembler.Sra; +import com.oracle.graal.asm.sparc.SPARCAssembler.Srax; +import com.oracle.graal.asm.sparc.SPARCAssembler.Srl; +import com.oracle.graal.asm.sparc.SPARCAssembler.Srlx; +import com.oracle.graal.asm.sparc.SPARCAssembler.Sub; +import com.oracle.graal.asm.sparc.SPARCAssembler.Subcc; +import com.oracle.graal.asm.sparc.SPARCAssembler.Udivx; +import com.oracle.graal.asm.sparc.SPARCAssembler.Umulxhi; +import com.oracle.graal.asm.sparc.SPARCAssembler.Wrccr; +import com.oracle.graal.asm.sparc.SPARCAssembler.Xor; +import com.oracle.graal.asm.sparc.SPARCAssembler.Xorcc; +import com.oracle.graal.asm.sparc.SPARCMacroAssembler.Cmp; +import com.oracle.graal.asm.sparc.SPARCMacroAssembler.Neg; +import com.oracle.graal.asm.sparc.SPARCMacroAssembler.Not; +import com.oracle.graal.asm.sparc.SPARCMacroAssembler.Setx; +import com.oracle.graal.asm.sparc.SPARCMacroAssembler.Signx; import com.oracle.graal.compiler.common.*; import com.oracle.graal.lir.*; import com.oracle.graal.lir.asm.*; import com.oracle.graal.lir.gen.*; -import com.oracle.graal.sparc.SPARC.CPUFeature; import com.oracle.graal.sparc.*; public enum SPARCArithmetic { @@ -222,7 +270,7 @@ new Srax(asLongReg(result), 63, asLongReg(scratch2)).emit(masm); new Cmp(asLongReg(scratch1), asLongReg(scratch2)).emit(masm); masm.bpcc(Equal, NOT_ANNUL, noOverflow, Xcc, PREDICT_TAKEN); - new Nop().emit(masm); + masm.nop(); new Wrccr(g0, 1 << (CCR_XCC_SHIFT + CCR_V_SHIFT)).emit(masm); masm.bind(noOverflow); } @@ -366,14 +414,14 @@ Label noOverflow = new Label(); new Sra(asIntReg(dst), 0, tmp).emit(masm); new Xorcc(SPARC.g0, SPARC.g0, SPARC.g0).emit(masm); - if (masm.hasFeature(CPUFeature.CBCOND)) { - new CBcondx(ConditionFlag.Equal, tmp, asIntReg(dst), noOverflow).emit(masm); + if (masm.hasFeature(CBCOND)) { + masm.cbcondx(Equal, tmp, asIntReg(dst), noOverflow); // Is necessary, otherwise we will have a penalty of 5 cycles in S3 - new Nop().emit(masm); + masm.nop(); } else { new Cmp(tmp, asIntReg(dst)).emit(masm); masm.bpcc(Equal, NOT_ANNUL, noOverflow, Xcc, PREDICT_TAKEN); - new Nop().emit(masm); + masm.nop(); } new Wrccr(SPARC.g0, 1 << (SPARCAssembler.CCR_ICC_SHIFT + SPARCAssembler.CCR_V_SHIFT)).emit(masm); masm.bind(noOverflow); diff -r f6a01e64a87a -r 7d3afd4356a2 graal/com.oracle.graal.lir.sparc/src/com/oracle/graal/lir/sparc/SPARCArrayEqualsOp.java --- a/graal/com.oracle.graal.lir.sparc/src/com/oracle/graal/lir/sparc/SPARCArrayEqualsOp.java Fri Feb 27 11:40:15 2015 +0100 +++ b/graal/com.oracle.graal.lir.sparc/src/com/oracle/graal/lir/sparc/SPARCArrayEqualsOp.java Fri Feb 27 11:42:36 2015 +0100 @@ -26,6 +26,7 @@ import static com.oracle.graal.compiler.common.UnsafeAccess.*; import static com.oracle.graal.lir.LIRInstruction.OperandFlag.*; import static com.oracle.graal.sparc.SPARC.*; +import static com.oracle.graal.sparc.SPARC.CPUFeature.*; import static com.oracle.graal.asm.sparc.SPARCAssembler.*; import static com.oracle.graal.asm.sparc.SPARCAssembler.Annul.*; import static com.oracle.graal.asm.sparc.SPARCAssembler.BranchPredict.*; @@ -41,7 +42,6 @@ import com.oracle.graal.asm.sparc.*; import com.oracle.graal.asm.sparc.SPARCMacroAssembler.Cmp; import com.oracle.graal.asm.sparc.SPARCMacroAssembler.Mov; -import com.oracle.graal.asm.sparc.SPARCMacroAssembler.Nop; import com.oracle.graal.lir.*; import com.oracle.graal.lir.asm.*; import com.oracle.graal.lir.gen.*; @@ -112,7 +112,7 @@ masm.bind(trueLabel); new Mov(1, result).emit(masm); masm.bicc(Always, ANNUL, done); - new Nop().emit(masm); + masm.nop(); // Return false masm.bind(falseLabel); @@ -153,16 +153,16 @@ new Ldx(new SPARCAddress(array1, 0), tempReg1).emit(masm); new Ldx(new SPARCAddress(array2, 0), tempReg2).emit(masm); if (hasCBcond) { - new CBcondx(ConditionFlag.NotEqual, tempReg1, tempReg2, falseLabel).emit(masm); - new Nop().emit(masm); // for optimal performance (see manual) - new CBcondx(ConditionFlag.Equal, length, 0, compareTailCorrectVectorEnd).emit(masm); - new Nop().emit(masm); // for optimal performance (see manual) + masm.cbcondx(NotEqual, tempReg1, tempReg2, falseLabel); + masm.nop(); // for optimal performance (see manual) + masm.cbcondx(Equal, length, 0, compareTailCorrectVectorEnd); + masm.nop(); // for optimal performance (see manual) } else { new Cmp(tempReg1, tempReg2).emit(masm); masm.bpcc(NotEqual, NOT_ANNUL, falseLabel, Xcc, PREDICT_NOT_TAKEN); - new Nop().emit(masm); + masm.nop(); masm.bpr(Rc_z, NOT_ANNUL, compareTailCorrectVectorEnd, PREDICT_NOT_TAKEN, length); - new Nop().emit(masm); + masm.nop(); } // Load the first value from array 1 (Later done in back branch delay-slot) @@ -179,10 +179,10 @@ // Tail count zero, therefore we can go to the end if (hasCBcond) { - new CBcondx(ConditionFlag.Equal, result, 0, trueLabel).emit(masm); + masm.cbcondx(Equal, result, 0, trueLabel); } else { masm.bpr(Rc_z, NOT_ANNUL, trueLabel, PREDICT_TAKEN, result); - new Nop().emit(masm); + masm.nop(); } masm.bind(compareTailCorrectVectorEnd); @@ -202,27 +202,27 @@ Register tempReg1 = asRegister(temp3); Register tempReg2 = asRegister(temp4); - boolean hasCBcond = masm.hasFeature(CPUFeature.CBCOND); + boolean hasCBcond = masm.hasFeature(CBCOND); if (kind.getByteCount() <= 4) { // Compare trailing 4 bytes, if any. if (hasCBcond) { - new CBcondx(ConditionFlag.Less, result, 4, compare2Bytes).emit(masm); + masm.cbcondx(Less, result, 4, compare2Bytes); } else { new Cmp(result, 4).emit(masm); masm.bpcc(Less, NOT_ANNUL, compare2Bytes, Xcc, PREDICT_NOT_TAKEN); - new Nop().emit(masm); + masm.nop(); } new Lduw(new SPARCAddress(array1, 0), tempReg1).emit(masm); new Lduw(new SPARCAddress(array2, 0), tempReg2).emit(masm); if (hasCBcond) { - new CBcondx(ConditionFlag.NotEqual, tempReg1, tempReg2, falseLabel).emit(masm); + masm.cbcondx(NotEqual, tempReg1, tempReg2, falseLabel); } else { new Cmp(tempReg1, tempReg2).emit(masm); masm.bpcc(NotEqual, NOT_ANNUL, falseLabel, Xcc, PREDICT_NOT_TAKEN); - new Nop().emit(masm); + masm.nop(); } if (kind.getByteCount() <= 2) { @@ -235,22 +235,22 @@ masm.bind(compare2Bytes); if (hasCBcond) { - new CBcondx(ConditionFlag.Less, result, 2, compare1Byte).emit(masm); + masm.cbcondx(Less, result, 2, compare1Byte); } else { new Cmp(result, 2).emit(masm); masm.bpcc(Less, NOT_ANNUL, compare1Byte, Xcc, PREDICT_TAKEN); - new Nop().emit(masm); + masm.nop(); } new Lduh(new SPARCAddress(array1, 0), tempReg1).emit(masm); new Lduh(new SPARCAddress(array2, 0), tempReg2).emit(masm); if (hasCBcond) { - new CBcondx(ConditionFlag.NotEqual, tempReg1, tempReg2, falseLabel).emit(masm); + masm.cbcondx(NotEqual, tempReg1, tempReg2, falseLabel); } else { new Cmp(tempReg1, tempReg2).emit(masm); masm.bpcc(NotEqual, NOT_ANNUL, falseLabel, Xcc, PREDICT_TAKEN); - new Nop().emit(masm); + masm.nop(); } // The one-byte tail compare is only required for boolean and byte arrays. @@ -263,20 +263,20 @@ // Compare trailing byte, if any. masm.bind(compare1Byte); if (hasCBcond) { - new CBcondx(ConditionFlag.NotEqual, result, 1, trueLabel).emit(masm); + masm.cbcondx(NotEqual, result, 1, trueLabel); } else { new Cmp(result, 1).emit(masm); masm.bpcc(NotEqual, NOT_ANNUL, trueLabel, Xcc, PREDICT_TAKEN); - new Nop().emit(masm); + masm.nop(); } new Ldub(new SPARCAddress(array1, 0), tempReg1).emit(masm); new Ldub(new SPARCAddress(array2, 0), tempReg2).emit(masm); if (hasCBcond) { - new CBcondx(ConditionFlag.NotEqual, tempReg1, tempReg2, falseLabel).emit(masm); + masm.cbcondx(NotEqual, tempReg1, tempReg2, falseLabel); } else { new Cmp(tempReg1, tempReg2).emit(masm); masm.bpcc(NotEqual, NOT_ANNUL, falseLabel, Xcc, PREDICT_TAKEN); - new Nop().emit(masm); + masm.nop(); } } else { masm.bind(compare1Byte); diff -r f6a01e64a87a -r 7d3afd4356a2 graal/com.oracle.graal.lir.sparc/src/com/oracle/graal/lir/sparc/SPARCCall.java --- a/graal/com.oracle.graal.lir.sparc/src/com/oracle/graal/lir/sparc/SPARCCall.java Fri Feb 27 11:40:15 2015 +0100 +++ b/graal/com.oracle.graal.lir.sparc/src/com/oracle/graal/lir/sparc/SPARCCall.java Fri Feb 27 11:42:36 2015 +0100 @@ -32,7 +32,6 @@ import com.oracle.graal.asm.sparc.SPARCAssembler.Call; import com.oracle.graal.asm.sparc.SPARCAssembler.Jmpl; import com.oracle.graal.asm.sparc.SPARCMacroAssembler.Jmp; -import com.oracle.graal.asm.sparc.SPARCMacroAssembler.Nop; import com.oracle.graal.asm.sparc.SPARCMacroAssembler.Sethix; import com.oracle.graal.compiler.common.*; import com.oracle.graal.lir.*; @@ -89,7 +88,7 @@ } else { int after = masm.position(); if (after - before == 4) { - new Nop().emit(masm); + masm.nop(); } else if (after - before == 8) { // everything is fine; } else { @@ -197,7 +196,7 @@ } else { new Call(0).emit(masm); } - new Nop().emit(masm); // delay slot + masm.nop(); // delay slot int after = masm.position(); crb.recordDirectCall(before, after, callTarget, info); crb.recordExceptionHandlers(after, info); @@ -208,7 +207,7 @@ int before = masm.position(); new Sethix(0L, dst, true).emit(masm); new Jmp(new SPARCAddress(dst, 0)).emit(masm); - new Nop().emit(masm); // delay slot + masm.nop(); // delay slot int after = masm.position(); crb.recordIndirectCall(before, after, target, null); masm.ensureUniquePC(); @@ -217,7 +216,7 @@ public static void indirectCall(CompilationResultBuilder crb, SPARCMacroAssembler masm, Register dst, InvokeTarget callTarget, LIRFrameState info) { int before = masm.position(); new Jmpl(dst, 0, o7).emit(masm); - new Nop().emit(masm); // delay slot + masm.nop(); // delay slot int after = masm.position(); crb.recordIndirectCall(before, after, callTarget, info); crb.recordExceptionHandlers(after, info); diff -r f6a01e64a87a -r 7d3afd4356a2 graal/com.oracle.graal.lir.sparc/src/com/oracle/graal/lir/sparc/SPARCControlFlow.java --- a/graal/com.oracle.graal.lir.sparc/src/com/oracle/graal/lir/sparc/SPARCControlFlow.java Fri Feb 27 11:40:15 2015 +0100 +++ b/graal/com.oracle.graal.lir.sparc/src/com/oracle/graal/lir/sparc/SPARCControlFlow.java Fri Feb 27 11:42:36 2015 +0100 @@ -219,7 +219,7 @@ actualY = scratchValue; } emitCBCond(masm, actualX, actualY, actualTrueTarget, actualConditionFlag); - new Nop().emit(masm); + masm.nop(); } finally { if (scratch != null) { // release the scratch if used @@ -228,7 +228,7 @@ } if (needJump) { masm.jmp(actualFalseTarget); - new Nop().emit(masm); + masm.nop(); } return true; } @@ -241,26 +241,26 @@ case Int: if (isConstant(actualY)) { int constantY = asConstant(actualY).asInt(); - new CBcondw(conditionFlag, asIntReg(actualX), constantY, actualTrueTarget).emit(masm); + masm.cbcondw(conditionFlag, asIntReg(actualX), constantY, actualTrueTarget); } else { - new CBcondw(conditionFlag, asIntReg(actualX), asIntReg(actualY), actualTrueTarget).emit(masm); + masm.cbcondw(conditionFlag, asIntReg(actualX), asIntReg(actualY), actualTrueTarget); } break; case Long: if (isConstant(actualY)) { int constantY = (int) asConstant(actualY).asLong(); - new CBcondx(conditionFlag, asLongReg(actualX), constantY, actualTrueTarget).emit(masm); + masm.cbcondx(conditionFlag, asLongReg(actualX), constantY, actualTrueTarget); } else { - new CBcondx(conditionFlag, asLongReg(actualX), asLongReg(actualY), actualTrueTarget).emit(masm); + masm.cbcondx(conditionFlag, asLongReg(actualX), asLongReg(actualY), actualTrueTarget); } break; case Object: if (isConstant(actualY)) { // Object constant valid can only be null assert asConstant(actualY).isNull(); - new CBcondx(conditionFlag, asObjectReg(actualX), 0, actualTrueTarget).emit(masm); + masm.cbcondx(conditionFlag, asObjectReg(actualX), 0, actualTrueTarget); } else { // this is already loaded - new CBcondx(conditionFlag, asObjectReg(actualX), asObjectReg(actualY), actualTrueTarget).emit(masm); + masm.cbcondx(conditionFlag, asObjectReg(actualX), asObjectReg(actualY), actualTrueTarget); } break; default: @@ -431,7 +431,7 @@ ConditionFlag conditionFlag = ConditionFlag.fromCondtition(conditionCode, condition, false); new Cmp(keyRegister, scratchRegister).emit(masm); masm.bpcc(conditionFlag, NOT_ANNUL, target, conditionCode, PREDICT_TAKEN); - new Nop().emit(masm); // delay slot + masm.nop(); // delay slot } }; strategy.run(closure); @@ -485,7 +485,7 @@ // Jump to default target if index is not within the jump table if (defaultTarget != null) { masm.bpcc(GreaterUnsigned, NOT_ANNUL, defaultTarget.label(), Icc, PREDICT_TAKEN); - new Nop().emit(masm); // delay slot + masm.nop(); // delay slot } // Load jump table entry into scratch and jump to it @@ -498,12 +498,12 @@ new Add(scratchReg, 4 * 4, scratchReg).emit(masm); new Jmpl(scratch2, scratchReg, g0).emit(masm); } - new Nop().emit(masm); + masm.nop(); // Emit jump table entries for (LabelRef target : targets) { masm.bpcc(Always, NOT_ANNUL, target.label(), Xcc, PREDICT_TAKEN); - new Nop().emit(masm); // delay slot + masm.nop(); // delay slot } } } diff -r f6a01e64a87a -r 7d3afd4356a2 graal/com.oracle.graal.lir.sparc/src/com/oracle/graal/lir/sparc/SPARCJumpOp.java --- a/graal/com.oracle.graal.lir.sparc/src/com/oracle/graal/lir/sparc/SPARCJumpOp.java Fri Feb 27 11:40:15 2015 +0100 +++ b/graal/com.oracle.graal.lir.sparc/src/com/oracle/graal/lir/sparc/SPARCJumpOp.java Fri Feb 27 11:42:36 2015 +0100 @@ -26,7 +26,6 @@ import com.oracle.graal.asm.sparc.SPARCAssembler.*; import com.oracle.graal.asm.sparc.*; -import com.oracle.graal.asm.sparc.SPARCMacroAssembler.Nop; import com.oracle.graal.lir.*; import com.oracle.graal.lir.StandardOp.JumpOp; import com.oracle.graal.lir.asm.*; @@ -54,7 +53,7 @@ if (!emitDone) { SPARCMacroAssembler masm = (SPARCMacroAssembler) crb.asm; masm.bicc(ConditionFlag.Always, NOT_ANNUL, destination().label()); - new Nop().emit(masm); + masm.nop(); } else { assert crb.asm.position() - delaySlotPosition == 4; } diff -r f6a01e64a87a -r 7d3afd4356a2 graal/com.oracle.graal.truffle.hotspot.sparc/src/com/oracle/graal/truffle/hotspot/sparc/SPARCOptimizedCallTargetInstumentationFactory.java --- a/graal/com.oracle.graal.truffle.hotspot.sparc/src/com/oracle/graal/truffle/hotspot/sparc/SPARCOptimizedCallTargetInstumentationFactory.java Fri Feb 27 11:40:15 2015 +0100 +++ b/graal/com.oracle.graal.truffle.hotspot.sparc/src/com/oracle/graal/truffle/hotspot/sparc/SPARCOptimizedCallTargetInstumentationFactory.java Fri Feb 27 11:42:36 2015 +0100 @@ -22,26 +22,26 @@ */ package com.oracle.graal.truffle.hotspot.sparc; +import static com.oracle.graal.api.code.CallingConvention.Type.*; +import static com.oracle.graal.api.meta.Kind.*; import static com.oracle.graal.asm.sparc.SPARCAssembler.Annul.*; import static com.oracle.graal.asm.sparc.SPARCAssembler.BranchPredict.*; import static com.oracle.graal.asm.sparc.SPARCAssembler.CC.*; import static com.oracle.graal.asm.sparc.SPARCAssembler.ConditionFlag.*; +import static com.oracle.graal.sparc.SPARC.CPUFeature.*; -import com.oracle.graal.api.code.CallingConvention.Type; import com.oracle.graal.api.code.*; import com.oracle.graal.api.meta.*; import com.oracle.graal.api.runtime.*; import com.oracle.graal.asm.*; import com.oracle.graal.asm.sparc.*; -import com.oracle.graal.asm.sparc.SPARCAssembler.*; +import com.oracle.graal.asm.sparc.SPARCAssembler.Ldx; import com.oracle.graal.asm.sparc.SPARCMacroAssembler.Cmp; import com.oracle.graal.asm.sparc.SPARCMacroAssembler.Jmp; -import com.oracle.graal.asm.sparc.SPARCMacroAssembler.Nop; import com.oracle.graal.hotspot.*; import com.oracle.graal.hotspot.meta.*; import com.oracle.graal.lir.asm.*; import com.oracle.graal.lir.framemap.*; -import com.oracle.graal.sparc.SPARC.CPUFeature; import com.oracle.graal.sparc.*; import com.oracle.graal.truffle.*; import com.oracle.graal.truffle.hotspot.*; @@ -57,23 +57,23 @@ @SuppressWarnings("hiding") SPARCMacroAssembler asm = (SPARCMacroAssembler) this.asm; try (SPARCScratchRegister scratch = SPARCScratchRegister.get()) { - Register thisRegister = codeCache.getRegisterConfig().getCallingConventionRegisters(Type.JavaCall, Kind.Object)[0]; + Register thisRegister = codeCache.getRegisterConfig().getCallingConventionRegisters(JavaCall, Object)[0]; Register spillRegister = scratch.getRegister(); Label doProlog = new Label(); SPARCAddress codeBlobAddress = new SPARCAddress(thisRegister, getFieldOffset("address", InstalledCode.class)); SPARCAddress verifiedEntryPointAddress = new SPARCAddress(spillRegister, config.nmethodEntryOffset); new Ldx(codeBlobAddress, spillRegister).emit(asm); - if (asm.hasFeature(CPUFeature.CBCOND)) { - new CBcondx(ConditionFlag.Equal, spillRegister, 0, doProlog).emit(asm); + if (asm.hasFeature(CBCOND)) { + asm.cbcondx(Equal, spillRegister, 0, doProlog); } else { new Cmp(spillRegister, 0).emit(asm); asm.bpcc(Equal, NOT_ANNUL, doProlog, Xcc, PREDICT_NOT_TAKEN); - new Nop().emit(asm); + asm.nop(); } new Ldx(verifiedEntryPointAddress, spillRegister).emit(asm); // in delay slot new Jmp(spillRegister).emit(asm); - new Nop().emit(asm); + asm.nop(); asm.bind(doProlog); } }