# HG changeset patch # User roland # Date 1347373257 -7200 # Node ID 8a02ca5e55760f0af3a85969a08d39ac00562d35 # Parent ec98e58952b241da990341a4f143d9ba4918f017 7195816: NPG: Crash in c1_ValueType - ShouldNotReachHere Summary: C1 needs knowledge of T_METADATA at the LIR level. Reviewed-by: kvn, coleenp diff -r ec98e58952b2 -r 8a02ca5e5576 src/cpu/sparc/vm/c1_FrameMap_sparc.cpp --- a/src/cpu/sparc/vm/c1_FrameMap_sparc.cpp Tue Sep 11 14:59:23 2012 +0200 +++ b/src/cpu/sparc/vm/c1_FrameMap_sparc.cpp Tue Sep 11 16:20:57 2012 +0200 @@ -147,6 +147,39 @@ LIR_Opr FrameMap::I6_oop_opr; LIR_Opr FrameMap::I7_oop_opr; +LIR_Opr FrameMap::G0_metadata_opr; +LIR_Opr FrameMap::G1_metadata_opr; +LIR_Opr FrameMap::G2_metadata_opr; +LIR_Opr FrameMap::G3_metadata_opr; +LIR_Opr FrameMap::G4_metadata_opr; +LIR_Opr FrameMap::G5_metadata_opr; +LIR_Opr FrameMap::G6_metadata_opr; +LIR_Opr FrameMap::G7_metadata_opr; +LIR_Opr FrameMap::O0_metadata_opr; +LIR_Opr FrameMap::O1_metadata_opr; +LIR_Opr FrameMap::O2_metadata_opr; +LIR_Opr FrameMap::O3_metadata_opr; +LIR_Opr FrameMap::O4_metadata_opr; +LIR_Opr FrameMap::O5_metadata_opr; +LIR_Opr FrameMap::O6_metadata_opr; +LIR_Opr FrameMap::O7_metadata_opr; +LIR_Opr FrameMap::L0_metadata_opr; +LIR_Opr FrameMap::L1_metadata_opr; +LIR_Opr FrameMap::L2_metadata_opr; +LIR_Opr FrameMap::L3_metadata_opr; +LIR_Opr FrameMap::L4_metadata_opr; +LIR_Opr FrameMap::L5_metadata_opr; +LIR_Opr FrameMap::L6_metadata_opr; +LIR_Opr FrameMap::L7_metadata_opr; +LIR_Opr FrameMap::I0_metadata_opr; +LIR_Opr FrameMap::I1_metadata_opr; +LIR_Opr FrameMap::I2_metadata_opr; +LIR_Opr FrameMap::I3_metadata_opr; +LIR_Opr FrameMap::I4_metadata_opr; +LIR_Opr FrameMap::I5_metadata_opr; +LIR_Opr FrameMap::I6_metadata_opr; +LIR_Opr FrameMap::I7_metadata_opr; + LIR_Opr FrameMap::SP_opr; LIR_Opr FrameMap::FP_opr; @@ -310,6 +343,39 @@ I6_oop_opr = as_oop_opr(I6); I7_oop_opr = as_oop_opr(I7); + G0_metadata_opr = as_metadata_opr(G0); + G1_metadata_opr = as_metadata_opr(G1); + G2_metadata_opr = as_metadata_opr(G2); + G3_metadata_opr = as_metadata_opr(G3); + G4_metadata_opr = as_metadata_opr(G4); + G5_metadata_opr = as_metadata_opr(G5); + G6_metadata_opr = as_metadata_opr(G6); + G7_metadata_opr = as_metadata_opr(G7); + O0_metadata_opr = as_metadata_opr(O0); + O1_metadata_opr = as_metadata_opr(O1); + O2_metadata_opr = as_metadata_opr(O2); + O3_metadata_opr = as_metadata_opr(O3); + O4_metadata_opr = as_metadata_opr(O4); + O5_metadata_opr = as_metadata_opr(O5); + O6_metadata_opr = as_metadata_opr(O6); + O7_metadata_opr = as_metadata_opr(O7); + L0_metadata_opr = as_metadata_opr(L0); + L1_metadata_opr = as_metadata_opr(L1); + L2_metadata_opr = as_metadata_opr(L2); + L3_metadata_opr = as_metadata_opr(L3); + L4_metadata_opr = as_metadata_opr(L4); + L5_metadata_opr = as_metadata_opr(L5); + L6_metadata_opr = as_metadata_opr(L6); + L7_metadata_opr = as_metadata_opr(L7); + I0_metadata_opr = as_metadata_opr(I0); + I1_metadata_opr = as_metadata_opr(I1); + I2_metadata_opr = as_metadata_opr(I2); + I3_metadata_opr = as_metadata_opr(I3); + I4_metadata_opr = as_metadata_opr(I4); + I5_metadata_opr = as_metadata_opr(I5); + I6_metadata_opr = as_metadata_opr(I6); + I7_metadata_opr = as_metadata_opr(I7); + FP_opr = as_pointer_opr(FP); SP_opr = as_pointer_opr(SP); diff -r ec98e58952b2 -r 8a02ca5e5576 src/cpu/sparc/vm/c1_FrameMap_sparc.hpp --- a/src/cpu/sparc/vm/c1_FrameMap_sparc.hpp Tue Sep 11 14:59:23 2012 +0200 +++ b/src/cpu/sparc/vm/c1_FrameMap_sparc.hpp Tue Sep 11 16:20:57 2012 +0200 @@ -104,6 +104,39 @@ static LIR_Opr I6_oop_opr; static LIR_Opr I7_oop_opr; + static LIR_Opr G0_metadata_opr; + static LIR_Opr G1_metadata_opr; + static LIR_Opr G2_metadata_opr; + static LIR_Opr G3_metadata_opr; + static LIR_Opr G4_metadata_opr; + static LIR_Opr G5_metadata_opr; + static LIR_Opr G6_metadata_opr; + static LIR_Opr G7_metadata_opr; + static LIR_Opr O0_metadata_opr; + static LIR_Opr O1_metadata_opr; + static LIR_Opr O2_metadata_opr; + static LIR_Opr O3_metadata_opr; + static LIR_Opr O4_metadata_opr; + static LIR_Opr O5_metadata_opr; + static LIR_Opr O6_metadata_opr; + static LIR_Opr O7_metadata_opr; + static LIR_Opr L0_metadata_opr; + static LIR_Opr L1_metadata_opr; + static LIR_Opr L2_metadata_opr; + static LIR_Opr L3_metadata_opr; + static LIR_Opr L4_metadata_opr; + static LIR_Opr L5_metadata_opr; + static LIR_Opr L6_metadata_opr; + static LIR_Opr L7_metadata_opr; + static LIR_Opr I0_metadata_opr; + static LIR_Opr I1_metadata_opr; + static LIR_Opr I2_metadata_opr; + static LIR_Opr I3_metadata_opr; + static LIR_Opr I4_metadata_opr; + static LIR_Opr I5_metadata_opr; + static LIR_Opr I6_metadata_opr; + static LIR_Opr I7_metadata_opr; + static LIR_Opr in_long_opr; static LIR_Opr out_long_opr; static LIR_Opr g1_long_single_opr; diff -r ec98e58952b2 -r 8a02ca5e5576 src/cpu/sparc/vm/c1_LIRAssembler_sparc.cpp --- a/src/cpu/sparc/vm/c1_LIRAssembler_sparc.cpp Tue Sep 11 14:59:23 2012 +0200 +++ b/src/cpu/sparc/vm/c1_LIRAssembler_sparc.cpp Tue Sep 11 16:20:57 2012 +0200 @@ -447,9 +447,12 @@ if (compilation()->env()->dtrace_method_probes()) { __ mov(G2_thread, O0); + __ save_thread(I1); // need to preserve thread in G2 across + // runtime call metadata2reg(method()->constant_encoding(), O1); __ call(CAST_FROM_FN_PTR(address, SharedRuntime::dtrace_method_exit), relocInfo::runtime_call_type); __ delayed()->nop(); + __ restore_thread(I1); } if (method()->is_synchronized() || compilation()->env()->dtrace_method_probes()) { @@ -843,6 +846,7 @@ #endif break; case T_ADDRESS: + case T_METADATA: __ st_ptr(from_reg->as_register(), base, offset); break; case T_ARRAY : // fall through @@ -965,6 +969,7 @@ #endif } break; + case T_METADATA: case T_ADDRESS: __ ld_ptr(base, offset, to_reg->as_register()); break; case T_ARRAY : // fall through case T_OBJECT: @@ -1366,6 +1371,7 @@ void LIR_Assembler::mem2reg(LIR_Opr src_opr, LIR_Opr dest, BasicType type, LIR_PatchCode patch_code, CodeEmitInfo* info, bool wide, bool unaligned) { + assert(type != T_METADATA, "load of metadata ptr not supported"); LIR_Address* addr = src_opr->as_address_ptr(); LIR_Opr to_reg = dest; @@ -1513,6 +1519,7 @@ void LIR_Assembler::reg2mem(LIR_Opr from_reg, LIR_Opr dest, BasicType type, LIR_PatchCode patch_code, CodeEmitInfo* info, bool pop_fpu_stack, bool wide, bool unaligned) { + assert(type != T_METADATA, "store of metadata ptr not supported"); LIR_Address* addr = dest->as_address_ptr(); Register src = addr->base()->as_pointer_register(); diff -r ec98e58952b2 -r 8a02ca5e5576 src/cpu/sparc/vm/c1_LIRGenerator_sparc.cpp --- a/src/cpu/sparc/vm/c1_LIRGenerator_sparc.cpp Tue Sep 11 14:59:23 2012 +0200 +++ b/src/cpu/sparc/vm/c1_LIRGenerator_sparc.cpp Tue Sep 11 16:20:57 2012 +0200 @@ -884,7 +884,7 @@ LIR_Opr tmp2 = FrameMap::G3_oop_opr; LIR_Opr tmp3 = FrameMap::G4_oop_opr; LIR_Opr tmp4 = FrameMap::O1_oop_opr; - LIR_Opr klass_reg = FrameMap::G5_oop_opr; + LIR_Opr klass_reg = FrameMap::G5_metadata_opr; new_instance(reg, x->klass(), tmp1, tmp2, tmp3, tmp4, klass_reg, info); LIR_Opr result = rlock_result(x); __ move(reg, result); @@ -903,11 +903,11 @@ LIR_Opr tmp2 = FrameMap::G3_oop_opr; LIR_Opr tmp3 = FrameMap::G4_oop_opr; LIR_Opr tmp4 = FrameMap::O1_oop_opr; - LIR_Opr klass_reg = FrameMap::G5_oop_opr; + LIR_Opr klass_reg = FrameMap::G5_metadata_opr; LIR_Opr len = length.result(); BasicType elem_type = x->elt_type(); - __ oop2reg(ciTypeArrayKlass::make(elem_type)->constant_encoding(), klass_reg); + __ metadata2reg(ciTypeArrayKlass::make(elem_type)->constant_encoding(), klass_reg); CodeStub* slow_path = new NewTypeArrayStub(klass_reg, len, reg, info); __ allocate_array(reg, len, tmp1, tmp2, tmp3, tmp4, elem_type, klass_reg, slow_path); @@ -935,7 +935,7 @@ LIR_Opr tmp2 = FrameMap::G3_oop_opr; LIR_Opr tmp3 = FrameMap::G4_oop_opr; LIR_Opr tmp4 = FrameMap::O1_oop_opr; - LIR_Opr klass_reg = FrameMap::G5_oop_opr; + LIR_Opr klass_reg = FrameMap::G5_metadata_opr; LIR_Opr len = length.result(); CodeStub* slow_path = new NewObjectArrayStub(klass_reg, len, reg, info); @@ -985,8 +985,8 @@ // This instruction can be deoptimized in the slow path : use // O0 as result register. - const LIR_Opr reg = result_register_for(x->type()); - klass2reg_with_patching(reg, x->klass(), patching_info); + const LIR_Opr klass_reg = FrameMap::O0_metadata_opr; + klass2reg_with_patching(klass_reg, x->klass(), patching_info); LIR_Opr rank = FrameMap::O1_opr; __ move(LIR_OprFact::intConst(x->rank()), rank); LIR_Opr varargs = FrameMap::as_pointer_opr(O2); @@ -995,9 +995,10 @@ LIR_OprFact::intptrConst(offset_from_sp), varargs); LIR_OprList* args = new LIR_OprList(3); - args->append(reg); + args->append(klass_reg); args->append(rank); args->append(varargs); + const LIR_Opr reg = result_register_for(x->type()); __ call_runtime(Runtime1::entry_for(Runtime1::new_multi_array_id), LIR_OprFact::illegalOpr, reg, args, info); diff -r ec98e58952b2 -r 8a02ca5e5576 src/cpu/sparc/vm/sharedRuntime_sparc.cpp --- a/src/cpu/sparc/vm/sharedRuntime_sparc.cpp Tue Sep 11 14:59:23 2012 +0200 +++ b/src/cpu/sparc/vm/sharedRuntime_sparc.cpp Tue Sep 11 16:20:57 2012 +0200 @@ -1340,6 +1340,7 @@ case T_ADDRESS: // raw pointers, like current thread, for VM calls case T_ARRAY: case T_OBJECT: + case T_METADATA: regs[i].set2( int_stk_helper( j ) ); break; case T_FLOAT: @@ -1388,6 +1389,7 @@ case T_FLOAT: case T_INT: case T_OBJECT: + case T_METADATA: case T_SHORT: regs[i].set1( int_stk_helper( i ) ); break; diff -r ec98e58952b2 -r 8a02ca5e5576 src/cpu/x86/vm/c1_FrameMap_x86.cpp --- a/src/cpu/x86/vm/c1_FrameMap_x86.cpp Tue Sep 11 14:59:23 2012 +0200 +++ b/src/cpu/x86/vm/c1_FrameMap_x86.cpp Tue Sep 11 16:20:57 2012 +0200 @@ -96,6 +96,13 @@ LIR_Opr FrameMap::rdx_oop_opr; LIR_Opr FrameMap::rcx_oop_opr; +LIR_Opr FrameMap::rsi_metadata_opr; +LIR_Opr FrameMap::rdi_metadata_opr; +LIR_Opr FrameMap::rbx_metadata_opr; +LIR_Opr FrameMap::rax_metadata_opr; +LIR_Opr FrameMap::rdx_metadata_opr; +LIR_Opr FrameMap::rcx_metadata_opr; + LIR_Opr FrameMap::long0_opr; LIR_Opr FrameMap::long1_opr; LIR_Opr FrameMap::fpu0_float_opr; @@ -122,6 +129,13 @@ LIR_Opr FrameMap::r12_oop_opr; LIR_Opr FrameMap::r13_oop_opr; LIR_Opr FrameMap::r14_oop_opr; + +LIR_Opr FrameMap::r8_metadata_opr; +LIR_Opr FrameMap::r9_metadata_opr; +LIR_Opr FrameMap::r11_metadata_opr; +LIR_Opr FrameMap::r12_metadata_opr; +LIR_Opr FrameMap::r13_metadata_opr; +LIR_Opr FrameMap::r14_metadata_opr; #endif // _LP64 LIR_Opr FrameMap::_caller_save_cpu_regs[] = { 0, }; @@ -236,6 +250,13 @@ rdx_oop_opr = as_oop_opr(rdx); rcx_oop_opr = as_oop_opr(rcx); + rsi_metadata_opr = as_metadata_opr(rsi); + rdi_metadata_opr = as_metadata_opr(rdi); + rbx_metadata_opr = as_metadata_opr(rbx); + rax_metadata_opr = as_metadata_opr(rax); + rdx_metadata_opr = as_metadata_opr(rdx); + rcx_metadata_opr = as_metadata_opr(rcx); + rsp_opr = as_pointer_opr(rsp); rbp_opr = as_pointer_opr(rbp); @@ -246,6 +267,13 @@ r12_oop_opr = as_oop_opr(r12); r13_oop_opr = as_oop_opr(r13); r14_oop_opr = as_oop_opr(r14); + + r8_metadata_opr = as_metadata_opr(r8); + r9_metadata_opr = as_metadata_opr(r9); + r11_metadata_opr = as_metadata_opr(r11); + r12_metadata_opr = as_metadata_opr(r12); + r13_metadata_opr = as_metadata_opr(r13); + r14_metadata_opr = as_metadata_opr(r14); #endif // _LP64 VMRegPair regs; diff -r ec98e58952b2 -r 8a02ca5e5576 src/cpu/x86/vm/c1_FrameMap_x86.hpp --- a/src/cpu/x86/vm/c1_FrameMap_x86.hpp Tue Sep 11 14:59:23 2012 +0200 +++ b/src/cpu/x86/vm/c1_FrameMap_x86.hpp Tue Sep 11 16:20:57 2012 +0200 @@ -73,6 +73,14 @@ static LIR_Opr rax_oop_opr; static LIR_Opr rdx_oop_opr; static LIR_Opr rcx_oop_opr; + + static LIR_Opr rsi_metadata_opr; + static LIR_Opr rdi_metadata_opr; + static LIR_Opr rbx_metadata_opr; + static LIR_Opr rax_metadata_opr; + static LIR_Opr rdx_metadata_opr; + static LIR_Opr rcx_metadata_opr; + #ifdef _LP64 static LIR_Opr r8_opr; @@ -92,6 +100,14 @@ static LIR_Opr r13_oop_opr; static LIR_Opr r14_oop_opr; + static LIR_Opr r8_metadata_opr; + static LIR_Opr r9_metadata_opr; + + static LIR_Opr r11_metadata_opr; + static LIR_Opr r12_metadata_opr; + static LIR_Opr r13_metadata_opr; + static LIR_Opr r14_metadata_opr; + #endif // _LP64 static LIR_Opr long0_opr; diff -r ec98e58952b2 -r 8a02ca5e5576 src/cpu/x86/vm/c1_LIRAssembler_x86.cpp --- a/src/cpu/x86/vm/c1_LIRAssembler_x86.cpp Tue Sep 11 14:59:23 2012 +0200 +++ b/src/cpu/x86/vm/c1_LIRAssembler_x86.cpp Tue Sep 11 16:20:57 2012 +0200 @@ -950,6 +950,8 @@ if (type == T_OBJECT || type == T_ARRAY) { __ verify_oop(src->as_register()); __ movptr (dst, src->as_register()); + } else if (type == T_METADATA) { + __ movptr (dst, src->as_register()); } else { __ movl (dst, src->as_register()); } @@ -1041,6 +1043,14 @@ __ movptr(as_Address(to_addr), src->as_register()); } break; + case T_METADATA: + // We get here to store a method pointer to the stack to pass to + // a dtrace runtime call. This can't work on 64 bit with + // compressed klass ptrs: T_METADATA can be a compressed klass + // ptr or a 64 bit method pointer. + LP64_ONLY(ShouldNotReachHere()); + __ movptr(as_Address(to_addr), src->as_register()); + break; case T_ADDRESS: __ movptr(as_Address(to_addr), src->as_register()); break; @@ -1118,6 +1128,8 @@ if (type == T_ARRAY || type == T_OBJECT) { __ movptr(dest->as_register(), frame_map()->address_for_slot(src->single_stack_ix())); __ verify_oop(dest->as_register()); + } else if (type == T_METADATA) { + __ movptr(dest->as_register(), frame_map()->address_for_slot(src->single_stack_ix())); } else { __ movl(dest->as_register(), frame_map()->address_for_slot(src->single_stack_ix())); } diff -r ec98e58952b2 -r 8a02ca5e5576 src/cpu/x86/vm/c1_LIRGenerator_x86.cpp --- a/src/cpu/x86/vm/c1_LIRGenerator_x86.cpp Tue Sep 11 14:59:23 2012 +0200 +++ b/src/cpu/x86/vm/c1_LIRGenerator_x86.cpp Tue Sep 11 16:20:57 2012 +0200 @@ -1002,13 +1002,12 @@ #endif CodeEmitInfo* info = state_for(x, x->state()); LIR_Opr reg = result_register_for(x->type()); - LIR_Opr klass_reg = new_register(objectType); new_instance(reg, x->klass(), FrameMap::rcx_oop_opr, FrameMap::rdi_oop_opr, FrameMap::rsi_oop_opr, LIR_OprFact::illegalOpr, - FrameMap::rdx_oop_opr, info); + FrameMap::rdx_metadata_opr, info); LIR_Opr result = rlock_result(x); __ move(reg, result); } @@ -1025,11 +1024,11 @@ LIR_Opr tmp2 = FrameMap::rsi_oop_opr; LIR_Opr tmp3 = FrameMap::rdi_oop_opr; LIR_Opr tmp4 = reg; - LIR_Opr klass_reg = FrameMap::rdx_oop_opr; + LIR_Opr klass_reg = FrameMap::rdx_metadata_opr; LIR_Opr len = length.result(); BasicType elem_type = x->elt_type(); - __ oop2reg(ciTypeArrayKlass::make(elem_type)->constant_encoding(), klass_reg); + __ metadata2reg(ciTypeArrayKlass::make(elem_type)->constant_encoding(), klass_reg); CodeStub* slow_path = new NewTypeArrayStub(klass_reg, len, reg, info); __ allocate_array(reg, len, tmp1, tmp2, tmp3, tmp4, elem_type, klass_reg, slow_path); @@ -1055,7 +1054,7 @@ LIR_Opr tmp2 = FrameMap::rsi_oop_opr; LIR_Opr tmp3 = FrameMap::rdi_oop_opr; LIR_Opr tmp4 = reg; - LIR_Opr klass_reg = FrameMap::rdx_oop_opr; + LIR_Opr klass_reg = FrameMap::rdx_metadata_opr; length.load_item_force(FrameMap::rbx_opr); LIR_Opr len = length.result(); @@ -1103,17 +1102,18 @@ store_stack_parameter(size->result(), in_ByteSize(i*4)); } - LIR_Opr reg = result_register_for(x->type()); - klass2reg_with_patching(reg, x->klass(), patching_info); + LIR_Opr klass_reg = FrameMap::rax_metadata_opr; + klass2reg_with_patching(klass_reg, x->klass(), patching_info); LIR_Opr rank = FrameMap::rbx_opr; __ move(LIR_OprFact::intConst(x->rank()), rank); LIR_Opr varargs = FrameMap::rcx_opr; __ move(FrameMap::rsp_opr, varargs); LIR_OprList* args = new LIR_OprList(3); - args->append(reg); + args->append(klass_reg); args->append(rank); args->append(varargs); + LIR_Opr reg = result_register_for(x->type()); __ call_runtime(Runtime1::entry_for(Runtime1::new_multi_array_id), LIR_OprFact::illegalOpr, reg, args, info); diff -r ec98e58952b2 -r 8a02ca5e5576 src/cpu/x86/vm/sharedRuntime_x86_32.cpp --- a/src/cpu/x86/vm/sharedRuntime_x86_32.cpp Tue Sep 11 14:59:23 2012 +0200 +++ b/src/cpu/x86/vm/sharedRuntime_x86_32.cpp Tue Sep 11 16:20:57 2012 +0200 @@ -938,6 +938,7 @@ case T_OBJECT: case T_ARRAY: case T_ADDRESS: + case T_METADATA: regs[i].set1(VMRegImpl::stack2reg(stack++)); break; case T_LONG: diff -r ec98e58952b2 -r 8a02ca5e5576 src/cpu/x86/vm/sharedRuntime_x86_64.cpp --- a/src/cpu/x86/vm/sharedRuntime_x86_64.cpp Tue Sep 11 14:59:23 2012 +0200 +++ b/src/cpu/x86/vm/sharedRuntime_x86_64.cpp Tue Sep 11 16:20:57 2012 +0200 @@ -903,6 +903,7 @@ case T_OBJECT: case T_ARRAY: case T_ADDRESS: + case T_METADATA: if (int_args < Argument::n_int_register_parameters_c) { regs[i].set2(INT_ArgReg[int_args++]->as_VMReg()); #ifdef _WIN64 diff -r ec98e58952b2 -r 8a02ca5e5576 src/share/vm/c1/c1_FrameMap.hpp --- a/src/share/vm/c1/c1_FrameMap.hpp Tue Sep 11 14:59:23 2012 +0200 +++ b/src/share/vm/c1/c1_FrameMap.hpp Tue Sep 11 16:20:57 2012 +0200 @@ -194,6 +194,10 @@ return LIR_OprFact::single_cpu_oop(cpu_reg2rnr(r)); } + static LIR_Opr as_metadata_opr(Register r) { + return LIR_OprFact::single_cpu_metadata(cpu_reg2rnr(r)); + } + FrameMap(ciMethod* method, int monitors, int reserved_argument_area_size); bool finalize_frame(int nof_slots); diff -r ec98e58952b2 -r 8a02ca5e5576 src/share/vm/c1/c1_LIR.cpp --- a/src/share/vm/c1/c1_LIR.cpp Tue Sep 11 14:59:23 2012 +0200 +++ b/src/share/vm/c1/c1_LIR.cpp Tue Sep 11 16:20:57 2012 +0200 @@ -89,8 +89,12 @@ ClassConstant* c = type->as_ClassConstant(); if (c != NULL && !c->value()->is_loaded()) { return LIR_OprFact::metadataConst(NULL); + } else if (c != NULL) { + return LIR_OprFact::metadataConst(c->value()->constant_encoding()); } else { - return LIR_OprFact::metadataConst(c->value()->constant_encoding()); + MethodConstant* m = type->as_MethodConstant(); + assert (m != NULL, "not a class or a method?"); + return LIR_OprFact::metadataConst(m->value()->constant_encoding()); } } case objectTag : { @@ -1166,10 +1170,12 @@ void LIR_List::oop2reg_patch(jobject o, LIR_Opr reg, CodeEmitInfo* info) { + assert(reg->type() == T_OBJECT, "bad reg"); append(new LIR_Op1(lir_move, LIR_OprFact::oopConst(o), reg, T_OBJECT, lir_patch_normal, info)); } void LIR_List::klass2reg_patch(Metadata* o, LIR_Opr reg, CodeEmitInfo* info) { + assert(reg->type() == T_METADATA, "bad reg"); append(new LIR_Op1(lir_move, LIR_OprFact::metadataConst(o), reg, T_METADATA, lir_patch_normal, info)); } diff -r ec98e58952b2 -r 8a02ca5e5576 src/share/vm/c1/c1_LIR.hpp --- a/src/share/vm/c1/c1_LIR.hpp Tue Sep 11 14:59:23 2012 +0200 +++ b/src/share/vm/c1/c1_LIR.hpp Tue Sep 11 16:20:57 2012 +0200 @@ -299,6 +299,7 @@ , address_type = 4 << type_shift , float_type = 5 << type_shift , double_type = 6 << type_shift + , metadata_type = 7 << type_shift }; friend OprType as_OprType(BasicType t); friend BasicType as_BasicType(OprType t); @@ -322,6 +323,7 @@ case T_ADDRESS: case T_OBJECT: case T_ARRAY: + case T_METADATA: return single_size; break; @@ -474,6 +476,7 @@ case T_OBJECT: case T_ARRAY: return LIR_OprDesc::object_type; case T_ADDRESS: return LIR_OprDesc::address_type; + case T_METADATA: return LIR_OprDesc::metadata_type; case T_ILLEGAL: // fall through default: ShouldNotReachHere(); return LIR_OprDesc::unknown_type; } @@ -487,6 +490,7 @@ case LIR_OprDesc::double_type: return T_DOUBLE; case LIR_OprDesc::object_type: return T_OBJECT; case LIR_OprDesc::address_type: return T_ADDRESS; + case LIR_OprDesc::metadata_type:return T_METADATA; case LIR_OprDesc::unknown_type: // fall through default: ShouldNotReachHere(); return T_ILLEGAL; } @@ -587,6 +591,12 @@ LIR_OprDesc::cpu_register | LIR_OprDesc::single_size); } + static LIR_Opr single_cpu_metadata(int reg) { + return (LIR_Opr)(intptr_t)((reg << LIR_OprDesc::reg1_shift) | + LIR_OprDesc::metadata_type | + LIR_OprDesc::cpu_register | + LIR_OprDesc::single_size); + } static LIR_Opr double_cpu(int reg1, int reg2) { LP64_ONLY(assert(reg1 == reg2, "must be identical")); return (LIR_Opr)(intptr_t)((reg1 << LIR_OprDesc::reg1_shift) | @@ -660,6 +670,14 @@ LIR_OprDesc::virtual_mask); break; + case T_METADATA: + res = (LIR_Opr)(intptr_t)((index << LIR_OprDesc::data_shift) | + LIR_OprDesc::metadata_type| + LIR_OprDesc::cpu_register | + LIR_OprDesc::single_size | + LIR_OprDesc::virtual_mask); + break; + case T_INT: res = (LIR_Opr)(intptr_t)((index << LIR_OprDesc::data_shift) | LIR_OprDesc::int_type | @@ -757,6 +775,12 @@ LIR_OprDesc::single_size); break; + case T_METADATA: + res = (LIR_Opr)(intptr_t)((index << LIR_OprDesc::data_shift) | + LIR_OprDesc::metadata_type | + LIR_OprDesc::stack_value | + LIR_OprDesc::single_size); + break; case T_INT: res = (LIR_Opr)(intptr_t)((index << LIR_OprDesc::data_shift) | LIR_OprDesc::int_type | @@ -2006,10 +2030,10 @@ } void volatile_move(LIR_Opr src, LIR_Opr dst, BasicType type, CodeEmitInfo* info = NULL, LIR_PatchCode patch_code = lir_patch_none) { append(new LIR_Op1(lir_move, src, dst, type, patch_code, info, lir_move_volatile)); } - void oop2reg (jobject o, LIR_Opr reg) { append(new LIR_Op1(lir_move, LIR_OprFact::oopConst(o), reg)); } + void oop2reg (jobject o, LIR_Opr reg) { assert(reg->type() == T_OBJECT, "bad reg"); append(new LIR_Op1(lir_move, LIR_OprFact::oopConst(o), reg)); } void oop2reg_patch(jobject o, LIR_Opr reg, CodeEmitInfo* info); - void oop2reg (Metadata* o, LIR_Opr reg) { append(new LIR_Op1(lir_move, LIR_OprFact::metadataConst(o), reg)); } + void metadata2reg (Metadata* o, LIR_Opr reg) { assert(reg->type() == T_METADATA, "bad reg"); append(new LIR_Op1(lir_move, LIR_OprFact::metadataConst(o), reg)); } void klass2reg_patch(Metadata* o, LIR_Opr reg, CodeEmitInfo* info); void return_op(LIR_Opr result) { append(new LIR_Op1(lir_return, result)); } diff -r ec98e58952b2 -r 8a02ca5e5576 src/share/vm/c1/c1_LIRGenerator.cpp --- a/src/share/vm/c1/c1_LIRGenerator.cpp Tue Sep 11 14:59:23 2012 +0200 +++ b/src/share/vm/c1/c1_LIRGenerator.cpp Tue Sep 11 16:20:57 2012 +0200 @@ -467,7 +467,7 @@ __ klass2reg_patch(NULL, r, info); } else { // no patching needed - __ oop2reg(obj->constant_encoding(), r); + __ metadata2reg(obj->constant_encoding(), r); } } @@ -955,8 +955,8 @@ not_taken_count_offset = t; } - LIR_Opr md_reg = new_register(T_OBJECT); - __ oop2reg(md->constant_encoding(), md_reg); + LIR_Opr md_reg = new_register(T_METADATA); + __ metadata2reg(md->constant_encoding(), md_reg); LIR_Opr data_offset_reg = new_pointer_register(); __ cmove(lir_cond(cond), @@ -1192,8 +1192,8 @@ signature.append(T_OBJECT); // Method* LIR_OprList* args = new LIR_OprList(); args->append(getThreadPointer()); - LIR_Opr meth = new_register(T_OBJECT); - __ oop2reg(method()->constant_encoding(), meth); + LIR_Opr meth = new_register(T_METADATA); + __ metadata2reg(method()->constant_encoding(), meth); args->append(meth); call_runtime(&signature, args, CAST_FROM_FN_PTR(address, SharedRuntime::dtrace_method_exit), voidType, NULL); } @@ -2553,8 +2553,8 @@ assert(data->is_JumpData(), "need JumpData for branches"); offset = md->byte_offset_of_slot(data, JumpData::taken_offset()); } - LIR_Opr md_reg = new_register(T_OBJECT); - __ oop2reg(md->constant_encoding(), md_reg); + LIR_Opr md_reg = new_register(T_METADATA); + __ metadata2reg(md->constant_encoding(), md_reg); increment_counter(new LIR_Address(md_reg, offset, NOT_LP64(T_INT) LP64_ONLY(T_LONG)), DataLayout::counter_increment); @@ -2611,8 +2611,8 @@ signature.append(T_OBJECT); // Method* LIR_OprList* args = new LIR_OprList(); args->append(getThreadPointer()); - LIR_Opr meth = new_register(T_OBJECT); - __ oop2reg(method()->constant_encoding(), meth); + LIR_Opr meth = new_register(T_METADATA); + __ metadata2reg(method()->constant_encoding(), meth); args->append(meth); call_runtime(&signature, args, CAST_FROM_FN_PTR(address, SharedRuntime::dtrace_method_entry), voidType, NULL); } @@ -3032,21 +3032,21 @@ assert(level > CompLevel_simple, "Shouldn't be here"); int offset = -1; - LIR_Opr counter_holder = new_register(T_OBJECT); + LIR_Opr counter_holder = new_register(T_METADATA); LIR_Opr meth; if (level == CompLevel_limited_profile) { offset = in_bytes(backedge ? Method::backedge_counter_offset() : Method::invocation_counter_offset()); - __ oop2reg(method->constant_encoding(), counter_holder); + __ metadata2reg(method->constant_encoding(), counter_holder); meth = counter_holder; } else if (level == CompLevel_full_profile) { offset = in_bytes(backedge ? MethodData::backedge_counter_offset() : MethodData::invocation_counter_offset()); ciMethodData* md = method->method_data_or_null(); assert(md != NULL, "Sanity"); - __ oop2reg(md->constant_encoding(), counter_holder); - meth = new_register(T_OBJECT); - __ oop2reg(method->constant_encoding(), meth); + __ metadata2reg(md->constant_encoding(), counter_holder); + meth = new_register(T_METADATA); + __ metadata2reg(method->constant_encoding(), meth); } else { ShouldNotReachHere(); } diff -r ec98e58952b2 -r 8a02ca5e5576 src/share/vm/c1/c1_LinearScan.cpp --- a/src/share/vm/c1/c1_LinearScan.cpp Tue Sep 11 14:59:23 2012 +0200 +++ b/src/share/vm/c1/c1_LinearScan.cpp Tue Sep 11 16:20:57 2012 +0200 @@ -2067,6 +2067,12 @@ return LIR_OprFact::single_cpu_address(assigned_reg); } + case T_METADATA: { + assert(assigned_reg >= pd_first_cpu_reg && assigned_reg <= pd_last_cpu_reg, "no cpu register"); + assert(interval->assigned_regHi() == any_reg, "must not have hi register"); + return LIR_OprFact::single_cpu_metadata(assigned_reg); + } + #ifdef __SOFTFP__ case T_FLOAT: // fall through #endif // __SOFTFP__ diff -r ec98e58952b2 -r 8a02ca5e5576 src/share/vm/c1/c1_ValueType.cpp --- a/src/share/vm/c1/c1_ValueType.cpp Tue Sep 11 14:59:23 2012 +0200 +++ b/src/share/vm/c1/c1_ValueType.cpp Tue Sep 11 16:20:57 2012 +0200 @@ -168,6 +168,7 @@ case floatTag: return T_FLOAT; case doubleTag: return T_DOUBLE; case objectTag: return T_OBJECT; + case metaDataTag:return T_METADATA; case addressTag: return T_ADDRESS; case illegalTag: return T_ILLEGAL; } diff -r ec98e58952b2 -r 8a02ca5e5576 src/share/vm/opto/runtime.cpp --- a/src/share/vm/opto/runtime.cpp Tue Sep 11 14:59:23 2012 +0200 +++ b/src/share/vm/opto/runtime.cpp Tue Sep 11 16:20:57 2012 +0200 @@ -1148,7 +1148,7 @@ // create input type (domain) const Type **fields = TypeTuple::fields(2); fields[TypeFunc::Parms+0] = TypeRawPtr::BOTTOM; // Thread-local storage - fields[TypeFunc::Parms+1] = TypeInstPtr::NOTNULL; // Method*; Method we are entering + fields[TypeFunc::Parms+1] = TypeMetadataPtr::BOTTOM; // Method*; Method we are entering const TypeTuple *domain = TypeTuple::make(TypeFunc::Parms+2,fields); // create result type (range) diff -r ec98e58952b2 -r 8a02ca5e5576 src/share/vm/utilities/globalDefinitions.cpp --- a/src/share/vm/utilities/globalDefinitions.cpp Tue Sep 11 14:59:23 2012 +0200 +++ b/src/share/vm/utilities/globalDefinitions.cpp Tue Sep 11 16:20:57 2012 +0200 @@ -213,7 +213,7 @@ // Map BasicType to size in words -int type2size[T_CONFLICT+1]={ -1, 0, 0, 0, 1, 1, 1, 2, 1, 1, 1, 2, 1, 1, 0, 1, 1, -1}; +int type2size[T_CONFLICT+1]={ -1, 0, 0, 0, 1, 1, 1, 2, 1, 1, 1, 2, 1, 1, 0, 1, 1, 1, -1}; BasicType type2field[T_CONFLICT+1] = { (BasicType)0, // 0,