# HG changeset patch
# User Christos Kotselidis <christos.kotselidis@oracle.com>
# Date 1370964758 -7200
# Node ID d9a331e2fd61121a40a817b38ba69e9acd1d6831
# Parent  13384d19fec0af8e42d8d97a0dd231365831802a
Compressed Oop support for heab base > 32g

diff -r 13384d19fec0 -r d9a331e2fd61 graal/com.oracle.graal.lir.amd64/src/com/oracle/graal/lir/amd64/AMD64Move.java
--- a/graal/com.oracle.graal.lir.amd64/src/com/oracle/graal/lir/amd64/AMD64Move.java	Tue Jun 11 00:00:40 2013 +0200
+++ b/graal/com.oracle.graal.lir.amd64/src/com/oracle/graal/lir/amd64/AMD64Move.java	Tue Jun 11 17:32:38 2013 +0200
@@ -33,6 +33,7 @@
 import com.oracle.graal.api.meta.*;
 import com.oracle.graal.asm.*;
 import com.oracle.graal.asm.amd64.*;
+import com.oracle.graal.asm.amd64.AMD64Assembler.ConditionFlag;
 import com.oracle.graal.graph.*;
 import com.oracle.graal.lir.*;
 import com.oracle.graal.lir.StandardOp.MoveOp;
@@ -667,6 +668,8 @@
         } else {
             // Otherwise the narrow heap base, which resides always in register 12, is subtracted
             // followed by right shift.
+            masm.testq(scratchRegister, scratchRegister);
+            masm.cmovq(ConditionFlag.Equal, scratchRegister, AMD64.r12);
             masm.subq(scratchRegister, AMD64.r12);
             masm.shrq(scratchRegister, logMinObjAlignment);
         }
@@ -681,9 +684,12 @@
                 masm.shlq(resRegister, logMinObjAlignment);
             }
         } else {
-            // Otherwise the narrow heap base is added to the shifted address.
+            Label done = new Label();
             masm.shlq(resRegister, logMinObjAlignment);
+            masm.jccb(ConditionFlag.Equal, done);
+            // Otherwise the narrow heap base is added to the shifted address.
             masm.addq(resRegister, AMD64.r12);
+            masm.bind(done);
         }
     }