# HG changeset patch # User Christian Wimmer # Date 1325627234 28800 # Node ID e2578f3e8ab22f28276424946e41c8f9ffb9ba15 # Parent 430b5db3e6f8eb82905cca5f3d2273ae379241fe Allow an arbitary number of output operands for LIR instructions diff -r 430b5db3e6f8 -r e2578f3e8ab2 graal/com.oracle.max.graal.compiler/src/com/oracle/max/graal/compiler/alloc/EdgeMoveOptimizer.java --- a/graal/com.oracle.max.graal.compiler/src/com/oracle/max/graal/compiler/alloc/EdgeMoveOptimizer.java Tue Jan 03 12:10:27 2012 -0800 +++ b/graal/com.oracle.max.graal.compiler/src/com/oracle/max/graal/compiler/alloc/EdgeMoveOptimizer.java Tue Jan 03 13:47:14 2012 -0800 @@ -1,5 +1,5 @@ /* - * Copyright (c) 2009, 2011, Oracle and/or its affiliates. All rights reserved. + * Copyright (c) 2009, 2012, Oracle and/or its affiliates. All rights reserved. * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. * * This code is free software; you can redistribute it and/or modify it @@ -89,7 +89,7 @@ assert op2 != null; if (op1.code == StandardOpcode.MOVE && op2.code == StandardOpcode.MOVE) { - if (op1.info == op2.info && op1.input(0).equals(op2.input(0)) && op1.result().equals(op2.result())) { + if (op1.info == op2.info && op1.input(0).equals(op2.input(0)) && op1.output(0).equals(op2.output(0))) { // these moves are exactly equal and can be optimized return true; } diff -r 430b5db3e6f8 -r e2578f3e8ab2 graal/com.oracle.max.graal.compiler/src/com/oracle/max/graal/compiler/alloc/LinearScan.java --- a/graal/com.oracle.max.graal.compiler/src/com/oracle/max/graal/compiler/alloc/LinearScan.java Tue Jan 03 12:10:27 2012 -0800 +++ b/graal/com.oracle.max.graal.compiler/src/com/oracle/max/graal/compiler/alloc/LinearScan.java Tue Jan 03 13:47:14 2012 -0800 @@ -464,7 +464,7 @@ int opId = op.id(); if (opId == -1) { - CiValue resultOperand = op.result(); + CiValue resultOperand = op.output(0); // remove move from register to stack if the stack slot is guaranteed to be correct. // only moves that have been inserted by LinearScan can be removed. assert op.code == StandardOpcode.MOVE : "only moves can have a opId of -1"; @@ -475,7 +475,7 @@ if (!isRegister(curInterval.location()) && curInterval.alwaysInMemory()) { // move target is a stack slot that is always correct, so eliminate instruction if (GraalOptions.TraceLinearScanLevel >= 4) { - TTY.println("eliminating move from interval %d to %d", operandNumber(op.input(0)), operandNumber(op.result())); + TTY.println("eliminating move from interval %d to %d", operandNumber(op.input(0)), operandNumber(op.output(0))); } instructions.set(j, null); // null-instructions are deleted by assignRegNum } @@ -873,7 +873,7 @@ if (block.liveGen.get(operandNum)) { TTY.println(" used in block B%d", block.blockID()); for (LIRInstruction ins : block.lir()) { - TTY.println(ins.id() + ": " + ins.result() + " " + ins.toString()); + TTY.println(ins.id() + ": " + ins.toString()); LIRDebugInfo info = ins.info; if (info != null) { info.forEachState(new ValueProcedure() { @@ -888,7 +888,7 @@ if (block.liveKill.get(operandNum)) { TTY.println(" defined in block B%d", block.blockID()); for (LIRInstruction ins : block.lir()) { - TTY.println(ins.id() + ": " + ins.result() + " " + ins.toString()); + TTY.println(ins.id() + ": " + ins.toString()); } } } @@ -1035,7 +1035,7 @@ */ static RegisterPriority registerPriorityOfInputOperand(LIRInstruction op, int operandIndex) { if (op.code == StandardOpcode.MOVE) { - if (isVariableOrRegister(op.input(0)) && isVariableOrRegister(op.result())) { + if (isVariableOrRegister(op.input(0)) && isVariableOrRegister(op.output(0))) { // The input operand is not forced to a register (moves from stack to register are allowed), // but it is faster if the input operand is in a register return RegisterPriority.ShouldHaveRegister; @@ -1062,14 +1062,14 @@ if (GraalOptions.DetailedAsserts) { assert op.id() > 0 : "invalid id"; assert blockForId(op.id()).numberOfPreds() == 0 : "move from stack must be in first block"; - assert isVariable(op.result()) : "result of move must be a variable"; + assert isVariable(op.output(0)) : "result of move must be a variable"; if (GraalOptions.TraceLinearScanLevel >= 4) { - TTY.println("found move from stack slot %s to %s", slot, op.result()); + TTY.println("found move from stack slot %s to %s", slot, op.output(0)); } } - Interval interval = intervalFor(op.result()); + Interval interval = intervalFor(op.output(0)); CiStackSlot copySlot = slot; if (GraalOptions.CopyPointerStackArguments && slot.kind == CiKind.Object) { copySlot = frameMap.allocateSpillSlot(slot.kind); @@ -1083,7 +1083,7 @@ void addRegisterHints(LIRInstruction op) { CiValue moveFrom = op.registerHint(); if (moveFrom != null) { - CiValue moveTo = op.result(); + CiValue moveTo = op.output(0); if (isVariableOrRegister(moveTo) && isVariableOrRegister(moveFrom)) { Interval from = intervalFor(moveFrom); @@ -1789,7 +1789,7 @@ // remove useless moves if (op.code == StandardOpcode.MOVE) { CiValue src = op.input(0); - CiValue dst = op.result(); + CiValue dst = op.output(0); if (dst == src || src.equals(dst)) { // TODO: what about o.f = o.f and exceptions? instructions.set(j, null); diff -r 430b5db3e6f8 -r e2578f3e8ab2 graal/com.oracle.max.graal.compiler/src/com/oracle/max/graal/compiler/alloc/LinearScanWalker.java --- a/graal/com.oracle.max.graal.compiler/src/com/oracle/max/graal/compiler/alloc/LinearScanWalker.java Tue Jan 03 12:10:27 2012 -0800 +++ b/graal/com.oracle.max.graal.compiler/src/com/oracle/max/graal/compiler/alloc/LinearScanWalker.java Tue Jan 03 13:47:14 2012 -0800 @@ -825,7 +825,7 @@ } CiValue input = op.input(0); - CiValue result = op.result(); + CiValue result = op.output(0); return isVariable(input) && isVariable(result) && input == from.operand && result == to.operand; } diff -r 430b5db3e6f8 -r e2578f3e8ab2 graal/com.oracle.max.graal.compiler/src/com/oracle/max/graal/compiler/lir/LIRBranch.java --- a/graal/com.oracle.max.graal.compiler/src/com/oracle/max/graal/compiler/lir/LIRBranch.java Tue Jan 03 12:10:27 2012 -0800 +++ b/graal/com.oracle.max.graal.compiler/src/com/oracle/max/graal/compiler/lir/LIRBranch.java Tue Jan 03 13:47:14 2012 -0800 @@ -1,5 +1,5 @@ /* - * Copyright (c) 2009, 2011, Oracle and/or its affiliates. All rights reserved. + * Copyright (c) 2009, 2012, Oracle and/or its affiliates. All rights reserved. * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. * * This code is free software; you can redistribute it and/or modify it @@ -22,7 +22,6 @@ */ package com.oracle.max.graal.compiler.lir; -import com.oracle.max.cri.ci.*; import com.oracle.max.graal.nodes.calc.*; public abstract class LIRBranch extends LIRInstruction { @@ -44,7 +43,7 @@ public LIRBranch(LIROpcode code, Condition cond, boolean unorderedIsTrue, LabelRef destination, LIRDebugInfo info) { - super(code, CiValue.IllegalValue, info, LIRInstruction.NO_OPERANDS, LIRInstruction.NO_OPERANDS, LIRInstruction.NO_OPERANDS); + super(code, LIRInstruction.NO_OPERANDS, info, LIRInstruction.NO_OPERANDS, LIRInstruction.NO_OPERANDS, LIRInstruction.NO_OPERANDS); this.cond = cond; this.unorderedIsTrue = unorderedIsTrue; this.destination = destination; diff -r 430b5db3e6f8 -r e2578f3e8ab2 graal/com.oracle.max.graal.compiler/src/com/oracle/max/graal/compiler/lir/LIRCall.java --- a/graal/com.oracle.max.graal.compiler/src/com/oracle/max/graal/compiler/lir/LIRCall.java Tue Jan 03 12:10:27 2012 -0800 +++ b/graal/com.oracle.max.graal.compiler/src/com/oracle/max/graal/compiler/lir/LIRCall.java Tue Jan 03 13:47:14 2012 -0800 @@ -65,7 +65,7 @@ CiValue targetAddress, LIRDebugInfo info, Map marks) { - super(opcode, result, info, toArray(arguments, targetAddress), LIRInstruction.NO_OPERANDS, LIRInstruction.NO_OPERANDS); + super(opcode, isLegal(result) ? new CiValue[] {result} : LIRInstruction.NO_OPERANDS, info, toArray(arguments, targetAddress), LIRInstruction.NO_OPERANDS, LIRInstruction.NO_OPERANDS); this.marks = marks; if (targetAddress == null) { this.targetAddressIndex = -1; @@ -91,35 +91,4 @@ } return null; } - - @Override - public String operationString() { - StringBuilder buf = new StringBuilder(); - if (isLegal(result)) { - buf.append(result).append(" = "); - } - if (targetAddressIndex >= 0) { - buf.append(targetAddress()); - } - if (inputs.length + alives.length > 1) { - buf.append("("); - } - String sep = ""; - for (CiValue input : inputs) { - if (input != targetAddress()) { - buf.append(sep).append(input); - sep = ", "; - } - } - for (CiValue input : alives) { - if (input != targetAddress()) { - buf.append(sep).append(input).append(" ~"); - sep = ", "; - } - } - if (inputs.length + alives.length > 1) { - buf.append(")"); - } - return buf.toString(); - } } diff -r 430b5db3e6f8 -r e2578f3e8ab2 graal/com.oracle.max.graal.compiler/src/com/oracle/max/graal/compiler/lir/LIRInstruction.java --- a/graal/com.oracle.max.graal.compiler/src/com/oracle/max/graal/compiler/lir/LIRInstruction.java Tue Jan 03 12:10:27 2012 -0800 +++ b/graal/com.oracle.max.graal.compiler/src/com/oracle/max/graal/compiler/lir/LIRInstruction.java Tue Jan 03 13:47:14 2012 -0800 @@ -22,8 +22,6 @@ */ package com.oracle.max.graal.compiler.lir; -import static com.oracle.max.cri.ci.CiValueUtil.*; - import com.oracle.max.cri.ci.*; import com.oracle.max.graal.compiler.asm.*; import com.oracle.max.graal.compiler.util.*; @@ -77,7 +75,7 @@ Temp, /** - * The value must not have been defined beforee. The instruction has to assign a value to the register. The + * The value must not have been defined before. The instruction has to assign a value to the register. The * value can (and most likely will) be used after the instruction. */ Output, @@ -89,9 +87,9 @@ public final LIROpcode code; /** - * The result operand for this instruction (modified by the register allocator). + * The output operands for this instruction (modified by the register allocator). */ - protected CiValue result; + protected final CiValue[] outputs; /** * The input operands for this instruction (modified by the register allocator). @@ -122,15 +120,14 @@ * Constructs a new LIR instruction that has input and temp operands. * * @param opcode the opcode of the new instruction - * @param result the operand that holds the operation result of this instruction. This will be - * {@link CiValue#IllegalValue} for instructions that do not produce a result. + * @param outputs the operands that holds the operation results of this instruction. * @param info the {@link LIRDebugInfo} info that is to be preserved for the instruction. This will be {@code null} when no debug info is required for the instruction. * @param inputs the input operands for the instruction. * @param temps the temp operands for the instruction. */ - public LIRInstruction(LIROpcode opcode, CiValue result, LIRDebugInfo info, CiValue[] inputs, CiValue[] alives, CiValue[] temps) { + public LIRInstruction(LIROpcode opcode, CiValue[] outputs, LIRDebugInfo info, CiValue[] inputs, CiValue[] alives, CiValue[] temps) { this.code = opcode; - this.result = result; + this.outputs = outputs; this.inputs = inputs; this.alives = alives; this.temps = temps; @@ -184,8 +181,8 @@ * * @return return the result operand */ - public final CiValue result() { - return result; + public final CiValue output(int index) { + return outputs[index]; } /** @@ -196,12 +193,12 @@ } public boolean hasOperands() { - return inputs.length > 0 || alives.length > 0 || temps.length > 0 || info != null || hasCall(); + return inputs.length > 0 || alives.length > 0 || temps.length > 0 || outputs.length > 0 || info != null || hasCall(); } public final int operandCount(OperandMode mode) { switch (mode) { - case Output: return isLegal(result) ? 1 : 0; + case Output: return outputs.length; case Input: return inputs.length; case Alive: return alives.length; case Temp: return temps.length; @@ -212,7 +209,7 @@ public final CiValue operandAt(OperandMode mode, int index) { assert index < operandCount(mode); switch (mode) { - case Output: return result; + case Output: return outputs[index]; case Input: return inputs[index]; case Alive: return alives[index]; case Temp: return temps[index]; @@ -225,7 +222,7 @@ assert location.kind != CiKind.Illegal; assert operandAt(mode, index).kind == location.kind; switch (mode) { - case Output: result = location; break; + case Output: outputs[index] = location; break; case Input: inputs[index] = location; break; case Alive: alives[index] = location; break; case Temp: temps[index] = location; break; @@ -252,8 +249,8 @@ } public final void forEachOutput(ValueProcedure proc) { - if (result != CiValue.IllegalValue) { - result = proc.doValue(result); + for (int i = 0; i < outputs.length; i++) { + outputs[i] = proc.doValue(outputs[i]); } } @@ -309,13 +306,19 @@ */ public String operationString() { StringBuilder buf = new StringBuilder(); - if (isLegal(result)) { - buf.append(result).append(" = "); + String sep = ""; + for (CiValue output : outputs) { + buf.append(output); + sep = ", "; } + if (outputs.length > 0) { + buf.append(" = "); + } + if (inputs.length + alives.length > 1) { buf.append("("); } - String sep = ""; + sep = ""; for (CiValue input : inputs) { buf.append(sep).append(input); sep = ", "; diff -r 430b5db3e6f8 -r e2578f3e8ab2 graal/com.oracle.max.graal.compiler/src/com/oracle/max/graal/compiler/lir/LIRXirInstruction.java --- a/graal/com.oracle.max.graal.compiler/src/com/oracle/max/graal/compiler/lir/LIRXirInstruction.java Tue Jan 03 12:10:27 2012 -0800 +++ b/graal/com.oracle.max.graal.compiler/src/com/oracle/max/graal/compiler/lir/LIRXirInstruction.java Tue Jan 03 13:47:14 2012 -0800 @@ -54,7 +54,7 @@ RiMethod method) { // Note that we register the XIR input operands as Alive, because the XIR specification allows that input operands // are used at any time, even when the temp operands and the actual output operands have already be assigned. - super(opcode, outputOperand, info, LIRInstruction.NO_OPERANDS, inputs, temps); + super(opcode, new CiValue[] {outputOperand}, info, LIRInstruction.NO_OPERANDS, inputs, temps); this.infoAfter = infoAfter; this.method = method; this.snippet = snippet; @@ -90,7 +90,7 @@ originalOperands[tempOperandIndices[i]] = temp(i); } if (outputOperandIndex != -1) { - originalOperands[outputOperandIndex] = result(); + originalOperands[outputOperandIndex] = output(0); } return originalOperands; } @@ -108,8 +108,8 @@ StringBuilder sb = new StringBuilder(); sb.append("XIR: "); - if (isLegal(result())) { - sb.append(result() + " = "); + if (isLegal(output(0))) { + sb.append(output(0) + " = "); } sb.append(snippet.template); diff -r 430b5db3e6f8 -r e2578f3e8ab2 graal/com.oracle.max.graal.compiler/src/com/oracle/max/graal/compiler/target/amd64/AMD64ArithmeticOpcode.java --- a/graal/com.oracle.max.graal.compiler/src/com/oracle/max/graal/compiler/target/amd64/AMD64ArithmeticOpcode.java Tue Jan 03 12:10:27 2012 -0800 +++ b/graal/com.oracle.max.graal.compiler/src/com/oracle/max/graal/compiler/target/amd64/AMD64ArithmeticOpcode.java Tue Jan 03 13:47:14 2012 -0800 @@ -44,13 +44,14 @@ CiValue[] inputs = new CiValue[] {left}; CiValue[] alives = new CiValue[] {right}; + CiValue[] outputs = new CiValue[] {result}; - return new AMD64LIRInstruction(this, result, null, inputs, alives, LIRInstruction.NO_OPERANDS) { + return new AMD64LIRInstruction(this, outputs, null, inputs, alives, LIRInstruction.NO_OPERANDS) { @Override public void emitCode(TargetMethodAssembler tasm, AMD64MacroAssembler masm) { - assert !(alive(0) instanceof CiRegisterValue) || asRegister(result()) != asRegister(alive(0)) : "result and right must be different registers"; - AMD64MoveOpcode.move(tasm, masm, result(), input(0)); - emit(tasm, masm, result(), alive(0)); + assert !(alive(0) instanceof CiRegisterValue) || asRegister(output(0)) != asRegister(alive(0)) : "result and right must be different registers"; + AMD64MoveOpcode.move(tasm, masm, output(0), input(0)); + emit(tasm, masm, output(0), alive(0)); } @Override diff -r 430b5db3e6f8 -r e2578f3e8ab2 graal/com.oracle.max.graal.compiler/src/com/oracle/max/graal/compiler/target/amd64/AMD64CompareOpcode.java --- a/graal/com.oracle.max.graal.compiler/src/com/oracle/max/graal/compiler/target/amd64/AMD64CompareOpcode.java Tue Jan 03 12:10:27 2012 -0800 +++ b/graal/com.oracle.max.graal.compiler/src/com/oracle/max/graal/compiler/target/amd64/AMD64CompareOpcode.java Tue Jan 03 13:47:14 2012 -0800 @@ -42,7 +42,7 @@ || (name().startsWith("D") && left.kind == CiKind.Double && right.kind == CiKind.Double) : "left.kind=" + left.kind + ", right.kind=" + right.kind; CiValue[] inputs = new CiValue[] {left, right}; - return new AMD64LIRInstruction(this, CiValue.IllegalValue, null, inputs, LIRInstruction.NO_OPERANDS, LIRInstruction.NO_OPERANDS) { + return new AMD64LIRInstruction(this, LIRInstruction.NO_OPERANDS, null, inputs, LIRInstruction.NO_OPERANDS, LIRInstruction.NO_OPERANDS) { @Override public void emitCode(TargetMethodAssembler tasm, AMD64MacroAssembler masm) { emit(tasm, masm, input(0), input(1)); diff -r 430b5db3e6f8 -r e2578f3e8ab2 graal/com.oracle.max.graal.compiler/src/com/oracle/max/graal/compiler/target/amd64/AMD64CompareToIntOpcode.java --- a/graal/com.oracle.max.graal.compiler/src/com/oracle/max/graal/compiler/target/amd64/AMD64CompareToIntOpcode.java Tue Jan 03 12:10:27 2012 -0800 +++ b/graal/com.oracle.max.graal.compiler/src/com/oracle/max/graal/compiler/target/amd64/AMD64CompareToIntOpcode.java Tue Jan 03 13:47:14 2012 -0800 @@ -41,10 +41,12 @@ CMP2INT, CMP2INT_UG, CMP2INT_UL; public LIRInstruction create(Variable result) { - return new AMD64LIRInstruction(this, result, null, LIRInstruction.NO_OPERANDS, LIRInstruction.NO_OPERANDS, LIRInstruction.NO_OPERANDS) { + CiValue[] outputs = new CiValue[] {result}; + + return new AMD64LIRInstruction(this, outputs, null, LIRInstruction.NO_OPERANDS, LIRInstruction.NO_OPERANDS, LIRInstruction.NO_OPERANDS) { @Override public void emitCode(TargetMethodAssembler tasm, AMD64MacroAssembler masm) { - emit(masm, result()); + emit(masm, output(0)); } }; } diff -r 430b5db3e6f8 -r e2578f3e8ab2 graal/com.oracle.max.graal.compiler/src/com/oracle/max/graal/compiler/target/amd64/AMD64ControlFlowOpcode.java --- a/graal/com.oracle.max.graal.compiler/src/com/oracle/max/graal/compiler/target/amd64/AMD64ControlFlowOpcode.java Tue Jan 03 12:10:27 2012 -0800 +++ b/graal/com.oracle.max.graal.compiler/src/com/oracle/max/graal/compiler/target/amd64/AMD64ControlFlowOpcode.java Tue Jan 03 13:47:14 2012 -0800 @@ -41,7 +41,7 @@ LABEL; public LIRInstruction create(final Label label, final boolean align) { - return new AMD64LIRInstruction(this, CiValue.IllegalValue, null, LIRInstruction.NO_OPERANDS, LIRInstruction.NO_OPERANDS, LIRInstruction.NO_OPERANDS) { + return new AMD64LIRInstruction(this, LIRInstruction.NO_OPERANDS, null, LIRInstruction.NO_OPERANDS, LIRInstruction.NO_OPERANDS, LIRInstruction.NO_OPERANDS) { @Override public void emitCode(TargetMethodAssembler tasm, AMD64MacroAssembler masm) { if (align) { @@ -65,7 +65,7 @@ public LIRInstruction create(CiValue input) { CiValue[] inputs = new CiValue[] {input}; - return new AMD64LIRInstruction(this, CiValue.IllegalValue, null, inputs, LIRInstruction.NO_OPERANDS, LIRInstruction.NO_OPERANDS) { + return new AMD64LIRInstruction(this, LIRInstruction.NO_OPERANDS, null, inputs, LIRInstruction.NO_OPERANDS, LIRInstruction.NO_OPERANDS) { @Override public void emitCode(TargetMethodAssembler tasm, AMD64MacroAssembler masm) { masm.ret(0); @@ -141,7 +141,7 @@ CiValue[] alives = new CiValue[] {index}; CiValue[] temps = new CiValue[] {scratch}; - return new AMD64LIRInstruction(this, CiValue.IllegalValue, null, LIRInstruction.NO_OPERANDS, alives, temps) { + return new AMD64LIRInstruction(this, LIRInstruction.NO_OPERANDS, null, LIRInstruction.NO_OPERANDS, alives, temps) { @Override public void emitCode(TargetMethodAssembler tasm, AMD64MacroAssembler masm) { tableswitch(tasm, masm, lowKey, defaultTarget, targets, asIntReg(alive(0)), asLongReg(temp(0))); @@ -169,11 +169,12 @@ public LIRInstruction create(Variable result, final Condition condition, Variable trueValue, CiValue falseValue) { CiValue[] inputs = new CiValue[] {falseValue}; CiValue[] alives = new CiValue[] {trueValue}; + CiValue[] outputs = new CiValue[] {result}; - return new AMD64LIRInstruction(this, result, null, inputs, alives, LIRInstruction.NO_OPERANDS) { + return new AMD64LIRInstruction(this, outputs, null, inputs, alives, LIRInstruction.NO_OPERANDS) { @Override public void emitCode(TargetMethodAssembler tasm, AMD64MacroAssembler masm) { - cmove(tasm, masm, result(), false, condition, false, alive(0), input(0)); + cmove(tasm, masm, output(0), false, condition, false, alive(0), input(0)); } @Override @@ -195,11 +196,12 @@ public LIRInstruction create(Variable result, final Condition condition, final boolean unorderedIsTrue, Variable trueValue, Variable falseValue) { CiValue[] alives = new CiValue[] {trueValue, falseValue}; + CiValue[] outputs = new CiValue[] {result}; - return new AMD64LIRInstruction(this, result, null, LIRInstruction.NO_OPERANDS, alives, LIRInstruction.NO_OPERANDS) { + return new AMD64LIRInstruction(this, outputs, null, LIRInstruction.NO_OPERANDS, alives, LIRInstruction.NO_OPERANDS) { @Override public void emitCode(TargetMethodAssembler tasm, AMD64MacroAssembler masm) { - cmove(tasm, masm, result(), true, condition, unorderedIsTrue, alive(0), alive(1)); + cmove(tasm, masm, output(0), true, condition, unorderedIsTrue, alive(0), alive(1)); } @Override diff -r 430b5db3e6f8 -r e2578f3e8ab2 graal/com.oracle.max.graal.compiler/src/com/oracle/max/graal/compiler/target/amd64/AMD64ConvertFIOpcode.java --- a/graal/com.oracle.max.graal.compiler/src/com/oracle/max/graal/compiler/target/amd64/AMD64ConvertFIOpcode.java Tue Jan 03 12:10:27 2012 -0800 +++ b/graal/com.oracle.max.graal.compiler/src/com/oracle/max/graal/compiler/target/amd64/AMD64ConvertFIOpcode.java Tue Jan 03 13:47:14 2012 -0800 @@ -38,11 +38,12 @@ public LIRInstruction create(Variable result, final CompilerStub stub, Variable input) { CiValue[] inputs = new CiValue[] {input}; + CiValue[] outputs = new CiValue[] {result}; - return new AMD64LIRInstruction(this, result, null, inputs, LIRInstruction.NO_OPERANDS, LIRInstruction.NO_OPERANDS) { + return new AMD64LIRInstruction(this, outputs, null, inputs, LIRInstruction.NO_OPERANDS, LIRInstruction.NO_OPERANDS) { @Override public void emitCode(TargetMethodAssembler tasm, AMD64MacroAssembler masm) { - emit(tasm, masm, result(), stub, input(0)); + emit(tasm, masm, output(0), stub, input(0)); } }; } diff -r 430b5db3e6f8 -r e2578f3e8ab2 graal/com.oracle.max.graal.compiler/src/com/oracle/max/graal/compiler/target/amd64/AMD64ConvertFLOpcode.java --- a/graal/com.oracle.max.graal.compiler/src/com/oracle/max/graal/compiler/target/amd64/AMD64ConvertFLOpcode.java Tue Jan 03 12:10:27 2012 -0800 +++ b/graal/com.oracle.max.graal.compiler/src/com/oracle/max/graal/compiler/target/amd64/AMD64ConvertFLOpcode.java Tue Jan 03 13:47:14 2012 -0800 @@ -39,11 +39,12 @@ public LIRInstruction create(Variable result, final CompilerStub stub, Variable input, Variable scratch) { CiValue[] inputs = new CiValue[] {input}; CiValue[] temps = new CiValue[] {scratch}; + CiValue[] outputs = new CiValue[] {result}; - return new AMD64LIRInstruction(this, result, null, inputs, LIRInstruction.NO_OPERANDS, temps) { + return new AMD64LIRInstruction(this, outputs, null, inputs, LIRInstruction.NO_OPERANDS, temps) { @Override public void emitCode(TargetMethodAssembler tasm, AMD64MacroAssembler masm) { - emit(tasm, masm, result(), stub, input(0), temp(0)); + emit(tasm, masm, output(0), stub, input(0), temp(0)); } }; } diff -r 430b5db3e6f8 -r e2578f3e8ab2 graal/com.oracle.max.graal.compiler/src/com/oracle/max/graal/compiler/target/amd64/AMD64ConvertOpcode.java --- a/graal/com.oracle.max.graal.compiler/src/com/oracle/max/graal/compiler/target/amd64/AMD64ConvertOpcode.java Tue Jan 03 12:10:27 2012 -0800 +++ b/graal/com.oracle.max.graal.compiler/src/com/oracle/max/graal/compiler/target/amd64/AMD64ConvertOpcode.java Tue Jan 03 13:47:14 2012 -0800 @@ -39,11 +39,12 @@ public LIRInstruction create(Variable result, Variable input) { CiValue[] inputs = new CiValue[] {input}; + CiValue[] outputs = new CiValue[] {result}; - return new AMD64LIRInstruction(this, result, null, inputs, LIRInstruction.NO_OPERANDS, LIRInstruction.NO_OPERANDS) { + return new AMD64LIRInstruction(this, outputs, null, inputs, LIRInstruction.NO_OPERANDS, LIRInstruction.NO_OPERANDS) { @Override public void emitCode(TargetMethodAssembler tasm, AMD64MacroAssembler masm) { - emit(tasm, masm, result(), input(0)); + emit(tasm, masm, output(0), input(0)); } @Override diff -r 430b5db3e6f8 -r e2578f3e8ab2 graal/com.oracle.max.graal.compiler/src/com/oracle/max/graal/compiler/target/amd64/AMD64DivOpcode.java --- a/graal/com.oracle.max.graal.compiler/src/com/oracle/max/graal/compiler/target/amd64/AMD64DivOpcode.java Tue Jan 03 12:10:27 2012 -0800 +++ b/graal/com.oracle.max.graal.compiler/src/com/oracle/max/graal/compiler/target/amd64/AMD64DivOpcode.java Tue Jan 03 13:47:14 2012 -0800 @@ -40,11 +40,12 @@ CiValue[] inputs = new CiValue[] {left}; CiValue[] alives = new CiValue[] {right}; CiValue[] temps = new CiValue[] {result.reg == AMD64.rax ? AMD64.rdx.asValue(result.kind) : AMD64.rax.asValue(result.kind)}; + CiValue[] outputs = new CiValue[] {result}; - return new AMD64LIRInstruction(this, result, info, inputs, alives, temps) { + return new AMD64LIRInstruction(this, outputs, info, inputs, alives, temps) { @Override public void emitCode(TargetMethodAssembler tasm, AMD64MacroAssembler masm) { - emit(tasm, masm, asRegister(result()), info, asRegister(input(0)), asRegister(alive(0))); + emit(tasm, masm, asRegister(output(0)), info, asRegister(input(0)), asRegister(alive(0))); } }; } diff -r 430b5db3e6f8 -r e2578f3e8ab2 graal/com.oracle.max.graal.compiler/src/com/oracle/max/graal/compiler/target/amd64/AMD64LIRInstruction.java --- a/graal/com.oracle.max.graal.compiler/src/com/oracle/max/graal/compiler/target/amd64/AMD64LIRInstruction.java Tue Jan 03 12:10:27 2012 -0800 +++ b/graal/com.oracle.max.graal.compiler/src/com/oracle/max/graal/compiler/target/amd64/AMD64LIRInstruction.java Tue Jan 03 13:47:14 2012 -0800 @@ -1,5 +1,5 @@ /* - * Copyright (c) 2011, 2011, Oracle and/or its affiliates. All rights reserved. + * Copyright (c) 2011, 2012, Oracle and/or its affiliates. All rights reserved. * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. * * This code is free software; you can redistribute it and/or modify it @@ -32,8 +32,8 @@ */ public abstract class AMD64LIRInstruction extends LIRInstruction { - public AMD64LIRInstruction(LIROpcode opcode, CiValue result, LIRDebugInfo info, CiValue[] inputs, CiValue[] alives, CiValue[] temps) { - super(opcode, result, info, inputs, alives, temps); + public AMD64LIRInstruction(LIROpcode opcode, CiValue[] outputs, LIRDebugInfo info, CiValue[] inputs, CiValue[] alives, CiValue[] temps) { + super(opcode, outputs, info, inputs, alives, temps); } @Override diff -r 430b5db3e6f8 -r e2578f3e8ab2 graal/com.oracle.max.graal.compiler/src/com/oracle/max/graal/compiler/target/amd64/AMD64LogicFloatOpcode.java --- a/graal/com.oracle.max.graal.compiler/src/com/oracle/max/graal/compiler/target/amd64/AMD64LogicFloatOpcode.java Tue Jan 03 12:10:27 2012 -0800 +++ b/graal/com.oracle.max.graal.compiler/src/com/oracle/max/graal/compiler/target/amd64/AMD64LogicFloatOpcode.java Tue Jan 03 13:47:14 2012 -0800 @@ -40,13 +40,14 @@ CiValue[] inputs = new CiValue[] {left}; CiValue[] alives = new CiValue[] {right}; + CiValue[] outputs = new CiValue[] {result}; - return new AMD64LIRInstruction(this, result, null, inputs, alives, LIRInstruction.NO_OPERANDS) { + return new AMD64LIRInstruction(this, outputs, null, inputs, alives, LIRInstruction.NO_OPERANDS) { @Override public void emitCode(TargetMethodAssembler tasm, AMD64MacroAssembler masm) { - assert !(alive(0) instanceof CiRegisterValue) || asRegister(result()) != asRegister(alive(0)) : "result and right must be different registers"; - AMD64MoveOpcode.move(tasm, masm, result(), input(0)); - emit(tasm, masm, result(), alive(0)); + assert !(alive(0) instanceof CiRegisterValue) || asRegister(output(0)) != asRegister(alive(0)) : "result and right must be different registers"; + AMD64MoveOpcode.move(tasm, masm, output(0), input(0)); + emit(tasm, masm, output(0), alive(0)); } @Override diff -r 430b5db3e6f8 -r e2578f3e8ab2 graal/com.oracle.max.graal.compiler/src/com/oracle/max/graal/compiler/target/amd64/AMD64MoveOpcode.java --- a/graal/com.oracle.max.graal.compiler/src/com/oracle/max/graal/compiler/target/amd64/AMD64MoveOpcode.java Tue Jan 03 12:10:27 2012 -0800 +++ b/graal/com.oracle.max.graal.compiler/src/com/oracle/max/graal/compiler/target/amd64/AMD64MoveOpcode.java Tue Jan 03 13:47:14 2012 -0800 @@ -41,11 +41,12 @@ public LIRInstruction create(CiValue result, CiValue input) { assert result.kind == result.kind.stackKind() && result.kind != CiKind.Illegal; CiValue[] inputs = new CiValue[] {input}; + CiValue[] outputs = new CiValue[] {result}; - return new AMD64LIRInstruction(this, result, null, inputs, LIRInstruction.NO_OPERANDS, LIRInstruction.NO_OPERANDS) { + return new AMD64LIRInstruction(this, outputs, null, inputs, LIRInstruction.NO_OPERANDS, LIRInstruction.NO_OPERANDS) { @Override public void emitCode(TargetMethodAssembler tasm, AMD64MacroAssembler masm) { - move(tasm, masm, result(), input(0)); + move(tasm, masm, output(0), input(0)); } @Override @@ -62,11 +63,12 @@ public LIRInstruction create(Variable result, CiValue addrBase, CiValue addrIndex, final CiAddress.Scale addrScale, final int addrDisplacement, final CiKind kind, LIRDebugInfo info) { CiValue[] inputs = new CiValue[] {addrBase, addrIndex}; + CiValue[] outputs = new CiValue[] {result}; - return new AMD64LIRInstruction(this, result, info, inputs, LIRInstruction.NO_OPERANDS, LIRInstruction.NO_OPERANDS) { + return new AMD64LIRInstruction(this, outputs, info, inputs, LIRInstruction.NO_OPERANDS, LIRInstruction.NO_OPERANDS) { @Override public void emitCode(TargetMethodAssembler tasm, AMD64MacroAssembler masm) { - load(tasm, masm, result(), new CiAddress(CiKind.Illegal, input(0), input(1), addrScale, addrDisplacement), kind, info); + load(tasm, masm, output(0), new CiAddress(CiKind.Illegal, input(0), input(1), addrScale, addrDisplacement), kind, info); } }; } @@ -79,7 +81,7 @@ public LIRInstruction create(CiValue addrBase, CiValue addrIndex, final CiAddress.Scale addrScale, final int addrDisplacement, CiValue input, final CiKind kind, LIRDebugInfo info) { CiValue[] inputs = new CiValue[] {addrBase, addrIndex, input}; - return new AMD64LIRInstruction(this, CiValue.IllegalValue, info, inputs, LIRInstruction.NO_OPERANDS, LIRInstruction.NO_OPERANDS) { + return new AMD64LIRInstruction(this, LIRInstruction.NO_OPERANDS, info, inputs, LIRInstruction.NO_OPERANDS, LIRInstruction.NO_OPERANDS) { @Override public void emitCode(TargetMethodAssembler tasm, AMD64MacroAssembler masm) { store(tasm, masm, new CiAddress(CiKind.Illegal, input(0), input(1), addrScale, addrDisplacement), input(2), kind, info); @@ -94,11 +96,12 @@ public LIRInstruction create(Variable result, CiValue addrBase, CiValue addrIndex, final CiAddress.Scale addrScale, final int addrDisplacement) { CiValue[] inputs = new CiValue[] {addrBase, addrIndex}; + CiValue[] outputs = new CiValue[] {result}; - return new AMD64LIRInstruction(this, result, null, inputs, LIRInstruction.NO_OPERANDS, LIRInstruction.NO_OPERANDS) { + return new AMD64LIRInstruction(this, outputs, null, inputs, LIRInstruction.NO_OPERANDS, LIRInstruction.NO_OPERANDS) { @Override public void emitCode(TargetMethodAssembler tasm, AMD64MacroAssembler masm) { - masm.leaq(asLongReg(result()), new CiAddress(CiKind.Illegal, input(0), input(1), addrScale, addrDisplacement)); + masm.leaq(asLongReg(output(0)), new CiAddress(CiKind.Illegal, input(0), input(1), addrScale, addrDisplacement)); } }; } @@ -113,10 +116,12 @@ LEA_STACK_BLOCK; public LIRInstruction create(Variable result, final CiStackSlot stackBlock) { - return new AMD64LIRInstruction(this, result, null, LIRInstruction.NO_OPERANDS, LIRInstruction.NO_OPERANDS, LIRInstruction.NO_OPERANDS) { + CiValue[] outputs = new CiValue[] {result}; + + return new AMD64LIRInstruction(this, outputs, null, LIRInstruction.NO_OPERANDS, LIRInstruction.NO_OPERANDS, LIRInstruction.NO_OPERANDS) { @Override public void emitCode(TargetMethodAssembler tasm, AMD64MacroAssembler masm) { - masm.leaq(asRegister(result()), tasm.asAddress(stackBlock)); + masm.leaq(asRegister(output(0)), tasm.asAddress(stackBlock)); } }; } @@ -127,7 +132,7 @@ MEMBAR; public LIRInstruction create(final int barriers) { - return new AMD64LIRInstruction(this, CiValue.IllegalValue, null, LIRInstruction.NO_OPERANDS, LIRInstruction.NO_OPERANDS, LIRInstruction.NO_OPERANDS) { + return new AMD64LIRInstruction(this, LIRInstruction.NO_OPERANDS, null, LIRInstruction.NO_OPERANDS, LIRInstruction.NO_OPERANDS, LIRInstruction.NO_OPERANDS) { @Override public void emitCode(TargetMethodAssembler tasm, AMD64MacroAssembler masm) { masm.membar(barriers); @@ -144,7 +149,7 @@ public LIRInstruction create(Variable input, LIRDebugInfo info) { CiValue[] inputs = new CiValue[] {input}; - return new AMD64LIRInstruction(this, CiValue.IllegalValue, info, inputs, LIRInstruction.NO_OPERANDS, LIRInstruction.NO_OPERANDS) { + return new AMD64LIRInstruction(this, LIRInstruction.NO_OPERANDS, info, inputs, LIRInstruction.NO_OPERANDS, LIRInstruction.NO_OPERANDS) { @Override public void emitCode(TargetMethodAssembler tasm, AMD64MacroAssembler masm) { tasm.recordImplicitException(masm.codeBuffer.position(), info); @@ -160,11 +165,12 @@ public LIRInstruction create(CiRegisterValue result, CiValue addrBase, CiValue addrIndex, final CiAddress.Scale addrScale, final int addrDisplacement, CiRegisterValue cmpValue, Variable newValue) { CiValue[] inputs = new CiValue[] {addrBase, addrIndex, cmpValue, newValue}; + CiValue[] outputs = new CiValue[] {result}; - return new AMD64LIRInstruction(this, result, null, inputs, LIRInstruction.NO_OPERANDS, LIRInstruction.NO_OPERANDS) { + return new AMD64LIRInstruction(this, outputs, null, inputs, LIRInstruction.NO_OPERANDS, LIRInstruction.NO_OPERANDS) { @Override public void emitCode(TargetMethodAssembler tasm, AMD64MacroAssembler masm) { - compareAndSwap(tasm, masm, result(), new CiAddress(CiKind.Illegal, input(0), input(1), addrScale, addrDisplacement), input(2), input(3)); + compareAndSwap(tasm, masm, output(0), new CiAddress(CiKind.Illegal, input(0), input(1), addrScale, addrDisplacement), input(2), input(3)); } }; } diff -r 430b5db3e6f8 -r e2578f3e8ab2 graal/com.oracle.max.graal.compiler/src/com/oracle/max/graal/compiler/target/amd64/AMD64MulOpcode.java --- a/graal/com.oracle.max.graal.compiler/src/com/oracle/max/graal/compiler/target/amd64/AMD64MulOpcode.java Tue Jan 03 12:10:27 2012 -0800 +++ b/graal/com.oracle.max.graal.compiler/src/com/oracle/max/graal/compiler/target/amd64/AMD64MulOpcode.java Tue Jan 03 13:47:14 2012 -0800 @@ -36,13 +36,14 @@ public LIRInstruction create(Variable result, CiValue left, CiValue right) { CiValue[] inputs = new CiValue[] {left}; CiValue[] alives = new CiValue[] {right}; + CiValue[] outputs = new CiValue[] {result}; - return new AMD64LIRInstruction(this, result, null, inputs, alives, LIRInstruction.NO_OPERANDS) { + return new AMD64LIRInstruction(this, outputs, null, inputs, alives, LIRInstruction.NO_OPERANDS) { @Override public void emitCode(TargetMethodAssembler tasm, AMD64MacroAssembler masm) { - assert !(alive(0) instanceof CiRegisterValue) || asRegister(result()) != asRegister(alive(0)) : "result and right must be different registers"; - AMD64MoveOpcode.move(tasm, masm, result(), input(0)); - emit(tasm, masm, result(), alive(0)); + assert !(alive(0) instanceof CiRegisterValue) || asRegister(output(0)) != asRegister(alive(0)) : "result and right must be different registers"; + AMD64MoveOpcode.move(tasm, masm, output(0), input(0)); + emit(tasm, masm, output(0), alive(0)); } @Override diff -r 430b5db3e6f8 -r e2578f3e8ab2 graal/com.oracle.max.graal.compiler/src/com/oracle/max/graal/compiler/target/amd64/AMD64Op1Opcode.java --- a/graal/com.oracle.max.graal.compiler/src/com/oracle/max/graal/compiler/target/amd64/AMD64Op1Opcode.java Tue Jan 03 12:10:27 2012 -0800 +++ b/graal/com.oracle.max.graal.compiler/src/com/oracle/max/graal/compiler/target/amd64/AMD64Op1Opcode.java Tue Jan 03 13:47:14 2012 -0800 @@ -35,12 +35,13 @@ public LIRInstruction create(Variable result, CiValue input) { CiValue[] inputs = new CiValue[] {input}; + CiValue[] outputs = new CiValue[] {result}; - return new AMD64LIRInstruction(this, result, null, inputs, LIRInstruction.NO_OPERANDS, LIRInstruction.NO_OPERANDS) { + return new AMD64LIRInstruction(this, outputs, null, inputs, LIRInstruction.NO_OPERANDS, LIRInstruction.NO_OPERANDS) { @Override public void emitCode(TargetMethodAssembler tasm, AMD64MacroAssembler masm) { - AMD64MoveOpcode.move(tasm, masm, result(), input(0)); - emit(masm, result()); + AMD64MoveOpcode.move(tasm, masm, output(0), input(0)); + emit(masm, output(0)); } @Override diff -r 430b5db3e6f8 -r e2578f3e8ab2 graal/com.oracle.max.graal.compiler/src/com/oracle/max/graal/compiler/target/amd64/AMD64ShiftOpcode.java --- a/graal/com.oracle.max.graal.compiler/src/com/oracle/max/graal/compiler/target/amd64/AMD64ShiftOpcode.java Tue Jan 03 12:10:27 2012 -0800 +++ b/graal/com.oracle.max.graal.compiler/src/com/oracle/max/graal/compiler/target/amd64/AMD64ShiftOpcode.java Tue Jan 03 13:47:14 2012 -0800 @@ -37,13 +37,14 @@ public LIRInstruction create(Variable result, CiValue left, CiValue right) { CiValue[] inputs = new CiValue[] {left}; CiValue[] alives = new CiValue[] {right}; + CiValue[] outputs = new CiValue[] {result}; - return new AMD64LIRInstruction(this, result, null, inputs, alives, LIRInstruction.NO_OPERANDS) { + return new AMD64LIRInstruction(this, outputs, null, inputs, alives, LIRInstruction.NO_OPERANDS) { @Override public void emitCode(TargetMethodAssembler tasm, AMD64MacroAssembler masm) { - assert !(alive(0) instanceof CiRegisterValue) || asRegister(result()) != asRegister(alive(0)) : "result and right must be different registers"; - AMD64MoveOpcode.move(tasm, masm, result(), input(0)); - emit(tasm, masm, result(), alive(0)); + assert !(alive(0) instanceof CiRegisterValue) || asRegister(output(0)) != asRegister(alive(0)) : "result and right must be different registers"; + AMD64MoveOpcode.move(tasm, masm, output(0), input(0)); + emit(tasm, masm, output(0), alive(0)); } @Override diff -r 430b5db3e6f8 -r e2578f3e8ab2 graal/com.oracle.max.graal.snippets/src/com/oracle/max/graal/snippets/target/amd64/AMD64MathIntrinsicOpcode.java --- a/graal/com.oracle.max.graal.snippets/src/com/oracle/max/graal/snippets/target/amd64/AMD64MathIntrinsicOpcode.java Tue Jan 03 12:10:27 2012 -0800 +++ b/graal/com.oracle.max.graal.snippets/src/com/oracle/max/graal/snippets/target/amd64/AMD64MathIntrinsicOpcode.java Tue Jan 03 13:47:14 2012 -0800 @@ -38,11 +38,12 @@ public LIRInstruction create(Variable result, Variable input) { CiValue[] inputs = new CiValue[] {input}; + CiValue[] outputs = new CiValue[] {result}; - return new AMD64LIRInstruction(this, result, null, inputs, LIRInstruction.NO_OPERANDS, LIRInstruction.NO_OPERANDS) { + return new AMD64LIRInstruction(this, outputs, null, inputs, LIRInstruction.NO_OPERANDS, LIRInstruction.NO_OPERANDS) { @Override public void emitCode(TargetMethodAssembler tasm, AMD64MacroAssembler masm) { - emit(tasm, masm, asDoubleReg(result()), asDoubleReg(input(0))); + emit(tasm, masm, asDoubleReg(output(0)), asDoubleReg(input(0))); } }; }