# HG changeset patch
# User zgu
# Date 1304450344 25200
# Node ID e62e515d3a55c66b5c9b1a787d35008e58a65c61
# Parent  f7b5dc171e923fb5e138376b6f52b4e2635bab91# Parent  f78b3a5497f223261129796f0a16aaf4caf0fa99
Merge

diff -r f7b5dc171e92 -r e62e515d3a55 src/os_cpu/linux_x86/vm/orderAccess_linux_x86.inline.hpp
--- a/src/os_cpu/linux_x86/vm/orderAccess_linux_x86.inline.hpp	Tue May 03 10:17:29 2011 -0700
+++ b/src/os_cpu/linux_x86/vm/orderAccess_linux_x86.inline.hpp	Tue May 03 12:19:04 2011 -0700
@@ -93,7 +93,7 @@
 
 inline void     OrderAccess::store_fence(jbyte*  p, jbyte  v) {
   __asm__ volatile (  "xchgb (%2),%0"
-                    : "=r" (v)
+                    : "=q" (v)
                     : "0" (v), "r" (p)
                     : "memory");
 }
@@ -155,7 +155,7 @@
 // Must duplicate definitions instead of calling store_fence because we don't want to cast away volatile.
 inline void     OrderAccess::release_store_fence(volatile jbyte*  p, jbyte  v) {
   __asm__ volatile (  "xchgb (%2),%0"
-                    : "=r" (v)
+                    : "=q" (v)
                     : "0" (v), "r" (p)
                     : "memory");
 }