# HG changeset patch
# User never
# Date 1240610910 25200
# Node ID fb4c18a2ec66724b469f45193ac218d140c14626
# Parent  aa92a90b1cc654c4057562a731daf90db6733871
6833573: C2 sparc: assert(c < 64 && (c & 1) == 0,"bad double float register")
Reviewed-by: twisti

diff -r aa92a90b1cc6 -r fb4c18a2ec66 src/cpu/sparc/vm/sparc.ad
--- a/src/cpu/sparc/vm/sparc.ad	Fri Apr 24 09:14:39 2009 -0700
+++ b/src/cpu/sparc/vm/sparc.ad	Fri Apr 24 15:08:30 2009 -0700
@@ -2794,7 +2794,9 @@
     AddressLiteral addrlit(double_address, rspec);
 
     __ sethi(addrlit, $tmp$$Register);
-    __ ldf(FloatRegisterImpl::D, $tmp$$Register, addrlit.low10(), $dst$$FloatRegister, rspec);
+    // XXX This is a quick fix for 6833573.
+    //__ ldf(FloatRegisterImpl::D, $tmp$$Register, addrlit.low10(), $dst$$FloatRegister, rspec);
+    __ ldf(FloatRegisterImpl::D, $tmp$$Register, addrlit.low10(), as_DoubleFloatRegister($dst$$reg), rspec);
   %}
 
   // Compiler ensures base is doubleword aligned and cnt is count of doublewords
@@ -5902,7 +5904,9 @@
     AddressLiteral addrlit(double_address, rspec);
 
     __ sethi(addrlit, $tmp$$Register);
-    __ ldf(FloatRegisterImpl::D, $tmp$$Register, addrlit.low10(), $dst$$FloatRegister, rspec);
+    // XXX This is a quick fix for 6833573.
+    //__ ldf(FloatRegisterImpl::D, $tmp$$Register, addrlit.low10(), $dst$$FloatRegister, rspec);
+    __ ldf(FloatRegisterImpl::D, $tmp$$Register, addrlit.low10(), as_DoubleFloatRegister($dst$$reg), rspec);
   %}
   ins_pipe(loadConFD);
 %}