Mercurial > hg > truffle
changeset 327:1eb509f14356
Merge
author | acorn |
---|---|
date | Thu, 11 Sep 2008 09:02:02 -0400 |
parents | 24fc405437c9 (current diff) f9847b70eccd (diff) |
children | 0ba3ec980ae5 |
files | |
diffstat | 3 files changed, 5 insertions(+), 3 deletions(-) [+] |
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--- a/src/cpu/x86/vm/c1_LIRAssembler_x86.cpp Wed Sep 10 12:31:26 2008 -0400 +++ b/src/cpu/x86/vm/c1_LIRAssembler_x86.cpp Thu Sep 11 09:02:02 2008 -0400 @@ -1129,8 +1129,8 @@ #else __ pushl(frame_map()->address_for_slot(src ->double_stack_ix(), 0)); // push and pop the part at src + wordSize, adding wordSize for the previous push - __ pushl(frame_map()->address_for_slot(src ->double_stack_ix(), wordSize)); - __ popl (frame_map()->address_for_slot(dest->double_stack_ix(), wordSize)); + __ pushl(frame_map()->address_for_slot(src ->double_stack_ix(), 2 * wordSize)); + __ popl (frame_map()->address_for_slot(dest->double_stack_ix(), 2 * wordSize)); __ popl (frame_map()->address_for_slot(dest->double_stack_ix(), 0)); #endif // _LP64
--- a/src/share/vm/opto/addnode.cpp Wed Sep 10 12:31:26 2008 -0400 +++ b/src/share/vm/opto/addnode.cpp Thu Sep 11 09:02:02 2008 -0400 @@ -157,6 +157,7 @@ Node *a12 = add1->in(2); const Type *t12 = phase->type( a12 ); if( t12->singleton() && t12 != Type::TOP && (add1 != add1->in(1)) ) { + assert(add1->in(1) != this, "dead loop in AddNode::Ideal"); add2 = add1->clone(); add2->set_req(2, in(2)); add2 = phase->transform(add2); @@ -173,6 +174,7 @@ Node *a22 = add2->in(2); const Type *t22 = phase->type( a22 ); if( t22->singleton() && t22 != Type::TOP && (add2 != add2->in(1)) ) { + assert(add2->in(1) != this, "dead loop in AddNode::Ideal"); Node *addx = add2->clone(); addx->set_req(1, in(1)); addx->set_req(2, add2->in(1));
--- a/src/share/vm/opto/loopopts.cpp Wed Sep 10 12:31:26 2008 -0400 +++ b/src/share/vm/opto/loopopts.cpp Thu Sep 11 09:02:02 2008 -0400 @@ -932,7 +932,7 @@ // to fold a StoreP and an AddP together (as part of an // address expression) and the AddP and StoreP have // different controls. - if( !x->is_Load() ) _igvn._worklist.yank(x); + if( !x->is_Load() && !x->is_DecodeN() ) _igvn._worklist.yank(x); } _igvn.remove_dead_node(n); }