changeset 18732:d611982fb10e

Fixed decoding of call instruction Contributed-by: vladimir.kozlov@oracle.com
author Tom Rodriguez <tom.rodriguez@oracle.com>
date Fri, 19 Dec 2014 12:40:00 -0800
parents 97f2038b7c4a
children d7ec30ebb0f2
files src/cpu/x86/vm/graalCodeInstaller_x86.cpp
diffstat 1 files changed, 6 insertions(+), 2 deletions(-) [+]
line wrap: on
line diff
--- a/src/cpu/x86/vm/graalCodeInstaller_x86.cpp	Fri Dec 19 21:31:34 2014 +0100
+++ b/src/cpu/x86/vm/graalCodeInstaller_x86.cpp	Fri Dec 19 12:40:00 2014 -0800
@@ -42,8 +42,12 @@
     // mov+call instruction pair
     jint offset = pc_offset + NativeMovConstReg::instruction_size;
     u_char* call = (u_char*) (_instructions->start() + offset);
-    assert((call[0] == 0x40 || call[0] == 0x41) && call[1] == 0xFF, "expected call with rex/rexb prefix byte");
-    offset += 3; /* prefix byte + opcode byte + modrm byte */
+    if (call[0] == Assembler::REX_B) {
+      offset += 1; /* prefix byte for extended register R8-R15 */
+      call++;
+    }
+    assert(call[0] == 0xFF, "expected call");
+    offset += 2; /* opcode byte + modrm byte */
     return (offset);
   } else if (inst->is_call_reg()) {
     // the inlined vtable stub contains a "call register" instruction