Mercurial > hg > truffle
changeset 18841:f2f2897880c8
Avoid unnecessary register-register move before IMUL instructions.
| author | Roland Schatz <roland.schatz@oracle.com> |
|---|---|
| date | Mon, 12 Jan 2015 15:56:59 +0100 |
| parents | 4d1cf05c7545 |
| children | 437894ecd7c5 |
| files | graal/com.oracle.graal.asm.amd64/src/com/oracle/graal/asm/amd64/AMD64Assembler.java graal/com.oracle.graal.lir.amd64/src/com/oracle/graal/lir/amd64/AMD64Arithmetic.java |
| diffstat | 2 files changed, 52 insertions(+), 10 deletions(-) [+] |
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--- a/graal/com.oracle.graal.asm.amd64/src/com/oracle/graal/asm/amd64/AMD64Assembler.java Mon Jan 12 14:10:07 2015 +0100 +++ b/graal/com.oracle.graal.asm.amd64/src/com/oracle/graal/asm/amd64/AMD64Assembler.java Mon Jan 12 15:56:59 2015 +0100 @@ -1,5 +1,5 @@ /* - * Copyright (c) 2009, 2014, Oracle and/or its affiliates. All rights reserved. + * Copyright (c) 2009, 2015, Oracle and/or its affiliates. All rights reserved. * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. * * This code is free software; you can redistribute it and/or modify it @@ -842,6 +842,19 @@ } } + public final void imull(Register dst, AMD64Address src, int value) { + prefix(src, dst); + if (isByte(value)) { + emitByte(0x6B); + emitOperandHelper(dst, src); + emitByte(value & 0xFF); + } else { + emitByte(0x69); + emitOperandHelper(dst, src); + emitInt(value); + } + } + protected final void incl(AMD64Address dst) { prefix(dst); emitByte(0xFF); @@ -2500,6 +2513,19 @@ } } + public final void imulq(Register dst, AMD64Address src, int value) { + prefixq(src, dst); + if (isByte(value)) { + emitByte(0x6B); + emitOperandHelper(dst, src); + emitByte(value & 0xFF); + } else { + emitByte(0x69); + emitOperandHelper(dst, src); + emitInt(value); + } + } + public final void incq(Register dst) { // Don't use it directly. Use Macroincrementq() instead. // Use two-byte form (one-byte from is a REX prefix in 64-bit mode)
--- a/graal/com.oracle.graal.lir.amd64/src/com/oracle/graal/lir/amd64/AMD64Arithmetic.java Mon Jan 12 14:10:07 2015 +0100 +++ b/graal/com.oracle.graal.lir.amd64/src/com/oracle/graal/lir/amd64/AMD64Arithmetic.java Mon Jan 12 15:56:59 2015 +0100 @@ -1,5 +1,5 @@ /* - * Copyright (c) 2011, 2014, Oracle and/or its affiliates. All rights reserved. + * Copyright (c) 2011, 2015, Oracle and/or its affiliates. All rights reserved. * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. * * This code is free software; you can redistribute it and/or modify it @@ -331,8 +331,30 @@ @Override public void emitCode(CompilationResultBuilder crb, AMD64MacroAssembler masm) { - AMD64Move.move(crb, masm, result, x); - emit(crb, masm, opcode, result, y, null); + if (isRegister(x)) { + switch (opcode) { + case IMUL: + masm.imull(asIntReg(result), asIntReg(x), y.asInt()); + break; + case LMUL: + masm.imulq(asLongReg(result), asLongReg(x), y.asInt()); + break; + default: + throw GraalInternalError.shouldNotReachHere(); + } + } else { + assert isStackSlot(x); + switch (opcode) { + case IMUL: + masm.imull(asIntReg(result), (AMD64Address) crb.asIntAddr(x), y.asInt()); + break; + case LMUL: + masm.imulq(asLongReg(result), (AMD64Address) crb.asLongAddr(x), y.asInt()); + break; + default: + throw GraalInternalError.shouldNotReachHere(); + } + } } @Override @@ -746,9 +768,6 @@ case ISUB: masm.decrementl(asIntReg(dst), crb.asIntConst(src)); break; - case IMUL: - masm.imull(asIntReg(dst), asIntReg(dst), crb.asIntConst(src)); - break; case IAND: masm.andl(asIntReg(dst), crb.asIntConst(src)); break; @@ -780,9 +799,6 @@ case LSUB: masm.subq(asLongReg(dst), crb.asIntConst(src)); break; - case LMUL: - masm.imulq(asLongReg(dst), asLongReg(dst), crb.asIntConst(src)); - break; case LAND: masm.andq(asLongReg(dst), crb.asIntConst(src)); break;