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changeset 7922:fb4d914f6bef

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Fix wrong type in LMUL instruction.
author Roland Schatz <roland.schatz@oracle.com>
date Mon, 04 Mar 2013 17:20:55 +0100
parents 1b591118d01e
children 17d0bdb44cb6 b6a87711eca0 3362be58312a
files graal/com.oracle.graal.lir.amd64/src/com/oracle/graal/lir/amd64/AMD64Arithmetic.java
diffstat 1 files changed, 1 insertions(+), 1 deletions(-) [+]
line wrap: on
line diff
--- a/graal/com.oracle.graal.lir.amd64/src/com/oracle/graal/lir/amd64/AMD64Arithmetic.java	Mon Mar 04 17:02:52 2013 +0100
+++ b/graal/com.oracle.graal.lir.amd64/src/com/oracle/graal/lir/amd64/AMD64Arithmetic.java	Mon Mar 04 17:20:55 2013 +0100
@@ -442,7 +442,7 @@
 
                 case LADD: masm.addq(asLongReg(dst), (AMD64Address) tasm.asLongAddr(src)); break;
                 case LSUB: masm.subq(asLongReg(dst), (AMD64Address) tasm.asLongAddr(src)); break;
-                case LMUL: masm.imulq(asIntReg(dst), (AMD64Address) tasm.asIntAddr(src)); break;
+                case LMUL: masm.imulq(asLongReg(dst), (AMD64Address) tasm.asLongAddr(src)); break;
                 case LAND: masm.andq(asLongReg(dst), (AMD64Address) tasm.asLongAddr(src)); break;
                 case LOR:  masm.orq(asLongReg(dst),  (AMD64Address) tasm.asLongAddr(src)); break;
                 case LXOR: masm.xorq(asLongReg(dst), (AMD64Address) tasm.asLongAddr(src)); break;