001/*
002 * Copyright (c) 2013, Oracle and/or its affiliates. All rights reserved.
003 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
004 *
005 * This code is free software; you can redistribute it and/or modify it
006 * under the terms of the GNU General Public License version 2 only, as
007 * published by the Free Software Foundation.
008 *
009 * This code is distributed in the hope that it will be useful, but WITHOUT
010 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
011 * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
012 * version 2 for more details (a copy is included in the LICENSE file that
013 * accompanied this code).
014 *
015 * You should have received a copy of the GNU General Public License version
016 * 2 along with this work; if not, write to the Free Software Foundation,
017 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
018 *
019 * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
020 * or visit www.oracle.com if you need additional information or have any
021 * questions.
022 */
023package com.oracle.graal.hotspot.amd64;
024
025import jdk.internal.jvmci.code.*;
026import jdk.internal.jvmci.hotspot.*;
027import jdk.internal.jvmci.meta.*;
028import static com.oracle.graal.lir.LIRInstruction.OperandFlag.*;
029import static jdk.internal.jvmci.amd64.AMD64.*;
030import static jdk.internal.jvmci.code.ValueUtil.*;
031
032import com.oracle.graal.asm.amd64.*;
033import com.oracle.graal.lir.*;
034import com.oracle.graal.lir.amd64.*;
035import com.oracle.graal.lir.asm.*;
036
037/**
038 * Pushes an interpreter frame to the stack.
039 */
040@Opcode("PUSH_INTERPRETER_FRAME")
041final class AMD64HotSpotPushInterpreterFrameOp extends AMD64LIRInstruction {
042    public static final LIRInstructionClass<AMD64HotSpotPushInterpreterFrameOp> TYPE = LIRInstructionClass.create(AMD64HotSpotPushInterpreterFrameOp.class);
043
044    @Alive(REG) AllocatableValue frameSize;
045    @Alive(REG) AllocatableValue framePc;
046    @Alive(REG) AllocatableValue senderSp;
047    @Alive(REG) AllocatableValue initialInfo;
048    private final HotSpotVMConfig config;
049
050    AMD64HotSpotPushInterpreterFrameOp(AllocatableValue frameSize, AllocatableValue framePc, AllocatableValue senderSp, AllocatableValue initialInfo, HotSpotVMConfig config) {
051        super(TYPE);
052        this.frameSize = frameSize;
053        this.framePc = framePc;
054        this.senderSp = senderSp;
055        this.initialInfo = initialInfo;
056        this.config = config;
057    }
058
059    @Override
060    public void emitCode(CompilationResultBuilder crb, AMD64MacroAssembler masm) {
061        final Register frameSizeRegister = asRegister(frameSize);
062        final Register framePcRegister = asRegister(framePc);
063        final Register senderSpRegister = asRegister(senderSp);
064        final Register initialInfoRegister = asRegister(initialInfo);
065        final int wordSize = 8;
066
067        // We'll push PC and BP by hand.
068        masm.subq(frameSizeRegister, 2 * wordSize);
069
070        // Push return address.
071        masm.push(framePcRegister);
072
073        // Prolog
074        masm.push(initialInfoRegister);
075        masm.movq(initialInfoRegister, rsp);
076        masm.subq(rsp, frameSizeRegister);
077
078        // This value is corrected by layout_activation_impl.
079        masm.movptr(new AMD64Address(initialInfoRegister, config.frameInterpreterFrameLastSpOffset * wordSize), 0);
080
081        // Make the frame walkable.
082        masm.movq(new AMD64Address(initialInfoRegister, config.frameInterpreterFrameSenderSpOffset * wordSize), senderSpRegister);
083    }
084}