001/*
002 * Copyright (c) 2011, 2015, Oracle and/or its affiliates. All rights reserved.
003 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
004 *
005 * This code is free software; you can redistribute it and/or modify it
006 * under the terms of the GNU General Public License version 2 only, as
007 * published by the Free Software Foundation.
008 *
009 * This code is distributed in the hope that it will be useful, but WITHOUT
010 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
011 * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
012 * version 2 for more details (a copy is included in the LICENSE file that
013 * accompanied this code).
014 *
015 * You should have received a copy of the GNU General Public License version
016 * 2 along with this work; if not, write to the Free Software Foundation,
017 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
018 *
019 * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
020 * or visit www.oracle.com if you need additional information or have any
021 * questions.
022 */
023package com.oracle.graal.lir.amd64;
024
025import jdk.internal.jvmci.common.*;
026import jdk.internal.jvmci.meta.*;
027import static jdk.internal.jvmci.code.ValueUtil.*;
028
029import com.oracle.graal.asm.amd64.*;
030import com.oracle.graal.lir.*;
031import com.oracle.graal.lir.asm.*;
032
033// @formatter:off
034public final class AMD64MathIntrinsicOp extends AMD64LIRInstruction {
035    public static final LIRInstructionClass<AMD64MathIntrinsicOp> TYPE = LIRInstructionClass.create(AMD64MathIntrinsicOp.class);
036    public enum IntrinsicOpcode  {
037        SIN, COS, TAN,
038        LOG, LOG10
039    }
040
041    @Opcode private final IntrinsicOpcode opcode;
042    @Def protected Value result;
043    @Use protected Value input;
044
045    public AMD64MathIntrinsicOp(IntrinsicOpcode opcode, Value result, Value input) {
046        super(TYPE);
047        this.opcode = opcode;
048        this.result = result;
049        this.input = input;
050    }
051
052    @Override
053    public void emitCode(CompilationResultBuilder crb, AMD64MacroAssembler masm) {
054        switch (opcode) {
055            case LOG:   masm.flog(asDoubleReg(result), asDoubleReg(input), false); break;
056            case LOG10: masm.flog(asDoubleReg(result), asDoubleReg(input), true); break;
057            case SIN:   masm.fsin(asDoubleReg(result), asDoubleReg(input)); break;
058            case COS:   masm.fcos(asDoubleReg(result), asDoubleReg(input)); break;
059            case TAN:   masm.ftan(asDoubleReg(result), asDoubleReg(input)); break;
060            default:    throw JVMCIError.shouldNotReachHere();
061        }
062    }
063}