Mercurial > hg > graal-compiler
annotate src/share/vm/opto/machnode.hpp @ 14428:044b28168e20
8003854: PPC64 (part 115): Introduce PostallocExpand that expands nodes after register allocation
Summary: added ability in C2 to expand mach nodes to several mach nodes after register allocation
Reviewed-by: kvn
author | goetz |
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date | Thu, 14 Nov 2013 19:24:59 -0800 |
parents | 9758d9f36299 |
children | 1410ad6b05f1 |
rev | line source |
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0 | 1 /* |
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2 * Copyright (c) 1997, 2013, Oracle and/or its affiliates. All rights reserved. |
0 | 3 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. |
4 * | |
5 * This code is free software; you can redistribute it and/or modify it | |
6 * under the terms of the GNU General Public License version 2 only, as | |
7 * published by the Free Software Foundation. | |
8 * | |
9 * This code is distributed in the hope that it will be useful, but WITHOUT | |
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or | |
11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License | |
12 * version 2 for more details (a copy is included in the LICENSE file that | |
13 * accompanied this code). | |
14 * | |
15 * You should have received a copy of the GNU General Public License version | |
16 * 2 along with this work; if not, write to the Free Software Foundation, | |
17 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA. | |
18 * | |
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19 * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA |
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20 * or visit www.oracle.com if you need additional information or have any |
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21 * questions. |
0 | 22 * |
23 */ | |
24 | |
1972 | 25 #ifndef SHARE_VM_OPTO_MACHNODE_HPP |
26 #define SHARE_VM_OPTO_MACHNODE_HPP | |
27 | |
28 #include "opto/callnode.hpp" | |
29 #include "opto/matcher.hpp" | |
30 #include "opto/multnode.hpp" | |
31 #include "opto/node.hpp" | |
32 #include "opto/regmask.hpp" | |
33 | |
0 | 34 class BufferBlob; |
35 class CodeBuffer; | |
36 class JVMState; | |
37 class MachCallDynamicJavaNode; | |
38 class MachCallJavaNode; | |
39 class MachCallLeafNode; | |
40 class MachCallNode; | |
41 class MachCallRuntimeNode; | |
42 class MachCallStaticJavaNode; | |
43 class MachEpilogNode; | |
44 class MachIfNode; | |
45 class MachNullCheckNode; | |
46 class MachOper; | |
47 class MachProjNode; | |
48 class MachPrologNode; | |
49 class MachReturnNode; | |
50 class MachSafePointNode; | |
51 class MachSpillCopyNode; | |
52 class Matcher; | |
53 class PhaseRegAlloc; | |
54 class RegMask; | |
55 class State; | |
56 | |
57 //---------------------------MachOper------------------------------------------ | |
58 class MachOper : public ResourceObj { | |
59 public: | |
60 // Allocate right next to the MachNodes in the same arena | |
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61 void *operator new( size_t x, Compile* C ) throw() { return C->node_arena()->Amalloc_D(x); } |
0 | 62 |
63 // Opcode | |
64 virtual uint opcode() const = 0; | |
65 | |
66 // Number of input edges. | |
67 // Generally at least 1 | |
68 virtual uint num_edges() const { return 1; } | |
69 // Array of Register masks | |
70 virtual const RegMask *in_RegMask(int index) const; | |
71 | |
72 // Methods to output the encoding of the operand | |
73 | |
74 // Negate conditional branches. Error for non-branch Nodes | |
75 virtual void negate(); | |
76 | |
77 // Return the value requested | |
78 // result register lookup, corresponding to int_format | |
79 virtual int reg(PhaseRegAlloc *ra_, const Node *node) const; | |
80 // input register lookup, corresponding to ext_format | |
81 virtual int reg(PhaseRegAlloc *ra_, const Node *node, int idx) const; | |
82 | |
83 // helpers for MacroAssembler generation from ADLC | |
84 Register as_Register(PhaseRegAlloc *ra_, const Node *node) const { | |
85 return ::as_Register(reg(ra_, node)); | |
86 } | |
87 Register as_Register(PhaseRegAlloc *ra_, const Node *node, int idx) const { | |
88 return ::as_Register(reg(ra_, node, idx)); | |
89 } | |
90 FloatRegister as_FloatRegister(PhaseRegAlloc *ra_, const Node *node) const { | |
91 return ::as_FloatRegister(reg(ra_, node)); | |
92 } | |
93 FloatRegister as_FloatRegister(PhaseRegAlloc *ra_, const Node *node, int idx) const { | |
94 return ::as_FloatRegister(reg(ra_, node, idx)); | |
95 } | |
96 | |
97 #if defined(IA32) || defined(AMD64) | |
98 XMMRegister as_XMMRegister(PhaseRegAlloc *ra_, const Node *node) const { | |
99 return ::as_XMMRegister(reg(ra_, node)); | |
100 } | |
101 XMMRegister as_XMMRegister(PhaseRegAlloc *ra_, const Node *node, int idx) const { | |
102 return ::as_XMMRegister(reg(ra_, node, idx)); | |
103 } | |
104 #endif | |
105 | |
106 virtual intptr_t constant() const; | |
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107 virtual relocInfo::relocType constant_reloc() const; |
0 | 108 virtual jdouble constantD() const; |
109 virtual jfloat constantF() const; | |
110 virtual jlong constantL() const; | |
111 virtual TypeOopPtr *oop() const; | |
112 virtual int ccode() const; | |
113 // A zero, default, indicates this value is not needed. | |
114 // May need to lookup the base register, as done in int_ and ext_format | |
115 virtual int base (PhaseRegAlloc *ra_, const Node *node, int idx) const; | |
116 virtual int index(PhaseRegAlloc *ra_, const Node *node, int idx) const; | |
117 virtual int scale() const; | |
118 // Parameters needed to support MEMORY_INTERFACE access to stackSlot | |
119 virtual int disp (PhaseRegAlloc *ra_, const Node *node, int idx) const; | |
120 // Check for PC-Relative displacement | |
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121 virtual relocInfo::relocType disp_reloc() const; |
0 | 122 virtual int constant_disp() const; // usu. 0, may return Type::OffsetBot |
123 virtual int base_position() const; // base edge position, or -1 | |
124 virtual int index_position() const; // index edge position, or -1 | |
125 | |
126 // Access the TypeKlassPtr of operands with a base==RegI and disp==RegP | |
127 // Only returns non-null value for i486.ad's indOffset32X | |
128 virtual const TypePtr *disp_as_type() const { return NULL; } | |
129 | |
130 // Return the label | |
131 virtual Label *label() const; | |
132 | |
133 // Return the method's address | |
134 virtual intptr_t method() const; | |
135 | |
136 // Hash and compare over operands are currently identical | |
137 virtual uint hash() const; | |
138 virtual uint cmp( const MachOper &oper ) const; | |
139 | |
140 // Virtual clone, since I do not know how big the MachOper is. | |
141 virtual MachOper *clone(Compile* C) const = 0; | |
142 | |
143 // Return ideal Type from simple operands. Fail for complex operands. | |
144 virtual const Type *type() const; | |
145 | |
146 // Set an integer offset if we have one, or error otherwise | |
147 virtual void set_con( jint c0 ) { ShouldNotReachHere(); } | |
148 | |
149 #ifndef PRODUCT | |
150 // Return name of operand | |
151 virtual const char *Name() const { return "???";} | |
152 | |
153 // Methods to output the text version of the operand | |
154 virtual void int_format(PhaseRegAlloc *,const MachNode *node, outputStream *st) const = 0; | |
155 virtual void ext_format(PhaseRegAlloc *,const MachNode *node,int idx, outputStream *st) const=0; | |
156 | |
157 virtual void dump_spec(outputStream *st) const; // Print per-operand info | |
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158 |
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159 // Check whether o is a valid oper. |
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160 static bool notAnOper(const MachOper *o) { |
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161 if (o == NULL) return true; |
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162 if (((intptr_t)o & 1) != 0) return true; |
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163 if (*(address*)o == badAddress) return true; // kill by Node::destruct |
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164 return false; |
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165 } |
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166 #endif // !PRODUCT |
0 | 167 }; |
168 | |
169 //------------------------------MachNode--------------------------------------- | |
170 // Base type for all machine specific nodes. All node classes generated by the | |
171 // ADLC inherit from this class. | |
172 class MachNode : public Node { | |
173 public: | |
174 MachNode() : Node((uint)0), _num_opnds(0), _opnds(NULL) { | |
175 init_class_id(Class_Mach); | |
176 } | |
177 // Required boilerplate | |
178 virtual uint size_of() const { return sizeof(MachNode); } | |
179 virtual int Opcode() const; // Always equal to MachNode | |
180 virtual uint rule() const = 0; // Machine-specific opcode | |
181 // Number of inputs which come before the first operand. | |
182 // Generally at least 1, to skip the Control input | |
183 virtual uint oper_input_base() const { return 1; } | |
184 | |
185 // Copy inputs and operands to new node of instruction. | |
186 // Called from cisc_version() and short_branch_version(). | |
187 // !!!! The method's body is defined in ad_<arch>.cpp file. | |
188 void fill_new_machnode(MachNode *n, Compile* C) const; | |
189 | |
190 // Return an equivalent instruction using memory for cisc_operand position | |
191 virtual MachNode *cisc_version(int offset, Compile* C); | |
192 // Modify this instruction's register mask to use stack version for cisc_operand | |
193 virtual void use_cisc_RegMask(); | |
194 | |
195 // Support for short branches | |
196 bool may_be_short_branch() const { return (flags() & Flag_may_be_short_branch) != 0; } | |
197 | |
3851 | 198 // Avoid back to back some instructions on some CPUs. |
199 bool avoid_back_to_back() const { return (flags() & Flag_avoid_back_to_back) != 0; } | |
200 | |
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201 // instruction implemented with a call |
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202 bool has_call() const { return (flags() & Flag_has_call) != 0; } |
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203 |
0 | 204 // First index in _in[] corresponding to operand, or -1 if there is none |
205 int operand_index(uint operand) const; | |
206 | |
207 // Register class input is expected in | |
208 virtual const RegMask &in_RegMask(uint) const; | |
209 | |
210 // cisc-spillable instructions redefine for use by in_RegMask | |
211 virtual const RegMask *cisc_RegMask() const { return NULL; } | |
212 | |
213 // If this instruction is a 2-address instruction, then return the | |
214 // index of the input which must match the output. Not nessecary | |
215 // for instructions which bind the input and output register to the | |
216 // same singleton regiser (e.g., Intel IDIV which binds AX to be | |
217 // both an input and an output). It is nessecary when the input and | |
218 // output have choices - but they must use the same choice. | |
219 virtual uint two_adr( ) const { return 0; } | |
220 | |
221 // Array of complex operand pointers. Each corresponds to zero or | |
222 // more leafs. Must be set by MachNode constructor to point to an | |
223 // internal array of MachOpers. The MachOper array is sized by | |
224 // specific MachNodes described in the ADL. | |
225 uint _num_opnds; | |
226 MachOper **_opnds; | |
227 uint num_opnds() const { return _num_opnds; } | |
228 | |
229 // Emit bytes into cbuf | |
230 virtual void emit(CodeBuffer &cbuf, PhaseRegAlloc *ra_) const; | |
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231 // Expand node after register allocation. |
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232 // Node is replaced by several nodes in the postalloc expand phase. |
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233 // Corresponding methods are generated for nodes if they specify |
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234 // postalloc_expand. See block.cpp for more documentation. |
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235 virtual bool requires_postalloc_expand() const { return false; } |
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236 virtual void postalloc_expand(GrowableArray <Node *> *nodes, PhaseRegAlloc *ra_); |
0 | 237 // Size of instruction in bytes |
238 virtual uint size(PhaseRegAlloc *ra_) const; | |
239 // Helper function that computes size by emitting code | |
240 virtual uint emit_size(PhaseRegAlloc *ra_) const; | |
241 | |
242 // Return the alignment required (in units of relocInfo::addr_unit()) | |
243 // for this instruction (must be a power of 2) | |
244 virtual int alignment_required() const { return 1; } | |
245 | |
246 // Return the padding (in bytes) to be emitted before this | |
247 // instruction to properly align it. | |
248 virtual int compute_padding(int current_offset) const { return 0; } | |
249 | |
250 // Return number of relocatable values contained in this instruction | |
251 virtual int reloc() const { return 0; } | |
252 | |
253 // Hash and compare over operands. Used to do GVN on machine Nodes. | |
254 virtual uint hash() const; | |
255 virtual uint cmp( const Node &n ) const; | |
256 | |
257 // Expand method for MachNode, replaces nodes representing pseudo | |
258 // instructions with a set of nodes which represent real machine | |
259 // instructions and compute the same value. | |
1203 | 260 virtual MachNode *Expand( State *, Node_List &proj_list, Node* mem ) { return this; } |
0 | 261 |
262 // Bottom_type call; value comes from operand0 | |
263 virtual const class Type *bottom_type() const { return _opnds[0]->type(); } | |
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264 virtual uint ideal_reg() const { const Type *t = _opnds[0]->type(); return t == TypeInt::CC ? Op_RegFlags : t->ideal_reg(); } |
0 | 265 |
266 // If this is a memory op, return the base pointer and fixed offset. | |
267 // If there are no such, return NULL. If there are multiple addresses | |
268 // or the address is indeterminate (rare cases) then return (Node*)-1, | |
269 // which serves as node bottom. | |
270 // If the offset is not statically determined, set it to Type::OffsetBot. | |
271 // This method is free to ignore stack slots if that helps. | |
272 #define TYPE_PTR_SENTINAL ((const TypePtr*)-1) | |
273 // Passing TYPE_PTR_SENTINAL as adr_type asks for computation of the adr_type if possible | |
274 const Node* get_base_and_disp(intptr_t &offset, const TypePtr* &adr_type) const; | |
275 | |
276 // Helper for get_base_and_disp: find the base and index input nodes. | |
277 // Returns the MachOper as determined by memory_operand(), for use, if | |
278 // needed by the caller. If (MachOper *)-1 is returned, base and index | |
279 // are set to NodeSentinel. If (MachOper *) NULL is returned, base and | |
280 // index are set to NULL. | |
281 const MachOper* memory_inputs(Node* &base, Node* &index) const; | |
282 | |
283 // Helper for memory_inputs: Which operand carries the necessary info? | |
284 // By default, returns NULL, which means there is no such operand. | |
285 // If it returns (MachOper*)-1, this means there are multiple memories. | |
286 virtual const MachOper* memory_operand() const { return NULL; } | |
287 | |
288 // Call "get_base_and_disp" to decide which category of memory is used here. | |
289 virtual const class TypePtr *adr_type() const; | |
290 | |
291 // Apply peephole rule(s) to this instruction | |
292 virtual MachNode *peephole( Block *block, int block_index, PhaseRegAlloc *ra_, int &deleted, Compile* C ); | |
293 | |
294 // Top-level ideal Opcode matched | |
295 virtual int ideal_Opcode() const { return Op_Node; } | |
296 | |
297 // Adds the label for the case | |
298 virtual void add_case_label( int switch_val, Label* blockLabel); | |
299 | |
300 // Set the absolute address for methods | |
301 virtual void method_set( intptr_t addr ); | |
302 | |
303 // Should we clone rather than spill this instruction? | |
304 bool rematerialize() const; | |
305 | |
306 // Get the pipeline info | |
307 static const Pipeline *pipeline_class(); | |
308 virtual const Pipeline *pipeline() const; | |
309 | |
310 #ifndef PRODUCT | |
311 virtual const char *Name() const = 0; // Machine-specific name | |
312 virtual void dump_spec(outputStream *st) const; // Print per-node info | |
313 void dump_format(PhaseRegAlloc *ra, outputStream *st) const; // access to virtual | |
314 #endif | |
315 }; | |
316 | |
317 //------------------------------MachIdealNode---------------------------- | |
318 // Machine specific versions of nodes that must be defined by user. | |
319 // These are not converted by matcher from ideal nodes to machine nodes | |
320 // but are inserted into the code by the compiler. | |
321 class MachIdealNode : public MachNode { | |
322 public: | |
323 MachIdealNode( ) {} | |
324 | |
325 // Define the following defaults for non-matched machine nodes | |
326 virtual uint oper_input_base() const { return 0; } | |
327 virtual uint rule() const { return 9999999; } | |
328 virtual const class Type *bottom_type() const { return _opnds == NULL ? Type::CONTROL : MachNode::bottom_type(); } | |
329 }; | |
330 | |
331 //------------------------------MachTypeNode---------------------------- | |
332 // Machine Nodes that need to retain a known Type. | |
333 class MachTypeNode : public MachNode { | |
334 virtual uint size_of() const { return sizeof(*this); } // Size is bigger | |
335 public: | |
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336 MachTypeNode( ) {} |
0 | 337 const Type *_bottom_type; |
338 | |
339 virtual const class Type *bottom_type() const { return _bottom_type; } | |
340 #ifndef PRODUCT | |
341 virtual void dump_spec(outputStream *st) const; | |
342 #endif | |
343 }; | |
344 | |
345 //------------------------------MachBreakpointNode---------------------------- | |
346 // Machine breakpoint or interrupt Node | |
347 class MachBreakpointNode : public MachIdealNode { | |
348 public: | |
349 MachBreakpointNode( ) {} | |
350 virtual void emit(CodeBuffer &cbuf, PhaseRegAlloc *ra_) const; | |
351 virtual uint size(PhaseRegAlloc *ra_) const; | |
352 | |
353 #ifndef PRODUCT | |
354 virtual const char *Name() const { return "Breakpoint"; } | |
355 virtual void format( PhaseRegAlloc *, outputStream *st ) const; | |
356 #endif | |
357 }; | |
358 | |
2008 | 359 //------------------------------MachConstantBaseNode-------------------------- |
360 // Machine node that represents the base address of the constant table. | |
361 class MachConstantBaseNode : public MachIdealNode { | |
362 public: | |
363 static const RegMask& _out_RegMask; // We need the out_RegMask statically in MachConstantNode::in_RegMask(). | |
364 | |
365 public: | |
366 MachConstantBaseNode() : MachIdealNode() { | |
367 init_class_id(Class_MachConstantBase); | |
368 } | |
369 virtual const class Type* bottom_type() const { return TypeRawPtr::NOTNULL; } | |
370 virtual uint ideal_reg() const { return Op_RegP; } | |
371 virtual uint oper_input_base() const { return 1; } | |
372 | |
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373 virtual bool requires_postalloc_expand() const; |
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374 virtual void postalloc_expand(GrowableArray <Node *> *nodes, PhaseRegAlloc *ra_); |
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375 |
2008 | 376 virtual void emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const; |
377 virtual uint size(PhaseRegAlloc* ra_) const; | |
378 virtual bool pinned() const { return UseRDPCForConstantTableBase; } | |
379 | |
380 static const RegMask& static_out_RegMask() { return _out_RegMask; } | |
381 virtual const RegMask& out_RegMask() const { return static_out_RegMask(); } | |
382 | |
383 #ifndef PRODUCT | |
384 virtual const char* Name() const { return "MachConstantBaseNode"; } | |
385 virtual void format(PhaseRegAlloc*, outputStream* st) const; | |
386 #endif | |
387 }; | |
388 | |
389 //------------------------------MachConstantNode------------------------------- | |
390 // Machine node that holds a constant which is stored in the constant table. | |
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391 class MachConstantNode : public MachTypeNode { |
2008 | 392 protected: |
393 Compile::Constant _constant; // This node's constant. | |
394 | |
395 public: | |
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396 MachConstantNode() : MachTypeNode() { |
2008 | 397 init_class_id(Class_MachConstant); |
398 } | |
399 | |
400 virtual void eval_constant(Compile* C) { | |
401 #ifdef ASSERT | |
402 tty->print("missing MachConstantNode eval_constant function: "); | |
403 dump(); | |
404 #endif | |
405 ShouldNotCallThis(); | |
406 } | |
407 | |
408 virtual const RegMask &in_RegMask(uint idx) const { | |
409 if (idx == mach_constant_base_node_input()) | |
410 return MachConstantBaseNode::static_out_RegMask(); | |
411 return MachNode::in_RegMask(idx); | |
412 } | |
413 | |
414 // Input edge of MachConstantBaseNode. | |
415 uint mach_constant_base_node_input() const { return req() - 1; } | |
416 | |
417 int constant_offset(); | |
418 int constant_offset() const { return ((MachConstantNode*) this)->constant_offset(); } | |
419 }; | |
420 | |
0 | 421 //------------------------------MachUEPNode----------------------------------- |
422 // Machine Unvalidated Entry Point Node | |
423 class MachUEPNode : public MachIdealNode { | |
424 public: | |
425 MachUEPNode( ) {} | |
426 virtual void emit(CodeBuffer &cbuf, PhaseRegAlloc *ra_) const; | |
427 virtual uint size(PhaseRegAlloc *ra_) const; | |
428 | |
429 #ifndef PRODUCT | |
430 virtual const char *Name() const { return "Unvalidated-Entry-Point"; } | |
431 virtual void format( PhaseRegAlloc *, outputStream *st ) const; | |
432 #endif | |
433 }; | |
434 | |
435 //------------------------------MachPrologNode-------------------------------- | |
436 // Machine function Prolog Node | |
437 class MachPrologNode : public MachIdealNode { | |
438 public: | |
439 MachPrologNode( ) {} | |
440 virtual void emit(CodeBuffer &cbuf, PhaseRegAlloc *ra_) const; | |
441 virtual uint size(PhaseRegAlloc *ra_) const; | |
442 virtual int reloc() const; | |
443 | |
444 #ifndef PRODUCT | |
445 virtual const char *Name() const { return "Prolog"; } | |
446 virtual void format( PhaseRegAlloc *, outputStream *st ) const; | |
447 #endif | |
448 }; | |
449 | |
450 //------------------------------MachEpilogNode-------------------------------- | |
451 // Machine function Epilog Node | |
452 class MachEpilogNode : public MachIdealNode { | |
453 public: | |
454 MachEpilogNode(bool do_poll = false) : _do_polling(do_poll) {} | |
455 virtual void emit(CodeBuffer &cbuf, PhaseRegAlloc *ra_) const; | |
456 virtual uint size(PhaseRegAlloc *ra_) const; | |
457 virtual int reloc() const; | |
458 virtual const Pipeline *pipeline() const; | |
459 | |
460 private: | |
461 bool _do_polling; | |
462 | |
463 public: | |
464 bool do_polling() const { return _do_polling; } | |
465 | |
466 // Offset of safepoint from the beginning of the node | |
467 int safepoint_offset() const; | |
468 | |
469 #ifndef PRODUCT | |
470 virtual const char *Name() const { return "Epilog"; } | |
471 virtual void format( PhaseRegAlloc *, outputStream *st ) const; | |
472 #endif | |
473 }; | |
474 | |
475 //------------------------------MachNopNode----------------------------------- | |
476 // Machine function Nop Node | |
477 class MachNopNode : public MachIdealNode { | |
478 private: | |
479 int _count; | |
480 public: | |
481 MachNopNode( ) : _count(1) {} | |
482 MachNopNode( int count ) : _count(count) {} | |
483 virtual void emit(CodeBuffer &cbuf, PhaseRegAlloc *ra_) const; | |
484 virtual uint size(PhaseRegAlloc *ra_) const; | |
485 | |
486 virtual const class Type *bottom_type() const { return Type::CONTROL; } | |
487 | |
488 virtual int ideal_Opcode() const { return Op_Con; } // bogus; see output.cpp | |
489 virtual const Pipeline *pipeline() const; | |
490 #ifndef PRODUCT | |
491 virtual const char *Name() const { return "Nop"; } | |
492 virtual void format( PhaseRegAlloc *, outputStream *st ) const; | |
493 virtual void dump_spec(outputStream *st) const { } // No per-operand info | |
494 #endif | |
495 }; | |
496 | |
497 //------------------------------MachSpillCopyNode------------------------------ | |
498 // Machine SpillCopy Node. Copies 1 or 2 words from any location to any | |
499 // location (stack or register). | |
500 class MachSpillCopyNode : public MachIdealNode { | |
501 const RegMask *_in; // RegMask for input | |
502 const RegMask *_out; // RegMask for output | |
503 const Type *_type; | |
504 public: | |
505 MachSpillCopyNode( Node *n, const RegMask &in, const RegMask &out ) : | |
506 MachIdealNode(), _in(&in), _out(&out), _type(n->bottom_type()) { | |
507 init_class_id(Class_MachSpillCopy); | |
508 init_flags(Flag_is_Copy); | |
509 add_req(NULL); | |
510 add_req(n); | |
511 } | |
512 virtual uint size_of() const { return sizeof(*this); } | |
513 void set_out_RegMask(const RegMask &out) { _out = &out; } | |
514 void set_in_RegMask(const RegMask &in) { _in = ∈ } | |
515 virtual const RegMask &out_RegMask() const { return *_out; } | |
516 virtual const RegMask &in_RegMask(uint) const { return *_in; } | |
517 virtual const class Type *bottom_type() const { return _type; } | |
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518 virtual uint ideal_reg() const { return _type->ideal_reg(); } |
0 | 519 virtual uint oper_input_base() const { return 1; } |
520 uint implementation( CodeBuffer *cbuf, PhaseRegAlloc *ra_, bool do_size, outputStream* st ) const; | |
521 | |
522 virtual void emit(CodeBuffer &cbuf, PhaseRegAlloc *ra_) const; | |
523 virtual uint size(PhaseRegAlloc *ra_) const; | |
524 | |
525 #ifndef PRODUCT | |
526 virtual const char *Name() const { return "MachSpillCopy"; } | |
527 virtual void format( PhaseRegAlloc *, outputStream *st ) const; | |
528 #endif | |
529 }; | |
530 | |
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531 //------------------------------MachBranchNode-------------------------------- |
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532 // Abstract machine branch Node |
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533 class MachBranchNode : public MachIdealNode { |
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534 public: |
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535 MachBranchNode() : MachIdealNode() { |
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536 init_class_id(Class_MachBranch); |
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537 } |
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538 virtual void label_set(Label* label, uint block_num) = 0; |
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539 virtual void save_label(Label** label, uint* block_num) = 0; |
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540 |
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541 // Support for short branches |
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542 virtual MachNode *short_branch_version(Compile* C) { return NULL; } |
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543 |
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544 virtual bool pinned() const { return true; }; |
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545 }; |
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546 |
0 | 547 //------------------------------MachNullChkNode-------------------------------- |
548 // Machine-dependent null-pointer-check Node. Points a real MachNode that is | |
549 // also some kind of memory op. Turns the indicated MachNode into a | |
550 // conditional branch with good latency on the ptr-not-null path and awful | |
551 // latency on the pointer-is-null path. | |
552 | |
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553 class MachNullCheckNode : public MachBranchNode { |
0 | 554 public: |
555 const uint _vidx; // Index of memop being tested | |
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556 MachNullCheckNode( Node *ctrl, Node *memop, uint vidx ) : MachBranchNode(), _vidx(vidx) { |
0 | 557 init_class_id(Class_MachNullCheck); |
558 add_req(ctrl); | |
559 add_req(memop); | |
560 } | |
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561 virtual uint size_of() const { return sizeof(*this); } |
0 | 562 |
563 virtual void emit(CodeBuffer &cbuf, PhaseRegAlloc *ra_) const; | |
3839 | 564 virtual void label_set(Label* label, uint block_num); |
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565 virtual void save_label(Label** label, uint* block_num); |
0 | 566 virtual void negate() { } |
567 virtual const class Type *bottom_type() const { return TypeTuple::IFBOTH; } | |
568 virtual uint ideal_reg() const { return NotAMachineReg; } | |
569 virtual const RegMask &in_RegMask(uint) const; | |
570 virtual const RegMask &out_RegMask() const { return RegMask::Empty; } | |
571 #ifndef PRODUCT | |
572 virtual const char *Name() const { return "NullCheck"; } | |
573 virtual void format( PhaseRegAlloc *, outputStream *st ) const; | |
574 #endif | |
575 }; | |
576 | |
577 //------------------------------MachProjNode---------------------------------- | |
578 // Machine-dependent Ideal projections (how is that for an oxymoron). Really | |
579 // just MachNodes made by the Ideal world that replicate simple projections | |
580 // but with machine-dependent input & output register masks. Generally | |
581 // produced as part of calling conventions. Normally I make MachNodes as part | |
582 // of the Matcher process, but the Matcher is ill suited to issues involving | |
583 // frame handling, so frame handling is all done in the Ideal world with | |
584 // occasional callbacks to the machine model for important info. | |
585 class MachProjNode : public ProjNode { | |
586 public: | |
3842 | 587 MachProjNode( Node *multi, uint con, const RegMask &out, uint ideal_reg ) : ProjNode(multi,con), _rout(out), _ideal_reg(ideal_reg) { |
588 init_class_id(Class_MachProj); | |
589 } | |
0 | 590 RegMask _rout; |
591 const uint _ideal_reg; | |
592 enum projType { | |
593 unmatched_proj = 0, // Projs for Control, I/O, memory not matched | |
594 fat_proj = 999 // Projs killing many regs, defined by _rout | |
595 }; | |
596 virtual int Opcode() const; | |
597 virtual const Type *bottom_type() const; | |
598 virtual const TypePtr *adr_type() const; | |
599 virtual const RegMask &in_RegMask(uint) const { return RegMask::Empty; } | |
600 virtual const RegMask &out_RegMask() const { return _rout; } | |
601 virtual uint ideal_reg() const { return _ideal_reg; } | |
602 // Need size_of() for virtual ProjNode::clone() | |
603 virtual uint size_of() const { return sizeof(MachProjNode); } | |
604 #ifndef PRODUCT | |
605 virtual void dump_spec(outputStream *st) const; | |
606 #endif | |
607 }; | |
608 | |
609 //------------------------------MachIfNode------------------------------------- | |
610 // Machine-specific versions of IfNodes | |
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611 class MachIfNode : public MachBranchNode { |
0 | 612 virtual uint size_of() const { return sizeof(*this); } // Size is bigger |
613 public: | |
614 float _prob; // Probability branch goes either way | |
615 float _fcnt; // Frequency counter | |
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616 MachIfNode() : MachBranchNode() { |
0 | 617 init_class_id(Class_MachIf); |
618 } | |
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619 // Negate conditional branches. |
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620 virtual void negate() = 0; |
0 | 621 #ifndef PRODUCT |
622 virtual void dump_spec(outputStream *st) const; | |
623 #endif | |
624 }; | |
625 | |
3842 | 626 //------------------------------MachGotoNode----------------------------------- |
627 // Machine-specific versions of GotoNodes | |
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628 class MachGotoNode : public MachBranchNode { |
3842 | 629 public: |
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630 MachGotoNode() : MachBranchNode() { |
3842 | 631 init_class_id(Class_MachGoto); |
632 } | |
633 }; | |
634 | |
0 | 635 //------------------------------MachFastLockNode------------------------------------- |
636 // Machine-specific versions of FastLockNodes | |
637 class MachFastLockNode : public MachNode { | |
638 virtual uint size_of() const { return sizeof(*this); } // Size is bigger | |
639 public: | |
640 BiasedLockingCounters* _counters; | |
641 | |
642 MachFastLockNode() : MachNode() {} | |
643 }; | |
644 | |
645 //------------------------------MachReturnNode-------------------------------- | |
646 // Machine-specific versions of subroutine returns | |
647 class MachReturnNode : public MachNode { | |
648 virtual uint size_of() const; // Size is bigger | |
649 public: | |
650 RegMask *_in_rms; // Input register masks, set during allocation | |
651 ReallocMark _nesting; // assertion check for reallocations | |
652 const TypePtr* _adr_type; // memory effects of call or return | |
653 MachReturnNode() : MachNode() { | |
654 init_class_id(Class_MachReturn); | |
655 _adr_type = TypePtr::BOTTOM; // the default: all of memory | |
656 } | |
657 | |
658 void set_adr_type(const TypePtr* atp) { _adr_type = atp; } | |
659 | |
660 virtual const RegMask &in_RegMask(uint) const; | |
661 virtual bool pinned() const { return true; }; | |
662 virtual const TypePtr *adr_type() const; | |
663 }; | |
664 | |
665 //------------------------------MachSafePointNode----------------------------- | |
666 // Machine-specific versions of safepoints | |
667 class MachSafePointNode : public MachReturnNode { | |
668 public: | |
669 OopMap* _oop_map; // Array of OopMap info (8-bit char) for GC | |
670 JVMState* _jvms; // Pointer to list of JVM State Objects | |
671 uint _jvmadj; // Extra delta to jvms indexes (mach. args) | |
672 OopMap* oop_map() const { return _oop_map; } | |
673 void set_oop_map(OopMap* om) { _oop_map = om; } | |
674 | |
675 MachSafePointNode() : MachReturnNode(), _oop_map(NULL), _jvms(NULL), _jvmadj(0) { | |
676 init_class_id(Class_MachSafePoint); | |
677 } | |
678 | |
679 virtual JVMState* jvms() const { return _jvms; } | |
680 void set_jvms(JVMState* s) { | |
681 _jvms = s; | |
682 } | |
683 virtual const Type *bottom_type() const; | |
684 | |
685 virtual const RegMask &in_RegMask(uint) const; | |
686 | |
687 // Functionality from old debug nodes | |
688 Node *returnadr() const { return in(TypeFunc::ReturnAdr); } | |
689 Node *frameptr () const { return in(TypeFunc::FramePtr); } | |
690 | |
691 Node *local(const JVMState* jvms, uint idx) const { | |
692 assert(verify_jvms(jvms), "jvms must match"); | |
693 return in(_jvmadj + jvms->locoff() + idx); | |
694 } | |
695 Node *stack(const JVMState* jvms, uint idx) const { | |
696 assert(verify_jvms(jvms), "jvms must match"); | |
697 return in(_jvmadj + jvms->stkoff() + idx); | |
698 } | |
699 Node *monitor_obj(const JVMState* jvms, uint idx) const { | |
700 assert(verify_jvms(jvms), "jvms must match"); | |
701 return in(_jvmadj + jvms->monitor_obj_offset(idx)); | |
702 } | |
703 Node *monitor_box(const JVMState* jvms, uint idx) const { | |
704 assert(verify_jvms(jvms), "jvms must match"); | |
705 return in(_jvmadj + jvms->monitor_box_offset(idx)); | |
706 } | |
707 void set_local(const JVMState* jvms, uint idx, Node *c) { | |
708 assert(verify_jvms(jvms), "jvms must match"); | |
709 set_req(_jvmadj + jvms->locoff() + idx, c); | |
710 } | |
711 void set_stack(const JVMState* jvms, uint idx, Node *c) { | |
712 assert(verify_jvms(jvms), "jvms must match"); | |
713 set_req(_jvmadj + jvms->stkoff() + idx, c); | |
714 } | |
715 void set_monitor(const JVMState* jvms, uint idx, Node *c) { | |
716 assert(verify_jvms(jvms), "jvms must match"); | |
717 set_req(_jvmadj + jvms->monoff() + idx, c); | |
718 } | |
719 }; | |
720 | |
721 //------------------------------MachCallNode---------------------------------- | |
722 // Machine-specific versions of subroutine calls | |
723 class MachCallNode : public MachSafePointNode { | |
724 protected: | |
725 virtual uint hash() const { return NO_HASH; } // CFG nodes do not hash | |
726 virtual uint cmp( const Node &n ) const; | |
727 virtual uint size_of() const = 0; // Size is bigger | |
728 public: | |
729 const TypeFunc *_tf; // Function type | |
730 address _entry_point; // Address of the method being called | |
731 float _cnt; // Estimate of number of times called | |
732 uint _argsize; // Size of argument block on stack | |
733 | |
734 const TypeFunc* tf() const { return _tf; } | |
735 const address entry_point() const { return _entry_point; } | |
736 const float cnt() const { return _cnt; } | |
737 uint argsize() const { return _argsize; } | |
738 | |
739 void set_tf(const TypeFunc* tf) { _tf = tf; } | |
740 void set_entry_point(address p) { _entry_point = p; } | |
741 void set_cnt(float c) { _cnt = c; } | |
742 void set_argsize(int s) { _argsize = s; } | |
743 | |
744 MachCallNode() : MachSafePointNode() { | |
745 init_class_id(Class_MachCall); | |
746 } | |
747 | |
748 virtual const Type *bottom_type() const; | |
749 virtual bool pinned() const { return false; } | |
750 virtual const Type *Value( PhaseTransform *phase ) const; | |
751 virtual const RegMask &in_RegMask(uint) const; | |
752 virtual int ret_addr_offset() { return 0; } | |
753 | |
754 bool returns_long() const { return tf()->return_type() == T_LONG; } | |
755 bool return_value_is_used() const; | |
756 #ifndef PRODUCT | |
757 virtual void dump_spec(outputStream *st) const; | |
758 #endif | |
759 }; | |
760 | |
761 //------------------------------MachCallJavaNode------------------------------ | |
762 // "Base" class for machine-specific versions of subroutine calls | |
763 class MachCallJavaNode : public MachCallNode { | |
764 protected: | |
765 virtual uint cmp( const Node &n ) const; | |
766 virtual uint size_of() const; // Size is bigger | |
767 public: | |
768 ciMethod* _method; // Method being direct called | |
769 int _bci; // Byte Code index of call byte code | |
770 bool _optimized_virtual; // Tells if node is a static call or an optimized virtual | |
1137 | 771 bool _method_handle_invoke; // Tells if the call has to preserve SP |
0 | 772 MachCallJavaNode() : MachCallNode() { |
773 init_class_id(Class_MachCallJava); | |
774 } | |
1137 | 775 |
776 virtual const RegMask &in_RegMask(uint) const; | |
777 | |
0 | 778 #ifndef PRODUCT |
779 virtual void dump_spec(outputStream *st) const; | |
780 #endif | |
781 }; | |
782 | |
783 //------------------------------MachCallStaticJavaNode------------------------ | |
784 // Machine-specific versions of monomorphic subroutine calls | |
785 class MachCallStaticJavaNode : public MachCallJavaNode { | |
786 virtual uint cmp( const Node &n ) const; | |
787 virtual uint size_of() const; // Size is bigger | |
788 public: | |
789 const char *_name; // Runtime wrapper name | |
790 MachCallStaticJavaNode() : MachCallJavaNode() { | |
791 init_class_id(Class_MachCallStaticJava); | |
792 } | |
793 | |
794 // If this is an uncommon trap, return the request code, else zero. | |
795 int uncommon_trap_request() const; | |
796 | |
797 virtual int ret_addr_offset(); | |
798 #ifndef PRODUCT | |
799 virtual void dump_spec(outputStream *st) const; | |
800 void dump_trap_args(outputStream *st) const; | |
801 #endif | |
802 }; | |
803 | |
804 //------------------------------MachCallDynamicJavaNode------------------------ | |
805 // Machine-specific versions of possibly megamorphic subroutine calls | |
806 class MachCallDynamicJavaNode : public MachCallJavaNode { | |
807 public: | |
808 int _vtable_index; | |
809 MachCallDynamicJavaNode() : MachCallJavaNode() { | |
810 init_class_id(Class_MachCallDynamicJava); | |
811 DEBUG_ONLY(_vtable_index = -99); // throw an assert if uninitialized | |
812 } | |
813 virtual int ret_addr_offset(); | |
814 #ifndef PRODUCT | |
815 virtual void dump_spec(outputStream *st) const; | |
816 #endif | |
817 }; | |
818 | |
819 //------------------------------MachCallRuntimeNode---------------------------- | |
820 // Machine-specific versions of subroutine calls | |
821 class MachCallRuntimeNode : public MachCallNode { | |
822 virtual uint cmp( const Node &n ) const; | |
823 virtual uint size_of() const; // Size is bigger | |
824 public: | |
825 const char *_name; // Printable name, if _method is NULL | |
826 MachCallRuntimeNode() : MachCallNode() { | |
827 init_class_id(Class_MachCallRuntime); | |
828 } | |
829 virtual int ret_addr_offset(); | |
830 #ifndef PRODUCT | |
831 virtual void dump_spec(outputStream *st) const; | |
832 #endif | |
833 }; | |
834 | |
835 class MachCallLeafNode: public MachCallRuntimeNode { | |
836 public: | |
837 MachCallLeafNode() : MachCallRuntimeNode() { | |
838 init_class_id(Class_MachCallLeaf); | |
839 } | |
840 }; | |
841 | |
842 //------------------------------MachHaltNode----------------------------------- | |
843 // Machine-specific versions of halt nodes | |
844 class MachHaltNode : public MachReturnNode { | |
845 public: | |
846 virtual JVMState* jvms() const; | |
847 }; | |
848 | |
849 | |
850 //------------------------------MachTempNode----------------------------------- | |
851 // Node used by the adlc to construct inputs to represent temporary registers | |
852 class MachTempNode : public MachNode { | |
853 private: | |
854 MachOper *_opnd_array[1]; | |
855 | |
856 public: | |
857 virtual const RegMask &out_RegMask() const { return *_opnds[0]->in_RegMask(0); } | |
858 virtual uint rule() const { return 9999999; } | |
859 virtual void emit(CodeBuffer &cbuf, PhaseRegAlloc *ra_) const {} | |
860 | |
861 MachTempNode(MachOper* oper) { | |
862 init_class_id(Class_MachTemp); | |
863 _num_opnds = 1; | |
864 _opnds = _opnd_array; | |
865 add_req(NULL); | |
866 _opnds[0] = oper; | |
867 } | |
868 virtual uint size_of() const { return sizeof(MachTempNode); } | |
869 | |
870 #ifndef PRODUCT | |
871 virtual void format(PhaseRegAlloc *, outputStream *st ) const {} | |
872 virtual const char *Name() const { return "MachTemp";} | |
873 #endif | |
874 }; | |
875 | |
876 | |
877 | |
878 //------------------------------labelOper-------------------------------------- | |
879 // Machine-independent version of label operand | |
880 class labelOper : public MachOper { | |
881 private: | |
882 virtual uint num_edges() const { return 0; } | |
883 public: | |
884 // Supported for fixed size branches | |
885 Label* _label; // Label for branch(es) | |
886 | |
887 uint _block_num; | |
888 | |
889 labelOper() : _block_num(0), _label(0) {} | |
890 | |
891 labelOper(Label* label, uint block_num) : _label(label), _block_num(block_num) {} | |
892 | |
893 labelOper(labelOper* l) : _label(l->_label) , _block_num(l->_block_num) {} | |
894 | |
895 virtual MachOper *clone(Compile* C) const; | |
896 | |
3839 | 897 virtual Label *label() const { assert(_label != NULL, "need Label"); return _label; } |
0 | 898 |
899 virtual uint opcode() const; | |
900 | |
901 virtual uint hash() const; | |
902 virtual uint cmp( const MachOper &oper ) const; | |
903 #ifndef PRODUCT | |
904 virtual const char *Name() const { return "Label";} | |
905 | |
906 virtual void int_format(PhaseRegAlloc *ra, const MachNode *node, outputStream *st) const; | |
907 virtual void ext_format(PhaseRegAlloc *ra, const MachNode *node, int idx, outputStream *st) const { int_format( ra, node, st ); } | |
908 #endif | |
909 }; | |
910 | |
911 | |
912 //------------------------------methodOper-------------------------------------- | |
913 // Machine-independent version of method operand | |
914 class methodOper : public MachOper { | |
915 private: | |
916 virtual uint num_edges() const { return 0; } | |
917 public: | |
918 intptr_t _method; // Address of method | |
919 methodOper() : _method(0) {} | |
920 methodOper(intptr_t method) : _method(method) {} | |
921 | |
922 virtual MachOper *clone(Compile* C) const; | |
923 | |
924 virtual intptr_t method() const { return _method; } | |
925 | |
926 virtual uint opcode() const; | |
927 | |
928 virtual uint hash() const; | |
929 virtual uint cmp( const MachOper &oper ) const; | |
930 #ifndef PRODUCT | |
931 virtual const char *Name() const { return "Method";} | |
932 | |
933 virtual void int_format(PhaseRegAlloc *ra, const MachNode *node, outputStream *st) const; | |
934 virtual void ext_format(PhaseRegAlloc *ra, const MachNode *node, int idx, outputStream *st) const { int_format( ra, node, st ); } | |
935 #endif | |
936 }; | |
1972 | 937 |
938 #endif // SHARE_VM_OPTO_MACHNODE_HPP |