Mercurial > hg > graal-compiler
annotate graal/GraalCompiler/src/com/sun/c1x/alloc/RegisterVerifier.java @ 2833:1cd59ca9ac86
Removed Throw HIR instruction. Removed special handling for exceptions in register allocator.
author | Thomas Wuerthinger <thomas@wuerthinger.net> |
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date | Tue, 31 May 2011 13:30:23 +0200 |
parents | a2f62de90c76 |
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rev | line source |
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1 /* |
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2 * Copyright (c) 2009, 2011, Oracle and/or its affiliates. All rights reserved. |
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3 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. |
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4 * |
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5 * This code is free software; you can redistribute it and/or modify it |
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6 * under the terms of the GNU General Public License version 2 only, as |
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7 * published by the Free Software Foundation. |
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8 * |
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9 * This code is distributed in the hope that it will be useful, but WITHOUT |
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10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or |
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11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License |
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12 * version 2 for more details (a copy is included in the LICENSE file that |
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13 * accompanied this code). |
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14 * |
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15 * You should have received a copy of the GNU General Public License version |
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16 * 2 along with this work; if not, write to the Free Software Foundation, |
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17 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA. |
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18 * |
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19 * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA |
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20 * or visit www.oracle.com if you need additional information or have any |
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21 * questions. |
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22 */ |
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23 package com.sun.c1x.alloc; |
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24 |
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25 import java.util.*; |
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26 |
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27 import com.sun.c1x.*; |
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28 import com.sun.c1x.debug.*; |
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29 import com.sun.c1x.lir.*; |
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30 import com.sun.c1x.util.*; |
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31 import com.sun.cri.ci.*; |
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32 |
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33 /** |
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34 * |
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35 * @author Thomas Wuerthinger |
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36 */ |
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37 final class RegisterVerifier { |
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38 |
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39 LinearScan allocator; |
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40 List<LIRBlock> workList; // all blocks that must be processed |
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41 ArrayMap<Interval[]> savedStates; // saved information of previous check |
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42 |
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43 // simplified access to methods of LinearScan |
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44 C1XCompilation compilation() { |
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45 return allocator.compilation; |
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46 } |
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47 |
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48 Interval intervalAt(CiValue operand) { |
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49 return allocator.intervalFor(operand); |
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50 } |
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51 |
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52 // currently, only registers are processed |
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53 int stateSize() { |
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54 return allocator.operands.maxRegisterNumber() + 1; |
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55 } |
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56 |
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57 // accessors |
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58 Interval[] stateForBlock(LIRBlock block) { |
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59 return savedStates.get(block.blockID()); |
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60 } |
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61 |
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62 void setStateForBlock(LIRBlock block, Interval[] savedState) { |
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63 savedStates.put(block.blockID(), savedState); |
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64 } |
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65 |
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66 void addToWorkList(LIRBlock block) { |
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67 if (!workList.contains(block)) { |
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68 workList.add(block); |
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69 } |
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70 } |
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71 |
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72 RegisterVerifier(LinearScan allocator) { |
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73 this.allocator = allocator; |
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74 workList = new ArrayList<LIRBlock>(16); |
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75 this.savedStates = new ArrayMap<Interval[]>(); |
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76 |
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77 } |
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78 |
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79 void verify(LIRBlock start) { |
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80 // setup input registers (method arguments) for first block |
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81 Interval[] inputState = new Interval[stateSize()]; |
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82 CiCallingConvention args = compilation().frameMap().incomingArguments(); |
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83 for (int n = 0; n < args.locations.length; n++) { |
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84 CiValue operand = args.locations[n]; |
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85 if (operand.isRegister()) { |
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86 CiValue reg = operand; |
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87 Interval interval = intervalAt(reg); |
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88 inputState[reg.asRegister().number] = interval; |
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89 } |
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90 } |
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91 |
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92 setStateForBlock(start, inputState); |
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93 addToWorkList(start); |
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94 |
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95 // main loop for verification |
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96 do { |
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97 LIRBlock block = workList.get(0); |
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98 workList.remove(0); |
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99 |
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100 processBlock(block); |
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101 } while (!workList.isEmpty()); |
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102 } |
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103 |
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104 private void processBlock(LIRBlock block) { |
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105 if (C1XOptions.TraceLinearScanLevel >= 2) { |
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106 TTY.println(); |
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107 TTY.println("processBlock B%d", block.blockID()); |
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108 } |
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109 |
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110 // must copy state because it is modified |
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111 Interval[] inputState = copy(stateForBlock(block)); |
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112 |
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113 if (C1XOptions.TraceLinearScanLevel >= 4) { |
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114 TTY.println("Input-State of intervals:"); |
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115 TTY.print(" "); |
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116 for (int i = 0; i < stateSize(); i++) { |
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117 if (inputState[i] != null) { |
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118 TTY.print(" %4d", inputState[i].operandNumber); |
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119 } else { |
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120 TTY.print(" __"); |
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121 } |
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122 } |
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123 TTY.println(); |
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124 TTY.println(); |
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125 } |
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126 |
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127 // process all operations of the block |
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128 processOperations(block.lir(), inputState); |
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129 |
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130 // iterate all successors |
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131 for (LIRBlock succ : block.blockSuccessors()) { |
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132 processSuccessor(succ, inputState); |
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133 } |
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134 } |
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135 |
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136 private void processSuccessor(LIRBlock block, Interval[] inputState) { |
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137 Interval[] savedState = stateForBlock(block); |
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138 |
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139 if (savedState != null) { |
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140 // this block was already processed before. |
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141 // check if new inputState is consistent with savedState |
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142 |
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143 boolean savedStateCorrect = true; |
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144 for (int i = 0; i < stateSize(); i++) { |
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145 if (inputState[i] != savedState[i]) { |
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146 // current inputState and previous savedState assume a different |
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147 // interval in this register . assume that this register is invalid |
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148 if (savedState[i] != null) { |
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149 // invalidate old calculation only if it assumed that |
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150 // register was valid. when the register was already invalid, |
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151 // then the old calculation was correct. |
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152 savedStateCorrect = false; |
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153 savedState[i] = null; |
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154 |
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155 if (C1XOptions.TraceLinearScanLevel >= 4) { |
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156 TTY.println("processSuccessor B%d: invalidating slot %d", block.blockID(), i); |
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157 } |
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158 } |
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159 } |
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160 } |
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161 |
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162 if (savedStateCorrect) { |
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163 // already processed block with correct inputState |
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164 if (C1XOptions.TraceLinearScanLevel >= 2) { |
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165 TTY.println("processSuccessor B%d: previous visit already correct", block.blockID()); |
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166 } |
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167 } else { |
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168 // must re-visit this block |
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169 if (C1XOptions.TraceLinearScanLevel >= 2) { |
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170 TTY.println("processSuccessor B%d: must re-visit because input state changed", block.blockID()); |
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171 } |
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172 addToWorkList(block); |
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173 } |
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174 |
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175 } else { |
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176 // block was not processed before, so set initial inputState |
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177 if (C1XOptions.TraceLinearScanLevel >= 2) { |
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178 TTY.println("processSuccessor B%d: initial visit", block.blockID()); |
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179 } |
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180 |
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181 setStateForBlock(block, copy(inputState)); |
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182 addToWorkList(block); |
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183 } |
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184 } |
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185 |
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186 Interval[] copy(Interval[] inputState) { |
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187 return inputState.clone(); |
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188 } |
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189 |
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190 void statePut(Interval[] inputState, CiValue location, Interval interval) { |
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191 if (location != null && location.isRegister()) { |
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192 CiRegister reg = location.asRegister(); |
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193 int regNum = reg.number; |
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194 if (interval != null) { |
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195 if (C1XOptions.TraceLinearScanLevel >= 4) { |
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196 TTY.println(" %s = %s", reg, interval.operand); |
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197 } |
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198 } else if (inputState[regNum] != null) { |
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199 if (C1XOptions.TraceLinearScanLevel >= 4) { |
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200 TTY.println(" %s = null", reg); |
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201 } |
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202 } |
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203 |
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204 inputState[regNum] = interval; |
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205 } |
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206 } |
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207 |
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208 boolean checkState(Interval[] inputState, CiValue reg, Interval interval) { |
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209 if (reg != null && reg.isRegister()) { |
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210 if (inputState[reg.asRegister().number] != interval) { |
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211 throw new CiBailout("!! Error in register allocation: register " + reg + " does not contain interval " + interval.operand + " but interval " + inputState[reg.asRegister().number]); |
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212 } |
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213 } |
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214 return true; |
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215 } |
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216 |
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217 void processOperations(LIRList ops, Interval[] inputState) { |
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218 // visit all instructions of the block |
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219 for (int i = 0; i < ops.length(); i++) { |
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220 LIRInstruction op = ops.at(i); |
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221 |
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222 if (C1XOptions.TraceLinearScanLevel >= 4) { |
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223 TTY.println(op.toStringWithIdPrefix()); |
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224 } |
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225 |
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226 // check if input operands are correct |
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227 int n = op.operandCount(LIRInstruction.OperandMode.Input); |
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228 for (int j = 0; j < n; j++) { |
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229 CiValue operand = op.operandAt(LIRInstruction.OperandMode.Input, j); |
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230 if (allocator.isProcessed(operand)) { |
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231 Interval interval = intervalAt(operand); |
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232 if (op.id != -1) { |
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233 interval = interval.getSplitChildAtOpId(op.id, LIRInstruction.OperandMode.Input, allocator); |
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234 } |
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235 |
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236 assert checkState(inputState, interval.location(), interval.splitParent()); |
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237 } |
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238 } |
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239 |
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240 // invalidate all caller save registers at calls |
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241 if (op.hasCall) { |
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242 for (CiRegister r : allocator.compilation.registerConfig.getCallerSaveRegisters()) { |
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243 statePut(inputState, r.asValue(), null); |
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244 } |
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245 } |
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246 |
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247 // set temp operands (some operations use temp operands also as output operands, so can't set them null) |
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248 n = op.operandCount(LIRInstruction.OperandMode.Temp); |
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249 for (int j = 0; j < n; j++) { |
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250 CiValue operand = op.operandAt(LIRInstruction.OperandMode.Temp, j); |
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251 if (allocator.isProcessed(operand)) { |
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252 Interval interval = intervalAt(operand); |
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253 assert interval != null : "Could not find interval for operand " + operand; |
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254 if (op.id != -1) { |
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255 interval = interval.getSplitChildAtOpId(op.id, LIRInstruction.OperandMode.Temp, allocator); |
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256 } |
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257 |
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258 statePut(inputState, interval.location(), interval.splitParent()); |
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259 } |
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260 } |
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261 |
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262 // set output operands |
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263 n = op.operandCount(LIRInstruction.OperandMode.Output); |
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264 for (int j = 0; j < n; j++) { |
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265 CiValue operand = op.operandAt(LIRInstruction.OperandMode.Output, j); |
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266 if (allocator.isProcessed(operand)) { |
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267 Interval interval = intervalAt(operand); |
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268 if (op.id != -1) { |
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269 interval = interval.getSplitChildAtOpId(op.id, LIRInstruction.OperandMode.Output, allocator); |
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270 } |
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271 |
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272 statePut(inputState, interval.location(), interval.splitParent()); |
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273 } |
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274 } |
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275 } |
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276 } |
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277 } |