Mercurial > hg > graal-compiler
annotate src/cpu/x86/vm/sharedRuntime_x86_64.cpp @ 21451:24dd9af9ac26
SPARCArithmetic: add register hint for Unary2Op.
author | Josef Eisl <josef.eisl@jku.at> |
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date | Thu, 21 May 2015 15:00:11 +0200 |
parents | 2e35a4ea22ac |
children | be896a1983c0 |
rev | line source |
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0 | 1 /* |
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2 * Copyright (c) 2003, 2013, Oracle and/or its affiliates. All rights reserved. |
0 | 3 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. |
4 * | |
5 * This code is free software; you can redistribute it and/or modify it | |
6 * under the terms of the GNU General Public License version 2 only, as | |
7 * published by the Free Software Foundation. | |
8 * | |
9 * This code is distributed in the hope that it will be useful, but WITHOUT | |
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or | |
11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License | |
12 * version 2 for more details (a copy is included in the LICENSE file that | |
13 * accompanied this code). | |
14 * | |
15 * You should have received a copy of the GNU General Public License version | |
16 * 2 along with this work; if not, write to the Free Software Foundation, | |
17 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA. | |
18 * | |
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19 * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA |
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20 * or visit www.oracle.com if you need additional information or have any |
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21 * questions. |
0 | 22 * |
23 */ | |
24 | |
1972 | 25 #include "precompiled.hpp" |
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26 #include "asm/macroAssembler.hpp" |
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27 #include "asm/macroAssembler.inline.hpp" |
1972 | 28 #include "code/debugInfoRec.hpp" |
29 #include "code/icBuffer.hpp" | |
30 #include "code/vtableStubs.hpp" | |
31 #include "interpreter/interpreter.hpp" | |
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32 #include "oops/compiledICHolder.hpp" |
1972 | 33 #include "prims/jvmtiRedefineClassesTrace.hpp" |
34 #include "runtime/sharedRuntime.hpp" | |
35 #include "runtime/vframeArray.hpp" | |
36 #include "vmreg_x86.inline.hpp" | |
37 #ifdef COMPILER1 | |
38 #include "c1/c1_Runtime1.hpp" | |
39 #endif | |
40 #ifdef COMPILER2 | |
41 #include "opto/runtime.hpp" | |
42 #endif | |
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43 #ifdef GRAAL |
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44 #include "graal/graalJavaAccess.hpp" |
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45 #endif |
0 | 46 |
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47 #define __ masm-> |
0 | 48 |
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49 const int StackAlignmentInSlots = StackAlignmentInBytes / VMRegImpl::stack_slot_size; |
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50 |
0 | 51 class SimpleRuntimeFrame { |
52 | |
53 public: | |
54 | |
55 // Most of the runtime stubs have this simple frame layout. | |
56 // This class exists to make the layout shared in one place. | |
57 // Offsets are for compiler stack slots, which are jints. | |
58 enum layout { | |
59 // The frame sender code expects that rbp will be in the "natural" place and | |
60 // will override any oopMap setting for it. We must therefore force the layout | |
61 // so that it agrees with the frame sender code. | |
62 rbp_off = frame::arg_reg_save_area_bytes/BytesPerInt, | |
63 rbp_off2, | |
64 return_off, return_off2, | |
65 framesize | |
66 }; | |
67 }; | |
68 | |
69 class RegisterSaver { | |
70 // Capture info about frame layout. Layout offsets are in jint | |
71 // units because compiler frame slots are jints. | |
72 #define DEF_XMM_OFFS(regnum) xmm ## regnum ## _off = xmm_off + (regnum)*16/BytesPerInt, xmm ## regnum ## H_off | |
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73 #define DEF_YMM_HI_OFFS(regnum) ymm_hi ## regnum ## _off = ymm_off + (regnum)*16/BytesPerInt |
0 | 74 enum layout { |
75 fpu_state_off = frame::arg_reg_save_area_bytes/BytesPerInt, // fxsave save area | |
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76 #if defined(COMPILER2) || defined(GRAAL) |
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77 ymm_off = fpu_state_off, // offset in fxsave save area |
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78 DEF_YMM_HI_OFFS(0), |
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79 DEF_YMM_HI_OFFS(1), |
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80 DEF_YMM_HI_OFFS(2), |
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81 DEF_YMM_HI_OFFS(3), |
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82 DEF_YMM_HI_OFFS(4), |
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83 DEF_YMM_HI_OFFS(5), |
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84 DEF_YMM_HI_OFFS(6), |
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85 DEF_YMM_HI_OFFS(7), |
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86 DEF_YMM_HI_OFFS(8), |
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87 DEF_YMM_HI_OFFS(9), |
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88 DEF_YMM_HI_OFFS(10), |
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89 DEF_YMM_HI_OFFS(11), |
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90 DEF_YMM_HI_OFFS(12), |
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91 DEF_YMM_HI_OFFS(13), |
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92 DEF_YMM_HI_OFFS(14), |
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93 DEF_YMM_HI_OFFS(15), |
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94 ymm_hi_save_size = 16 * 16 / BytesPerInt, |
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95 #else |
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96 ymm_hi_save_size = 0, |
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97 #endif |
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98 xmm_off = fpu_state_off + 160/BytesPerInt + ymm_hi_save_size, // offset in fxsave save area |
0 | 99 DEF_XMM_OFFS(0), |
100 DEF_XMM_OFFS(1), | |
101 DEF_XMM_OFFS(2), | |
102 DEF_XMM_OFFS(3), | |
103 DEF_XMM_OFFS(4), | |
104 DEF_XMM_OFFS(5), | |
105 DEF_XMM_OFFS(6), | |
106 DEF_XMM_OFFS(7), | |
107 DEF_XMM_OFFS(8), | |
108 DEF_XMM_OFFS(9), | |
109 DEF_XMM_OFFS(10), | |
110 DEF_XMM_OFFS(11), | |
111 DEF_XMM_OFFS(12), | |
112 DEF_XMM_OFFS(13), | |
113 DEF_XMM_OFFS(14), | |
114 DEF_XMM_OFFS(15), | |
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115 fpu_state_end = fpu_state_off + ((FPUStateSizeInWords-1)*wordSize / BytesPerInt) + ymm_hi_save_size, |
0 | 116 fpu_stateH_end, |
117 r15_off, r15H_off, | |
118 r14_off, r14H_off, | |
119 r13_off, r13H_off, | |
120 r12_off, r12H_off, | |
121 r11_off, r11H_off, | |
122 r10_off, r10H_off, | |
123 r9_off, r9H_off, | |
124 r8_off, r8H_off, | |
125 rdi_off, rdiH_off, | |
126 rsi_off, rsiH_off, | |
127 ignore_off, ignoreH_off, // extra copy of rbp | |
128 rsp_off, rspH_off, | |
129 rbx_off, rbxH_off, | |
130 rdx_off, rdxH_off, | |
131 rcx_off, rcxH_off, | |
132 rax_off, raxH_off, | |
133 // 16-byte stack alignment fill word: see MacroAssembler::push/pop_IU_state | |
134 align_off, alignH_off, | |
135 flags_off, flagsH_off, | |
136 // The frame sender code expects that rbp will be in the "natural" place and | |
137 // will override any oopMap setting for it. We must therefore force the layout | |
138 // so that it agrees with the frame sender code. | |
139 rbp_off, rbpH_off, // copy of rbp we will restore | |
140 return_off, returnH_off, // slot for return address | |
141 reg_save_size // size in compiler stack slots | |
142 }; | |
143 | |
144 public: | |
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145 static OopMap* save_live_registers(MacroAssembler* masm, int additional_frame_words, int* total_frame_words, bool save_vectors = false); |
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146 static void restore_live_registers(MacroAssembler* masm, bool restore_vectors = false); |
0 | 147 |
148 // Offsets into the register save area | |
149 // Used by deoptimization when it is managing result register | |
150 // values on its own | |
151 | |
152 static int rax_offset_in_bytes(void) { return BytesPerInt * rax_off; } | |
304 | 153 static int rdx_offset_in_bytes(void) { return BytesPerInt * rdx_off; } |
0 | 154 static int rbx_offset_in_bytes(void) { return BytesPerInt * rbx_off; } |
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155 static int r10_offset_in_bytes(void) { return BytesPerInt * r10_off; } |
0 | 156 static int xmm0_offset_in_bytes(void) { return BytesPerInt * xmm0_off; } |
157 static int return_offset_in_bytes(void) { return BytesPerInt * return_off; } | |
158 | |
159 // During deoptimization only the result registers need to be restored, | |
160 // all the other values have already been extracted. | |
161 static void restore_result_registers(MacroAssembler* masm); | |
162 }; | |
163 | |
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164 OopMap* RegisterSaver::save_live_registers(MacroAssembler* masm, int additional_frame_words, int* total_frame_words, bool save_vectors) { |
0 | 165 // Always make the frame size 16-byte aligned |
166 int frame_size_in_bytes = round_to(additional_frame_words*wordSize + | |
167 reg_save_size*BytesPerInt, 16); | |
168 // OopMap frame size is in compiler stack slots (jint's) not bytes or words | |
169 int frame_size_in_slots = frame_size_in_bytes / BytesPerInt; | |
170 // The caller will allocate additional_frame_words | |
171 int additional_frame_slots = additional_frame_words*wordSize / BytesPerInt; | |
172 // CodeBlob frame size is in words. | |
173 int frame_size_in_words = frame_size_in_bytes / wordSize; | |
174 *total_frame_words = frame_size_in_words; | |
175 | |
176 // Save registers, fpu state, and flags. | |
177 // We assume caller has already pushed the return address onto the | |
178 // stack, so rsp is 8-byte aligned here. | |
179 // We push rpb twice in this sequence because we want the real rbp | |
180 // to be under the return like a normal enter. | |
181 | |
182 __ enter(); // rsp becomes 16-byte aligned here | |
183 __ push_CPU_state(); // Push a multiple of 16 bytes | |
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184 |
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185 #if defined(COMPILER2) || defined(GRAAL) |
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186 __ subptr(rsp, 256); // Save upper half of YMM registers |
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187 if (save_vectors) { |
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188 assert(UseAVX > 0, "256bit vectors are supported only with AVX"); |
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189 assert(MaxVectorSize == 32, "only 256bit vectors are supported now"); |
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190 // Save upper half of YMM registers |
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191 __ vextractf128h(Address(rsp, ymm_hi0_off * BytesPerInt), xmm0); |
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192 __ vextractf128h(Address(rsp, ymm_hi1_off * BytesPerInt), xmm1); |
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193 __ vextractf128h(Address(rsp, ymm_hi2_off * BytesPerInt), xmm2); |
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194 __ vextractf128h(Address(rsp, ymm_hi3_off * BytesPerInt), xmm3); |
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195 __ vextractf128h(Address(rsp, ymm_hi4_off * BytesPerInt), xmm4); |
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196 __ vextractf128h(Address(rsp, ymm_hi5_off * BytesPerInt), xmm5); |
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197 __ vextractf128h(Address(rsp, ymm_hi6_off * BytesPerInt), xmm6); |
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198 __ vextractf128h(Address(rsp, ymm_hi7_off * BytesPerInt), xmm7); |
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199 __ vextractf128h(Address(rsp, ymm_hi8_off * BytesPerInt), xmm8); |
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200 __ vextractf128h(Address(rsp, ymm_hi9_off * BytesPerInt), xmm9); |
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201 __ vextractf128h(Address(rsp, ymm_hi10_off * BytesPerInt), xmm10); |
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202 __ vextractf128h(Address(rsp, ymm_hi11_off * BytesPerInt), xmm11); |
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203 __ vextractf128h(Address(rsp, ymm_hi12_off * BytesPerInt), xmm12); |
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204 __ vextractf128h(Address(rsp, ymm_hi13_off * BytesPerInt), xmm13); |
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205 __ vextractf128h(Address(rsp, ymm_hi14_off * BytesPerInt), xmm14); |
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206 __ vextractf128h(Address(rsp, ymm_hi15_off * BytesPerInt), xmm15); |
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207 } |
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208 #else |
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209 assert(!save_vectors, "vectors are generated only by C2 and Graal"); |
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210 #endif |
0 | 211 if (frame::arg_reg_save_area_bytes != 0) { |
212 // Allocate argument register save area | |
304 | 213 __ subptr(rsp, frame::arg_reg_save_area_bytes); |
0 | 214 } |
215 | |
216 // Set an oopmap for the call site. This oopmap will map all | |
217 // oop-registers and debug-info registers as callee-saved. This | |
218 // will allow deoptimization at this safepoint to find all possible | |
219 // debug-info recordings, as well as let GC find all oops. | |
220 | |
221 OopMapSet *oop_maps = new OopMapSet(); | |
222 OopMap* map = new OopMap(frame_size_in_slots, 0); | |
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223 |
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224 #define STACK_OFFSET(x) VMRegImpl::stack2reg((x) + additional_frame_slots) |
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225 |
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226 map->set_callee_saved(STACK_OFFSET( rax_off ), rax->as_VMReg()); |
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227 map->set_callee_saved(STACK_OFFSET( rcx_off ), rcx->as_VMReg()); |
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228 map->set_callee_saved(STACK_OFFSET( rdx_off ), rdx->as_VMReg()); |
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229 map->set_callee_saved(STACK_OFFSET( rbx_off ), rbx->as_VMReg()); |
0 | 230 // rbp location is known implicitly by the frame sender code, needs no oopmap |
231 // and the location where rbp was saved by is ignored | |
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232 map->set_callee_saved(STACK_OFFSET( rsi_off ), rsi->as_VMReg()); |
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233 map->set_callee_saved(STACK_OFFSET( rdi_off ), rdi->as_VMReg()); |
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234 map->set_callee_saved(STACK_OFFSET( r8_off ), r8->as_VMReg()); |
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235 map->set_callee_saved(STACK_OFFSET( r9_off ), r9->as_VMReg()); |
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236 map->set_callee_saved(STACK_OFFSET( r10_off ), r10->as_VMReg()); |
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237 map->set_callee_saved(STACK_OFFSET( r11_off ), r11->as_VMReg()); |
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238 map->set_callee_saved(STACK_OFFSET( r12_off ), r12->as_VMReg()); |
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239 map->set_callee_saved(STACK_OFFSET( r13_off ), r13->as_VMReg()); |
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240 map->set_callee_saved(STACK_OFFSET( r14_off ), r14->as_VMReg()); |
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241 map->set_callee_saved(STACK_OFFSET( r15_off ), r15->as_VMReg()); |
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242 map->set_callee_saved(STACK_OFFSET(xmm0_off ), xmm0->as_VMReg()); |
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243 map->set_callee_saved(STACK_OFFSET(xmm1_off ), xmm1->as_VMReg()); |
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244 map->set_callee_saved(STACK_OFFSET(xmm2_off ), xmm2->as_VMReg()); |
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245 map->set_callee_saved(STACK_OFFSET(xmm3_off ), xmm3->as_VMReg()); |
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246 map->set_callee_saved(STACK_OFFSET(xmm4_off ), xmm4->as_VMReg()); |
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247 map->set_callee_saved(STACK_OFFSET(xmm5_off ), xmm5->as_VMReg()); |
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248 map->set_callee_saved(STACK_OFFSET(xmm6_off ), xmm6->as_VMReg()); |
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249 map->set_callee_saved(STACK_OFFSET(xmm7_off ), xmm7->as_VMReg()); |
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250 map->set_callee_saved(STACK_OFFSET(xmm8_off ), xmm8->as_VMReg()); |
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251 map->set_callee_saved(STACK_OFFSET(xmm9_off ), xmm9->as_VMReg()); |
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252 map->set_callee_saved(STACK_OFFSET(xmm10_off), xmm10->as_VMReg()); |
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253 map->set_callee_saved(STACK_OFFSET(xmm11_off), xmm11->as_VMReg()); |
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254 map->set_callee_saved(STACK_OFFSET(xmm12_off), xmm12->as_VMReg()); |
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255 map->set_callee_saved(STACK_OFFSET(xmm13_off), xmm13->as_VMReg()); |
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256 map->set_callee_saved(STACK_OFFSET(xmm14_off), xmm14->as_VMReg()); |
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257 map->set_callee_saved(STACK_OFFSET(xmm15_off), xmm15->as_VMReg()); |
0 | 258 |
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259 |
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260 #if defined(COMPILER2) || defined(GRAAL) |
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261 if (save_vectors) { |
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262 map->set_callee_saved(STACK_OFFSET(ymm_hi0_off ), xmm0->as_VMReg()->next()->next()->next()->next()); |
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263 map->set_callee_saved(STACK_OFFSET(ymm_hi1_off ), xmm1->as_VMReg()->next()->next()->next()->next()); |
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264 map->set_callee_saved(STACK_OFFSET(ymm_hi2_off ), xmm2->as_VMReg()->next()->next()->next()->next()); |
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265 map->set_callee_saved(STACK_OFFSET(ymm_hi3_off ), xmm3->as_VMReg()->next()->next()->next()->next()); |
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266 map->set_callee_saved(STACK_OFFSET(ymm_hi4_off ), xmm4->as_VMReg()->next()->next()->next()->next()); |
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267 map->set_callee_saved(STACK_OFFSET(ymm_hi5_off ), xmm5->as_VMReg()->next()->next()->next()->next()); |
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268 map->set_callee_saved(STACK_OFFSET(ymm_hi6_off ), xmm6->as_VMReg()->next()->next()->next()->next()); |
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269 map->set_callee_saved(STACK_OFFSET(ymm_hi7_off ), xmm7->as_VMReg()->next()->next()->next()->next()); |
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270 map->set_callee_saved(STACK_OFFSET(ymm_hi8_off ), xmm8->as_VMReg()->next()->next()->next()->next()); |
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271 map->set_callee_saved(STACK_OFFSET(ymm_hi9_off ), xmm9->as_VMReg()->next()->next()->next()->next()); |
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272 map->set_callee_saved(STACK_OFFSET(ymm_hi10_off), xmm10->as_VMReg()->next()->next()->next()->next()); |
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273 map->set_callee_saved(STACK_OFFSET(ymm_hi11_off), xmm11->as_VMReg()->next()->next()->next()->next()); |
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274 map->set_callee_saved(STACK_OFFSET(ymm_hi12_off), xmm12->as_VMReg()->next()->next()->next()->next()); |
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275 map->set_callee_saved(STACK_OFFSET(ymm_hi13_off), xmm13->as_VMReg()->next()->next()->next()->next()); |
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276 map->set_callee_saved(STACK_OFFSET(ymm_hi14_off), xmm14->as_VMReg()->next()->next()->next()->next()); |
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277 map->set_callee_saved(STACK_OFFSET(ymm_hi15_off), xmm15->as_VMReg()->next()->next()->next()->next()); |
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278 } |
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279 #endif |
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280 |
0 | 281 // %%% These should all be a waste but we'll keep things as they were for now |
282 if (true) { | |
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283 map->set_callee_saved(STACK_OFFSET( raxH_off ), rax->as_VMReg()->next()); |
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284 map->set_callee_saved(STACK_OFFSET( rcxH_off ), rcx->as_VMReg()->next()); |
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285 map->set_callee_saved(STACK_OFFSET( rdxH_off ), rdx->as_VMReg()->next()); |
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286 map->set_callee_saved(STACK_OFFSET( rbxH_off ), rbx->as_VMReg()->next()); |
0 | 287 // rbp location is known implicitly by the frame sender code, needs no oopmap |
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288 map->set_callee_saved(STACK_OFFSET( rsiH_off ), rsi->as_VMReg()->next()); |
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289 map->set_callee_saved(STACK_OFFSET( rdiH_off ), rdi->as_VMReg()->next()); |
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290 map->set_callee_saved(STACK_OFFSET( r8H_off ), r8->as_VMReg()->next()); |
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291 map->set_callee_saved(STACK_OFFSET( r9H_off ), r9->as_VMReg()->next()); |
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292 map->set_callee_saved(STACK_OFFSET( r10H_off ), r10->as_VMReg()->next()); |
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293 map->set_callee_saved(STACK_OFFSET( r11H_off ), r11->as_VMReg()->next()); |
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294 map->set_callee_saved(STACK_OFFSET( r12H_off ), r12->as_VMReg()->next()); |
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295 map->set_callee_saved(STACK_OFFSET( r13H_off ), r13->as_VMReg()->next()); |
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296 map->set_callee_saved(STACK_OFFSET( r14H_off ), r14->as_VMReg()->next()); |
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297 map->set_callee_saved(STACK_OFFSET( r15H_off ), r15->as_VMReg()->next()); |
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298 map->set_callee_saved(STACK_OFFSET(xmm0H_off ), xmm0->as_VMReg()->next()); |
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299 map->set_callee_saved(STACK_OFFSET(xmm1H_off ), xmm1->as_VMReg()->next()); |
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300 map->set_callee_saved(STACK_OFFSET(xmm2H_off ), xmm2->as_VMReg()->next()); |
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301 map->set_callee_saved(STACK_OFFSET(xmm3H_off ), xmm3->as_VMReg()->next()); |
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302 map->set_callee_saved(STACK_OFFSET(xmm4H_off ), xmm4->as_VMReg()->next()); |
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303 map->set_callee_saved(STACK_OFFSET(xmm5H_off ), xmm5->as_VMReg()->next()); |
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304 map->set_callee_saved(STACK_OFFSET(xmm6H_off ), xmm6->as_VMReg()->next()); |
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305 map->set_callee_saved(STACK_OFFSET(xmm7H_off ), xmm7->as_VMReg()->next()); |
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306 map->set_callee_saved(STACK_OFFSET(xmm8H_off ), xmm8->as_VMReg()->next()); |
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307 map->set_callee_saved(STACK_OFFSET(xmm9H_off ), xmm9->as_VMReg()->next()); |
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308 map->set_callee_saved(STACK_OFFSET(xmm10H_off), xmm10->as_VMReg()->next()); |
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309 map->set_callee_saved(STACK_OFFSET(xmm11H_off), xmm11->as_VMReg()->next()); |
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310 map->set_callee_saved(STACK_OFFSET(xmm12H_off), xmm12->as_VMReg()->next()); |
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311 map->set_callee_saved(STACK_OFFSET(xmm13H_off), xmm13->as_VMReg()->next()); |
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312 map->set_callee_saved(STACK_OFFSET(xmm14H_off), xmm14->as_VMReg()->next()); |
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313 map->set_callee_saved(STACK_OFFSET(xmm15H_off), xmm15->as_VMReg()->next()); |
0 | 314 } |
315 | |
316 return map; | |
317 } | |
318 | |
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319 void RegisterSaver::restore_live_registers(MacroAssembler* masm, bool restore_vectors) { |
0 | 320 if (frame::arg_reg_save_area_bytes != 0) { |
321 // Pop arg register save area | |
304 | 322 __ addptr(rsp, frame::arg_reg_save_area_bytes); |
0 | 323 } |
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324 #if defined(COMPILER2) || defined(GRAAL) |
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325 if (restore_vectors) { |
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326 // Restore upper half of YMM registes. |
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327 assert(UseAVX > 0, "256bit vectors are supported only with AVX"); |
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328 assert(MaxVectorSize == 32, "only 256bit vectors are supported now"); |
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329 __ vinsertf128h(xmm0, Address(rsp, ymm_hi0_off * BytesPerInt)); |
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330 __ vinsertf128h(xmm1, Address(rsp, ymm_hi1_off * BytesPerInt)); |
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331 __ vinsertf128h(xmm2, Address(rsp, ymm_hi2_off * BytesPerInt)); |
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332 __ vinsertf128h(xmm3, Address(rsp, ymm_hi3_off * BytesPerInt)); |
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333 __ vinsertf128h(xmm4, Address(rsp, ymm_hi4_off * BytesPerInt)); |
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334 __ vinsertf128h(xmm5, Address(rsp, ymm_hi5_off * BytesPerInt)); |
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335 __ vinsertf128h(xmm6, Address(rsp, ymm_hi6_off * BytesPerInt)); |
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336 __ vinsertf128h(xmm7, Address(rsp, ymm_hi7_off * BytesPerInt)); |
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337 __ vinsertf128h(xmm8, Address(rsp, ymm_hi8_off * BytesPerInt)); |
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338 __ vinsertf128h(xmm9, Address(rsp, ymm_hi9_off * BytesPerInt)); |
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339 __ vinsertf128h(xmm10, Address(rsp, ymm_hi10_off * BytesPerInt)); |
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340 __ vinsertf128h(xmm11, Address(rsp, ymm_hi11_off * BytesPerInt)); |
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341 __ vinsertf128h(xmm12, Address(rsp, ymm_hi12_off * BytesPerInt)); |
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342 __ vinsertf128h(xmm13, Address(rsp, ymm_hi13_off * BytesPerInt)); |
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343 __ vinsertf128h(xmm14, Address(rsp, ymm_hi14_off * BytesPerInt)); |
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344 __ vinsertf128h(xmm15, Address(rsp, ymm_hi15_off * BytesPerInt)); |
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345 } |
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346 __ addptr(rsp, 256); |
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347 #else |
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348 assert(!restore_vectors, "vectors are generated only by C2 and Graal"); |
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349 #endif |
0 | 350 // Recover CPU state |
351 __ pop_CPU_state(); | |
352 // Get the rbp described implicitly by the calling convention (no oopMap) | |
304 | 353 __ pop(rbp); |
0 | 354 } |
355 | |
356 void RegisterSaver::restore_result_registers(MacroAssembler* masm) { | |
357 | |
358 // Just restore result register. Only used by deoptimization. By | |
359 // now any callee save register that needs to be restored to a c2 | |
360 // caller of the deoptee has been extracted into the vframeArray | |
361 // and will be stuffed into the c2i adapter we create for later | |
362 // restoration so only result registers need to be restored here. | |
363 | |
364 // Restore fp result register | |
365 __ movdbl(xmm0, Address(rsp, xmm0_offset_in_bytes())); | |
366 // Restore integer result register | |
304 | 367 __ movptr(rax, Address(rsp, rax_offset_in_bytes())); |
368 __ movptr(rdx, Address(rsp, rdx_offset_in_bytes())); | |
369 | |
0 | 370 // Pop all of the register save are off the stack except the return address |
304 | 371 __ addptr(rsp, return_offset_in_bytes()); |
0 | 372 } |
373 | |
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374 // Is vector's size (in bytes) bigger than a size saved by default? |
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375 // 16 bytes XMM registers are saved by default using fxsave/fxrstor instructions. |
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376 bool SharedRuntime::is_wide_vector(int size) { |
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377 return size > 16; |
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378 } |
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379 |
0 | 380 // The java_calling_convention describes stack locations as ideal slots on |
381 // a frame with no abi restrictions. Since we must observe abi restrictions | |
382 // (like the placement of the register window) the slots must be biased by | |
383 // the following value. | |
384 static int reg2offset_in(VMReg r) { | |
385 // Account for saved rbp and return address | |
386 // This should really be in_preserve_stack_slots | |
387 return (r->reg2stack() + 4) * VMRegImpl::stack_slot_size; | |
388 } | |
389 | |
390 static int reg2offset_out(VMReg r) { | |
391 return (r->reg2stack() + SharedRuntime::out_preserve_stack_slots()) * VMRegImpl::stack_slot_size; | |
392 } | |
393 | |
394 // --------------------------------------------------------------------------- | |
395 // Read the array of BasicTypes from a signature, and compute where the | |
396 // arguments should go. Values in the VMRegPair regs array refer to 4-byte | |
397 // quantities. Values less than VMRegImpl::stack0 are registers, those above | |
398 // refer to 4-byte stack slots. All stack slots are based off of the stack pointer | |
399 // as framesizes are fixed. | |
400 // VMRegImpl::stack0 refers to the first slot 0(sp). | |
401 // and VMRegImpl::stack0+1 refers to the memory word 4-byes higher. Register | |
402 // up to RegisterImpl::number_of_registers) are the 64-bit | |
403 // integer registers. | |
404 | |
405 // Note: the INPUTS in sig_bt are in units of Java argument words, which are | |
406 // either 32-bit or 64-bit depending on the build. The OUTPUTS are in 32-bit | |
407 // units regardless of build. Of course for i486 there is no 64 bit build | |
408 | |
409 // The Java calling convention is a "shifted" version of the C ABI. | |
410 // By skipping the first C ABI register we can call non-static jni methods | |
411 // with small numbers of arguments without having to shuffle the arguments | |
412 // at all. Since we control the java ABI we ought to at least get some | |
413 // advantage out of it. | |
414 | |
415 int SharedRuntime::java_calling_convention(const BasicType *sig_bt, | |
416 VMRegPair *regs, | |
417 int total_args_passed, | |
418 int is_outgoing) { | |
419 | |
420 // Create the mapping between argument positions and | |
421 // registers. | |
422 static const Register INT_ArgReg[Argument::n_int_register_parameters_j] = { | |
423 j_rarg0, j_rarg1, j_rarg2, j_rarg3, j_rarg4, j_rarg5 | |
424 }; | |
425 static const XMMRegister FP_ArgReg[Argument::n_float_register_parameters_j] = { | |
426 j_farg0, j_farg1, j_farg2, j_farg3, | |
427 j_farg4, j_farg5, j_farg6, j_farg7 | |
428 }; | |
429 | |
430 | |
431 uint int_args = 0; | |
432 uint fp_args = 0; | |
433 uint stk_args = 0; // inc by 2 each time | |
434 | |
435 for (int i = 0; i < total_args_passed; i++) { | |
436 switch (sig_bt[i]) { | |
437 case T_BOOLEAN: | |
438 case T_CHAR: | |
439 case T_BYTE: | |
440 case T_SHORT: | |
441 case T_INT: | |
442 if (int_args < Argument::n_int_register_parameters_j) { | |
443 regs[i].set1(INT_ArgReg[int_args++]->as_VMReg()); | |
444 } else { | |
445 regs[i].set1(VMRegImpl::stack2reg(stk_args)); | |
446 stk_args += 2; | |
447 } | |
448 break; | |
449 case T_VOID: | |
450 // halves of T_LONG or T_DOUBLE | |
451 assert(i != 0 && (sig_bt[i - 1] == T_LONG || sig_bt[i - 1] == T_DOUBLE), "expecting half"); | |
452 regs[i].set_bad(); | |
453 break; | |
454 case T_LONG: | |
455 assert(sig_bt[i + 1] == T_VOID, "expecting half"); | |
456 // fall through | |
457 case T_OBJECT: | |
458 case T_ARRAY: | |
459 case T_ADDRESS: | |
460 if (int_args < Argument::n_int_register_parameters_j) { | |
461 regs[i].set2(INT_ArgReg[int_args++]->as_VMReg()); | |
462 } else { | |
463 regs[i].set2(VMRegImpl::stack2reg(stk_args)); | |
464 stk_args += 2; | |
465 } | |
466 break; | |
467 case T_FLOAT: | |
468 if (fp_args < Argument::n_float_register_parameters_j) { | |
469 regs[i].set1(FP_ArgReg[fp_args++]->as_VMReg()); | |
470 } else { | |
471 regs[i].set1(VMRegImpl::stack2reg(stk_args)); | |
472 stk_args += 2; | |
473 } | |
474 break; | |
475 case T_DOUBLE: | |
476 assert(sig_bt[i + 1] == T_VOID, "expecting half"); | |
477 if (fp_args < Argument::n_float_register_parameters_j) { | |
478 regs[i].set2(FP_ArgReg[fp_args++]->as_VMReg()); | |
479 } else { | |
480 regs[i].set2(VMRegImpl::stack2reg(stk_args)); | |
481 stk_args += 2; | |
482 } | |
483 break; | |
484 default: | |
485 ShouldNotReachHere(); | |
486 break; | |
487 } | |
488 } | |
489 | |
490 return round_to(stk_args, 2); | |
491 } | |
492 | |
493 // Patch the callers callsite with entry to compiled code if it exists. | |
494 static void patch_callers_callsite(MacroAssembler *masm) { | |
495 Label L; | |
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496 __ cmpptr(Address(rbx, in_bytes(Method::code_offset())), (int32_t)NULL_WORD); |
0 | 497 __ jcc(Assembler::equal, L); |
498 | |
499 // Save the current stack pointer | |
304 | 500 __ mov(r13, rsp); |
0 | 501 // Schedule the branch target address early. |
502 // Call into the VM to patch the caller, then jump to compiled callee | |
503 // rax isn't live so capture return address while we easily can | |
304 | 504 __ movptr(rax, Address(rsp, 0)); |
0 | 505 |
506 // align stack so push_CPU_state doesn't fault | |
304 | 507 __ andptr(rsp, -(StackAlignmentInBytes)); |
0 | 508 __ push_CPU_state(); |
509 | |
510 // VM needs caller's callsite | |
511 // VM needs target method | |
512 // This needs to be a long call since we will relocate this adapter to | |
513 // the codeBuffer and it may not reach | |
514 | |
515 // Allocate argument register save area | |
516 if (frame::arg_reg_save_area_bytes != 0) { | |
304 | 517 __ subptr(rsp, frame::arg_reg_save_area_bytes); |
0 | 518 } |
304 | 519 __ mov(c_rarg0, rbx); |
520 __ mov(c_rarg1, rax); | |
0 | 521 __ call(RuntimeAddress(CAST_FROM_FN_PTR(address, SharedRuntime::fixup_callers_callsite))); |
522 | |
523 // De-allocate argument register save area | |
524 if (frame::arg_reg_save_area_bytes != 0) { | |
304 | 525 __ addptr(rsp, frame::arg_reg_save_area_bytes); |
0 | 526 } |
527 | |
528 __ pop_CPU_state(); | |
529 // restore sp | |
304 | 530 __ mov(rsp, r13); |
0 | 531 __ bind(L); |
532 } | |
533 | |
534 | |
535 static void gen_c2i_adapter(MacroAssembler *masm, | |
536 int total_args_passed, | |
537 int comp_args_on_stack, | |
538 const BasicType *sig_bt, | |
539 const VMRegPair *regs, | |
540 Label& skip_fixup) { | |
541 // Before we get into the guts of the C2I adapter, see if we should be here | |
542 // at all. We've come from compiled code and are attempting to jump to the | |
543 // interpreter, which means the caller made a static call to get here | |
544 // (vcalls always get a compiled target if there is one). Check for a | |
545 // compiled target. If there is one, we need to patch the caller's call. | |
546 patch_callers_callsite(masm); | |
547 | |
548 __ bind(skip_fixup); | |
549 | |
550 // Since all args are passed on the stack, total_args_passed * | |
551 // Interpreter::stackElementSize is the space we need. Plus 1 because | |
552 // we also account for the return address location since | |
553 // we store it first rather than hold it in rax across all the shuffling | |
554 | |
1506 | 555 int extraspace = (total_args_passed * Interpreter::stackElementSize) + wordSize; |
0 | 556 |
557 // stack is aligned, keep it that way | |
558 extraspace = round_to(extraspace, 2*wordSize); | |
559 | |
560 // Get return address | |
304 | 561 __ pop(rax); |
0 | 562 |
563 // set senderSP value | |
304 | 564 __ mov(r13, rsp); |
565 | |
566 __ subptr(rsp, extraspace); | |
0 | 567 |
568 // Store the return address in the expected location | |
304 | 569 __ movptr(Address(rsp, 0), rax); |
0 | 570 |
571 // Now write the args into the outgoing interpreter space | |
572 for (int i = 0; i < total_args_passed; i++) { | |
573 if (sig_bt[i] == T_VOID) { | |
574 assert(i > 0 && (sig_bt[i-1] == T_LONG || sig_bt[i-1] == T_DOUBLE), "missing half"); | |
575 continue; | |
576 } | |
577 | |
578 // offset to start parameters | |
1506 | 579 int st_off = (total_args_passed - i) * Interpreter::stackElementSize; |
580 int next_off = st_off - Interpreter::stackElementSize; | |
0 | 581 |
582 // Say 4 args: | |
583 // i st_off | |
584 // 0 32 T_LONG | |
585 // 1 24 T_VOID | |
586 // 2 16 T_OBJECT | |
587 // 3 8 T_BOOL | |
588 // - 0 return address | |
589 // | |
590 // However to make thing extra confusing. Because we can fit a long/double in | |
591 // a single slot on a 64 bt vm and it would be silly to break them up, the interpreter | |
592 // leaves one slot empty and only stores to a single slot. In this case the | |
593 // slot that is occupied is the T_VOID slot. See I said it was confusing. | |
594 | |
595 VMReg r_1 = regs[i].first(); | |
596 VMReg r_2 = regs[i].second(); | |
597 if (!r_1->is_valid()) { | |
598 assert(!r_2->is_valid(), ""); | |
599 continue; | |
600 } | |
601 if (r_1->is_stack()) { | |
602 // memory to memory use rax | |
603 int ld_off = r_1->reg2stack() * VMRegImpl::stack_slot_size + extraspace; | |
604 if (!r_2->is_valid()) { | |
605 // sign extend?? | |
606 __ movl(rax, Address(rsp, ld_off)); | |
304 | 607 __ movptr(Address(rsp, st_off), rax); |
0 | 608 |
609 } else { | |
610 | |
611 __ movq(rax, Address(rsp, ld_off)); | |
612 | |
613 // Two VMREgs|OptoRegs can be T_OBJECT, T_ADDRESS, T_DOUBLE, T_LONG | |
614 // T_DOUBLE and T_LONG use two slots in the interpreter | |
615 if ( sig_bt[i] == T_LONG || sig_bt[i] == T_DOUBLE) { | |
616 // ld_off == LSW, ld_off+wordSize == MSW | |
617 // st_off == MSW, next_off == LSW | |
618 __ movq(Address(rsp, next_off), rax); | |
619 #ifdef ASSERT | |
620 // Overwrite the unused slot with known junk | |
621 __ mov64(rax, CONST64(0xdeadffffdeadaaaa)); | |
304 | 622 __ movptr(Address(rsp, st_off), rax); |
0 | 623 #endif /* ASSERT */ |
624 } else { | |
625 __ movq(Address(rsp, st_off), rax); | |
626 } | |
627 } | |
628 } else if (r_1->is_Register()) { | |
629 Register r = r_1->as_Register(); | |
630 if (!r_2->is_valid()) { | |
631 // must be only an int (or less ) so move only 32bits to slot | |
632 // why not sign extend?? | |
633 __ movl(Address(rsp, st_off), r); | |
634 } else { | |
635 // Two VMREgs|OptoRegs can be T_OBJECT, T_ADDRESS, T_DOUBLE, T_LONG | |
636 // T_DOUBLE and T_LONG use two slots in the interpreter | |
637 if ( sig_bt[i] == T_LONG || sig_bt[i] == T_DOUBLE) { | |
638 // long/double in gpr | |
639 #ifdef ASSERT | |
640 // Overwrite the unused slot with known junk | |
641 __ mov64(rax, CONST64(0xdeadffffdeadaaab)); | |
304 | 642 __ movptr(Address(rsp, st_off), rax); |
0 | 643 #endif /* ASSERT */ |
644 __ movq(Address(rsp, next_off), r); | |
645 } else { | |
304 | 646 __ movptr(Address(rsp, st_off), r); |
0 | 647 } |
648 } | |
649 } else { | |
650 assert(r_1->is_XMMRegister(), ""); | |
651 if (!r_2->is_valid()) { | |
652 // only a float use just part of the slot | |
653 __ movflt(Address(rsp, st_off), r_1->as_XMMRegister()); | |
654 } else { | |
655 #ifdef ASSERT | |
656 // Overwrite the unused slot with known junk | |
657 __ mov64(rax, CONST64(0xdeadffffdeadaaac)); | |
304 | 658 __ movptr(Address(rsp, st_off), rax); |
0 | 659 #endif /* ASSERT */ |
660 __ movdbl(Address(rsp, next_off), r_1->as_XMMRegister()); | |
661 } | |
662 } | |
663 } | |
664 | |
665 // Schedule the branch target address early. | |
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666 __ movptr(rcx, Address(rbx, in_bytes(Method::interpreter_entry_offset()))); |
0 | 667 __ jmp(rcx); |
668 } | |
669 | |
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670 static void range_check(MacroAssembler* masm, Register pc_reg, Register temp_reg, |
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671 address code_start, address code_end, |
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672 Label& L_ok) { |
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673 Label L_fail; |
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674 __ lea(temp_reg, ExternalAddress(code_start)); |
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675 __ cmpptr(pc_reg, temp_reg); |
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676 __ jcc(Assembler::belowEqual, L_fail); |
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677 __ lea(temp_reg, ExternalAddress(code_end)); |
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678 __ cmpptr(pc_reg, temp_reg); |
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679 __ jcc(Assembler::below, L_ok); |
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680 __ bind(L_fail); |
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681 } |
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682 |
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683 void SharedRuntime::gen_i2c_adapter(MacroAssembler *masm, |
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684 int total_args_passed, |
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685 int comp_args_on_stack, |
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686 const BasicType *sig_bt, |
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687 const VMRegPair *regs, |
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688 int frame_extension_argument) { |
0 | 689 |
690 // Note: r13 contains the senderSP on entry. We must preserve it since | |
691 // we may do a i2c -> c2i transition if we lose a race where compiled | |
692 // code goes non-entrant while we get args ready. | |
693 // In addition we use r13 to locate all the interpreter args as | |
694 // we must align the stack to 16 bytes on an i2c entry else we | |
695 // lose alignment we expect in all compiled code and register | |
696 // save code can segv when fxsave instructions find improperly | |
697 // aligned stack pointer. | |
698 | |
6266
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699 // Adapters can be frameless because they do not require the caller |
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700 // to perform additional cleanup work, such as correcting the stack pointer. |
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701 // An i2c adapter is frameless because the *caller* frame, which is interpreted, |
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702 // routinely repairs its own stack pointer (from interpreter_frame_last_sp), |
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703 // even if a callee has modified the stack pointer. |
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704 // A c2i adapter is frameless because the *callee* frame, which is interpreted, |
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705 // routinely repairs its caller's stack pointer (from sender_sp, which is set |
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706 // up via the senderSP register). |
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707 // In other words, if *either* the caller or callee is interpreted, we can |
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708 // get the stack pointer repaired after a call. |
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709 // This is why c2i and i2c adapters cannot be indefinitely composed. |
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710 // In particular, if a c2i adapter were to somehow call an i2c adapter, |
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711 // both caller and callee would be compiled methods, and neither would |
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712 // clean up the stack pointer changes performed by the two adapters. |
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713 // If this happens, control eventually transfers back to the compiled |
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714 // caller, but with an uncorrected stack, causing delayed havoc. |
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715 |
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638119ce7cfd
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716 // Pick up the return address |
304 | 717 __ movptr(rax, Address(rsp, 0)); |
0 | 718 |
6266
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719 if (VerifyAdapterCalls && |
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720 (Interpreter::code() != NULL || StubRoutines::code1() != NULL)) { |
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721 // So, let's test for cascading c2i/i2c adapters right now. |
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722 // assert(Interpreter::contains($return_addr) || |
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723 // StubRoutines::contains($return_addr), |
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724 // "i2c adapter must return to an interpreter frame"); |
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725 __ block_comment("verify_i2c { "); |
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726 Label L_ok; |
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727 if (Interpreter::code() != NULL) |
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728 range_check(masm, rax, r11, |
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729 Interpreter::code()->code_start(), Interpreter::code()->code_end(), |
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730 L_ok); |
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731 if (StubRoutines::code1() != NULL) |
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732 range_check(masm, rax, r11, |
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733 StubRoutines::code1()->code_begin(), StubRoutines::code1()->code_end(), |
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734 L_ok); |
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735 if (StubRoutines::code2() != NULL) |
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736 range_check(masm, rax, r11, |
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737 StubRoutines::code2()->code_begin(), StubRoutines::code2()->code_end(), |
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738 L_ok); |
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739 const char* msg = "i2c adapter must return to an interpreter frame"; |
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740 __ block_comment(msg); |
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741 __ stop(msg); |
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742 __ bind(L_ok); |
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743 __ block_comment("} verify_i2ce "); |
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744 } |
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745 |
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746 #ifdef GRAAL |
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747 if (frame_extension_argument != -1) { |
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748 // The frame_extension_argument is an int that describes the |
2d6dd2eebd51
Fixed HSAIL deopt
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749 // expected amount of argument space in the caller frame. If that |
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|
750 // is greater than total_args_passed then enlarge the caller frame |
2d6dd2eebd51
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changeset
|
751 // by that amount to ensure deopt works correctly. |
2d6dd2eebd51
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changeset
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752 assert(frame_extension_argument < total_args_passed, "out of range"); |
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parents:
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|
753 assert(sig_bt[frame_extension_argument] == T_INT, "wrong signature"); |
2d6dd2eebd51
Fixed HSAIL deopt
Tom Rodriguez <tom.rodriguez@oracle.com>
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|
754 |
2d6dd2eebd51
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755 Label done; |
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Fixed HSAIL deopt
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756 int i = frame_extension_argument; |
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|
757 int ld_off = (total_args_passed - i)*Interpreter::stackElementSize; |
2d6dd2eebd51
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758 // Check if anything needs to be done. Too much space is ok. |
2d6dd2eebd51
Fixed HSAIL deopt
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759 __ movl(r13, Address(rsp, ld_off)); |
2d6dd2eebd51
Fixed HSAIL deopt
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|
760 __ cmpl(r13, total_args_passed); |
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Fixed HSAIL deopt
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761 __ jcc(Assembler::lessEqual, done); |
2d6dd2eebd51
Fixed HSAIL deopt
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|
762 // Save the old rsp for the copy code |
2d6dd2eebd51
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|
763 __ movptr(r11, rsp); |
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|
764 // Enlarge the frame |
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|
765 __ subl(r13, total_args_passed); |
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|
766 __ shlq(r13, 3); |
2d6dd2eebd51
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|
767 __ subptr(rsp, r13); |
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|
768 |
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|
769 // Now copy the arguments in reverse order so they don't get |
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|
770 // overwritten during the copy. |
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Fixed HSAIL deopt
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771 for (int i = total_args_passed - 1; i >= 0; i--) { |
2d6dd2eebd51
Fixed HSAIL deopt
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772 int ld_off = (total_args_passed - i) * Interpreter::stackElementSize; |
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773 __ movptr(r13, Address(r11, ld_off)); |
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774 __ movptr(Address(rsp, ld_off), r13); |
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775 } |
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Fixed HSAIL deopt
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776 __ bind(done); |
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777 } |
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778 #else |
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779 assert(frame_extension_argument == -1, "unsupported"); |
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780 #endif |
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781 |
1135
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782 // Must preserve original SP for loading incoming arguments because |
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783 // we need to align the outgoing SP for compiled code. |
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784 __ movptr(r11, rsp); |
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785 |
0 | 786 // Cut-out for having no stack args. Since up to 2 int/oop args are passed |
787 // in registers, we will occasionally have no stack args. | |
788 int comp_words_on_stack = 0; | |
789 if (comp_args_on_stack) { | |
790 // Sig words on the stack are greater-than VMRegImpl::stack0. Those in | |
791 // registers are below. By subtracting stack0, we either get a negative | |
792 // number (all values in registers) or the maximum stack slot accessed. | |
793 | |
794 // Convert 4-byte c2 stack slots to words. | |
795 comp_words_on_stack = round_to(comp_args_on_stack*VMRegImpl::stack_slot_size, wordSize)>>LogBytesPerWord; | |
796 // Round up to miminum stack alignment, in wordSize | |
797 comp_words_on_stack = round_to(comp_words_on_stack, 2); | |
304 | 798 __ subptr(rsp, comp_words_on_stack * wordSize); |
0 | 799 } |
800 | |
801 | |
802 // Ensure compiled code always sees stack at proper alignment | |
304 | 803 __ andptr(rsp, -16); |
0 | 804 |
805 // push the return address and misalign the stack that youngest frame always sees | |
806 // as far as the placement of the call instruction | |
304 | 807 __ push(rax); |
0 | 808 |
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809 // Put saved SP in another register |
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|
810 const Register saved_sp = rax; |
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811 __ movptr(saved_sp, r11); |
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812 |
0 | 813 // Will jump to the compiled code just as if compiled code was doing it. |
814 // Pre-load the register-jump target early, to schedule it better. | |
6725
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815 __ movptr(r11, Address(rbx, in_bytes(Method::from_compiled_offset()))); |
0 | 816 |
4993
897b7d18bebc
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|
817 #ifdef GRAAL |
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added RiCompiledMethod.execute and the required VM infrastructure
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|
818 // check if this call should be routed towards a specific entry point |
897b7d18bebc
added RiCompiledMethod.execute and the required VM infrastructure
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|
819 __ cmpptr(Address(r15_thread, in_bytes(JavaThread::graal_alternate_call_target_offset())), 0); |
897b7d18bebc
added RiCompiledMethod.execute and the required VM infrastructure
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|
820 Label no_alternative_target; |
897b7d18bebc
added RiCompiledMethod.execute and the required VM infrastructure
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|
821 __ jcc(Assembler::equal, no_alternative_target); |
897b7d18bebc
added RiCompiledMethod.execute and the required VM infrastructure
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diff
changeset
|
822 __ movptr(r11, Address(r15_thread, in_bytes(JavaThread::graal_alternate_call_target_offset()))); |
897b7d18bebc
added RiCompiledMethod.execute and the required VM infrastructure
Lukas Stadler <lukas.stadler@jku.at>
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changeset
|
823 __ movptr(Address(r15_thread, in_bytes(JavaThread::graal_alternate_call_target_offset())), 0); |
897b7d18bebc
added RiCompiledMethod.execute and the required VM infrastructure
Lukas Stadler <lukas.stadler@jku.at>
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diff
changeset
|
824 __ bind(no_alternative_target); |
897b7d18bebc
added RiCompiledMethod.execute and the required VM infrastructure
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|
825 #endif |
897b7d18bebc
added RiCompiledMethod.execute and the required VM infrastructure
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|
826 |
0 | 827 // Now generate the shuffle code. Pick up all register args and move the |
828 // rest through the floating point stack top. | |
829 for (int i = 0; i < total_args_passed; i++) { | |
830 if (sig_bt[i] == T_VOID) { | |
831 // Longs and doubles are passed in native word order, but misaligned | |
832 // in the 32-bit build. | |
833 assert(i > 0 && (sig_bt[i-1] == T_LONG || sig_bt[i-1] == T_DOUBLE), "missing half"); | |
834 continue; | |
835 } | |
836 | |
837 // Pick up 0, 1 or 2 words from SP+offset. | |
838 | |
839 assert(!regs[i].second()->is_valid() || regs[i].first()->next() == regs[i].second(), | |
840 "scrambled load targets?"); | |
841 // Load in argument order going down. | |
1506 | 842 int ld_off = (total_args_passed - i)*Interpreter::stackElementSize; |
0 | 843 // Point to interpreter value (vs. tag) |
1506 | 844 int next_off = ld_off - Interpreter::stackElementSize; |
0 | 845 // |
846 // | |
847 // | |
848 VMReg r_1 = regs[i].first(); | |
849 VMReg r_2 = regs[i].second(); | |
850 if (!r_1->is_valid()) { | |
851 assert(!r_2->is_valid(), ""); | |
852 continue; | |
853 } | |
854 if (r_1->is_stack()) { | |
855 // Convert stack slot to an SP offset (+ wordSize to account for return address ) | |
856 int st_off = regs[i].first()->reg2stack()*VMRegImpl::stack_slot_size + wordSize; | |
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857 |
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858 // We can use r13 as a temp here because compiled code doesn't need r13 as an input |
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859 // and if we end up going thru a c2i because of a miss a reasonable value of r13 |
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860 // will be generated. |
0 | 861 if (!r_2->is_valid()) { |
862 // sign extend??? | |
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863 __ movl(r13, Address(saved_sp, ld_off)); |
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864 __ movptr(Address(rsp, st_off), r13); |
0 | 865 } else { |
866 // | |
867 // We are using two optoregs. This can be either T_OBJECT, T_ADDRESS, T_LONG, or T_DOUBLE | |
868 // the interpreter allocates two slots but only uses one for thr T_LONG or T_DOUBLE case | |
869 // So we must adjust where to pick up the data to match the interpreter. | |
870 // | |
871 // Interpreter local[n] == MSW, local[n+1] == LSW however locals | |
872 // are accessed as negative so LSW is at LOW address | |
873 | |
874 // ld_off is MSW so get LSW | |
875 const int offset = (sig_bt[i]==T_LONG||sig_bt[i]==T_DOUBLE)? | |
876 next_off : ld_off; | |
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877 __ movq(r13, Address(saved_sp, offset)); |
0 | 878 // st_off is LSW (i.e. reg.first()) |
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879 __ movq(Address(rsp, st_off), r13); |
0 | 880 } |
881 } else if (r_1->is_Register()) { // Register argument | |
882 Register r = r_1->as_Register(); | |
883 assert(r != rax, "must be different"); | |
884 if (r_2->is_valid()) { | |
885 // | |
886 // We are using two VMRegs. This can be either T_OBJECT, T_ADDRESS, T_LONG, or T_DOUBLE | |
887 // the interpreter allocates two slots but only uses one for thr T_LONG or T_DOUBLE case | |
888 // So we must adjust where to pick up the data to match the interpreter. | |
889 | |
890 const int offset = (sig_bt[i]==T_LONG||sig_bt[i]==T_DOUBLE)? | |
891 next_off : ld_off; | |
892 | |
893 // this can be a misaligned move | |
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894 __ movq(r, Address(saved_sp, offset)); |
0 | 895 } else { |
896 // sign extend and use a full word? | |
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897 __ movl(r, Address(saved_sp, ld_off)); |
0 | 898 } |
899 } else { | |
900 if (!r_2->is_valid()) { | |
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901 __ movflt(r_1->as_XMMRegister(), Address(saved_sp, ld_off)); |
0 | 902 } else { |
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903 __ movdbl(r_1->as_XMMRegister(), Address(saved_sp, next_off)); |
0 | 904 } |
905 } | |
906 } | |
907 | |
908 // 6243940 We might end up in handle_wrong_method if | |
909 // the callee is deoptimized as we race thru here. If that | |
910 // happens we don't want to take a safepoint because the | |
911 // caller frame will look interpreted and arguments are now | |
912 // "compiled" so it is much better to make this transition | |
913 // invisible to the stack walking code. Unfortunately if | |
914 // we try and find the callee by normal means a safepoint | |
915 // is possible. So we stash the desired callee in the thread | |
916 // and the vm will find there should this case occur. | |
917 | |
304 | 918 __ movptr(Address(r15_thread, JavaThread::callee_target_offset()), rbx); |
0 | 919 |
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920 // put Method* where a c2i would expect should we end up there |
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921 // only needed becaus eof c2 resolve stubs return Method* as a result in |
0 | 922 // rax |
304 | 923 __ mov(rax, rbx); |
0 | 924 __ jmp(r11); |
925 } | |
926 | |
927 // --------------------------------------------------------------- | |
928 AdapterHandlerEntry* SharedRuntime::generate_i2c2i_adapters(MacroAssembler *masm, | |
929 int total_args_passed, | |
930 int comp_args_on_stack, | |
931 const BasicType *sig_bt, | |
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932 const VMRegPair *regs, |
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933 AdapterFingerPrint* fingerprint) { |
0 | 934 address i2c_entry = __ pc(); |
935 | |
936 gen_i2c_adapter(masm, total_args_passed, comp_args_on_stack, sig_bt, regs); | |
937 | |
938 // ------------------------------------------------------------------------- | |
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939 // Generate a C2I adapter. On entry we know rbx holds the Method* during calls |
0 | 940 // to the interpreter. The args start out packed in the compiled layout. They |
941 // need to be unpacked into the interpreter layout. This will almost always | |
942 // require some stack space. We grow the current (compiled) stack, then repack | |
943 // the args. We finally end in a jump to the generic interpreter entry point. | |
944 // On exit from the interpreter, the interpreter will restore our SP (lest the | |
945 // compiled code, which relys solely on SP and not RBP, get sick). | |
946 | |
947 address c2i_unverified_entry = __ pc(); | |
948 Label skip_fixup; | |
949 Label ok; | |
950 | |
951 Register holder = rax; | |
952 Register receiver = j_rarg0; | |
953 Register temp = rbx; | |
954 | |
955 { | |
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956 __ load_klass(temp, receiver); |
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957 __ cmpptr(temp, Address(holder, CompiledICHolder::holder_klass_offset())); |
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958 __ movptr(rbx, Address(holder, CompiledICHolder::holder_method_offset())); |
0 | 959 __ jcc(Assembler::equal, ok); |
960 __ jump(RuntimeAddress(SharedRuntime::get_ic_miss_stub())); | |
961 | |
962 __ bind(ok); | |
963 // Method might have been compiled since the call site was patched to | |
964 // interpreted if that is the case treat it as a miss so we can get | |
965 // the call site corrected. | |
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966 __ cmpptr(Address(rbx, in_bytes(Method::code_offset())), (int32_t)NULL_WORD); |
0 | 967 __ jcc(Assembler::equal, skip_fixup); |
968 __ jump(RuntimeAddress(SharedRuntime::get_ic_miss_stub())); | |
969 } | |
970 | |
971 address c2i_entry = __ pc(); | |
972 | |
973 gen_c2i_adapter(masm, total_args_passed, comp_args_on_stack, sig_bt, regs, skip_fixup); | |
974 | |
975 __ flush(); | |
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976 return AdapterHandlerLibrary::new_entry(fingerprint, i2c_entry, c2i_entry, c2i_unverified_entry); |
0 | 977 } |
978 | |
979 int SharedRuntime::c_calling_convention(const BasicType *sig_bt, | |
980 VMRegPair *regs, | |
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981 VMRegPair *regs2, |
0 | 982 int total_args_passed) { |
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983 assert(regs2 == NULL, "not needed on x86"); |
0 | 984 // We return the amount of VMRegImpl stack slots we need to reserve for all |
985 // the arguments NOT counting out_preserve_stack_slots. | |
986 | |
987 // NOTE: These arrays will have to change when c1 is ported | |
988 #ifdef _WIN64 | |
989 static const Register INT_ArgReg[Argument::n_int_register_parameters_c] = { | |
990 c_rarg0, c_rarg1, c_rarg2, c_rarg3 | |
991 }; | |
992 static const XMMRegister FP_ArgReg[Argument::n_float_register_parameters_c] = { | |
993 c_farg0, c_farg1, c_farg2, c_farg3 | |
994 }; | |
995 #else | |
996 static const Register INT_ArgReg[Argument::n_int_register_parameters_c] = { | |
997 c_rarg0, c_rarg1, c_rarg2, c_rarg3, c_rarg4, c_rarg5 | |
998 }; | |
999 static const XMMRegister FP_ArgReg[Argument::n_float_register_parameters_c] = { | |
1000 c_farg0, c_farg1, c_farg2, c_farg3, | |
1001 c_farg4, c_farg5, c_farg6, c_farg7 | |
1002 }; | |
1003 #endif // _WIN64 | |
1004 | |
1005 | |
1006 uint int_args = 0; | |
1007 uint fp_args = 0; | |
1008 uint stk_args = 0; // inc by 2 each time | |
1009 | |
1010 for (int i = 0; i < total_args_passed; i++) { | |
1011 switch (sig_bt[i]) { | |
1012 case T_BOOLEAN: | |
1013 case T_CHAR: | |
1014 case T_BYTE: | |
1015 case T_SHORT: | |
1016 case T_INT: | |
1017 if (int_args < Argument::n_int_register_parameters_c) { | |
1018 regs[i].set1(INT_ArgReg[int_args++]->as_VMReg()); | |
1019 #ifdef _WIN64 | |
1020 fp_args++; | |
1021 // Allocate slots for callee to stuff register args the stack. | |
1022 stk_args += 2; | |
1023 #endif | |
1024 } else { | |
1025 regs[i].set1(VMRegImpl::stack2reg(stk_args)); | |
1026 stk_args += 2; | |
1027 } | |
1028 break; | |
1029 case T_LONG: | |
1030 assert(sig_bt[i + 1] == T_VOID, "expecting half"); | |
1031 // fall through | |
1032 case T_OBJECT: | |
1033 case T_ARRAY: | |
1034 case T_ADDRESS: | |
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1035 case T_METADATA: |
0 | 1036 if (int_args < Argument::n_int_register_parameters_c) { |
1037 regs[i].set2(INT_ArgReg[int_args++]->as_VMReg()); | |
1038 #ifdef _WIN64 | |
1039 fp_args++; | |
1040 stk_args += 2; | |
1041 #endif | |
1042 } else { | |
1043 regs[i].set2(VMRegImpl::stack2reg(stk_args)); | |
1044 stk_args += 2; | |
1045 } | |
1046 break; | |
1047 case T_FLOAT: | |
1048 if (fp_args < Argument::n_float_register_parameters_c) { | |
1049 regs[i].set1(FP_ArgReg[fp_args++]->as_VMReg()); | |
1050 #ifdef _WIN64 | |
1051 int_args++; | |
1052 // Allocate slots for callee to stuff register args the stack. | |
1053 stk_args += 2; | |
1054 #endif | |
1055 } else { | |
1056 regs[i].set1(VMRegImpl::stack2reg(stk_args)); | |
1057 stk_args += 2; | |
1058 } | |
1059 break; | |
1060 case T_DOUBLE: | |
1061 assert(sig_bt[i + 1] == T_VOID, "expecting half"); | |
1062 if (fp_args < Argument::n_float_register_parameters_c) { | |
1063 regs[i].set2(FP_ArgReg[fp_args++]->as_VMReg()); | |
1064 #ifdef _WIN64 | |
1065 int_args++; | |
1066 // Allocate slots for callee to stuff register args the stack. | |
1067 stk_args += 2; | |
1068 #endif | |
1069 } else { | |
1070 regs[i].set2(VMRegImpl::stack2reg(stk_args)); | |
1071 stk_args += 2; | |
1072 } | |
1073 break; | |
1074 case T_VOID: // Halves of longs and doubles | |
1075 assert(i != 0 && (sig_bt[i - 1] == T_LONG || sig_bt[i - 1] == T_DOUBLE), "expecting half"); | |
1076 regs[i].set_bad(); | |
1077 break; | |
1078 default: | |
1079 ShouldNotReachHere(); | |
1080 break; | |
1081 } | |
1082 } | |
1083 #ifdef _WIN64 | |
1084 // windows abi requires that we always allocate enough stack space | |
1085 // for 4 64bit registers to be stored down. | |
1086 if (stk_args < 8) { | |
1087 stk_args = 8; | |
1088 } | |
1089 #endif // _WIN64 | |
1090 | |
1091 return stk_args; | |
1092 } | |
1093 | |
1094 // On 64 bit we will store integer like items to the stack as | |
1095 // 64 bits items (sparc abi) even though java would only store | |
1096 // 32bits for a parameter. On 32bit it will simply be 32 bits | |
1097 // So this routine will do 32->32 on 32bit and 32->64 on 64bit | |
1098 static void move32_64(MacroAssembler* masm, VMRegPair src, VMRegPair dst) { | |
1099 if (src.first()->is_stack()) { | |
1100 if (dst.first()->is_stack()) { | |
1101 // stack to stack | |
1102 __ movslq(rax, Address(rbp, reg2offset_in(src.first()))); | |
1103 __ movq(Address(rsp, reg2offset_out(dst.first())), rax); | |
1104 } else { | |
1105 // stack to reg | |
1106 __ movslq(dst.first()->as_Register(), Address(rbp, reg2offset_in(src.first()))); | |
1107 } | |
1108 } else if (dst.first()->is_stack()) { | |
1109 // reg to stack | |
1110 // Do we really have to sign extend??? | |
1111 // __ movslq(src.first()->as_Register(), src.first()->as_Register()); | |
1112 __ movq(Address(rsp, reg2offset_out(dst.first())), src.first()->as_Register()); | |
1113 } else { | |
1114 // Do we really have to sign extend??? | |
1115 // __ movslq(dst.first()->as_Register(), src.first()->as_Register()); | |
1116 if (dst.first() != src.first()) { | |
1117 __ movq(dst.first()->as_Register(), src.first()->as_Register()); | |
1118 } | |
1119 } | |
1120 } | |
1121 | |
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1122 static void move_ptr(MacroAssembler* masm, VMRegPair src, VMRegPair dst) { |
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1123 if (src.first()->is_stack()) { |
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1124 if (dst.first()->is_stack()) { |
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1125 // stack to stack |
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1126 __ movq(rax, Address(rbp, reg2offset_in(src.first()))); |
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1127 __ movq(Address(rsp, reg2offset_out(dst.first())), rax); |
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1128 } else { |
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1129 // stack to reg |
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1130 __ movq(dst.first()->as_Register(), Address(rbp, reg2offset_in(src.first()))); |
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1131 } |
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1132 } else if (dst.first()->is_stack()) { |
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1133 // reg to stack |
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1134 __ movq(Address(rsp, reg2offset_out(dst.first())), src.first()->as_Register()); |
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1135 } else { |
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1136 if (dst.first() != src.first()) { |
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1137 __ movq(dst.first()->as_Register(), src.first()->as_Register()); |
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1138 } |
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1139 } |
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1140 } |
0 | 1141 |
1142 // An oop arg. Must pass a handle not the oop itself | |
1143 static void object_move(MacroAssembler* masm, | |
1144 OopMap* map, | |
1145 int oop_handle_offset, | |
1146 int framesize_in_slots, | |
1147 VMRegPair src, | |
1148 VMRegPair dst, | |
1149 bool is_receiver, | |
1150 int* receiver_offset) { | |
1151 | |
1152 // must pass a handle. First figure out the location we use as a handle | |
1153 | |
1154 Register rHandle = dst.first()->is_stack() ? rax : dst.first()->as_Register(); | |
1155 | |
1156 // See if oop is NULL if it is we need no handle | |
1157 | |
1158 if (src.first()->is_stack()) { | |
1159 | |
1160 // Oop is already on the stack as an argument | |
1161 int offset_in_older_frame = src.first()->reg2stack() + SharedRuntime::out_preserve_stack_slots(); | |
1162 map->set_oop(VMRegImpl::stack2reg(offset_in_older_frame + framesize_in_slots)); | |
1163 if (is_receiver) { | |
1164 *receiver_offset = (offset_in_older_frame + framesize_in_slots) * VMRegImpl::stack_slot_size; | |
1165 } | |
1166 | |
304 | 1167 __ cmpptr(Address(rbp, reg2offset_in(src.first())), (int32_t)NULL_WORD); |
1168 __ lea(rHandle, Address(rbp, reg2offset_in(src.first()))); | |
0 | 1169 // conditionally move a NULL |
304 | 1170 __ cmovptr(Assembler::equal, rHandle, Address(rbp, reg2offset_in(src.first()))); |
0 | 1171 } else { |
1172 | |
1173 // Oop is in an a register we must store it to the space we reserve | |
1174 // on the stack for oop_handles and pass a handle if oop is non-NULL | |
1175 | |
1176 const Register rOop = src.first()->as_Register(); | |
1177 int oop_slot; | |
1178 if (rOop == j_rarg0) | |
1179 oop_slot = 0; | |
1180 else if (rOop == j_rarg1) | |
1181 oop_slot = 1; | |
1182 else if (rOop == j_rarg2) | |
1183 oop_slot = 2; | |
1184 else if (rOop == j_rarg3) | |
1185 oop_slot = 3; | |
1186 else if (rOop == j_rarg4) | |
1187 oop_slot = 4; | |
1188 else { | |
1189 assert(rOop == j_rarg5, "wrong register"); | |
1190 oop_slot = 5; | |
1191 } | |
1192 | |
1193 oop_slot = oop_slot * VMRegImpl::slots_per_word + oop_handle_offset; | |
1194 int offset = oop_slot*VMRegImpl::stack_slot_size; | |
1195 | |
1196 map->set_oop(VMRegImpl::stack2reg(oop_slot)); | |
1197 // Store oop in handle area, may be NULL | |
304 | 1198 __ movptr(Address(rsp, offset), rOop); |
0 | 1199 if (is_receiver) { |
1200 *receiver_offset = offset; | |
1201 } | |
1202 | |
304 | 1203 __ cmpptr(rOop, (int32_t)NULL_WORD); |
1204 __ lea(rHandle, Address(rsp, offset)); | |
0 | 1205 // conditionally move a NULL from the handle area where it was just stored |
304 | 1206 __ cmovptr(Assembler::equal, rHandle, Address(rsp, offset)); |
0 | 1207 } |
1208 | |
1209 // If arg is on the stack then place it otherwise it is already in correct reg. | |
1210 if (dst.first()->is_stack()) { | |
304 | 1211 __ movptr(Address(rsp, reg2offset_out(dst.first())), rHandle); |
0 | 1212 } |
1213 } | |
1214 | |
1215 // A float arg may have to do float reg int reg conversion | |
1216 static void float_move(MacroAssembler* masm, VMRegPair src, VMRegPair dst) { | |
1217 assert(!src.second()->is_valid() && !dst.second()->is_valid(), "bad float_move"); | |
1218 | |
1219 // The calling conventions assures us that each VMregpair is either | |
1220 // all really one physical register or adjacent stack slots. | |
1221 // This greatly simplifies the cases here compared to sparc. | |
1222 | |
1223 if (src.first()->is_stack()) { | |
1224 if (dst.first()->is_stack()) { | |
1225 __ movl(rax, Address(rbp, reg2offset_in(src.first()))); | |
304 | 1226 __ movptr(Address(rsp, reg2offset_out(dst.first())), rax); |
0 | 1227 } else { |
1228 // stack to reg | |
1229 assert(dst.first()->is_XMMRegister(), "only expect xmm registers as parameters"); | |
1230 __ movflt(dst.first()->as_XMMRegister(), Address(rbp, reg2offset_in(src.first()))); | |
1231 } | |
1232 } else if (dst.first()->is_stack()) { | |
1233 // reg to stack | |
1234 assert(src.first()->is_XMMRegister(), "only expect xmm registers as parameters"); | |
1235 __ movflt(Address(rsp, reg2offset_out(dst.first())), src.first()->as_XMMRegister()); | |
1236 } else { | |
1237 // reg to reg | |
1238 // In theory these overlap but the ordering is such that this is likely a nop | |
1239 if ( src.first() != dst.first()) { | |
1240 __ movdbl(dst.first()->as_XMMRegister(), src.first()->as_XMMRegister()); | |
1241 } | |
1242 } | |
1243 } | |
1244 | |
1245 // A long move | |
1246 static void long_move(MacroAssembler* masm, VMRegPair src, VMRegPair dst) { | |
1247 | |
1248 // The calling conventions assures us that each VMregpair is either | |
1249 // all really one physical register or adjacent stack slots. | |
1250 // This greatly simplifies the cases here compared to sparc. | |
1251 | |
1252 if (src.is_single_phys_reg() ) { | |
1253 if (dst.is_single_phys_reg()) { | |
1254 if (dst.first() != src.first()) { | |
304 | 1255 __ mov(dst.first()->as_Register(), src.first()->as_Register()); |
0 | 1256 } |
1257 } else { | |
1258 assert(dst.is_single_reg(), "not a stack pair"); | |
1259 __ movq(Address(rsp, reg2offset_out(dst.first())), src.first()->as_Register()); | |
1260 } | |
1261 } else if (dst.is_single_phys_reg()) { | |
1262 assert(src.is_single_reg(), "not a stack pair"); | |
1263 __ movq(dst.first()->as_Register(), Address(rbp, reg2offset_out(src.first()))); | |
1264 } else { | |
1265 assert(src.is_single_reg() && dst.is_single_reg(), "not stack pairs"); | |
1266 __ movq(rax, Address(rbp, reg2offset_in(src.first()))); | |
1267 __ movq(Address(rsp, reg2offset_out(dst.first())), rax); | |
1268 } | |
1269 } | |
1270 | |
1271 // A double move | |
1272 static void double_move(MacroAssembler* masm, VMRegPair src, VMRegPair dst) { | |
1273 | |
1274 // The calling conventions assures us that each VMregpair is either | |
1275 // all really one physical register or adjacent stack slots. | |
1276 // This greatly simplifies the cases here compared to sparc. | |
1277 | |
1278 if (src.is_single_phys_reg() ) { | |
1279 if (dst.is_single_phys_reg()) { | |
1280 // In theory these overlap but the ordering is such that this is likely a nop | |
1281 if ( src.first() != dst.first()) { | |
1282 __ movdbl(dst.first()->as_XMMRegister(), src.first()->as_XMMRegister()); | |
1283 } | |
1284 } else { | |
1285 assert(dst.is_single_reg(), "not a stack pair"); | |
1286 __ movdbl(Address(rsp, reg2offset_out(dst.first())), src.first()->as_XMMRegister()); | |
1287 } | |
1288 } else if (dst.is_single_phys_reg()) { | |
1289 assert(src.is_single_reg(), "not a stack pair"); | |
1290 __ movdbl(dst.first()->as_XMMRegister(), Address(rbp, reg2offset_out(src.first()))); | |
1291 } else { | |
1292 assert(src.is_single_reg() && dst.is_single_reg(), "not stack pairs"); | |
1293 __ movq(rax, Address(rbp, reg2offset_in(src.first()))); | |
1294 __ movq(Address(rsp, reg2offset_out(dst.first())), rax); | |
1295 } | |
1296 } | |
1297 | |
1298 | |
1299 void SharedRuntime::save_native_result(MacroAssembler *masm, BasicType ret_type, int frame_slots) { | |
1300 // We always ignore the frame_slots arg and just use the space just below frame pointer | |
1301 // which by this time is free to use | |
1302 switch (ret_type) { | |
1303 case T_FLOAT: | |
1304 __ movflt(Address(rbp, -wordSize), xmm0); | |
1305 break; | |
1306 case T_DOUBLE: | |
1307 __ movdbl(Address(rbp, -wordSize), xmm0); | |
1308 break; | |
1309 case T_VOID: break; | |
1310 default: { | |
304 | 1311 __ movptr(Address(rbp, -wordSize), rax); |
0 | 1312 } |
1313 } | |
1314 } | |
1315 | |
1316 void SharedRuntime::restore_native_result(MacroAssembler *masm, BasicType ret_type, int frame_slots) { | |
1317 // We always ignore the frame_slots arg and just use the space just below frame pointer | |
1318 // which by this time is free to use | |
1319 switch (ret_type) { | |
1320 case T_FLOAT: | |
1321 __ movflt(xmm0, Address(rbp, -wordSize)); | |
1322 break; | |
1323 case T_DOUBLE: | |
1324 __ movdbl(xmm0, Address(rbp, -wordSize)); | |
1325 break; | |
1326 case T_VOID: break; | |
1327 default: { | |
304 | 1328 __ movptr(rax, Address(rbp, -wordSize)); |
0 | 1329 } |
1330 } | |
1331 } | |
1332 | |
1333 static void save_args(MacroAssembler *masm, int arg_count, int first_arg, VMRegPair *args) { | |
1334 for ( int i = first_arg ; i < arg_count ; i++ ) { | |
1335 if (args[i].first()->is_Register()) { | |
304 | 1336 __ push(args[i].first()->as_Register()); |
0 | 1337 } else if (args[i].first()->is_XMMRegister()) { |
304 | 1338 __ subptr(rsp, 2*wordSize); |
0 | 1339 __ movdbl(Address(rsp, 0), args[i].first()->as_XMMRegister()); |
1340 } | |
1341 } | |
1342 } | |
1343 | |
1344 static void restore_args(MacroAssembler *masm, int arg_count, int first_arg, VMRegPair *args) { | |
1345 for ( int i = arg_count - 1 ; i >= first_arg ; i-- ) { | |
1346 if (args[i].first()->is_Register()) { | |
304 | 1347 __ pop(args[i].first()->as_Register()); |
0 | 1348 } else if (args[i].first()->is_XMMRegister()) { |
1349 __ movdbl(args[i].first()->as_XMMRegister(), Address(rsp, 0)); | |
304 | 1350 __ addptr(rsp, 2*wordSize); |
0 | 1351 } |
1352 } | |
1353 } | |
1354 | |
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1355 |
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1356 static void save_or_restore_arguments(MacroAssembler* masm, |
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1357 const int stack_slots, |
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1358 const int total_in_args, |
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1359 const int arg_save_area, |
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1360 OopMap* map, |
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1361 VMRegPair* in_regs, |
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1362 BasicType* in_sig_bt) { |
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1363 // if map is non-NULL then the code should store the values, |
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1364 // otherwise it should load them. |
5905 | 1365 int slot = arg_save_area; |
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1366 // Save down double word first |
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1367 for ( int i = 0; i < total_in_args; i++) { |
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1368 if (in_regs[i].first()->is_XMMRegister() && in_sig_bt[i] == T_DOUBLE) { |
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1369 int offset = slot * VMRegImpl::stack_slot_size; |
5905 | 1370 slot += VMRegImpl::slots_per_word; |
1371 assert(slot <= stack_slots, "overflow"); | |
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1372 if (map != NULL) { |
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1373 __ movdbl(Address(rsp, offset), in_regs[i].first()->as_XMMRegister()); |
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1374 } else { |
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1375 __ movdbl(in_regs[i].first()->as_XMMRegister(), Address(rsp, offset)); |
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1376 } |
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1377 } |
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1378 if (in_regs[i].first()->is_Register() && |
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1379 (in_sig_bt[i] == T_LONG || in_sig_bt[i] == T_ARRAY)) { |
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1380 int offset = slot * VMRegImpl::stack_slot_size; |
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1381 if (map != NULL) { |
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1382 __ movq(Address(rsp, offset), in_regs[i].first()->as_Register()); |
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1383 if (in_sig_bt[i] == T_ARRAY) { |
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1384 map->set_oop(VMRegImpl::stack2reg(slot));; |
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1385 } |
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1386 } else { |
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1387 __ movq(in_regs[i].first()->as_Register(), Address(rsp, offset)); |
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1388 } |
5907 | 1389 slot += VMRegImpl::slots_per_word; |
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1390 } |
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1391 } |
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1392 // Save or restore single word registers |
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1393 for ( int i = 0; i < total_in_args; i++) { |
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1394 if (in_regs[i].first()->is_Register()) { |
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1395 int offset = slot * VMRegImpl::stack_slot_size; |
5905 | 1396 slot++; |
1397 assert(slot <= stack_slots, "overflow"); | |
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1398 |
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1399 // Value is in an input register pass we must flush it to the stack |
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1400 const Register reg = in_regs[i].first()->as_Register(); |
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1401 switch (in_sig_bt[i]) { |
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1402 case T_BOOLEAN: |
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1403 case T_CHAR: |
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1404 case T_BYTE: |
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1405 case T_SHORT: |
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1406 case T_INT: |
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1407 if (map != NULL) { |
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1408 __ movl(Address(rsp, offset), reg); |
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1409 } else { |
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1410 __ movl(reg, Address(rsp, offset)); |
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1411 } |
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1412 break; |
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1413 case T_ARRAY: |
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1414 case T_LONG: |
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1415 // handled above |
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1416 break; |
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1417 case T_OBJECT: |
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1418 default: ShouldNotReachHere(); |
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1419 } |
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1420 } else if (in_regs[i].first()->is_XMMRegister()) { |
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1421 if (in_sig_bt[i] == T_FLOAT) { |
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1422 int offset = slot * VMRegImpl::stack_slot_size; |
5905 | 1423 slot++; |
1424 assert(slot <= stack_slots, "overflow"); | |
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1425 if (map != NULL) { |
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1426 __ movflt(Address(rsp, offset), in_regs[i].first()->as_XMMRegister()); |
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1427 } else { |
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1428 __ movflt(in_regs[i].first()->as_XMMRegister(), Address(rsp, offset)); |
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1429 } |
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1430 } |
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1431 } else if (in_regs[i].first()->is_stack()) { |
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1432 if (in_sig_bt[i] == T_ARRAY && map != NULL) { |
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1433 int offset_in_older_frame = in_regs[i].first()->reg2stack() + SharedRuntime::out_preserve_stack_slots(); |
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1434 map->set_oop(VMRegImpl::stack2reg(offset_in_older_frame + stack_slots)); |
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1435 } |
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1436 } |
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1437 } |
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1438 } |
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1439 |
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1440 |
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1441 // Check GC_locker::needs_gc and enter the runtime if it's true. This |
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1442 // keeps a new JNI critical region from starting until a GC has been |
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1443 // forced. Save down any oops in registers and describe them in an |
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1444 // OopMap. |
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1445 static void check_needs_gc_for_critical_native(MacroAssembler* masm, |
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1446 int stack_slots, |
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1447 int total_c_args, |
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1448 int total_in_args, |
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1449 int arg_save_area, |
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1450 OopMapSet* oop_maps, |
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1451 VMRegPair* in_regs, |
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1452 BasicType* in_sig_bt) { |
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1453 __ block_comment("check GC_locker::needs_gc"); |
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1454 Label cont; |
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1455 __ cmp8(ExternalAddress((address)GC_locker::needs_gc_address()), false); |
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1456 __ jcc(Assembler::equal, cont); |
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1457 |
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1458 // Save down any incoming oops and call into the runtime to halt for a GC |
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1459 |
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1460 OopMap* map = new OopMap(stack_slots * 2, 0 /* arg_slots*/); |
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1461 save_or_restore_arguments(masm, stack_slots, total_in_args, |
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1462 arg_save_area, map, in_regs, in_sig_bt); |
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1463 |
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1464 address the_pc = __ pc(); |
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1465 oop_maps->add_gc_map( __ offset(), map); |
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1466 __ set_last_Java_frame(rsp, noreg, the_pc); |
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1467 |
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1468 __ block_comment("block_for_jni_critical"); |
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1469 __ movptr(c_rarg0, r15_thread); |
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1470 __ mov(r12, rsp); // remember sp |
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1471 __ subptr(rsp, frame::arg_reg_save_area_bytes); // windows |
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1472 __ andptr(rsp, -16); // align stack as required by ABI |
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1473 __ call(RuntimeAddress(CAST_FROM_FN_PTR(address, SharedRuntime::block_for_jni_critical))); |
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1474 __ mov(rsp, r12); // restore sp |
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1475 __ reinit_heapbase(); |
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1476 |
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1477 __ reset_last_Java_frame(false, true); |
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1478 |
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1479 save_or_restore_arguments(masm, stack_slots, total_in_args, |
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1480 arg_save_area, NULL, in_regs, in_sig_bt); |
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1481 |
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1482 __ bind(cont); |
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1483 #ifdef ASSERT |
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1484 if (StressCriticalJNINatives) { |
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1485 // Stress register saving |
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1486 OopMap* map = new OopMap(stack_slots * 2, 0 /* arg_slots*/); |
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1487 save_or_restore_arguments(masm, stack_slots, total_in_args, |
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1488 arg_save_area, map, in_regs, in_sig_bt); |
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1489 // Destroy argument registers |
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1490 for (int i = 0; i < total_in_args - 1; i++) { |
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1491 if (in_regs[i].first()->is_Register()) { |
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1492 const Register reg = in_regs[i].first()->as_Register(); |
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1493 __ xorptr(reg, reg); |
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1494 } else if (in_regs[i].first()->is_XMMRegister()) { |
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1495 __ xorpd(in_regs[i].first()->as_XMMRegister(), in_regs[i].first()->as_XMMRegister()); |
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1496 } else if (in_regs[i].first()->is_FloatRegister()) { |
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1497 ShouldNotReachHere(); |
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1498 } else if (in_regs[i].first()->is_stack()) { |
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1499 // Nothing to do |
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1500 } else { |
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1501 ShouldNotReachHere(); |
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1502 } |
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1503 if (in_sig_bt[i] == T_LONG || in_sig_bt[i] == T_DOUBLE) { |
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1504 i++; |
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1505 } |
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1506 } |
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1507 |
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1508 save_or_restore_arguments(masm, stack_slots, total_in_args, |
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1509 arg_save_area, NULL, in_regs, in_sig_bt); |
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1510 } |
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1511 #endif |
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1512 } |
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1513 |
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1514 // Unpack an array argument into a pointer to the body and the length |
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1515 // if the array is non-null, otherwise pass 0 for both. |
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1516 static void unpack_array_argument(MacroAssembler* masm, VMRegPair reg, BasicType in_elem_type, VMRegPair body_arg, VMRegPair length_arg) { |
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1517 Register tmp_reg = rax; |
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1518 assert(!body_arg.first()->is_Register() || body_arg.first()->as_Register() != tmp_reg, |
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1519 "possible collision"); |
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1520 assert(!length_arg.first()->is_Register() || length_arg.first()->as_Register() != tmp_reg, |
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1521 "possible collision"); |
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1522 |
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1523 __ block_comment("unpack_array_argument {"); |
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1524 |
4873
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1525 // Pass the length, ptr pair |
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1526 Label is_null, done; |
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1527 VMRegPair tmp; |
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1528 tmp.set_ptr(tmp_reg->as_VMReg()); |
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1529 if (reg.first()->is_stack()) { |
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1530 // Load the arg up from the stack |
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1531 move_ptr(masm, reg, tmp); |
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1532 reg = tmp; |
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1533 } |
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1534 __ testptr(reg.first()->as_Register(), reg.first()->as_Register()); |
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1535 __ jccb(Assembler::equal, is_null); |
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1536 __ lea(tmp_reg, Address(reg.first()->as_Register(), arrayOopDesc::base_offset_in_bytes(in_elem_type))); |
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1537 move_ptr(masm, tmp, body_arg); |
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1538 // load the length relative to the body. |
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1539 __ movl(tmp_reg, Address(tmp_reg, arrayOopDesc::length_offset_in_bytes() - |
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1540 arrayOopDesc::base_offset_in_bytes(in_elem_type))); |
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1541 move32_64(masm, tmp, length_arg); |
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1542 __ jmpb(done); |
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1543 __ bind(is_null); |
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1544 // Pass zeros |
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1545 __ xorptr(tmp_reg, tmp_reg); |
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1546 move_ptr(masm, tmp, body_arg); |
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1547 move32_64(masm, tmp, length_arg); |
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1548 __ bind(done); |
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1549 |
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1550 __ block_comment("} unpack_array_argument"); |
4873
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1551 } |
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1552 |
5905 | 1553 |
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1554 // Different signatures may require very different orders for the move |
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1555 // to avoid clobbering other arguments. There's no simple way to |
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1556 // order them safely. Compute a safe order for issuing stores and |
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1557 // break any cycles in those stores. This code is fairly general but |
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1558 // it's not necessary on the other platforms so we keep it in the |
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1559 // platform dependent code instead of moving it into a shared file. |
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1560 // (See bugs 7013347 & 7145024.) |
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1561 // Note that this code is specific to LP64. |
5905 | 1562 class ComputeMoveOrder: public StackObj { |
1563 class MoveOperation: public ResourceObj { | |
1564 friend class ComputeMoveOrder; | |
1565 private: | |
1566 VMRegPair _src; | |
1567 VMRegPair _dst; | |
1568 int _src_index; | |
1569 int _dst_index; | |
1570 bool _processed; | |
1571 MoveOperation* _next; | |
1572 MoveOperation* _prev; | |
1573 | |
1574 static int get_id(VMRegPair r) { | |
1575 return r.first()->value(); | |
1576 } | |
1577 | |
1578 public: | |
1579 MoveOperation(int src_index, VMRegPair src, int dst_index, VMRegPair dst): | |
1580 _src(src) | |
1581 , _src_index(src_index) | |
1582 , _dst(dst) | |
1583 , _dst_index(dst_index) | |
1584 , _next(NULL) | |
1585 , _prev(NULL) | |
1586 , _processed(false) { | |
1587 } | |
1588 | |
1589 VMRegPair src() const { return _src; } | |
1590 int src_id() const { return get_id(src()); } | |
1591 int src_index() const { return _src_index; } | |
1592 VMRegPair dst() const { return _dst; } | |
1593 void set_dst(int i, VMRegPair dst) { _dst_index = i, _dst = dst; } | |
1594 int dst_index() const { return _dst_index; } | |
1595 int dst_id() const { return get_id(dst()); } | |
1596 MoveOperation* next() const { return _next; } | |
1597 MoveOperation* prev() const { return _prev; } | |
1598 void set_processed() { _processed = true; } | |
1599 bool is_processed() const { return _processed; } | |
1600 | |
1601 // insert | |
1602 void break_cycle(VMRegPair temp_register) { | |
1603 // create a new store following the last store | |
1604 // to move from the temp_register to the original | |
1605 MoveOperation* new_store = new MoveOperation(-1, temp_register, dst_index(), dst()); | |
1606 | |
1607 // break the cycle of links and insert new_store at the end | |
1608 // break the reverse link. | |
1609 MoveOperation* p = prev(); | |
1610 assert(p->next() == this, "must be"); | |
1611 _prev = NULL; | |
1612 p->_next = new_store; | |
1613 new_store->_prev = p; | |
1614 | |
1615 // change the original store to save it's value in the temp. | |
1616 set_dst(-1, temp_register); | |
1617 } | |
1618 | |
1619 void link(GrowableArray<MoveOperation*>& killer) { | |
1620 // link this store in front the store that it depends on | |
1621 MoveOperation* n = killer.at_grow(src_id(), NULL); | |
1622 if (n != NULL) { | |
1623 assert(_next == NULL && n->_prev == NULL, "shouldn't have been set yet"); | |
1624 _next = n; | |
1625 n->_prev = this; | |
1626 } | |
1627 } | |
1628 }; | |
1629 | |
1630 private: | |
1631 GrowableArray<MoveOperation*> edges; | |
1632 | |
1633 public: | |
1634 ComputeMoveOrder(int total_in_args, VMRegPair* in_regs, int total_c_args, VMRegPair* out_regs, | |
1635 BasicType* in_sig_bt, GrowableArray<int>& arg_order, VMRegPair tmp_vmreg) { | |
1636 // Move operations where the dest is the stack can all be | |
1637 // scheduled first since they can't interfere with the other moves. | |
1638 for (int i = total_in_args - 1, c_arg = total_c_args - 1; i >= 0; i--, c_arg--) { | |
1639 if (in_sig_bt[i] == T_ARRAY) { | |
1640 c_arg--; | |
1641 if (out_regs[c_arg].first()->is_stack() && | |
1642 out_regs[c_arg + 1].first()->is_stack()) { | |
1643 arg_order.push(i); | |
1644 arg_order.push(c_arg); | |
1645 } else { | |
1646 if (out_regs[c_arg].first()->is_stack() || | |
1647 in_regs[i].first() == out_regs[c_arg].first()) { | |
1648 add_edge(i, in_regs[i].first(), c_arg, out_regs[c_arg + 1]); | |
1649 } else { | |
1650 add_edge(i, in_regs[i].first(), c_arg, out_regs[c_arg]); | |
1651 } | |
1652 } | |
1653 } else if (in_sig_bt[i] == T_VOID) { | |
1654 arg_order.push(i); | |
1655 arg_order.push(c_arg); | |
1656 } else { | |
1657 if (out_regs[c_arg].first()->is_stack() || | |
1658 in_regs[i].first() == out_regs[c_arg].first()) { | |
1659 arg_order.push(i); | |
1660 arg_order.push(c_arg); | |
1661 } else { | |
1662 add_edge(i, in_regs[i].first(), c_arg, out_regs[c_arg]); | |
1663 } | |
1664 } | |
1665 } | |
1666 // Break any cycles in the register moves and emit the in the | |
1667 // proper order. | |
1668 GrowableArray<MoveOperation*>* stores = get_store_order(tmp_vmreg); | |
1669 for (int i = 0; i < stores->length(); i++) { | |
1670 arg_order.push(stores->at(i)->src_index()); | |
1671 arg_order.push(stores->at(i)->dst_index()); | |
1672 } | |
1673 } | |
1674 | |
1675 // Collected all the move operations | |
1676 void add_edge(int src_index, VMRegPair src, int dst_index, VMRegPair dst) { | |
1677 if (src.first() == dst.first()) return; | |
1678 edges.append(new MoveOperation(src_index, src, dst_index, dst)); | |
1679 } | |
1680 | |
1681 // Walk the edges breaking cycles between moves. The result list | |
1682 // can be walked in order to produce the proper set of loads | |
1683 GrowableArray<MoveOperation*>* get_store_order(VMRegPair temp_register) { | |
1684 // Record which moves kill which values | |
1685 GrowableArray<MoveOperation*> killer; | |
1686 for (int i = 0; i < edges.length(); i++) { | |
1687 MoveOperation* s = edges.at(i); | |
1688 assert(killer.at_grow(s->dst_id(), NULL) == NULL, "only one killer"); | |
1689 killer.at_put_grow(s->dst_id(), s, NULL); | |
1690 } | |
1691 assert(killer.at_grow(MoveOperation::get_id(temp_register), NULL) == NULL, | |
1692 "make sure temp isn't in the registers that are killed"); | |
1693 | |
1694 // create links between loads and stores | |
1695 for (int i = 0; i < edges.length(); i++) { | |
1696 edges.at(i)->link(killer); | |
1697 } | |
1698 | |
1699 // at this point, all the move operations are chained together | |
1700 // in a doubly linked list. Processing it backwards finds | |
1701 // the beginning of the chain, forwards finds the end. If there's | |
1702 // a cycle it can be broken at any point, so pick an edge and walk | |
1703 // backward until the list ends or we end where we started. | |
1704 GrowableArray<MoveOperation*>* stores = new GrowableArray<MoveOperation*>(); | |
1705 for (int e = 0; e < edges.length(); e++) { | |
1706 MoveOperation* s = edges.at(e); | |
1707 if (!s->is_processed()) { | |
1708 MoveOperation* start = s; | |
1709 // search for the beginning of the chain or cycle | |
1710 while (start->prev() != NULL && start->prev() != s) { | |
1711 start = start->prev(); | |
1712 } | |
1713 if (start->prev() == s) { | |
1714 start->break_cycle(temp_register); | |
1715 } | |
1716 // walk the chain forward inserting to store list | |
1717 while (start != NULL) { | |
1718 stores->append(start); | |
1719 start->set_processed(); | |
1720 start = start->next(); | |
1721 } | |
1722 } | |
1723 } | |
1724 return stores; | |
1725 } | |
1726 }; | |
1727 | |
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1728 static void verify_oop_args(MacroAssembler* masm, |
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1729 methodHandle method, |
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1730 const BasicType* sig_bt, |
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1731 const VMRegPair* regs) { |
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1732 Register temp_reg = rbx; // not part of any compiled calling seq |
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1733 if (VerifyOops) { |
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1734 for (int i = 0; i < method->size_of_parameters(); i++) { |
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1735 if (sig_bt[i] == T_OBJECT || |
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1736 sig_bt[i] == T_ARRAY) { |
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1737 VMReg r = regs[i].first(); |
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1738 assert(r->is_valid(), "bad oop arg"); |
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1739 if (r->is_stack()) { |
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1740 __ movptr(temp_reg, Address(rsp, r->reg2stack() * VMRegImpl::stack_slot_size + wordSize)); |
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1741 __ verify_oop(temp_reg); |
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1742 } else { |
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1743 __ verify_oop(r->as_Register()); |
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1744 } |
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1745 } |
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1746 } |
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1747 } |
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1748 } |
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1749 |
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1750 static void gen_special_dispatch(MacroAssembler* masm, |
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1751 methodHandle method, |
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1752 const BasicType* sig_bt, |
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1753 const VMRegPair* regs) { |
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1754 verify_oop_args(masm, method, sig_bt, regs); |
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1755 vmIntrinsics::ID iid = method->intrinsic_id(); |
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1756 |
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1757 // Now write the args into the outgoing interpreter space |
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1758 bool has_receiver = false; |
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1759 Register receiver_reg = noreg; |
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1760 int member_arg_pos = -1; |
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1761 Register member_reg = noreg; |
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1762 int ref_kind = MethodHandles::signature_polymorphic_intrinsic_ref_kind(iid); |
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1763 if (ref_kind != 0) { |
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1764 member_arg_pos = method->size_of_parameters() - 1; // trailing MemberName argument |
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1765 member_reg = rbx; // known to be free at this point |
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1766 has_receiver = MethodHandles::ref_kind_has_receiver(ref_kind); |
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1767 } else if (iid == vmIntrinsics::_invokeBasic) { |
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1768 has_receiver = true; |
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1769 } else { |
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1770 fatal(err_msg_res("unexpected intrinsic id %d", iid)); |
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1771 } |
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1772 |
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1773 if (member_reg != noreg) { |
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1774 // Load the member_arg into register, if necessary. |
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1775 SharedRuntime::check_member_name_argument_is_last_argument(method, sig_bt, regs); |
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1776 VMReg r = regs[member_arg_pos].first(); |
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1777 if (r->is_stack()) { |
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1778 __ movptr(member_reg, Address(rsp, r->reg2stack() * VMRegImpl::stack_slot_size + wordSize)); |
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1779 } else { |
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1780 // no data motion is needed |
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1781 member_reg = r->as_Register(); |
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1782 } |
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1783 } |
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1784 |
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1785 if (has_receiver) { |
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1786 // Make sure the receiver is loaded into a register. |
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1787 assert(method->size_of_parameters() > 0, "oob"); |
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1788 assert(sig_bt[0] == T_OBJECT, "receiver argument must be an object"); |
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1789 VMReg r = regs[0].first(); |
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1790 assert(r->is_valid(), "bad receiver arg"); |
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1791 if (r->is_stack()) { |
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1792 // Porting note: This assumes that compiled calling conventions always |
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1793 // pass the receiver oop in a register. If this is not true on some |
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1794 // platform, pick a temp and load the receiver from stack. |
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1795 fatal("receiver always in a register"); |
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1796 receiver_reg = j_rarg0; // known to be free at this point |
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1797 __ movptr(receiver_reg, Address(rsp, r->reg2stack() * VMRegImpl::stack_slot_size + wordSize)); |
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1798 } else { |
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1799 // no data motion is needed |
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1800 receiver_reg = r->as_Register(); |
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1801 } |
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1802 } |
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1803 |
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1804 // Figure out which address we are really jumping to: |
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1805 MethodHandles::generate_method_handle_dispatch(masm, iid, |
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1806 receiver_reg, member_reg, /*for_compiler_entry:*/ true); |
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1807 } |
5905 | 1808 |
0 | 1809 // --------------------------------------------------------------------------- |
1810 // Generate a native wrapper for a given method. The method takes arguments | |
1811 // in the Java compiled code convention, marshals them to the native | |
1812 // convention (handlizes oops, etc), transitions to native, makes the call, | |
1813 // returns to java state (possibly blocking), unhandlizes any result and | |
1814 // returns. | |
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1815 // |
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1816 // Critical native functions are a shorthand for the use of |
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1817 // GetPrimtiveArrayCritical and disallow the use of any other JNI |
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1818 // functions. The wrapper is expected to unpack the arguments before |
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1819 // passing them to the callee and perform checks before and after the |
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1820 // native call to ensure that they GC_locker |
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1821 // lock_critical/unlock_critical semantics are followed. Some other |
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1822 // parts of JNI setup are skipped like the tear down of the JNI handle |
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1823 // block and the check for pending exceptions it's impossible for them |
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1824 // to be thrown. |
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1825 // |
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1826 // They are roughly structured like this: |
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1827 // if (GC_locker::needs_gc()) |
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1828 // SharedRuntime::block_for_jni_critical(); |
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1829 // tranistion to thread_in_native |
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1830 // unpack arrray arguments and call native entry point |
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1831 // check for safepoint in progress |
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1832 // check if any thread suspend flags are set |
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1833 // call into JVM and possible unlock the JNI critical |
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1834 // if a GC was suppressed while in the critical native. |
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1835 // transition back to thread_in_Java |
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1836 // return to caller |
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1837 // |
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1838 nmethod* SharedRuntime::generate_native_wrapper(MacroAssembler* masm, |
0 | 1839 methodHandle method, |
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1840 int compile_id, |
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1841 BasicType* in_sig_bt, |
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1842 VMRegPair* in_regs, |
0 | 1843 BasicType ret_type) { |
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1844 if (method->is_method_handle_intrinsic()) { |
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1845 vmIntrinsics::ID iid = method->intrinsic_id(); |
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1846 intptr_t start = (intptr_t)__ pc(); |
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1847 int vep_offset = ((intptr_t)__ pc()) - start; |
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1848 gen_special_dispatch(masm, |
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1849 method, |
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1850 in_sig_bt, |
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1851 in_regs); |
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1852 int frame_complete = ((intptr_t)__ pc()) - start; // not complete, period |
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1853 __ flush(); |
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1854 int stack_slots = SharedRuntime::out_preserve_stack_slots(); // no out slots at all, actually |
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1855 return nmethod::new_native_nmethod(method, |
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1856 compile_id, |
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1857 masm->code(), |
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1858 vep_offset, |
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1859 frame_complete, |
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1860 stack_slots / VMRegImpl::slots_per_word, |
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1861 in_ByteSize(-1), |
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1862 in_ByteSize(-1), |
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1863 (OopMapSet*)NULL); |
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1864 } |
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1865 bool is_critical_native = true; |
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1866 address native_func = method->critical_native_function(); |
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1867 if (native_func == NULL) { |
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1868 native_func = method->native_function(); |
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1869 is_critical_native = false; |
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1870 } |
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1871 assert(native_func != NULL, "must have function"); |
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1872 |
0 | 1873 // An OopMap for lock (and class if static) |
1874 OopMapSet *oop_maps = new OopMapSet(); | |
1875 intptr_t start = (intptr_t)__ pc(); | |
1876 | |
1877 // We have received a description of where all the java arg are located | |
1878 // on entry to the wrapper. We need to convert these args to where | |
1879 // the jni function will expect them. To figure out where they go | |
1880 // we convert the java signature to a C signature by inserting | |
1881 // the hidden arguments as arg[0] and possibly arg[1] (static method) | |
1882 | |
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1883 const int total_in_args = method->size_of_parameters(); |
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1884 int total_c_args = total_in_args; |
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1885 if (!is_critical_native) { |
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1886 total_c_args += 1; |
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1887 if (method->is_static()) { |
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1888 total_c_args++; |
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1889 } |
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1890 } else { |
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1891 for (int i = 0; i < total_in_args; i++) { |
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1892 if (in_sig_bt[i] == T_ARRAY) { |
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1893 total_c_args++; |
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1894 } |
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1895 } |
0 | 1896 } |
1897 | |
1898 BasicType* out_sig_bt = NEW_RESOURCE_ARRAY(BasicType, total_c_args); | |
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1899 VMRegPair* out_regs = NEW_RESOURCE_ARRAY(VMRegPair, total_c_args); |
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1900 BasicType* in_elem_bt = NULL; |
0 | 1901 |
1902 int argc = 0; | |
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1903 if (!is_critical_native) { |
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1904 out_sig_bt[argc++] = T_ADDRESS; |
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1905 if (method->is_static()) { |
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1906 out_sig_bt[argc++] = T_OBJECT; |
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1907 } |
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1908 |
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1909 for (int i = 0; i < total_in_args ; i++ ) { |
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1910 out_sig_bt[argc++] = in_sig_bt[i]; |
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1911 } |
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1912 } else { |
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1913 Thread* THREAD = Thread::current(); |
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1914 in_elem_bt = NEW_RESOURCE_ARRAY(BasicType, total_in_args); |
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1915 SignatureStream ss(method->signature()); |
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1916 for (int i = 0; i < total_in_args ; i++ ) { |
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1917 if (in_sig_bt[i] == T_ARRAY) { |
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1918 // Arrays are passed as int, elem* pair |
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1919 out_sig_bt[argc++] = T_INT; |
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1920 out_sig_bt[argc++] = T_ADDRESS; |
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1921 Symbol* atype = ss.as_symbol(CHECK_NULL); |
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1922 const char* at = atype->as_C_string(); |
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1923 if (strlen(at) == 2) { |
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1924 assert(at[0] == '[', "must be"); |
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1925 switch (at[1]) { |
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1926 case 'B': in_elem_bt[i] = T_BYTE; break; |
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1927 case 'C': in_elem_bt[i] = T_CHAR; break; |
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1928 case 'D': in_elem_bt[i] = T_DOUBLE; break; |
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1929 case 'F': in_elem_bt[i] = T_FLOAT; break; |
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1930 case 'I': in_elem_bt[i] = T_INT; break; |
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1931 case 'J': in_elem_bt[i] = T_LONG; break; |
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1932 case 'S': in_elem_bt[i] = T_SHORT; break; |
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1933 case 'Z': in_elem_bt[i] = T_BOOLEAN; break; |
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1934 default: ShouldNotReachHere(); |
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1935 } |
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1936 } |
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1937 } else { |
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1938 out_sig_bt[argc++] = in_sig_bt[i]; |
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1939 in_elem_bt[i] = T_VOID; |
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1940 } |
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1941 if (in_sig_bt[i] != T_VOID) { |
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1942 assert(in_sig_bt[i] == ss.type(), "must match"); |
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1943 ss.next(); |
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1944 } |
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1945 } |
0 | 1946 } |
1947 | |
1948 // Now figure out where the args must be stored and how much stack space | |
1949 // they require. | |
1950 int out_arg_slots; | |
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1951 out_arg_slots = c_calling_convention(out_sig_bt, out_regs, NULL, total_c_args); |
0 | 1952 |
1953 // Compute framesize for the wrapper. We need to handlize all oops in | |
1954 // incoming registers | |
1955 | |
1956 // Calculate the total number of stack slots we will need. | |
1957 | |
1958 // First count the abi requirement plus all of the outgoing args | |
1959 int stack_slots = SharedRuntime::out_preserve_stack_slots() + out_arg_slots; | |
1960 | |
1961 // Now the space for the inbound oop handle area | |
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1962 int total_save_slots = 6 * VMRegImpl::slots_per_word; // 6 arguments passed in registers |
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1963 if (is_critical_native) { |
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1964 // Critical natives may have to call out so they need a save area |
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1965 // for register arguments. |
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1966 int double_slots = 0; |
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1967 int single_slots = 0; |
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1968 for ( int i = 0; i < total_in_args; i++) { |
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1969 if (in_regs[i].first()->is_Register()) { |
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1970 const Register reg = in_regs[i].first()->as_Register(); |
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1971 switch (in_sig_bt[i]) { |
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1972 case T_BOOLEAN: |
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1973 case T_BYTE: |
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1974 case T_SHORT: |
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1975 case T_CHAR: |
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1976 case T_INT: single_slots++; break; |
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1977 case T_ARRAY: // specific to LP64 (7145024) |
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1978 case T_LONG: double_slots++; break; |
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1979 default: ShouldNotReachHere(); |
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1980 } |
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1981 } else if (in_regs[i].first()->is_XMMRegister()) { |
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1982 switch (in_sig_bt[i]) { |
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1983 case T_FLOAT: single_slots++; break; |
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1984 case T_DOUBLE: double_slots++; break; |
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1985 default: ShouldNotReachHere(); |
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1986 } |
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1987 } else if (in_regs[i].first()->is_FloatRegister()) { |
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1988 ShouldNotReachHere(); |
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1989 } |
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1990 } |
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1991 total_save_slots = double_slots * 2 + single_slots; |
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1992 // align the save area |
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1993 if (double_slots != 0) { |
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1994 stack_slots = round_to(stack_slots, 2); |
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1995 } |
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1996 } |
0 | 1997 |
1998 int oop_handle_offset = stack_slots; | |
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1999 stack_slots += total_save_slots; |
0 | 2000 |
2001 // Now any space we need for handlizing a klass if static method | |
2002 | |
2003 int klass_slot_offset = 0; | |
2004 int klass_offset = -1; | |
2005 int lock_slot_offset = 0; | |
2006 bool is_static = false; | |
2007 | |
2008 if (method->is_static()) { | |
2009 klass_slot_offset = stack_slots; | |
2010 stack_slots += VMRegImpl::slots_per_word; | |
2011 klass_offset = klass_slot_offset * VMRegImpl::stack_slot_size; | |
2012 is_static = true; | |
2013 } | |
2014 | |
2015 // Plus a lock if needed | |
2016 | |
2017 if (method->is_synchronized()) { | |
2018 lock_slot_offset = stack_slots; | |
2019 stack_slots += VMRegImpl::slots_per_word; | |
2020 } | |
2021 | |
2022 // Now a place (+2) to save return values or temp during shuffling | |
2023 // + 4 for return address (which we own) and saved rbp | |
2024 stack_slots += 6; | |
2025 | |
2026 // Ok The space we have allocated will look like: | |
2027 // | |
2028 // | |
2029 // FP-> | | | |
2030 // |---------------------| | |
2031 // | 2 slots for moves | | |
2032 // |---------------------| | |
2033 // | lock box (if sync) | | |
2034 // |---------------------| <- lock_slot_offset | |
2035 // | klass (if static) | | |
2036 // |---------------------| <- klass_slot_offset | |
2037 // | oopHandle area | | |
2038 // |---------------------| <- oop_handle_offset (6 java arg registers) | |
2039 // | outbound memory | | |
2040 // | based arguments | | |
2041 // | | | |
2042 // |---------------------| | |
2043 // | | | |
2044 // SP-> | out_preserved_slots | | |
2045 // | |
2046 // | |
2047 | |
2048 | |
2049 // Now compute actual number of stack words we need rounding to make | |
2050 // stack properly aligned. | |
524
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2051 stack_slots = round_to(stack_slots, StackAlignmentInSlots); |
0 | 2052 |
2053 int stack_size = stack_slots * VMRegImpl::stack_slot_size; | |
2054 | |
2055 // First thing make an ic check to see if we should even be here | |
2056 | |
2057 // We are free to use all registers as temps without saving them and | |
2058 // restoring them except rbp. rbp is the only callee save register | |
2059 // as far as the interpreter and the compiler(s) are concerned. | |
2060 | |
2061 | |
2062 const Register ic_reg = rax; | |
2063 const Register receiver = j_rarg0; | |
2064 | |
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2065 Label hit; |
0 | 2066 Label exception_pending; |
2067 | |
848
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2068 assert_different_registers(ic_reg, receiver, rscratch1); |
0 | 2069 __ verify_oop(receiver); |
848
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2070 __ load_klass(rscratch1, receiver); |
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2071 __ cmpq(ic_reg, rscratch1); |
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2072 __ jcc(Assembler::equal, hit); |
0 | 2073 |
2074 __ jump(RuntimeAddress(SharedRuntime::get_ic_miss_stub())); | |
2075 | |
2076 // Verified entry point must be aligned | |
2077 __ align(8); | |
2078 | |
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2079 __ bind(hit); |
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2080 |
0 | 2081 int vep_offset = ((intptr_t)__ pc()) - start; |
2082 | |
2083 // The instruction at the verified entry point must be 5 bytes or longer | |
2084 // because it can be patched on the fly by make_non_entrant. The stack bang | |
2085 // instruction fits that requirement. | |
2086 | |
2087 // Generate stack overflow check | |
2088 | |
2089 if (UseStackBanging) { | |
2090 __ bang_stack_with_offset(StackShadowPages*os::vm_page_size()); | |
2091 } else { | |
2092 // need a 5 byte instruction to allow MT safe patching to non-entrant | |
2093 __ fat_nop(); | |
2094 } | |
2095 | |
2096 // Generate a new frame for the wrapper. | |
2097 __ enter(); | |
2098 // -2 because return address is already present and so is saved rbp | |
304 | 2099 __ subptr(rsp, stack_size - 2*wordSize); |
0 | 2100 |
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2101 // Frame is now completed as far as size and linkage. |
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2102 int frame_complete = ((intptr_t)__ pc()) - start; |
0 | 2103 |
17780 | 2104 if (UseRTMLocking) { |
2105 // Abort RTM transaction before calling JNI | |
2106 // because critical section will be large and will be | |
2107 // aborted anyway. Also nmethod could be deoptimized. | |
2108 __ xabort(0); | |
2109 } | |
2110 | |
0 | 2111 #ifdef ASSERT |
2112 { | |
2113 Label L; | |
304 | 2114 __ mov(rax, rsp); |
605 | 2115 __ andptr(rax, -16); // must be 16 byte boundary (see amd64 ABI) |
304 | 2116 __ cmpptr(rax, rsp); |
0 | 2117 __ jcc(Assembler::equal, L); |
2118 __ stop("improperly aligned stack"); | |
2119 __ bind(L); | |
2120 } | |
2121 #endif /* ASSERT */ | |
2122 | |
2123 | |
2124 // We use r14 as the oop handle for the receiver/klass | |
2125 // It is callee save so it survives the call to native | |
2126 | |
2127 const Register oop_handle_reg = r14; | |
2128 | |
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2129 if (is_critical_native) { |
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2130 check_needs_gc_for_critical_native(masm, stack_slots, total_c_args, total_in_args, |
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2131 oop_handle_offset, oop_maps, in_regs, in_sig_bt); |
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2132 } |
0 | 2133 |
2134 // | |
2135 // We immediately shuffle the arguments so that any vm call we have to | |
2136 // make from here on out (sync slow path, jvmti, etc.) we will have | |
2137 // captured the oops from our caller and have a valid oopMap for | |
2138 // them. | |
2139 | |
2140 // ----------------- | |
2141 // The Grand Shuffle | |
2142 | |
2143 // The Java calling convention is either equal (linux) or denser (win64) than the | |
2144 // c calling convention. However the because of the jni_env argument the c calling | |
2145 // convention always has at least one more (and two for static) arguments than Java. | |
2146 // Therefore if we move the args from java -> c backwards then we will never have | |
2147 // a register->register conflict and we don't have to build a dependency graph | |
2148 // and figure out how to break any cycles. | |
2149 // | |
2150 | |
2151 // Record esp-based slot for receiver on stack for non-static methods | |
2152 int receiver_offset = -1; | |
2153 | |
2154 // This is a trick. We double the stack slots so we can claim | |
2155 // the oops in the caller's frame. Since we are sure to have | |
2156 // more args than the caller doubling is enough to make | |
2157 // sure we can capture all the incoming oop args from the | |
2158 // caller. | |
2159 // | |
2160 OopMap* map = new OopMap(stack_slots * 2, 0 /* arg_slots*/); | |
2161 | |
2162 // Mark location of rbp (someday) | |
2163 // map->set_callee_saved(VMRegImpl::stack2reg( stack_slots - 2), stack_slots * 2, 0, vmreg(rbp)); | |
2164 | |
2165 // Use eax, ebx as temporaries during any memory-memory moves we have to do | |
2166 // All inbound args are referenced based on rbp and all outbound args via rsp. | |
2167 | |
2168 | |
2169 #ifdef ASSERT | |
2170 bool reg_destroyed[RegisterImpl::number_of_registers]; | |
2171 bool freg_destroyed[XMMRegisterImpl::number_of_registers]; | |
2172 for ( int r = 0 ; r < RegisterImpl::number_of_registers ; r++ ) { | |
2173 reg_destroyed[r] = false; | |
2174 } | |
2175 for ( int f = 0 ; f < XMMRegisterImpl::number_of_registers ; f++ ) { | |
2176 freg_destroyed[f] = false; | |
2177 } | |
2178 | |
2179 #endif /* ASSERT */ | |
2180 | |
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2181 // This may iterate in two different directions depending on the |
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2182 // kind of native it is. The reason is that for regular JNI natives |
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2183 // the incoming and outgoing registers are offset upwards and for |
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2184 // critical natives they are offset down. |
5905 | 2185 GrowableArray<int> arg_order(2 * total_in_args); |
2186 VMRegPair tmp_vmreg; | |
2187 tmp_vmreg.set1(rbx->as_VMReg()); | |
2188 | |
2189 if (!is_critical_native) { | |
2190 for (int i = total_in_args - 1, c_arg = total_c_args - 1; i >= 0; i--, c_arg--) { | |
2191 arg_order.push(i); | |
2192 arg_order.push(c_arg); | |
2193 } | |
2194 } else { | |
2195 // Compute a valid move order, using tmp_vmreg to break any cycles | |
2196 ComputeMoveOrder cmo(total_in_args, in_regs, total_c_args, out_regs, in_sig_bt, arg_order, tmp_vmreg); | |
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2197 } |
5905 | 2198 |
2199 int temploc = -1; | |
2200 for (int ai = 0; ai < arg_order.length(); ai += 2) { | |
2201 int i = arg_order.at(ai); | |
2202 int c_arg = arg_order.at(ai + 1); | |
2203 __ block_comment(err_msg("move %d -> %d", i, c_arg)); | |
2204 if (c_arg == -1) { | |
2205 assert(is_critical_native, "should only be required for critical natives"); | |
2206 // This arg needs to be moved to a temporary | |
2207 __ mov(tmp_vmreg.first()->as_Register(), in_regs[i].first()->as_Register()); | |
2208 in_regs[i] = tmp_vmreg; | |
2209 temploc = i; | |
2210 continue; | |
2211 } else if (i == -1) { | |
2212 assert(is_critical_native, "should only be required for critical natives"); | |
2213 // Read from the temporary location | |
2214 assert(temploc != -1, "must be valid"); | |
2215 i = temploc; | |
2216 temploc = -1; | |
2217 } | |
0 | 2218 #ifdef ASSERT |
2219 if (in_regs[i].first()->is_Register()) { | |
2220 assert(!reg_destroyed[in_regs[i].first()->as_Register()->encoding()], "destroyed reg!"); | |
2221 } else if (in_regs[i].first()->is_XMMRegister()) { | |
2222 assert(!freg_destroyed[in_regs[i].first()->as_XMMRegister()->encoding()], "destroyed reg!"); | |
2223 } | |
2224 if (out_regs[c_arg].first()->is_Register()) { | |
2225 reg_destroyed[out_regs[c_arg].first()->as_Register()->encoding()] = true; | |
2226 } else if (out_regs[c_arg].first()->is_XMMRegister()) { | |
2227 freg_destroyed[out_regs[c_arg].first()->as_XMMRegister()->encoding()] = true; | |
2228 } | |
2229 #endif /* ASSERT */ | |
2230 switch (in_sig_bt[i]) { | |
2231 case T_ARRAY: | |
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2232 if (is_critical_native) { |
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2233 unpack_array_argument(masm, in_regs[i], in_elem_bt[i], out_regs[c_arg + 1], out_regs[c_arg]); |
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2234 c_arg++; |
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2235 #ifdef ASSERT |
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2236 if (out_regs[c_arg].first()->is_Register()) { |
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2237 reg_destroyed[out_regs[c_arg].first()->as_Register()->encoding()] = true; |
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2238 } else if (out_regs[c_arg].first()->is_XMMRegister()) { |
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2239 freg_destroyed[out_regs[c_arg].first()->as_XMMRegister()->encoding()] = true; |
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2240 } |
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2241 #endif |
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2242 break; |
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2243 } |
0 | 2244 case T_OBJECT: |
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2245 assert(!is_critical_native, "no oop arguments"); |
0 | 2246 object_move(masm, map, oop_handle_offset, stack_slots, in_regs[i], out_regs[c_arg], |
2247 ((i == 0) && (!is_static)), | |
2248 &receiver_offset); | |
2249 break; | |
2250 case T_VOID: | |
2251 break; | |
2252 | |
2253 case T_FLOAT: | |
2254 float_move(masm, in_regs[i], out_regs[c_arg]); | |
2255 break; | |
2256 | |
2257 case T_DOUBLE: | |
2258 assert( i + 1 < total_in_args && | |
2259 in_sig_bt[i + 1] == T_VOID && | |
2260 out_sig_bt[c_arg+1] == T_VOID, "bad arg list"); | |
2261 double_move(masm, in_regs[i], out_regs[c_arg]); | |
2262 break; | |
2263 | |
2264 case T_LONG : | |
2265 long_move(masm, in_regs[i], out_regs[c_arg]); | |
2266 break; | |
2267 | |
2268 case T_ADDRESS: assert(false, "found T_ADDRESS in java args"); | |
2269 | |
2270 default: | |
2271 move32_64(masm, in_regs[i], out_regs[c_arg]); | |
2272 } | |
2273 } | |
2274 | |
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2275 int c_arg; |
0 | 2276 |
2277 // Pre-load a static method's oop into r14. Used both by locking code and | |
2278 // the normal JNI call code. | |
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2279 if (!is_critical_native) { |
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2280 // point c_arg at the first arg that is already loaded in case we |
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2281 // need to spill before we call out |
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2282 c_arg = total_c_args - total_in_args; |
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2283 |
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2284 if (method->is_static()) { |
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2285 |
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2286 // load oop into a register |
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2287 __ movoop(oop_handle_reg, JNIHandles::make_local(method->method_holder()->java_mirror())); |
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2288 |
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2289 // Now handlize the static class mirror it's known not-null. |
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2290 __ movptr(Address(rsp, klass_offset), oop_handle_reg); |
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2291 map->set_oop(VMRegImpl::stack2reg(klass_slot_offset)); |
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2292 |
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2293 // Now get the handle |
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2294 __ lea(oop_handle_reg, Address(rsp, klass_offset)); |
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2295 // store the klass handle as second argument |
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2296 __ movptr(c_rarg1, oop_handle_reg); |
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2297 // and protect the arg if we must spill |
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2298 c_arg--; |
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2299 } |
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2300 } else { |
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2301 // For JNI critical methods we need to save all registers in save_args. |
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2302 c_arg = 0; |
0 | 2303 } |
2304 | |
2305 // Change state to native (we save the return address in the thread, since it might not | |
2306 // be pushed on the stack when we do a a stack traversal). It is enough that the pc() | |
2307 // points into the right code segment. It does not have to be the correct return pc. | |
2308 // We use the same pc/oopMap repeatedly when we call out | |
2309 | |
2310 intptr_t the_pc = (intptr_t) __ pc(); | |
2311 oop_maps->add_gc_map(the_pc - start, map); | |
2312 | |
2313 __ set_last_Java_frame(rsp, noreg, (address)the_pc); | |
2314 | |
2315 | |
2316 // We have all of the arguments setup at this point. We must not touch any register | |
2317 // argument registers at this point (what if we save/restore them there are no oop? | |
2318 | |
2319 { | |
2320 SkipIfEqual skip(masm, &DTraceMethodProbes, false); | |
2321 // protect the args we've loaded | |
2322 save_args(masm, total_c_args, c_arg, out_regs); | |
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2323 __ mov_metadata(c_rarg1, method()); |
0 | 2324 __ call_VM_leaf( |
2325 CAST_FROM_FN_PTR(address, SharedRuntime::dtrace_method_entry), | |
2326 r15_thread, c_rarg1); | |
2327 restore_args(masm, total_c_args, c_arg, out_regs); | |
2328 } | |
2329 | |
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2330 // RedefineClasses() tracing support for obsolete method entry |
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2331 if (RC_TRACE_IN_RANGE(0x00001000, 0x00002000)) { |
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2332 // protect the args we've loaded |
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2333 save_args(masm, total_c_args, c_arg, out_regs); |
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2334 __ mov_metadata(c_rarg1, method()); |
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2335 __ call_VM_leaf( |
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2336 CAST_FROM_FN_PTR(address, SharedRuntime::rc_trace_method_entry), |
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2337 r15_thread, c_rarg1); |
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2338 restore_args(masm, total_c_args, c_arg, out_regs); |
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2339 } |
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2340 |
0 | 2341 // Lock a synchronized method |
2342 | |
2343 // Register definitions used by locking and unlocking | |
2344 | |
2345 const Register swap_reg = rax; // Must use rax for cmpxchg instruction | |
2346 const Register obj_reg = rbx; // Will contain the oop | |
2347 const Register lock_reg = r13; // Address of compiler lock object (BasicLock) | |
2348 const Register old_hdr = r13; // value of old header at unlock time | |
2349 | |
2350 Label slow_path_lock; | |
2351 Label lock_done; | |
2352 | |
2353 if (method->is_synchronized()) { | |
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2354 assert(!is_critical_native, "unhandled"); |
0 | 2355 |
2356 | |
2357 const int mark_word_offset = BasicLock::displaced_header_offset_in_bytes(); | |
2358 | |
2359 // Get the handle (the 2nd argument) | |
304 | 2360 __ mov(oop_handle_reg, c_rarg1); |
0 | 2361 |
2362 // Get address of the box | |
2363 | |
304 | 2364 __ lea(lock_reg, Address(rsp, lock_slot_offset * VMRegImpl::stack_slot_size)); |
0 | 2365 |
2366 // Load the oop from the handle | |
304 | 2367 __ movptr(obj_reg, Address(oop_handle_reg, 0)); |
0 | 2368 |
2369 if (UseBiasedLocking) { | |
2370 __ biased_locking_enter(lock_reg, obj_reg, swap_reg, rscratch1, false, lock_done, &slow_path_lock); | |
2371 } | |
2372 | |
2373 // Load immediate 1 into swap_reg %rax | |
2374 __ movl(swap_reg, 1); | |
2375 | |
2376 // Load (object->mark() | 1) into swap_reg %rax | |
304 | 2377 __ orptr(swap_reg, Address(obj_reg, 0)); |
0 | 2378 |
2379 // Save (object->mark() | 1) into BasicLock's displaced header | |
304 | 2380 __ movptr(Address(lock_reg, mark_word_offset), swap_reg); |
0 | 2381 |
2382 if (os::is_MP()) { | |
2383 __ lock(); | |
2384 } | |
2385 | |
2386 // src -> dest iff dest == rax else rax <- dest | |
304 | 2387 __ cmpxchgptr(lock_reg, Address(obj_reg, 0)); |
0 | 2388 __ jcc(Assembler::equal, lock_done); |
2389 | |
2390 // Hmm should this move to the slow path code area??? | |
2391 | |
2392 // Test if the oopMark is an obvious stack pointer, i.e., | |
2393 // 1) (mark & 3) == 0, and | |
2394 // 2) rsp <= mark < mark + os::pagesize() | |
2395 // These 3 tests can be done by evaluating the following | |
2396 // expression: ((mark - rsp) & (3 - os::vm_page_size())), | |
2397 // assuming both stack pointer and pagesize have their | |
2398 // least significant 2 bits clear. | |
2399 // NOTE: the oopMark is in swap_reg %rax as the result of cmpxchg | |
2400 | |
304 | 2401 __ subptr(swap_reg, rsp); |
2402 __ andptr(swap_reg, 3 - os::vm_page_size()); | |
0 | 2403 |
2404 // Save the test result, for recursive case, the result is zero | |
304 | 2405 __ movptr(Address(lock_reg, mark_word_offset), swap_reg); |
0 | 2406 __ jcc(Assembler::notEqual, slow_path_lock); |
2407 | |
2408 // Slow path will re-enter here | |
2409 | |
2410 __ bind(lock_done); | |
2411 } | |
2412 | |
2413 | |
2414 // Finally just about ready to make the JNI call | |
2415 | |
2416 | |
2417 // get JNIEnv* which is first argument to native | |
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2418 if (!is_critical_native) { |
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2419 __ lea(c_rarg0, Address(r15_thread, in_bytes(JavaThread::jni_environment_offset()))); |
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2420 } |
0 | 2421 |
2422 // Now set thread in native | |
304 | 2423 __ movl(Address(r15_thread, JavaThread::thread_state_offset()), _thread_in_native); |
0 | 2424 |
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2425 __ call(RuntimeAddress(native_func)); |
0 | 2426 |
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2427 // Verify or restore cpu control state after JNI call |
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2428 __ restore_cpu_control_state_after_jni(); |
0 | 2429 |
2430 // Unpack native results. | |
2431 switch (ret_type) { | |
2432 case T_BOOLEAN: __ c2bool(rax); break; | |
2433 case T_CHAR : __ movzwl(rax, rax); break; | |
2434 case T_BYTE : __ sign_extend_byte (rax); break; | |
2435 case T_SHORT : __ sign_extend_short(rax); break; | |
2436 case T_INT : /* nothing to do */ break; | |
2437 case T_DOUBLE : | |
2438 case T_FLOAT : | |
2439 // Result is in xmm0 we'll save as needed | |
2440 break; | |
2441 case T_ARRAY: // Really a handle | |
2442 case T_OBJECT: // Really a handle | |
2443 break; // can't de-handlize until after safepoint check | |
2444 case T_VOID: break; | |
2445 case T_LONG: break; | |
2446 default : ShouldNotReachHere(); | |
2447 } | |
2448 | |
2449 // Switch thread to "native transition" state before reading the synchronization state. | |
2450 // This additional state is necessary because reading and testing the synchronization | |
2451 // state is not atomic w.r.t. GC, as this scenario demonstrates: | |
2452 // Java thread A, in _thread_in_native state, loads _not_synchronized and is preempted. | |
2453 // VM thread changes sync state to synchronizing and suspends threads for GC. | |
2454 // Thread A is resumed to finish this native method, but doesn't block here since it | |
2455 // didn't see any synchronization is progress, and escapes. | |
304 | 2456 __ movl(Address(r15_thread, JavaThread::thread_state_offset()), _thread_in_native_trans); |
0 | 2457 |
2458 if(os::is_MP()) { | |
2459 if (UseMembar) { | |
2460 // Force this write out before the read below | |
2461 __ membar(Assembler::Membar_mask_bits( | |
2462 Assembler::LoadLoad | Assembler::LoadStore | | |
2463 Assembler::StoreLoad | Assembler::StoreStore)); | |
2464 } else { | |
2465 // Write serialization page so VM thread can do a pseudo remote membar. | |
2466 // We use the current thread pointer to calculate a thread specific | |
2467 // offset to write to within the page. This minimizes bus traffic | |
2468 // due to cache line collision. | |
2469 __ serialize_memory(r15_thread, rcx); | |
2470 } | |
2471 } | |
2472 | |
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2473 Label after_transition; |
0 | 2474 |
2475 // check for safepoint operation in progress and/or pending suspend requests | |
2476 { | |
2477 Label Continue; | |
2478 | |
2479 __ cmp32(ExternalAddress((address)SafepointSynchronize::address_of_state()), | |
2480 SafepointSynchronize::_not_synchronized); | |
2481 | |
2482 Label L; | |
2483 __ jcc(Assembler::notEqual, L); | |
2484 __ cmpl(Address(r15_thread, JavaThread::suspend_flags_offset()), 0); | |
2485 __ jcc(Assembler::equal, Continue); | |
2486 __ bind(L); | |
2487 | |
2488 // Don't use call_VM as it will see a possible pending exception and forward it | |
2489 // and never return here preventing us from clearing _last_native_pc down below. | |
2490 // Also can't use call_VM_leaf either as it will check to see if rsi & rdi are | |
2491 // preserved and correspond to the bcp/locals pointers. So we do a runtime call | |
2492 // by hand. | |
2493 // | |
2494 save_native_result(masm, ret_type, stack_slots); | |
304 | 2495 __ mov(c_rarg0, r15_thread); |
2496 __ mov(r12, rsp); // remember sp | |
2497 __ subptr(rsp, frame::arg_reg_save_area_bytes); // windows | |
2498 __ andptr(rsp, -16); // align stack as required by ABI | |
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2499 if (!is_critical_native) { |
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2500 __ call(RuntimeAddress(CAST_FROM_FN_PTR(address, JavaThread::check_special_condition_for_native_trans))); |
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2501 } else { |
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2502 __ call(RuntimeAddress(CAST_FROM_FN_PTR(address, JavaThread::check_special_condition_for_native_trans_and_transition))); |
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2503 } |
304 | 2504 __ mov(rsp, r12); // restore sp |
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2505 __ reinit_heapbase(); |
0 | 2506 // Restore any method result value |
2507 restore_native_result(masm, ret_type, stack_slots); | |
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2508 |
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2509 if (is_critical_native) { |
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2510 // The call above performed the transition to thread_in_Java so |
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2511 // skip the transition logic below. |
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2512 __ jmpb(after_transition); |
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2513 } |
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2514 |
0 | 2515 __ bind(Continue); |
2516 } | |
2517 | |
2518 // change thread state | |
2519 __ movl(Address(r15_thread, JavaThread::thread_state_offset()), _thread_in_Java); | |
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2520 __ bind(after_transition); |
0 | 2521 |
2522 Label reguard; | |
2523 Label reguard_done; | |
2524 __ cmpl(Address(r15_thread, JavaThread::stack_guard_state_offset()), JavaThread::stack_guard_yellow_disabled); | |
2525 __ jcc(Assembler::equal, reguard); | |
2526 __ bind(reguard_done); | |
2527 | |
2528 // native result if any is live | |
2529 | |
2530 // Unlock | |
2531 Label unlock_done; | |
2532 Label slow_path_unlock; | |
2533 if (method->is_synchronized()) { | |
2534 | |
2535 // Get locked oop from the handle we passed to jni | |
304 | 2536 __ movptr(obj_reg, Address(oop_handle_reg, 0)); |
0 | 2537 |
2538 Label done; | |
2539 | |
2540 if (UseBiasedLocking) { | |
2541 __ biased_locking_exit(obj_reg, old_hdr, done); | |
2542 } | |
2543 | |
2544 // Simple recursive lock? | |
2545 | |
304 | 2546 __ cmpptr(Address(rsp, lock_slot_offset * VMRegImpl::stack_slot_size), (int32_t)NULL_WORD); |
0 | 2547 __ jcc(Assembler::equal, done); |
2548 | |
2549 // Must save rax if if it is live now because cmpxchg must use it | |
2550 if (ret_type != T_FLOAT && ret_type != T_DOUBLE && ret_type != T_VOID) { | |
2551 save_native_result(masm, ret_type, stack_slots); | |
2552 } | |
2553 | |
2554 | |
2555 // get address of the stack lock | |
304 | 2556 __ lea(rax, Address(rsp, lock_slot_offset * VMRegImpl::stack_slot_size)); |
0 | 2557 // get old displaced header |
304 | 2558 __ movptr(old_hdr, Address(rax, 0)); |
0 | 2559 |
2560 // Atomic swap old header if oop still contains the stack lock | |
2561 if (os::is_MP()) { | |
2562 __ lock(); | |
2563 } | |
304 | 2564 __ cmpxchgptr(old_hdr, Address(obj_reg, 0)); |
0 | 2565 __ jcc(Assembler::notEqual, slow_path_unlock); |
2566 | |
2567 // slow path re-enters here | |
2568 __ bind(unlock_done); | |
2569 if (ret_type != T_FLOAT && ret_type != T_DOUBLE && ret_type != T_VOID) { | |
2570 restore_native_result(masm, ret_type, stack_slots); | |
2571 } | |
2572 | |
2573 __ bind(done); | |
2574 | |
2575 } | |
2576 { | |
2577 SkipIfEqual skip(masm, &DTraceMethodProbes, false); | |
2578 save_native_result(masm, ret_type, stack_slots); | |
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2579 __ mov_metadata(c_rarg1, method()); |
0 | 2580 __ call_VM_leaf( |
2581 CAST_FROM_FN_PTR(address, SharedRuntime::dtrace_method_exit), | |
2582 r15_thread, c_rarg1); | |
2583 restore_native_result(masm, ret_type, stack_slots); | |
2584 } | |
2585 | |
2586 __ reset_last_Java_frame(false, true); | |
2587 | |
2588 // Unpack oop result | |
2589 if (ret_type == T_OBJECT || ret_type == T_ARRAY) { | |
2590 Label L; | |
304 | 2591 __ testptr(rax, rax); |
0 | 2592 __ jcc(Assembler::zero, L); |
304 | 2593 __ movptr(rax, Address(rax, 0)); |
0 | 2594 __ bind(L); |
2595 __ verify_oop(rax); | |
2596 } | |
2597 | |
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2598 if (!is_critical_native) { |
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2599 // reset handle block |
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2600 __ movptr(rcx, Address(r15_thread, JavaThread::active_handles_offset())); |
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2601 __ movl(Address(rcx, JNIHandleBlock::top_offset_in_bytes()), (int32_t)NULL_WORD); |
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2602 } |
0 | 2603 |
2604 // pop our frame | |
2605 | |
2606 __ leave(); | |
2607 | |
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2608 if (!is_critical_native) { |
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2609 // Any exception pending? |
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2610 __ cmpptr(Address(r15_thread, in_bytes(Thread::pending_exception_offset())), (int32_t)NULL_WORD); |
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2611 __ jcc(Assembler::notEqual, exception_pending); |
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2612 } |
0 | 2613 |
2614 // Return | |
2615 | |
2616 __ ret(0); | |
2617 | |
2618 // Unexpected paths are out of line and go here | |
2619 | |
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2620 if (!is_critical_native) { |
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2621 // forward the exception |
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2622 __ bind(exception_pending); |
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2623 |
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2624 // and forward the exception |
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2625 __ jump(RuntimeAddress(StubRoutines::forward_exception_entry())); |
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2626 } |
0 | 2627 |
2628 // Slow path locking & unlocking | |
2629 if (method->is_synchronized()) { | |
2630 | |
2631 // BEGIN Slow path lock | |
2632 __ bind(slow_path_lock); | |
2633 | |
2634 // has last_Java_frame setup. No exceptions so do vanilla call not call_VM | |
2635 // args are (oop obj, BasicLock* lock, JavaThread* thread) | |
2636 | |
2637 // protect the args we've loaded | |
2638 save_args(masm, total_c_args, c_arg, out_regs); | |
2639 | |
304 | 2640 __ mov(c_rarg0, obj_reg); |
2641 __ mov(c_rarg1, lock_reg); | |
2642 __ mov(c_rarg2, r15_thread); | |
0 | 2643 |
2644 // Not a leaf but we have last_Java_frame setup as we want | |
2645 __ call_VM_leaf(CAST_FROM_FN_PTR(address, SharedRuntime::complete_monitor_locking_C), 3); | |
2646 restore_args(masm, total_c_args, c_arg, out_regs); | |
2647 | |
2648 #ifdef ASSERT | |
2649 { Label L; | |
304 | 2650 __ cmpptr(Address(r15_thread, in_bytes(Thread::pending_exception_offset())), (int32_t)NULL_WORD); |
0 | 2651 __ jcc(Assembler::equal, L); |
2652 __ stop("no pending exception allowed on exit from monitorenter"); | |
2653 __ bind(L); | |
2654 } | |
2655 #endif | |
2656 __ jmp(lock_done); | |
2657 | |
2658 // END Slow path lock | |
2659 | |
2660 // BEGIN Slow path unlock | |
2661 __ bind(slow_path_unlock); | |
2662 | |
2663 // If we haven't already saved the native result we must save it now as xmm registers | |
2664 // are still exposed. | |
2665 | |
2666 if (ret_type == T_FLOAT || ret_type == T_DOUBLE ) { | |
2667 save_native_result(masm, ret_type, stack_slots); | |
2668 } | |
2669 | |
304 | 2670 __ lea(c_rarg1, Address(rsp, lock_slot_offset * VMRegImpl::stack_slot_size)); |
2671 | |
2672 __ mov(c_rarg0, obj_reg); | |
2673 __ mov(r12, rsp); // remember sp | |
2674 __ subptr(rsp, frame::arg_reg_save_area_bytes); // windows | |
2675 __ andptr(rsp, -16); // align stack as required by ABI | |
0 | 2676 |
2677 // Save pending exception around call to VM (which contains an EXCEPTION_MARK) | |
2678 // NOTE that obj_reg == rbx currently | |
304 | 2679 __ movptr(rbx, Address(r15_thread, in_bytes(Thread::pending_exception_offset()))); |
2680 __ movptr(Address(r15_thread, in_bytes(Thread::pending_exception_offset())), (int32_t)NULL_WORD); | |
0 | 2681 |
2682 __ call(RuntimeAddress(CAST_FROM_FN_PTR(address, SharedRuntime::complete_monitor_unlocking_C))); | |
304 | 2683 __ mov(rsp, r12); // restore sp |
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2684 __ reinit_heapbase(); |
0 | 2685 #ifdef ASSERT |
2686 { | |
2687 Label L; | |
304 | 2688 __ cmpptr(Address(r15_thread, in_bytes(Thread::pending_exception_offset())), (int)NULL_WORD); |
0 | 2689 __ jcc(Assembler::equal, L); |
2690 __ stop("no pending exception allowed on exit complete_monitor_unlocking_C"); | |
2691 __ bind(L); | |
2692 } | |
2693 #endif /* ASSERT */ | |
2694 | |
304 | 2695 __ movptr(Address(r15_thread, in_bytes(Thread::pending_exception_offset())), rbx); |
0 | 2696 |
2697 if (ret_type == T_FLOAT || ret_type == T_DOUBLE ) { | |
2698 restore_native_result(masm, ret_type, stack_slots); | |
2699 } | |
2700 __ jmp(unlock_done); | |
2701 | |
2702 // END Slow path unlock | |
2703 | |
2704 } // synchronized | |
2705 | |
2706 // SLOW PATH Reguard the stack if needed | |
2707 | |
2708 __ bind(reguard); | |
2709 save_native_result(masm, ret_type, stack_slots); | |
304 | 2710 __ mov(r12, rsp); // remember sp |
2711 __ subptr(rsp, frame::arg_reg_save_area_bytes); // windows | |
2712 __ andptr(rsp, -16); // align stack as required by ABI | |
0 | 2713 __ call(RuntimeAddress(CAST_FROM_FN_PTR(address, SharedRuntime::reguard_yellow_pages))); |
304 | 2714 __ mov(rsp, r12); // restore sp |
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2715 __ reinit_heapbase(); |
0 | 2716 restore_native_result(masm, ret_type, stack_slots); |
2717 // and continue | |
2718 __ jmp(reguard_done); | |
2719 | |
2720 | |
2721 | |
2722 __ flush(); | |
2723 | |
2724 nmethod *nm = nmethod::new_native_nmethod(method, | |
2405
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2725 compile_id, |
0 | 2726 masm->code(), |
2727 vep_offset, | |
2728 frame_complete, | |
2729 stack_slots / VMRegImpl::slots_per_word, | |
2730 (is_static ? in_ByteSize(klass_offset) : in_ByteSize(receiver_offset)), | |
2731 in_ByteSize(lock_slot_offset*VMRegImpl::stack_slot_size), | |
2732 oop_maps); | |
4873
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2733 |
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2734 if (is_critical_native) { |
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2735 nm->set_lazy_critical_native(true); |
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2736 } |
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2737 |
0 | 2738 return nm; |
2739 | |
2740 } | |
2741 | |
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2742 #ifdef HAVE_DTRACE_H |
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2743 // --------------------------------------------------------------------------- |
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2744 // Generate a dtrace nmethod for a given signature. The method takes arguments |
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2745 // in the Java compiled code convention, marshals them to the native |
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2746 // abi and then leaves nops at the position you would expect to call a native |
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2747 // function. When the probe is enabled the nops are replaced with a trap |
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2748 // instruction that dtrace inserts and the trace will cause a notification |
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2749 // to dtrace. |
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2750 // |
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2751 // The probes are only able to take primitive types and java/lang/String as |
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2752 // arguments. No other java types are allowed. Strings are converted to utf8 |
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2753 // strings so that from dtrace point of view java strings are converted to C |
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2754 // strings. There is an arbitrary fixed limit on the total space that a method |
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2755 // can use for converting the strings. (256 chars per string in the signature). |
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2756 // So any java string larger then this is truncated. |
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2757 |
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2758 static int fp_offset[ConcreteRegisterImpl::number_of_registers] = { 0 }; |
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2759 static bool offsets_initialized = false; |
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2760 |
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2761 |
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2762 nmethod *SharedRuntime::generate_dtrace_nmethod(MacroAssembler *masm, |
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2763 methodHandle method) { |
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2764 |
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2765 |
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2766 // generate_dtrace_nmethod is guarded by a mutex so we are sure to |
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2767 // be single threaded in this method. |
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2768 assert(AdapterHandlerLibrary_lock->owned_by_self(), "must be"); |
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2769 |
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2770 if (!offsets_initialized) { |
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2771 fp_offset[c_rarg0->as_VMReg()->value()] = -1 * wordSize; |
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2772 fp_offset[c_rarg1->as_VMReg()->value()] = -2 * wordSize; |
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2773 fp_offset[c_rarg2->as_VMReg()->value()] = -3 * wordSize; |
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2774 fp_offset[c_rarg3->as_VMReg()->value()] = -4 * wordSize; |
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2775 fp_offset[c_rarg4->as_VMReg()->value()] = -5 * wordSize; |
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2776 fp_offset[c_rarg5->as_VMReg()->value()] = -6 * wordSize; |
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2777 |
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2778 fp_offset[c_farg0->as_VMReg()->value()] = -7 * wordSize; |
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2779 fp_offset[c_farg1->as_VMReg()->value()] = -8 * wordSize; |
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2780 fp_offset[c_farg2->as_VMReg()->value()] = -9 * wordSize; |
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2781 fp_offset[c_farg3->as_VMReg()->value()] = -10 * wordSize; |
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2782 fp_offset[c_farg4->as_VMReg()->value()] = -11 * wordSize; |
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2783 fp_offset[c_farg5->as_VMReg()->value()] = -12 * wordSize; |
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2784 fp_offset[c_farg6->as_VMReg()->value()] = -13 * wordSize; |
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2785 fp_offset[c_farg7->as_VMReg()->value()] = -14 * wordSize; |
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2786 |
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2787 offsets_initialized = true; |
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2788 } |
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2789 // Fill in the signature array, for the calling-convention call. |
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2790 int total_args_passed = method->size_of_parameters(); |
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2791 |
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2792 BasicType* in_sig_bt = NEW_RESOURCE_ARRAY(BasicType, total_args_passed); |
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2793 VMRegPair *in_regs = NEW_RESOURCE_ARRAY(VMRegPair, total_args_passed); |
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2794 |
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2795 // The signature we are going to use for the trap that dtrace will see |
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2796 // java/lang/String is converted. We drop "this" and any other object |
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2797 // is converted to NULL. (A one-slot java/lang/Long object reference |
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2798 // is converted to a two-slot long, which is why we double the allocation). |
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2799 BasicType* out_sig_bt = NEW_RESOURCE_ARRAY(BasicType, total_args_passed * 2); |
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2800 VMRegPair* out_regs = NEW_RESOURCE_ARRAY(VMRegPair, total_args_passed * 2); |
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2801 |
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2802 int i=0; |
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2803 int total_strings = 0; |
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2804 int first_arg_to_pass = 0; |
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2805 int total_c_args = 0; |
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2806 |
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2807 // Skip the receiver as dtrace doesn't want to see it |
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2808 if( !method->is_static() ) { |
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2809 in_sig_bt[i++] = T_OBJECT; |
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2810 first_arg_to_pass = 1; |
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2811 } |
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2812 |
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2813 // We need to convert the java args to where a native (non-jni) function |
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2814 // would expect them. To figure out where they go we convert the java |
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2815 // signature to a C signature. |
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2816 |
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2817 SignatureStream ss(method->signature()); |
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2818 for ( ; !ss.at_return_type(); ss.next()) { |
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2819 BasicType bt = ss.type(); |
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2820 in_sig_bt[i++] = bt; // Collect remaining bits of signature |
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2821 out_sig_bt[total_c_args++] = bt; |
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2822 if( bt == T_OBJECT) { |
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2823 Symbol* s = ss.as_symbol_or_null(); // symbol is created |
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2824 if (s == vmSymbols::java_lang_String()) { |
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2825 total_strings++; |
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2826 out_sig_bt[total_c_args-1] = T_ADDRESS; |
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2827 } else if (s == vmSymbols::java_lang_Boolean() || |
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2828 s == vmSymbols::java_lang_Character() || |
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2829 s == vmSymbols::java_lang_Byte() || |
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2830 s == vmSymbols::java_lang_Short() || |
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2831 s == vmSymbols::java_lang_Integer() || |
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2832 s == vmSymbols::java_lang_Float()) { |
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2833 out_sig_bt[total_c_args-1] = T_INT; |
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2834 } else if (s == vmSymbols::java_lang_Long() || |
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2835 s == vmSymbols::java_lang_Double()) { |
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2836 out_sig_bt[total_c_args-1] = T_LONG; |
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2837 out_sig_bt[total_c_args++] = T_VOID; |
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2838 } |
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2839 } else if ( bt == T_LONG || bt == T_DOUBLE ) { |
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2840 in_sig_bt[i++] = T_VOID; // Longs & doubles take 2 Java slots |
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2841 // We convert double to long |
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2842 out_sig_bt[total_c_args-1] = T_LONG; |
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2843 out_sig_bt[total_c_args++] = T_VOID; |
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2844 } else if ( bt == T_FLOAT) { |
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2845 // We convert float to int |
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2846 out_sig_bt[total_c_args-1] = T_INT; |
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2847 } |
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2848 } |
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2849 |
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2850 assert(i==total_args_passed, "validly parsed signature"); |
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2851 |
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2852 // Now get the compiled-Java layout as input arguments |
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2853 int comp_args_on_stack; |
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2854 comp_args_on_stack = SharedRuntime::java_calling_convention( |
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2855 in_sig_bt, in_regs, total_args_passed, false); |
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2856 |
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2857 // Now figure out where the args must be stored and how much stack space |
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2858 // they require (neglecting out_preserve_stack_slots but space for storing |
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2859 // the 1st six register arguments). It's weird see int_stk_helper. |
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2860 |
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2861 int out_arg_slots; |
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2862 out_arg_slots = c_calling_convention(out_sig_bt, out_regs, NULL, total_c_args); |
116
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2863 |
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2864 // Calculate the total number of stack slots we will need. |
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2865 |
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2866 // First count the abi requirement plus all of the outgoing args |
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2867 int stack_slots = SharedRuntime::out_preserve_stack_slots() + out_arg_slots; |
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2868 |
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2869 // Now space for the string(s) we must convert |
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2870 int* string_locs = NEW_RESOURCE_ARRAY(int, total_strings + 1); |
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2871 for (i = 0; i < total_strings ; i++) { |
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2872 string_locs[i] = stack_slots; |
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2873 stack_slots += max_dtrace_string_size / VMRegImpl::stack_slot_size; |
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2874 } |
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2875 |
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2876 // Plus the temps we might need to juggle register args |
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2877 // regs take two slots each |
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2878 stack_slots += (Argument::n_int_register_parameters_c + |
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2879 Argument::n_float_register_parameters_c) * 2; |
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2880 |
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2881 |
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2882 // + 4 for return address (which we own) and saved rbp, |
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2883 |
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2884 stack_slots += 4; |
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2885 |
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2886 // Ok The space we have allocated will look like: |
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2887 // |
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2888 // |
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2889 // FP-> | | |
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2890 // |---------------------| |
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2891 // | string[n] | |
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2892 // |---------------------| <- string_locs[n] |
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2893 // | string[n-1] | |
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2894 // |---------------------| <- string_locs[n-1] |
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2895 // | ... | |
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2896 // | ... | |
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2897 // |---------------------| <- string_locs[1] |
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2898 // | string[0] | |
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2899 // |---------------------| <- string_locs[0] |
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2900 // | outbound memory | |
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2901 // | based arguments | |
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2902 // | | |
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2903 // |---------------------| |
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2904 // | | |
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2905 // SP-> | out_preserved_slots | |
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2906 // |
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2907 // |
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2908 |
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2909 // Now compute actual number of stack words we need rounding to make |
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2910 // stack properly aligned. |
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2911 stack_slots = round_to(stack_slots, 4 * VMRegImpl::slots_per_word); |
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2912 |
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2913 int stack_size = stack_slots * VMRegImpl::stack_slot_size; |
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2914 |
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2915 intptr_t start = (intptr_t)__ pc(); |
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2916 |
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2917 // First thing make an ic check to see if we should even be here |
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2918 |
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2919 // We are free to use all registers as temps without saving them and |
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2920 // restoring them except rbp. rbp, is the only callee save register |
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2921 // as far as the interpreter and the compiler(s) are concerned. |
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2922 |
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2923 const Register ic_reg = rax; |
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2924 const Register receiver = rcx; |
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2925 Label hit; |
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2926 Label exception_pending; |
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2927 |
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2928 |
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2929 __ verify_oop(receiver); |
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2930 __ cmpl(ic_reg, Address(receiver, oopDesc::klass_offset_in_bytes())); |
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2931 __ jcc(Assembler::equal, hit); |
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2932 |
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2933 __ jump(RuntimeAddress(SharedRuntime::get_ic_miss_stub())); |
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2934 |
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2935 // verified entry must be aligned for code patching. |
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2936 // and the first 5 bytes must be in the same cache line |
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2937 // if we align at 8 then we will be sure 5 bytes are in the same line |
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2938 __ align(8); |
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2939 |
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2940 __ bind(hit); |
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2941 |
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2942 int vep_offset = ((intptr_t)__ pc()) - start; |
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2943 |
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2944 |
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2945 // The instruction at the verified entry point must be 5 bytes or longer |
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2946 // because it can be patched on the fly by make_non_entrant. The stack bang |
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2947 // instruction fits that requirement. |
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2948 |
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2949 // Generate stack overflow check |
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2950 |
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2951 if (UseStackBanging) { |
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2952 if (stack_size <= StackShadowPages*os::vm_page_size()) { |
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2953 __ bang_stack_with_offset(StackShadowPages*os::vm_page_size()); |
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2954 } else { |
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2955 __ movl(rax, stack_size); |
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2956 __ bang_stack_size(rax, rbx); |
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2957 } |
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2958 } else { |
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2959 // need a 5 byte instruction to allow MT safe patching to non-entrant |
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2960 __ fat_nop(); |
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2961 } |
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2962 |
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2963 assert(((uintptr_t)__ pc() - start - vep_offset) >= 5, |
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2964 "valid size for make_non_entrant"); |
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2965 |
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2966 // Generate a new frame for the wrapper. |
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2967 __ enter(); |
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2968 |
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2969 // -4 because return address is already present and so is saved rbp, |
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2970 if (stack_size - 2*wordSize != 0) { |
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2971 __ subq(rsp, stack_size - 2*wordSize); |
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2972 } |
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2973 |
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2974 // Frame is now completed as far a size and linkage. |
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2975 |
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2976 int frame_complete = ((intptr_t)__ pc()) - start; |
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2977 |
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2978 int c_arg, j_arg; |
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2979 |
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2980 // State of input register args |
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2981 |
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2982 bool live[ConcreteRegisterImpl::number_of_registers]; |
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2983 |
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2984 live[j_rarg0->as_VMReg()->value()] = false; |
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2985 live[j_rarg1->as_VMReg()->value()] = false; |
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2986 live[j_rarg2->as_VMReg()->value()] = false; |
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2987 live[j_rarg3->as_VMReg()->value()] = false; |
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2988 live[j_rarg4->as_VMReg()->value()] = false; |
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2989 live[j_rarg5->as_VMReg()->value()] = false; |
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2990 |
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2991 live[j_farg0->as_VMReg()->value()] = false; |
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2992 live[j_farg1->as_VMReg()->value()] = false; |
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2993 live[j_farg2->as_VMReg()->value()] = false; |
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2994 live[j_farg3->as_VMReg()->value()] = false; |
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2995 live[j_farg4->as_VMReg()->value()] = false; |
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2996 live[j_farg5->as_VMReg()->value()] = false; |
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2997 live[j_farg6->as_VMReg()->value()] = false; |
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2998 live[j_farg7->as_VMReg()->value()] = false; |
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2999 |
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3000 |
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3001 bool rax_is_zero = false; |
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3002 |
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3003 // All args (except strings) destined for the stack are moved first |
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3004 for (j_arg = first_arg_to_pass, c_arg = 0 ; |
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3005 j_arg < total_args_passed ; j_arg++, c_arg++ ) { |
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3006 VMRegPair src = in_regs[j_arg]; |
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3007 VMRegPair dst = out_regs[c_arg]; |
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3008 |
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3009 // Get the real reg value or a dummy (rsp) |
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3010 |
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3011 int src_reg = src.first()->is_reg() ? |
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3012 src.first()->value() : |
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3013 rsp->as_VMReg()->value(); |
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3014 |
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3015 bool useless = in_sig_bt[j_arg] == T_ARRAY || |
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3016 (in_sig_bt[j_arg] == T_OBJECT && |
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3017 out_sig_bt[c_arg] != T_INT && |
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3018 out_sig_bt[c_arg] != T_ADDRESS && |
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3019 out_sig_bt[c_arg] != T_LONG); |
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3020 |
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3021 live[src_reg] = !useless; |
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3022 |
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3023 if (dst.first()->is_stack()) { |
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3024 |
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3025 // Even though a string arg in a register is still live after this loop |
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3026 // after the string conversion loop (next) it will be dead so we take |
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3027 // advantage of that now for simpler code to manage live. |
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3028 |
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3029 live[src_reg] = false; |
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3030 switch (in_sig_bt[j_arg]) { |
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3031 |
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3032 case T_ARRAY: |
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3033 case T_OBJECT: |
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3034 { |
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3035 Address stack_dst(rsp, reg2offset_out(dst.first())); |
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3036 |
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3037 if (out_sig_bt[c_arg] == T_INT || out_sig_bt[c_arg] == T_LONG) { |
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3038 // need to unbox a one-word value |
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3039 Register in_reg = rax; |
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3040 if ( src.first()->is_reg() ) { |
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3041 in_reg = src.first()->as_Register(); |
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3042 } else { |
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3043 __ movq(rax, Address(rbp, reg2offset_in(src.first()))); |
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3044 rax_is_zero = false; |
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3045 } |
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3046 Label skipUnbox; |
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3047 __ movptr(Address(rsp, reg2offset_out(dst.first())), |
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3048 (int32_t)NULL_WORD); |
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3049 __ testq(in_reg, in_reg); |
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3050 __ jcc(Assembler::zero, skipUnbox); |
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3051 |
165
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3052 BasicType bt = out_sig_bt[c_arg]; |
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3053 int box_offset = java_lang_boxing_object::value_offset_in_bytes(bt); |
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3054 Address src1(in_reg, box_offset); |
165
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3055 if ( bt == T_LONG ) { |
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3056 __ movq(in_reg, src1); |
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3057 __ movq(stack_dst, in_reg); |
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3058 assert(out_sig_bt[c_arg+1] == T_VOID, "must be"); |
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3059 ++c_arg; // skip over T_VOID to keep the loop indices in sync |
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3060 } else { |
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3061 __ movl(in_reg, src1); |
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|
3062 __ movl(stack_dst, in_reg); |
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6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
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diff
changeset
|
3063 } |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3064 |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
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113
diff
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|
3065 __ bind(skipUnbox); |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
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|
3066 } else if (out_sig_bt[c_arg] != T_ADDRESS) { |
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|
3067 // Convert the arg to NULL |
018d5b58dd4f
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kamg
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113
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|
3068 if (!rax_is_zero) { |
018d5b58dd4f
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113
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|
3069 __ xorq(rax, rax); |
018d5b58dd4f
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|
3070 rax_is_zero = true; |
018d5b58dd4f
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kamg
parents:
113
diff
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|
3071 } |
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6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
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113
diff
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|
3072 __ movq(stack_dst, rax); |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
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|
3073 } |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3074 } |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
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|
3075 break; |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3076 |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
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113
diff
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|
3077 case T_VOID: |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
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|
3078 break; |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3079 |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
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|
3080 case T_FLOAT: |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
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|
3081 // This does the right thing since we know it is destined for the |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
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113
diff
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|
3082 // stack |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
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113
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|
3083 float_move(masm, src, dst); |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
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|
3084 break; |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3085 |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
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|
3086 case T_DOUBLE: |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
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|
3087 // This does the right thing since we know it is destined for the |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
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113
diff
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|
3088 // stack |
018d5b58dd4f
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113
diff
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|
3089 double_move(masm, src, dst); |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
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|
3090 break; |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3091 |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
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|
3092 case T_LONG : |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
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113
diff
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|
3093 long_move(masm, src, dst); |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
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|
3094 break; |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3095 |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
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|
3096 case T_ADDRESS: assert(false, "found T_ADDRESS in java args"); |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
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|
3097 |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
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|
3098 default: |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
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|
3099 move32_64(masm, src, dst); |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
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|
3100 } |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3101 } |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3102 |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3103 } |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3104 |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3105 // If we have any strings we must store any register based arg to the stack |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
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|
3106 // This includes any still live xmm registers too. |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3107 |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3108 int sid = 0; |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3109 |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
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|
3110 if (total_strings > 0 ) { |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
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|
3111 for (j_arg = first_arg_to_pass, c_arg = 0 ; |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
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|
3112 j_arg < total_args_passed ; j_arg++, c_arg++ ) { |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
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|
3113 VMRegPair src = in_regs[j_arg]; |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
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|
3114 VMRegPair dst = out_regs[c_arg]; |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3115 |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
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|
3116 if (src.first()->is_reg()) { |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
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|
3117 Address src_tmp(rbp, fp_offset[src.first()->value()]); |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3118 |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3119 // string oops were left untouched by the previous loop even if the |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3120 // eventual (converted) arg is destined for the stack so park them |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
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|
3121 // away now (except for first) |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3122 |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3123 if (out_sig_bt[c_arg] == T_ADDRESS) { |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3124 Address utf8_addr = Address( |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3125 rsp, string_locs[sid++] * VMRegImpl::stack_slot_size); |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
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|
3126 if (sid != 1) { |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
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|
3127 // The first string arg won't be killed until after the utf8 |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3128 // conversion |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3129 __ movq(utf8_addr, src.first()->as_Register()); |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3130 } |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
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|
3131 } else if (dst.first()->is_reg()) { |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
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|
3132 if (in_sig_bt[j_arg] == T_FLOAT || in_sig_bt[j_arg] == T_DOUBLE) { |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3133 |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3134 // Convert the xmm register to an int and store it in the reserved |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3135 // location for the eventual c register arg |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3136 XMMRegister f = src.first()->as_XMMRegister(); |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
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|
3137 if (in_sig_bt[j_arg] == T_FLOAT) { |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
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|
3138 __ movflt(src_tmp, f); |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3139 } else { |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3140 __ movdbl(src_tmp, f); |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3141 } |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3142 } else { |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3143 // If the arg is an oop type we don't support don't bother to store |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3144 // it remember string was handled above. |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3145 bool useless = in_sig_bt[j_arg] == T_ARRAY || |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3146 (in_sig_bt[j_arg] == T_OBJECT && |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3147 out_sig_bt[c_arg] != T_INT && |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
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|
3148 out_sig_bt[c_arg] != T_LONG); |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3149 |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3150 if (!useless) { |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
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113
diff
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|
3151 __ movq(src_tmp, src.first()->as_Register()); |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3152 } |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3153 } |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3154 } |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3155 } |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3156 if (in_sig_bt[j_arg] == T_OBJECT && out_sig_bt[c_arg] == T_LONG) { |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
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113
diff
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|
3157 assert(out_sig_bt[c_arg+1] == T_VOID, "must be"); |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
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113
diff
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|
3158 ++c_arg; // skip over T_VOID to keep the loop indices in sync |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
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|
3159 } |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3160 } |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3161 |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3162 // Now that the volatile registers are safe, convert all the strings |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3163 sid = 0; |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3164 |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3165 for (j_arg = first_arg_to_pass, c_arg = 0 ; |
018d5b58dd4f
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kamg
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113
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|
3166 j_arg < total_args_passed ; j_arg++, c_arg++ ) { |
018d5b58dd4f
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|
3167 if (out_sig_bt[c_arg] == T_ADDRESS) { |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3168 // It's a string |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
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113
diff
changeset
|
3169 Address utf8_addr = Address( |
018d5b58dd4f
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113
diff
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|
3170 rsp, string_locs[sid++] * VMRegImpl::stack_slot_size); |
018d5b58dd4f
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kamg
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113
diff
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|
3171 // The first string we find might still be in the original java arg |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
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113
diff
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|
3172 // register |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3173 |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
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113
diff
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|
3174 VMReg src = in_regs[j_arg].first(); |
018d5b58dd4f
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kamg
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113
diff
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|
3175 |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
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113
diff
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|
3176 // We will need to eventually save the final argument to the trap |
018d5b58dd4f
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kamg
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113
diff
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|
3177 // in the von-volatile location dedicated to src. This is the offset |
018d5b58dd4f
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113
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|
3178 // from fp we will use. |
018d5b58dd4f
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113
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|
3179 int src_off = src->is_reg() ? |
018d5b58dd4f
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113
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|
3180 fp_offset[src->value()] : reg2offset_in(src); |
018d5b58dd4f
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kamg
parents:
113
diff
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|
3181 |
018d5b58dd4f
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kamg
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113
diff
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|
3182 // This is where the argument will eventually reside |
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diff
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|
3183 VMRegPair dst = out_regs[c_arg]; |
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3184 |
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3185 if (src->is_reg()) { |
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3186 if (sid == 1) { |
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3187 __ movq(c_rarg0, src->as_Register()); |
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3188 } else { |
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3189 __ movq(c_rarg0, utf8_addr); |
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3190 } |
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|
3191 } else { |
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3192 // arg is still in the original location |
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3193 __ movq(c_rarg0, Address(rbp, reg2offset_in(src))); |
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3194 } |
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|
3195 Label done, convert; |
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3196 |
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3197 // see if the oop is NULL |
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3198 __ testq(c_rarg0, c_rarg0); |
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3199 __ jcc(Assembler::notEqual, convert); |
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3200 |
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3201 if (dst.first()->is_reg()) { |
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3202 // Save the ptr to utf string in the origina src loc or the tmp |
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3203 // dedicated to it |
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3204 __ movq(Address(rbp, src_off), c_rarg0); |
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3205 } else { |
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3206 __ movq(Address(rsp, reg2offset_out(dst.first())), c_rarg0); |
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3207 } |
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3208 __ jmp(done); |
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|
3209 |
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3210 __ bind(convert); |
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|
3211 |
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3212 __ lea(c_rarg1, utf8_addr); |
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3213 if (dst.first()->is_reg()) { |
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3214 __ movq(Address(rbp, src_off), c_rarg1); |
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3215 } else { |
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3216 __ movq(Address(rsp, reg2offset_out(dst.first())), c_rarg1); |
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|
3217 } |
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3218 // And do the conversion |
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3219 __ call(RuntimeAddress( |
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3220 CAST_FROM_FN_PTR(address, SharedRuntime::get_utf))); |
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3221 |
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|
3222 __ bind(done); |
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|
3223 } |
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3224 if (in_sig_bt[j_arg] == T_OBJECT && out_sig_bt[c_arg] == T_LONG) { |
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3225 assert(out_sig_bt[c_arg+1] == T_VOID, "must be"); |
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3226 ++c_arg; // skip over T_VOID to keep the loop indices in sync |
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3227 } |
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|
3228 } |
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|
3229 // The get_utf call killed all the c_arg registers |
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3230 live[c_rarg0->as_VMReg()->value()] = false; |
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3231 live[c_rarg1->as_VMReg()->value()] = false; |
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3232 live[c_rarg2->as_VMReg()->value()] = false; |
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3233 live[c_rarg3->as_VMReg()->value()] = false; |
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3234 live[c_rarg4->as_VMReg()->value()] = false; |
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3235 live[c_rarg5->as_VMReg()->value()] = false; |
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|
3236 |
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|
3237 live[c_farg0->as_VMReg()->value()] = false; |
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3238 live[c_farg1->as_VMReg()->value()] = false; |
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3239 live[c_farg2->as_VMReg()->value()] = false; |
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3240 live[c_farg3->as_VMReg()->value()] = false; |
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3241 live[c_farg4->as_VMReg()->value()] = false; |
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3242 live[c_farg5->as_VMReg()->value()] = false; |
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3243 live[c_farg6->as_VMReg()->value()] = false; |
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3244 live[c_farg7->as_VMReg()->value()] = false; |
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3245 } |
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|
3246 |
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|
3247 // Now we can finally move the register args to their desired locations |
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|
3248 |
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|
3249 rax_is_zero = false; |
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|
3250 |
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|
3251 for (j_arg = first_arg_to_pass, c_arg = 0 ; |
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3252 j_arg < total_args_passed ; j_arg++, c_arg++ ) { |
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|
3253 |
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|
3254 VMRegPair src = in_regs[j_arg]; |
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3255 VMRegPair dst = out_regs[c_arg]; |
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|
3256 |
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|
3257 // Only need to look for args destined for the interger registers (since we |
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|
3258 // convert float/double args to look like int/long outbound) |
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3259 if (dst.first()->is_reg()) { |
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3260 Register r = dst.first()->as_Register(); |
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|
3261 |
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|
3262 // Check if the java arg is unsupported and thereofre useless |
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3263 bool useless = in_sig_bt[j_arg] == T_ARRAY || |
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3264 (in_sig_bt[j_arg] == T_OBJECT && |
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|
3265 out_sig_bt[c_arg] != T_INT && |
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3266 out_sig_bt[c_arg] != T_ADDRESS && |
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3267 out_sig_bt[c_arg] != T_LONG); |
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|
3268 |
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|
3269 |
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|
3270 // If we're going to kill an existing arg save it first |
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3271 if (live[dst.first()->value()]) { |
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3272 // you can't kill yourself |
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3273 if (src.first() != dst.first()) { |
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3274 __ movq(Address(rbp, fp_offset[dst.first()->value()]), r); |
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|
3275 } |
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|
3276 } |
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|
3277 if (src.first()->is_reg()) { |
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3278 if (live[src.first()->value()] ) { |
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3279 if (in_sig_bt[j_arg] == T_FLOAT) { |
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3280 __ movdl(r, src.first()->as_XMMRegister()); |
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3281 } else if (in_sig_bt[j_arg] == T_DOUBLE) { |
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3282 __ movdq(r, src.first()->as_XMMRegister()); |
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3283 } else if (r != src.first()->as_Register()) { |
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3284 if (!useless) { |
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3285 __ movq(r, src.first()->as_Register()); |
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3286 } |
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|
3287 } |
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|
3288 } else { |
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3289 // If the arg is an oop type we don't support don't bother to store |
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3290 // it |
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3291 if (!useless) { |
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3292 if (in_sig_bt[j_arg] == T_DOUBLE || |
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3293 in_sig_bt[j_arg] == T_LONG || |
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3294 in_sig_bt[j_arg] == T_OBJECT ) { |
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3295 __ movq(r, Address(rbp, fp_offset[src.first()->value()])); |
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3296 } else { |
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|
3297 __ movl(r, Address(rbp, fp_offset[src.first()->value()])); |
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3298 } |
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|
3299 } |
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3300 } |
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3301 live[src.first()->value()] = false; |
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3302 } else if (!useless) { |
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3303 // full sized move even for int should be ok |
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3304 __ movq(r, Address(rbp, reg2offset_in(src.first()))); |
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3305 } |
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3306 |
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3307 // At this point r has the original java arg in the final location |
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3308 // (assuming it wasn't useless). If the java arg was an oop |
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3309 // we have a bit more to do |
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3310 |
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3311 if (in_sig_bt[j_arg] == T_ARRAY || in_sig_bt[j_arg] == T_OBJECT ) { |
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3312 if (out_sig_bt[c_arg] == T_INT || out_sig_bt[c_arg] == T_LONG) { |
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3313 // need to unbox a one-word value |
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3314 Label skip; |
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3315 __ testq(r, r); |
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3316 __ jcc(Assembler::equal, skip); |
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3317 BasicType bt = out_sig_bt[c_arg]; |
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3318 int box_offset = java_lang_boxing_object::value_offset_in_bytes(bt); |
116
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3319 Address src1(r, box_offset); |
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3320 if ( bt == T_LONG ) { |
116
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3321 __ movq(r, src1); |
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3322 } else { |
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3323 __ movl(r, src1); |
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3324 } |
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3325 __ bind(skip); |
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3326 |
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3327 } else if (out_sig_bt[c_arg] != T_ADDRESS) { |
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3328 // Convert the arg to NULL |
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3329 __ xorq(r, r); |
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3330 } |
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3331 } |
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3332 |
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3333 // dst can longer be holding an input value |
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3334 live[dst.first()->value()] = false; |
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3335 } |
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3336 if (in_sig_bt[j_arg] == T_OBJECT && out_sig_bt[c_arg] == T_LONG) { |
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3337 assert(out_sig_bt[c_arg+1] == T_VOID, "must be"); |
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3338 ++c_arg; // skip over T_VOID to keep the loop indices in sync |
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3339 } |
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3340 } |
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3341 |
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3342 |
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3343 // Ok now we are done. Need to place the nop that dtrace wants in order to |
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3344 // patch in the trap |
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3345 int patch_offset = ((intptr_t)__ pc()) - start; |
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3346 |
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3347 __ nop(); |
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3348 |
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3349 |
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3350 // Return |
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3351 |
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3352 __ leave(); |
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3353 __ ret(0); |
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3354 |
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3355 __ flush(); |
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3356 |
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3357 nmethod *nm = nmethod::new_dtrace_nmethod( |
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3358 method, masm->code(), vep_offset, patch_offset, frame_complete, |
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3359 stack_slots / VMRegImpl::slots_per_word); |
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3360 return nm; |
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3361 |
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3362 } |
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3363 |
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3364 #endif // HAVE_DTRACE_H |
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3365 |
0 | 3366 // this function returns the adjust size (in number of words) to a c2i adapter |
3367 // activation for use during deoptimization | |
3368 int Deoptimization::last_frame_adjust(int callee_parameters, int callee_locals ) { | |
1506 | 3369 return (callee_locals - callee_parameters) * Interpreter::stackElementWords; |
0 | 3370 } |
3371 | |
3372 | |
3373 uint SharedRuntime::out_preserve_stack_slots() { | |
3374 return 0; | |
3375 } | |
3376 | |
3377 //------------------------------generate_deopt_blob---------------------------- | |
3378 void SharedRuntime::generate_deopt_blob() { | |
3379 // Allocate space for the code | |
3380 ResourceMark rm; | |
3381 // Setup code generation tools | |
3382 CodeBuffer buffer("deopt_blob", 2048, 1024); | |
3383 MacroAssembler* masm = new MacroAssembler(&buffer); | |
3384 int frame_size_in_words; | |
3385 OopMap* map = NULL; | |
3386 OopMapSet *oop_maps = new OopMapSet(); | |
3387 | |
3388 // ------------- | |
3389 // This code enters when returning to a de-optimized nmethod. A return | |
3390 // address has been pushed on the the stack, and return values are in | |
3391 // registers. | |
3392 // If we are doing a normal deopt then we were called from the patched | |
3393 // nmethod from the point we returned to the nmethod. So the return | |
3394 // address on the stack is wrong by NativeCall::instruction_size | |
3395 // We will adjust the value so it looks like we have the original return | |
3396 // address on the stack (like when we eagerly deoptimized). | |
3397 // In the case of an exception pending when deoptimizing, we enter | |
3398 // with a return address on the stack that points after the call we patched | |
3399 // into the exception handler. We have the following register state from, | |
3400 // e.g., the forward exception stub (see stubGenerator_x86_64.cpp). | |
3401 // rax: exception oop | |
3402 // rbx: exception handler | |
3403 // rdx: throwing pc | |
3404 // So in this case we simply jam rdx into the useless return address and | |
3405 // the stack looks just like we want. | |
3406 // | |
3407 // At this point we need to de-opt. We save the argument return | |
3408 // registers. We call the first C routine, fetch_unroll_info(). This | |
3409 // routine captures the return values and returns a structure which | |
3410 // describes the current frame size and the sizes of all replacement frames. | |
3411 // The current frame is compiled code and may contain many inlined | |
3412 // functions, each with their own JVM state. We pop the current frame, then | |
3413 // push all the new frames. Then we call the C routine unpack_frames() to | |
3414 // populate these frames. Finally unpack_frames() returns us the new target | |
3415 // address. Notice that callee-save registers are BLOWN here; they have | |
3416 // already been captured in the vframeArray at the time the return PC was | |
3417 // patched. | |
3418 address start = __ pc(); | |
3419 Label cont; | |
3420 | |
3421 // Prolog for non exception case! | |
3422 | |
3423 // Save everything in sight. | |
3424 map = RegisterSaver::save_live_registers(masm, 0, &frame_size_in_words); | |
3425 | |
3426 // Normal deoptimization. Save exec mode for unpack_frames. | |
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3427 __ movl(r14, Deoptimization::Unpack_deopt); // callee-saved |
0 | 3428 __ jmp(cont); |
304 | 3429 |
3430 int reexecute_offset = __ pc() - start; | |
14124
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3431 #if defined(COMPILERGRAAL) && !defined(COMPILER1) |
9112
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3432 // Graal does not use this kind of deoptimization |
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3433 __ should_not_reach_here(); |
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3434 #endif |
304 | 3435 |
3436 // Reexecute case | |
3437 // return address is the pc describes what bci to do re-execute at | |
3438 | |
3439 // No need to update map as each call to save_live_registers will produce identical oopmap | |
3440 (void) RegisterSaver::save_live_registers(masm, 0, &frame_size_in_words); | |
3441 | |
3442 __ movl(r14, Deoptimization::Unpack_reexecute); // callee-saved | |
3443 __ jmp(cont); | |
3444 | |
9112
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3445 #ifdef GRAAL |
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3446 int implicit_exception_uncommon_trap_offset = __ pc() - start; |
15104 | 3447 |
10409 | 3448 __ pushptr(Address(r15_thread, in_bytes(JavaThread::graal_implicit_exception_pc_offset()))); |
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3449 |
19462
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3450 int uncommon_trap_offset = __ pc() - start; |
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3451 |
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3452 // Save everything in sight. |
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3453 RegisterSaver::save_live_registers(masm, 0, &frame_size_in_words); |
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3454 // fetch_unroll_info needs to call last_java_frame() |
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3455 __ set_last_Java_frame(noreg, noreg, NULL); |
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3456 |
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|
3457 __ movl(c_rarg1, Address(r15_thread, in_bytes(ThreadShadow::pending_deoptimization_offset()))); |
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|
3458 __ movl(Address(r15_thread, in_bytes(ThreadShadow::pending_deoptimization_offset())), -1); |
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3459 |
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|
3460 __ movl(r14, (int32_t)Deoptimization::Unpack_reexecute); |
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|
3461 __ mov(c_rarg0, r15_thread); |
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|
3462 __ call(RuntimeAddress(CAST_FROM_FN_PTR(address, Deoptimization::uncommon_trap))); |
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|
3463 oop_maps->add_gc_map( __ pc()-start, map->deep_copy()); |
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3464 |
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|
3465 __ reset_last_Java_frame(false, false); |
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3466 |
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|
3467 Label after_fetch_unroll_info_call; |
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|
3468 __ jmp(after_fetch_unroll_info_call); |
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3469 #endif // GRAAL |
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3470 |
0 | 3471 int exception_offset = __ pc() - start; |
3472 | |
3473 // Prolog for exception case | |
3474 | |
304 | 3475 // all registers are dead at this entry point, except for rax, and |
3476 // rdx which contain the exception oop and exception pc | |
3477 // respectively. Set them in TLS and fall thru to the | |
3478 // unpack_with_exception_in_tls entry point. | |
3479 | |
3480 __ movptr(Address(r15_thread, JavaThread::exception_pc_offset()), rdx); | |
3481 __ movptr(Address(r15_thread, JavaThread::exception_oop_offset()), rax); | |
3482 | |
3483 int exception_in_tls_offset = __ pc() - start; | |
3484 | |
3485 // new implementation because exception oop is now passed in JavaThread | |
3486 | |
3487 // Prolog for exception case | |
3488 // All registers must be preserved because they might be used by LinearScan | |
3489 // Exceptiop oop and throwing PC are passed in JavaThread | |
3490 // tos: stack at point of call to method that threw the exception (i.e. only | |
3491 // args are on the stack, no return address) | |
3492 | |
3493 // make room on stack for the return address | |
3494 // It will be patched later with the throwing pc. The correct value is not | |
3495 // available now because loading it from memory would destroy registers. | |
3496 __ push(0); | |
0 | 3497 |
3498 // Save everything in sight. | |
3499 map = RegisterSaver::save_live_registers(masm, 0, &frame_size_in_words); | |
3500 | |
304 | 3501 // Now it is safe to overwrite any register |
3502 | |
0 | 3503 // Deopt during an exception. Save exec mode for unpack_frames. |
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diff
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|
3504 __ movl(r14, Deoptimization::Unpack_exception); // callee-saved |
0 | 3505 |
304 | 3506 // load throwing pc from JavaThread and patch it as the return address |
3507 // of the current frame. Then clear the field in JavaThread | |
3508 | |
3509 __ movptr(rdx, Address(r15_thread, JavaThread::exception_pc_offset())); | |
3510 __ movptr(Address(rbp, wordSize), rdx); | |
3511 __ movptr(Address(r15_thread, JavaThread::exception_pc_offset()), (int32_t)NULL_WORD); | |
3512 | |
3513 #ifdef ASSERT | |
3514 // verify that there is really an exception oop in JavaThread | |
3515 __ movptr(rax, Address(r15_thread, JavaThread::exception_oop_offset())); | |
3516 __ verify_oop(rax); | |
3517 | |
3518 // verify that there is no pending exception | |
3519 Label no_pending_exception; | |
3520 __ movptr(rax, Address(r15_thread, Thread::pending_exception_offset())); | |
3521 __ testptr(rax, rax); | |
3522 __ jcc(Assembler::zero, no_pending_exception); | |
3523 __ stop("must not have pending exception here"); | |
3524 __ bind(no_pending_exception); | |
3525 #endif | |
3526 | |
0 | 3527 __ bind(cont); |
3528 | |
3529 // Call C code. Need thread and this frame, but NOT official VM entry | |
3530 // crud. We cannot block on this call, no GC can happen. | |
3531 // | |
3532 // UnrollBlock* fetch_unroll_info(JavaThread* thread) | |
3533 | |
3534 // fetch_unroll_info needs to call last_java_frame(). | |
3535 | |
3536 __ set_last_Java_frame(noreg, noreg, NULL); | |
3537 #ifdef ASSERT | |
3538 { Label L; | |
304 | 3539 __ cmpptr(Address(r15_thread, |
0 | 3540 JavaThread::last_Java_fp_offset()), |
304 | 3541 (int32_t)0); |
0 | 3542 __ jcc(Assembler::equal, L); |
3543 __ stop("SharedRuntime::generate_deopt_blob: last_Java_fp not cleared"); | |
3544 __ bind(L); | |
3545 } | |
3546 #endif // ASSERT | |
304 | 3547 __ mov(c_rarg0, r15_thread); |
0 | 3548 __ call(RuntimeAddress(CAST_FROM_FN_PTR(address, Deoptimization::fetch_unroll_info))); |
3549 | |
3550 // Need to have an oopmap that tells fetch_unroll_info where to | |
3551 // find any register it might need. | |
3552 oop_maps->add_gc_map(__ pc() - start, map); | |
3553 | |
3554 __ reset_last_Java_frame(false, false); | |
3555 | |
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Thomas Wuerthinger <thomas.wuerthinger@oracle.com>
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|
3556 #ifdef GRAAL |
2059
9508a52cbd32
Add deoptimization blob support.
Thomas Wuerthinger <wuerthinger@ssw.jku.at>
parents:
1972
diff
changeset
|
3557 __ bind(after_fetch_unroll_info_call); |
4985
0d2a2797a61f
2 more #ifdef GRAAL
Thomas Wuerthinger <thomas.wuerthinger@oracle.com>
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diff
changeset
|
3558 #endif |
2059
9508a52cbd32
Add deoptimization blob support.
Thomas Wuerthinger <wuerthinger@ssw.jku.at>
parents:
1972
diff
changeset
|
3559 |
0 | 3560 // Load UnrollBlock* into rdi |
304 | 3561 __ mov(rdi, rax); |
3562 | |
3563 Label noException; | |
682
69aefafe69c1
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parents:
628
diff
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|
3564 __ cmpl(r14, Deoptimization::Unpack_exception); // Was exception pending? |
304 | 3565 __ jcc(Assembler::notEqual, noException); |
3566 __ movptr(rax, Address(r15_thread, JavaThread::exception_oop_offset())); | |
3567 // QQQ this is useless it was NULL above | |
3568 __ movptr(rdx, Address(r15_thread, JavaThread::exception_pc_offset())); | |
3569 __ movptr(Address(r15_thread, JavaThread::exception_oop_offset()), (int32_t)NULL_WORD); | |
3570 __ movptr(Address(r15_thread, JavaThread::exception_pc_offset()), (int32_t)NULL_WORD); | |
3571 | |
3572 __ verify_oop(rax); | |
3573 | |
3574 // Overwrite the result registers with the exception results. | |
3575 __ movptr(Address(rsp, RegisterSaver::rax_offset_in_bytes()), rax); | |
3576 // I think this is useless | |
3577 __ movptr(Address(rsp, RegisterSaver::rdx_offset_in_bytes()), rdx); | |
3578 | |
3579 __ bind(noException); | |
0 | 3580 |
3581 // Only register save data is on the stack. | |
3582 // Now restore the result registers. Everything else is either dead | |
3583 // or captured in the vframeArray. | |
3584 RegisterSaver::restore_result_registers(masm); | |
3585 | |
3586 // All of the register save area has been popped of the stack. Only the | |
3587 // return address remains. | |
3588 | |
3589 // Pop all the frames we must move/replace. | |
3590 // | |
3591 // Frame picture (youngest to oldest) | |
3592 // 1: self-frame (no frame link) | |
3593 // 2: deopting frame (no frame link) | |
3594 // 3: caller of deopting frame (could be compiled/interpreted). | |
3595 // | |
3596 // Note: by leaving the return address of self-frame on the stack | |
3597 // and using the size of frame 2 to adjust the stack | |
3598 // when we are done the return to frame 3 will still be on the stack. | |
3599 | |
3600 // Pop deoptimized frame | |
3601 __ movl(rcx, Address(rdi, Deoptimization::UnrollBlock::size_of_deoptimized_frame_offset_in_bytes())); | |
304 | 3602 __ addptr(rsp, rcx); |
0 | 3603 |
3604 // rsp should be pointing at the return address to the caller (3) | |
3605 | |
13384
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3606 // Pick up the initial fp we should save |
fca8f4799229
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|
3607 // restore rbp before stack bang because if stack overflow is thrown it needs to be pushed (and preserved) |
fca8f4799229
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|
3608 __ movptr(rbp, Address(rdi, Deoptimization::UnrollBlock::initial_info_offset_in_bytes())); |
fca8f4799229
8028308: nsk regression, assert(obj->is_oop()) failed: not an oop
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|
3609 |
17980
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8032410: compiler/uncommontrap/TestStackBangRbp.java times out on Solaris-Sparc V9
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|
3610 #ifdef ASSERT |
0bf37f737702
8032410: compiler/uncommontrap/TestStackBangRbp.java times out on Solaris-Sparc V9
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|
3611 // Compilers generate code that bang the stack by as much as the |
0bf37f737702
8032410: compiler/uncommontrap/TestStackBangRbp.java times out on Solaris-Sparc V9
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|
3612 // interpreter would need. So this stack banging should never |
0bf37f737702
8032410: compiler/uncommontrap/TestStackBangRbp.java times out on Solaris-Sparc V9
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|
3613 // trigger a fault. Verify that it does not on non product builds. |
0 | 3614 if (UseStackBanging) { |
3615 __ movl(rbx, Address(rdi, Deoptimization::UnrollBlock::total_frame_sizes_offset_in_bytes())); | |
3616 __ bang_stack_size(rbx, rcx); | |
3617 } | |
17980
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|
3618 #endif |
0 | 3619 |
3620 // Load address of array of frame pcs into rcx | |
304 | 3621 __ movptr(rcx, Address(rdi, Deoptimization::UnrollBlock::frame_pcs_offset_in_bytes())); |
0 | 3622 |
3623 // Trash the old pc | |
304 | 3624 __ addptr(rsp, wordSize); |
0 | 3625 |
3626 // Load address of array of frame sizes into rsi | |
304 | 3627 __ movptr(rsi, Address(rdi, Deoptimization::UnrollBlock::frame_sizes_offset_in_bytes())); |
0 | 3628 |
3629 // Load counter into rdx | |
3630 __ movl(rdx, Address(rdi, Deoptimization::UnrollBlock::number_of_frames_offset_in_bytes())); | |
3631 | |
3632 // Now adjust the caller's stack to make up for the extra locals | |
3633 // but record the original sp so that we can save it in the skeletal interpreter | |
3634 // frame and the stack walking of interpreter_sender will get the unextended sp | |
3635 // value and not the "real" sp value. | |
3636 | |
3637 const Register sender_sp = r8; | |
3638 | |
304 | 3639 __ mov(sender_sp, rsp); |
0 | 3640 __ movl(rbx, Address(rdi, |
3641 Deoptimization::UnrollBlock:: | |
3642 caller_adjustment_offset_in_bytes())); | |
304 | 3643 __ subptr(rsp, rbx); |
0 | 3644 |
3645 // Push interpreter frames in a loop | |
3646 Label loop; | |
3647 __ bind(loop); | |
304 | 3648 __ movptr(rbx, Address(rsi, 0)); // Load frame size |
3649 #ifdef CC_INTERP | |
3650 __ subptr(rbx, 4*wordSize); // we'll push pc and ebp by hand and | |
3651 #ifdef ASSERT | |
3652 __ push(0xDEADDEAD); // Make a recognizable pattern | |
3653 __ push(0xDEADDEAD); | |
3654 #else /* ASSERT */ | |
3655 __ subptr(rsp, 2*wordSize); // skip the "static long no_param" | |
3656 #endif /* ASSERT */ | |
3657 #else | |
3658 __ subptr(rbx, 2*wordSize); // We'll push pc and ebp by hand | |
3659 #endif // CC_INTERP | |
3660 __ pushptr(Address(rcx, 0)); // Save return address | |
0 | 3661 __ enter(); // Save old & set new ebp |
304 | 3662 __ subptr(rsp, rbx); // Prolog |
3663 #ifdef CC_INTERP | |
3664 __ movptr(Address(rbp, | |
3665 -(sizeof(BytecodeInterpreter)) + in_bytes(byte_offset_of(BytecodeInterpreter, _sender_sp))), | |
3666 sender_sp); // Make it walkable | |
3667 #else /* CC_INTERP */ | |
0 | 3668 // This value is corrected by layout_activation_impl |
304 | 3669 __ movptr(Address(rbp, frame::interpreter_frame_last_sp_offset * wordSize), (int32_t)NULL_WORD ); |
3670 __ movptr(Address(rbp, frame::interpreter_frame_sender_sp_offset * wordSize), sender_sp); // Make it walkable | |
3671 #endif /* CC_INTERP */ | |
3672 __ mov(sender_sp, rsp); // Pass sender_sp to next frame | |
3673 __ addptr(rsi, wordSize); // Bump array pointer (sizes) | |
3674 __ addptr(rcx, wordSize); // Bump array pointer (pcs) | |
0 | 3675 __ decrementl(rdx); // Decrement counter |
3676 __ jcc(Assembler::notZero, loop); | |
304 | 3677 __ pushptr(Address(rcx, 0)); // Save final return address |
0 | 3678 |
3679 // Re-push self-frame | |
3680 __ enter(); // Save old & set new ebp | |
3681 | |
3682 // Allocate a full sized register save area. | |
3683 // Return address and rbp are in place, so we allocate two less words. | |
304 | 3684 __ subptr(rsp, (frame_size_in_words - 2) * wordSize); |
0 | 3685 |
3686 // Restore frame locals after moving the frame | |
3687 __ movdbl(Address(rsp, RegisterSaver::xmm0_offset_in_bytes()), xmm0); | |
304 | 3688 __ movptr(Address(rsp, RegisterSaver::rax_offset_in_bytes()), rax); |
0 | 3689 |
3690 // Call C code. Need thread but NOT official VM entry | |
3691 // crud. We cannot block on this call, no GC can happen. Call should | |
3692 // restore return values to their stack-slots with the new SP. | |
3693 // | |
3694 // void Deoptimization::unpack_frames(JavaThread* thread, int exec_mode) | |
3695 | |
3696 // Use rbp because the frames look interpreted now | |
4057
1feb272af3a7
6636110: unaligned stackpointer leads to crash during deoptimization
never
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3931
diff
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|
3697 // Save "the_pc" since it cannot easily be retrieved using the last_java_SP after we aligned SP. |
1feb272af3a7
6636110: unaligned stackpointer leads to crash during deoptimization
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parents:
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diff
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|
3698 // Don't need the precise return PC here, just precise enough to point into this code blob. |
1feb272af3a7
6636110: unaligned stackpointer leads to crash during deoptimization
never
parents:
3931
diff
changeset
|
3699 address the_pc = __ pc(); |
1feb272af3a7
6636110: unaligned stackpointer leads to crash during deoptimization
never
parents:
3931
diff
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|
3700 __ set_last_Java_frame(noreg, rbp, the_pc); |
1feb272af3a7
6636110: unaligned stackpointer leads to crash during deoptimization
never
parents:
3931
diff
changeset
|
3701 |
1feb272af3a7
6636110: unaligned stackpointer leads to crash during deoptimization
never
parents:
3931
diff
changeset
|
3702 __ andptr(rsp, -(StackAlignmentInBytes)); // Fix stack alignment as required by ABI |
304 | 3703 __ mov(c_rarg0, r15_thread); |
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0
diff
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|
3704 __ movl(c_rarg1, r14); // second arg: exec_mode |
0 | 3705 __ call(RuntimeAddress(CAST_FROM_FN_PTR(address, Deoptimization::unpack_frames))); |
4057
1feb272af3a7
6636110: unaligned stackpointer leads to crash during deoptimization
never
parents:
3931
diff
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|
3706 // Revert SP alignment after call since we're going to do some SP relative addressing below |
1feb272af3a7
6636110: unaligned stackpointer leads to crash during deoptimization
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parents:
3931
diff
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|
3707 __ movptr(rsp, Address(r15_thread, JavaThread::last_Java_sp_offset())); |
0 | 3708 |
3709 // Set an oopmap for the call site | |
4057
1feb272af3a7
6636110: unaligned stackpointer leads to crash during deoptimization
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parents:
3931
diff
changeset
|
3710 // Use the same PC we used for the last java frame |
1feb272af3a7
6636110: unaligned stackpointer leads to crash during deoptimization
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parents:
3931
diff
changeset
|
3711 oop_maps->add_gc_map(the_pc - start, |
0 | 3712 new OopMap( frame_size_in_words, 0 )); |
3713 | |
4057
1feb272af3a7
6636110: unaligned stackpointer leads to crash during deoptimization
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parents:
3931
diff
changeset
|
3714 // Clear fp AND pc |
1feb272af3a7
6636110: unaligned stackpointer leads to crash during deoptimization
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changeset
|
3715 __ reset_last_Java_frame(true, true); |
0 | 3716 |
3717 // Collect return values | |
3718 __ movdbl(xmm0, Address(rsp, RegisterSaver::xmm0_offset_in_bytes())); | |
304 | 3719 __ movptr(rax, Address(rsp, RegisterSaver::rax_offset_in_bytes())); |
3720 // I think this is useless (throwing pc?) | |
3721 __ movptr(rdx, Address(rsp, RegisterSaver::rdx_offset_in_bytes())); | |
0 | 3722 |
3723 // Pop self-frame. | |
3724 __ leave(); // Epilog | |
3725 | |
3726 // Jump to interpreter | |
3727 __ ret(0); | |
3728 | |
3729 // Make sure all code is generated | |
3730 masm->flush(); | |
3731 | |
304 | 3732 _deopt_blob = DeoptimizationBlob::create(&buffer, oop_maps, 0, exception_offset, reexecute_offset, frame_size_in_words); |
3733 _deopt_blob->set_unpack_with_exception_in_tls_offset(exception_in_tls_offset); | |
4985
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Thomas Wuerthinger <thomas.wuerthinger@oracle.com>
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|
3734 #ifdef GRAAL |
19462
33a783b15758
made use of Graal stubs instead of equivalent HotSpot stubs optional and off by default
Doug Simon <doug.simon@oracle.com>
parents:
18041
diff
changeset
|
3735 _deopt_blob->set_uncommon_trap_offset(uncommon_trap_offset); |
5111
422c979ff392
fixed two cases where DeoptAction was invalid
Christian Haeubl <christian.haeubl@oracle.com>
parents:
5109
diff
changeset
|
3736 _deopt_blob->set_implicit_exception_uncommon_trap_offset(implicit_exception_uncommon_trap_offset); |
4985
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Thomas Wuerthinger <thomas.wuerthinger@oracle.com>
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|
3737 #endif |
0 | 3738 } |
3739 | |
3740 #ifdef COMPILER2 | |
3741 //------------------------------generate_uncommon_trap_blob-------------------- | |
3742 void SharedRuntime::generate_uncommon_trap_blob() { | |
3743 // Allocate space for the code | |
3744 ResourceMark rm; | |
3745 // Setup code generation tools | |
3746 CodeBuffer buffer("uncommon_trap_blob", 2048, 1024); | |
3747 MacroAssembler* masm = new MacroAssembler(&buffer); | |
3748 | |
3749 assert(SimpleRuntimeFrame::framesize % 4 == 0, "sp not 16-byte aligned"); | |
3750 | |
3751 address start = __ pc(); | |
3752 | |
17780 | 3753 if (UseRTMLocking) { |
3754 // Abort RTM transaction before possible nmethod deoptimization. | |
3755 __ xabort(0); | |
3756 } | |
3757 | |
0 | 3758 // Push self-frame. We get here with a return address on the |
3759 // stack, so rsp is 8-byte aligned until we allocate our frame. | |
304 | 3760 __ subptr(rsp, SimpleRuntimeFrame::return_off << LogBytesPerInt); // Epilog! |
0 | 3761 |
3762 // No callee saved registers. rbp is assumed implicitly saved | |
304 | 3763 __ movptr(Address(rsp, SimpleRuntimeFrame::rbp_off << LogBytesPerInt), rbp); |
0 | 3764 |
3765 // compiler left unloaded_class_index in j_rarg0 move to where the | |
3766 // runtime expects it. | |
3767 __ movl(c_rarg1, j_rarg0); | |
3768 | |
3769 __ set_last_Java_frame(noreg, noreg, NULL); | |
3770 | |
3771 // Call C code. Need thread but NOT official VM entry | |
3772 // crud. We cannot block on this call, no GC can happen. Call should | |
3773 // capture callee-saved registers as well as return values. | |
3774 // Thread is in rdi already. | |
3775 // | |
3776 // UnrollBlock* uncommon_trap(JavaThread* thread, jint unloaded_class_index); | |
3777 | |
304 | 3778 __ mov(c_rarg0, r15_thread); |
0 | 3779 __ call(RuntimeAddress(CAST_FROM_FN_PTR(address, Deoptimization::uncommon_trap))); |
3780 | |
3781 // Set an oopmap for the call site | |
3782 OopMapSet* oop_maps = new OopMapSet(); | |
3783 OopMap* map = new OopMap(SimpleRuntimeFrame::framesize, 0); | |
3784 | |
3785 // location of rbp is known implicitly by the frame sender code | |
3786 | |
3787 oop_maps->add_gc_map(__ pc() - start, map); | |
3788 | |
3789 __ reset_last_Java_frame(false, false); | |
3790 | |
3791 // Load UnrollBlock* into rdi | |
304 | 3792 __ mov(rdi, rax); |
0 | 3793 |
3794 // Pop all the frames we must move/replace. | |
3795 // | |
3796 // Frame picture (youngest to oldest) | |
3797 // 1: self-frame (no frame link) | |
3798 // 2: deopting frame (no frame link) | |
3799 // 3: caller of deopting frame (could be compiled/interpreted). | |
3800 | |
3801 // Pop self-frame. We have no frame, and must rely only on rax and rsp. | |
304 | 3802 __ addptr(rsp, (SimpleRuntimeFrame::framesize - 2) << LogBytesPerInt); // Epilog! |
0 | 3803 |
3804 // Pop deoptimized frame (int) | |
3805 __ movl(rcx, Address(rdi, | |
3806 Deoptimization::UnrollBlock:: | |
3807 size_of_deoptimized_frame_offset_in_bytes())); | |
304 | 3808 __ addptr(rsp, rcx); |
0 | 3809 |
3810 // rsp should be pointing at the return address to the caller (3) | |
3811 | |
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|
3812 // Pick up the initial fp we should save |
fca8f4799229
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|
3813 // restore rbp before stack bang because if stack overflow is thrown it needs to be pushed (and preserved) |
fca8f4799229
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diff
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|
3814 __ movptr(rbp, Address(rdi, Deoptimization::UnrollBlock::initial_info_offset_in_bytes())); |
fca8f4799229
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|
3815 |
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0bf37f737702
8032410: compiler/uncommontrap/TestStackBangRbp.java times out on Solaris-Sparc V9
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|
3816 #ifdef ASSERT |
0bf37f737702
8032410: compiler/uncommontrap/TestStackBangRbp.java times out on Solaris-Sparc V9
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diff
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|
3817 // Compilers generate code that bang the stack by as much as the |
0bf37f737702
8032410: compiler/uncommontrap/TestStackBangRbp.java times out on Solaris-Sparc V9
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17850
diff
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|
3818 // interpreter would need. So this stack banging should never |
0bf37f737702
8032410: compiler/uncommontrap/TestStackBangRbp.java times out on Solaris-Sparc V9
roland
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|
3819 // trigger a fault. Verify that it does not on non product builds. |
0 | 3820 if (UseStackBanging) { |
3821 __ movl(rbx, Address(rdi ,Deoptimization::UnrollBlock::total_frame_sizes_offset_in_bytes())); | |
3822 __ bang_stack_size(rbx, rcx); | |
3823 } | |
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diff
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|
3824 #endif |
0 | 3825 |
3826 // Load address of array of frame pcs into rcx (address*) | |
13384
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|
3827 __ movptr(rcx, Address(rdi, Deoptimization::UnrollBlock::frame_pcs_offset_in_bytes())); |
0 | 3828 |
3829 // Trash the return pc | |
304 | 3830 __ addptr(rsp, wordSize); |
0 | 3831 |
3832 // Load address of array of frame sizes into rsi (intptr_t*) | |
13384
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3833 __ movptr(rsi, Address(rdi, Deoptimization::UnrollBlock:: frame_sizes_offset_in_bytes())); |
0 | 3834 |
3835 // Counter | |
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|
3836 __ movl(rdx, Address(rdi, Deoptimization::UnrollBlock:: number_of_frames_offset_in_bytes())); // (int) |
0 | 3837 |
3838 // Now adjust the caller's stack to make up for the extra locals but | |
3839 // record the original sp so that we can save it in the skeletal | |
3840 // interpreter frame and the stack walking of interpreter_sender | |
3841 // will get the unextended sp value and not the "real" sp value. | |
3842 | |
3843 const Register sender_sp = r8; | |
3844 | |
304 | 3845 __ mov(sender_sp, rsp); |
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3846 __ movl(rbx, Address(rdi, Deoptimization::UnrollBlock:: caller_adjustment_offset_in_bytes())); // (int) |
304 | 3847 __ subptr(rsp, rbx); |
0 | 3848 |
3849 // Push interpreter frames in a loop | |
3850 Label loop; | |
3851 __ bind(loop); | |
304 | 3852 __ movptr(rbx, Address(rsi, 0)); // Load frame size |
3853 __ subptr(rbx, 2 * wordSize); // We'll push pc and rbp by hand | |
3854 __ pushptr(Address(rcx, 0)); // Save return address | |
3855 __ enter(); // Save old & set new rbp | |
3856 __ subptr(rsp, rbx); // Prolog | |
520
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3857 #ifdef CC_INTERP |
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3858 __ movptr(Address(rbp, |
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3859 -(sizeof(BytecodeInterpreter)) + in_bytes(byte_offset_of(BytecodeInterpreter, _sender_sp))), |
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3860 sender_sp); // Make it walkable |
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3861 #else // CC_INTERP |
304 | 3862 __ movptr(Address(rbp, frame::interpreter_frame_sender_sp_offset * wordSize), |
3863 sender_sp); // Make it walkable | |
0 | 3864 // This value is corrected by layout_activation_impl |
304 | 3865 __ movptr(Address(rbp, frame::interpreter_frame_last_sp_offset * wordSize), (int32_t)NULL_WORD ); |
520
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3866 #endif // CC_INTERP |
304 | 3867 __ mov(sender_sp, rsp); // Pass sender_sp to next frame |
3868 __ addptr(rsi, wordSize); // Bump array pointer (sizes) | |
3869 __ addptr(rcx, wordSize); // Bump array pointer (pcs) | |
3870 __ decrementl(rdx); // Decrement counter | |
0 | 3871 __ jcc(Assembler::notZero, loop); |
304 | 3872 __ pushptr(Address(rcx, 0)); // Save final return address |
0 | 3873 |
3874 // Re-push self-frame | |
3875 __ enter(); // Save old & set new rbp | |
304 | 3876 __ subptr(rsp, (SimpleRuntimeFrame::framesize - 4) << LogBytesPerInt); |
0 | 3877 // Prolog |
3878 | |
3879 // Use rbp because the frames look interpreted now | |
4057
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3880 // Save "the_pc" since it cannot easily be retrieved using the last_java_SP after we aligned SP. |
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3881 // Don't need the precise return PC here, just precise enough to point into this code blob. |
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3882 address the_pc = __ pc(); |
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|
3883 __ set_last_Java_frame(noreg, rbp, the_pc); |
0 | 3884 |
3885 // Call C code. Need thread but NOT official VM entry | |
3886 // crud. We cannot block on this call, no GC can happen. Call should | |
3887 // restore return values to their stack-slots with the new SP. | |
3888 // Thread is in rdi already. | |
3889 // | |
3890 // BasicType unpack_frames(JavaThread* thread, int exec_mode); | |
3891 | |
4057
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6636110: unaligned stackpointer leads to crash during deoptimization
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|
3892 __ andptr(rsp, -(StackAlignmentInBytes)); // Align SP as required by ABI |
304 | 3893 __ mov(c_rarg0, r15_thread); |
0 | 3894 __ movl(c_rarg1, Deoptimization::Unpack_uncommon_trap); |
3895 __ call(RuntimeAddress(CAST_FROM_FN_PTR(address, Deoptimization::unpack_frames))); | |
3896 | |
3897 // Set an oopmap for the call site | |
4057
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|
3898 // Use the same PC we used for the last java frame |
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|
3899 oop_maps->add_gc_map(the_pc - start, new OopMap(SimpleRuntimeFrame::framesize, 0)); |
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|
3900 |
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|
3901 // Clear fp AND pc |
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|
3902 __ reset_last_Java_frame(true, true); |
0 | 3903 |
3904 // Pop self-frame. | |
3905 __ leave(); // Epilog | |
3906 | |
3907 // Jump to interpreter | |
3908 __ ret(0); | |
3909 | |
3910 // Make sure all code is generated | |
3911 masm->flush(); | |
3912 | |
3913 _uncommon_trap_blob = UncommonTrapBlob::create(&buffer, oop_maps, | |
3914 SimpleRuntimeFrame::framesize >> 1); | |
3915 } | |
3916 #endif // COMPILER2 | |
3917 | |
3918 | |
3919 //------------------------------generate_handler_blob------ | |
3920 // | |
3921 // Generate a special Compile2Runtime blob that saves all registers, | |
3922 // and setup oopmap. | |
3923 // | |
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3924 SafepointBlob* SharedRuntime::generate_handler_blob(address call_ptr, int poll_type) { |
0 | 3925 assert(StubRoutines::forward_exception_entry() != NULL, |
3926 "must be generated before"); | |
3927 | |
3928 ResourceMark rm; | |
3929 OopMapSet *oop_maps = new OopMapSet(); | |
3930 OopMap* map; | |
3931 | |
3932 // Allocate space for the code. Setup code generation tools. | |
3933 CodeBuffer buffer("handler_blob", 2048, 1024); | |
3934 MacroAssembler* masm = new MacroAssembler(&buffer); | |
3935 | |
3936 address start = __ pc(); | |
3937 address call_pc = NULL; | |
3938 int frame_size_in_words; | |
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3939 bool cause_return = (poll_type == POLL_AT_RETURN); |
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|
3940 bool save_vectors = (poll_type == POLL_AT_VECTOR_LOOP); |
0 | 3941 |
17780 | 3942 if (UseRTMLocking) { |
3943 // Abort RTM transaction before calling runtime | |
3944 // because critical section will be large and will be | |
3945 // aborted anyway. Also nmethod could be deoptimized. | |
3946 __ xabort(0); | |
3947 } | |
3948 | |
0 | 3949 // Make room for return address (or push it again) |
3950 if (!cause_return) { | |
304 | 3951 __ push(rbx); |
0 | 3952 } |
3953 | |
3954 // Save registers, fpu state, and flags | |
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|
3955 map = RegisterSaver::save_live_registers(masm, 0, &frame_size_in_words, save_vectors); |
0 | 3956 |
3957 // The following is basically a call_VM. However, we need the precise | |
3958 // address of the call in order to generate an oopmap. Hence, we do all the | |
3959 // work outselves. | |
3960 | |
3961 __ set_last_Java_frame(noreg, noreg, NULL); | |
3962 | |
3963 // The return address must always be correct so that frame constructor never | |
3964 // sees an invalid pc. | |
3965 | |
3966 if (!cause_return) { | |
3967 // overwrite the dummy value we pushed on entry | |
304 | 3968 __ movptr(c_rarg0, Address(r15_thread, JavaThread::saved_exception_pc_offset())); |
3969 __ movptr(Address(rbp, wordSize), c_rarg0); | |
0 | 3970 } |
3971 | |
3972 // Do the call | |
304 | 3973 __ mov(c_rarg0, r15_thread); |
0 | 3974 __ call(RuntimeAddress(call_ptr)); |
3975 | |
3976 // Set an oopmap for the call site. This oopmap will map all | |
3977 // oop-registers and debug-info registers as callee-saved. This | |
3978 // will allow deoptimization at this safepoint to find all possible | |
3979 // debug-info recordings, as well as let GC find all oops. | |
3980 | |
3981 oop_maps->add_gc_map( __ pc() - start, map); | |
3982 | |
3983 Label noException; | |
3984 | |
3985 __ reset_last_Java_frame(false, false); | |
3986 | |
304 | 3987 __ cmpptr(Address(r15_thread, Thread::pending_exception_offset()), (int32_t)NULL_WORD); |
0 | 3988 __ jcc(Assembler::equal, noException); |
3989 | |
3990 // Exception pending | |
3991 | |
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|
3992 RegisterSaver::restore_live_registers(masm, save_vectors); |
0 | 3993 |
3994 __ jump(RuntimeAddress(StubRoutines::forward_exception_entry())); | |
3995 | |
3996 // No exception case | |
3997 __ bind(noException); | |
3998 | |
3999 // Normal exit, restore registers and exit. | |
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|
4000 RegisterSaver::restore_live_registers(masm, save_vectors); |
0 | 4001 |
4002 __ ret(0); | |
4003 | |
4004 // Make sure all code is generated | |
4005 masm->flush(); | |
4006 | |
4007 // Fill-out other meta info | |
4008 return SafepointBlob::create(&buffer, oop_maps, frame_size_in_words); | |
4009 } | |
4010 | |
4011 // | |
4012 // generate_resolve_blob - call resolution (static/virtual/opt-virtual/ic-miss | |
4013 // | |
4014 // Generate a stub that calls into vm to find out the proper destination | |
4015 // of a java call. All the argument registers are live at this point | |
4016 // but since this is generic code we don't know what they are and the caller | |
4017 // must do any gc of the args. | |
4018 // | |
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7045514: SPARC assembly code for JSR 292 ricochet frames
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|
4019 RuntimeStub* SharedRuntime::generate_resolve_blob(address destination, const char* name) { |
0 | 4020 assert (StubRoutines::forward_exception_entry() != NULL, "must be generated before"); |
4021 | |
4022 // allocate space for the code | |
4023 ResourceMark rm; | |
4024 | |
4025 CodeBuffer buffer(name, 1000, 512); | |
4026 MacroAssembler* masm = new MacroAssembler(&buffer); | |
4027 | |
4028 int frame_size_in_words; | |
4029 | |
4030 OopMapSet *oop_maps = new OopMapSet(); | |
4031 OopMap* map = NULL; | |
4032 | |
4033 int start = __ offset(); | |
4034 | |
4035 map = RegisterSaver::save_live_registers(masm, 0, &frame_size_in_words); | |
4036 | |
4037 int frame_complete = __ offset(); | |
4038 | |
4039 __ set_last_Java_frame(noreg, noreg, NULL); | |
4040 | |
304 | 4041 __ mov(c_rarg0, r15_thread); |
0 | 4042 |
4043 __ call(RuntimeAddress(destination)); | |
4044 | |
4045 | |
4046 // Set an oopmap for the call site. | |
4047 // We need this not only for callee-saved registers, but also for volatile | |
4048 // registers that the compiler might be keeping live across a safepoint. | |
4049 | |
4050 oop_maps->add_gc_map( __ offset() - start, map); | |
4051 | |
4052 // rax contains the address we are going to jump to assuming no exception got installed | |
4053 | |
4054 // clear last_Java_sp | |
4055 __ reset_last_Java_frame(false, false); | |
4056 // check for pending exceptions | |
4057 Label pending; | |
304 | 4058 __ cmpptr(Address(r15_thread, Thread::pending_exception_offset()), (int32_t)NULL_WORD); |
0 | 4059 __ jcc(Assembler::notEqual, pending); |
4060 | |
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4061 // get the returned Method* |
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4062 __ get_vm_result_2(rbx, r15_thread); |
304 | 4063 __ movptr(Address(rsp, RegisterSaver::rbx_offset_in_bytes()), rbx); |
4064 | |
4065 __ movptr(Address(rsp, RegisterSaver::rax_offset_in_bytes()), rax); | |
0 | 4066 |
4067 RegisterSaver::restore_live_registers(masm); | |
4068 | |
4069 // We are back the the original state on entry and ready to go. | |
4070 | |
4071 __ jmp(rax); | |
4072 | |
4073 // Pending exception after the safepoint | |
4074 | |
4075 __ bind(pending); | |
4076 | |
4077 RegisterSaver::restore_live_registers(masm); | |
4078 | |
4079 // exception pending => remove activation and forward to exception handler | |
4080 | |
4081 __ movptr(Address(r15_thread, JavaThread::vm_result_offset()), (int)NULL_WORD); | |
4082 | |
304 | 4083 __ movptr(rax, Address(r15_thread, Thread::pending_exception_offset())); |
0 | 4084 __ jump(RuntimeAddress(StubRoutines::forward_exception_entry())); |
4085 | |
4086 // ------------- | |
4087 // make sure all code is generated | |
4088 masm->flush(); | |
4089 | |
4090 // return the blob | |
4091 // frame_size_words or bytes?? | |
4092 return RuntimeStub::new_runtime_stub(name, &buffer, frame_complete, frame_size_in_words, oop_maps, true); | |
4093 } | |
4094 | |
4095 | |
4096 #ifdef COMPILER2 | |
4097 // This is here instead of runtime_x86_64.cpp because it uses SimpleRuntimeFrame | |
4098 // | |
4099 //------------------------------generate_exception_blob--------------------------- | |
4100 // creates exception blob at the end | |
4101 // Using exception blob, this code is jumped from a compiled method. | |
4102 // (see emit_exception_handler in x86_64.ad file) | |
4103 // | |
4104 // Given an exception pc at a call we call into the runtime for the | |
4105 // handler in this method. This handler might merely restore state | |
4106 // (i.e. callee save registers) unwind the frame and jump to the | |
4107 // exception handler for the nmethod if there is no Java level handler | |
4108 // for the nmethod. | |
4109 // | |
4110 // This code is entered with a jmp. | |
4111 // | |
4112 // Arguments: | |
4113 // rax: exception oop | |
4114 // rdx: exception pc | |
4115 // | |
4116 // Results: | |
4117 // rax: exception oop | |
4118 // rdx: exception pc in caller or ??? | |
4119 // destination: exception handler of caller | |
4120 // | |
4121 // Note: the exception pc MUST be at a call (precise debug information) | |
4122 // Registers rax, rdx, rcx, rsi, rdi, r8-r11 are not callee saved. | |
4123 // | |
4124 | |
4125 void OptoRuntime::generate_exception_blob() { | |
4126 assert(!OptoRuntime::is_callee_saved_register(RDX_num), ""); | |
4127 assert(!OptoRuntime::is_callee_saved_register(RAX_num), ""); | |
4128 assert(!OptoRuntime::is_callee_saved_register(RCX_num), ""); | |
4129 | |
4130 assert(SimpleRuntimeFrame::framesize % 4 == 0, "sp not 16-byte aligned"); | |
4131 | |
4132 // Allocate space for the code | |
4133 ResourceMark rm; | |
4134 // Setup code generation tools | |
4135 CodeBuffer buffer("exception_blob", 2048, 1024); | |
4136 MacroAssembler* masm = new MacroAssembler(&buffer); | |
4137 | |
4138 | |
4139 address start = __ pc(); | |
4140 | |
4141 // Exception pc is 'return address' for stack walker | |
304 | 4142 __ push(rdx); |
4143 __ subptr(rsp, SimpleRuntimeFrame::return_off << LogBytesPerInt); // Prolog | |
0 | 4144 |
4145 // Save callee-saved registers. See x86_64.ad. | |
4146 | |
4147 // rbp is an implicitly saved callee saved register (i.e. the calling | |
4148 // convention will save restore it in prolog/epilog) Other than that | |
4149 // there are no callee save registers now that adapter frames are gone. | |
4150 | |
304 | 4151 __ movptr(Address(rsp, SimpleRuntimeFrame::rbp_off << LogBytesPerInt), rbp); |
0 | 4152 |
4153 // Store exception in Thread object. We cannot pass any arguments to the | |
4154 // handle_exception call, since we do not want to make any assumption | |
4155 // about the size of the frame where the exception happened in. | |
4156 // c_rarg0 is either rdi (Linux) or rcx (Windows). | |
304 | 4157 __ movptr(Address(r15_thread, JavaThread::exception_oop_offset()),rax); |
4158 __ movptr(Address(r15_thread, JavaThread::exception_pc_offset()), rdx); | |
0 | 4159 |
4160 // This call does all the hard work. It checks if an exception handler | |
4161 // exists in the method. | |
4162 // If so, it returns the handler address. | |
4163 // If not, it prepares for stack-unwinding, restoring the callee-save | |
4164 // registers of the frame being removed. | |
4165 // | |
4166 // address OptoRuntime::handle_exception_C(JavaThread* thread) | |
4167 | |
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4168 // At a method handle call, the stack may not be properly aligned |
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7148486: At a method handle call returning with an exception may call the runtime with misaligned stack (x64)
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4169 // when returning with an exception. |
bf7796b7367a
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4170 address the_pc = __ pc(); |
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4171 __ set_last_Java_frame(noreg, noreg, the_pc); |
304 | 4172 __ mov(c_rarg0, r15_thread); |
5904
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4173 __ andptr(rsp, -(StackAlignmentInBytes)); // Align stack |
0 | 4174 __ call(RuntimeAddress(CAST_FROM_FN_PTR(address, OptoRuntime::handle_exception_C))); |
4175 | |
4176 // Set an oopmap for the call site. This oopmap will only be used if we | |
4177 // are unwinding the stack. Hence, all locations will be dead. | |
4178 // Callee-saved registers will be the same as the frame above (i.e., | |
4179 // handle_exception_stub), since they were restored when we got the | |
4180 // exception. | |
4181 | |
4182 OopMapSet* oop_maps = new OopMapSet(); | |
4183 | |
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4184 oop_maps->add_gc_map(the_pc - start, new OopMap(SimpleRuntimeFrame::framesize, 0)); |
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4185 |
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|
4186 __ reset_last_Java_frame(false, true); |
0 | 4187 |
4188 // Restore callee-saved registers | |
4189 | |
4190 // rbp is an implicitly saved callee saved register (i.e. the calling | |
4191 // convention will save restore it in prolog/epilog) Other than that | |
4192 // there are no callee save registers no that adapter frames are gone. | |
4193 | |
304 | 4194 __ movptr(rbp, Address(rsp, SimpleRuntimeFrame::rbp_off << LogBytesPerInt)); |
4195 | |
4196 __ addptr(rsp, SimpleRuntimeFrame::return_off << LogBytesPerInt); // Epilog | |
4197 __ pop(rdx); // No need for exception pc anymore | |
0 | 4198 |
4199 // rax: exception handler | |
4200 | |
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93767e6a2dfd
6941529: SharedRuntime::raw_exception_handler_for_return_address must reset thread MethodHandle flag
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4201 // Restore SP from BP if the exception PC is a MethodHandle call site. |
93767e6a2dfd
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twisti
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|
4202 __ cmpl(Address(r15_thread, JavaThread::is_method_handle_return_offset()), 0); |
1567 | 4203 __ cmovptr(Assembler::notEqual, rsp, rbp_mh_SP_save); |
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|
4204 |
0 | 4205 // We have a handler in rax (could be deopt blob). |
304 | 4206 __ mov(r8, rax); |
0 | 4207 |
4208 // Get the exception oop | |
304 | 4209 __ movptr(rax, Address(r15_thread, JavaThread::exception_oop_offset())); |
0 | 4210 // Get the exception pc in case we are deoptimized |
304 | 4211 __ movptr(rdx, Address(r15_thread, JavaThread::exception_pc_offset())); |
0 | 4212 #ifdef ASSERT |
4213 __ movptr(Address(r15_thread, JavaThread::exception_handler_pc_offset()), (int)NULL_WORD); | |
4214 __ movptr(Address(r15_thread, JavaThread::exception_pc_offset()), (int)NULL_WORD); | |
4215 #endif | |
4216 // Clear the exception oop so GC no longer processes it as a root. | |
4217 __ movptr(Address(r15_thread, JavaThread::exception_oop_offset()), (int)NULL_WORD); | |
4218 | |
4219 // rax: exception oop | |
4220 // r8: exception handler | |
4221 // rdx: exception pc | |
4222 // Jump to handler | |
4223 | |
4224 __ jmp(r8); | |
4225 | |
4226 // Make sure all code is generated | |
4227 masm->flush(); | |
4228 | |
4229 // Set exception blob | |
4230 _exception_blob = ExceptionBlob::create(&buffer, oop_maps, SimpleRuntimeFrame::framesize >> 1); | |
4231 } | |
4232 #endif // COMPILER2 |