annotate graal/com.oracle.graal.asm.sparc/src/com/oracle/graal/asm/sparc/SPARCMacroAssembler.java @ 10792:7a8d6ba83a04

SPARC: fixes and more stuff works
author twisti
date Tue, 16 Jul 2013 17:41:21 -0700
parents 31266ceb86ef
children e1fcdda22831
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1 /*
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2 * Copyright (c) 2013, Oracle and/or its affiliates. All rights reserved.
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3 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
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4 *
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5 * This code is free software; you can redistribute it and/or modify it
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6 * under the terms of the GNU General Public License version 2 only, as
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7 * published by the Free Software Foundation.
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8 *
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9 * This code is distributed in the hope that it will be useful, but WITHOUT
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10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
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12 * version 2 for more details (a copy is included in the LICENSE file that
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13 * accompanied this code).
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14 *
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15 * You should have received a copy of the GNU General Public License version
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16 * 2 along with this work; if not, write to the Free Software Foundation,
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17 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
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18 *
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19 * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
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20 * or visit www.oracle.com if you need additional information or have any
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21 * questions.
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22 */
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23 package com.oracle.graal.asm.sparc;
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24
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25 import static com.oracle.graal.asm.sparc.SPARCAssembler.CC.*;
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26 import static com.oracle.graal.sparc.SPARC.*;
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27
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28 import com.oracle.graal.api.code.*;
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29 import com.oracle.graal.asm.*;
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30
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31 public class SPARCMacroAssembler extends SPARCAssembler {
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32
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33 /**
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34 * A sentinel value used as a place holder in an instruction stream for an address that will be
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35 * patched.
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36 */
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37 private static final SPARCAddress Placeholder = new SPARCAddress(g0, 0);
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38
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39 public SPARCMacroAssembler(TargetDescription target, RegisterConfig registerConfig) {
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40 super(target, registerConfig);
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41 }
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42
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43 @Override
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44 public void align(int modulus) {
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45 if (codeBuffer.position() % modulus != 0) {
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46 final int count = modulus - (codeBuffer.position() % modulus);
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47 for (int i = 0; i < count; i++) {
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48 new Nop().emit(this);
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49 }
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50 }
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51 }
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52
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53 @Override
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54 public void jmp(Label l) {
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55 new Bpa(l).emit(this);
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56 new Nop().emit(this);
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57 }
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58
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59 @Override
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60 protected final void patchJumpTarget(int branch, int branchTarget) {
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61 final int disp = branchTarget - branch;
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62 Fmt00c fmt = Fmt00c.read(this, branch);
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63 fmt.setDisp19(disp);
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64 fmt.write(this, branch);
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65 }
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66
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67 @Override
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68 public AbstractAddress makeAddress(Register base, int displacement) {
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69 return new SPARCAddress(base, displacement);
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70 }
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71
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72 @Override
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73 public AbstractAddress getPlaceholder() {
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74 return Placeholder;
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75 }
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76
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77 public static class Bclr extends Andn {
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78
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79 public Bclr(Register src, Register dst) {
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80 super(dst, src, dst);
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81 }
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82
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83 public Bclr(int simm13, Register dst) {
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84 super(dst, simm13, dst);
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85 }
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86 }
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87
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88 public static class Bpgeu extends Bpcc {
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89
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90 public Bpgeu(CC cc, int simm19) {
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91 super(cc, simm19);
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92 }
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93
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94 public Bpgeu(CC cc, Label label) {
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95 super(cc, label);
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96 }
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97 }
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98
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99 public static class Bset extends Or {
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100
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101 public Bset(Register src, Register dst) {
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102 super(dst, src, dst);
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103 }
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104
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105 public Bset(int simm13, Register dst) {
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106 super(dst, simm13, dst);
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107 }
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108 }
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109
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110 public static class Btst extends Andcc {
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111
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112 public Btst(Register src1, Register src2) {
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113 super(src1, src2, g0);
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114 }
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115
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116 public Btst(Register src1, int simm13) {
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117 super(src1, simm13, g0);
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118 }
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119 }
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120
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121 public static class Cas extends Casa {
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122
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123 public Cas(Register src1, Register src2, Register dst) {
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124 super(src1, src2, dst, Asi.ASI_PRIMARY);
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125 }
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126 }
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127
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128 public static class Casx extends Casxa {
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129
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130 public Casx(Register src1, Register src2, Register dst) {
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131 super(src1, src2, dst, Asi.ASI_PRIMARY);
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132 }
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133 }
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134
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135 public static class Clr extends Or {
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136
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137 public Clr(Register dst) {
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138 super(g0, g0, dst);
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139 }
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140 }
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141
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142 public static class Clrb extends Stb {
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143
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144 public Clrb(SPARCAddress addr) {
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145 super(g0, addr);
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146 }
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147 }
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148
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149 public static class Clrh extends Sth {
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150
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151 public Clrh(SPARCAddress addr) {
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152 super(g0, addr);
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153 }
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154 }
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155
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156 public static class Clrx extends Stx {
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157
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158 public Clrx(SPARCAddress addr) {
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159 super(g0, addr);
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160 }
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161 }
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162
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163 public static class Clruw extends Srl {
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164
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165 public Clruw(Register src1, Register dst) {
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166 super(src1, g0, dst);
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167 assert src1.encoding() != dst.encoding();
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168 }
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169
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170 public Clruw(Register dst) {
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171 super(dst, g0, dst);
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172 }
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173 }
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174
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175 public static class Cmp extends Subcc {
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176
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177 public Cmp(Register a, Register b) {
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178 super(a, b, g0);
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179 }
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180
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181 public Cmp(Register a, int simm13) {
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182 super(a, simm13, g0);
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183 }
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184 }
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185
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186 public static class Dec extends Sub {
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187
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188 public Dec(Register dst) {
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189 super(dst, 1, dst);
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190 }
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191
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192 public Dec(int simm13, Register dst) {
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193 super(dst, simm13, dst);
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194 }
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195 }
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196
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197 public static class Deccc extends Subcc {
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198
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199 public Deccc(Register dst) {
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200 super(dst, 1, dst);
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201 }
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202
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203 public Deccc(int simm13, Register dst) {
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204 super(dst, simm13, dst);
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205 }
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206 }
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207
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208 @SuppressWarnings("unused")
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209 public static class Inc {
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210
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211 public Inc(Register dst) {
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212 new Add(dst, 1, dst);
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213 }
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214
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215 public Inc(int simm13, Register dst) {
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216 new Add(dst, simm13, dst);
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217 }
204e8f3209e9 SPARCMacroAssembler synthetic instructions and SPARCTestOp
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218 }
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219
204e8f3209e9 SPARCMacroAssembler synthetic instructions and SPARCTestOp
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220 @SuppressWarnings("unused")
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diff changeset
221 public static class Inccc {
204e8f3209e9 SPARCMacroAssembler synthetic instructions and SPARCTestOp
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222
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223 public Inccc(Register dst) {
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224 new Addcc(dst, 1, dst);
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204e8f3209e9 SPARCMacroAssembler synthetic instructions and SPARCTestOp
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225 }
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226
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227 public Inccc(int simm13, Register dst) {
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228 new Addcc(dst, simm13, dst);
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204e8f3209e9 SPARCMacroAssembler synthetic instructions and SPARCTestOp
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229 }
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230 }
204e8f3209e9 SPARCMacroAssembler synthetic instructions and SPARCTestOp
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231
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232 public static class Jmp extends Jmpl {
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233
10468
cfbe4f978116 SPARC assembler enhancements and more fixes
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234 public Jmp(SPARCAddress address) {
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235 super(address.getBase(), address.getDisplacement(), g0);
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236 }
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237 }
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238
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239 public static class Neg extends Sub {
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240
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241 public Neg(Register src2, Register dst) {
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242 super(g0, src2, dst);
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243 assert src2.encoding() != dst.encoding();
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244 }
204e8f3209e9 SPARCMacroAssembler synthetic instructions and SPARCTestOp
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245
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246 public Neg(Register dst) {
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247 super(g0, dst, dst);
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248 }
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249 }
204e8f3209e9 SPARCMacroAssembler synthetic instructions and SPARCTestOp
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250
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diff changeset
251 public static class Mov extends Or {
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41511d78546a SPARC UA 2011 assembler changes, bit manipulation synthetics
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252
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253 public Mov(Register src1, Register dst) {
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diff changeset
254 super(g0, src1, dst);
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41511d78546a SPARC UA 2011 assembler changes, bit manipulation synthetics
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diff changeset
255 assert src1.encoding() != dst.encoding();
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diff changeset
256 }
41511d78546a SPARC UA 2011 assembler changes, bit manipulation synthetics
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257
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258 public Mov(int simm13, Register dst) {
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259 super(g0, simm13, dst);
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260 }
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261 }
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262
f78079947084 some basic SPARC arithmetic works
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diff changeset
263 public static class Nop extends Sethi {
f78079947084 some basic SPARC arithmetic works
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diff changeset
264
f78079947084 some basic SPARC arithmetic works
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diff changeset
265 public Nop() {
f78079947084 some basic SPARC arithmetic works
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diff changeset
266 super(0, r0);
9949
41511d78546a SPARC UA 2011 assembler changes, bit manipulation synthetics
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267 }
41511d78546a SPARC UA 2011 assembler changes, bit manipulation synthetics
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268 }
41511d78546a SPARC UA 2011 assembler changes, bit manipulation synthetics
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269
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diff changeset
270 public static class Not extends Xnor {
9845
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271
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272 public Not(Register src1, Register dst) {
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273 super(src1, g0, dst);
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diff changeset
274 assert src1.encoding() != dst.encoding();
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diff changeset
275 }
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diff changeset
276
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277 public Not(Register dst) {
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diff changeset
278 super(dst, g0, dst);
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279 }
2d1687e63484 SPARCMacroAssembler and synthetic instructions
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280 }
2d1687e63484 SPARCMacroAssembler and synthetic instructions
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281
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diff changeset
282 public static class RestoreWindow extends Restore {
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283
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diff changeset
284 public RestoreWindow() {
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285 super(g0, g0, g0);
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286 }
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287 }
2d1687e63484 SPARCMacroAssembler and synthetic instructions
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diff changeset
288
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diff changeset
289 public static class Ret extends Jmpl {
9844
2d1687e63484 SPARCMacroAssembler and synthetic instructions
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290
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diff changeset
291 public Ret() {
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diff changeset
292 super(i7, 8, g0);
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293 }
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294 }
2d1687e63484 SPARCMacroAssembler and synthetic instructions
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295
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diff changeset
296 public static class SaveWindow extends Save {
9844
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297
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298 public SaveWindow() {
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diff changeset
299 super(g0, g0, g0);
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300 }
2d1687e63484 SPARCMacroAssembler and synthetic instructions
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301 }
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302
9845
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diff changeset
303 public static class Setuw {
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304
10694
31266ceb86ef SPARC: Can compile and run two or three methods of a bootstrap.
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305 private int value;
31266ceb86ef SPARC: Can compile and run two or three methods of a bootstrap.
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diff changeset
306 private Register dst;
31266ceb86ef SPARC: Can compile and run two or three methods of a bootstrap.
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diff changeset
307
31266ceb86ef SPARC: Can compile and run two or three methods of a bootstrap.
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diff changeset
308 public Setuw(int value, Register dst) {
31266ceb86ef SPARC: Can compile and run two or three methods of a bootstrap.
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diff changeset
309 this.value = value;
31266ceb86ef SPARC: Can compile and run two or three methods of a bootstrap.
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diff changeset
310 this.dst = dst;
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diff changeset
311 }
31266ceb86ef SPARC: Can compile and run two or three methods of a bootstrap.
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diff changeset
312
31266ceb86ef SPARC: Can compile and run two or three methods of a bootstrap.
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diff changeset
313 public void emit(SPARCMacroAssembler masm) {
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diff changeset
314 if (value == 0) {
10694
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diff changeset
315 new Clr(dst).emit(masm);
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diff changeset
316 } else if (-4095 <= value && value <= 4096) {
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diff changeset
317 new Or(g0, value, dst).emit(masm);
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diff changeset
318 } else if (value >= 0 && ((value & 0x3FFF) == 0)) {
f78079947084 some basic SPARC arithmetic works
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diff changeset
319 new Sethi(hi22(value), dst).emit(masm);
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204e8f3209e9 SPARCMacroAssembler synthetic instructions and SPARCTestOp
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diff changeset
320 } else {
10459
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diff changeset
321 new Sethi(hi22(value), dst).emit(masm);
f78079947084 some basic SPARC arithmetic works
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diff changeset
322 new Or(dst, lo10(value), dst).emit(masm);
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204e8f3209e9 SPARCMacroAssembler synthetic instructions and SPARCTestOp
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diff changeset
323 }
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diff changeset
324 }
204e8f3209e9 SPARCMacroAssembler synthetic instructions and SPARCTestOp
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325 }
204e8f3209e9 SPARCMacroAssembler synthetic instructions and SPARCTestOp
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326
204e8f3209e9 SPARCMacroAssembler synthetic instructions and SPARCTestOp
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327 public static class Setx {
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328
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329 private long value;
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330 private Register dst;
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331 private boolean forceRelocatable;
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332
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333 public Setx(long value, Register dst, boolean forceRelocatable) {
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334 this.value = value;
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335 this.dst = dst;
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336 this.forceRelocatable = forceRelocatable;
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337 }
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338
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339 public Setx(long value, Register dst) {
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340 this(value, dst, false);
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341 }
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342
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343 public void emit(SPARCMacroAssembler masm) {
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344 int hi = (int) (value >> 32);
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345 int lo = (int) (value & ~0);
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346
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347 // if (isSimm13(lo) && value == lo) {
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348 // new Or(g0, lo, dst).emit(masm);
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349 // } else if (hi == 0) {
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350 // new Sethi(lo, dst).emit(masm); // hardware version zero-extends to upper 32
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351 // if (lo10(lo) != 0) {
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352 // new Or(dst, lo10(lo), dst).emit(masm);
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353 // }
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354 // } else if (hi == -1) {
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355 // new Sethi(~lo, dst).emit(masm); // hardware version zero-extends to upper 32
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356 // new Xor(dst, ~lo10(~0), dst).emit(masm);
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357 // new Add(dst, lo10(lo), dst).emit(masm);
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358 // } else if (lo == 0) {
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359 // if (isSimm13(hi)) {
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360 // new Or(g0, hi, dst).emit(masm);
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361 // } else {
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362 // new Sethi(hi, dst).emit(masm); // hardware version zero-extends to upper 32
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363 // if (lo10(hi) != 0) {
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364 // new Or(dst, lo10(hi), dst).emit(masm);
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365 // }
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366 // }
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367 // new Sllx(dst, 32, dst).emit(masm);
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368
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369 // This is the same logic as MacroAssembler::internal_set.
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370 final int startPc = masm.codeBuffer.position();
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371
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372 if (hi == 0 && lo >= 0) {
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373 new Sethi(lo, dst).emit(masm);
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374 } else if (hi == -1) {
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375 new Sethi(~lo, dst).emit(masm);
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376 new Xor(dst, ~lo10(~0), dst).emit(masm);
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377 } else {
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378 int shiftcnt = 0;
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379 new Sethi(hi, dst).emit(masm);
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380 if ((hi & 0x3ff) != 0) { // Any bits?
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381 new Or(dst, hi & 0x3ff, dst).emit(masm); // msb 32-bits are now in lsb 32
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382 }
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383 if ((lo & 0xFFFFFC00) != 0) { // done?
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384 if (((lo >> 20) & 0xfff) != 0) { // Any bits set?
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385 new Sllx(dst, 12, dst).emit(masm); // Make room for next 12 bits
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386 new Or(dst, (lo >> 20) & 0xfff, dst).emit(masm); // Or in next 12
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387 shiftcnt = 0; // We already shifted
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388 } else {
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389 shiftcnt = 12;
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390 }
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391 if (((lo >> 10) & 0x3ff) != 0) {
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392 new Sllx(dst, shiftcnt + 10, dst).emit(masm); // Make room for last 10 bits
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393 new Or(dst, (lo >> 10) & 0x3ff, dst).emit(masm); // Or in next 10
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394 shiftcnt = 0;
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395 } else {
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396 shiftcnt = 10;
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397 }
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398 new Sllx(dst, shiftcnt + 10, dst).emit(masm); // Shift leaving disp field 0'd
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diff changeset
399 } else {
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400 new Sllx(dst, 32, dst).emit(masm);
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204e8f3209e9 SPARCMacroAssembler synthetic instructions and SPARCTestOp
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401 }
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402 }
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403 // Pad out the instruction sequence so it can be patched later.
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404 if (forceRelocatable) {
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405 while (masm.codeBuffer.position() < (startPc + (7 * 4))) {
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diff changeset
406 new Nop().emit(masm);
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204e8f3209e9 SPARCMacroAssembler synthetic instructions and SPARCTestOp
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diff changeset
407 }
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408 }
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409 if (lo10(lo) != 0 || forceRelocatable) {
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410 new Add(dst, lo10(lo), dst).emit(masm);
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204e8f3209e9 SPARCMacroAssembler synthetic instructions and SPARCTestOp
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diff changeset
411 }
204e8f3209e9 SPARCMacroAssembler synthetic instructions and SPARCTestOp
Morris Meyer <morris.meyer@oracle.com>
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diff changeset
412 }
204e8f3209e9 SPARCMacroAssembler synthetic instructions and SPARCTestOp
Morris Meyer <morris.meyer@oracle.com>
parents: 9844
diff changeset
413 }
204e8f3209e9 SPARCMacroAssembler synthetic instructions and SPARCTestOp
Morris Meyer <morris.meyer@oracle.com>
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diff changeset
414
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diff changeset
415 public static class Signx extends Sra {
9845
204e8f3209e9 SPARCMacroAssembler synthetic instructions and SPARCTestOp
Morris Meyer <morris.meyer@oracle.com>
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diff changeset
416
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417 public Signx(Register src1, Register dst) {
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diff changeset
418 super(src1, g0, dst);
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204e8f3209e9 SPARCMacroAssembler synthetic instructions and SPARCTestOp
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diff changeset
419 assert src1.encoding() != dst.encoding();
204e8f3209e9 SPARCMacroAssembler synthetic instructions and SPARCTestOp
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diff changeset
420 }
204e8f3209e9 SPARCMacroAssembler synthetic instructions and SPARCTestOp
Morris Meyer <morris.meyer@oracle.com>
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diff changeset
421
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422 public Signx(Register dst) {
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diff changeset
423 super(dst, g0, dst);
9845
204e8f3209e9 SPARCMacroAssembler synthetic instructions and SPARCTestOp
Morris Meyer <morris.meyer@oracle.com>
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diff changeset
424 }
204e8f3209e9 SPARCMacroAssembler synthetic instructions and SPARCTestOp
Morris Meyer <morris.meyer@oracle.com>
parents: 9844
diff changeset
425 }
204e8f3209e9 SPARCMacroAssembler synthetic instructions and SPARCTestOp
Morris Meyer <morris.meyer@oracle.com>
parents: 9844
diff changeset
426
9846
91a1041ec905 SPARCLIRGenerator, sqrt, condition move, breakpoint op, partial bit ops
Morris Meyer <morris.meyer@oracle.com>
parents: 9845
diff changeset
427 @SuppressWarnings("unused")
91a1041ec905 SPARCLIRGenerator, sqrt, condition move, breakpoint op, partial bit ops
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diff changeset
428 public static class Trap {
91a1041ec905 SPARCLIRGenerator, sqrt, condition move, breakpoint op, partial bit ops
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diff changeset
429
91a1041ec905 SPARCLIRGenerator, sqrt, condition move, breakpoint op, partial bit ops
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diff changeset
430 public Trap(SPARCAssembler asm, int trap) {
91a1041ec905 SPARCLIRGenerator, sqrt, condition move, breakpoint op, partial bit ops
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diff changeset
431 assert trap >= 0 && trap <= 0x7f;
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432 new Ta(asm, Icc, g0, trap);
9846
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diff changeset
433 }
91a1041ec905 SPARCLIRGenerator, sqrt, condition move, breakpoint op, partial bit ops
Morris Meyer <morris.meyer@oracle.com>
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diff changeset
434 }
9844
2d1687e63484 SPARCMacroAssembler and synthetic instructions
Morris Meyer <morris.meyer@oracle.com>
parents:
diff changeset
435 }