graal-compiler: src/cpu/x86/vm/x86.ad annotate

annotate src/cpu/x86/vm/x86.ad @ 6795:7eca5de9e0b6

7023898: Intrinsify AtomicLongFieldUpdater.getAndIncrement() Summary: use shorter instruction sequences for atomic add and atomic exchange when possible. Reviewed-by: kvn, jrose

author	roland
date	Thu, 20 Sep 2012 16:49:17 +0200
parents	137868b7aa6f
children	859c45fb8cea

rev	line source
4761 65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1 //
4950 9b8ce46870df 7145346: VerifyStackAtCalls is broken kvn parents: 4761 diff changeset	2 // Copyright (c) 2011, 2012, Oracle and/or its affiliates. All rights reserved.
4761 65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	3 // DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	4 //
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	5 // This code is free software; you can redistribute it and/or modify it
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	6 // under the terms of the GNU General Public License version 2 only, as
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	7 // published by the Free Software Foundation.
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	8 //
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	9 // This code is distributed in the hope that it will be useful, but WITHOUT
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	10 // ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	11 // FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	12 // version 2 for more details (a copy is included in the LICENSE file that
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	13 // accompanied this code).
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	14 //
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	15 // You should have received a copy of the GNU General Public License version
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	16 // 2 along with this work; if not, write to the Free Software Foundation,
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	17 // Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	18 //
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	19 // Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	20 // or visit www.oracle.com if you need additional information or have any
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	21 // questions.
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	22 //
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	23 //
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	24
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	25 // X86 Common Architecture Description File
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	26
6179 8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	27 //----------REGISTER DEFINITION BLOCK------------------------------------------
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	28 // This information is used by the matcher and the register allocator to
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	29 // describe individual registers and classes of registers within the target
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	30 // archtecture.
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	31
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	32 register %{
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	33 //----------Architecture Description Register Definitions----------------------
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	34 // General Registers
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	35 // "reg_def" name ( register save type, C convention save type,
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	36 // ideal register type, encoding );
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	37 // Register Save Types:
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	38 //
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	39 // NS = No-Save: The register allocator assumes that these registers
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	40 // can be used without saving upon entry to the method, &
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	41 // that they do not need to be saved at call sites.
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	42 //
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	43 // SOC = Save-On-Call: The register allocator assumes that these registers
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	44 // can be used without saving upon entry to the method,
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	45 // but that they must be saved at call sites.
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	46 //
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	47 // SOE = Save-On-Entry: The register allocator assumes that these registers
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	48 // must be saved before using them upon entry to the
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	49 // method, but they do not need to be saved at call
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	50 // sites.
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	51 //
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	52 // AS = Always-Save: The register allocator assumes that these registers
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	53 // must be saved before using them upon entry to the
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	54 // method, & that they must be saved at call sites.
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	55 //
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	56 // Ideal Register Type is used to determine how to save & restore a
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	57 // register. Op_RegI will get spilled with LoadI/StoreI, Op_RegP will get
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	58 // spilled with LoadP/StoreP. If the register supports both, use Op_RegI.
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	59 //
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	60 // The encoding number is the actual bit-pattern placed into the opcodes.
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	61
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	62 // XMM registers. 256-bit registers or 8 words each, labeled (a)-h.
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	63 // Word a in each register holds a Float, words ab hold a Double.
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	64 // The whole registers are used in SSE4.2 version intrinsics,
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	65 // array copy stubs and superword operations (see UseSSE42Intrinsics,
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	66 // UseXMMForArrayCopy and UseSuperword flags).
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	67 // XMM8-XMM15 must be encoded with REX (VEX for UseAVX).
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	68 // Linux ABI: No register preserved across function calls
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	69 // XMM0-XMM7 might hold parameters
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	70 // Windows ABI: XMM6-XMM15 preserved across function calls
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	71 // XMM0-XMM3 might hold parameters
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	72
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	73 reg_def XMM0 ( SOC, SOC, Op_RegF, 0, xmm0->as_VMReg());
6225 2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	74 reg_def XMM0b( SOC, SOC, Op_RegF, 0, xmm0->as_VMReg()->next(1));
2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	75 reg_def XMM0c( SOC, SOC, Op_RegF, 0, xmm0->as_VMReg()->next(2));
2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	76 reg_def XMM0d( SOC, SOC, Op_RegF, 0, xmm0->as_VMReg()->next(3));
2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	77 reg_def XMM0e( SOC, SOC, Op_RegF, 0, xmm0->as_VMReg()->next(4));
2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	78 reg_def XMM0f( SOC, SOC, Op_RegF, 0, xmm0->as_VMReg()->next(5));
2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	79 reg_def XMM0g( SOC, SOC, Op_RegF, 0, xmm0->as_VMReg()->next(6));
2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	80 reg_def XMM0h( SOC, SOC, Op_RegF, 0, xmm0->as_VMReg()->next(7));
6179 8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	81
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	82 reg_def XMM1 ( SOC, SOC, Op_RegF, 1, xmm1->as_VMReg());
6225 2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	83 reg_def XMM1b( SOC, SOC, Op_RegF, 1, xmm1->as_VMReg()->next(1));
2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	84 reg_def XMM1c( SOC, SOC, Op_RegF, 1, xmm1->as_VMReg()->next(2));
2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	85 reg_def XMM1d( SOC, SOC, Op_RegF, 1, xmm1->as_VMReg()->next(3));
2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	86 reg_def XMM1e( SOC, SOC, Op_RegF, 1, xmm1->as_VMReg()->next(4));
2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	87 reg_def XMM1f( SOC, SOC, Op_RegF, 1, xmm1->as_VMReg()->next(5));
2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	88 reg_def XMM1g( SOC, SOC, Op_RegF, 1, xmm1->as_VMReg()->next(6));
2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	89 reg_def XMM1h( SOC, SOC, Op_RegF, 1, xmm1->as_VMReg()->next(7));
6179 8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	90
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	91 reg_def XMM2 ( SOC, SOC, Op_RegF, 2, xmm2->as_VMReg());
6225 2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	92 reg_def XMM2b( SOC, SOC, Op_RegF, 2, xmm2->as_VMReg()->next(1));
2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	93 reg_def XMM2c( SOC, SOC, Op_RegF, 2, xmm2->as_VMReg()->next(2));
2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	94 reg_def XMM2d( SOC, SOC, Op_RegF, 2, xmm2->as_VMReg()->next(3));
2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	95 reg_def XMM2e( SOC, SOC, Op_RegF, 2, xmm2->as_VMReg()->next(4));
2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	96 reg_def XMM2f( SOC, SOC, Op_RegF, 2, xmm2->as_VMReg()->next(5));
2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	97 reg_def XMM2g( SOC, SOC, Op_RegF, 2, xmm2->as_VMReg()->next(6));
2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	98 reg_def XMM2h( SOC, SOC, Op_RegF, 2, xmm2->as_VMReg()->next(7));
6179 8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	99
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	100 reg_def XMM3 ( SOC, SOC, Op_RegF, 3, xmm3->as_VMReg());
6225 2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	101 reg_def XMM3b( SOC, SOC, Op_RegF, 3, xmm3->as_VMReg()->next(1));
2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	102 reg_def XMM3c( SOC, SOC, Op_RegF, 3, xmm3->as_VMReg()->next(2));
2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	103 reg_def XMM3d( SOC, SOC, Op_RegF, 3, xmm3->as_VMReg()->next(3));
2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	104 reg_def XMM3e( SOC, SOC, Op_RegF, 3, xmm3->as_VMReg()->next(4));
2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	105 reg_def XMM3f( SOC, SOC, Op_RegF, 3, xmm3->as_VMReg()->next(5));
2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	106 reg_def XMM3g( SOC, SOC, Op_RegF, 3, xmm3->as_VMReg()->next(6));
2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	107 reg_def XMM3h( SOC, SOC, Op_RegF, 3, xmm3->as_VMReg()->next(7));
6179 8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	108
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	109 reg_def XMM4 ( SOC, SOC, Op_RegF, 4, xmm4->as_VMReg());
6225 2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	110 reg_def XMM4b( SOC, SOC, Op_RegF, 4, xmm4->as_VMReg()->next(1));
2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	111 reg_def XMM4c( SOC, SOC, Op_RegF, 4, xmm4->as_VMReg()->next(2));
2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	112 reg_def XMM4d( SOC, SOC, Op_RegF, 4, xmm4->as_VMReg()->next(3));
2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	113 reg_def XMM4e( SOC, SOC, Op_RegF, 4, xmm4->as_VMReg()->next(4));
2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	114 reg_def XMM4f( SOC, SOC, Op_RegF, 4, xmm4->as_VMReg()->next(5));
2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	115 reg_def XMM4g( SOC, SOC, Op_RegF, 4, xmm4->as_VMReg()->next(6));
2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	116 reg_def XMM4h( SOC, SOC, Op_RegF, 4, xmm4->as_VMReg()->next(7));
6179 8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	117
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	118 reg_def XMM5 ( SOC, SOC, Op_RegF, 5, xmm5->as_VMReg());
6225 2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	119 reg_def XMM5b( SOC, SOC, Op_RegF, 5, xmm5->as_VMReg()->next(1));
2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	120 reg_def XMM5c( SOC, SOC, Op_RegF, 5, xmm5->as_VMReg()->next(2));
2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	121 reg_def XMM5d( SOC, SOC, Op_RegF, 5, xmm5->as_VMReg()->next(3));
2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	122 reg_def XMM5e( SOC, SOC, Op_RegF, 5, xmm5->as_VMReg()->next(4));
2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	123 reg_def XMM5f( SOC, SOC, Op_RegF, 5, xmm5->as_VMReg()->next(5));
2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	124 reg_def XMM5g( SOC, SOC, Op_RegF, 5, xmm5->as_VMReg()->next(6));
2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	125 reg_def XMM5h( SOC, SOC, Op_RegF, 5, xmm5->as_VMReg()->next(7));
6179 8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	126
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	127 #ifdef _WIN64
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	128
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	129 reg_def XMM6 ( SOC, SOE, Op_RegF, 6, xmm6->as_VMReg());
6225 2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	130 reg_def XMM6b( SOC, SOE, Op_RegF, 6, xmm6->as_VMReg()->next(1));
2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	131 reg_def XMM6c( SOC, SOE, Op_RegF, 6, xmm6->as_VMReg()->next(2));
2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	132 reg_def XMM6d( SOC, SOE, Op_RegF, 6, xmm6->as_VMReg()->next(3));
2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	133 reg_def XMM6e( SOC, SOE, Op_RegF, 6, xmm6->as_VMReg()->next(4));
2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	134 reg_def XMM6f( SOC, SOE, Op_RegF, 6, xmm6->as_VMReg()->next(5));
2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	135 reg_def XMM6g( SOC, SOE, Op_RegF, 6, xmm6->as_VMReg()->next(6));
2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	136 reg_def XMM6h( SOC, SOE, Op_RegF, 6, xmm6->as_VMReg()->next(7));
6179 8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	137
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	138 reg_def XMM7 ( SOC, SOE, Op_RegF, 7, xmm7->as_VMReg());
6225 2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	139 reg_def XMM7b( SOC, SOE, Op_RegF, 7, xmm7->as_VMReg()->next(1));
2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	140 reg_def XMM7c( SOC, SOE, Op_RegF, 7, xmm7->as_VMReg()->next(2));
2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	141 reg_def XMM7d( SOC, SOE, Op_RegF, 7, xmm7->as_VMReg()->next(3));
2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	142 reg_def XMM7e( SOC, SOE, Op_RegF, 7, xmm7->as_VMReg()->next(4));
2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	143 reg_def XMM7f( SOC, SOE, Op_RegF, 7, xmm7->as_VMReg()->next(5));
2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	144 reg_def XMM7g( SOC, SOE, Op_RegF, 7, xmm7->as_VMReg()->next(6));
2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	145 reg_def XMM7h( SOC, SOE, Op_RegF, 7, xmm7->as_VMReg()->next(7));
6179 8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	146
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	147 reg_def XMM8 ( SOC, SOE, Op_RegF, 8, xmm8->as_VMReg());
6225 2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	148 reg_def XMM8b( SOC, SOE, Op_RegF, 8, xmm8->as_VMReg()->next(1));
2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	149 reg_def XMM8c( SOC, SOE, Op_RegF, 8, xmm8->as_VMReg()->next(2));
2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	150 reg_def XMM8d( SOC, SOE, Op_RegF, 8, xmm8->as_VMReg()->next(3));
2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	151 reg_def XMM8e( SOC, SOE, Op_RegF, 8, xmm8->as_VMReg()->next(4));
2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	152 reg_def XMM8f( SOC, SOE, Op_RegF, 8, xmm8->as_VMReg()->next(5));
2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	153 reg_def XMM8g( SOC, SOE, Op_RegF, 8, xmm8->as_VMReg()->next(6));
2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	154 reg_def XMM8h( SOC, SOE, Op_RegF, 8, xmm8->as_VMReg()->next(7));
6179 8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	155
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	156 reg_def XMM9 ( SOC, SOE, Op_RegF, 9, xmm9->as_VMReg());
6225 2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	157 reg_def XMM9b( SOC, SOE, Op_RegF, 9, xmm9->as_VMReg()->next(1));
2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	158 reg_def XMM9c( SOC, SOE, Op_RegF, 9, xmm9->as_VMReg()->next(2));
2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	159 reg_def XMM9d( SOC, SOE, Op_RegF, 9, xmm9->as_VMReg()->next(3));
2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	160 reg_def XMM9e( SOC, SOE, Op_RegF, 9, xmm9->as_VMReg()->next(4));
2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	161 reg_def XMM9f( SOC, SOE, Op_RegF, 9, xmm9->as_VMReg()->next(5));
2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	162 reg_def XMM9g( SOC, SOE, Op_RegF, 9, xmm9->as_VMReg()->next(6));
2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	163 reg_def XMM9h( SOC, SOE, Op_RegF, 9, xmm9->as_VMReg()->next(7));
6179 8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	164
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	165 reg_def XMM10 ( SOC, SOE, Op_RegF, 10, xmm10->as_VMReg());
6225 2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	166 reg_def XMM10b( SOC, SOE, Op_RegF, 10, xmm10->as_VMReg()->next(1));
2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	167 reg_def XMM10c( SOC, SOE, Op_RegF, 10, xmm10->as_VMReg()->next(2));
2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	168 reg_def XMM10d( SOC, SOE, Op_RegF, 10, xmm10->as_VMReg()->next(3));
2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	169 reg_def XMM10e( SOC, SOE, Op_RegF, 10, xmm10->as_VMReg()->next(4));
2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	170 reg_def XMM10f( SOC, SOE, Op_RegF, 10, xmm10->as_VMReg()->next(5));
2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	171 reg_def XMM10g( SOC, SOE, Op_RegF, 10, xmm10->as_VMReg()->next(6));
2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	172 reg_def XMM10h( SOC, SOE, Op_RegF, 10, xmm10->as_VMReg()->next(7));
6179 8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	173
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	174 reg_def XMM11 ( SOC, SOE, Op_RegF, 11, xmm11->as_VMReg());
6225 2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	175 reg_def XMM11b( SOC, SOE, Op_RegF, 11, xmm11->as_VMReg()->next(1));
2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	176 reg_def XMM11c( SOC, SOE, Op_RegF, 11, xmm11->as_VMReg()->next(2));
2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	177 reg_def XMM11d( SOC, SOE, Op_RegF, 11, xmm11->as_VMReg()->next(3));
2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	178 reg_def XMM11e( SOC, SOE, Op_RegF, 11, xmm11->as_VMReg()->next(4));
2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	179 reg_def XMM11f( SOC, SOE, Op_RegF, 11, xmm11->as_VMReg()->next(5));
2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	180 reg_def XMM11g( SOC, SOE, Op_RegF, 11, xmm11->as_VMReg()->next(6));
2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	181 reg_def XMM11h( SOC, SOE, Op_RegF, 11, xmm11->as_VMReg()->next(7));
6179 8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	182
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	183 reg_def XMM12 ( SOC, SOE, Op_RegF, 12, xmm12->as_VMReg());
6225 2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	184 reg_def XMM12b( SOC, SOE, Op_RegF, 12, xmm12->as_VMReg()->next(1));
2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	185 reg_def XMM12c( SOC, SOE, Op_RegF, 12, xmm12->as_VMReg()->next(2));
2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	186 reg_def XMM12d( SOC, SOE, Op_RegF, 12, xmm12->as_VMReg()->next(3));
2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	187 reg_def XMM12e( SOC, SOE, Op_RegF, 12, xmm12->as_VMReg()->next(4));
2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	188 reg_def XMM12f( SOC, SOE, Op_RegF, 12, xmm12->as_VMReg()->next(5));
2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	189 reg_def XMM12g( SOC, SOE, Op_RegF, 12, xmm12->as_VMReg()->next(6));
2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	190 reg_def XMM12h( SOC, SOE, Op_RegF, 12, xmm12->as_VMReg()->next(7));
6179 8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	191
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	192 reg_def XMM13 ( SOC, SOE, Op_RegF, 13, xmm13->as_VMReg());
6225 2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	193 reg_def XMM13b( SOC, SOE, Op_RegF, 13, xmm13->as_VMReg()->next(1));
2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	194 reg_def XMM13c( SOC, SOE, Op_RegF, 13, xmm13->as_VMReg()->next(2));
2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	195 reg_def XMM13d( SOC, SOE, Op_RegF, 13, xmm13->as_VMReg()->next(3));
2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	196 reg_def XMM13e( SOC, SOE, Op_RegF, 13, xmm13->as_VMReg()->next(4));
2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	197 reg_def XMM13f( SOC, SOE, Op_RegF, 13, xmm13->as_VMReg()->next(5));
2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	198 reg_def XMM13g( SOC, SOE, Op_RegF, 13, xmm13->as_VMReg()->next(6));
2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	199 reg_def XMM13h( SOC, SOE, Op_RegF, 13, xmm13->as_VMReg()->next(7));
6179 8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	200
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	201 reg_def XMM14 ( SOC, SOE, Op_RegF, 14, xmm14->as_VMReg());
6225 2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	202 reg_def XMM14b( SOC, SOE, Op_RegF, 14, xmm14->as_VMReg()->next(1));
2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	203 reg_def XMM14c( SOC, SOE, Op_RegF, 14, xmm14->as_VMReg()->next(2));
2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	204 reg_def XMM14d( SOC, SOE, Op_RegF, 14, xmm14->as_VMReg()->next(3));
2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	205 reg_def XMM14e( SOC, SOE, Op_RegF, 14, xmm14->as_VMReg()->next(4));
2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	206 reg_def XMM14f( SOC, SOE, Op_RegF, 14, xmm14->as_VMReg()->next(5));
2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	207 reg_def XMM14g( SOC, SOE, Op_RegF, 14, xmm14->as_VMReg()->next(6));
2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	208 reg_def XMM14h( SOC, SOE, Op_RegF, 14, xmm14->as_VMReg()->next(7));
6179 8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	209
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	210 reg_def XMM15 ( SOC, SOE, Op_RegF, 15, xmm15->as_VMReg());
6225 2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	211 reg_def XMM15b( SOC, SOE, Op_RegF, 15, xmm15->as_VMReg()->next(1));
2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	212 reg_def XMM15c( SOC, SOE, Op_RegF, 15, xmm15->as_VMReg()->next(2));
2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	213 reg_def XMM15d( SOC, SOE, Op_RegF, 15, xmm15->as_VMReg()->next(3));
2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	214 reg_def XMM15e( SOC, SOE, Op_RegF, 15, xmm15->as_VMReg()->next(4));
2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	215 reg_def XMM15f( SOC, SOE, Op_RegF, 15, xmm15->as_VMReg()->next(5));
2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	216 reg_def XMM15g( SOC, SOE, Op_RegF, 15, xmm15->as_VMReg()->next(6));
2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	217 reg_def XMM15h( SOC, SOE, Op_RegF, 15, xmm15->as_VMReg()->next(7));
6179 8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	218
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	219 #else // _WIN64
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	220
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	221 reg_def XMM6 ( SOC, SOC, Op_RegF, 6, xmm6->as_VMReg());
6225 2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	222 reg_def XMM6b( SOC, SOC, Op_RegF, 6, xmm6->as_VMReg()->next(1));
2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	223 reg_def XMM6c( SOC, SOC, Op_RegF, 6, xmm6->as_VMReg()->next(2));
2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	224 reg_def XMM6d( SOC, SOC, Op_RegF, 6, xmm6->as_VMReg()->next(3));
2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	225 reg_def XMM6e( SOC, SOC, Op_RegF, 6, xmm6->as_VMReg()->next(4));
2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	226 reg_def XMM6f( SOC, SOC, Op_RegF, 6, xmm6->as_VMReg()->next(5));
2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	227 reg_def XMM6g( SOC, SOC, Op_RegF, 6, xmm6->as_VMReg()->next(6));
2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	228 reg_def XMM6h( SOC, SOC, Op_RegF, 6, xmm6->as_VMReg()->next(7));
6179 8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	229
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	230 reg_def XMM7 ( SOC, SOC, Op_RegF, 7, xmm7->as_VMReg());
6225 2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	231 reg_def XMM7b( SOC, SOC, Op_RegF, 7, xmm7->as_VMReg()->next(1));
2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	232 reg_def XMM7c( SOC, SOC, Op_RegF, 7, xmm7->as_VMReg()->next(2));
2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	233 reg_def XMM7d( SOC, SOC, Op_RegF, 7, xmm7->as_VMReg()->next(3));
2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	234 reg_def XMM7e( SOC, SOC, Op_RegF, 7, xmm7->as_VMReg()->next(4));
2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	235 reg_def XMM7f( SOC, SOC, Op_RegF, 7, xmm7->as_VMReg()->next(5));
2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	236 reg_def XMM7g( SOC, SOC, Op_RegF, 7, xmm7->as_VMReg()->next(6));
2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	237 reg_def XMM7h( SOC, SOC, Op_RegF, 7, xmm7->as_VMReg()->next(7));
6179 8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	238
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	239 #ifdef _LP64
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	240
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	241 reg_def XMM8 ( SOC, SOC, Op_RegF, 8, xmm8->as_VMReg());
6225 2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	242 reg_def XMM8b( SOC, SOC, Op_RegF, 8, xmm8->as_VMReg()->next(1));
2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	243 reg_def XMM8c( SOC, SOC, Op_RegF, 8, xmm8->as_VMReg()->next(2));
2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	244 reg_def XMM8d( SOC, SOC, Op_RegF, 8, xmm8->as_VMReg()->next(3));
2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	245 reg_def XMM8e( SOC, SOC, Op_RegF, 8, xmm8->as_VMReg()->next(4));
2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	246 reg_def XMM8f( SOC, SOC, Op_RegF, 8, xmm8->as_VMReg()->next(5));
2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	247 reg_def XMM8g( SOC, SOC, Op_RegF, 8, xmm8->as_VMReg()->next(6));
2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	248 reg_def XMM8h( SOC, SOC, Op_RegF, 8, xmm8->as_VMReg()->next(7));
6179 8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	249
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	250 reg_def XMM9 ( SOC, SOC, Op_RegF, 9, xmm9->as_VMReg());
6225 2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	251 reg_def XMM9b( SOC, SOC, Op_RegF, 9, xmm9->as_VMReg()->next(1));
2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	252 reg_def XMM9c( SOC, SOC, Op_RegF, 9, xmm9->as_VMReg()->next(2));
2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	253 reg_def XMM9d( SOC, SOC, Op_RegF, 9, xmm9->as_VMReg()->next(3));
2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	254 reg_def XMM9e( SOC, SOC, Op_RegF, 9, xmm9->as_VMReg()->next(4));
2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	255 reg_def XMM9f( SOC, SOC, Op_RegF, 9, xmm9->as_VMReg()->next(5));
2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	256 reg_def XMM9g( SOC, SOC, Op_RegF, 9, xmm9->as_VMReg()->next(6));
2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	257 reg_def XMM9h( SOC, SOC, Op_RegF, 9, xmm9->as_VMReg()->next(7));
6179 8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	258
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	259 reg_def XMM10 ( SOC, SOC, Op_RegF, 10, xmm10->as_VMReg());
6225 2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	260 reg_def XMM10b( SOC, SOC, Op_RegF, 10, xmm10->as_VMReg()->next(1));
2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	261 reg_def XMM10c( SOC, SOC, Op_RegF, 10, xmm10->as_VMReg()->next(2));
2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	262 reg_def XMM10d( SOC, SOC, Op_RegF, 10, xmm10->as_VMReg()->next(3));
2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	263 reg_def XMM10e( SOC, SOC, Op_RegF, 10, xmm10->as_VMReg()->next(4));
2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	264 reg_def XMM10f( SOC, SOC, Op_RegF, 10, xmm10->as_VMReg()->next(5));
2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	265 reg_def XMM10g( SOC, SOC, Op_RegF, 10, xmm10->as_VMReg()->next(6));
2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	266 reg_def XMM10h( SOC, SOC, Op_RegF, 10, xmm10->as_VMReg()->next(7));
6179 8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	267
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	268 reg_def XMM11 ( SOC, SOC, Op_RegF, 11, xmm11->as_VMReg());
6225 2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	269 reg_def XMM11b( SOC, SOC, Op_RegF, 11, xmm11->as_VMReg()->next(1));
2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	270 reg_def XMM11c( SOC, SOC, Op_RegF, 11, xmm11->as_VMReg()->next(2));
2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	271 reg_def XMM11d( SOC, SOC, Op_RegF, 11, xmm11->as_VMReg()->next(3));
2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	272 reg_def XMM11e( SOC, SOC, Op_RegF, 11, xmm11->as_VMReg()->next(4));
2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	273 reg_def XMM11f( SOC, SOC, Op_RegF, 11, xmm11->as_VMReg()->next(5));
2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	274 reg_def XMM11g( SOC, SOC, Op_RegF, 11, xmm11->as_VMReg()->next(6));
2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	275 reg_def XMM11h( SOC, SOC, Op_RegF, 11, xmm11->as_VMReg()->next(7));
6179 8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	276
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	277 reg_def XMM12 ( SOC, SOC, Op_RegF, 12, xmm12->as_VMReg());
6225 2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	278 reg_def XMM12b( SOC, SOC, Op_RegF, 12, xmm12->as_VMReg()->next(1));
2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	279 reg_def XMM12c( SOC, SOC, Op_RegF, 12, xmm12->as_VMReg()->next(2));
2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	280 reg_def XMM12d( SOC, SOC, Op_RegF, 12, xmm12->as_VMReg()->next(3));
2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	281 reg_def XMM12e( SOC, SOC, Op_RegF, 12, xmm12->as_VMReg()->next(4));
2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	282 reg_def XMM12f( SOC, SOC, Op_RegF, 12, xmm12->as_VMReg()->next(5));
2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	283 reg_def XMM12g( SOC, SOC, Op_RegF, 12, xmm12->as_VMReg()->next(6));
2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	284 reg_def XMM12h( SOC, SOC, Op_RegF, 12, xmm12->as_VMReg()->next(7));
6179 8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	285
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	286 reg_def XMM13 ( SOC, SOC, Op_RegF, 13, xmm13->as_VMReg());
6225 2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	287 reg_def XMM13b( SOC, SOC, Op_RegF, 13, xmm13->as_VMReg()->next(1));
2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	288 reg_def XMM13c( SOC, SOC, Op_RegF, 13, xmm13->as_VMReg()->next(2));
2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	289 reg_def XMM13d( SOC, SOC, Op_RegF, 13, xmm13->as_VMReg()->next(3));
2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	290 reg_def XMM13e( SOC, SOC, Op_RegF, 13, xmm13->as_VMReg()->next(4));
2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	291 reg_def XMM13f( SOC, SOC, Op_RegF, 13, xmm13->as_VMReg()->next(5));
2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	292 reg_def XMM13g( SOC, SOC, Op_RegF, 13, xmm13->as_VMReg()->next(6));
2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	293 reg_def XMM13h( SOC, SOC, Op_RegF, 13, xmm13->as_VMReg()->next(7));
6179 8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	294
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	295 reg_def XMM14 ( SOC, SOC, Op_RegF, 14, xmm14->as_VMReg());
6225 2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	296 reg_def XMM14b( SOC, SOC, Op_RegF, 14, xmm14->as_VMReg()->next(1));
2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	297 reg_def XMM14c( SOC, SOC, Op_RegF, 14, xmm14->as_VMReg()->next(2));
2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	298 reg_def XMM14d( SOC, SOC, Op_RegF, 14, xmm14->as_VMReg()->next(3));
2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	299 reg_def XMM14e( SOC, SOC, Op_RegF, 14, xmm14->as_VMReg()->next(4));
2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	300 reg_def XMM14f( SOC, SOC, Op_RegF, 14, xmm14->as_VMReg()->next(5));
2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	301 reg_def XMM14g( SOC, SOC, Op_RegF, 14, xmm14->as_VMReg()->next(6));
2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	302 reg_def XMM14h( SOC, SOC, Op_RegF, 14, xmm14->as_VMReg()->next(7));
6179 8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	303
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	304 reg_def XMM15 ( SOC, SOC, Op_RegF, 15, xmm15->as_VMReg());
6225 2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	305 reg_def XMM15b( SOC, SOC, Op_RegF, 15, xmm15->as_VMReg()->next(1));
2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	306 reg_def XMM15c( SOC, SOC, Op_RegF, 15, xmm15->as_VMReg()->next(2));
2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	307 reg_def XMM15d( SOC, SOC, Op_RegF, 15, xmm15->as_VMReg()->next(3));
2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	308 reg_def XMM15e( SOC, SOC, Op_RegF, 15, xmm15->as_VMReg()->next(4));
2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	309 reg_def XMM15f( SOC, SOC, Op_RegF, 15, xmm15->as_VMReg()->next(5));
2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	310 reg_def XMM15g( SOC, SOC, Op_RegF, 15, xmm15->as_VMReg()->next(6));
2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	311 reg_def XMM15h( SOC, SOC, Op_RegF, 15, xmm15->as_VMReg()->next(7));
6179 8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	312
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	313 #endif // _LP64
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	314
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	315 #endif // _WIN64
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	316
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	317 #ifdef _LP64
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	318 reg_def RFLAGS(SOC, SOC, 0, 16, VMRegImpl::Bad());
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	319 #else
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	320 reg_def RFLAGS(SOC, SOC, 0, 8, VMRegImpl::Bad());
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	321 #endif // _LP64
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	322
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	323 alloc_class chunk1(XMM0, XMM0b, XMM0c, XMM0d, XMM0e, XMM0f, XMM0g, XMM0h,
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	324 XMM1, XMM1b, XMM1c, XMM1d, XMM1e, XMM1f, XMM1g, XMM1h,
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	325 XMM2, XMM2b, XMM2c, XMM2d, XMM2e, XMM2f, XMM2g, XMM2h,
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	326 XMM3, XMM3b, XMM3c, XMM3d, XMM3e, XMM3f, XMM3g, XMM3h,
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	327 XMM4, XMM4b, XMM4c, XMM4d, XMM4e, XMM4f, XMM4g, XMM4h,
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	328 XMM5, XMM5b, XMM5c, XMM5d, XMM5e, XMM5f, XMM5g, XMM5h,
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	329 XMM6, XMM6b, XMM6c, XMM6d, XMM6e, XMM6f, XMM6g, XMM6h,
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	330 XMM7, XMM7b, XMM7c, XMM7d, XMM7e, XMM7f, XMM7g, XMM7h
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	331 #ifdef _LP64
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	332 ,XMM8, XMM8b, XMM8c, XMM8d, XMM8e, XMM8f, XMM8g, XMM8h,
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	333 XMM9, XMM9b, XMM9c, XMM9d, XMM9e, XMM9f, XMM9g, XMM9h,
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	334 XMM10, XMM10b, XMM10c, XMM10d, XMM10e, XMM10f, XMM10g, XMM10h,
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	335 XMM11, XMM11b, XMM11c, XMM11d, XMM11e, XMM11f, XMM11g, XMM11h,
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	336 XMM12, XMM12b, XMM12c, XMM12d, XMM12e, XMM12f, XMM12g, XMM12h,
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	337 XMM13, XMM13b, XMM13c, XMM13d, XMM13e, XMM13f, XMM13g, XMM13h,
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	338 XMM14, XMM14b, XMM14c, XMM14d, XMM14e, XMM14f, XMM14g, XMM14h,
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	339 XMM15, XMM15b, XMM15c, XMM15d, XMM15e, XMM15f, XMM15g, XMM15h
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	340 #endif
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	341 );
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	342
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	343 // flags allocation class should be last.
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	344 alloc_class chunk2(RFLAGS);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	345
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	346 // Singleton class for condition codes
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	347 reg_class int_flags(RFLAGS);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	348
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	349 // Class for all float registers
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	350 reg_class float_reg(XMM0,
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	351 XMM1,
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	352 XMM2,
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	353 XMM3,
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	354 XMM4,
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	355 XMM5,
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	356 XMM6,
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	357 XMM7
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	358 #ifdef _LP64
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	359 ,XMM8,
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	360 XMM9,
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	361 XMM10,
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	362 XMM11,
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	363 XMM12,
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	364 XMM13,
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	365 XMM14,
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	366 XMM15
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	367 #endif
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	368 );
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	369
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	370 // Class for all double registers
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	371 reg_class double_reg(XMM0, XMM0b,
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	372 XMM1, XMM1b,
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	373 XMM2, XMM2b,
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	374 XMM3, XMM3b,
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	375 XMM4, XMM4b,
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	376 XMM5, XMM5b,
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	377 XMM6, XMM6b,
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	378 XMM7, XMM7b
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	379 #ifdef _LP64
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	380 ,XMM8, XMM8b,
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	381 XMM9, XMM9b,
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	382 XMM10, XMM10b,
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	383 XMM11, XMM11b,
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	384 XMM12, XMM12b,
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	385 XMM13, XMM13b,
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	386 XMM14, XMM14b,
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	387 XMM15, XMM15b
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	388 #endif
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	389 );
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	390
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	391 // Class for all 32bit vector registers
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	392 reg_class vectors_reg(XMM0,
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	393 XMM1,
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	394 XMM2,
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	395 XMM3,
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	396 XMM4,
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	397 XMM5,
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	398 XMM6,
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	399 XMM7
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	400 #ifdef _LP64
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	401 ,XMM8,
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	402 XMM9,
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	403 XMM10,
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	404 XMM11,
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	405 XMM12,
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	406 XMM13,
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	407 XMM14,
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	408 XMM15
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	409 #endif
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	410 );
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	411
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	412 // Class for all 64bit vector registers
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	413 reg_class vectord_reg(XMM0, XMM0b,
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	414 XMM1, XMM1b,
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	415 XMM2, XMM2b,
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	416 XMM3, XMM3b,
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	417 XMM4, XMM4b,
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	418 XMM5, XMM5b,
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	419 XMM6, XMM6b,
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	420 XMM7, XMM7b
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	421 #ifdef _LP64
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	422 ,XMM8, XMM8b,
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	423 XMM9, XMM9b,
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	424 XMM10, XMM10b,
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	425 XMM11, XMM11b,
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	426 XMM12, XMM12b,
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	427 XMM13, XMM13b,
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	428 XMM14, XMM14b,
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	429 XMM15, XMM15b
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	430 #endif
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	431 );
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	432
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	433 // Class for all 128bit vector registers
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	434 reg_class vectorx_reg(XMM0, XMM0b, XMM0c, XMM0d,
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	435 XMM1, XMM1b, XMM1c, XMM1d,
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	436 XMM2, XMM2b, XMM2c, XMM2d,
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	437 XMM3, XMM3b, XMM3c, XMM3d,
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	438 XMM4, XMM4b, XMM4c, XMM4d,
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	439 XMM5, XMM5b, XMM5c, XMM5d,
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	440 XMM6, XMM6b, XMM6c, XMM6d,
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	441 XMM7, XMM7b, XMM7c, XMM7d
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	442 #ifdef _LP64
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	443 ,XMM8, XMM8b, XMM8c, XMM8d,
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	444 XMM9, XMM9b, XMM9c, XMM9d,
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	445 XMM10, XMM10b, XMM10c, XMM10d,
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	446 XMM11, XMM11b, XMM11c, XMM11d,
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	447 XMM12, XMM12b, XMM12c, XMM12d,
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	448 XMM13, XMM13b, XMM13c, XMM13d,
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	449 XMM14, XMM14b, XMM14c, XMM14d,
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	450 XMM15, XMM15b, XMM15c, XMM15d
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	451 #endif
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	452 );
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	453
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	454 // Class for all 256bit vector registers
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	455 reg_class vectory_reg(XMM0, XMM0b, XMM0c, XMM0d, XMM0e, XMM0f, XMM0g, XMM0h,
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	456 XMM1, XMM1b, XMM1c, XMM1d, XMM1e, XMM1f, XMM1g, XMM1h,
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	457 XMM2, XMM2b, XMM2c, XMM2d, XMM2e, XMM2f, XMM2g, XMM2h,
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	458 XMM3, XMM3b, XMM3c, XMM3d, XMM3e, XMM3f, XMM3g, XMM3h,
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	459 XMM4, XMM4b, XMM4c, XMM4d, XMM4e, XMM4f, XMM4g, XMM4h,
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	460 XMM5, XMM5b, XMM5c, XMM5d, XMM5e, XMM5f, XMM5g, XMM5h,
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	461 XMM6, XMM6b, XMM6c, XMM6d, XMM6e, XMM6f, XMM6g, XMM6h,
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	462 XMM7, XMM7b, XMM7c, XMM7d, XMM7e, XMM7f, XMM7g, XMM7h
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	463 #ifdef _LP64
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	464 ,XMM8, XMM8b, XMM8c, XMM8d, XMM8e, XMM8f, XMM8g, XMM8h,
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	465 XMM9, XMM9b, XMM9c, XMM9d, XMM9e, XMM9f, XMM9g, XMM9h,
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	466 XMM10, XMM10b, XMM10c, XMM10d, XMM10e, XMM10f, XMM10g, XMM10h,
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	467 XMM11, XMM11b, XMM11c, XMM11d, XMM11e, XMM11f, XMM11g, XMM11h,
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	468 XMM12, XMM12b, XMM12c, XMM12d, XMM12e, XMM12f, XMM12g, XMM12h,
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	469 XMM13, XMM13b, XMM13c, XMM13d, XMM13e, XMM13f, XMM13g, XMM13h,
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	470 XMM14, XMM14b, XMM14c, XMM14d, XMM14e, XMM14f, XMM14g, XMM14h,
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	471 XMM15, XMM15b, XMM15c, XMM15d, XMM15e, XMM15f, XMM15g, XMM15h
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	472 #endif
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	473 );
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	474
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	475 %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	476
4761 65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	477 source %{
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	478 // Float masks come from different places depending on platform.
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	479 #ifdef _LP64
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	480 static address float_signmask() { return StubRoutines::x86::float_sign_mask(); }
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	481 static address float_signflip() { return StubRoutines::x86::float_sign_flip(); }
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	482 static address double_signmask() { return StubRoutines::x86::double_sign_mask(); }
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	483 static address double_signflip() { return StubRoutines::x86::double_sign_flip(); }
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	484 #else
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	485 static address float_signmask() { return (address)float_signmask_pool; }
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	486 static address float_signflip() { return (address)float_signflip_pool; }
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	487 static address double_signmask() { return (address)double_signmask_pool; }
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	488 static address double_signflip() { return (address)double_signflip_pool; }
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	489 #endif
4950 9b8ce46870df 7145346: VerifyStackAtCalls is broken kvn parents: 4761 diff changeset	490
6179 8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	491
6614 006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	492 const bool Matcher::match_rule_supported(int opcode) {
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	493 if (!has_match_rule(opcode))
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	494 return false;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	495
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	496 switch (opcode) {
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	497 case Op_PopCountI:
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	498 case Op_PopCountL:
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	499 if (!UsePopCountInstruction)
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	500 return false;
6792 137868b7aa6f 7196199: java/text/Bidi/Bug6665028.java failed: Bidi run count incorrect kvn parents: 6725 diff changeset	501 break;
6614 006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	502 case Op_MulVI:
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	503 if ((UseSSE < 4) && (UseAVX < 1)) // only with SSE4_1 or AVX
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	504 return false;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	505 break;
6795 7eca5de9e0b6 7023898: Intrinsify AtomicLongFieldUpdater.getAndIncrement() roland parents: 6792 diff changeset	506 case Op_CompareAndSwapL:
7eca5de9e0b6 7023898: Intrinsify AtomicLongFieldUpdater.getAndIncrement() roland parents: 6792 diff changeset	507 #ifdef _LP64
7eca5de9e0b6 7023898: Intrinsify AtomicLongFieldUpdater.getAndIncrement() roland parents: 6792 diff changeset	508 case Op_CompareAndSwapP:
7eca5de9e0b6 7023898: Intrinsify AtomicLongFieldUpdater.getAndIncrement() roland parents: 6792 diff changeset	509 #endif
7eca5de9e0b6 7023898: Intrinsify AtomicLongFieldUpdater.getAndIncrement() roland parents: 6792 diff changeset	510 if (!VM_Version::supports_cx8())
7eca5de9e0b6 7023898: Intrinsify AtomicLongFieldUpdater.getAndIncrement() roland parents: 6792 diff changeset	511 return false;
7eca5de9e0b6 7023898: Intrinsify AtomicLongFieldUpdater.getAndIncrement() roland parents: 6792 diff changeset	512 break;
6614 006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	513 }
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	514
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	515 return true; // Per default match rules are supported.
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	516 }
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	517
6179 8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	518 // Max vector size in bytes. 0 if not supported.
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	519 const int Matcher::vector_width_in_bytes(BasicType bt) {
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	520 assert(is_java_primitive(bt), "only primitive type vectors");
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	521 if (UseSSE < 2) return 0;
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	522 // SSE2 supports 128bit vectors for all types.
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	523 // AVX2 supports 256bit vectors for all types.
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	524 int size = (UseAVX > 1) ? 32 : 16;
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	525 // AVX1 supports 256bit vectors only for FLOAT and DOUBLE.
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	526 if (UseAVX > 0 && (bt == T_FLOAT \|\| bt == T_DOUBLE))
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	527 size = 32;
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	528 // Use flag to limit vector size.
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	529 size = MIN2(size,(int)MaxVectorSize);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	530 // Minimum 2 values in vector (or 4 for bytes).
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	531 switch (bt) {
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	532 case T_DOUBLE:
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	533 case T_LONG:
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	534 if (size < 16) return 0;
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	535 case T_FLOAT:
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	536 case T_INT:
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	537 if (size < 8) return 0;
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	538 case T_BOOLEAN:
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	539 case T_BYTE:
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	540 case T_CHAR:
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	541 case T_SHORT:
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	542 if (size < 4) return 0;
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	543 break;
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	544 default:
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	545 ShouldNotReachHere();
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	546 }
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	547 return size;
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	548 }
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	549
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	550 // Limits on vector size (number of elements) loaded into vector.
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	551 const int Matcher::max_vector_size(const BasicType bt) {
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	552 return vector_width_in_bytes(bt)/type2aelembytes(bt);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	553 }
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	554 const int Matcher::min_vector_size(const BasicType bt) {
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	555 int max_size = max_vector_size(bt);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	556 // Min size which can be loaded into vector is 4 bytes.
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	557 int size = (type2aelembytes(bt) == 1) ? 4 : 2;
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	558 return MIN2(size,max_size);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	559 }
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	560
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	561 // Vector ideal reg corresponding to specidied size in bytes
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	562 const int Matcher::vector_ideal_reg(int size) {
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	563 assert(MaxVectorSize >= size, "");
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	564 switch(size) {
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	565 case 4: return Op_VecS;
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	566 case 8: return Op_VecD;
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	567 case 16: return Op_VecX;
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	568 case 32: return Op_VecY;
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	569 }
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	570 ShouldNotReachHere();
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	571 return 0;
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	572 }
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	573
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	574 // x86 supports misaligned vectors store/load.
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	575 const bool Matcher::misaligned_vectors_ok() {
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	576 return !AlignVector; // can be changed by flag
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	577 }
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	578
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	579 // Helper methods for MachSpillCopyNode::implementation().
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	580 static int vec_mov_helper(CodeBuffer *cbuf, bool do_size, int src_lo, int dst_lo,
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	581 int src_hi, int dst_hi, uint ireg, outputStream* st) {
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	582 // In 64-bit VM size calculation is very complex. Emitting instructions
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	583 // into scratch buffer is used to get size in 64-bit VM.
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	584 LP64_ONLY( assert(!do_size, "this method calculates size only for 32-bit VM"); )
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	585 assert(ireg == Op_VecS \|\| // 32bit vector
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	586 (src_lo & 1) == 0 && (src_lo + 1) == src_hi &&
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	587 (dst_lo & 1) == 0 && (dst_lo + 1) == dst_hi,
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	588 "no non-adjacent vector moves" );
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	589 if (cbuf) {
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	590 MacroAssembler _masm(cbuf);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	591 int offset = __ offset();
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	592 switch (ireg) {
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	593 case Op_VecS: // copy whole register
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	594 case Op_VecD:
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	595 case Op_VecX:
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	596 __ movdqu(as_XMMRegister(Matcher::_regEncode[dst_lo]), as_XMMRegister(Matcher::_regEncode[src_lo]));
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	597 break;
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	598 case Op_VecY:
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	599 __ vmovdqu(as_XMMRegister(Matcher::_regEncode[dst_lo]), as_XMMRegister(Matcher::_regEncode[src_lo]));
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	600 break;
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	601 default:
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	602 ShouldNotReachHere();
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	603 }
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	604 int size = __ offset() - offset;
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	605 #ifdef ASSERT
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	606 // VEX_2bytes prefix is used if UseAVX > 0, so it takes the same 2 bytes as SIMD prefix.
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	607 assert(!do_size \|\| size == 4, "incorrect size calculattion");
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	608 #endif
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	609 return size;
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	610 #ifndef PRODUCT
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	611 } else if (!do_size) {
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	612 switch (ireg) {
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	613 case Op_VecS:
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	614 case Op_VecD:
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	615 case Op_VecX:
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	616 st->print("movdqu %s,%s\t# spill",Matcher::regName[dst_lo],Matcher::regName[src_lo]);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	617 break;
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	618 case Op_VecY:
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	619 st->print("vmovdqu %s,%s\t# spill",Matcher::regName[dst_lo],Matcher::regName[src_lo]);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	620 break;
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	621 default:
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	622 ShouldNotReachHere();
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	623 }
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	624 #endif
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	625 }
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	626 // VEX_2bytes prefix is used if UseAVX > 0, and it takes the same 2 bytes as SIMD prefix.
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	627 return 4;
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	628 }
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	629
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	630 static int vec_spill_helper(CodeBuffer *cbuf, bool do_size, bool is_load,
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	631 int stack_offset, int reg, uint ireg, outputStream* st) {
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	632 // In 64-bit VM size calculation is very complex. Emitting instructions
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	633 // into scratch buffer is used to get size in 64-bit VM.
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	634 LP64_ONLY( assert(!do_size, "this method calculates size only for 32-bit VM"); )
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	635 if (cbuf) {
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	636 MacroAssembler _masm(cbuf);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	637 int offset = __ offset();
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	638 if (is_load) {
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	639 switch (ireg) {
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	640 case Op_VecS:
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	641 __ movdl(as_XMMRegister(Matcher::_regEncode[reg]), Address(rsp, stack_offset));
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	642 break;
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	643 case Op_VecD:
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	644 __ movq(as_XMMRegister(Matcher::_regEncode[reg]), Address(rsp, stack_offset));
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	645 break;
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	646 case Op_VecX:
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	647 __ movdqu(as_XMMRegister(Matcher::_regEncode[reg]), Address(rsp, stack_offset));
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	648 break;
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	649 case Op_VecY:
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	650 __ vmovdqu(as_XMMRegister(Matcher::_regEncode[reg]), Address(rsp, stack_offset));
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	651 break;
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	652 default:
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	653 ShouldNotReachHere();
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	654 }
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	655 } else { // store
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	656 switch (ireg) {
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	657 case Op_VecS:
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	658 __ movdl(Address(rsp, stack_offset), as_XMMRegister(Matcher::_regEncode[reg]));
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	659 break;
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	660 case Op_VecD:
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	661 __ movq(Address(rsp, stack_offset), as_XMMRegister(Matcher::_regEncode[reg]));
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	662 break;
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	663 case Op_VecX:
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	664 __ movdqu(Address(rsp, stack_offset), as_XMMRegister(Matcher::_regEncode[reg]));
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	665 break;
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	666 case Op_VecY:
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	667 __ vmovdqu(Address(rsp, stack_offset), as_XMMRegister(Matcher::_regEncode[reg]));
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	668 break;
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	669 default:
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	670 ShouldNotReachHere();
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	671 }
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	672 }
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	673 int size = __ offset() - offset;
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	674 #ifdef ASSERT
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	675 int offset_size = (stack_offset == 0) ? 0 : ((stack_offset < 0x80) ? 1 : 4);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	676 // VEX_2bytes prefix is used if UseAVX > 0, so it takes the same 2 bytes as SIMD prefix.
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	677 assert(!do_size \|\| size == (5+offset_size), "incorrect size calculattion");
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	678 #endif
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	679 return size;
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	680 #ifndef PRODUCT
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	681 } else if (!do_size) {
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	682 if (is_load) {
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	683 switch (ireg) {
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	684 case Op_VecS:
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	685 st->print("movd %s,[rsp + %d]\t# spill", Matcher::regName[reg], stack_offset);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	686 break;
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	687 case Op_VecD:
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	688 st->print("movq %s,[rsp + %d]\t# spill", Matcher::regName[reg], stack_offset);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	689 break;
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	690 case Op_VecX:
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	691 st->print("movdqu %s,[rsp + %d]\t# spill", Matcher::regName[reg], stack_offset);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	692 break;
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	693 case Op_VecY:
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	694 st->print("vmovdqu %s,[rsp + %d]\t# spill", Matcher::regName[reg], stack_offset);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	695 break;
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	696 default:
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	697 ShouldNotReachHere();
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	698 }
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	699 } else { // store
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	700 switch (ireg) {
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	701 case Op_VecS:
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	702 st->print("movd [rsp + %d],%s\t# spill", stack_offset, Matcher::regName[reg]);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	703 break;
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	704 case Op_VecD:
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	705 st->print("movq [rsp + %d],%s\t# spill", stack_offset, Matcher::regName[reg]);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	706 break;
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	707 case Op_VecX:
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	708 st->print("movdqu [rsp + %d],%s\t# spill", stack_offset, Matcher::regName[reg]);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	709 break;
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	710 case Op_VecY:
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	711 st->print("vmovdqu [rsp + %d],%s\t# spill", stack_offset, Matcher::regName[reg]);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	712 break;
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	713 default:
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	714 ShouldNotReachHere();
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	715 }
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	716 }
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	717 #endif
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	718 }
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	719 int offset_size = (stack_offset == 0) ? 0 : ((stack_offset < 0x80) ? 1 : 4);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	720 // VEX_2bytes prefix is used if UseAVX > 0, so it takes the same 2 bytes as SIMD prefix.
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	721 return 5+offset_size;
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	722 }
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	723
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	724 static inline jfloat replicate4_imm(int con, int width) {
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	725 // Load a constant of "width" (in bytes) and replicate it to fill 32bit.
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	726 assert(width == 1 \|\| width == 2, "only byte or short types here");
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	727 int bit_width = width * 8;
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	728 jint val = con;
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	729 val &= (1 << bit_width) - 1; // mask off sign bits
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	730 while(bit_width < 32) {
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	731 val \|= (val << bit_width);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	732 bit_width <<= 1;
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	733 }
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	734 jfloat fval = ((jfloat) &val); // coerce to float type
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	735 return fval;
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	736 }
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	737
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	738 static inline jdouble replicate8_imm(int con, int width) {
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	739 // Load a constant of "width" (in bytes) and replicate it to fill 64bit.
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	740 assert(width == 1 \|\| width == 2 \|\| width == 4, "only byte, short or int types here");
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	741 int bit_width = width * 8;
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	742 jlong val = con;
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	743 val &= (((jlong) 1) << bit_width) - 1; // mask off sign bits
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	744 while(bit_width < 64) {
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	745 val \|= (val << bit_width);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	746 bit_width <<= 1;
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	747 }
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	748 jdouble dval = ((jdouble) &val); // coerce to double type
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	749 return dval;
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	750 }
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	751
4950 9b8ce46870df 7145346: VerifyStackAtCalls is broken kvn parents: 4761 diff changeset	752 #ifndef PRODUCT
9b8ce46870df 7145346: VerifyStackAtCalls is broken kvn parents: 4761 diff changeset	753 void MachNopNode::format(PhaseRegAlloc, outputStream st) const {
9b8ce46870df 7145346: VerifyStackAtCalls is broken kvn parents: 4761 diff changeset	754 st->print("nop \t# %d bytes pad for loops and calls", _count);
9b8ce46870df 7145346: VerifyStackAtCalls is broken kvn parents: 4761 diff changeset	755 }
9b8ce46870df 7145346: VerifyStackAtCalls is broken kvn parents: 4761 diff changeset	756 #endif
9b8ce46870df 7145346: VerifyStackAtCalls is broken kvn parents: 4761 diff changeset	757
9b8ce46870df 7145346: VerifyStackAtCalls is broken kvn parents: 4761 diff changeset	758 void MachNopNode::emit(CodeBuffer &cbuf, PhaseRegAlloc*) const {
9b8ce46870df 7145346: VerifyStackAtCalls is broken kvn parents: 4761 diff changeset	759 MacroAssembler _masm(&cbuf);
9b8ce46870df 7145346: VerifyStackAtCalls is broken kvn parents: 4761 diff changeset	760 __ nop(_count);
9b8ce46870df 7145346: VerifyStackAtCalls is broken kvn parents: 4761 diff changeset	761 }
9b8ce46870df 7145346: VerifyStackAtCalls is broken kvn parents: 4761 diff changeset	762
9b8ce46870df 7145346: VerifyStackAtCalls is broken kvn parents: 4761 diff changeset	763 uint MachNopNode::size(PhaseRegAlloc*) const {
9b8ce46870df 7145346: VerifyStackAtCalls is broken kvn parents: 4761 diff changeset	764 return _count;
9b8ce46870df 7145346: VerifyStackAtCalls is broken kvn parents: 4761 diff changeset	765 }
9b8ce46870df 7145346: VerifyStackAtCalls is broken kvn parents: 4761 diff changeset	766
9b8ce46870df 7145346: VerifyStackAtCalls is broken kvn parents: 4761 diff changeset	767 #ifndef PRODUCT
9b8ce46870df 7145346: VerifyStackAtCalls is broken kvn parents: 4761 diff changeset	768 void MachBreakpointNode::format(PhaseRegAlloc, outputStream st) const {
9b8ce46870df 7145346: VerifyStackAtCalls is broken kvn parents: 4761 diff changeset	769 st->print("# breakpoint");
9b8ce46870df 7145346: VerifyStackAtCalls is broken kvn parents: 4761 diff changeset	770 }
9b8ce46870df 7145346: VerifyStackAtCalls is broken kvn parents: 4761 diff changeset	771 #endif
9b8ce46870df 7145346: VerifyStackAtCalls is broken kvn parents: 4761 diff changeset	772
9b8ce46870df 7145346: VerifyStackAtCalls is broken kvn parents: 4761 diff changeset	773 void MachBreakpointNode::emit(CodeBuffer &cbuf, PhaseRegAlloc* ra_) const {
9b8ce46870df 7145346: VerifyStackAtCalls is broken kvn parents: 4761 diff changeset	774 MacroAssembler _masm(&cbuf);
9b8ce46870df 7145346: VerifyStackAtCalls is broken kvn parents: 4761 diff changeset	775 __ int3();
9b8ce46870df 7145346: VerifyStackAtCalls is broken kvn parents: 4761 diff changeset	776 }
9b8ce46870df 7145346: VerifyStackAtCalls is broken kvn parents: 4761 diff changeset	777
9b8ce46870df 7145346: VerifyStackAtCalls is broken kvn parents: 4761 diff changeset	778 uint MachBreakpointNode::size(PhaseRegAlloc* ra_) const {
9b8ce46870df 7145346: VerifyStackAtCalls is broken kvn parents: 4761 diff changeset	779 return MachNode::size(ra_);
9b8ce46870df 7145346: VerifyStackAtCalls is broken kvn parents: 4761 diff changeset	780 }
9b8ce46870df 7145346: VerifyStackAtCalls is broken kvn parents: 4761 diff changeset	781
9b8ce46870df 7145346: VerifyStackAtCalls is broken kvn parents: 4761 diff changeset	782 %}
9b8ce46870df 7145346: VerifyStackAtCalls is broken kvn parents: 4761 diff changeset	783
9b8ce46870df 7145346: VerifyStackAtCalls is broken kvn parents: 4761 diff changeset	784 encode %{
9b8ce46870df 7145346: VerifyStackAtCalls is broken kvn parents: 4761 diff changeset	785
9b8ce46870df 7145346: VerifyStackAtCalls is broken kvn parents: 4761 diff changeset	786 enc_class preserve_SP %{
9b8ce46870df 7145346: VerifyStackAtCalls is broken kvn parents: 4761 diff changeset	787 debug_only(int off0 = cbuf.insts_size());
9b8ce46870df 7145346: VerifyStackAtCalls is broken kvn parents: 4761 diff changeset	788 MacroAssembler _masm(&cbuf);
9b8ce46870df 7145346: VerifyStackAtCalls is broken kvn parents: 4761 diff changeset	789 // RBP is preserved across all calls, even compiled calls.
9b8ce46870df 7145346: VerifyStackAtCalls is broken kvn parents: 4761 diff changeset	790 // Use it to preserve RSP in places where the callee might change the SP.
9b8ce46870df 7145346: VerifyStackAtCalls is broken kvn parents: 4761 diff changeset	791 __ movptr(rbp_mh_SP_save, rsp);
9b8ce46870df 7145346: VerifyStackAtCalls is broken kvn parents: 4761 diff changeset	792 debug_only(int off1 = cbuf.insts_size());
9b8ce46870df 7145346: VerifyStackAtCalls is broken kvn parents: 4761 diff changeset	793 assert(off1 - off0 == preserve_SP_size(), "correct size prediction");
9b8ce46870df 7145346: VerifyStackAtCalls is broken kvn parents: 4761 diff changeset	794 %}
9b8ce46870df 7145346: VerifyStackAtCalls is broken kvn parents: 4761 diff changeset	795
9b8ce46870df 7145346: VerifyStackAtCalls is broken kvn parents: 4761 diff changeset	796 enc_class restore_SP %{
9b8ce46870df 7145346: VerifyStackAtCalls is broken kvn parents: 4761 diff changeset	797 MacroAssembler _masm(&cbuf);
9b8ce46870df 7145346: VerifyStackAtCalls is broken kvn parents: 4761 diff changeset	798 __ movptr(rsp, rbp_mh_SP_save);
9b8ce46870df 7145346: VerifyStackAtCalls is broken kvn parents: 4761 diff changeset	799 %}
9b8ce46870df 7145346: VerifyStackAtCalls is broken kvn parents: 4761 diff changeset	800
9b8ce46870df 7145346: VerifyStackAtCalls is broken kvn parents: 4761 diff changeset	801 enc_class call_epilog %{
9b8ce46870df 7145346: VerifyStackAtCalls is broken kvn parents: 4761 diff changeset	802 if (VerifyStackAtCalls) {
9b8ce46870df 7145346: VerifyStackAtCalls is broken kvn parents: 4761 diff changeset	803 // Check that stack depth is unchanged: find majik cookie on stack
9b8ce46870df 7145346: VerifyStackAtCalls is broken kvn parents: 4761 diff changeset	804 int framesize = ra_->reg2offset_unchecked(OptoReg::add(ra_->_matcher._old_SP, -3*VMRegImpl::slots_per_word));
9b8ce46870df 7145346: VerifyStackAtCalls is broken kvn parents: 4761 diff changeset	805 MacroAssembler _masm(&cbuf);
9b8ce46870df 7145346: VerifyStackAtCalls is broken kvn parents: 4761 diff changeset	806 Label L;
9b8ce46870df 7145346: VerifyStackAtCalls is broken kvn parents: 4761 diff changeset	807 __ cmpptr(Address(rsp, framesize), (int32_t)0xbadb100d);
9b8ce46870df 7145346: VerifyStackAtCalls is broken kvn parents: 4761 diff changeset	808 __ jccb(Assembler::equal, L);
9b8ce46870df 7145346: VerifyStackAtCalls is broken kvn parents: 4761 diff changeset	809 // Die if stack mismatch
9b8ce46870df 7145346: VerifyStackAtCalls is broken kvn parents: 4761 diff changeset	810 __ int3();
9b8ce46870df 7145346: VerifyStackAtCalls is broken kvn parents: 4761 diff changeset	811 __ bind(L);
9b8ce46870df 7145346: VerifyStackAtCalls is broken kvn parents: 4761 diff changeset	812 }
9b8ce46870df 7145346: VerifyStackAtCalls is broken kvn parents: 4761 diff changeset	813 %}
9b8ce46870df 7145346: VerifyStackAtCalls is broken kvn parents: 4761 diff changeset	814
4761 65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	815 %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	816
6179 8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	817
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	818 //----------OPERANDS-----------------------------------------------------------
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	819 // Operand definitions must precede instruction definitions for correct parsing
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	820 // in the ADLC because operands constitute user defined types which are used in
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	821 // instruction definitions.
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	822
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	823 // Vectors
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	824 operand vecS() %{
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	825 constraint(ALLOC_IN_RC(vectors_reg));
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	826 match(VecS);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	827
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	828 format %{ %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	829 interface(REG_INTER);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	830 %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	831
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	832 operand vecD() %{
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	833 constraint(ALLOC_IN_RC(vectord_reg));
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	834 match(VecD);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	835
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	836 format %{ %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	837 interface(REG_INTER);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	838 %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	839
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	840 operand vecX() %{
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	841 constraint(ALLOC_IN_RC(vectorx_reg));
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	842 match(VecX);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	843
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	844 format %{ %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	845 interface(REG_INTER);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	846 %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	847
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	848 operand vecY() %{
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	849 constraint(ALLOC_IN_RC(vectory_reg));
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	850 match(VecY);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	851
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	852 format %{ %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	853 interface(REG_INTER);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	854 %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	855
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	856
4761 65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	857 // INSTRUCTIONS -- Platform independent definitions (same for 32- and 64-bit)
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	858
4950 9b8ce46870df 7145346: VerifyStackAtCalls is broken kvn parents: 4761 diff changeset	859 // ============================================================================
9b8ce46870df 7145346: VerifyStackAtCalls is broken kvn parents: 4761 diff changeset	860
9b8ce46870df 7145346: VerifyStackAtCalls is broken kvn parents: 4761 diff changeset	861 instruct ShouldNotReachHere() %{
9b8ce46870df 7145346: VerifyStackAtCalls is broken kvn parents: 4761 diff changeset	862 match(Halt);
9b8ce46870df 7145346: VerifyStackAtCalls is broken kvn parents: 4761 diff changeset	863 format %{ "int3\t# ShouldNotReachHere" %}
9b8ce46870df 7145346: VerifyStackAtCalls is broken kvn parents: 4761 diff changeset	864 ins_encode %{
9b8ce46870df 7145346: VerifyStackAtCalls is broken kvn parents: 4761 diff changeset	865 __ int3();
9b8ce46870df 7145346: VerifyStackAtCalls is broken kvn parents: 4761 diff changeset	866 %}
9b8ce46870df 7145346: VerifyStackAtCalls is broken kvn parents: 4761 diff changeset	867 ins_pipe(pipe_slow);
9b8ce46870df 7145346: VerifyStackAtCalls is broken kvn parents: 4761 diff changeset	868 %}
9b8ce46870df 7145346: VerifyStackAtCalls is broken kvn parents: 4761 diff changeset	869
9b8ce46870df 7145346: VerifyStackAtCalls is broken kvn parents: 4761 diff changeset	870 // ============================================================================
9b8ce46870df 7145346: VerifyStackAtCalls is broken kvn parents: 4761 diff changeset	871
4761 65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	872 instruct addF_reg(regF dst, regF src) %{
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	873 predicate((UseSSE>=1) && (UseAVX == 0));
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	874 match(Set dst (AddF dst src));
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	875
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	876 format %{ "addss $dst, $src" %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	877 ins_cost(150);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	878 ins_encode %{
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	879 __ addss($dst$$XMMRegister, $src$$XMMRegister);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	880 %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	881 ins_pipe(pipe_slow);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	882 %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	883
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	884 instruct addF_mem(regF dst, memory src) %{
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	885 predicate((UseSSE>=1) && (UseAVX == 0));
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	886 match(Set dst (AddF dst (LoadF src)));
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	887
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	888 format %{ "addss $dst, $src" %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	889 ins_cost(150);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	890 ins_encode %{
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	891 __ addss($dst$$XMMRegister, $src$$Address);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	892 %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	893 ins_pipe(pipe_slow);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	894 %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	895
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	896 instruct addF_imm(regF dst, immF con) %{
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	897 predicate((UseSSE>=1) && (UseAVX == 0));
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	898 match(Set dst (AddF dst con));
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	899 format %{ "addss $dst, [$constantaddress]\t# load from constant table: float=$con" %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	900 ins_cost(150);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	901 ins_encode %{
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	902 __ addss($dst$$XMMRegister, $constantaddress($con));
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	903 %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	904 ins_pipe(pipe_slow);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	905 %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	906
6225 2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	907 instruct addF_reg_reg(regF dst, regF src1, regF src2) %{
4761 65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	908 predicate(UseAVX > 0);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	909 match(Set dst (AddF src1 src2));
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	910
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	911 format %{ "vaddss $dst, $src1, $src2" %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	912 ins_cost(150);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	913 ins_encode %{
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	914 __ vaddss($dst$$XMMRegister, $src1$$XMMRegister, $src2$$XMMRegister);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	915 %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	916 ins_pipe(pipe_slow);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	917 %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	918
6225 2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	919 instruct addF_reg_mem(regF dst, regF src1, memory src2) %{
4761 65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	920 predicate(UseAVX > 0);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	921 match(Set dst (AddF src1 (LoadF src2)));
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	922
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	923 format %{ "vaddss $dst, $src1, $src2" %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	924 ins_cost(150);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	925 ins_encode %{
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	926 __ vaddss($dst$$XMMRegister, $src1$$XMMRegister, $src2$$Address);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	927 %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	928 ins_pipe(pipe_slow);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	929 %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	930
6225 2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	931 instruct addF_reg_imm(regF dst, regF src, immF con) %{
4761 65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	932 predicate(UseAVX > 0);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	933 match(Set dst (AddF src con));
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	934
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	935 format %{ "vaddss $dst, $src, [$constantaddress]\t# load from constant table: float=$con" %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	936 ins_cost(150);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	937 ins_encode %{
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	938 __ vaddss($dst$$XMMRegister, $src$$XMMRegister, $constantaddress($con));
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	939 %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	940 ins_pipe(pipe_slow);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	941 %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	942
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	943 instruct addD_reg(regD dst, regD src) %{
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	944 predicate((UseSSE>=2) && (UseAVX == 0));
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	945 match(Set dst (AddD dst src));
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	946
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	947 format %{ "addsd $dst, $src" %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	948 ins_cost(150);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	949 ins_encode %{
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	950 __ addsd($dst$$XMMRegister, $src$$XMMRegister);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	951 %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	952 ins_pipe(pipe_slow);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	953 %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	954
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	955 instruct addD_mem(regD dst, memory src) %{
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	956 predicate((UseSSE>=2) && (UseAVX == 0));
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	957 match(Set dst (AddD dst (LoadD src)));
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	958
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	959 format %{ "addsd $dst, $src" %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	960 ins_cost(150);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	961 ins_encode %{
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	962 __ addsd($dst$$XMMRegister, $src$$Address);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	963 %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	964 ins_pipe(pipe_slow);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	965 %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	966
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	967 instruct addD_imm(regD dst, immD con) %{
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	968 predicate((UseSSE>=2) && (UseAVX == 0));
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	969 match(Set dst (AddD dst con));
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	970 format %{ "addsd $dst, [$constantaddress]\t# load from constant table: double=$con" %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	971 ins_cost(150);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	972 ins_encode %{
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	973 __ addsd($dst$$XMMRegister, $constantaddress($con));
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	974 %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	975 ins_pipe(pipe_slow);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	976 %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	977
6225 2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	978 instruct addD_reg_reg(regD dst, regD src1, regD src2) %{
4761 65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	979 predicate(UseAVX > 0);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	980 match(Set dst (AddD src1 src2));
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	981
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	982 format %{ "vaddsd $dst, $src1, $src2" %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	983 ins_cost(150);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	984 ins_encode %{
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	985 __ vaddsd($dst$$XMMRegister, $src1$$XMMRegister, $src2$$XMMRegister);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	986 %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	987 ins_pipe(pipe_slow);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	988 %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	989
6225 2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	990 instruct addD_reg_mem(regD dst, regD src1, memory src2) %{
4761 65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	991 predicate(UseAVX > 0);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	992 match(Set dst (AddD src1 (LoadD src2)));
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	993
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	994 format %{ "vaddsd $dst, $src1, $src2" %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	995 ins_cost(150);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	996 ins_encode %{
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	997 __ vaddsd($dst$$XMMRegister, $src1$$XMMRegister, $src2$$Address);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	998 %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	999 ins_pipe(pipe_slow);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1000 %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1001
6225 2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	1002 instruct addD_reg_imm(regD dst, regD src, immD con) %{
4761 65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1003 predicate(UseAVX > 0);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1004 match(Set dst (AddD src con));
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1005
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1006 format %{ "vaddsd $dst, $src, [$constantaddress]\t# load from constant table: double=$con" %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1007 ins_cost(150);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1008 ins_encode %{
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1009 __ vaddsd($dst$$XMMRegister, $src$$XMMRegister, $constantaddress($con));
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1010 %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1011 ins_pipe(pipe_slow);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1012 %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1013
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1014 instruct subF_reg(regF dst, regF src) %{
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1015 predicate((UseSSE>=1) && (UseAVX == 0));
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1016 match(Set dst (SubF dst src));
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1017
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1018 format %{ "subss $dst, $src" %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1019 ins_cost(150);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1020 ins_encode %{
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1021 __ subss($dst$$XMMRegister, $src$$XMMRegister);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1022 %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1023 ins_pipe(pipe_slow);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1024 %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1025
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1026 instruct subF_mem(regF dst, memory src) %{
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1027 predicate((UseSSE>=1) && (UseAVX == 0));
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1028 match(Set dst (SubF dst (LoadF src)));
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1029
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1030 format %{ "subss $dst, $src" %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1031 ins_cost(150);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1032 ins_encode %{
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1033 __ subss($dst$$XMMRegister, $src$$Address);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1034 %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1035 ins_pipe(pipe_slow);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1036 %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1037
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1038 instruct subF_imm(regF dst, immF con) %{
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1039 predicate((UseSSE>=1) && (UseAVX == 0));
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1040 match(Set dst (SubF dst con));
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1041 format %{ "subss $dst, [$constantaddress]\t# load from constant table: float=$con" %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1042 ins_cost(150);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1043 ins_encode %{
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1044 __ subss($dst$$XMMRegister, $constantaddress($con));
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1045 %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1046 ins_pipe(pipe_slow);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1047 %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1048
6225 2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	1049 instruct subF_reg_reg(regF dst, regF src1, regF src2) %{
4761 65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1050 predicate(UseAVX > 0);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1051 match(Set dst (SubF src1 src2));
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1052
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1053 format %{ "vsubss $dst, $src1, $src2" %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1054 ins_cost(150);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1055 ins_encode %{
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1056 __ vsubss($dst$$XMMRegister, $src1$$XMMRegister, $src2$$XMMRegister);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1057 %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1058 ins_pipe(pipe_slow);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1059 %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1060
6225 2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	1061 instruct subF_reg_mem(regF dst, regF src1, memory src2) %{
4761 65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1062 predicate(UseAVX > 0);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1063 match(Set dst (SubF src1 (LoadF src2)));
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1064
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1065 format %{ "vsubss $dst, $src1, $src2" %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1066 ins_cost(150);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1067 ins_encode %{
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1068 __ vsubss($dst$$XMMRegister, $src1$$XMMRegister, $src2$$Address);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1069 %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1070 ins_pipe(pipe_slow);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1071 %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1072
6225 2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	1073 instruct subF_reg_imm(regF dst, regF src, immF con) %{
4761 65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1074 predicate(UseAVX > 0);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1075 match(Set dst (SubF src con));
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1076
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1077 format %{ "vsubss $dst, $src, [$constantaddress]\t# load from constant table: float=$con" %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1078 ins_cost(150);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1079 ins_encode %{
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1080 __ vsubss($dst$$XMMRegister, $src$$XMMRegister, $constantaddress($con));
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1081 %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1082 ins_pipe(pipe_slow);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1083 %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1084
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1085 instruct subD_reg(regD dst, regD src) %{
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1086 predicate((UseSSE>=2) && (UseAVX == 0));
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1087 match(Set dst (SubD dst src));
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1088
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1089 format %{ "subsd $dst, $src" %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1090 ins_cost(150);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1091 ins_encode %{
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1092 __ subsd($dst$$XMMRegister, $src$$XMMRegister);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1093 %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1094 ins_pipe(pipe_slow);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1095 %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1096
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1097 instruct subD_mem(regD dst, memory src) %{
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1098 predicate((UseSSE>=2) && (UseAVX == 0));
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1099 match(Set dst (SubD dst (LoadD src)));
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1100
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1101 format %{ "subsd $dst, $src" %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1102 ins_cost(150);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1103 ins_encode %{
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1104 __ subsd($dst$$XMMRegister, $src$$Address);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1105 %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1106 ins_pipe(pipe_slow);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1107 %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1108
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1109 instruct subD_imm(regD dst, immD con) %{
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1110 predicate((UseSSE>=2) && (UseAVX == 0));
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1111 match(Set dst (SubD dst con));
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1112 format %{ "subsd $dst, [$constantaddress]\t# load from constant table: double=$con" %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1113 ins_cost(150);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1114 ins_encode %{
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1115 __ subsd($dst$$XMMRegister, $constantaddress($con));
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1116 %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1117 ins_pipe(pipe_slow);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1118 %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1119
6225 2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	1120 instruct subD_reg_reg(regD dst, regD src1, regD src2) %{
4761 65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1121 predicate(UseAVX > 0);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1122 match(Set dst (SubD src1 src2));
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1123
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1124 format %{ "vsubsd $dst, $src1, $src2" %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1125 ins_cost(150);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1126 ins_encode %{
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1127 __ vsubsd($dst$$XMMRegister, $src1$$XMMRegister, $src2$$XMMRegister);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1128 %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1129 ins_pipe(pipe_slow);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1130 %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1131
6225 2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	1132 instruct subD_reg_mem(regD dst, regD src1, memory src2) %{
4761 65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1133 predicate(UseAVX > 0);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1134 match(Set dst (SubD src1 (LoadD src2)));
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1135
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1136 format %{ "vsubsd $dst, $src1, $src2" %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1137 ins_cost(150);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1138 ins_encode %{
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1139 __ vsubsd($dst$$XMMRegister, $src1$$XMMRegister, $src2$$Address);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1140 %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1141 ins_pipe(pipe_slow);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1142 %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1143
6225 2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	1144 instruct subD_reg_imm(regD dst, regD src, immD con) %{
4761 65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1145 predicate(UseAVX > 0);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1146 match(Set dst (SubD src con));
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1147
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1148 format %{ "vsubsd $dst, $src, [$constantaddress]\t# load from constant table: double=$con" %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1149 ins_cost(150);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1150 ins_encode %{
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1151 __ vsubsd($dst$$XMMRegister, $src$$XMMRegister, $constantaddress($con));
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1152 %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1153 ins_pipe(pipe_slow);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1154 %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1155
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1156 instruct mulF_reg(regF dst, regF src) %{
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1157 predicate((UseSSE>=1) && (UseAVX == 0));
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1158 match(Set dst (MulF dst src));
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1159
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1160 format %{ "mulss $dst, $src" %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1161 ins_cost(150);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1162 ins_encode %{
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1163 __ mulss($dst$$XMMRegister, $src$$XMMRegister);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1164 %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1165 ins_pipe(pipe_slow);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1166 %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1167
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1168 instruct mulF_mem(regF dst, memory src) %{
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1169 predicate((UseSSE>=1) && (UseAVX == 0));
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1170 match(Set dst (MulF dst (LoadF src)));
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1171
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1172 format %{ "mulss $dst, $src" %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1173 ins_cost(150);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1174 ins_encode %{
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1175 __ mulss($dst$$XMMRegister, $src$$Address);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1176 %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1177 ins_pipe(pipe_slow);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1178 %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1179
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1180 instruct mulF_imm(regF dst, immF con) %{
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1181 predicate((UseSSE>=1) && (UseAVX == 0));
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1182 match(Set dst (MulF dst con));
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1183 format %{ "mulss $dst, [$constantaddress]\t# load from constant table: float=$con" %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1184 ins_cost(150);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1185 ins_encode %{
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1186 __ mulss($dst$$XMMRegister, $constantaddress($con));
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1187 %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1188 ins_pipe(pipe_slow);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1189 %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1190
6225 2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	1191 instruct mulF_reg_reg(regF dst, regF src1, regF src2) %{
4761 65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1192 predicate(UseAVX > 0);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1193 match(Set dst (MulF src1 src2));
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1194
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1195 format %{ "vmulss $dst, $src1, $src2" %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1196 ins_cost(150);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1197 ins_encode %{
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1198 __ vmulss($dst$$XMMRegister, $src1$$XMMRegister, $src2$$XMMRegister);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1199 %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1200 ins_pipe(pipe_slow);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1201 %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1202
6225 2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	1203 instruct mulF_reg_mem(regF dst, regF src1, memory src2) %{
4761 65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1204 predicate(UseAVX > 0);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1205 match(Set dst (MulF src1 (LoadF src2)));
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1206
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1207 format %{ "vmulss $dst, $src1, $src2" %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1208 ins_cost(150);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1209 ins_encode %{
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1210 __ vmulss($dst$$XMMRegister, $src1$$XMMRegister, $src2$$Address);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1211 %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1212 ins_pipe(pipe_slow);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1213 %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1214
6225 2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	1215 instruct mulF_reg_imm(regF dst, regF src, immF con) %{
4761 65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1216 predicate(UseAVX > 0);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1217 match(Set dst (MulF src con));
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1218
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1219 format %{ "vmulss $dst, $src, [$constantaddress]\t# load from constant table: float=$con" %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1220 ins_cost(150);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1221 ins_encode %{
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1222 __ vmulss($dst$$XMMRegister, $src$$XMMRegister, $constantaddress($con));
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1223 %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1224 ins_pipe(pipe_slow);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1225 %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1226
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1227 instruct mulD_reg(regD dst, regD src) %{
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1228 predicate((UseSSE>=2) && (UseAVX == 0));
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1229 match(Set dst (MulD dst src));
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1230
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1231 format %{ "mulsd $dst, $src" %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1232 ins_cost(150);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1233 ins_encode %{
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1234 __ mulsd($dst$$XMMRegister, $src$$XMMRegister);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1235 %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1236 ins_pipe(pipe_slow);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1237 %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1238
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1239 instruct mulD_mem(regD dst, memory src) %{
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1240 predicate((UseSSE>=2) && (UseAVX == 0));
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1241 match(Set dst (MulD dst (LoadD src)));
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1242
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1243 format %{ "mulsd $dst, $src" %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1244 ins_cost(150);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1245 ins_encode %{
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1246 __ mulsd($dst$$XMMRegister, $src$$Address);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1247 %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1248 ins_pipe(pipe_slow);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1249 %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1250
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1251 instruct mulD_imm(regD dst, immD con) %{
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1252 predicate((UseSSE>=2) && (UseAVX == 0));
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1253 match(Set dst (MulD dst con));
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1254 format %{ "mulsd $dst, [$constantaddress]\t# load from constant table: double=$con" %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1255 ins_cost(150);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1256 ins_encode %{
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1257 __ mulsd($dst$$XMMRegister, $constantaddress($con));
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1258 %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1259 ins_pipe(pipe_slow);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1260 %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1261
6225 2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	1262 instruct mulD_reg_reg(regD dst, regD src1, regD src2) %{
4761 65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1263 predicate(UseAVX > 0);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1264 match(Set dst (MulD src1 src2));
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1265
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1266 format %{ "vmulsd $dst, $src1, $src2" %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1267 ins_cost(150);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1268 ins_encode %{
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1269 __ vmulsd($dst$$XMMRegister, $src1$$XMMRegister, $src2$$XMMRegister);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1270 %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1271 ins_pipe(pipe_slow);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1272 %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1273
6225 2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	1274 instruct mulD_reg_mem(regD dst, regD src1, memory src2) %{
4761 65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1275 predicate(UseAVX > 0);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1276 match(Set dst (MulD src1 (LoadD src2)));
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1277
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1278 format %{ "vmulsd $dst, $src1, $src2" %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1279 ins_cost(150);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1280 ins_encode %{
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1281 __ vmulsd($dst$$XMMRegister, $src1$$XMMRegister, $src2$$Address);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1282 %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1283 ins_pipe(pipe_slow);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1284 %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1285
6225 2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	1286 instruct mulD_reg_imm(regD dst, regD src, immD con) %{
4761 65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1287 predicate(UseAVX > 0);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1288 match(Set dst (MulD src con));
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1289
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1290 format %{ "vmulsd $dst, $src, [$constantaddress]\t# load from constant table: double=$con" %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1291 ins_cost(150);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1292 ins_encode %{
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1293 __ vmulsd($dst$$XMMRegister, $src$$XMMRegister, $constantaddress($con));
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1294 %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1295 ins_pipe(pipe_slow);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1296 %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1297
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1298 instruct divF_reg(regF dst, regF src) %{
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1299 predicate((UseSSE>=1) && (UseAVX == 0));
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1300 match(Set dst (DivF dst src));
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1301
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1302 format %{ "divss $dst, $src" %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1303 ins_cost(150);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1304 ins_encode %{
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1305 __ divss($dst$$XMMRegister, $src$$XMMRegister);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1306 %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1307 ins_pipe(pipe_slow);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1308 %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1309
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1310 instruct divF_mem(regF dst, memory src) %{
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1311 predicate((UseSSE>=1) && (UseAVX == 0));
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1312 match(Set dst (DivF dst (LoadF src)));
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1313
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1314 format %{ "divss $dst, $src" %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1315 ins_cost(150);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1316 ins_encode %{
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1317 __ divss($dst$$XMMRegister, $src$$Address);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1318 %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1319 ins_pipe(pipe_slow);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1320 %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1321
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1322 instruct divF_imm(regF dst, immF con) %{
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1323 predicate((UseSSE>=1) && (UseAVX == 0));
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1324 match(Set dst (DivF dst con));
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1325 format %{ "divss $dst, [$constantaddress]\t# load from constant table: float=$con" %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1326 ins_cost(150);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1327 ins_encode %{
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1328 __ divss($dst$$XMMRegister, $constantaddress($con));
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1329 %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1330 ins_pipe(pipe_slow);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1331 %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1332
6225 2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	1333 instruct divF_reg_reg(regF dst, regF src1, regF src2) %{
4761 65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1334 predicate(UseAVX > 0);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1335 match(Set dst (DivF src1 src2));
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1336
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1337 format %{ "vdivss $dst, $src1, $src2" %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1338 ins_cost(150);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1339 ins_encode %{
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1340 __ vdivss($dst$$XMMRegister, $src1$$XMMRegister, $src2$$XMMRegister);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1341 %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1342 ins_pipe(pipe_slow);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1343 %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1344
6225 2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	1345 instruct divF_reg_mem(regF dst, regF src1, memory src2) %{
4761 65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1346 predicate(UseAVX > 0);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1347 match(Set dst (DivF src1 (LoadF src2)));
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1348
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1349 format %{ "vdivss $dst, $src1, $src2" %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1350 ins_cost(150);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1351 ins_encode %{
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1352 __ vdivss($dst$$XMMRegister, $src1$$XMMRegister, $src2$$Address);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1353 %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1354 ins_pipe(pipe_slow);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1355 %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1356
6225 2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	1357 instruct divF_reg_imm(regF dst, regF src, immF con) %{
4761 65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1358 predicate(UseAVX > 0);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1359 match(Set dst (DivF src con));
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1360
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1361 format %{ "vdivss $dst, $src, [$constantaddress]\t# load from constant table: float=$con" %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1362 ins_cost(150);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1363 ins_encode %{
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1364 __ vdivss($dst$$XMMRegister, $src$$XMMRegister, $constantaddress($con));
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1365 %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1366 ins_pipe(pipe_slow);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1367 %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1368
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1369 instruct divD_reg(regD dst, regD src) %{
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1370 predicate((UseSSE>=2) && (UseAVX == 0));
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1371 match(Set dst (DivD dst src));
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1372
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1373 format %{ "divsd $dst, $src" %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1374 ins_cost(150);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1375 ins_encode %{
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1376 __ divsd($dst$$XMMRegister, $src$$XMMRegister);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1377 %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1378 ins_pipe(pipe_slow);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1379 %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1380
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1381 instruct divD_mem(regD dst, memory src) %{
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1382 predicate((UseSSE>=2) && (UseAVX == 0));
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1383 match(Set dst (DivD dst (LoadD src)));
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1384
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1385 format %{ "divsd $dst, $src" %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1386 ins_cost(150);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1387 ins_encode %{
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1388 __ divsd($dst$$XMMRegister, $src$$Address);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1389 %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1390 ins_pipe(pipe_slow);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1391 %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1392
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1393 instruct divD_imm(regD dst, immD con) %{
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1394 predicate((UseSSE>=2) && (UseAVX == 0));
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1395 match(Set dst (DivD dst con));
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1396 format %{ "divsd $dst, [$constantaddress]\t# load from constant table: double=$con" %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1397 ins_cost(150);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1398 ins_encode %{
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1399 __ divsd($dst$$XMMRegister, $constantaddress($con));
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1400 %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1401 ins_pipe(pipe_slow);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1402 %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1403
6225 2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	1404 instruct divD_reg_reg(regD dst, regD src1, regD src2) %{
4761 65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1405 predicate(UseAVX > 0);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1406 match(Set dst (DivD src1 src2));
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1407
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1408 format %{ "vdivsd $dst, $src1, $src2" %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1409 ins_cost(150);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1410 ins_encode %{
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1411 __ vdivsd($dst$$XMMRegister, $src1$$XMMRegister, $src2$$XMMRegister);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1412 %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1413 ins_pipe(pipe_slow);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1414 %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1415
6225 2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	1416 instruct divD_reg_mem(regD dst, regD src1, memory src2) %{
4761 65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1417 predicate(UseAVX > 0);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1418 match(Set dst (DivD src1 (LoadD src2)));
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1419
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1420 format %{ "vdivsd $dst, $src1, $src2" %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1421 ins_cost(150);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1422 ins_encode %{
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1423 __ vdivsd($dst$$XMMRegister, $src1$$XMMRegister, $src2$$Address);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1424 %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1425 ins_pipe(pipe_slow);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1426 %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1427
6225 2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	1428 instruct divD_reg_imm(regD dst, regD src, immD con) %{
4761 65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1429 predicate(UseAVX > 0);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1430 match(Set dst (DivD src con));
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1431
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1432 format %{ "vdivsd $dst, $src, [$constantaddress]\t# load from constant table: double=$con" %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1433 ins_cost(150);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1434 ins_encode %{
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1435 __ vdivsd($dst$$XMMRegister, $src$$XMMRegister, $constantaddress($con));
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1436 %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1437 ins_pipe(pipe_slow);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1438 %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1439
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1440 instruct absF_reg(regF dst) %{
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1441 predicate((UseSSE>=1) && (UseAVX == 0));
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1442 match(Set dst (AbsF dst));
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1443 ins_cost(150);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1444 format %{ "andps $dst, [0x7fffffff]\t# abs float by sign masking" %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1445 ins_encode %{
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1446 __ andps($dst$$XMMRegister, ExternalAddress(float_signmask()));
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1447 %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1448 ins_pipe(pipe_slow);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1449 %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1450
6225 2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	1451 instruct absF_reg_reg(regF dst, regF src) %{
4761 65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1452 predicate(UseAVX > 0);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1453 match(Set dst (AbsF src));
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1454 ins_cost(150);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1455 format %{ "vandps $dst, $src, [0x7fffffff]\t# abs float by sign masking" %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1456 ins_encode %{
6614 006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	1457 bool vector256 = false;
4761 65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1458 __ vandps($dst$$XMMRegister, $src$$XMMRegister,
6614 006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	1459 ExternalAddress(float_signmask()), vector256);
4761 65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1460 %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1461 ins_pipe(pipe_slow);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1462 %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1463
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1464 instruct absD_reg(regD dst) %{
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1465 predicate((UseSSE>=2) && (UseAVX == 0));
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1466 match(Set dst (AbsD dst));
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1467 ins_cost(150);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1468 format %{ "andpd $dst, [0x7fffffffffffffff]\t"
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1469 "# abs double by sign masking" %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1470 ins_encode %{
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1471 __ andpd($dst$$XMMRegister, ExternalAddress(double_signmask()));
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1472 %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1473 ins_pipe(pipe_slow);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1474 %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1475
6225 2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	1476 instruct absD_reg_reg(regD dst, regD src) %{
4761 65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1477 predicate(UseAVX > 0);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1478 match(Set dst (AbsD src));
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1479 ins_cost(150);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1480 format %{ "vandpd $dst, $src, [0x7fffffffffffffff]\t"
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1481 "# abs double by sign masking" %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1482 ins_encode %{
6614 006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	1483 bool vector256 = false;
4761 65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1484 __ vandpd($dst$$XMMRegister, $src$$XMMRegister,
6614 006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	1485 ExternalAddress(double_signmask()), vector256);
4761 65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1486 %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1487 ins_pipe(pipe_slow);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1488 %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1489
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1490 instruct negF_reg(regF dst) %{
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1491 predicate((UseSSE>=1) && (UseAVX == 0));
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1492 match(Set dst (NegF dst));
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1493 ins_cost(150);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1494 format %{ "xorps $dst, [0x80000000]\t# neg float by sign flipping" %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1495 ins_encode %{
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1496 __ xorps($dst$$XMMRegister, ExternalAddress(float_signflip()));
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1497 %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1498 ins_pipe(pipe_slow);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1499 %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1500
6225 2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	1501 instruct negF_reg_reg(regF dst, regF src) %{
4761 65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1502 predicate(UseAVX > 0);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1503 match(Set dst (NegF src));
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1504 ins_cost(150);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1505 format %{ "vxorps $dst, $src, [0x80000000]\t# neg float by sign flipping" %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1506 ins_encode %{
6614 006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	1507 bool vector256 = false;
4761 65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1508 __ vxorps($dst$$XMMRegister, $src$$XMMRegister,
6614 006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	1509 ExternalAddress(float_signflip()), vector256);
4761 65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1510 %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1511 ins_pipe(pipe_slow);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1512 %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1513
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1514 instruct negD_reg(regD dst) %{
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1515 predicate((UseSSE>=2) && (UseAVX == 0));
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1516 match(Set dst (NegD dst));
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1517 ins_cost(150);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1518 format %{ "xorpd $dst, [0x8000000000000000]\t"
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1519 "# neg double by sign flipping" %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1520 ins_encode %{
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1521 __ xorpd($dst$$XMMRegister, ExternalAddress(double_signflip()));
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1522 %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1523 ins_pipe(pipe_slow);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1524 %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1525
6225 2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	1526 instruct negD_reg_reg(regD dst, regD src) %{
4761 65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1527 predicate(UseAVX > 0);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1528 match(Set dst (NegD src));
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1529 ins_cost(150);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1530 format %{ "vxorpd $dst, $src, [0x8000000000000000]\t"
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1531 "# neg double by sign flipping" %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1532 ins_encode %{
6614 006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	1533 bool vector256 = false;
4761 65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1534 __ vxorpd($dst$$XMMRegister, $src$$XMMRegister,
6614 006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	1535 ExternalAddress(double_signflip()), vector256);
4761 65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1536 %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1537 ins_pipe(pipe_slow);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1538 %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1539
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1540 instruct sqrtF_reg(regF dst, regF src) %{
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1541 predicate(UseSSE>=1);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1542 match(Set dst (ConvD2F (SqrtD (ConvF2D src))));
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1543
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1544 format %{ "sqrtss $dst, $src" %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1545 ins_cost(150);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1546 ins_encode %{
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1547 __ sqrtss($dst$$XMMRegister, $src$$XMMRegister);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1548 %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1549 ins_pipe(pipe_slow);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1550 %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1551
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1552 instruct sqrtF_mem(regF dst, memory src) %{
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1553 predicate(UseSSE>=1);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1554 match(Set dst (ConvD2F (SqrtD (ConvF2D (LoadF src)))));
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1555
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1556 format %{ "sqrtss $dst, $src" %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1557 ins_cost(150);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1558 ins_encode %{
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1559 __ sqrtss($dst$$XMMRegister, $src$$Address);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1560 %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1561 ins_pipe(pipe_slow);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1562 %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1563
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1564 instruct sqrtF_imm(regF dst, immF con) %{
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1565 predicate(UseSSE>=1);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1566 match(Set dst (ConvD2F (SqrtD (ConvF2D con))));
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1567 format %{ "sqrtss $dst, [$constantaddress]\t# load from constant table: float=$con" %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1568 ins_cost(150);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1569 ins_encode %{
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1570 __ sqrtss($dst$$XMMRegister, $constantaddress($con));
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1571 %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1572 ins_pipe(pipe_slow);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1573 %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1574
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1575 instruct sqrtD_reg(regD dst, regD src) %{
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1576 predicate(UseSSE>=2);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1577 match(Set dst (SqrtD src));
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1578
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1579 format %{ "sqrtsd $dst, $src" %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1580 ins_cost(150);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1581 ins_encode %{
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1582 __ sqrtsd($dst$$XMMRegister, $src$$XMMRegister);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1583 %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1584 ins_pipe(pipe_slow);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1585 %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1586
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1587 instruct sqrtD_mem(regD dst, memory src) %{
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1588 predicate(UseSSE>=2);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1589 match(Set dst (SqrtD (LoadD src)));
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1590
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1591 format %{ "sqrtsd $dst, $src" %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1592 ins_cost(150);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1593 ins_encode %{
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1594 __ sqrtsd($dst$$XMMRegister, $src$$Address);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1595 %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1596 ins_pipe(pipe_slow);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1597 %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1598
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1599 instruct sqrtD_imm(regD dst, immD con) %{
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1600 predicate(UseSSE>=2);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1601 match(Set dst (SqrtD con));
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1602 format %{ "sqrtsd $dst, [$constantaddress]\t# load from constant table: double=$con" %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1603 ins_cost(150);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1604 ins_encode %{
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1605 __ sqrtsd($dst$$XMMRegister, $constantaddress($con));
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1606 %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1607 ins_pipe(pipe_slow);
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1608 %}
65149e74c706 7121648: Use 3-operands SIMD instructions on x86 with AVX kvn parents: diff changeset	1609
6179 8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1610
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1611 // ====================VECTOR INSTRUCTIONS=====================================
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1612
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1613 // Load vectors (4 bytes long)
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1614 instruct loadV4(vecS dst, memory mem) %{
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1615 predicate(n->as_LoadVector()->memory_size() == 4);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1616 match(Set dst (LoadVector mem));
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1617 ins_cost(125);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1618 format %{ "movd $dst,$mem\t! load vector (4 bytes)" %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1619 ins_encode %{
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1620 __ movdl($dst$$XMMRegister, $mem$$Address);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1621 %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1622 ins_pipe( pipe_slow );
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1623 %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1624
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1625 // Load vectors (8 bytes long)
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1626 instruct loadV8(vecD dst, memory mem) %{
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1627 predicate(n->as_LoadVector()->memory_size() == 8);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1628 match(Set dst (LoadVector mem));
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1629 ins_cost(125);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1630 format %{ "movq $dst,$mem\t! load vector (8 bytes)" %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1631 ins_encode %{
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1632 __ movq($dst$$XMMRegister, $mem$$Address);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1633 %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1634 ins_pipe( pipe_slow );
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1635 %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1636
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1637 // Load vectors (16 bytes long)
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1638 instruct loadV16(vecX dst, memory mem) %{
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1639 predicate(n->as_LoadVector()->memory_size() == 16);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1640 match(Set dst (LoadVector mem));
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1641 ins_cost(125);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1642 format %{ "movdqu $dst,$mem\t! load vector (16 bytes)" %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1643 ins_encode %{
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1644 __ movdqu($dst$$XMMRegister, $mem$$Address);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1645 %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1646 ins_pipe( pipe_slow );
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1647 %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1648
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1649 // Load vectors (32 bytes long)
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1650 instruct loadV32(vecY dst, memory mem) %{
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1651 predicate(n->as_LoadVector()->memory_size() == 32);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1652 match(Set dst (LoadVector mem));
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1653 ins_cost(125);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1654 format %{ "vmovdqu $dst,$mem\t! load vector (32 bytes)" %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1655 ins_encode %{
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1656 __ vmovdqu($dst$$XMMRegister, $mem$$Address);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1657 %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1658 ins_pipe( pipe_slow );
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1659 %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1660
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1661 // Store vectors
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1662 instruct storeV4(memory mem, vecS src) %{
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1663 predicate(n->as_StoreVector()->memory_size() == 4);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1664 match(Set mem (StoreVector mem src));
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1665 ins_cost(145);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1666 format %{ "movd $mem,$src\t! store vector (4 bytes)" %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1667 ins_encode %{
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1668 __ movdl($mem$$Address, $src$$XMMRegister);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1669 %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1670 ins_pipe( pipe_slow );
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1671 %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1672
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1673 instruct storeV8(memory mem, vecD src) %{
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1674 predicate(n->as_StoreVector()->memory_size() == 8);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1675 match(Set mem (StoreVector mem src));
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1676 ins_cost(145);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1677 format %{ "movq $mem,$src\t! store vector (8 bytes)" %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1678 ins_encode %{
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1679 __ movq($mem$$Address, $src$$XMMRegister);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1680 %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1681 ins_pipe( pipe_slow );
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1682 %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1683
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1684 instruct storeV16(memory mem, vecX src) %{
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1685 predicate(n->as_StoreVector()->memory_size() == 16);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1686 match(Set mem (StoreVector mem src));
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1687 ins_cost(145);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1688 format %{ "movdqu $mem,$src\t! store vector (16 bytes)" %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1689 ins_encode %{
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1690 __ movdqu($mem$$Address, $src$$XMMRegister);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1691 %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1692 ins_pipe( pipe_slow );
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1693 %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1694
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1695 instruct storeV32(memory mem, vecY src) %{
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1696 predicate(n->as_StoreVector()->memory_size() == 32);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1697 match(Set mem (StoreVector mem src));
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1698 ins_cost(145);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1699 format %{ "vmovdqu $mem,$src\t! store vector (32 bytes)" %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1700 ins_encode %{
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1701 __ vmovdqu($mem$$Address, $src$$XMMRegister);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1702 %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1703 ins_pipe( pipe_slow );
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1704 %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1705
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1706 // Replicate byte scalar to be vector
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1707 instruct Repl4B(vecS dst, rRegI src) %{
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1708 predicate(n->as_Vector()->length() == 4);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1709 match(Set dst (ReplicateB src));
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1710 format %{ "movd $dst,$src\n\t"
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1711 "punpcklbw $dst,$dst\n\t"
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1712 "pshuflw $dst,$dst,0x00\t! replicate4B" %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1713 ins_encode %{
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1714 __ movdl($dst$$XMMRegister, $src$$Register);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1715 __ punpcklbw($dst$$XMMRegister, $dst$$XMMRegister);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1716 __ pshuflw($dst$$XMMRegister, $dst$$XMMRegister, 0x00);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1717 %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1718 ins_pipe( pipe_slow );
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1719 %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1720
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1721 instruct Repl8B(vecD dst, rRegI src) %{
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1722 predicate(n->as_Vector()->length() == 8);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1723 match(Set dst (ReplicateB src));
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1724 format %{ "movd $dst,$src\n\t"
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1725 "punpcklbw $dst,$dst\n\t"
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1726 "pshuflw $dst,$dst,0x00\t! replicate8B" %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1727 ins_encode %{
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1728 __ movdl($dst$$XMMRegister, $src$$Register);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1729 __ punpcklbw($dst$$XMMRegister, $dst$$XMMRegister);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1730 __ pshuflw($dst$$XMMRegister, $dst$$XMMRegister, 0x00);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1731 %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1732 ins_pipe( pipe_slow );
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1733 %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1734
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1735 instruct Repl16B(vecX dst, rRegI src) %{
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1736 predicate(n->as_Vector()->length() == 16);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1737 match(Set dst (ReplicateB src));
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1738 format %{ "movd $dst,$src\n\t"
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1739 "punpcklbw $dst,$dst\n\t"
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1740 "pshuflw $dst,$dst,0x00\n\t"
6225 2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	1741 "punpcklqdq $dst,$dst\t! replicate16B" %}
6179 8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1742 ins_encode %{
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1743 __ movdl($dst$$XMMRegister, $src$$Register);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1744 __ punpcklbw($dst$$XMMRegister, $dst$$XMMRegister);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1745 __ pshuflw($dst$$XMMRegister, $dst$$XMMRegister, 0x00);
6225 2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	1746 __ punpcklqdq($dst$$XMMRegister, $dst$$XMMRegister);
6179 8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1747 %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1748 ins_pipe( pipe_slow );
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1749 %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1750
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1751 instruct Repl32B(vecY dst, rRegI src) %{
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1752 predicate(n->as_Vector()->length() == 32);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1753 match(Set dst (ReplicateB src));
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1754 format %{ "movd $dst,$src\n\t"
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1755 "punpcklbw $dst,$dst\n\t"
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1756 "pshuflw $dst,$dst,0x00\n\t"
6225 2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	1757 "punpcklqdq $dst,$dst\n\t"
2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	1758 "vinserti128h $dst,$dst,$dst\t! replicate32B" %}
6179 8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1759 ins_encode %{
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1760 __ movdl($dst$$XMMRegister, $src$$Register);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1761 __ punpcklbw($dst$$XMMRegister, $dst$$XMMRegister);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1762 __ pshuflw($dst$$XMMRegister, $dst$$XMMRegister, 0x00);
6225 2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	1763 __ punpcklqdq($dst$$XMMRegister, $dst$$XMMRegister);
2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	1764 __ vinserti128h($dst$$XMMRegister, $dst$$XMMRegister, $dst$$XMMRegister);
6179 8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1765 %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1766 ins_pipe( pipe_slow );
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1767 %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1768
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1769 // Replicate byte scalar immediate to be vector by loading from const table.
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1770 instruct Repl4B_imm(vecS dst, immI con) %{
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1771 predicate(n->as_Vector()->length() == 4);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1772 match(Set dst (ReplicateB con));
6225 2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	1773 format %{ "movdl $dst,[$constantaddress]\t! replicate4B($con)" %}
6179 8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1774 ins_encode %{
6225 2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	1775 __ movdl($dst$$XMMRegister, $constantaddress(replicate4_imm($con$$constant, 1)));
6179 8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1776 %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1777 ins_pipe( pipe_slow );
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1778 %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1779
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1780 instruct Repl8B_imm(vecD dst, immI con) %{
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1781 predicate(n->as_Vector()->length() == 8);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1782 match(Set dst (ReplicateB con));
6225 2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	1783 format %{ "movq $dst,[$constantaddress]\t! replicate8B($con)" %}
6179 8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1784 ins_encode %{
6225 2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	1785 __ movq($dst$$XMMRegister, $constantaddress(replicate8_imm($con$$constant, 1)));
6179 8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1786 %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1787 ins_pipe( pipe_slow );
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1788 %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1789
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1790 instruct Repl16B_imm(vecX dst, immI con) %{
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1791 predicate(n->as_Vector()->length() == 16);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1792 match(Set dst (ReplicateB con));
6225 2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	1793 format %{ "movq $dst,[$constantaddress]\n\t"
2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	1794 "punpcklqdq $dst,$dst\t! replicate16B($con)" %}
6179 8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1795 ins_encode %{
6225 2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	1796 __ movq($dst$$XMMRegister, $constantaddress(replicate8_imm($con$$constant, 1)));
2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	1797 __ punpcklqdq($dst$$XMMRegister, $dst$$XMMRegister);
6179 8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1798 %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1799 ins_pipe( pipe_slow );
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1800 %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1801
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1802 instruct Repl32B_imm(vecY dst, immI con) %{
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1803 predicate(n->as_Vector()->length() == 32);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1804 match(Set dst (ReplicateB con));
6225 2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	1805 format %{ "movq $dst,[$constantaddress]\n\t"
2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	1806 "punpcklqdq $dst,$dst\n\t"
2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	1807 "vinserti128h $dst,$dst,$dst\t! lreplicate32B($con)" %}
6179 8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1808 ins_encode %{
6225 2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	1809 __ movq($dst$$XMMRegister, $constantaddress(replicate8_imm($con$$constant, 1)));
2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	1810 __ punpcklqdq($dst$$XMMRegister, $dst$$XMMRegister);
2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	1811 __ vinserti128h($dst$$XMMRegister, $dst$$XMMRegister, $dst$$XMMRegister);
6179 8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1812 %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1813 ins_pipe( pipe_slow );
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1814 %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1815
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1816 // Replicate byte scalar zero to be vector
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1817 instruct Repl4B_zero(vecS dst, immI0 zero) %{
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1818 predicate(n->as_Vector()->length() == 4);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1819 match(Set dst (ReplicateB zero));
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1820 format %{ "pxor $dst,$dst\t! replicate4B zero" %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1821 ins_encode %{
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1822 __ pxor($dst$$XMMRegister, $dst$$XMMRegister);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1823 %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1824 ins_pipe( fpu_reg_reg );
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1825 %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1826
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1827 instruct Repl8B_zero(vecD dst, immI0 zero) %{
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1828 predicate(n->as_Vector()->length() == 8);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1829 match(Set dst (ReplicateB zero));
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1830 format %{ "pxor $dst,$dst\t! replicate8B zero" %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1831 ins_encode %{
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1832 __ pxor($dst$$XMMRegister, $dst$$XMMRegister);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1833 %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1834 ins_pipe( fpu_reg_reg );
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1835 %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1836
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1837 instruct Repl16B_zero(vecX dst, immI0 zero) %{
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1838 predicate(n->as_Vector()->length() == 16);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1839 match(Set dst (ReplicateB zero));
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1840 format %{ "pxor $dst,$dst\t! replicate16B zero" %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1841 ins_encode %{
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1842 __ pxor($dst$$XMMRegister, $dst$$XMMRegister);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1843 %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1844 ins_pipe( fpu_reg_reg );
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1845 %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1846
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1847 instruct Repl32B_zero(vecY dst, immI0 zero) %{
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1848 predicate(n->as_Vector()->length() == 32);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1849 match(Set dst (ReplicateB zero));
6225 2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	1850 format %{ "vpxor $dst,$dst,$dst\t! replicate32B zero" %}
6179 8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1851 ins_encode %{
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1852 // Use vxorpd since AVX does not have vpxor for 256-bit (AVX2 will have it).
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1853 bool vector256 = true;
6225 2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	1854 __ vpxor($dst$$XMMRegister, $dst$$XMMRegister, $dst$$XMMRegister, vector256);
6179 8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1855 %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1856 ins_pipe( fpu_reg_reg );
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1857 %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1858
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1859 // Replicate char/short (2 byte) scalar to be vector
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1860 instruct Repl2S(vecS dst, rRegI src) %{
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1861 predicate(n->as_Vector()->length() == 2);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1862 match(Set dst (ReplicateS src));
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1863 format %{ "movd $dst,$src\n\t"
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1864 "pshuflw $dst,$dst,0x00\t! replicate2S" %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1865 ins_encode %{
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1866 __ movdl($dst$$XMMRegister, $src$$Register);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1867 __ pshuflw($dst$$XMMRegister, $dst$$XMMRegister, 0x00);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1868 %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1869 ins_pipe( fpu_reg_reg );
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1870 %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1871
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1872 instruct Repl4S(vecD dst, rRegI src) %{
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1873 predicate(n->as_Vector()->length() == 4);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1874 match(Set dst (ReplicateS src));
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1875 format %{ "movd $dst,$src\n\t"
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1876 "pshuflw $dst,$dst,0x00\t! replicate4S" %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1877 ins_encode %{
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1878 __ movdl($dst$$XMMRegister, $src$$Register);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1879 __ pshuflw($dst$$XMMRegister, $dst$$XMMRegister, 0x00);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1880 %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1881 ins_pipe( fpu_reg_reg );
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1882 %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1883
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1884 instruct Repl8S(vecX dst, rRegI src) %{
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1885 predicate(n->as_Vector()->length() == 8);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1886 match(Set dst (ReplicateS src));
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1887 format %{ "movd $dst,$src\n\t"
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1888 "pshuflw $dst,$dst,0x00\n\t"
6225 2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	1889 "punpcklqdq $dst,$dst\t! replicate8S" %}
6179 8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1890 ins_encode %{
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1891 __ movdl($dst$$XMMRegister, $src$$Register);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1892 __ pshuflw($dst$$XMMRegister, $dst$$XMMRegister, 0x00);
6225 2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	1893 __ punpcklqdq($dst$$XMMRegister, $dst$$XMMRegister);
6179 8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1894 %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1895 ins_pipe( pipe_slow );
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1896 %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1897
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1898 instruct Repl16S(vecY dst, rRegI src) %{
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1899 predicate(n->as_Vector()->length() == 16);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1900 match(Set dst (ReplicateS src));
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1901 format %{ "movd $dst,$src\n\t"
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1902 "pshuflw $dst,$dst,0x00\n\t"
6225 2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	1903 "punpcklqdq $dst,$dst\n\t"
2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	1904 "vinserti128h $dst,$dst,$dst\t! replicate16S" %}
6179 8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1905 ins_encode %{
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1906 __ movdl($dst$$XMMRegister, $src$$Register);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1907 __ pshuflw($dst$$XMMRegister, $dst$$XMMRegister, 0x00);
6225 2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	1908 __ punpcklqdq($dst$$XMMRegister, $dst$$XMMRegister);
2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	1909 __ vinserti128h($dst$$XMMRegister, $dst$$XMMRegister, $dst$$XMMRegister);
6179 8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1910 %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1911 ins_pipe( pipe_slow );
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1912 %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1913
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1914 // Replicate char/short (2 byte) scalar immediate to be vector by loading from const table.
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1915 instruct Repl2S_imm(vecS dst, immI con) %{
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1916 predicate(n->as_Vector()->length() == 2);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1917 match(Set dst (ReplicateS con));
6225 2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	1918 format %{ "movdl $dst,[$constantaddress]\t! replicate2S($con)" %}
6179 8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1919 ins_encode %{
6225 2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	1920 __ movdl($dst$$XMMRegister, $constantaddress(replicate4_imm($con$$constant, 2)));
6179 8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1921 %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1922 ins_pipe( fpu_reg_reg );
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1923 %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1924
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1925 instruct Repl4S_imm(vecD dst, immI con) %{
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1926 predicate(n->as_Vector()->length() == 4);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1927 match(Set dst (ReplicateS con));
6225 2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	1928 format %{ "movq $dst,[$constantaddress]\t! replicate4S($con)" %}
6179 8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1929 ins_encode %{
6225 2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	1930 __ movq($dst$$XMMRegister, $constantaddress(replicate8_imm($con$$constant, 2)));
6179 8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1931 %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1932 ins_pipe( fpu_reg_reg );
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1933 %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1934
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1935 instruct Repl8S_imm(vecX dst, immI con) %{
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1936 predicate(n->as_Vector()->length() == 8);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1937 match(Set dst (ReplicateS con));
6225 2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	1938 format %{ "movq $dst,[$constantaddress]\n\t"
2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	1939 "punpcklqdq $dst,$dst\t! replicate8S($con)" %}
6179 8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1940 ins_encode %{
6225 2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	1941 __ movq($dst$$XMMRegister, $constantaddress(replicate8_imm($con$$constant, 2)));
2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	1942 __ punpcklqdq($dst$$XMMRegister, $dst$$XMMRegister);
6179 8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1943 %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1944 ins_pipe( pipe_slow );
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1945 %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1946
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1947 instruct Repl16S_imm(vecY dst, immI con) %{
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1948 predicate(n->as_Vector()->length() == 16);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1949 match(Set dst (ReplicateS con));
6225 2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	1950 format %{ "movq $dst,[$constantaddress]\n\t"
2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	1951 "punpcklqdq $dst,$dst\n\t"
2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	1952 "vinserti128h $dst,$dst,$dst\t! replicate16S($con)" %}
6179 8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1953 ins_encode %{
6225 2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	1954 __ movq($dst$$XMMRegister, $constantaddress(replicate8_imm($con$$constant, 2)));
2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	1955 __ punpcklqdq($dst$$XMMRegister, $dst$$XMMRegister);
2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	1956 __ vinserti128h($dst$$XMMRegister, $dst$$XMMRegister, $dst$$XMMRegister);
6179 8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1957 %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1958 ins_pipe( pipe_slow );
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1959 %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1960
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1961 // Replicate char/short (2 byte) scalar zero to be vector
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1962 instruct Repl2S_zero(vecS dst, immI0 zero) %{
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1963 predicate(n->as_Vector()->length() == 2);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1964 match(Set dst (ReplicateS zero));
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1965 format %{ "pxor $dst,$dst\t! replicate2S zero" %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1966 ins_encode %{
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1967 __ pxor($dst$$XMMRegister, $dst$$XMMRegister);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1968 %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1969 ins_pipe( fpu_reg_reg );
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1970 %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1971
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1972 instruct Repl4S_zero(vecD dst, immI0 zero) %{
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1973 predicate(n->as_Vector()->length() == 4);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1974 match(Set dst (ReplicateS zero));
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1975 format %{ "pxor $dst,$dst\t! replicate4S zero" %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1976 ins_encode %{
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1977 __ pxor($dst$$XMMRegister, $dst$$XMMRegister);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1978 %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1979 ins_pipe( fpu_reg_reg );
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1980 %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1981
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1982 instruct Repl8S_zero(vecX dst, immI0 zero) %{
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1983 predicate(n->as_Vector()->length() == 8);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1984 match(Set dst (ReplicateS zero));
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1985 format %{ "pxor $dst,$dst\t! replicate8S zero" %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1986 ins_encode %{
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1987 __ pxor($dst$$XMMRegister, $dst$$XMMRegister);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1988 %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1989 ins_pipe( fpu_reg_reg );
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1990 %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1991
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1992 instruct Repl16S_zero(vecY dst, immI0 zero) %{
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1993 predicate(n->as_Vector()->length() == 16);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1994 match(Set dst (ReplicateS zero));
6225 2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	1995 format %{ "vpxor $dst,$dst,$dst\t! replicate16S zero" %}
6179 8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1996 ins_encode %{
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1997 // Use vxorpd since AVX does not have vpxor for 256-bit (AVX2 will have it).
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	1998 bool vector256 = true;
6225 2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	1999 __ vpxor($dst$$XMMRegister, $dst$$XMMRegister, $dst$$XMMRegister, vector256);
6179 8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2000 %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2001 ins_pipe( fpu_reg_reg );
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2002 %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2003
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2004 // Replicate integer (4 byte) scalar to be vector
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2005 instruct Repl2I(vecD dst, rRegI src) %{
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2006 predicate(n->as_Vector()->length() == 2);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2007 match(Set dst (ReplicateI src));
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2008 format %{ "movd $dst,$src\n\t"
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2009 "pshufd $dst,$dst,0x00\t! replicate2I" %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2010 ins_encode %{
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2011 __ movdl($dst$$XMMRegister, $src$$Register);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2012 __ pshufd($dst$$XMMRegister, $dst$$XMMRegister, 0x00);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2013 %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2014 ins_pipe( fpu_reg_reg );
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2015 %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2016
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2017 instruct Repl4I(vecX dst, rRegI src) %{
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2018 predicate(n->as_Vector()->length() == 4);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2019 match(Set dst (ReplicateI src));
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2020 format %{ "movd $dst,$src\n\t"
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2021 "pshufd $dst,$dst,0x00\t! replicate4I" %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2022 ins_encode %{
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2023 __ movdl($dst$$XMMRegister, $src$$Register);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2024 __ pshufd($dst$$XMMRegister, $dst$$XMMRegister, 0x00);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2025 %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2026 ins_pipe( pipe_slow );
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2027 %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2028
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2029 instruct Repl8I(vecY dst, rRegI src) %{
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2030 predicate(n->as_Vector()->length() == 8);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2031 match(Set dst (ReplicateI src));
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2032 format %{ "movd $dst,$src\n\t"
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2033 "pshufd $dst,$dst,0x00\n\t"
6225 2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	2034 "vinserti128h $dst,$dst,$dst\t! replicate8I" %}
6179 8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2035 ins_encode %{
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2036 __ movdl($dst$$XMMRegister, $src$$Register);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2037 __ pshufd($dst$$XMMRegister, $dst$$XMMRegister, 0x00);
6225 2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	2038 __ vinserti128h($dst$$XMMRegister, $dst$$XMMRegister, $dst$$XMMRegister);
6179 8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2039 %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2040 ins_pipe( pipe_slow );
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2041 %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2042
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2043 // Replicate integer (4 byte) scalar immediate to be vector by loading from const table.
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2044 instruct Repl2I_imm(vecD dst, immI con) %{
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2045 predicate(n->as_Vector()->length() == 2);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2046 match(Set dst (ReplicateI con));
6225 2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	2047 format %{ "movq $dst,[$constantaddress]\t! replicate2I($con)" %}
6179 8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2048 ins_encode %{
6225 2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	2049 __ movq($dst$$XMMRegister, $constantaddress(replicate8_imm($con$$constant, 4)));
6179 8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2050 %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2051 ins_pipe( fpu_reg_reg );
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2052 %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2053
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2054 instruct Repl4I_imm(vecX dst, immI con) %{
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2055 predicate(n->as_Vector()->length() == 4);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2056 match(Set dst (ReplicateI con));
6225 2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	2057 format %{ "movq $dst,[$constantaddress]\t! replicate4I($con)\n\t"
2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	2058 "punpcklqdq $dst,$dst" %}
6179 8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2059 ins_encode %{
6225 2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	2060 __ movq($dst$$XMMRegister, $constantaddress(replicate8_imm($con$$constant, 4)));
2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	2061 __ punpcklqdq($dst$$XMMRegister, $dst$$XMMRegister);
6179 8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2062 %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2063 ins_pipe( pipe_slow );
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2064 %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2065
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2066 instruct Repl8I_imm(vecY dst, immI con) %{
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2067 predicate(n->as_Vector()->length() == 8);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2068 match(Set dst (ReplicateI con));
6225 2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	2069 format %{ "movq $dst,[$constantaddress]\t! replicate8I($con)\n\t"
2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	2070 "punpcklqdq $dst,$dst\n\t"
2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	2071 "vinserti128h $dst,$dst,$dst" %}
6179 8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2072 ins_encode %{
6225 2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	2073 __ movq($dst$$XMMRegister, $constantaddress(replicate8_imm($con$$constant, 4)));
2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	2074 __ punpcklqdq($dst$$XMMRegister, $dst$$XMMRegister);
2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	2075 __ vinserti128h($dst$$XMMRegister, $dst$$XMMRegister, $dst$$XMMRegister);
6179 8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2076 %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2077 ins_pipe( pipe_slow );
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2078 %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2079
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2080 // Integer could be loaded into xmm register directly from memory.
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2081 instruct Repl2I_mem(vecD dst, memory mem) %{
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2082 predicate(n->as_Vector()->length() == 2);
6225 2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	2083 match(Set dst (ReplicateI (LoadI mem)));
6179 8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2084 format %{ "movd $dst,$mem\n\t"
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2085 "pshufd $dst,$dst,0x00\t! replicate2I" %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2086 ins_encode %{
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2087 __ movdl($dst$$XMMRegister, $mem$$Address);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2088 __ pshufd($dst$$XMMRegister, $dst$$XMMRegister, 0x00);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2089 %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2090 ins_pipe( fpu_reg_reg );
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2091 %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2092
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2093 instruct Repl4I_mem(vecX dst, memory mem) %{
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2094 predicate(n->as_Vector()->length() == 4);
6225 2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	2095 match(Set dst (ReplicateI (LoadI mem)));
6179 8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2096 format %{ "movd $dst,$mem\n\t"
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2097 "pshufd $dst,$dst,0x00\t! replicate4I" %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2098 ins_encode %{
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2099 __ movdl($dst$$XMMRegister, $mem$$Address);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2100 __ pshufd($dst$$XMMRegister, $dst$$XMMRegister, 0x00);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2101 %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2102 ins_pipe( pipe_slow );
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2103 %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2104
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2105 instruct Repl8I_mem(vecY dst, memory mem) %{
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2106 predicate(n->as_Vector()->length() == 8);
6225 2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	2107 match(Set dst (ReplicateI (LoadI mem)));
6179 8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2108 format %{ "movd $dst,$mem\n\t"
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2109 "pshufd $dst,$dst,0x00\n\t"
6225 2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	2110 "vinserti128h $dst,$dst,$dst\t! replicate8I" %}
6179 8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2111 ins_encode %{
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2112 __ movdl($dst$$XMMRegister, $mem$$Address);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2113 __ pshufd($dst$$XMMRegister, $dst$$XMMRegister, 0x00);
6225 2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	2114 __ vinserti128h($dst$$XMMRegister, $dst$$XMMRegister, $dst$$XMMRegister);
6179 8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2115 %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2116 ins_pipe( pipe_slow );
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2117 %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2118
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2119 // Replicate integer (4 byte) scalar zero to be vector
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2120 instruct Repl2I_zero(vecD dst, immI0 zero) %{
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2121 predicate(n->as_Vector()->length() == 2);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2122 match(Set dst (ReplicateI zero));
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2123 format %{ "pxor $dst,$dst\t! replicate2I" %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2124 ins_encode %{
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2125 __ pxor($dst$$XMMRegister, $dst$$XMMRegister);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2126 %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2127 ins_pipe( fpu_reg_reg );
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2128 %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2129
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2130 instruct Repl4I_zero(vecX dst, immI0 zero) %{
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2131 predicate(n->as_Vector()->length() == 4);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2132 match(Set dst (ReplicateI zero));
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2133 format %{ "pxor $dst,$dst\t! replicate4I zero)" %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2134 ins_encode %{
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2135 __ pxor($dst$$XMMRegister, $dst$$XMMRegister);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2136 %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2137 ins_pipe( fpu_reg_reg );
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2138 %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2139
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2140 instruct Repl8I_zero(vecY dst, immI0 zero) %{
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2141 predicate(n->as_Vector()->length() == 8);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2142 match(Set dst (ReplicateI zero));
6225 2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	2143 format %{ "vpxor $dst,$dst,$dst\t! replicate8I zero" %}
6179 8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2144 ins_encode %{
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2145 // Use vxorpd since AVX does not have vpxor for 256-bit (AVX2 will have it).
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2146 bool vector256 = true;
6225 2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	2147 __ vpxor($dst$$XMMRegister, $dst$$XMMRegister, $dst$$XMMRegister, vector256);
6179 8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2148 %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2149 ins_pipe( fpu_reg_reg );
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2150 %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2151
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2152 // Replicate long (8 byte) scalar to be vector
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2153 #ifdef _LP64
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2154 instruct Repl2L(vecX dst, rRegL src) %{
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2155 predicate(n->as_Vector()->length() == 2);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2156 match(Set dst (ReplicateL src));
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2157 format %{ "movdq $dst,$src\n\t"
6225 2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	2158 "punpcklqdq $dst,$dst\t! replicate2L" %}
6179 8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2159 ins_encode %{
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2160 __ movdq($dst$$XMMRegister, $src$$Register);
6225 2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	2161 __ punpcklqdq($dst$$XMMRegister, $dst$$XMMRegister);
6179 8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2162 %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2163 ins_pipe( pipe_slow );
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2164 %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2165
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2166 instruct Repl4L(vecY dst, rRegL src) %{
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2167 predicate(n->as_Vector()->length() == 4);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2168 match(Set dst (ReplicateL src));
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2169 format %{ "movdq $dst,$src\n\t"
6225 2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	2170 "punpcklqdq $dst,$dst\n\t"
2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	2171 "vinserti128h $dst,$dst,$dst\t! replicate4L" %}
6179 8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2172 ins_encode %{
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2173 __ movdq($dst$$XMMRegister, $src$$Register);
6225 2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	2174 __ punpcklqdq($dst$$XMMRegister, $dst$$XMMRegister);
2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	2175 __ vinserti128h($dst$$XMMRegister, $dst$$XMMRegister, $dst$$XMMRegister);
6179 8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2176 %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2177 ins_pipe( pipe_slow );
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2178 %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2179 #else // _LP64
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2180 instruct Repl2L(vecX dst, eRegL src, regD tmp) %{
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2181 predicate(n->as_Vector()->length() == 2);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2182 match(Set dst (ReplicateL src));
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2183 effect(TEMP dst, USE src, TEMP tmp);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2184 format %{ "movdl $dst,$src.lo\n\t"
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2185 "movdl $tmp,$src.hi\n\t"
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2186 "punpckldq $dst,$tmp\n\t"
6225 2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	2187 "punpcklqdq $dst,$dst\t! replicate2L"%}
6179 8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2188 ins_encode %{
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2189 __ movdl($dst$$XMMRegister, $src$$Register);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2190 __ movdl($tmp$$XMMRegister, HIGH_FROM_LOW($src$$Register));
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2191 __ punpckldq($dst$$XMMRegister, $tmp$$XMMRegister);
6225 2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	2192 __ punpcklqdq($dst$$XMMRegister, $dst$$XMMRegister);
6179 8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2193 %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2194 ins_pipe( pipe_slow );
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2195 %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2196
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2197 instruct Repl4L(vecY dst, eRegL src, regD tmp) %{
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2198 predicate(n->as_Vector()->length() == 4);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2199 match(Set dst (ReplicateL src));
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2200 effect(TEMP dst, USE src, TEMP tmp);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2201 format %{ "movdl $dst,$src.lo\n\t"
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2202 "movdl $tmp,$src.hi\n\t"
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2203 "punpckldq $dst,$tmp\n\t"
6225 2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	2204 "punpcklqdq $dst,$dst\n\t"
2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	2205 "vinserti128h $dst,$dst,$dst\t! replicate4L" %}
6179 8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2206 ins_encode %{
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2207 __ movdl($dst$$XMMRegister, $src$$Register);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2208 __ movdl($tmp$$XMMRegister, HIGH_FROM_LOW($src$$Register));
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2209 __ punpckldq($dst$$XMMRegister, $tmp$$XMMRegister);
6225 2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	2210 __ punpcklqdq($dst$$XMMRegister, $dst$$XMMRegister);
2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	2211 __ vinserti128h($dst$$XMMRegister, $dst$$XMMRegister, $dst$$XMMRegister);
6179 8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2212 %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2213 ins_pipe( pipe_slow );
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2214 %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2215 #endif // _LP64
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2216
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2217 // Replicate long (8 byte) scalar immediate to be vector by loading from const table.
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2218 instruct Repl2L_imm(vecX dst, immL con) %{
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2219 predicate(n->as_Vector()->length() == 2);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2220 match(Set dst (ReplicateL con));
6225 2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	2221 format %{ "movq $dst,[$constantaddress]\n\t"
2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	2222 "punpcklqdq $dst,$dst\t! replicate2L($con)" %}
6179 8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2223 ins_encode %{
6225 2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	2224 __ movq($dst$$XMMRegister, $constantaddress($con));
2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	2225 __ punpcklqdq($dst$$XMMRegister, $dst$$XMMRegister);
6179 8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2226 %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2227 ins_pipe( pipe_slow );
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2228 %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2229
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2230 instruct Repl4L_imm(vecY dst, immL con) %{
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2231 predicate(n->as_Vector()->length() == 4);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2232 match(Set dst (ReplicateL con));
6225 2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	2233 format %{ "movq $dst,[$constantaddress]\n\t"
2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	2234 "punpcklqdq $dst,$dst\n\t"
2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	2235 "vinserti128h $dst,$dst,$dst\t! replicate4L($con)" %}
6179 8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2236 ins_encode %{
6225 2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	2237 __ movq($dst$$XMMRegister, $constantaddress($con));
2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	2238 __ punpcklqdq($dst$$XMMRegister, $dst$$XMMRegister);
2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	2239 __ vinserti128h($dst$$XMMRegister, $dst$$XMMRegister, $dst$$XMMRegister);
6179 8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2240 %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2241 ins_pipe( pipe_slow );
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2242 %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2243
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2244 // Long could be loaded into xmm register directly from memory.
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2245 instruct Repl2L_mem(vecX dst, memory mem) %{
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2246 predicate(n->as_Vector()->length() == 2);
6225 2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	2247 match(Set dst (ReplicateL (LoadL mem)));
6179 8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2248 format %{ "movq $dst,$mem\n\t"
6225 2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	2249 "punpcklqdq $dst,$dst\t! replicate2L" %}
6179 8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2250 ins_encode %{
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2251 __ movq($dst$$XMMRegister, $mem$$Address);
6225 2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	2252 __ punpcklqdq($dst$$XMMRegister, $dst$$XMMRegister);
6179 8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2253 %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2254 ins_pipe( pipe_slow );
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2255 %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2256
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2257 instruct Repl4L_mem(vecY dst, memory mem) %{
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2258 predicate(n->as_Vector()->length() == 4);
6225 2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	2259 match(Set dst (ReplicateL (LoadL mem)));
6179 8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2260 format %{ "movq $dst,$mem\n\t"
6225 2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	2261 "punpcklqdq $dst,$dst\n\t"
2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	2262 "vinserti128h $dst,$dst,$dst\t! replicate4L" %}
6179 8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2263 ins_encode %{
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2264 __ movq($dst$$XMMRegister, $mem$$Address);
6225 2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	2265 __ punpcklqdq($dst$$XMMRegister, $dst$$XMMRegister);
2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	2266 __ vinserti128h($dst$$XMMRegister, $dst$$XMMRegister, $dst$$XMMRegister);
6179 8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2267 %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2268 ins_pipe( pipe_slow );
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2269 %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2270
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2271 // Replicate long (8 byte) scalar zero to be vector
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2272 instruct Repl2L_zero(vecX dst, immL0 zero) %{
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2273 predicate(n->as_Vector()->length() == 2);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2274 match(Set dst (ReplicateL zero));
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2275 format %{ "pxor $dst,$dst\t! replicate2L zero" %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2276 ins_encode %{
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2277 __ pxor($dst$$XMMRegister, $dst$$XMMRegister);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2278 %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2279 ins_pipe( fpu_reg_reg );
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2280 %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2281
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2282 instruct Repl4L_zero(vecY dst, immL0 zero) %{
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2283 predicate(n->as_Vector()->length() == 4);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2284 match(Set dst (ReplicateL zero));
6225 2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	2285 format %{ "vpxor $dst,$dst,$dst\t! replicate4L zero" %}
6179 8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2286 ins_encode %{
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2287 // Use vxorpd since AVX does not have vpxor for 256-bit (AVX2 will have it).
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2288 bool vector256 = true;
6225 2c368ea3e844 7181494: cleanup avx and vectors code kvn parents: 6183 diff changeset	2289 __ vpxor($dst$$XMMRegister, $dst$$XMMRegister, $dst$$XMMRegister, vector256);
6179 8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2290 %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2291 ins_pipe( fpu_reg_reg );
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2292 %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2293
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2294 // Replicate float (4 byte) scalar to be vector
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2295 instruct Repl2F(vecD dst, regF src) %{
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2296 predicate(n->as_Vector()->length() == 2);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2297 match(Set dst (ReplicateF src));
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2298 format %{ "pshufd $dst,$dst,0x00\t! replicate2F" %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2299 ins_encode %{
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2300 __ pshufd($dst$$XMMRegister, $src$$XMMRegister, 0x00);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2301 %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2302 ins_pipe( fpu_reg_reg );
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2303 %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2304
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2305 instruct Repl4F(vecX dst, regF src) %{
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2306 predicate(n->as_Vector()->length() == 4);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2307 match(Set dst (ReplicateF src));
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2308 format %{ "pshufd $dst,$dst,0x00\t! replicate4F" %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2309 ins_encode %{
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2310 __ pshufd($dst$$XMMRegister, $src$$XMMRegister, 0x00);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2311 %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2312 ins_pipe( pipe_slow );
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2313 %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2314
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2315 instruct Repl8F(vecY dst, regF src) %{
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2316 predicate(n->as_Vector()->length() == 8);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2317 match(Set dst (ReplicateF src));
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2318 format %{ "pshufd $dst,$src,0x00\n\t"
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2319 "vinsertf128h $dst,$dst,$dst\t! replicate8F" %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2320 ins_encode %{
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2321 __ pshufd($dst$$XMMRegister, $src$$XMMRegister, 0x00);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2322 __ vinsertf128h($dst$$XMMRegister, $dst$$XMMRegister, $dst$$XMMRegister);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2323 %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2324 ins_pipe( pipe_slow );
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2325 %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2326
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2327 // Replicate float (4 byte) scalar zero to be vector
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2328 instruct Repl2F_zero(vecD dst, immF0 zero) %{
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2329 predicate(n->as_Vector()->length() == 2);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2330 match(Set dst (ReplicateF zero));
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2331 format %{ "xorps $dst,$dst\t! replicate2F zero" %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2332 ins_encode %{
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2333 __ xorps($dst$$XMMRegister, $dst$$XMMRegister);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2334 %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2335 ins_pipe( fpu_reg_reg );
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2336 %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2337
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2338 instruct Repl4F_zero(vecX dst, immF0 zero) %{
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2339 predicate(n->as_Vector()->length() == 4);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2340 match(Set dst (ReplicateF zero));
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2341 format %{ "xorps $dst,$dst\t! replicate4F zero" %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2342 ins_encode %{
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2343 __ xorps($dst$$XMMRegister, $dst$$XMMRegister);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2344 %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2345 ins_pipe( fpu_reg_reg );
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2346 %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2347
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2348 instruct Repl8F_zero(vecY dst, immF0 zero) %{
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2349 predicate(n->as_Vector()->length() == 8);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2350 match(Set dst (ReplicateF zero));
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2351 format %{ "vxorps $dst,$dst,$dst\t! replicate8F zero" %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2352 ins_encode %{
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2353 bool vector256 = true;
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2354 __ vxorps($dst$$XMMRegister, $dst$$XMMRegister, $dst$$XMMRegister, vector256);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2355 %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2356 ins_pipe( fpu_reg_reg );
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2357 %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2358
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2359 // Replicate double (8 bytes) scalar to be vector
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2360 instruct Repl2D(vecX dst, regD src) %{
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2361 predicate(n->as_Vector()->length() == 2);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2362 match(Set dst (ReplicateD src));
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2363 format %{ "pshufd $dst,$src,0x44\t! replicate2D" %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2364 ins_encode %{
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2365 __ pshufd($dst$$XMMRegister, $src$$XMMRegister, 0x44);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2366 %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2367 ins_pipe( pipe_slow );
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2368 %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2369
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2370 instruct Repl4D(vecY dst, regD src) %{
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2371 predicate(n->as_Vector()->length() == 4);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2372 match(Set dst (ReplicateD src));
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2373 format %{ "pshufd $dst,$src,0x44\n\t"
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2374 "vinsertf128h $dst,$dst,$dst\t! replicate4D" %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2375 ins_encode %{
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2376 __ pshufd($dst$$XMMRegister, $src$$XMMRegister, 0x44);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2377 __ vinsertf128h($dst$$XMMRegister, $dst$$XMMRegister, $dst$$XMMRegister);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2378 %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2379 ins_pipe( pipe_slow );
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2380 %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2381
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2382 // Replicate double (8 byte) scalar zero to be vector
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2383 instruct Repl2D_zero(vecX dst, immD0 zero) %{
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2384 predicate(n->as_Vector()->length() == 2);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2385 match(Set dst (ReplicateD zero));
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2386 format %{ "xorpd $dst,$dst\t! replicate2D zero" %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2387 ins_encode %{
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2388 __ xorpd($dst$$XMMRegister, $dst$$XMMRegister);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2389 %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2390 ins_pipe( fpu_reg_reg );
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2391 %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2392
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2393 instruct Repl4D_zero(vecY dst, immD0 zero) %{
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2394 predicate(n->as_Vector()->length() == 4);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2395 match(Set dst (ReplicateD zero));
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2396 format %{ "vxorpd $dst,$dst,$dst,vect256\t! replicate4D zero" %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2397 ins_encode %{
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2398 bool vector256 = true;
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2399 __ vxorpd($dst$$XMMRegister, $dst$$XMMRegister, $dst$$XMMRegister, vector256);
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2400 %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2401 ins_pipe( fpu_reg_reg );
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2402 %}
8c92982cbbc4 7119644: Increase superword's vector size up to 256 bits kvn parents: 4950 diff changeset	2403
6614 006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2404 // ====================VECTOR ARITHMETIC=======================================
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2405
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2406 // --------------------------------- ADD --------------------------------------
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2407
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2408 // Bytes vector add
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2409 instruct vadd4B(vecS dst, vecS src) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2410 predicate(n->as_Vector()->length() == 4);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2411 match(Set dst (AddVB dst src));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2412 format %{ "paddb $dst,$src\t! add packed4B" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2413 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2414 __ paddb($dst$$XMMRegister, $src$$XMMRegister);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2415 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2416 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2417 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2418
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2419 instruct vadd4B_reg(vecS dst, vecS src1, vecS src2) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2420 predicate(UseAVX > 0 && n->as_Vector()->length() == 4);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2421 match(Set dst (AddVB src1 src2));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2422 format %{ "vpaddb $dst,$src1,$src2\t! add packed4B" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2423 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2424 bool vector256 = false;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2425 __ vpaddb($dst$$XMMRegister, $src1$$XMMRegister, $src2$$XMMRegister, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2426 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2427 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2428 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2429
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2430 instruct vadd8B(vecD dst, vecD src) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2431 predicate(n->as_Vector()->length() == 8);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2432 match(Set dst (AddVB dst src));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2433 format %{ "paddb $dst,$src\t! add packed8B" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2434 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2435 __ paddb($dst$$XMMRegister, $src$$XMMRegister);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2436 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2437 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2438 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2439
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2440 instruct vadd8B_reg(vecD dst, vecD src1, vecD src2) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2441 predicate(UseAVX > 0 && n->as_Vector()->length() == 8);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2442 match(Set dst (AddVB src1 src2));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2443 format %{ "vpaddb $dst,$src1,$src2\t! add packed8B" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2444 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2445 bool vector256 = false;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2446 __ vpaddb($dst$$XMMRegister, $src1$$XMMRegister, $src2$$XMMRegister, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2447 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2448 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2449 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2450
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2451 instruct vadd16B(vecX dst, vecX src) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2452 predicate(n->as_Vector()->length() == 16);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2453 match(Set dst (AddVB dst src));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2454 format %{ "paddb $dst,$src\t! add packed16B" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2455 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2456 __ paddb($dst$$XMMRegister, $src$$XMMRegister);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2457 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2458 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2459 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2460
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2461 instruct vadd16B_reg(vecX dst, vecX src1, vecX src2) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2462 predicate(UseAVX > 0 && n->as_Vector()->length() == 16);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2463 match(Set dst (AddVB src1 src2));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2464 format %{ "vpaddb $dst,$src1,$src2\t! add packed16B" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2465 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2466 bool vector256 = false;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2467 __ vpaddb($dst$$XMMRegister, $src1$$XMMRegister, $src2$$XMMRegister, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2468 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2469 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2470 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2471
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2472 instruct vadd16B_mem(vecX dst, vecX src, memory mem) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2473 predicate(UseAVX > 0 && n->as_Vector()->length() == 16);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2474 match(Set dst (AddVB src (LoadVector mem)));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2475 format %{ "vpaddb $dst,$src,$mem\t! add packed16B" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2476 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2477 bool vector256 = false;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2478 __ vpaddb($dst$$XMMRegister, $src$$XMMRegister, $mem$$Address, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2479 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2480 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2481 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2482
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2483 instruct vadd32B_reg(vecY dst, vecY src1, vecY src2) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2484 predicate(UseAVX > 1 && n->as_Vector()->length() == 32);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2485 match(Set dst (AddVB src1 src2));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2486 format %{ "vpaddb $dst,$src1,$src2\t! add packed32B" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2487 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2488 bool vector256 = true;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2489 __ vpaddb($dst$$XMMRegister, $src1$$XMMRegister, $src2$$XMMRegister, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2490 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2491 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2492 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2493
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2494 instruct vadd32B_mem(vecY dst, vecY src, memory mem) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2495 predicate(UseAVX > 1 && n->as_Vector()->length() == 32);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2496 match(Set dst (AddVB src (LoadVector mem)));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2497 format %{ "vpaddb $dst,$src,$mem\t! add packed32B" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2498 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2499 bool vector256 = true;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2500 __ vpaddb($dst$$XMMRegister, $src$$XMMRegister, $mem$$Address, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2501 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2502 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2503 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2504
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2505 // Shorts/Chars vector add
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2506 instruct vadd2S(vecS dst, vecS src) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2507 predicate(n->as_Vector()->length() == 2);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2508 match(Set dst (AddVS dst src));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2509 format %{ "paddw $dst,$src\t! add packed2S" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2510 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2511 __ paddw($dst$$XMMRegister, $src$$XMMRegister);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2512 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2513 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2514 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2515
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2516 instruct vadd2S_reg(vecS dst, vecS src1, vecS src2) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2517 predicate(UseAVX > 0 && n->as_Vector()->length() == 2);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2518 match(Set dst (AddVS src1 src2));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2519 format %{ "vpaddw $dst,$src1,$src2\t! add packed2S" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2520 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2521 bool vector256 = false;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2522 __ vpaddw($dst$$XMMRegister, $src1$$XMMRegister, $src2$$XMMRegister, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2523 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2524 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2525 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2526
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2527 instruct vadd4S(vecD dst, vecD src) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2528 predicate(n->as_Vector()->length() == 4);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2529 match(Set dst (AddVS dst src));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2530 format %{ "paddw $dst,$src\t! add packed4S" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2531 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2532 __ paddw($dst$$XMMRegister, $src$$XMMRegister);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2533 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2534 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2535 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2536
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2537 instruct vadd4S_reg(vecD dst, vecD src1, vecD src2) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2538 predicate(UseAVX > 0 && n->as_Vector()->length() == 4);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2539 match(Set dst (AddVS src1 src2));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2540 format %{ "vpaddw $dst,$src1,$src2\t! add packed4S" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2541 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2542 bool vector256 = false;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2543 __ vpaddw($dst$$XMMRegister, $src1$$XMMRegister, $src2$$XMMRegister, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2544 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2545 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2546 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2547
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2548 instruct vadd8S(vecX dst, vecX src) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2549 predicate(n->as_Vector()->length() == 8);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2550 match(Set dst (AddVS dst src));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2551 format %{ "paddw $dst,$src\t! add packed8S" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2552 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2553 __ paddw($dst$$XMMRegister, $src$$XMMRegister);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2554 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2555 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2556 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2557
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2558 instruct vadd8S_reg(vecX dst, vecX src1, vecX src2) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2559 predicate(UseAVX > 0 && n->as_Vector()->length() == 8);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2560 match(Set dst (AddVS src1 src2));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2561 format %{ "vpaddw $dst,$src1,$src2\t! add packed8S" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2562 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2563 bool vector256 = false;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2564 __ vpaddw($dst$$XMMRegister, $src1$$XMMRegister, $src2$$XMMRegister, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2565 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2566 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2567 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2568
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2569 instruct vadd8S_mem(vecX dst, vecX src, memory mem) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2570 predicate(UseAVX > 0 && n->as_Vector()->length() == 8);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2571 match(Set dst (AddVS src (LoadVector mem)));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2572 format %{ "vpaddw $dst,$src,$mem\t! add packed8S" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2573 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2574 bool vector256 = false;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2575 __ vpaddw($dst$$XMMRegister, $src$$XMMRegister, $mem$$Address, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2576 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2577 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2578 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2579
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2580 instruct vadd16S_reg(vecY dst, vecY src1, vecY src2) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2581 predicate(UseAVX > 1 && n->as_Vector()->length() == 16);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2582 match(Set dst (AddVS src1 src2));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2583 format %{ "vpaddw $dst,$src1,$src2\t! add packed16S" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2584 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2585 bool vector256 = true;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2586 __ vpaddw($dst$$XMMRegister, $src1$$XMMRegister, $src2$$XMMRegister, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2587 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2588 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2589 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2590
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2591 instruct vadd16S_mem(vecY dst, vecY src, memory mem) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2592 predicate(UseAVX > 1 && n->as_Vector()->length() == 16);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2593 match(Set dst (AddVS src (LoadVector mem)));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2594 format %{ "vpaddw $dst,$src,$mem\t! add packed16S" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2595 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2596 bool vector256 = true;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2597 __ vpaddw($dst$$XMMRegister, $src$$XMMRegister, $mem$$Address, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2598 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2599 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2600 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2601
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2602 // Integers vector add
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2603 instruct vadd2I(vecD dst, vecD src) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2604 predicate(n->as_Vector()->length() == 2);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2605 match(Set dst (AddVI dst src));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2606 format %{ "paddd $dst,$src\t! add packed2I" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2607 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2608 __ paddd($dst$$XMMRegister, $src$$XMMRegister);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2609 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2610 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2611 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2612
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2613 instruct vadd2I_reg(vecD dst, vecD src1, vecD src2) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2614 predicate(UseAVX > 0 && n->as_Vector()->length() == 2);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2615 match(Set dst (AddVI src1 src2));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2616 format %{ "vpaddd $dst,$src1,$src2\t! add packed2I" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2617 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2618 bool vector256 = false;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2619 __ vpaddd($dst$$XMMRegister, $src1$$XMMRegister, $src2$$XMMRegister, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2620 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2621 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2622 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2623
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2624 instruct vadd4I(vecX dst, vecX src) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2625 predicate(n->as_Vector()->length() == 4);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2626 match(Set dst (AddVI dst src));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2627 format %{ "paddd $dst,$src\t! add packed4I" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2628 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2629 __ paddd($dst$$XMMRegister, $src$$XMMRegister);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2630 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2631 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2632 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2633
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2634 instruct vadd4I_reg(vecX dst, vecX src1, vecX src2) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2635 predicate(UseAVX > 0 && n->as_Vector()->length() == 4);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2636 match(Set dst (AddVI src1 src2));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2637 format %{ "vpaddd $dst,$src1,$src2\t! add packed4I" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2638 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2639 bool vector256 = false;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2640 __ vpaddd($dst$$XMMRegister, $src1$$XMMRegister, $src2$$XMMRegister, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2641 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2642 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2643 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2644
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2645 instruct vadd4I_mem(vecX dst, vecX src, memory mem) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2646 predicate(UseAVX > 0 && n->as_Vector()->length() == 4);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2647 match(Set dst (AddVI src (LoadVector mem)));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2648 format %{ "vpaddd $dst,$src,$mem\t! add packed4I" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2649 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2650 bool vector256 = false;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2651 __ vpaddd($dst$$XMMRegister, $src$$XMMRegister, $mem$$Address, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2652 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2653 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2654 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2655
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2656 instruct vadd8I_reg(vecY dst, vecY src1, vecY src2) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2657 predicate(UseAVX > 1 && n->as_Vector()->length() == 8);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2658 match(Set dst (AddVI src1 src2));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2659 format %{ "vpaddd $dst,$src1,$src2\t! add packed8I" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2660 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2661 bool vector256 = true;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2662 __ vpaddd($dst$$XMMRegister, $src1$$XMMRegister, $src2$$XMMRegister, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2663 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2664 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2665 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2666
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2667 instruct vadd8I_mem(vecY dst, vecY src, memory mem) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2668 predicate(UseAVX > 1 && n->as_Vector()->length() == 8);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2669 match(Set dst (AddVI src (LoadVector mem)));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2670 format %{ "vpaddd $dst,$src,$mem\t! add packed8I" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2671 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2672 bool vector256 = true;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2673 __ vpaddd($dst$$XMMRegister, $src$$XMMRegister, $mem$$Address, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2674 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2675 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2676 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2677
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2678 // Longs vector add
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2679 instruct vadd2L(vecX dst, vecX src) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2680 predicate(n->as_Vector()->length() == 2);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2681 match(Set dst (AddVL dst src));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2682 format %{ "paddq $dst,$src\t! add packed2L" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2683 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2684 __ paddq($dst$$XMMRegister, $src$$XMMRegister);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2685 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2686 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2687 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2688
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2689 instruct vadd2L_reg(vecX dst, vecX src1, vecX src2) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2690 predicate(UseAVX > 0 && n->as_Vector()->length() == 2);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2691 match(Set dst (AddVL src1 src2));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2692 format %{ "vpaddq $dst,$src1,$src2\t! add packed2L" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2693 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2694 bool vector256 = false;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2695 __ vpaddq($dst$$XMMRegister, $src1$$XMMRegister, $src2$$XMMRegister, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2696 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2697 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2698 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2699
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2700 instruct vadd2L_mem(vecX dst, vecX src, memory mem) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2701 predicate(UseAVX > 0 && n->as_Vector()->length() == 2);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2702 match(Set dst (AddVL src (LoadVector mem)));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2703 format %{ "vpaddq $dst,$src,$mem\t! add packed2L" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2704 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2705 bool vector256 = false;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2706 __ vpaddq($dst$$XMMRegister, $src$$XMMRegister, $mem$$Address, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2707 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2708 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2709 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2710
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2711 instruct vadd4L_reg(vecY dst, vecY src1, vecY src2) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2712 predicate(UseAVX > 1 && n->as_Vector()->length() == 4);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2713 match(Set dst (AddVL src1 src2));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2714 format %{ "vpaddq $dst,$src1,$src2\t! add packed4L" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2715 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2716 bool vector256 = true;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2717 __ vpaddq($dst$$XMMRegister, $src1$$XMMRegister, $src2$$XMMRegister, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2718 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2719 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2720 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2721
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2722 instruct vadd4L_mem(vecY dst, vecY src, memory mem) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2723 predicate(UseAVX > 1 && n->as_Vector()->length() == 4);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2724 match(Set dst (AddVL src (LoadVector mem)));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2725 format %{ "vpaddq $dst,$src,$mem\t! add packed4L" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2726 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2727 bool vector256 = true;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2728 __ vpaddq($dst$$XMMRegister, $src$$XMMRegister, $mem$$Address, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2729 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2730 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2731 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2732
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2733 // Floats vector add
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2734 instruct vadd2F(vecD dst, vecD src) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2735 predicate(n->as_Vector()->length() == 2);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2736 match(Set dst (AddVF dst src));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2737 format %{ "addps $dst,$src\t! add packed2F" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2738 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2739 __ addps($dst$$XMMRegister, $src$$XMMRegister);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2740 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2741 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2742 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2743
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2744 instruct vadd2F_reg(vecD dst, vecD src1, vecD src2) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2745 predicate(UseAVX > 0 && n->as_Vector()->length() == 2);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2746 match(Set dst (AddVF src1 src2));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2747 format %{ "vaddps $dst,$src1,$src2\t! add packed2F" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2748 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2749 bool vector256 = false;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2750 __ vaddps($dst$$XMMRegister, $src1$$XMMRegister, $src2$$XMMRegister, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2751 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2752 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2753 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2754
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2755 instruct vadd4F(vecX dst, vecX src) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2756 predicate(n->as_Vector()->length() == 4);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2757 match(Set dst (AddVF dst src));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2758 format %{ "addps $dst,$src\t! add packed4F" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2759 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2760 __ addps($dst$$XMMRegister, $src$$XMMRegister);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2761 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2762 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2763 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2764
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2765 instruct vadd4F_reg(vecX dst, vecX src1, vecX src2) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2766 predicate(UseAVX > 0 && n->as_Vector()->length() == 4);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2767 match(Set dst (AddVF src1 src2));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2768 format %{ "vaddps $dst,$src1,$src2\t! add packed4F" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2769 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2770 bool vector256 = false;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2771 __ vaddps($dst$$XMMRegister, $src1$$XMMRegister, $src2$$XMMRegister, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2772 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2773 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2774 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2775
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2776 instruct vadd4F_mem(vecX dst, vecX src, memory mem) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2777 predicate(UseAVX > 0 && n->as_Vector()->length() == 4);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2778 match(Set dst (AddVF src (LoadVector mem)));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2779 format %{ "vaddps $dst,$src,$mem\t! add packed4F" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2780 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2781 bool vector256 = false;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2782 __ vaddps($dst$$XMMRegister, $src$$XMMRegister, $mem$$Address, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2783 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2784 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2785 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2786
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2787 instruct vadd8F_reg(vecY dst, vecY src1, vecY src2) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2788 predicate(UseAVX > 0 && n->as_Vector()->length() == 8);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2789 match(Set dst (AddVF src1 src2));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2790 format %{ "vaddps $dst,$src1,$src2\t! add packed8F" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2791 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2792 bool vector256 = true;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2793 __ vaddps($dst$$XMMRegister, $src1$$XMMRegister, $src2$$XMMRegister, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2794 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2795 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2796 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2797
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2798 instruct vadd8F_mem(vecY dst, vecY src, memory mem) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2799 predicate(UseAVX > 0 && n->as_Vector()->length() == 8);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2800 match(Set dst (AddVF src (LoadVector mem)));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2801 format %{ "vaddps $dst,$src,$mem\t! add packed8F" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2802 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2803 bool vector256 = true;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2804 __ vaddps($dst$$XMMRegister, $src$$XMMRegister, $mem$$Address, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2805 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2806 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2807 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2808
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2809 // Doubles vector add
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2810 instruct vadd2D(vecX dst, vecX src) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2811 predicate(n->as_Vector()->length() == 2);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2812 match(Set dst (AddVD dst src));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2813 format %{ "addpd $dst,$src\t! add packed2D" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2814 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2815 __ addpd($dst$$XMMRegister, $src$$XMMRegister);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2816 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2817 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2818 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2819
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2820 instruct vadd2D_reg(vecX dst, vecX src1, vecX src2) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2821 predicate(UseAVX > 0 && n->as_Vector()->length() == 2);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2822 match(Set dst (AddVD src1 src2));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2823 format %{ "vaddpd $dst,$src1,$src2\t! add packed2D" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2824 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2825 bool vector256 = false;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2826 __ vaddpd($dst$$XMMRegister, $src1$$XMMRegister, $src2$$XMMRegister, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2827 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2828 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2829 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2830
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2831 instruct vadd2D_mem(vecX dst, vecX src, memory mem) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2832 predicate(UseAVX > 0 && n->as_Vector()->length() == 2);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2833 match(Set dst (AddVD src (LoadVector mem)));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2834 format %{ "vaddpd $dst,$src,$mem\t! add packed2D" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2835 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2836 bool vector256 = false;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2837 __ vaddpd($dst$$XMMRegister, $src$$XMMRegister, $mem$$Address, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2838 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2839 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2840 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2841
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2842 instruct vadd4D_reg(vecY dst, vecY src1, vecY src2) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2843 predicate(UseAVX > 0 && n->as_Vector()->length() == 4);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2844 match(Set dst (AddVD src1 src2));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2845 format %{ "vaddpd $dst,$src1,$src2\t! add packed4D" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2846 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2847 bool vector256 = true;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2848 __ vaddpd($dst$$XMMRegister, $src1$$XMMRegister, $src2$$XMMRegister, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2849 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2850 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2851 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2852
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2853 instruct vadd4D_mem(vecY dst, vecY src, memory mem) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2854 predicate(UseAVX > 0 && n->as_Vector()->length() == 4);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2855 match(Set dst (AddVD src (LoadVector mem)));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2856 format %{ "vaddpd $dst,$src,$mem\t! add packed4D" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2857 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2858 bool vector256 = true;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2859 __ vaddpd($dst$$XMMRegister, $src$$XMMRegister, $mem$$Address, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2860 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2861 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2862 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2863
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2864 // --------------------------------- SUB --------------------------------------
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2865
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2866 // Bytes vector sub
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2867 instruct vsub4B(vecS dst, vecS src) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2868 predicate(n->as_Vector()->length() == 4);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2869 match(Set dst (SubVB dst src));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2870 format %{ "psubb $dst,$src\t! sub packed4B" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2871 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2872 __ psubb($dst$$XMMRegister, $src$$XMMRegister);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2873 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2874 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2875 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2876
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2877 instruct vsub4B_reg(vecS dst, vecS src1, vecS src2) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2878 predicate(UseAVX > 0 && n->as_Vector()->length() == 4);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2879 match(Set dst (SubVB src1 src2));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2880 format %{ "vpsubb $dst,$src1,$src2\t! sub packed4B" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2881 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2882 bool vector256 = false;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2883 __ vpsubb($dst$$XMMRegister, $src1$$XMMRegister, $src2$$XMMRegister, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2884 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2885 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2886 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2887
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2888 instruct vsub8B(vecD dst, vecD src) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2889 predicate(n->as_Vector()->length() == 8);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2890 match(Set dst (SubVB dst src));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2891 format %{ "psubb $dst,$src\t! sub packed8B" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2892 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2893 __ psubb($dst$$XMMRegister, $src$$XMMRegister);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2894 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2895 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2896 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2897
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2898 instruct vsub8B_reg(vecD dst, vecD src1, vecD src2) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2899 predicate(UseAVX > 0 && n->as_Vector()->length() == 8);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2900 match(Set dst (SubVB src1 src2));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2901 format %{ "vpsubb $dst,$src1,$src2\t! sub packed8B" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2902 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2903 bool vector256 = false;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2904 __ vpsubb($dst$$XMMRegister, $src1$$XMMRegister, $src2$$XMMRegister, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2905 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2906 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2907 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2908
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2909 instruct vsub16B(vecX dst, vecX src) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2910 predicate(n->as_Vector()->length() == 16);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2911 match(Set dst (SubVB dst src));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2912 format %{ "psubb $dst,$src\t! sub packed16B" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2913 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2914 __ psubb($dst$$XMMRegister, $src$$XMMRegister);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2915 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2916 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2917 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2918
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2919 instruct vsub16B_reg(vecX dst, vecX src1, vecX src2) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2920 predicate(UseAVX > 0 && n->as_Vector()->length() == 16);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2921 match(Set dst (SubVB src1 src2));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2922 format %{ "vpsubb $dst,$src1,$src2\t! sub packed16B" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2923 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2924 bool vector256 = false;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2925 __ vpsubb($dst$$XMMRegister, $src1$$XMMRegister, $src2$$XMMRegister, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2926 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2927 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2928 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2929
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2930 instruct vsub16B_mem(vecX dst, vecX src, memory mem) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2931 predicate(UseAVX > 0 && n->as_Vector()->length() == 16);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2932 match(Set dst (SubVB src (LoadVector mem)));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2933 format %{ "vpsubb $dst,$src,$mem\t! sub packed16B" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2934 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2935 bool vector256 = false;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2936 __ vpsubb($dst$$XMMRegister, $src$$XMMRegister, $mem$$Address, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2937 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2938 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2939 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2940
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2941 instruct vsub32B_reg(vecY dst, vecY src1, vecY src2) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2942 predicate(UseAVX > 1 && n->as_Vector()->length() == 32);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2943 match(Set dst (SubVB src1 src2));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2944 format %{ "vpsubb $dst,$src1,$src2\t! sub packed32B" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2945 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2946 bool vector256 = true;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2947 __ vpsubb($dst$$XMMRegister, $src1$$XMMRegister, $src2$$XMMRegister, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2948 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2949 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2950 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2951
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2952 instruct vsub32B_mem(vecY dst, vecY src, memory mem) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2953 predicate(UseAVX > 1 && n->as_Vector()->length() == 32);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2954 match(Set dst (SubVB src (LoadVector mem)));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2955 format %{ "vpsubb $dst,$src,$mem\t! sub packed32B" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2956 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2957 bool vector256 = true;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2958 __ vpsubb($dst$$XMMRegister, $src$$XMMRegister, $mem$$Address, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2959 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2960 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2961 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2962
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2963 // Shorts/Chars vector sub
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2964 instruct vsub2S(vecS dst, vecS src) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2965 predicate(n->as_Vector()->length() == 2);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2966 match(Set dst (SubVS dst src));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2967 format %{ "psubw $dst,$src\t! sub packed2S" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2968 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2969 __ psubw($dst$$XMMRegister, $src$$XMMRegister);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2970 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2971 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2972 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2973
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2974 instruct vsub2S_reg(vecS dst, vecS src1, vecS src2) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2975 predicate(UseAVX > 0 && n->as_Vector()->length() == 2);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2976 match(Set dst (SubVS src1 src2));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2977 format %{ "vpsubw $dst,$src1,$src2\t! sub packed2S" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2978 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2979 bool vector256 = false;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2980 __ vpsubw($dst$$XMMRegister, $src1$$XMMRegister, $src2$$XMMRegister, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2981 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2982 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2983 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2984
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2985 instruct vsub4S(vecD dst, vecD src) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2986 predicate(n->as_Vector()->length() == 4);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2987 match(Set dst (SubVS dst src));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2988 format %{ "psubw $dst,$src\t! sub packed4S" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2989 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2990 __ psubw($dst$$XMMRegister, $src$$XMMRegister);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2991 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2992 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2993 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2994
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2995 instruct vsub4S_reg(vecD dst, vecD src1, vecD src2) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2996 predicate(UseAVX > 0 && n->as_Vector()->length() == 4);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2997 match(Set dst (SubVS src1 src2));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2998 format %{ "vpsubw $dst,$src1,$src2\t! sub packed4S" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	2999 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3000 bool vector256 = false;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3001 __ vpsubw($dst$$XMMRegister, $src1$$XMMRegister, $src2$$XMMRegister, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3002 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3003 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3004 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3005
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3006 instruct vsub8S(vecX dst, vecX src) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3007 predicate(n->as_Vector()->length() == 8);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3008 match(Set dst (SubVS dst src));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3009 format %{ "psubw $dst,$src\t! sub packed8S" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3010 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3011 __ psubw($dst$$XMMRegister, $src$$XMMRegister);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3012 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3013 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3014 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3015
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3016 instruct vsub8S_reg(vecX dst, vecX src1, vecX src2) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3017 predicate(UseAVX > 0 && n->as_Vector()->length() == 8);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3018 match(Set dst (SubVS src1 src2));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3019 format %{ "vpsubw $dst,$src1,$src2\t! sub packed8S" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3020 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3021 bool vector256 = false;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3022 __ vpsubw($dst$$XMMRegister, $src1$$XMMRegister, $src2$$XMMRegister, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3023 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3024 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3025 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3026
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3027 instruct vsub8S_mem(vecX dst, vecX src, memory mem) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3028 predicate(UseAVX > 0 && n->as_Vector()->length() == 8);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3029 match(Set dst (SubVS src (LoadVector mem)));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3030 format %{ "vpsubw $dst,$src,$mem\t! sub packed8S" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3031 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3032 bool vector256 = false;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3033 __ vpsubw($dst$$XMMRegister, $src$$XMMRegister, $mem$$Address, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3034 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3035 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3036 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3037
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3038 instruct vsub16S_reg(vecY dst, vecY src1, vecY src2) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3039 predicate(UseAVX > 1 && n->as_Vector()->length() == 16);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3040 match(Set dst (SubVS src1 src2));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3041 format %{ "vpsubw $dst,$src1,$src2\t! sub packed16S" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3042 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3043 bool vector256 = true;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3044 __ vpsubw($dst$$XMMRegister, $src1$$XMMRegister, $src2$$XMMRegister, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3045 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3046 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3047 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3048
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3049 instruct vsub16S_mem(vecY dst, vecY src, memory mem) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3050 predicate(UseAVX > 1 && n->as_Vector()->length() == 16);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3051 match(Set dst (SubVS src (LoadVector mem)));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3052 format %{ "vpsubw $dst,$src,$mem\t! sub packed16S" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3053 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3054 bool vector256 = true;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3055 __ vpsubw($dst$$XMMRegister, $src$$XMMRegister, $mem$$Address, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3056 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3057 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3058 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3059
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3060 // Integers vector sub
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3061 instruct vsub2I(vecD dst, vecD src) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3062 predicate(n->as_Vector()->length() == 2);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3063 match(Set dst (SubVI dst src));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3064 format %{ "psubd $dst,$src\t! sub packed2I" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3065 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3066 __ psubd($dst$$XMMRegister, $src$$XMMRegister);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3067 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3068 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3069 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3070
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3071 instruct vsub2I_reg(vecD dst, vecD src1, vecD src2) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3072 predicate(UseAVX > 0 && n->as_Vector()->length() == 2);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3073 match(Set dst (SubVI src1 src2));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3074 format %{ "vpsubd $dst,$src1,$src2\t! sub packed2I" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3075 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3076 bool vector256 = false;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3077 __ vpsubd($dst$$XMMRegister, $src1$$XMMRegister, $src2$$XMMRegister, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3078 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3079 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3080 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3081
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3082 instruct vsub4I(vecX dst, vecX src) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3083 predicate(n->as_Vector()->length() == 4);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3084 match(Set dst (SubVI dst src));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3085 format %{ "psubd $dst,$src\t! sub packed4I" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3086 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3087 __ psubd($dst$$XMMRegister, $src$$XMMRegister);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3088 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3089 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3090 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3091
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3092 instruct vsub4I_reg(vecX dst, vecX src1, vecX src2) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3093 predicate(UseAVX > 0 && n->as_Vector()->length() == 4);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3094 match(Set dst (SubVI src1 src2));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3095 format %{ "vpsubd $dst,$src1,$src2\t! sub packed4I" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3096 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3097 bool vector256 = false;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3098 __ vpsubd($dst$$XMMRegister, $src1$$XMMRegister, $src2$$XMMRegister, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3099 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3100 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3101 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3102
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3103 instruct vsub4I_mem(vecX dst, vecX src, memory mem) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3104 predicate(UseAVX > 0 && n->as_Vector()->length() == 4);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3105 match(Set dst (SubVI src (LoadVector mem)));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3106 format %{ "vpsubd $dst,$src,$mem\t! sub packed4I" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3107 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3108 bool vector256 = false;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3109 __ vpsubd($dst$$XMMRegister, $src$$XMMRegister, $mem$$Address, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3110 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3111 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3112 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3113
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3114 instruct vsub8I_reg(vecY dst, vecY src1, vecY src2) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3115 predicate(UseAVX > 1 && n->as_Vector()->length() == 8);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3116 match(Set dst (SubVI src1 src2));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3117 format %{ "vpsubd $dst,$src1,$src2\t! sub packed8I" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3118 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3119 bool vector256 = true;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3120 __ vpsubd($dst$$XMMRegister, $src1$$XMMRegister, $src2$$XMMRegister, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3121 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3122 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3123 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3124
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3125 instruct vsub8I_mem(vecY dst, vecY src, memory mem) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3126 predicate(UseAVX > 1 && n->as_Vector()->length() == 8);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3127 match(Set dst (SubVI src (LoadVector mem)));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3128 format %{ "vpsubd $dst,$src,$mem\t! sub packed8I" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3129 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3130 bool vector256 = true;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3131 __ vpsubd($dst$$XMMRegister, $src$$XMMRegister, $mem$$Address, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3132 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3133 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3134 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3135
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3136 // Longs vector sub
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3137 instruct vsub2L(vecX dst, vecX src) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3138 predicate(n->as_Vector()->length() == 2);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3139 match(Set dst (SubVL dst src));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3140 format %{ "psubq $dst,$src\t! sub packed2L" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3141 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3142 __ psubq($dst$$XMMRegister, $src$$XMMRegister);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3143 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3144 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3145 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3146
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3147 instruct vsub2L_reg(vecX dst, vecX src1, vecX src2) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3148 predicate(UseAVX > 0 && n->as_Vector()->length() == 2);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3149 match(Set dst (SubVL src1 src2));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3150 format %{ "vpsubq $dst,$src1,$src2\t! sub packed2L" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3151 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3152 bool vector256 = false;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3153 __ vpsubq($dst$$XMMRegister, $src1$$XMMRegister, $src2$$XMMRegister, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3154 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3155 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3156 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3157
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3158 instruct vsub2L_mem(vecX dst, vecX src, memory mem) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3159 predicate(UseAVX > 0 && n->as_Vector()->length() == 2);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3160 match(Set dst (SubVL src (LoadVector mem)));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3161 format %{ "vpsubq $dst,$src,$mem\t! sub packed2L" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3162 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3163 bool vector256 = false;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3164 __ vpsubq($dst$$XMMRegister, $src$$XMMRegister, $mem$$Address, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3165 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3166 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3167 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3168
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3169 instruct vsub4L_reg(vecY dst, vecY src1, vecY src2) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3170 predicate(UseAVX > 1 && n->as_Vector()->length() == 4);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3171 match(Set dst (SubVL src1 src2));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3172 format %{ "vpsubq $dst,$src1,$src2\t! sub packed4L" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3173 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3174 bool vector256 = true;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3175 __ vpsubq($dst$$XMMRegister, $src1$$XMMRegister, $src2$$XMMRegister, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3176 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3177 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3178 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3179
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3180 instruct vsub4L_mem(vecY dst, vecY src, memory mem) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3181 predicate(UseAVX > 1 && n->as_Vector()->length() == 4);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3182 match(Set dst (SubVL src (LoadVector mem)));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3183 format %{ "vpsubq $dst,$src,$mem\t! sub packed4L" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3184 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3185 bool vector256 = true;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3186 __ vpsubq($dst$$XMMRegister, $src$$XMMRegister, $mem$$Address, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3187 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3188 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3189 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3190
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3191 // Floats vector sub
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3192 instruct vsub2F(vecD dst, vecD src) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3193 predicate(n->as_Vector()->length() == 2);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3194 match(Set dst (SubVF dst src));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3195 format %{ "subps $dst,$src\t! sub packed2F" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3196 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3197 __ subps($dst$$XMMRegister, $src$$XMMRegister);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3198 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3199 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3200 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3201
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3202 instruct vsub2F_reg(vecD dst, vecD src1, vecD src2) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3203 predicate(UseAVX > 0 && n->as_Vector()->length() == 2);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3204 match(Set dst (SubVF src1 src2));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3205 format %{ "vsubps $dst,$src1,$src2\t! sub packed2F" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3206 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3207 bool vector256 = false;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3208 __ vsubps($dst$$XMMRegister, $src1$$XMMRegister, $src2$$XMMRegister, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3209 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3210 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3211 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3212
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3213 instruct vsub4F(vecX dst, vecX src) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3214 predicate(n->as_Vector()->length() == 4);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3215 match(Set dst (SubVF dst src));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3216 format %{ "subps $dst,$src\t! sub packed4F" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3217 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3218 __ subps($dst$$XMMRegister, $src$$XMMRegister);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3219 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3220 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3221 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3222
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3223 instruct vsub4F_reg(vecX dst, vecX src1, vecX src2) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3224 predicate(UseAVX > 0 && n->as_Vector()->length() == 4);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3225 match(Set dst (SubVF src1 src2));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3226 format %{ "vsubps $dst,$src1,$src2\t! sub packed4F" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3227 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3228 bool vector256 = false;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3229 __ vsubps($dst$$XMMRegister, $src1$$XMMRegister, $src2$$XMMRegister, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3230 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3231 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3232 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3233
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3234 instruct vsub4F_mem(vecX dst, vecX src, memory mem) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3235 predicate(UseAVX > 0 && n->as_Vector()->length() == 4);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3236 match(Set dst (SubVF src (LoadVector mem)));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3237 format %{ "vsubps $dst,$src,$mem\t! sub packed4F" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3238 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3239 bool vector256 = false;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3240 __ vsubps($dst$$XMMRegister, $src$$XMMRegister, $mem$$Address, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3241 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3242 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3243 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3244
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3245 instruct vsub8F_reg(vecY dst, vecY src1, vecY src2) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3246 predicate(UseAVX > 0 && n->as_Vector()->length() == 8);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3247 match(Set dst (SubVF src1 src2));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3248 format %{ "vsubps $dst,$src1,$src2\t! sub packed8F" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3249 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3250 bool vector256 = true;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3251 __ vsubps($dst$$XMMRegister, $src1$$XMMRegister, $src2$$XMMRegister, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3252 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3253 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3254 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3255
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3256 instruct vsub8F_mem(vecY dst, vecY src, memory mem) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3257 predicate(UseAVX > 0 && n->as_Vector()->length() == 8);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3258 match(Set dst (SubVF src (LoadVector mem)));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3259 format %{ "vsubps $dst,$src,$mem\t! sub packed8F" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3260 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3261 bool vector256 = true;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3262 __ vsubps($dst$$XMMRegister, $src$$XMMRegister, $mem$$Address, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3263 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3264 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3265 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3266
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3267 // Doubles vector sub
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3268 instruct vsub2D(vecX dst, vecX src) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3269 predicate(n->as_Vector()->length() == 2);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3270 match(Set dst (SubVD dst src));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3271 format %{ "subpd $dst,$src\t! sub packed2D" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3272 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3273 __ subpd($dst$$XMMRegister, $src$$XMMRegister);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3274 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3275 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3276 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3277
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3278 instruct vsub2D_reg(vecX dst, vecX src1, vecX src2) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3279 predicate(UseAVX > 0 && n->as_Vector()->length() == 2);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3280 match(Set dst (SubVD src1 src2));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3281 format %{ "vsubpd $dst,$src1,$src2\t! sub packed2D" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3282 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3283 bool vector256 = false;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3284 __ vsubpd($dst$$XMMRegister, $src1$$XMMRegister, $src2$$XMMRegister, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3285 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3286 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3287 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3288
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3289 instruct vsub2D_mem(vecX dst, vecX src, memory mem) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3290 predicate(UseAVX > 0 && n->as_Vector()->length() == 2);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3291 match(Set dst (SubVD src (LoadVector mem)));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3292 format %{ "vsubpd $dst,$src,$mem\t! sub packed2D" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3293 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3294 bool vector256 = false;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3295 __ vsubpd($dst$$XMMRegister, $src$$XMMRegister, $mem$$Address, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3296 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3297 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3298 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3299
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3300 instruct vsub4D_reg(vecY dst, vecY src1, vecY src2) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3301 predicate(UseAVX > 0 && n->as_Vector()->length() == 4);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3302 match(Set dst (SubVD src1 src2));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3303 format %{ "vsubpd $dst,$src1,$src2\t! sub packed4D" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3304 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3305 bool vector256 = true;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3306 __ vsubpd($dst$$XMMRegister, $src1$$XMMRegister, $src2$$XMMRegister, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3307 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3308 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3309 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3310
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3311 instruct vsub4D_mem(vecY dst, vecY src, memory mem) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3312 predicate(UseAVX > 0 && n->as_Vector()->length() == 4);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3313 match(Set dst (SubVD src (LoadVector mem)));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3314 format %{ "vsubpd $dst,$src,$mem\t! sub packed4D" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3315 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3316 bool vector256 = true;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3317 __ vsubpd($dst$$XMMRegister, $src$$XMMRegister, $mem$$Address, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3318 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3319 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3320 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3321
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3322 // --------------------------------- MUL --------------------------------------
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3323
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3324 // Shorts/Chars vector mul
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3325 instruct vmul2S(vecS dst, vecS src) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3326 predicate(n->as_Vector()->length() == 2);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3327 match(Set dst (MulVS dst src));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3328 format %{ "pmullw $dst,$src\t! mul packed2S" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3329 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3330 __ pmullw($dst$$XMMRegister, $src$$XMMRegister);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3331 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3332 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3333 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3334
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3335 instruct vmul2S_reg(vecS dst, vecS src1, vecS src2) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3336 predicate(UseAVX > 0 && n->as_Vector()->length() == 2);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3337 match(Set dst (MulVS src1 src2));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3338 format %{ "vpmullw $dst,$src1,$src2\t! mul packed2S" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3339 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3340 bool vector256 = false;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3341 __ vpmullw($dst$$XMMRegister, $src1$$XMMRegister, $src2$$XMMRegister, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3342 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3343 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3344 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3345
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3346 instruct vmul4S(vecD dst, vecD src) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3347 predicate(n->as_Vector()->length() == 4);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3348 match(Set dst (MulVS dst src));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3349 format %{ "pmullw $dst,$src\t! mul packed4S" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3350 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3351 __ pmullw($dst$$XMMRegister, $src$$XMMRegister);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3352 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3353 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3354 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3355
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3356 instruct vmul4S_reg(vecD dst, vecD src1, vecD src2) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3357 predicate(UseAVX > 0 && n->as_Vector()->length() == 4);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3358 match(Set dst (MulVS src1 src2));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3359 format %{ "vpmullw $dst,$src1,$src2\t! mul packed4S" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3360 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3361 bool vector256 = false;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3362 __ vpmullw($dst$$XMMRegister, $src1$$XMMRegister, $src2$$XMMRegister, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3363 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3364 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3365 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3366
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3367 instruct vmul8S(vecX dst, vecX src) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3368 predicate(n->as_Vector()->length() == 8);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3369 match(Set dst (MulVS dst src));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3370 format %{ "pmullw $dst,$src\t! mul packed8S" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3371 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3372 __ pmullw($dst$$XMMRegister, $src$$XMMRegister);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3373 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3374 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3375 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3376
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3377 instruct vmul8S_reg(vecX dst, vecX src1, vecX src2) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3378 predicate(UseAVX > 0 && n->as_Vector()->length() == 8);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3379 match(Set dst (MulVS src1 src2));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3380 format %{ "vpmullw $dst,$src1,$src2\t! mul packed8S" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3381 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3382 bool vector256 = false;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3383 __ vpmullw($dst$$XMMRegister, $src1$$XMMRegister, $src2$$XMMRegister, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3384 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3385 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3386 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3387
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3388 instruct vmul8S_mem(vecX dst, vecX src, memory mem) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3389 predicate(UseAVX > 0 && n->as_Vector()->length() == 8);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3390 match(Set dst (MulVS src (LoadVector mem)));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3391 format %{ "vpmullw $dst,$src,$mem\t! mul packed8S" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3392 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3393 bool vector256 = false;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3394 __ vpmullw($dst$$XMMRegister, $src$$XMMRegister, $mem$$Address, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3395 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3396 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3397 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3398
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3399 instruct vmul16S_reg(vecY dst, vecY src1, vecY src2) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3400 predicate(UseAVX > 1 && n->as_Vector()->length() == 16);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3401 match(Set dst (MulVS src1 src2));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3402 format %{ "vpmullw $dst,$src1,$src2\t! mul packed16S" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3403 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3404 bool vector256 = true;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3405 __ vpmullw($dst$$XMMRegister, $src1$$XMMRegister, $src2$$XMMRegister, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3406 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3407 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3408 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3409
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3410 instruct vmul16S_mem(vecY dst, vecY src, memory mem) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3411 predicate(UseAVX > 1 && n->as_Vector()->length() == 16);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3412 match(Set dst (MulVS src (LoadVector mem)));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3413 format %{ "vpmullw $dst,$src,$mem\t! mul packed16S" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3414 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3415 bool vector256 = true;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3416 __ vpmullw($dst$$XMMRegister, $src$$XMMRegister, $mem$$Address, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3417 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3418 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3419 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3420
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3421 // Integers vector mul (sse4_1)
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3422 instruct vmul2I(vecD dst, vecD src) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3423 predicate(UseSSE > 3 && n->as_Vector()->length() == 2);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3424 match(Set dst (MulVI dst src));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3425 format %{ "pmulld $dst,$src\t! mul packed2I" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3426 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3427 __ pmulld($dst$$XMMRegister, $src$$XMMRegister);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3428 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3429 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3430 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3431
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3432 instruct vmul2I_reg(vecD dst, vecD src1, vecD src2) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3433 predicate(UseAVX > 0 && n->as_Vector()->length() == 2);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3434 match(Set dst (MulVI src1 src2));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3435 format %{ "vpmulld $dst,$src1,$src2\t! mul packed2I" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3436 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3437 bool vector256 = false;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3438 __ vpmulld($dst$$XMMRegister, $src1$$XMMRegister, $src2$$XMMRegister, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3439 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3440 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3441 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3442
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3443 instruct vmul4I(vecX dst, vecX src) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3444 predicate(UseSSE > 3 && n->as_Vector()->length() == 4);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3445 match(Set dst (MulVI dst src));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3446 format %{ "pmulld $dst,$src\t! mul packed4I" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3447 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3448 __ pmulld($dst$$XMMRegister, $src$$XMMRegister);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3449 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3450 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3451 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3452
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3453 instruct vmul4I_reg(vecX dst, vecX src1, vecX src2) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3454 predicate(UseAVX > 0 && n->as_Vector()->length() == 4);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3455 match(Set dst (MulVI src1 src2));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3456 format %{ "vpmulld $dst,$src1,$src2\t! mul packed4I" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3457 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3458 bool vector256 = false;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3459 __ vpmulld($dst$$XMMRegister, $src1$$XMMRegister, $src2$$XMMRegister, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3460 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3461 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3462 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3463
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3464 instruct vmul4I_mem(vecX dst, vecX src, memory mem) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3465 predicate(UseAVX > 0 && n->as_Vector()->length() == 4);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3466 match(Set dst (MulVI src (LoadVector mem)));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3467 format %{ "vpmulld $dst,$src,$mem\t! mul packed4I" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3468 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3469 bool vector256 = false;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3470 __ vpmulld($dst$$XMMRegister, $src$$XMMRegister, $mem$$Address, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3471 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3472 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3473 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3474
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3475 instruct vmul8I_reg(vecY dst, vecY src1, vecY src2) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3476 predicate(UseAVX > 1 && n->as_Vector()->length() == 8);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3477 match(Set dst (MulVI src1 src2));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3478 format %{ "vpmulld $dst,$src1,$src2\t! mul packed8I" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3479 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3480 bool vector256 = true;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3481 __ vpmulld($dst$$XMMRegister, $src1$$XMMRegister, $src2$$XMMRegister, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3482 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3483 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3484 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3485
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3486 instruct vmul8I_mem(vecY dst, vecY src, memory mem) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3487 predicate(UseAVX > 1 && n->as_Vector()->length() == 8);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3488 match(Set dst (MulVI src (LoadVector mem)));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3489 format %{ "vpmulld $dst,$src,$mem\t! mul packed8I" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3490 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3491 bool vector256 = true;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3492 __ vpmulld($dst$$XMMRegister, $src$$XMMRegister, $mem$$Address, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3493 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3494 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3495 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3496
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3497 // Floats vector mul
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3498 instruct vmul2F(vecD dst, vecD src) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3499 predicate(n->as_Vector()->length() == 2);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3500 match(Set dst (MulVF dst src));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3501 format %{ "mulps $dst,$src\t! mul packed2F" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3502 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3503 __ mulps($dst$$XMMRegister, $src$$XMMRegister);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3504 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3505 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3506 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3507
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3508 instruct vmul2F_reg(vecD dst, vecD src1, vecD src2) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3509 predicate(UseAVX > 0 && n->as_Vector()->length() == 2);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3510 match(Set dst (MulVF src1 src2));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3511 format %{ "vmulps $dst,$src1,$src2\t! mul packed2F" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3512 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3513 bool vector256 = false;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3514 __ vmulps($dst$$XMMRegister, $src1$$XMMRegister, $src2$$XMMRegister, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3515 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3516 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3517 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3518
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3519 instruct vmul4F(vecX dst, vecX src) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3520 predicate(n->as_Vector()->length() == 4);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3521 match(Set dst (MulVF dst src));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3522 format %{ "mulps $dst,$src\t! mul packed4F" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3523 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3524 __ mulps($dst$$XMMRegister, $src$$XMMRegister);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3525 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3526 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3527 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3528
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3529 instruct vmul4F_reg(vecX dst, vecX src1, vecX src2) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3530 predicate(UseAVX > 0 && n->as_Vector()->length() == 4);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3531 match(Set dst (MulVF src1 src2));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3532 format %{ "vmulps $dst,$src1,$src2\t! mul packed4F" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3533 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3534 bool vector256 = false;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3535 __ vmulps($dst$$XMMRegister, $src1$$XMMRegister, $src2$$XMMRegister, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3536 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3537 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3538 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3539
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3540 instruct vmul4F_mem(vecX dst, vecX src, memory mem) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3541 predicate(UseAVX > 0 && n->as_Vector()->length() == 4);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3542 match(Set dst (MulVF src (LoadVector mem)));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3543 format %{ "vmulps $dst,$src,$mem\t! mul packed4F" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3544 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3545 bool vector256 = false;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3546 __ vmulps($dst$$XMMRegister, $src$$XMMRegister, $mem$$Address, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3547 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3548 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3549 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3550
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3551 instruct vmul8F_reg(vecY dst, vecY src1, vecY src2) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3552 predicate(UseAVX > 0 && n->as_Vector()->length() == 8);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3553 match(Set dst (MulVF src1 src2));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3554 format %{ "vmulps $dst,$src1,$src2\t! mul packed8F" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3555 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3556 bool vector256 = true;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3557 __ vmulps($dst$$XMMRegister, $src1$$XMMRegister, $src2$$XMMRegister, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3558 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3559 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3560 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3561
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3562 instruct vmul8F_mem(vecY dst, vecY src, memory mem) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3563 predicate(UseAVX > 0 && n->as_Vector()->length() == 8);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3564 match(Set dst (MulVF src (LoadVector mem)));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3565 format %{ "vmulps $dst,$src,$mem\t! mul packed8F" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3566 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3567 bool vector256 = true;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3568 __ vmulps($dst$$XMMRegister, $src$$XMMRegister, $mem$$Address, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3569 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3570 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3571 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3572
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3573 // Doubles vector mul
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3574 instruct vmul2D(vecX dst, vecX src) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3575 predicate(n->as_Vector()->length() == 2);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3576 match(Set dst (MulVD dst src));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3577 format %{ "mulpd $dst,$src\t! mul packed2D" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3578 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3579 __ mulpd($dst$$XMMRegister, $src$$XMMRegister);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3580 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3581 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3582 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3583
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3584 instruct vmul2D_reg(vecX dst, vecX src1, vecX src2) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3585 predicate(UseAVX > 0 && n->as_Vector()->length() == 2);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3586 match(Set dst (MulVD src1 src2));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3587 format %{ "vmulpd $dst,$src1,$src2\t! mul packed2D" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3588 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3589 bool vector256 = false;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3590 __ vmulpd($dst$$XMMRegister, $src1$$XMMRegister, $src2$$XMMRegister, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3591 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3592 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3593 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3594
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3595 instruct vmul2D_mem(vecX dst, vecX src, memory mem) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3596 predicate(UseAVX > 0 && n->as_Vector()->length() == 2);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3597 match(Set dst (MulVD src (LoadVector mem)));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3598 format %{ "vmulpd $dst,$src,$mem\t! mul packed2D" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3599 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3600 bool vector256 = false;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3601 __ vmulpd($dst$$XMMRegister, $src$$XMMRegister, $mem$$Address, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3602 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3603 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3604 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3605
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3606 instruct vmul4D_reg(vecY dst, vecY src1, vecY src2) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3607 predicate(UseAVX > 0 && n->as_Vector()->length() == 4);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3608 match(Set dst (MulVD src1 src2));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3609 format %{ "vmulpd $dst,$src1,$src2\t! mul packed4D" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3610 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3611 bool vector256 = true;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3612 __ vmulpd($dst$$XMMRegister, $src1$$XMMRegister, $src2$$XMMRegister, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3613 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3614 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3615 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3616
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3617 instruct vmul4D_mem(vecY dst, vecY src, memory mem) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3618 predicate(UseAVX > 0 && n->as_Vector()->length() == 4);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3619 match(Set dst (MulVD src (LoadVector mem)));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3620 format %{ "vmulpd $dst,$src,$mem\t! mul packed4D" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3621 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3622 bool vector256 = true;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3623 __ vmulpd($dst$$XMMRegister, $src$$XMMRegister, $mem$$Address, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3624 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3625 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3626 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3627
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3628 // --------------------------------- DIV --------------------------------------
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3629
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3630 // Floats vector div
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3631 instruct vdiv2F(vecD dst, vecD src) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3632 predicate(n->as_Vector()->length() == 2);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3633 match(Set dst (DivVF dst src));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3634 format %{ "divps $dst,$src\t! div packed2F" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3635 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3636 __ divps($dst$$XMMRegister, $src$$XMMRegister);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3637 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3638 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3639 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3640
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3641 instruct vdiv2F_reg(vecD dst, vecD src1, vecD src2) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3642 predicate(UseAVX > 0 && n->as_Vector()->length() == 2);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3643 match(Set dst (DivVF src1 src2));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3644 format %{ "vdivps $dst,$src1,$src2\t! div packed2F" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3645 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3646 bool vector256 = false;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3647 __ vdivps($dst$$XMMRegister, $src1$$XMMRegister, $src2$$XMMRegister, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3648 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3649 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3650 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3651
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3652 instruct vdiv4F(vecX dst, vecX src) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3653 predicate(n->as_Vector()->length() == 4);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3654 match(Set dst (DivVF dst src));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3655 format %{ "divps $dst,$src\t! div packed4F" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3656 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3657 __ divps($dst$$XMMRegister, $src$$XMMRegister);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3658 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3659 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3660 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3661
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3662 instruct vdiv4F_reg(vecX dst, vecX src1, vecX src2) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3663 predicate(UseAVX > 0 && n->as_Vector()->length() == 4);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3664 match(Set dst (DivVF src1 src2));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3665 format %{ "vdivps $dst,$src1,$src2\t! div packed4F" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3666 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3667 bool vector256 = false;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3668 __ vdivps($dst$$XMMRegister, $src1$$XMMRegister, $src2$$XMMRegister, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3669 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3670 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3671 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3672
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3673 instruct vdiv4F_mem(vecX dst, vecX src, memory mem) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3674 predicate(UseAVX > 0 && n->as_Vector()->length() == 4);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3675 match(Set dst (DivVF src (LoadVector mem)));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3676 format %{ "vdivps $dst,$src,$mem\t! div packed4F" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3677 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3678 bool vector256 = false;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3679 __ vdivps($dst$$XMMRegister, $src$$XMMRegister, $mem$$Address, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3680 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3681 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3682 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3683
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3684 instruct vdiv8F_reg(vecY dst, vecY src1, vecY src2) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3685 predicate(UseAVX > 0 && n->as_Vector()->length() == 8);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3686 match(Set dst (DivVF src1 src2));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3687 format %{ "vdivps $dst,$src1,$src2\t! div packed8F" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3688 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3689 bool vector256 = true;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3690 __ vdivps($dst$$XMMRegister, $src1$$XMMRegister, $src2$$XMMRegister, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3691 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3692 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3693 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3694
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3695 instruct vdiv8F_mem(vecY dst, vecY src, memory mem) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3696 predicate(UseAVX > 0 && n->as_Vector()->length() == 8);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3697 match(Set dst (DivVF src (LoadVector mem)));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3698 format %{ "vdivps $dst,$src,$mem\t! div packed8F" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3699 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3700 bool vector256 = true;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3701 __ vdivps($dst$$XMMRegister, $src$$XMMRegister, $mem$$Address, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3702 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3703 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3704 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3705
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3706 // Doubles vector div
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3707 instruct vdiv2D(vecX dst, vecX src) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3708 predicate(n->as_Vector()->length() == 2);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3709 match(Set dst (DivVD dst src));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3710 format %{ "divpd $dst,$src\t! div packed2D" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3711 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3712 __ divpd($dst$$XMMRegister, $src$$XMMRegister);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3713 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3714 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3715 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3716
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3717 instruct vdiv2D_reg(vecX dst, vecX src1, vecX src2) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3718 predicate(UseAVX > 0 && n->as_Vector()->length() == 2);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3719 match(Set dst (DivVD src1 src2));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3720 format %{ "vdivpd $dst,$src1,$src2\t! div packed2D" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3721 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3722 bool vector256 = false;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3723 __ vdivpd($dst$$XMMRegister, $src1$$XMMRegister, $src2$$XMMRegister, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3724 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3725 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3726 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3727
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3728 instruct vdiv2D_mem(vecX dst, vecX src, memory mem) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3729 predicate(UseAVX > 0 && n->as_Vector()->length() == 2);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3730 match(Set dst (DivVD src (LoadVector mem)));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3731 format %{ "vdivpd $dst,$src,$mem\t! div packed2D" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3732 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3733 bool vector256 = false;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3734 __ vdivpd($dst$$XMMRegister, $src$$XMMRegister, $mem$$Address, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3735 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3736 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3737 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3738
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3739 instruct vdiv4D_reg(vecY dst, vecY src1, vecY src2) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3740 predicate(UseAVX > 0 && n->as_Vector()->length() == 4);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3741 match(Set dst (DivVD src1 src2));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3742 format %{ "vdivpd $dst,$src1,$src2\t! div packed4D" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3743 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3744 bool vector256 = true;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3745 __ vdivpd($dst$$XMMRegister, $src1$$XMMRegister, $src2$$XMMRegister, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3746 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3747 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3748 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3749
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3750 instruct vdiv4D_mem(vecY dst, vecY src, memory mem) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3751 predicate(UseAVX > 0 && n->as_Vector()->length() == 4);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3752 match(Set dst (DivVD src (LoadVector mem)));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3753 format %{ "vdivpd $dst,$src,$mem\t! div packed4D" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3754 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3755 bool vector256 = true;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3756 __ vdivpd($dst$$XMMRegister, $src$$XMMRegister, $mem$$Address, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3757 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3758 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3759 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3760
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3761 // ------------------------------ LeftShift -----------------------------------
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3762
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3763 // Shorts/Chars vector left shift
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3764 instruct vsll2S(vecS dst, regF shift) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3765 predicate(n->as_Vector()->length() == 2);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3766 match(Set dst (LShiftVS dst shift));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3767 format %{ "psllw $dst,$shift\t! left shift packed2S" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3768 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3769 __ psllw($dst$$XMMRegister, $shift$$XMMRegister);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3770 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3771 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3772 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3773
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3774 instruct vsll2S_imm(vecS dst, immI8 shift) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3775 predicate(n->as_Vector()->length() == 2);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3776 match(Set dst (LShiftVS dst shift));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3777 format %{ "psllw $dst,$shift\t! left shift packed2S" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3778 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3779 __ psllw($dst$$XMMRegister, (int)$shift$$constant);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3780 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3781 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3782 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3783
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3784 instruct vsll2S_reg(vecS dst, vecS src, regF shift) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3785 predicate(UseAVX > 0 && n->as_Vector()->length() == 2);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3786 match(Set dst (LShiftVS src shift));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3787 format %{ "vpsllw $dst,$src,$shift\t! left shift packed2S" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3788 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3789 bool vector256 = false;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3790 __ vpsllw($dst$$XMMRegister, $src$$XMMRegister, $shift$$XMMRegister, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3791 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3792 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3793 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3794
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3795 instruct vsll2S_reg_imm(vecS dst, vecS src, immI8 shift) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3796 predicate(UseAVX > 0 && n->as_Vector()->length() == 2);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3797 match(Set dst (LShiftVS src shift));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3798 format %{ "vpsllw $dst,$src,$shift\t! left shift packed2S" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3799 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3800 bool vector256 = false;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3801 __ vpsllw($dst$$XMMRegister, $src$$XMMRegister, (int)$shift$$constant, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3802 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3803 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3804 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3805
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3806 instruct vsll4S(vecD dst, regF shift) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3807 predicate(n->as_Vector()->length() == 4);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3808 match(Set dst (LShiftVS dst shift));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3809 format %{ "psllw $dst,$shift\t! left shift packed4S" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3810 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3811 __ psllw($dst$$XMMRegister, $shift$$XMMRegister);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3812 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3813 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3814 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3815
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3816 instruct vsll4S_imm(vecD dst, immI8 shift) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3817 predicate(n->as_Vector()->length() == 4);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3818 match(Set dst (LShiftVS dst shift));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3819 format %{ "psllw $dst,$shift\t! left shift packed4S" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3820 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3821 __ psllw($dst$$XMMRegister, (int)$shift$$constant);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3822 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3823 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3824 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3825
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3826 instruct vsll4S_reg(vecD dst, vecD src, regF shift) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3827 predicate(UseAVX > 0 && n->as_Vector()->length() == 4);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3828 match(Set dst (LShiftVS src shift));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3829 format %{ "vpsllw $dst,$src,$shift\t! left shift packed4S" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3830 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3831 bool vector256 = false;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3832 __ vpsllw($dst$$XMMRegister, $src$$XMMRegister, $shift$$XMMRegister, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3833 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3834 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3835 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3836
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3837 instruct vsll4S_reg_imm(vecD dst, vecD src, immI8 shift) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3838 predicate(UseAVX > 0 && n->as_Vector()->length() == 4);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3839 match(Set dst (LShiftVS src shift));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3840 format %{ "vpsllw $dst,$src,$shift\t! left shift packed4S" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3841 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3842 bool vector256 = false;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3843 __ vpsllw($dst$$XMMRegister, $src$$XMMRegister, (int)$shift$$constant, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3844 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3845 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3846 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3847
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3848 instruct vsll8S(vecX dst, regF shift) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3849 predicate(n->as_Vector()->length() == 8);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3850 match(Set dst (LShiftVS dst shift));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3851 format %{ "psllw $dst,$shift\t! left shift packed8S" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3852 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3853 __ psllw($dst$$XMMRegister, $shift$$XMMRegister);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3854 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3855 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3856 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3857
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3858 instruct vsll8S_imm(vecX dst, immI8 shift) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3859 predicate(n->as_Vector()->length() == 8);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3860 match(Set dst (LShiftVS dst shift));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3861 format %{ "psllw $dst,$shift\t! left shift packed8S" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3862 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3863 __ psllw($dst$$XMMRegister, (int)$shift$$constant);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3864 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3865 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3866 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3867
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3868 instruct vsll8S_reg(vecX dst, vecX src, regF shift) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3869 predicate(UseAVX > 0 && n->as_Vector()->length() == 8);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3870 match(Set dst (LShiftVS src shift));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3871 format %{ "vpsllw $dst,$src,$shift\t! left shift packed8S" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3872 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3873 bool vector256 = false;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3874 __ vpsllw($dst$$XMMRegister, $src$$XMMRegister, $shift$$XMMRegister, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3875 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3876 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3877 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3878
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3879 instruct vsll8S_reg_imm(vecX dst, vecX src, immI8 shift) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3880 predicate(UseAVX > 0 && n->as_Vector()->length() == 8);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3881 match(Set dst (LShiftVS src shift));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3882 format %{ "vpsllw $dst,$src,$shift\t! left shift packed8S" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3883 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3884 bool vector256 = false;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3885 __ vpsllw($dst$$XMMRegister, $src$$XMMRegister, (int)$shift$$constant, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3886 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3887 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3888 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3889
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3890 instruct vsll16S_reg(vecY dst, vecY src, regF shift) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3891 predicate(UseAVX > 1 && n->as_Vector()->length() == 16);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3892 match(Set dst (LShiftVS src shift));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3893 format %{ "vpsllw $dst,$src,$shift\t! left shift packed16S" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3894 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3895 bool vector256 = true;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3896 __ vpsllw($dst$$XMMRegister, $src$$XMMRegister, $shift$$XMMRegister, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3897 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3898 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3899 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3900
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3901 instruct vsll16S_reg_imm(vecY dst, vecY src, immI8 shift) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3902 predicate(UseAVX > 1 && n->as_Vector()->length() == 16);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3903 match(Set dst (LShiftVS src shift));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3904 format %{ "vpsllw $dst,$src,$shift\t! left shift packed16S" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3905 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3906 bool vector256 = true;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3907 __ vpsllw($dst$$XMMRegister, $src$$XMMRegister, (int)$shift$$constant, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3908 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3909 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3910 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3911
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3912 // Integers vector left shift
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3913 instruct vsll2I(vecD dst, regF shift) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3914 predicate(n->as_Vector()->length() == 2);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3915 match(Set dst (LShiftVI dst shift));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3916 format %{ "pslld $dst,$shift\t! left shift packed2I" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3917 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3918 __ pslld($dst$$XMMRegister, $shift$$XMMRegister);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3919 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3920 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3921 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3922
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3923 instruct vsll2I_imm(vecD dst, immI8 shift) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3924 predicate(n->as_Vector()->length() == 2);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3925 match(Set dst (LShiftVI dst shift));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3926 format %{ "pslld $dst,$shift\t! left shift packed2I" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3927 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3928 __ pslld($dst$$XMMRegister, (int)$shift$$constant);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3929 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3930 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3931 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3932
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3933 instruct vsll2I_reg(vecD dst, vecD src, regF shift) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3934 predicate(UseAVX > 0 && n->as_Vector()->length() == 2);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3935 match(Set dst (LShiftVI src shift));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3936 format %{ "vpslld $dst,$src,$shift\t! left shift packed2I" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3937 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3938 bool vector256 = false;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3939 __ vpslld($dst$$XMMRegister, $src$$XMMRegister, $shift$$XMMRegister, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3940 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3941 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3942 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3943
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3944 instruct vsll2I_reg_imm(vecD dst, vecD src, immI8 shift) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3945 predicate(UseAVX > 0 && n->as_Vector()->length() == 2);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3946 match(Set dst (LShiftVI src shift));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3947 format %{ "vpslld $dst,$src,$shift\t! left shift packed2I" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3948 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3949 bool vector256 = false;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3950 __ vpslld($dst$$XMMRegister, $src$$XMMRegister, (int)$shift$$constant, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3951 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3952 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3953 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3954
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3955 instruct vsll4I(vecX dst, regF shift) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3956 predicate(n->as_Vector()->length() == 4);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3957 match(Set dst (LShiftVI dst shift));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3958 format %{ "pslld $dst,$shift\t! left shift packed4I" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3959 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3960 __ pslld($dst$$XMMRegister, $shift$$XMMRegister);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3961 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3962 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3963 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3964
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3965 instruct vsll4I_imm(vecX dst, immI8 shift) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3966 predicate(n->as_Vector()->length() == 4);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3967 match(Set dst (LShiftVI dst shift));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3968 format %{ "pslld $dst,$shift\t! left shift packed4I" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3969 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3970 __ pslld($dst$$XMMRegister, (int)$shift$$constant);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3971 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3972 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3973 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3974
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3975 instruct vsll4I_reg(vecX dst, vecX src, regF shift) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3976 predicate(UseAVX > 0 && n->as_Vector()->length() == 4);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3977 match(Set dst (LShiftVI src shift));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3978 format %{ "vpslld $dst,$src,$shift\t! left shift packed4I" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3979 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3980 bool vector256 = false;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3981 __ vpslld($dst$$XMMRegister, $src$$XMMRegister, $shift$$XMMRegister, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3982 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3983 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3984 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3985
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3986 instruct vsll4I_reg_imm(vecX dst, vecX src, immI8 shift) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3987 predicate(UseAVX > 0 && n->as_Vector()->length() == 4);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3988 match(Set dst (LShiftVI src shift));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3989 format %{ "vpslld $dst,$src,$shift\t! left shift packed4I" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3990 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3991 bool vector256 = false;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3992 __ vpslld($dst$$XMMRegister, $src$$XMMRegister, (int)$shift$$constant, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3993 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3994 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3995 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3996
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3997 instruct vsll8I_reg(vecY dst, vecY src, regF shift) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3998 predicate(UseAVX > 1 && n->as_Vector()->length() == 8);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	3999 match(Set dst (LShiftVI src shift));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4000 format %{ "vpslld $dst,$src,$shift\t! left shift packed8I" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4001 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4002 bool vector256 = true;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4003 __ vpslld($dst$$XMMRegister, $src$$XMMRegister, $shift$$XMMRegister, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4004 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4005 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4006 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4007
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4008 instruct vsll8I_reg_imm(vecY dst, vecY src, immI8 shift) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4009 predicate(UseAVX > 1 && n->as_Vector()->length() == 8);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4010 match(Set dst (LShiftVI src shift));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4011 format %{ "vpslld $dst,$src,$shift\t! left shift packed8I" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4012 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4013 bool vector256 = true;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4014 __ vpslld($dst$$XMMRegister, $src$$XMMRegister, (int)$shift$$constant, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4015 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4016 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4017 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4018
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4019 // Longs vector left shift
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4020 instruct vsll2L(vecX dst, regF shift) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4021 predicate(n->as_Vector()->length() == 2);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4022 match(Set dst (LShiftVL dst shift));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4023 format %{ "psllq $dst,$shift\t! left shift packed2L" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4024 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4025 __ psllq($dst$$XMMRegister, $shift$$XMMRegister);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4026 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4027 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4028 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4029
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4030 instruct vsll2L_imm(vecX dst, immI8 shift) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4031 predicate(n->as_Vector()->length() == 2);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4032 match(Set dst (LShiftVL dst shift));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4033 format %{ "psllq $dst,$shift\t! left shift packed2L" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4034 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4035 __ psllq($dst$$XMMRegister, (int)$shift$$constant);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4036 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4037 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4038 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4039
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4040 instruct vsll2L_reg(vecX dst, vecX src, regF shift) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4041 predicate(UseAVX > 0 && n->as_Vector()->length() == 2);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4042 match(Set dst (LShiftVL src shift));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4043 format %{ "vpsllq $dst,$src,$shift\t! left shift packed2L" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4044 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4045 bool vector256 = false;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4046 __ vpsllq($dst$$XMMRegister, $src$$XMMRegister, $shift$$XMMRegister, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4047 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4048 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4049 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4050
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4051 instruct vsll2L_reg_imm(vecX dst, vecX src, immI8 shift) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4052 predicate(UseAVX > 0 && n->as_Vector()->length() == 2);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4053 match(Set dst (LShiftVL src shift));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4054 format %{ "vpsllq $dst,$src,$shift\t! left shift packed2L" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4055 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4056 bool vector256 = false;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4057 __ vpsllq($dst$$XMMRegister, $src$$XMMRegister, (int)$shift$$constant, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4058 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4059 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4060 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4061
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4062 instruct vsll4L_reg(vecY dst, vecY src, regF shift) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4063 predicate(UseAVX > 1 && n->as_Vector()->length() == 4);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4064 match(Set dst (LShiftVL src shift));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4065 format %{ "vpsllq $dst,$src,$shift\t! left shift packed4L" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4066 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4067 bool vector256 = true;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4068 __ vpsllq($dst$$XMMRegister, $src$$XMMRegister, $shift$$XMMRegister, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4069 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4070 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4071 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4072
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4073 instruct vsll4L_reg_imm(vecY dst, vecY src, immI8 shift) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4074 predicate(UseAVX > 1 && n->as_Vector()->length() == 4);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4075 match(Set dst (LShiftVL src shift));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4076 format %{ "vpsllq $dst,$src,$shift\t! left shift packed4L" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4077 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4078 bool vector256 = true;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4079 __ vpsllq($dst$$XMMRegister, $src$$XMMRegister, (int)$shift$$constant, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4080 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4081 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4082 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4083
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4084 // ----------------------- LogicalRightShift -----------------------------------
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4085
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4086 // Shorts/Chars vector logical right shift produces incorrect Java result
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4087 // for negative data because java code convert short value into int with
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4088 // sign extension before a shift.
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4089
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4090 // Integers vector logical right shift
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4091 instruct vsrl2I(vecD dst, regF shift) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4092 predicate(n->as_Vector()->length() == 2);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4093 match(Set dst (URShiftVI dst shift));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4094 format %{ "psrld $dst,$shift\t! logical right shift packed2I" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4095 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4096 __ psrld($dst$$XMMRegister, $shift$$XMMRegister);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4097 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4098 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4099 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4100
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4101 instruct vsrl2I_imm(vecD dst, immI8 shift) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4102 predicate(n->as_Vector()->length() == 2);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4103 match(Set dst (URShiftVI dst shift));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4104 format %{ "psrld $dst,$shift\t! logical right shift packed2I" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4105 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4106 __ psrld($dst$$XMMRegister, (int)$shift$$constant);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4107 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4108 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4109 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4110
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4111 instruct vsrl2I_reg(vecD dst, vecD src, regF shift) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4112 predicate(UseAVX > 0 && n->as_Vector()->length() == 2);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4113 match(Set dst (URShiftVI src shift));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4114 format %{ "vpsrld $dst,$src,$shift\t! logical right shift packed2I" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4115 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4116 bool vector256 = false;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4117 __ vpsrld($dst$$XMMRegister, $src$$XMMRegister, $shift$$XMMRegister, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4118 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4119 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4120 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4121
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4122 instruct vsrl2I_reg_imm(vecD dst, vecD src, immI8 shift) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4123 predicate(UseAVX > 0 && n->as_Vector()->length() == 2);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4124 match(Set dst (URShiftVI src shift));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4125 format %{ "vpsrld $dst,$src,$shift\t! logical right shift packed2I" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4126 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4127 bool vector256 = false;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4128 __ vpsrld($dst$$XMMRegister, $src$$XMMRegister, (int)$shift$$constant, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4129 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4130 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4131 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4132
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4133 instruct vsrl4I(vecX dst, regF shift) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4134 predicate(n->as_Vector()->length() == 4);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4135 match(Set dst (URShiftVI dst shift));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4136 format %{ "psrld $dst,$shift\t! logical right shift packed4I" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4137 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4138 __ psrld($dst$$XMMRegister, $shift$$XMMRegister);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4139 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4140 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4141 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4142
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4143 instruct vsrl4I_imm(vecX dst, immI8 shift) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4144 predicate(n->as_Vector()->length() == 4);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4145 match(Set dst (URShiftVI dst shift));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4146 format %{ "psrld $dst,$shift\t! logical right shift packed4I" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4147 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4148 __ psrld($dst$$XMMRegister, (int)$shift$$constant);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4149 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4150 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4151 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4152
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4153 instruct vsrl4I_reg(vecX dst, vecX src, regF shift) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4154 predicate(UseAVX > 0 && n->as_Vector()->length() == 4);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4155 match(Set dst (URShiftVI src shift));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4156 format %{ "vpsrld $dst,$src,$shift\t! logical right shift packed4I" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4157 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4158 bool vector256 = false;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4159 __ vpsrld($dst$$XMMRegister, $src$$XMMRegister, $shift$$XMMRegister, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4160 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4161 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4162 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4163
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4164 instruct vsrl4I_reg_imm(vecX dst, vecX src, immI8 shift) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4165 predicate(UseAVX > 0 && n->as_Vector()->length() == 4);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4166 match(Set dst (URShiftVI src shift));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4167 format %{ "vpsrld $dst,$src,$shift\t! logical right shift packed4I" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4168 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4169 bool vector256 = false;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4170 __ vpsrld($dst$$XMMRegister, $src$$XMMRegister, (int)$shift$$constant, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4171 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4172 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4173 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4174
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4175 instruct vsrl8I_reg(vecY dst, vecY src, regF shift) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4176 predicate(UseAVX > 1 && n->as_Vector()->length() == 8);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4177 match(Set dst (URShiftVI src shift));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4178 format %{ "vpsrld $dst,$src,$shift\t! logical right shift packed8I" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4179 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4180 bool vector256 = true;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4181 __ vpsrld($dst$$XMMRegister, $src$$XMMRegister, $shift$$XMMRegister, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4182 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4183 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4184 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4185
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4186 instruct vsrl8I_reg_imm(vecY dst, vecY src, immI8 shift) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4187 predicate(UseAVX > 1 && n->as_Vector()->length() == 8);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4188 match(Set dst (URShiftVI src shift));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4189 format %{ "vpsrld $dst,$src,$shift\t! logical right shift packed8I" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4190 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4191 bool vector256 = true;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4192 __ vpsrld($dst$$XMMRegister, $src$$XMMRegister, (int)$shift$$constant, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4193 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4194 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4195 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4196
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4197 // Longs vector logical right shift
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4198 instruct vsrl2L(vecX dst, regF shift) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4199 predicate(n->as_Vector()->length() == 2);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4200 match(Set dst (URShiftVL dst shift));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4201 format %{ "psrlq $dst,$shift\t! logical right shift packed2L" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4202 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4203 __ psrlq($dst$$XMMRegister, $shift$$XMMRegister);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4204 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4205 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4206 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4207
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4208 instruct vsrl2L_imm(vecX dst, immI8 shift) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4209 predicate(n->as_Vector()->length() == 2);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4210 match(Set dst (URShiftVL dst shift));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4211 format %{ "psrlq $dst,$shift\t! logical right shift packed2L" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4212 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4213 __ psrlq($dst$$XMMRegister, (int)$shift$$constant);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4214 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4215 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4216 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4217
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4218 instruct vsrl2L_reg(vecX dst, vecX src, regF shift) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4219 predicate(UseAVX > 0 && n->as_Vector()->length() == 2);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4220 match(Set dst (URShiftVL src shift));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4221 format %{ "vpsrlq $dst,$src,$shift\t! logical right shift packed2L" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4222 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4223 bool vector256 = false;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4224 __ vpsrlq($dst$$XMMRegister, $src$$XMMRegister, $shift$$XMMRegister, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4225 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4226 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4227 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4228
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4229 instruct vsrl2L_reg_imm(vecX dst, vecX src, immI8 shift) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4230 predicate(UseAVX > 0 && n->as_Vector()->length() == 2);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4231 match(Set dst (URShiftVL src shift));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4232 format %{ "vpsrlq $dst,$src,$shift\t! logical right shift packed2L" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4233 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4234 bool vector256 = false;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4235 __ vpsrlq($dst$$XMMRegister, $src$$XMMRegister, (int)$shift$$constant, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4236 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4237 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4238 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4239
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4240 instruct vsrl4L_reg(vecY dst, vecY src, regF shift) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4241 predicate(UseAVX > 1 && n->as_Vector()->length() == 4);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4242 match(Set dst (URShiftVL src shift));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4243 format %{ "vpsrlq $dst,$src,$shift\t! logical right shift packed4L" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4244 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4245 bool vector256 = true;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4246 __ vpsrlq($dst$$XMMRegister, $src$$XMMRegister, $shift$$XMMRegister, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4247 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4248 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4249 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4250
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4251 instruct vsrl4L_reg_imm(vecY dst, vecY src, immI8 shift) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4252 predicate(UseAVX > 1 && n->as_Vector()->length() == 4);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4253 match(Set dst (URShiftVL src shift));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4254 format %{ "vpsrlq $dst,$src,$shift\t! logical right shift packed4L" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4255 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4256 bool vector256 = true;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4257 __ vpsrlq($dst$$XMMRegister, $src$$XMMRegister, (int)$shift$$constant, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4258 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4259 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4260 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4261
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4262 // ------------------- ArithmeticRightShift -----------------------------------
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4263
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4264 // Shorts/Chars vector arithmetic right shift
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4265 instruct vsra2S(vecS dst, regF shift) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4266 predicate(n->as_Vector()->length() == 2);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4267 match(Set dst (RShiftVS dst shift));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4268 format %{ "psraw $dst,$shift\t! arithmetic right shift packed2S" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4269 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4270 __ psraw($dst$$XMMRegister, $shift$$XMMRegister);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4271 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4272 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4273 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4274
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4275 instruct vsra2S_imm(vecS dst, immI8 shift) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4276 predicate(n->as_Vector()->length() == 2);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4277 match(Set dst (RShiftVS dst shift));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4278 format %{ "psraw $dst,$shift\t! arithmetic right shift packed2S" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4279 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4280 __ psraw($dst$$XMMRegister, (int)$shift$$constant);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4281 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4282 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4283 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4284
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4285 instruct vsra2S_reg(vecS dst, vecS src, regF shift) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4286 predicate(UseAVX > 0 && n->as_Vector()->length() == 2);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4287 match(Set dst (RShiftVS src shift));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4288 format %{ "vpsraw $dst,$src,$shift\t! arithmetic right shift packed2S" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4289 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4290 bool vector256 = false;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4291 __ vpsraw($dst$$XMMRegister, $src$$XMMRegister, $shift$$XMMRegister, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4292 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4293 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4294 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4295
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4296 instruct vsra2S_reg_imm(vecS dst, vecS src, immI8 shift) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4297 predicate(UseAVX > 0 && n->as_Vector()->length() == 2);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4298 match(Set dst (RShiftVS src shift));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4299 format %{ "vpsraw $dst,$src,$shift\t! arithmetic right shift packed2S" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4300 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4301 bool vector256 = false;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4302 __ vpsraw($dst$$XMMRegister, $src$$XMMRegister, (int)$shift$$constant, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4303 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4304 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4305 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4306
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4307 instruct vsra4S(vecD dst, regF shift) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4308 predicate(n->as_Vector()->length() == 4);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4309 match(Set dst (RShiftVS dst shift));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4310 format %{ "psraw $dst,$shift\t! arithmetic right shift packed4S" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4311 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4312 __ psraw($dst$$XMMRegister, $shift$$XMMRegister);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4313 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4314 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4315 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4316
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4317 instruct vsra4S_imm(vecD dst, immI8 shift) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4318 predicate(n->as_Vector()->length() == 4);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4319 match(Set dst (RShiftVS dst shift));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4320 format %{ "psraw $dst,$shift\t! arithmetic right shift packed4S" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4321 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4322 __ psraw($dst$$XMMRegister, (int)$shift$$constant);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4323 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4324 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4325 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4326
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4327 instruct vsra4S_reg(vecD dst, vecD src, regF shift) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4328 predicate(UseAVX > 0 && n->as_Vector()->length() == 4);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4329 match(Set dst (RShiftVS src shift));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4330 format %{ "vpsraw $dst,$src,$shift\t! arithmetic right shift packed4S" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4331 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4332 bool vector256 = false;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4333 __ vpsraw($dst$$XMMRegister, $src$$XMMRegister, $shift$$XMMRegister, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4334 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4335 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4336 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4337
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4338 instruct vsra4S_reg_imm(vecD dst, vecD src, immI8 shift) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4339 predicate(UseAVX > 0 && n->as_Vector()->length() == 4);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4340 match(Set dst (RShiftVS src shift));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4341 format %{ "vpsraw $dst,$src,$shift\t! arithmetic right shift packed4S" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4342 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4343 bool vector256 = false;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4344 __ vpsraw($dst$$XMMRegister, $src$$XMMRegister, (int)$shift$$constant, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4345 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4346 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4347 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4348
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4349 instruct vsra8S(vecX dst, regF shift) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4350 predicate(n->as_Vector()->length() == 8);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4351 match(Set dst (RShiftVS dst shift));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4352 format %{ "psraw $dst,$shift\t! arithmetic right shift packed8S" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4353 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4354 __ psraw($dst$$XMMRegister, $shift$$XMMRegister);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4355 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4356 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4357 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4358
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4359 instruct vsra8S_imm(vecX dst, immI8 shift) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4360 predicate(n->as_Vector()->length() == 8);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4361 match(Set dst (RShiftVS dst shift));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4362 format %{ "psraw $dst,$shift\t! arithmetic right shift packed8S" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4363 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4364 __ psraw($dst$$XMMRegister, (int)$shift$$constant);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4365 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4366 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4367 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4368
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4369 instruct vsra8S_reg(vecX dst, vecX src, regF shift) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4370 predicate(UseAVX > 0 && n->as_Vector()->length() == 8);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4371 match(Set dst (RShiftVS src shift));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4372 format %{ "vpsraw $dst,$src,$shift\t! arithmetic right shift packed8S" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4373 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4374 bool vector256 = false;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4375 __ vpsraw($dst$$XMMRegister, $src$$XMMRegister, $shift$$XMMRegister, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4376 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4377 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4378 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4379
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4380 instruct vsra8S_reg_imm(vecX dst, vecX src, immI8 shift) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4381 predicate(UseAVX > 0 && n->as_Vector()->length() == 8);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4382 match(Set dst (RShiftVS src shift));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4383 format %{ "vpsraw $dst,$src,$shift\t! arithmetic right shift packed8S" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4384 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4385 bool vector256 = false;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4386 __ vpsraw($dst$$XMMRegister, $src$$XMMRegister, (int)$shift$$constant, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4387 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4388 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4389 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4390
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4391 instruct vsra16S_reg(vecY dst, vecY src, regF shift) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4392 predicate(UseAVX > 1 && n->as_Vector()->length() == 16);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4393 match(Set dst (RShiftVS src shift));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4394 format %{ "vpsraw $dst,$src,$shift\t! arithmetic right shift packed16S" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4395 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4396 bool vector256 = true;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4397 __ vpsraw($dst$$XMMRegister, $src$$XMMRegister, $shift$$XMMRegister, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4398 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4399 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4400 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4401
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4402 instruct vsra16S_reg_imm(vecY dst, vecY src, immI8 shift) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4403 predicate(UseAVX > 1 && n->as_Vector()->length() == 16);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4404 match(Set dst (RShiftVS src shift));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4405 format %{ "vpsraw $dst,$src,$shift\t! arithmetic right shift packed16S" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4406 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4407 bool vector256 = true;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4408 __ vpsraw($dst$$XMMRegister, $src$$XMMRegister, (int)$shift$$constant, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4409 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4410 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4411 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4412
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4413 // Integers vector arithmetic right shift
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4414 instruct vsra2I(vecD dst, regF shift) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4415 predicate(n->as_Vector()->length() == 2);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4416 match(Set dst (RShiftVI dst shift));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4417 format %{ "psrad $dst,$shift\t! arithmetic right shift packed2I" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4418 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4419 __ psrad($dst$$XMMRegister, $shift$$XMMRegister);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4420 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4421 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4422 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4423
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4424 instruct vsra2I_imm(vecD dst, immI8 shift) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4425 predicate(n->as_Vector()->length() == 2);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4426 match(Set dst (RShiftVI dst shift));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4427 format %{ "psrad $dst,$shift\t! arithmetic right shift packed2I" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4428 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4429 __ psrad($dst$$XMMRegister, (int)$shift$$constant);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4430 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4431 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4432 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4433
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4434 instruct vsra2I_reg(vecD dst, vecD src, regF shift) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4435 predicate(UseAVX > 0 && n->as_Vector()->length() == 2);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4436 match(Set dst (RShiftVI src shift));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4437 format %{ "vpsrad $dst,$src,$shift\t! arithmetic right shift packed2I" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4438 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4439 bool vector256 = false;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4440 __ vpsrad($dst$$XMMRegister, $src$$XMMRegister, $shift$$XMMRegister, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4441 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4442 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4443 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4444
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4445 instruct vsra2I_reg_imm(vecD dst, vecD src, immI8 shift) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4446 predicate(UseAVX > 0 && n->as_Vector()->length() == 2);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4447 match(Set dst (RShiftVI src shift));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4448 format %{ "vpsrad $dst,$src,$shift\t! arithmetic right shift packed2I" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4449 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4450 bool vector256 = false;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4451 __ vpsrad($dst$$XMMRegister, $src$$XMMRegister, (int)$shift$$constant, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4452 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4453 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4454 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4455
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4456 instruct vsra4I(vecX dst, regF shift) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4457 predicate(n->as_Vector()->length() == 4);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4458 match(Set dst (RShiftVI dst shift));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4459 format %{ "psrad $dst,$shift\t! arithmetic right shift packed4I" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4460 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4461 __ psrad($dst$$XMMRegister, $shift$$XMMRegister);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4462 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4463 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4464 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4465
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4466 instruct vsra4I_imm(vecX dst, immI8 shift) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4467 predicate(n->as_Vector()->length() == 4);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4468 match(Set dst (RShiftVI dst shift));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4469 format %{ "psrad $dst,$shift\t! arithmetic right shift packed4I" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4470 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4471 __ psrad($dst$$XMMRegister, (int)$shift$$constant);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4472 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4473 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4474 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4475
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4476 instruct vsra4I_reg(vecX dst, vecX src, regF shift) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4477 predicate(UseAVX > 0 && n->as_Vector()->length() == 4);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4478 match(Set dst (RShiftVI src shift));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4479 format %{ "vpsrad $dst,$src,$shift\t! arithmetic right shift packed4I" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4480 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4481 bool vector256 = false;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4482 __ vpsrad($dst$$XMMRegister, $src$$XMMRegister, $shift$$XMMRegister, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4483 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4484 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4485 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4486
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4487 instruct vsra4I_reg_imm(vecX dst, vecX src, immI8 shift) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4488 predicate(UseAVX > 0 && n->as_Vector()->length() == 4);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4489 match(Set dst (RShiftVI src shift));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4490 format %{ "vpsrad $dst,$src,$shift\t! arithmetic right shift packed4I" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4491 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4492 bool vector256 = false;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4493 __ vpsrad($dst$$XMMRegister, $src$$XMMRegister, (int)$shift$$constant, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4494 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4495 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4496 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4497
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4498 instruct vsra8I_reg(vecY dst, vecY src, regF shift) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4499 predicate(UseAVX > 1 && n->as_Vector()->length() == 8);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4500 match(Set dst (RShiftVI src shift));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4501 format %{ "vpsrad $dst,$src,$shift\t! arithmetic right shift packed8I" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4502 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4503 bool vector256 = true;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4504 __ vpsrad($dst$$XMMRegister, $src$$XMMRegister, $shift$$XMMRegister, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4505 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4506 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4507 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4508
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4509 instruct vsra8I_reg_imm(vecY dst, vecY src, immI8 shift) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4510 predicate(UseAVX > 1 && n->as_Vector()->length() == 8);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4511 match(Set dst (RShiftVI src shift));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4512 format %{ "vpsrad $dst,$src,$shift\t! arithmetic right shift packed8I" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4513 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4514 bool vector256 = true;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4515 __ vpsrad($dst$$XMMRegister, $src$$XMMRegister, (int)$shift$$constant, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4516 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4517 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4518 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4519
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4520 // There are no longs vector arithmetic right shift instructions.
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4521
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4522
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4523 // --------------------------------- AND --------------------------------------
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4524
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4525 instruct vand4B(vecS dst, vecS src) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4526 predicate(n->as_Vector()->length_in_bytes() == 4);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4527 match(Set dst (AndV dst src));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4528 format %{ "pand $dst,$src\t! and vectors (4 bytes)" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4529 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4530 __ pand($dst$$XMMRegister, $src$$XMMRegister);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4531 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4532 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4533 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4534
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4535 instruct vand4B_reg(vecS dst, vecS src1, vecS src2) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4536 predicate(UseAVX > 0 && n->as_Vector()->length_in_bytes() == 4);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4537 match(Set dst (AndV src1 src2));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4538 format %{ "vpand $dst,$src1,$src2\t! and vectors (4 bytes)" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4539 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4540 bool vector256 = false;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4541 __ vpand($dst$$XMMRegister, $src1$$XMMRegister, $src2$$XMMRegister, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4542 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4543 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4544 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4545
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4546 instruct vand8B(vecD dst, vecD src) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4547 predicate(n->as_Vector()->length_in_bytes() == 8);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4548 match(Set dst (AndV dst src));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4549 format %{ "pand $dst,$src\t! and vectors (8 bytes)" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4550 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4551 __ pand($dst$$XMMRegister, $src$$XMMRegister);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4552 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4553 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4554 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4555
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4556 instruct vand8B_reg(vecD dst, vecD src1, vecD src2) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4557 predicate(UseAVX > 0 && n->as_Vector()->length_in_bytes() == 8);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4558 match(Set dst (AndV src1 src2));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4559 format %{ "vpand $dst,$src1,$src2\t! and vectors (8 bytes)" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4560 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4561 bool vector256 = false;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4562 __ vpand($dst$$XMMRegister, $src1$$XMMRegister, $src2$$XMMRegister, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4563 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4564 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4565 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4566
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4567 instruct vand16B(vecX dst, vecX src) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4568 predicate(n->as_Vector()->length_in_bytes() == 16);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4569 match(Set dst (AndV dst src));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4570 format %{ "pand $dst,$src\t! and vectors (16 bytes)" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4571 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4572 __ pand($dst$$XMMRegister, $src$$XMMRegister);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4573 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4574 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4575 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4576
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4577 instruct vand16B_reg(vecX dst, vecX src1, vecX src2) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4578 predicate(UseAVX > 0 && n->as_Vector()->length_in_bytes() == 16);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4579 match(Set dst (AndV src1 src2));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4580 format %{ "vpand $dst,$src1,$src2\t! and vectors (16 bytes)" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4581 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4582 bool vector256 = false;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4583 __ vpand($dst$$XMMRegister, $src1$$XMMRegister, $src2$$XMMRegister, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4584 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4585 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4586 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4587
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4588 instruct vand16B_mem(vecX dst, vecX src, memory mem) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4589 predicate(UseAVX > 0 && n->as_Vector()->length_in_bytes() == 16);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4590 match(Set dst (AndV src (LoadVector mem)));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4591 format %{ "vpand $dst,$src,$mem\t! and vectors (16 bytes)" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4592 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4593 bool vector256 = false;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4594 __ vpand($dst$$XMMRegister, $src$$XMMRegister, $mem$$Address, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4595 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4596 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4597 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4598
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4599 instruct vand32B_reg(vecY dst, vecY src1, vecY src2) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4600 predicate(UseAVX > 1 && n->as_Vector()->length_in_bytes() == 32);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4601 match(Set dst (AndV src1 src2));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4602 format %{ "vpand $dst,$src1,$src2\t! and vectors (32 bytes)" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4603 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4604 bool vector256 = true;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4605 __ vpand($dst$$XMMRegister, $src1$$XMMRegister, $src2$$XMMRegister, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4606 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4607 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4608 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4609
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4610 instruct vand32B_mem(vecY dst, vecY src, memory mem) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4611 predicate(UseAVX > 1 && n->as_Vector()->length_in_bytes() == 32);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4612 match(Set dst (AndV src (LoadVector mem)));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4613 format %{ "vpand $dst,$src,$mem\t! and vectors (32 bytes)" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4614 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4615 bool vector256 = true;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4616 __ vpand($dst$$XMMRegister, $src$$XMMRegister, $mem$$Address, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4617 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4618 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4619 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4620
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4621 // --------------------------------- OR ---------------------------------------
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4622
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4623 instruct vor4B(vecS dst, vecS src) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4624 predicate(n->as_Vector()->length_in_bytes() == 4);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4625 match(Set dst (OrV dst src));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4626 format %{ "por $dst,$src\t! or vectors (4 bytes)" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4627 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4628 __ por($dst$$XMMRegister, $src$$XMMRegister);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4629 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4630 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4631 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4632
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4633 instruct vor4B_reg(vecS dst, vecS src1, vecS src2) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4634 predicate(UseAVX > 0 && n->as_Vector()->length_in_bytes() == 4);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4635 match(Set dst (OrV src1 src2));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4636 format %{ "vpor $dst,$src1,$src2\t! or vectors (4 bytes)" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4637 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4638 bool vector256 = false;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4639 __ vpor($dst$$XMMRegister, $src1$$XMMRegister, $src2$$XMMRegister, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4640 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4641 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4642 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4643
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4644 instruct vor8B(vecD dst, vecD src) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4645 predicate(n->as_Vector()->length_in_bytes() == 8);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4646 match(Set dst (OrV dst src));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4647 format %{ "por $dst,$src\t! or vectors (8 bytes)" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4648 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4649 __ por($dst$$XMMRegister, $src$$XMMRegister);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4650 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4651 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4652 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4653
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4654 instruct vor8B_reg(vecD dst, vecD src1, vecD src2) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4655 predicate(UseAVX > 0 && n->as_Vector()->length_in_bytes() == 8);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4656 match(Set dst (OrV src1 src2));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4657 format %{ "vpor $dst,$src1,$src2\t! or vectors (8 bytes)" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4658 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4659 bool vector256 = false;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4660 __ vpor($dst$$XMMRegister, $src1$$XMMRegister, $src2$$XMMRegister, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4661 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4662 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4663 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4664
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4665 instruct vor16B(vecX dst, vecX src) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4666 predicate(n->as_Vector()->length_in_bytes() == 16);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4667 match(Set dst (OrV dst src));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4668 format %{ "por $dst,$src\t! or vectors (16 bytes)" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4669 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4670 __ por($dst$$XMMRegister, $src$$XMMRegister);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4671 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4672 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4673 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4674
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4675 instruct vor16B_reg(vecX dst, vecX src1, vecX src2) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4676 predicate(UseAVX > 0 && n->as_Vector()->length_in_bytes() == 16);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4677 match(Set dst (OrV src1 src2));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4678 format %{ "vpor $dst,$src1,$src2\t! or vectors (16 bytes)" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4679 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4680 bool vector256 = false;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4681 __ vpor($dst$$XMMRegister, $src1$$XMMRegister, $src2$$XMMRegister, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4682 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4683 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4684 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4685
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4686 instruct vor16B_mem(vecX dst, vecX src, memory mem) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4687 predicate(UseAVX > 0 && n->as_Vector()->length_in_bytes() == 16);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4688 match(Set dst (OrV src (LoadVector mem)));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4689 format %{ "vpor $dst,$src,$mem\t! or vectors (16 bytes)" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4690 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4691 bool vector256 = false;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4692 __ vpor($dst$$XMMRegister, $src$$XMMRegister, $mem$$Address, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4693 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4694 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4695 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4696
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4697 instruct vor32B_reg(vecY dst, vecY src1, vecY src2) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4698 predicate(UseAVX > 1 && n->as_Vector()->length_in_bytes() == 32);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4699 match(Set dst (OrV src1 src2));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4700 format %{ "vpor $dst,$src1,$src2\t! or vectors (32 bytes)" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4701 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4702 bool vector256 = true;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4703 __ vpor($dst$$XMMRegister, $src1$$XMMRegister, $src2$$XMMRegister, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4704 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4705 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4706 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4707
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4708 instruct vor32B_mem(vecY dst, vecY src, memory mem) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4709 predicate(UseAVX > 1 && n->as_Vector()->length_in_bytes() == 32);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4710 match(Set dst (OrV src (LoadVector mem)));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4711 format %{ "vpor $dst,$src,$mem\t! or vectors (32 bytes)" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4712 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4713 bool vector256 = true;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4714 __ vpor($dst$$XMMRegister, $src$$XMMRegister, $mem$$Address, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4715 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4716 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4717 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4718
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4719 // --------------------------------- XOR --------------------------------------
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4720
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4721 instruct vxor4B(vecS dst, vecS src) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4722 predicate(n->as_Vector()->length_in_bytes() == 4);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4723 match(Set dst (XorV dst src));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4724 format %{ "pxor $dst,$src\t! xor vectors (4 bytes)" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4725 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4726 __ pxor($dst$$XMMRegister, $src$$XMMRegister);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4727 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4728 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4729 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4730
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4731 instruct vxor4B_reg(vecS dst, vecS src1, vecS src2) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4732 predicate(UseAVX > 0 && n->as_Vector()->length_in_bytes() == 4);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4733 match(Set dst (XorV src1 src2));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4734 format %{ "vpxor $dst,$src1,$src2\t! xor vectors (4 bytes)" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4735 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4736 bool vector256 = false;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4737 __ vpxor($dst$$XMMRegister, $src1$$XMMRegister, $src2$$XMMRegister, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4738 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4739 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4740 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4741
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4742 instruct vxor8B(vecD dst, vecD src) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4743 predicate(n->as_Vector()->length_in_bytes() == 8);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4744 match(Set dst (XorV dst src));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4745 format %{ "pxor $dst,$src\t! xor vectors (8 bytes)" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4746 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4747 __ pxor($dst$$XMMRegister, $src$$XMMRegister);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4748 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4749 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4750 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4751
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4752 instruct vxor8B_reg(vecD dst, vecD src1, vecD src2) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4753 predicate(UseAVX > 0 && n->as_Vector()->length_in_bytes() == 8);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4754 match(Set dst (XorV src1 src2));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4755 format %{ "vpxor $dst,$src1,$src2\t! xor vectors (8 bytes)" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4756 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4757 bool vector256 = false;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4758 __ vpxor($dst$$XMMRegister, $src1$$XMMRegister, $src2$$XMMRegister, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4759 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4760 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4761 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4762
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4763 instruct vxor16B(vecX dst, vecX src) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4764 predicate(n->as_Vector()->length_in_bytes() == 16);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4765 match(Set dst (XorV dst src));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4766 format %{ "pxor $dst,$src\t! xor vectors (16 bytes)" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4767 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4768 __ pxor($dst$$XMMRegister, $src$$XMMRegister);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4769 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4770 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4771 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4772
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4773 instruct vxor16B_reg(vecX dst, vecX src1, vecX src2) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4774 predicate(UseAVX > 0 && n->as_Vector()->length_in_bytes() == 16);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4775 match(Set dst (XorV src1 src2));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4776 format %{ "vpxor $dst,$src1,$src2\t! xor vectors (16 bytes)" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4777 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4778 bool vector256 = false;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4779 __ vpxor($dst$$XMMRegister, $src1$$XMMRegister, $src2$$XMMRegister, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4780 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4781 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4782 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4783
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4784 instruct vxor16B_mem(vecX dst, vecX src, memory mem) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4785 predicate(UseAVX > 0 && n->as_Vector()->length_in_bytes() == 16);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4786 match(Set dst (XorV src (LoadVector mem)));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4787 format %{ "vpxor $dst,$src,$mem\t! xor vectors (16 bytes)" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4788 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4789 bool vector256 = false;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4790 __ vpxor($dst$$XMMRegister, $src$$XMMRegister, $mem$$Address, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4791 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4792 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4793 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4794
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4795 instruct vxor32B_reg(vecY dst, vecY src1, vecY src2) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4796 predicate(UseAVX > 1 && n->as_Vector()->length_in_bytes() == 32);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4797 match(Set dst (XorV src1 src2));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4798 format %{ "vpxor $dst,$src1,$src2\t! xor vectors (32 bytes)" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4799 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4800 bool vector256 = true;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4801 __ vpxor($dst$$XMMRegister, $src1$$XMMRegister, $src2$$XMMRegister, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4802 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4803 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4804 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4805
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4806 instruct vxor32B_mem(vecY dst, vecY src, memory mem) %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4807 predicate(UseAVX > 1 && n->as_Vector()->length_in_bytes() == 32);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4808 match(Set dst (XorV src (LoadVector mem)));
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4809 format %{ "vpxor $dst,$src,$mem\t! xor vectors (32 bytes)" %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4810 ins_encode %{
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4811 bool vector256 = true;
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4812 __ vpxor($dst$$XMMRegister, $src$$XMMRegister, $mem$$Address, vector256);
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4813 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4814 ins_pipe( pipe_slow );
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4815 %}
006050192a5a 6340864: Implement vectorization optimizations in hotspot-server kvn parents: 6225 diff changeset	4816

Mercurial > hg > graal-compiler

annotate src/cpu/x86/vm/x86.ad @ 6795:7eca5de9e0b6