Mercurial > hg > graal-compiler
annotate src/share/vm/c1/c1_LIR.hpp @ 1816:87b64980e2f1
6972540: sun/nio/ch/SocketChannelImpl compilation crashed when executing CompileTheWorld
Reviewed-by: kvn
| author | never |
|---|---|
| date | Wed, 22 Sep 2010 21:10:46 -0700 |
| parents | 3a294e483abc |
| children | f95d63e2154a |
| rev | line source |
|---|---|
| 0 | 1 /* |
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2 * Copyright (c) 2000, 2010, Oracle and/or its affiliates. All rights reserved. |
| 0 | 3 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. |
| 4 * | |
| 5 * This code is free software; you can redistribute it and/or modify it | |
| 6 * under the terms of the GNU General Public License version 2 only, as | |
| 7 * published by the Free Software Foundation. | |
| 8 * | |
| 9 * This code is distributed in the hope that it will be useful, but WITHOUT | |
| 10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or | |
| 11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License | |
| 12 * version 2 for more details (a copy is included in the LICENSE file that | |
| 13 * accompanied this code). | |
| 14 * | |
| 15 * You should have received a copy of the GNU General Public License version | |
| 16 * 2 along with this work; if not, write to the Free Software Foundation, | |
| 17 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA. | |
| 18 * | |
|
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19 * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA |
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20 * or visit www.oracle.com if you need additional information or have any |
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21 * questions. |
| 0 | 22 * |
| 23 */ | |
| 24 | |
| 25 class BlockBegin; | |
| 26 class BlockList; | |
| 27 class LIR_Assembler; | |
| 28 class CodeEmitInfo; | |
| 29 class CodeStub; | |
| 30 class CodeStubList; | |
| 31 class ArrayCopyStub; | |
| 32 class LIR_Op; | |
| 33 class ciType; | |
| 34 class ValueType; | |
| 35 class LIR_OpVisitState; | |
| 36 class FpuStackSim; | |
| 37 | |
| 38 //--------------------------------------------------------------------- | |
| 39 // LIR Operands | |
| 40 // LIR_OprDesc | |
| 41 // LIR_OprPtr | |
| 42 // LIR_Const | |
| 43 // LIR_Address | |
| 44 //--------------------------------------------------------------------- | |
| 45 class LIR_OprDesc; | |
| 46 class LIR_OprPtr; | |
| 47 class LIR_Const; | |
| 48 class LIR_Address; | |
| 49 class LIR_OprVisitor; | |
| 50 | |
| 51 | |
| 52 typedef LIR_OprDesc* LIR_Opr; | |
| 53 typedef int RegNr; | |
| 54 | |
| 55 define_array(LIR_OprArray, LIR_Opr) | |
| 56 define_stack(LIR_OprList, LIR_OprArray) | |
| 57 | |
| 58 define_array(LIR_OprRefArray, LIR_Opr*) | |
| 59 define_stack(LIR_OprRefList, LIR_OprRefArray) | |
| 60 | |
| 61 define_array(CodeEmitInfoArray, CodeEmitInfo*) | |
| 62 define_stack(CodeEmitInfoList, CodeEmitInfoArray) | |
| 63 | |
| 64 define_array(LIR_OpArray, LIR_Op*) | |
| 65 define_stack(LIR_OpList, LIR_OpArray) | |
| 66 | |
| 67 // define LIR_OprPtr early so LIR_OprDesc can refer to it | |
| 68 class LIR_OprPtr: public CompilationResourceObj { | |
| 69 public: | |
| 70 bool is_oop_pointer() const { return (type() == T_OBJECT); } | |
| 71 bool is_float_kind() const { BasicType t = type(); return (t == T_FLOAT) || (t == T_DOUBLE); } | |
| 72 | |
| 73 virtual LIR_Const* as_constant() { return NULL; } | |
| 74 virtual LIR_Address* as_address() { return NULL; } | |
| 75 virtual BasicType type() const = 0; | |
| 76 virtual void print_value_on(outputStream* out) const = 0; | |
| 77 }; | |
| 78 | |
| 79 | |
| 80 | |
| 81 // LIR constants | |
| 82 class LIR_Const: public LIR_OprPtr { | |
| 83 private: | |
| 84 JavaValue _value; | |
| 85 | |
| 86 void type_check(BasicType t) const { assert(type() == t, "type check"); } | |
| 87 void type_check(BasicType t1, BasicType t2) const { assert(type() == t1 || type() == t2, "type check"); } | |
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88 void type_check(BasicType t1, BasicType t2, BasicType t3) const { assert(type() == t1 || type() == t2 || type() == t3, "type check"); } |
| 0 | 89 |
| 90 public: | |
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91 LIR_Const(jint i, bool is_address=false) { _value.set_type(is_address?T_ADDRESS:T_INT); _value.set_jint(i); } |
| 0 | 92 LIR_Const(jlong l) { _value.set_type(T_LONG); _value.set_jlong(l); } |
| 93 LIR_Const(jfloat f) { _value.set_type(T_FLOAT); _value.set_jfloat(f); } | |
| 94 LIR_Const(jdouble d) { _value.set_type(T_DOUBLE); _value.set_jdouble(d); } | |
| 95 LIR_Const(jobject o) { _value.set_type(T_OBJECT); _value.set_jobject(o); } | |
| 96 LIR_Const(void* p) { | |
| 97 #ifdef _LP64 | |
| 98 assert(sizeof(jlong) >= sizeof(p), "too small");; | |
| 99 _value.set_type(T_LONG); _value.set_jlong((jlong)p); | |
| 100 #else | |
| 101 assert(sizeof(jint) >= sizeof(p), "too small");; | |
| 102 _value.set_type(T_INT); _value.set_jint((jint)p); | |
| 103 #endif | |
| 104 } | |
| 105 | |
| 106 virtual BasicType type() const { return _value.get_type(); } | |
| 107 virtual LIR_Const* as_constant() { return this; } | |
| 108 | |
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109 jint as_jint() const { type_check(T_INT, T_ADDRESS); return _value.get_jint(); } |
| 0 | 110 jlong as_jlong() const { type_check(T_LONG ); return _value.get_jlong(); } |
| 111 jfloat as_jfloat() const { type_check(T_FLOAT ); return _value.get_jfloat(); } | |
| 112 jdouble as_jdouble() const { type_check(T_DOUBLE); return _value.get_jdouble(); } | |
| 113 jobject as_jobject() const { type_check(T_OBJECT); return _value.get_jobject(); } | |
| 114 jint as_jint_lo() const { type_check(T_LONG ); return low(_value.get_jlong()); } | |
| 115 jint as_jint_hi() const { type_check(T_LONG ); return high(_value.get_jlong()); } | |
| 116 | |
| 117 #ifdef _LP64 | |
| 118 address as_pointer() const { type_check(T_LONG ); return (address)_value.get_jlong(); } | |
| 119 #else | |
| 120 address as_pointer() const { type_check(T_INT ); return (address)_value.get_jint(); } | |
| 121 #endif | |
| 122 | |
| 123 | |
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124 jint as_jint_bits() const { type_check(T_FLOAT, T_INT, T_ADDRESS); return _value.get_jint(); } |
| 0 | 125 jint as_jint_lo_bits() const { |
| 126 if (type() == T_DOUBLE) { | |
| 127 return low(jlong_cast(_value.get_jdouble())); | |
| 128 } else { | |
| 129 return as_jint_lo(); | |
| 130 } | |
| 131 } | |
| 132 jint as_jint_hi_bits() const { | |
| 133 if (type() == T_DOUBLE) { | |
| 134 return high(jlong_cast(_value.get_jdouble())); | |
| 135 } else { | |
| 136 return as_jint_hi(); | |
| 137 } | |
| 138 } | |
| 304 | 139 jlong as_jlong_bits() const { |
| 140 if (type() == T_DOUBLE) { | |
| 141 return jlong_cast(_value.get_jdouble()); | |
| 142 } else { | |
| 143 return as_jlong(); | |
| 144 } | |
| 145 } | |
| 0 | 146 |
| 147 virtual void print_value_on(outputStream* out) const PRODUCT_RETURN; | |
| 148 | |
| 149 | |
| 150 bool is_zero_float() { | |
| 151 jfloat f = as_jfloat(); | |
| 152 jfloat ok = 0.0f; | |
| 153 return jint_cast(f) == jint_cast(ok); | |
| 154 } | |
| 155 | |
| 156 bool is_one_float() { | |
| 157 jfloat f = as_jfloat(); | |
| 158 return !g_isnan(f) && g_isfinite(f) && f == 1.0; | |
| 159 } | |
| 160 | |
| 161 bool is_zero_double() { | |
| 162 jdouble d = as_jdouble(); | |
| 163 jdouble ok = 0.0; | |
| 164 return jlong_cast(d) == jlong_cast(ok); | |
| 165 } | |
| 166 | |
| 167 bool is_one_double() { | |
| 168 jdouble d = as_jdouble(); | |
| 169 return !g_isnan(d) && g_isfinite(d) && d == 1.0; | |
| 170 } | |
| 171 }; | |
| 172 | |
| 173 | |
| 174 //---------------------LIR Operand descriptor------------------------------------ | |
| 175 // | |
| 176 // The class LIR_OprDesc represents a LIR instruction operand; | |
| 177 // it can be a register (ALU/FPU), stack location or a constant; | |
| 178 // Constants and addresses are represented as resource area allocated | |
| 179 // structures (see above). | |
| 180 // Registers and stack locations are inlined into the this pointer | |
| 181 // (see value function). | |
| 182 | |
| 183 class LIR_OprDesc: public CompilationResourceObj { | |
| 184 public: | |
| 185 // value structure: | |
| 186 // data opr-type opr-kind | |
| 187 // +--------------+-------+-------+ | |
| 188 // [max...........|7 6 5 4|3 2 1 0] | |
| 189 // ^ | |
| 190 // is_pointer bit | |
| 191 // | |
| 192 // lowest bit cleared, means it is a structure pointer | |
| 193 // we need 4 bits to represent types | |
| 194 | |
| 195 private: | |
| 196 friend class LIR_OprFact; | |
| 197 | |
| 198 // Conversion | |
| 199 intptr_t value() const { return (intptr_t) this; } | |
| 200 | |
| 201 bool check_value_mask(intptr_t mask, intptr_t masked_value) const { | |
| 202 return (value() & mask) == masked_value; | |
| 203 } | |
| 204 | |
| 205 enum OprKind { | |
| 206 pointer_value = 0 | |
| 207 , stack_value = 1 | |
| 208 , cpu_register = 3 | |
| 209 , fpu_register = 5 | |
| 210 , illegal_value = 7 | |
| 211 }; | |
| 212 | |
| 213 enum OprBits { | |
| 214 pointer_bits = 1 | |
| 215 , kind_bits = 3 | |
| 216 , type_bits = 4 | |
| 217 , size_bits = 2 | |
| 218 , destroys_bits = 1 | |
| 219 , virtual_bits = 1 | |
| 220 , is_xmm_bits = 1 | |
| 221 , last_use_bits = 1 | |
| 222 , is_fpu_stack_offset_bits = 1 // used in assertion checking on x86 for FPU stack slot allocation | |
| 223 , non_data_bits = kind_bits + type_bits + size_bits + destroys_bits + last_use_bits + | |
| 224 is_fpu_stack_offset_bits + virtual_bits + is_xmm_bits | |
| 225 , data_bits = BitsPerInt - non_data_bits | |
| 226 , reg_bits = data_bits / 2 // for two registers in one value encoding | |
| 227 }; | |
| 228 | |
| 229 enum OprShift { | |
| 230 kind_shift = 0 | |
| 231 , type_shift = kind_shift + kind_bits | |
| 232 , size_shift = type_shift + type_bits | |
| 233 , destroys_shift = size_shift + size_bits | |
| 234 , last_use_shift = destroys_shift + destroys_bits | |
| 235 , is_fpu_stack_offset_shift = last_use_shift + last_use_bits | |
| 236 , virtual_shift = is_fpu_stack_offset_shift + is_fpu_stack_offset_bits | |
| 237 , is_xmm_shift = virtual_shift + virtual_bits | |
| 238 , data_shift = is_xmm_shift + is_xmm_bits | |
| 239 , reg1_shift = data_shift | |
| 240 , reg2_shift = data_shift + reg_bits | |
| 241 | |
| 242 }; | |
| 243 | |
| 244 enum OprSize { | |
| 245 single_size = 0 << size_shift | |
| 246 , double_size = 1 << size_shift | |
| 247 }; | |
| 248 | |
| 249 enum OprMask { | |
| 250 kind_mask = right_n_bits(kind_bits) | |
| 251 , type_mask = right_n_bits(type_bits) << type_shift | |
| 252 , size_mask = right_n_bits(size_bits) << size_shift | |
| 253 , last_use_mask = right_n_bits(last_use_bits) << last_use_shift | |
| 254 , is_fpu_stack_offset_mask = right_n_bits(is_fpu_stack_offset_bits) << is_fpu_stack_offset_shift | |
| 255 , virtual_mask = right_n_bits(virtual_bits) << virtual_shift | |
| 256 , is_xmm_mask = right_n_bits(is_xmm_bits) << is_xmm_shift | |
| 257 , pointer_mask = right_n_bits(pointer_bits) | |
| 258 , lower_reg_mask = right_n_bits(reg_bits) | |
| 259 , no_type_mask = (int)(~(type_mask | last_use_mask | is_fpu_stack_offset_mask)) | |
| 260 }; | |
| 261 | |
| 262 uintptr_t data() const { return value() >> data_shift; } | |
| 263 int lo_reg_half() const { return data() & lower_reg_mask; } | |
| 264 int hi_reg_half() const { return (data() >> reg_bits) & lower_reg_mask; } | |
| 265 OprKind kind_field() const { return (OprKind)(value() & kind_mask); } | |
| 266 OprSize size_field() const { return (OprSize)(value() & size_mask); } | |
| 267 | |
| 268 static char type_char(BasicType t); | |
| 269 | |
| 270 public: | |
| 271 enum { | |
| 272 vreg_base = ConcreteRegisterImpl::number_of_registers, | |
| 273 vreg_max = (1 << data_bits) - 1 | |
| 274 }; | |
| 275 | |
| 276 static inline LIR_Opr illegalOpr(); | |
| 277 | |
| 278 enum OprType { | |
| 279 unknown_type = 0 << type_shift // means: not set (catch uninitialized types) | |
| 280 , int_type = 1 << type_shift | |
| 281 , long_type = 2 << type_shift | |
| 282 , object_type = 3 << type_shift | |
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283 , address_type = 4 << type_shift |
| 0 | 284 , float_type = 5 << type_shift |
| 285 , double_type = 6 << type_shift | |
| 286 }; | |
| 287 friend OprType as_OprType(BasicType t); | |
| 288 friend BasicType as_BasicType(OprType t); | |
| 289 | |
| 290 OprType type_field_valid() const { assert(is_register() || is_stack(), "should not be called otherwise"); return (OprType)(value() & type_mask); } | |
| 291 OprType type_field() const { return is_illegal() ? unknown_type : (OprType)(value() & type_mask); } | |
| 292 | |
| 293 static OprSize size_for(BasicType t) { | |
| 294 switch (t) { | |
| 295 case T_LONG: | |
| 296 case T_DOUBLE: | |
| 297 return double_size; | |
| 298 break; | |
| 299 | |
| 300 case T_FLOAT: | |
| 301 case T_BOOLEAN: | |
| 302 case T_CHAR: | |
| 303 case T_BYTE: | |
| 304 case T_SHORT: | |
| 305 case T_INT: | |
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306 case T_ADDRESS: |
| 0 | 307 case T_OBJECT: |
| 308 case T_ARRAY: | |
| 309 return single_size; | |
| 310 break; | |
| 311 | |
| 312 default: | |
| 313 ShouldNotReachHere(); | |
| 304 | 314 return single_size; |
| 0 | 315 } |
| 316 } | |
| 317 | |
| 318 | |
| 319 void validate_type() const PRODUCT_RETURN; | |
| 320 | |
| 321 BasicType type() const { | |
| 322 if (is_pointer()) { | |
| 323 return pointer()->type(); | |
| 324 } | |
| 325 return as_BasicType(type_field()); | |
| 326 } | |
| 327 | |
| 328 | |
| 329 ValueType* value_type() const { return as_ValueType(type()); } | |
| 330 | |
| 331 char type_char() const { return type_char((is_pointer()) ? pointer()->type() : type()); } | |
| 332 | |
| 333 bool is_equal(LIR_Opr opr) const { return this == opr; } | |
| 334 // checks whether types are same | |
| 335 bool is_same_type(LIR_Opr opr) const { | |
| 336 assert(type_field() != unknown_type && | |
| 337 opr->type_field() != unknown_type, "shouldn't see unknown_type"); | |
| 338 return type_field() == opr->type_field(); | |
| 339 } | |
| 340 bool is_same_register(LIR_Opr opr) { | |
| 341 return (is_register() && opr->is_register() && | |
| 342 kind_field() == opr->kind_field() && | |
| 343 (value() & no_type_mask) == (opr->value() & no_type_mask)); | |
| 344 } | |
| 345 | |
| 346 bool is_pointer() const { return check_value_mask(pointer_mask, pointer_value); } | |
| 347 bool is_illegal() const { return kind_field() == illegal_value; } | |
| 348 bool is_valid() const { return kind_field() != illegal_value; } | |
| 349 | |
| 350 bool is_register() const { return is_cpu_register() || is_fpu_register(); } | |
| 351 bool is_virtual() const { return is_virtual_cpu() || is_virtual_fpu(); } | |
| 352 | |
| 353 bool is_constant() const { return is_pointer() && pointer()->as_constant() != NULL; } | |
| 354 bool is_address() const { return is_pointer() && pointer()->as_address() != NULL; } | |
| 355 | |
| 356 bool is_float_kind() const { return is_pointer() ? pointer()->is_float_kind() : (kind_field() == fpu_register); } | |
| 357 bool is_oop() const; | |
| 358 | |
| 359 // semantic for fpu- and xmm-registers: | |
| 360 // * is_float and is_double return true for xmm_registers | |
| 361 // (so is_single_fpu and is_single_xmm are true) | |
| 362 // * So you must always check for is_???_xmm prior to is_???_fpu to | |
| 363 // distinguish between fpu- and xmm-registers | |
| 364 | |
| 365 bool is_stack() const { validate_type(); return check_value_mask(kind_mask, stack_value); } | |
| 366 bool is_single_stack() const { validate_type(); return check_value_mask(kind_mask | size_mask, stack_value | single_size); } | |
| 367 bool is_double_stack() const { validate_type(); return check_value_mask(kind_mask | size_mask, stack_value | double_size); } | |
| 368 | |
| 369 bool is_cpu_register() const { validate_type(); return check_value_mask(kind_mask, cpu_register); } | |
| 370 bool is_virtual_cpu() const { validate_type(); return check_value_mask(kind_mask | virtual_mask, cpu_register | virtual_mask); } | |
| 371 bool is_fixed_cpu() const { validate_type(); return check_value_mask(kind_mask | virtual_mask, cpu_register); } | |
| 372 bool is_single_cpu() const { validate_type(); return check_value_mask(kind_mask | size_mask, cpu_register | single_size); } | |
| 373 bool is_double_cpu() const { validate_type(); return check_value_mask(kind_mask | size_mask, cpu_register | double_size); } | |
| 374 | |
| 375 bool is_fpu_register() const { validate_type(); return check_value_mask(kind_mask, fpu_register); } | |
| 376 bool is_virtual_fpu() const { validate_type(); return check_value_mask(kind_mask | virtual_mask, fpu_register | virtual_mask); } | |
| 377 bool is_fixed_fpu() const { validate_type(); return check_value_mask(kind_mask | virtual_mask, fpu_register); } | |
| 378 bool is_single_fpu() const { validate_type(); return check_value_mask(kind_mask | size_mask, fpu_register | single_size); } | |
| 379 bool is_double_fpu() const { validate_type(); return check_value_mask(kind_mask | size_mask, fpu_register | double_size); } | |
| 380 | |
| 381 bool is_xmm_register() const { validate_type(); return check_value_mask(kind_mask | is_xmm_mask, fpu_register | is_xmm_mask); } | |
| 382 bool is_single_xmm() const { validate_type(); return check_value_mask(kind_mask | size_mask | is_xmm_mask, fpu_register | single_size | is_xmm_mask); } | |
| 383 bool is_double_xmm() const { validate_type(); return check_value_mask(kind_mask | size_mask | is_xmm_mask, fpu_register | double_size | is_xmm_mask); } | |
| 384 | |
| 385 // fast accessor functions for special bits that do not work for pointers | |
| 386 // (in this functions, the check for is_pointer() is omitted) | |
| 387 bool is_single_word() const { assert(is_register() || is_stack(), "type check"); return check_value_mask(size_mask, single_size); } | |
| 388 bool is_double_word() const { assert(is_register() || is_stack(), "type check"); return check_value_mask(size_mask, double_size); } | |
| 389 bool is_virtual_register() const { assert(is_register(), "type check"); return check_value_mask(virtual_mask, virtual_mask); } | |
| 390 bool is_oop_register() const { assert(is_register() || is_stack(), "type check"); return type_field_valid() == object_type; } | |
| 391 BasicType type_register() const { assert(is_register() || is_stack(), "type check"); return as_BasicType(type_field_valid()); } | |
| 392 | |
| 393 bool is_last_use() const { assert(is_register(), "only works for registers"); return (value() & last_use_mask) != 0; } | |
| 394 bool is_fpu_stack_offset() const { assert(is_register(), "only works for registers"); return (value() & is_fpu_stack_offset_mask) != 0; } | |
| 395 LIR_Opr make_last_use() { assert(is_register(), "only works for registers"); return (LIR_Opr)(value() | last_use_mask); } | |
| 396 LIR_Opr make_fpu_stack_offset() { assert(is_register(), "only works for registers"); return (LIR_Opr)(value() | is_fpu_stack_offset_mask); } | |
| 397 | |
| 398 | |
| 399 int single_stack_ix() const { assert(is_single_stack() && !is_virtual(), "type check"); return (int)data(); } | |
| 400 int double_stack_ix() const { assert(is_double_stack() && !is_virtual(), "type check"); return (int)data(); } | |
| 401 RegNr cpu_regnr() const { assert(is_single_cpu() && !is_virtual(), "type check"); return (RegNr)data(); } | |
| 402 RegNr cpu_regnrLo() const { assert(is_double_cpu() && !is_virtual(), "type check"); return (RegNr)lo_reg_half(); } | |
| 403 RegNr cpu_regnrHi() const { assert(is_double_cpu() && !is_virtual(), "type check"); return (RegNr)hi_reg_half(); } | |
| 404 RegNr fpu_regnr() const { assert(is_single_fpu() && !is_virtual(), "type check"); return (RegNr)data(); } | |
| 405 RegNr fpu_regnrLo() const { assert(is_double_fpu() && !is_virtual(), "type check"); return (RegNr)lo_reg_half(); } | |
| 406 RegNr fpu_regnrHi() const { assert(is_double_fpu() && !is_virtual(), "type check"); return (RegNr)hi_reg_half(); } | |
| 407 RegNr xmm_regnr() const { assert(is_single_xmm() && !is_virtual(), "type check"); return (RegNr)data(); } | |
| 408 RegNr xmm_regnrLo() const { assert(is_double_xmm() && !is_virtual(), "type check"); return (RegNr)lo_reg_half(); } | |
| 409 RegNr xmm_regnrHi() const { assert(is_double_xmm() && !is_virtual(), "type check"); return (RegNr)hi_reg_half(); } | |
| 410 int vreg_number() const { assert(is_virtual(), "type check"); return (RegNr)data(); } | |
| 411 | |
| 412 LIR_OprPtr* pointer() const { assert(is_pointer(), "type check"); return (LIR_OprPtr*)this; } | |
| 413 LIR_Const* as_constant_ptr() const { return pointer()->as_constant(); } | |
| 414 LIR_Address* as_address_ptr() const { return pointer()->as_address(); } | |
| 415 | |
| 416 Register as_register() const; | |
| 417 Register as_register_lo() const; | |
| 418 Register as_register_hi() const; | |
| 419 | |
| 420 Register as_pointer_register() { | |
| 421 #ifdef _LP64 | |
| 422 if (is_double_cpu()) { | |
| 423 assert(as_register_lo() == as_register_hi(), "should be a single register"); | |
| 424 return as_register_lo(); | |
| 425 } | |
| 426 #endif | |
| 427 return as_register(); | |
| 428 } | |
| 429 | |
| 304 | 430 #ifdef X86 |
| 0 | 431 XMMRegister as_xmm_float_reg() const; |
| 432 XMMRegister as_xmm_double_reg() const; | |
| 433 // for compatibility with RInfo | |
| 434 int fpu () const { return lo_reg_half(); } | |
| 304 | 435 #endif // X86 |
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436 #if defined(SPARC) || defined(ARM) || defined(PPC) |
| 0 | 437 FloatRegister as_float_reg () const; |
| 438 FloatRegister as_double_reg () const; | |
| 439 #endif | |
| 440 | |
| 441 jint as_jint() const { return as_constant_ptr()->as_jint(); } | |
| 442 jlong as_jlong() const { return as_constant_ptr()->as_jlong(); } | |
| 443 jfloat as_jfloat() const { return as_constant_ptr()->as_jfloat(); } | |
| 444 jdouble as_jdouble() const { return as_constant_ptr()->as_jdouble(); } | |
| 445 jobject as_jobject() const { return as_constant_ptr()->as_jobject(); } | |
| 446 | |
| 447 void print() const PRODUCT_RETURN; | |
| 448 void print(outputStream* out) const PRODUCT_RETURN; | |
| 449 }; | |
| 450 | |
| 451 | |
| 452 inline LIR_OprDesc::OprType as_OprType(BasicType type) { | |
| 453 switch (type) { | |
| 454 case T_INT: return LIR_OprDesc::int_type; | |
| 455 case T_LONG: return LIR_OprDesc::long_type; | |
| 456 case T_FLOAT: return LIR_OprDesc::float_type; | |
| 457 case T_DOUBLE: return LIR_OprDesc::double_type; | |
| 458 case T_OBJECT: | |
| 459 case T_ARRAY: return LIR_OprDesc::object_type; | |
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460 case T_ADDRESS: return LIR_OprDesc::address_type; |
| 0 | 461 case T_ILLEGAL: // fall through |
| 462 default: ShouldNotReachHere(); return LIR_OprDesc::unknown_type; | |
| 463 } | |
| 464 } | |
| 465 | |
| 466 inline BasicType as_BasicType(LIR_OprDesc::OprType t) { | |
| 467 switch (t) { | |
| 468 case LIR_OprDesc::int_type: return T_INT; | |
| 469 case LIR_OprDesc::long_type: return T_LONG; | |
| 470 case LIR_OprDesc::float_type: return T_FLOAT; | |
| 471 case LIR_OprDesc::double_type: return T_DOUBLE; | |
| 472 case LIR_OprDesc::object_type: return T_OBJECT; | |
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473 case LIR_OprDesc::address_type: return T_ADDRESS; |
| 0 | 474 case LIR_OprDesc::unknown_type: // fall through |
| 475 default: ShouldNotReachHere(); return T_ILLEGAL; | |
| 476 } | |
| 477 } | |
| 478 | |
| 479 | |
| 480 // LIR_Address | |
| 481 class LIR_Address: public LIR_OprPtr { | |
| 482 friend class LIR_OpVisitState; | |
| 483 | |
| 484 public: | |
| 485 // NOTE: currently these must be the log2 of the scale factor (and | |
| 486 // must also be equivalent to the ScaleFactor enum in | |
| 487 // assembler_i486.hpp) | |
| 488 enum Scale { | |
| 489 times_1 = 0, | |
| 490 times_2 = 1, | |
| 491 times_4 = 2, | |
| 492 times_8 = 3 | |
| 493 }; | |
| 494 | |
| 495 private: | |
| 496 LIR_Opr _base; | |
| 497 LIR_Opr _index; | |
| 498 Scale _scale; | |
| 499 intx _disp; | |
| 500 BasicType _type; | |
| 501 | |
| 502 public: | |
| 503 LIR_Address(LIR_Opr base, LIR_Opr index, BasicType type): | |
| 504 _base(base) | |
| 505 , _index(index) | |
| 506 , _scale(times_1) | |
| 507 , _type(type) | |
| 508 , _disp(0) { verify(); } | |
| 509 | |
| 1572 | 510 LIR_Address(LIR_Opr base, intx disp, BasicType type): |
| 0 | 511 _base(base) |
| 512 , _index(LIR_OprDesc::illegalOpr()) | |
| 513 , _scale(times_1) | |
| 514 , _type(type) | |
| 515 , _disp(disp) { verify(); } | |
| 516 | |
| 1572 | 517 LIR_Address(LIR_Opr base, BasicType type): |
| 518 _base(base) | |
| 519 , _index(LIR_OprDesc::illegalOpr()) | |
| 520 , _scale(times_1) | |
| 521 , _type(type) | |
| 522 , _disp(0) { verify(); } | |
| 523 | |
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524 #if defined(X86) || defined(ARM) |
| 1572 | 525 LIR_Address(LIR_Opr base, LIR_Opr index, Scale scale, intx disp, BasicType type): |
| 0 | 526 _base(base) |
| 527 , _index(index) | |
| 528 , _scale(scale) | |
| 529 , _type(type) | |
| 530 , _disp(disp) { verify(); } | |
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531 #endif // X86 || ARM |
| 0 | 532 |
| 533 LIR_Opr base() const { return _base; } | |
| 534 LIR_Opr index() const { return _index; } | |
| 535 Scale scale() const { return _scale; } | |
| 536 intx disp() const { return _disp; } | |
| 537 | |
| 538 bool equals(LIR_Address* other) const { return base() == other->base() && index() == other->index() && disp() == other->disp() && scale() == other->scale(); } | |
| 539 | |
| 540 virtual LIR_Address* as_address() { return this; } | |
| 541 virtual BasicType type() const { return _type; } | |
| 542 virtual void print_value_on(outputStream* out) const PRODUCT_RETURN; | |
| 543 | |
| 544 void verify() const PRODUCT_RETURN; | |
| 545 | |
| 546 static Scale scale(BasicType type); | |
| 547 }; | |
| 548 | |
| 549 | |
| 550 // operand factory | |
| 551 class LIR_OprFact: public AllStatic { | |
| 552 public: | |
| 553 | |
| 554 static LIR_Opr illegalOpr; | |
| 555 | |
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556 static LIR_Opr single_cpu(int reg) { |
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557 return (LIR_Opr)(intptr_t)((reg << LIR_OprDesc::reg1_shift) | |
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558 LIR_OprDesc::int_type | |
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559 LIR_OprDesc::cpu_register | |
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560 LIR_OprDesc::single_size); |
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561 } |
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562 static LIR_Opr single_cpu_oop(int reg) { |
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563 return (LIR_Opr)(intptr_t)((reg << LIR_OprDesc::reg1_shift) | |
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564 LIR_OprDesc::object_type | |
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565 LIR_OprDesc::cpu_register | |
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566 LIR_OprDesc::single_size); |
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567 } |
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568 static LIR_Opr single_cpu_address(int reg) { |
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569 return (LIR_Opr)(intptr_t)((reg << LIR_OprDesc::reg1_shift) | |
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570 LIR_OprDesc::address_type | |
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571 LIR_OprDesc::cpu_register | |
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572 LIR_OprDesc::single_size); |
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573 } |
| 304 | 574 static LIR_Opr double_cpu(int reg1, int reg2) { |
| 575 LP64_ONLY(assert(reg1 == reg2, "must be identical")); | |
| 576 return (LIR_Opr)(intptr_t)((reg1 << LIR_OprDesc::reg1_shift) | | |
| 577 (reg2 << LIR_OprDesc::reg2_shift) | | |
| 578 LIR_OprDesc::long_type | | |
| 579 LIR_OprDesc::cpu_register | | |
| 580 LIR_OprDesc::double_size); | |
| 581 } | |
| 0 | 582 |
| 304 | 583 static LIR_Opr single_fpu(int reg) { return (LIR_Opr)(intptr_t)((reg << LIR_OprDesc::reg1_shift) | |
| 584 LIR_OprDesc::float_type | | |
| 585 LIR_OprDesc::fpu_register | | |
| 586 LIR_OprDesc::single_size); } | |
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587 #if defined(ARM) |
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588 static LIR_Opr double_fpu(int reg1, int reg2) { return (LIR_Opr)((reg1 << LIR_OprDesc::reg1_shift) | (reg2 << LIR_OprDesc::reg2_shift) | LIR_OprDesc::double_type | LIR_OprDesc::fpu_register | LIR_OprDesc::double_size); } |
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589 static LIR_Opr single_softfp(int reg) { return (LIR_Opr)((reg << LIR_OprDesc::reg1_shift) | LIR_OprDesc::float_type | LIR_OprDesc::cpu_register | LIR_OprDesc::single_size); } |
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590 static LIR_Opr double_softfp(int reg1, int reg2) { return (LIR_Opr)((reg1 << LIR_OprDesc::reg1_shift) | (reg2 << LIR_OprDesc::reg2_shift) | LIR_OprDesc::double_type | LIR_OprDesc::cpu_register | LIR_OprDesc::double_size); } |
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591 #endif |
| 0 | 592 #ifdef SPARC |
| 304 | 593 static LIR_Opr double_fpu(int reg1, int reg2) { return (LIR_Opr)(intptr_t)((reg1 << LIR_OprDesc::reg1_shift) | |
| 594 (reg2 << LIR_OprDesc::reg2_shift) | | |
| 595 LIR_OprDesc::double_type | | |
| 596 LIR_OprDesc::fpu_register | | |
| 597 LIR_OprDesc::double_size); } | |
| 0 | 598 #endif |
| 304 | 599 #ifdef X86 |
| 600 static LIR_Opr double_fpu(int reg) { return (LIR_Opr)(intptr_t)((reg << LIR_OprDesc::reg1_shift) | | |
| 601 (reg << LIR_OprDesc::reg2_shift) | | |
| 602 LIR_OprDesc::double_type | | |
| 603 LIR_OprDesc::fpu_register | | |
| 604 LIR_OprDesc::double_size); } | |
| 605 | |
| 606 static LIR_Opr single_xmm(int reg) { return (LIR_Opr)(intptr_t)((reg << LIR_OprDesc::reg1_shift) | | |
| 607 LIR_OprDesc::float_type | | |
| 608 LIR_OprDesc::fpu_register | | |
| 609 LIR_OprDesc::single_size | | |
| 610 LIR_OprDesc::is_xmm_mask); } | |
| 611 static LIR_Opr double_xmm(int reg) { return (LIR_Opr)(intptr_t)((reg << LIR_OprDesc::reg1_shift) | | |
| 612 (reg << LIR_OprDesc::reg2_shift) | | |
| 613 LIR_OprDesc::double_type | | |
| 614 LIR_OprDesc::fpu_register | | |
| 615 LIR_OprDesc::double_size | | |
| 616 LIR_OprDesc::is_xmm_mask); } | |
| 617 #endif // X86 | |
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618 #ifdef PPC |
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619 static LIR_Opr double_fpu(int reg) { return (LIR_Opr)(intptr_t)((reg << LIR_OprDesc::reg1_shift) | |
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620 (reg << LIR_OprDesc::reg2_shift) | |
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621 LIR_OprDesc::double_type | |
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622 LIR_OprDesc::fpu_register | |
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623 LIR_OprDesc::double_size); } |
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624 static LIR_Opr single_softfp(int reg) { return (LIR_Opr)((reg << LIR_OprDesc::reg1_shift) | |
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625 LIR_OprDesc::float_type | |
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626 LIR_OprDesc::cpu_register | |
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627 LIR_OprDesc::single_size); } |
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628 static LIR_Opr double_softfp(int reg1, int reg2) { return (LIR_Opr)((reg2 << LIR_OprDesc::reg1_shift) | |
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629 (reg1 << LIR_OprDesc::reg2_shift) | |
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630 LIR_OprDesc::double_type | |
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631 LIR_OprDesc::cpu_register | |
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632 LIR_OprDesc::double_size); } |
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633 #endif // PPC |
| 0 | 634 |
| 635 static LIR_Opr virtual_register(int index, BasicType type) { | |
| 636 LIR_Opr res; | |
| 637 switch (type) { | |
| 638 case T_OBJECT: // fall through | |
| 304 | 639 case T_ARRAY: |
| 640 res = (LIR_Opr)(intptr_t)((index << LIR_OprDesc::data_shift) | | |
| 641 LIR_OprDesc::object_type | | |
| 642 LIR_OprDesc::cpu_register | | |
| 643 LIR_OprDesc::single_size | | |
| 644 LIR_OprDesc::virtual_mask); | |
| 645 break; | |
| 646 | |
| 647 case T_INT: | |
| 648 res = (LIR_Opr)(intptr_t)((index << LIR_OprDesc::data_shift) | | |
| 649 LIR_OprDesc::int_type | | |
| 650 LIR_OprDesc::cpu_register | | |
| 651 LIR_OprDesc::single_size | | |
| 652 LIR_OprDesc::virtual_mask); | |
| 653 break; | |
| 654 | |
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655 case T_ADDRESS: |
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656 res = (LIR_Opr)(intptr_t)((index << LIR_OprDesc::data_shift) | |
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657 LIR_OprDesc::address_type | |
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658 LIR_OprDesc::cpu_register | |
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659 LIR_OprDesc::single_size | |
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660 LIR_OprDesc::virtual_mask); |
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661 break; |
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662 |
| 304 | 663 case T_LONG: |
| 664 res = (LIR_Opr)(intptr_t)((index << LIR_OprDesc::data_shift) | | |
| 665 LIR_OprDesc::long_type | | |
| 666 LIR_OprDesc::cpu_register | | |
| 667 LIR_OprDesc::double_size | | |
| 668 LIR_OprDesc::virtual_mask); | |
| 669 break; | |
| 670 | |
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671 #ifdef __SOFTFP__ |
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672 case T_FLOAT: |
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673 res = (LIR_Opr)(intptr_t)((index << LIR_OprDesc::data_shift) | |
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674 LIR_OprDesc::float_type | |
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675 LIR_OprDesc::cpu_register | |
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676 LIR_OprDesc::single_size | |
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677 LIR_OprDesc::virtual_mask); |
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678 break; |
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679 case T_DOUBLE: |
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680 res = (LIR_Opr)(intptr_t)((index << LIR_OprDesc::data_shift) | |
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681 LIR_OprDesc::double_type | |
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682 LIR_OprDesc::cpu_register | |
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683 LIR_OprDesc::double_size | |
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684 LIR_OprDesc::virtual_mask); |
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685 break; |
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686 #else // __SOFTFP__ |
| 304 | 687 case T_FLOAT: |
| 688 res = (LIR_Opr)(intptr_t)((index << LIR_OprDesc::data_shift) | | |
| 689 LIR_OprDesc::float_type | | |
| 690 LIR_OprDesc::fpu_register | | |
| 691 LIR_OprDesc::single_size | | |
| 692 LIR_OprDesc::virtual_mask); | |
| 693 break; | |
| 694 | |
| 695 case | |
| 696 T_DOUBLE: res = (LIR_Opr)(intptr_t)((index << LIR_OprDesc::data_shift) | | |
| 697 LIR_OprDesc::double_type | | |
| 698 LIR_OprDesc::fpu_register | | |
| 699 LIR_OprDesc::double_size | | |
| 700 LIR_OprDesc::virtual_mask); | |
| 701 break; | |
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702 #endif // __SOFTFP__ |
| 0 | 703 default: ShouldNotReachHere(); res = illegalOpr; |
| 704 } | |
| 705 | |
| 706 #ifdef ASSERT | |
| 707 res->validate_type(); | |
| 708 assert(res->vreg_number() == index, "conversion check"); | |
| 709 assert(index >= LIR_OprDesc::vreg_base, "must start at vreg_base"); | |
| 710 assert(index <= (max_jint >> LIR_OprDesc::data_shift), "index is too big"); | |
| 711 | |
| 712 // old-style calculation; check if old and new method are equal | |
| 713 LIR_OprDesc::OprType t = as_OprType(type); | |
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714 #ifdef __SOFTFP__ |
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715 LIR_Opr old_res = (LIR_Opr)(intptr_t)((index << LIR_OprDesc::data_shift) | |
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716 t | |
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717 LIR_OprDesc::cpu_register | |
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718 LIR_OprDesc::size_for(type) | LIR_OprDesc::virtual_mask); |
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719 #else // __SOFTFP__ |
| 304 | 720 LIR_Opr old_res = (LIR_Opr)(intptr_t)((index << LIR_OprDesc::data_shift) | t | |
| 721 ((type == T_FLOAT || type == T_DOUBLE) ? LIR_OprDesc::fpu_register : LIR_OprDesc::cpu_register) | | |
| 0 | 722 LIR_OprDesc::size_for(type) | LIR_OprDesc::virtual_mask); |
| 723 assert(res == old_res, "old and new method not equal"); | |
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724 #endif // __SOFTFP__ |
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725 #endif // ASSERT |
| 0 | 726 |
| 727 return res; | |
| 728 } | |
| 729 | |
| 730 // 'index' is computed by FrameMap::local_stack_pos(index); do not use other parameters as | |
| 731 // the index is platform independent; a double stack useing indeces 2 and 3 has always | |
| 732 // index 2. | |
| 733 static LIR_Opr stack(int index, BasicType type) { | |
| 734 LIR_Opr res; | |
| 735 switch (type) { | |
| 736 case T_OBJECT: // fall through | |
| 304 | 737 case T_ARRAY: |
| 738 res = (LIR_Opr)(intptr_t)((index << LIR_OprDesc::data_shift) | | |
| 739 LIR_OprDesc::object_type | | |
| 740 LIR_OprDesc::stack_value | | |
| 741 LIR_OprDesc::single_size); | |
| 742 break; | |
| 743 | |
| 744 case T_INT: | |
| 745 res = (LIR_Opr)(intptr_t)((index << LIR_OprDesc::data_shift) | | |
| 746 LIR_OprDesc::int_type | | |
| 747 LIR_OprDesc::stack_value | | |
| 748 LIR_OprDesc::single_size); | |
| 749 break; | |
| 750 | |
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751 case T_ADDRESS: |
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752 res = (LIR_Opr)(intptr_t)((index << LIR_OprDesc::data_shift) | |
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753 LIR_OprDesc::address_type | |
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754 LIR_OprDesc::stack_value | |
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755 LIR_OprDesc::single_size); |
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756 break; |
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757 |
| 304 | 758 case T_LONG: |
| 759 res = (LIR_Opr)(intptr_t)((index << LIR_OprDesc::data_shift) | | |
| 760 LIR_OprDesc::long_type | | |
| 761 LIR_OprDesc::stack_value | | |
| 762 LIR_OprDesc::double_size); | |
| 763 break; | |
| 764 | |
| 765 case T_FLOAT: | |
| 766 res = (LIR_Opr)(intptr_t)((index << LIR_OprDesc::data_shift) | | |
| 767 LIR_OprDesc::float_type | | |
| 768 LIR_OprDesc::stack_value | | |
| 769 LIR_OprDesc::single_size); | |
| 770 break; | |
| 771 case T_DOUBLE: | |
| 772 res = (LIR_Opr)(intptr_t)((index << LIR_OprDesc::data_shift) | | |
| 773 LIR_OprDesc::double_type | | |
| 774 LIR_OprDesc::stack_value | | |
| 775 LIR_OprDesc::double_size); | |
| 776 break; | |
| 0 | 777 |
| 778 default: ShouldNotReachHere(); res = illegalOpr; | |
| 779 } | |
| 780 | |
| 781 #ifdef ASSERT | |
| 782 assert(index >= 0, "index must be positive"); | |
| 783 assert(index <= (max_jint >> LIR_OprDesc::data_shift), "index is too big"); | |
| 784 | |
| 304 | 785 LIR_Opr old_res = (LIR_Opr)(intptr_t)((index << LIR_OprDesc::data_shift) | |
| 786 LIR_OprDesc::stack_value | | |
| 787 as_OprType(type) | | |
| 788 LIR_OprDesc::size_for(type)); | |
| 0 | 789 assert(res == old_res, "old and new method not equal"); |
| 790 #endif | |
| 791 | |
| 792 return res; | |
| 793 } | |
| 794 | |
| 795 static LIR_Opr intConst(jint i) { return (LIR_Opr)(new LIR_Const(i)); } | |
| 796 static LIR_Opr longConst(jlong l) { return (LIR_Opr)(new LIR_Const(l)); } | |
| 797 static LIR_Opr floatConst(jfloat f) { return (LIR_Opr)(new LIR_Const(f)); } | |
| 798 static LIR_Opr doubleConst(jdouble d) { return (LIR_Opr)(new LIR_Const(d)); } | |
| 799 static LIR_Opr oopConst(jobject o) { return (LIR_Opr)(new LIR_Const(o)); } | |
| 800 static LIR_Opr address(LIR_Address* a) { return (LIR_Opr)a; } | |
| 801 static LIR_Opr intptrConst(void* p) { return (LIR_Opr)(new LIR_Const(p)); } | |
| 802 static LIR_Opr intptrConst(intptr_t v) { return (LIR_Opr)(new LIR_Const((void*)v)); } | |
| 803 static LIR_Opr illegal() { return (LIR_Opr)-1; } | |
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804 static LIR_Opr addressConst(jint i) { return (LIR_Opr)(new LIR_Const(i, true)); } |
| 0 | 805 |
| 806 static LIR_Opr value_type(ValueType* type); | |
| 807 static LIR_Opr dummy_value_type(ValueType* type); | |
| 808 }; | |
| 809 | |
| 810 | |
| 811 //------------------------------------------------------------------------------- | |
| 812 // LIR Instructions | |
| 813 //------------------------------------------------------------------------------- | |
| 814 // | |
| 815 // Note: | |
| 816 // - every instruction has a result operand | |
| 817 // - every instruction has an CodeEmitInfo operand (can be revisited later) | |
| 818 // - every instruction has a LIR_OpCode operand | |
| 819 // - LIR_OpN, means an instruction that has N input operands | |
| 820 // | |
| 821 // class hierarchy: | |
| 822 // | |
| 823 class LIR_Op; | |
| 824 class LIR_Op0; | |
| 825 class LIR_OpLabel; | |
| 826 class LIR_Op1; | |
| 827 class LIR_OpBranch; | |
| 828 class LIR_OpConvert; | |
| 829 class LIR_OpAllocObj; | |
| 830 class LIR_OpRoundFP; | |
| 831 class LIR_Op2; | |
| 832 class LIR_OpDelay; | |
| 833 class LIR_Op3; | |
| 834 class LIR_OpAllocArray; | |
| 835 class LIR_OpCall; | |
| 836 class LIR_OpJavaCall; | |
| 837 class LIR_OpRTCall; | |
| 838 class LIR_OpArrayCopy; | |
| 839 class LIR_OpLock; | |
| 840 class LIR_OpTypeCheck; | |
| 841 class LIR_OpCompareAndSwap; | |
| 842 class LIR_OpProfileCall; | |
| 843 | |
| 844 | |
| 845 // LIR operation codes | |
| 846 enum LIR_Code { | |
| 847 lir_none | |
| 848 , begin_op0 | |
| 849 , lir_word_align | |
| 850 , lir_label | |
| 851 , lir_nop | |
| 852 , lir_backwardbranch_target | |
| 853 , lir_std_entry | |
| 854 , lir_osr_entry | |
| 855 , lir_build_frame | |
| 856 , lir_fpop_raw | |
| 857 , lir_24bit_FPU | |
| 858 , lir_reset_FPU | |
| 859 , lir_breakpoint | |
| 860 , lir_rtcall | |
| 861 , lir_membar | |
| 862 , lir_membar_acquire | |
| 863 , lir_membar_release | |
| 864 , lir_get_thread | |
| 865 , end_op0 | |
| 866 , begin_op1 | |
| 867 , lir_fxch | |
| 868 , lir_fld | |
| 869 , lir_ffree | |
| 870 , lir_push | |
| 871 , lir_pop | |
| 872 , lir_null_check | |
| 873 , lir_return | |
| 874 , lir_leal | |
| 875 , lir_neg | |
| 876 , lir_branch | |
| 877 , lir_cond_float_branch | |
| 878 , lir_move | |
| 879 , lir_prefetchr | |
| 880 , lir_prefetchw | |
| 881 , lir_convert | |
| 882 , lir_alloc_object | |
| 883 , lir_monaddr | |
| 884 , lir_roundfp | |
| 885 , lir_safepoint | |
| 1783 | 886 , lir_pack64 |
| 887 , lir_unpack64 | |
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888 , lir_unwind |
| 0 | 889 , end_op1 |
| 890 , begin_op2 | |
| 891 , lir_cmp | |
| 892 , lir_cmp_l2i | |
| 893 , lir_ucmp_fd2i | |
| 894 , lir_cmp_fd2i | |
| 895 , lir_cmove | |
| 896 , lir_add | |
| 897 , lir_sub | |
| 898 , lir_mul | |
| 899 , lir_mul_strictfp | |
| 900 , lir_div | |
| 901 , lir_div_strictfp | |
| 902 , lir_rem | |
| 903 , lir_sqrt | |
| 904 , lir_abs | |
| 905 , lir_sin | |
| 906 , lir_cos | |
| 907 , lir_tan | |
| 908 , lir_log | |
| 909 , lir_log10 | |
| 910 , lir_logic_and | |
| 911 , lir_logic_or | |
| 912 , lir_logic_xor | |
| 913 , lir_shl | |
| 914 , lir_shr | |
| 915 , lir_ushr | |
| 916 , lir_alloc_array | |
| 917 , lir_throw | |
| 918 , lir_compare_to | |
| 919 , end_op2 | |
| 920 , begin_op3 | |
| 921 , lir_idiv | |
| 922 , lir_irem | |
| 923 , end_op3 | |
| 924 , begin_opJavaCall | |
| 925 , lir_static_call | |
| 926 , lir_optvirtual_call | |
| 927 , lir_icvirtual_call | |
| 928 , lir_virtual_call | |
| 1295 | 929 , lir_dynamic_call |
| 0 | 930 , end_opJavaCall |
| 931 , begin_opArrayCopy | |
| 932 , lir_arraycopy | |
| 933 , end_opArrayCopy | |
| 934 , begin_opLock | |
| 935 , lir_lock | |
| 936 , lir_unlock | |
| 937 , end_opLock | |
| 938 , begin_delay_slot | |
| 939 , lir_delay_slot | |
| 940 , end_delay_slot | |
| 941 , begin_opTypeCheck | |
| 942 , lir_instanceof | |
| 943 , lir_checkcast | |
| 944 , lir_store_check | |
| 945 , end_opTypeCheck | |
| 946 , begin_opCompareAndSwap | |
| 947 , lir_cas_long | |
| 948 , lir_cas_obj | |
| 949 , lir_cas_int | |
| 950 , end_opCompareAndSwap | |
| 951 , begin_opMDOProfile | |
| 952 , lir_profile_call | |
| 953 , end_opMDOProfile | |
| 954 }; | |
| 955 | |
| 956 | |
| 957 enum LIR_Condition { | |
| 958 lir_cond_equal | |
| 959 , lir_cond_notEqual | |
| 960 , lir_cond_less | |
| 961 , lir_cond_lessEqual | |
| 962 , lir_cond_greaterEqual | |
| 963 , lir_cond_greater | |
| 964 , lir_cond_belowEqual | |
| 965 , lir_cond_aboveEqual | |
| 966 , lir_cond_always | |
| 967 , lir_cond_unknown = -1 | |
| 968 }; | |
| 969 | |
| 970 | |
| 971 enum LIR_PatchCode { | |
| 972 lir_patch_none, | |
| 973 lir_patch_low, | |
| 974 lir_patch_high, | |
| 975 lir_patch_normal | |
| 976 }; | |
| 977 | |
| 978 | |
| 979 enum LIR_MoveKind { | |
| 980 lir_move_normal, | |
| 981 lir_move_volatile, | |
| 982 lir_move_unaligned, | |
| 983 lir_move_max_flag | |
| 984 }; | |
| 985 | |
| 986 | |
| 987 // -------------------------------------------------- | |
| 988 // LIR_Op | |
| 989 // -------------------------------------------------- | |
| 990 class LIR_Op: public CompilationResourceObj { | |
| 991 friend class LIR_OpVisitState; | |
| 992 | |
| 993 #ifdef ASSERT | |
| 994 private: | |
| 995 const char * _file; | |
| 996 int _line; | |
| 997 #endif | |
| 998 | |
| 999 protected: | |
| 1000 LIR_Opr _result; | |
| 1001 unsigned short _code; | |
| 1002 unsigned short _flags; | |
| 1003 CodeEmitInfo* _info; | |
| 1004 int _id; // value id for register allocation | |
| 1005 int _fpu_pop_count; | |
| 1006 Instruction* _source; // for debugging | |
| 1007 | |
| 1008 static void print_condition(outputStream* out, LIR_Condition cond) PRODUCT_RETURN; | |
| 1009 | |
| 1010 protected: | |
| 1011 static bool is_in_range(LIR_Code test, LIR_Code start, LIR_Code end) { return start < test && test < end; } | |
| 1012 | |
| 1013 public: | |
| 1014 LIR_Op() | |
| 1015 : _result(LIR_OprFact::illegalOpr) | |
| 1016 , _code(lir_none) | |
| 1017 , _flags(0) | |
| 1018 , _info(NULL) | |
| 1019 #ifdef ASSERT | |
| 1020 , _file(NULL) | |
| 1021 , _line(0) | |
| 1022 #endif | |
| 1023 , _fpu_pop_count(0) | |
| 1024 , _source(NULL) | |
| 1025 , _id(-1) {} | |
| 1026 | |
| 1027 LIR_Op(LIR_Code code, LIR_Opr result, CodeEmitInfo* info) | |
| 1028 : _result(result) | |
| 1029 , _code(code) | |
| 1030 , _flags(0) | |
| 1031 , _info(info) | |
| 1032 #ifdef ASSERT | |
| 1033 , _file(NULL) | |
| 1034 , _line(0) | |
| 1035 #endif | |
| 1036 , _fpu_pop_count(0) | |
| 1037 , _source(NULL) | |
| 1038 , _id(-1) {} | |
| 1039 | |
| 1040 CodeEmitInfo* info() const { return _info; } | |
| 1041 LIR_Code code() const { return (LIR_Code)_code; } | |
| 1042 LIR_Opr result_opr() const { return _result; } | |
| 1043 void set_result_opr(LIR_Opr opr) { _result = opr; } | |
| 1044 | |
| 1045 #ifdef ASSERT | |
| 1046 void set_file_and_line(const char * file, int line) { | |
| 1047 _file = file; | |
| 1048 _line = line; | |
| 1049 } | |
| 1050 #endif | |
| 1051 | |
| 1052 virtual const char * name() const PRODUCT_RETURN0; | |
| 1053 | |
| 1054 int id() const { return _id; } | |
| 1055 void set_id(int id) { _id = id; } | |
| 1056 | |
| 1057 // FPU stack simulation helpers -- only used on Intel | |
| 1058 void set_fpu_pop_count(int count) { assert(count >= 0 && count <= 1, "currently only 0 and 1 are valid"); _fpu_pop_count = count; } | |
| 1059 int fpu_pop_count() const { return _fpu_pop_count; } | |
| 1060 bool pop_fpu_stack() { return _fpu_pop_count > 0; } | |
| 1061 | |
| 1062 Instruction* source() const { return _source; } | |
| 1063 void set_source(Instruction* ins) { _source = ins; } | |
| 1064 | |
| 1065 virtual void emit_code(LIR_Assembler* masm) = 0; | |
| 1066 virtual void print_instr(outputStream* out) const = 0; | |
| 1067 virtual void print_on(outputStream* st) const PRODUCT_RETURN; | |
| 1068 | |
| 1069 virtual LIR_OpCall* as_OpCall() { return NULL; } | |
| 1070 virtual LIR_OpJavaCall* as_OpJavaCall() { return NULL; } | |
| 1071 virtual LIR_OpLabel* as_OpLabel() { return NULL; } | |
| 1072 virtual LIR_OpDelay* as_OpDelay() { return NULL; } | |
| 1073 virtual LIR_OpLock* as_OpLock() { return NULL; } | |
| 1074 virtual LIR_OpAllocArray* as_OpAllocArray() { return NULL; } | |
| 1075 virtual LIR_OpAllocObj* as_OpAllocObj() { return NULL; } | |
| 1076 virtual LIR_OpRoundFP* as_OpRoundFP() { return NULL; } | |
| 1077 virtual LIR_OpBranch* as_OpBranch() { return NULL; } | |
| 1078 virtual LIR_OpRTCall* as_OpRTCall() { return NULL; } | |
| 1079 virtual LIR_OpConvert* as_OpConvert() { return NULL; } | |
| 1080 virtual LIR_Op0* as_Op0() { return NULL; } | |
| 1081 virtual LIR_Op1* as_Op1() { return NULL; } | |
| 1082 virtual LIR_Op2* as_Op2() { return NULL; } | |
| 1083 virtual LIR_Op3* as_Op3() { return NULL; } | |
| 1084 virtual LIR_OpArrayCopy* as_OpArrayCopy() { return NULL; } | |
| 1085 virtual LIR_OpTypeCheck* as_OpTypeCheck() { return NULL; } | |
| 1086 virtual LIR_OpCompareAndSwap* as_OpCompareAndSwap() { return NULL; } | |
| 1087 virtual LIR_OpProfileCall* as_OpProfileCall() { return NULL; } | |
| 1088 | |
| 1089 virtual void verify() const {} | |
| 1090 }; | |
| 1091 | |
| 1092 // for calls | |
| 1093 class LIR_OpCall: public LIR_Op { | |
| 1094 friend class LIR_OpVisitState; | |
| 1095 | |
| 1096 protected: | |
| 1097 address _addr; | |
| 1098 LIR_OprList* _arguments; | |
| 1099 protected: | |
| 1100 LIR_OpCall(LIR_Code code, address addr, LIR_Opr result, | |
| 1101 LIR_OprList* arguments, CodeEmitInfo* info = NULL) | |
| 1102 : LIR_Op(code, result, info) | |
| 1103 , _arguments(arguments) | |
| 1104 , _addr(addr) {} | |
| 1105 | |
| 1106 public: | |
| 1107 address addr() const { return _addr; } | |
| 1108 const LIR_OprList* arguments() const { return _arguments; } | |
| 1109 virtual LIR_OpCall* as_OpCall() { return this; } | |
| 1110 }; | |
| 1111 | |
| 1112 | |
| 1113 // -------------------------------------------------- | |
| 1114 // LIR_OpJavaCall | |
| 1115 // -------------------------------------------------- | |
| 1116 class LIR_OpJavaCall: public LIR_OpCall { | |
| 1117 friend class LIR_OpVisitState; | |
| 1118 | |
| 1119 private: | |
| 1564 | 1120 ciMethod* _method; |
| 1121 LIR_Opr _receiver; | |
| 1122 LIR_Opr _method_handle_invoke_SP_save_opr; // Used in LIR_OpVisitState::visit to store the reference to FrameMap::method_handle_invoke_SP_save_opr. | |
| 0 | 1123 |
| 1124 public: | |
| 1125 LIR_OpJavaCall(LIR_Code code, ciMethod* method, | |
| 1126 LIR_Opr receiver, LIR_Opr result, | |
| 1127 address addr, LIR_OprList* arguments, | |
| 1128 CodeEmitInfo* info) | |
| 1129 : LIR_OpCall(code, addr, result, arguments, info) | |
| 1130 , _receiver(receiver) | |
| 1564 | 1131 , _method(method) |
| 1132 , _method_handle_invoke_SP_save_opr(LIR_OprFact::illegalOpr) | |
| 1133 { assert(is_in_range(code, begin_opJavaCall, end_opJavaCall), "code check"); } | |
| 0 | 1134 |
| 1135 LIR_OpJavaCall(LIR_Code code, ciMethod* method, | |
| 1136 LIR_Opr receiver, LIR_Opr result, intptr_t vtable_offset, | |
| 1137 LIR_OprList* arguments, CodeEmitInfo* info) | |
| 1138 : LIR_OpCall(code, (address)vtable_offset, result, arguments, info) | |
| 1139 , _receiver(receiver) | |
| 1564 | 1140 , _method(method) |
| 1141 , _method_handle_invoke_SP_save_opr(LIR_OprFact::illegalOpr) | |
| 1142 { assert(is_in_range(code, begin_opJavaCall, end_opJavaCall), "code check"); } | |
| 0 | 1143 |
| 1144 LIR_Opr receiver() const { return _receiver; } | |
| 1145 ciMethod* method() const { return _method; } | |
| 1146 | |
| 1295 | 1147 // JSR 292 support. |
| 1148 bool is_invokedynamic() const { return code() == lir_dynamic_call; } | |
| 1149 bool is_method_handle_invoke() const { | |
| 1150 return | |
| 1151 is_invokedynamic() // An invokedynamic is always a MethodHandle call site. | |
| 1152 || | |
| 1153 (method()->holder()->name() == ciSymbol::java_dyn_MethodHandle() && | |
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1154 methodOopDesc::is_method_handle_invoke_name(method()->name()->sid())); |
| 1295 | 1155 } |
| 1156 | |
| 0 | 1157 intptr_t vtable_offset() const { |
| 1158 assert(_code == lir_virtual_call, "only have vtable for real vcall"); | |
| 1159 return (intptr_t) addr(); | |
| 1160 } | |
| 1161 | |
| 1162 virtual void emit_code(LIR_Assembler* masm); | |
| 1163 virtual LIR_OpJavaCall* as_OpJavaCall() { return this; } | |
| 1164 virtual void print_instr(outputStream* out) const PRODUCT_RETURN; | |
| 1165 }; | |
| 1166 | |
| 1167 // -------------------------------------------------- | |
| 1168 // LIR_OpLabel | |
| 1169 // -------------------------------------------------- | |
| 1170 // Location where a branch can continue | |
| 1171 class LIR_OpLabel: public LIR_Op { | |
| 1172 friend class LIR_OpVisitState; | |
| 1173 | |
| 1174 private: | |
| 1175 Label* _label; | |
| 1176 public: | |
| 1177 LIR_OpLabel(Label* lbl) | |
| 1178 : LIR_Op(lir_label, LIR_OprFact::illegalOpr, NULL) | |
| 1179 , _label(lbl) {} | |
| 1180 Label* label() const { return _label; } | |
| 1181 | |
| 1182 virtual void emit_code(LIR_Assembler* masm); | |
| 1183 virtual LIR_OpLabel* as_OpLabel() { return this; } | |
| 1184 virtual void print_instr(outputStream* out) const PRODUCT_RETURN; | |
| 1185 }; | |
| 1186 | |
| 1187 // LIR_OpArrayCopy | |
| 1188 class LIR_OpArrayCopy: public LIR_Op { | |
| 1189 friend class LIR_OpVisitState; | |
| 1190 | |
| 1191 private: | |
| 1192 ArrayCopyStub* _stub; | |
| 1193 LIR_Opr _src; | |
| 1194 LIR_Opr _src_pos; | |
| 1195 LIR_Opr _dst; | |
| 1196 LIR_Opr _dst_pos; | |
| 1197 LIR_Opr _length; | |
| 1198 LIR_Opr _tmp; | |
| 1199 ciArrayKlass* _expected_type; | |
| 1200 int _flags; | |
| 1201 | |
| 1202 public: | |
| 1203 enum Flags { | |
| 1204 src_null_check = 1 << 0, | |
| 1205 dst_null_check = 1 << 1, | |
| 1206 src_pos_positive_check = 1 << 2, | |
| 1207 dst_pos_positive_check = 1 << 3, | |
| 1208 length_positive_check = 1 << 4, | |
| 1209 src_range_check = 1 << 5, | |
| 1210 dst_range_check = 1 << 6, | |
| 1211 type_check = 1 << 7, | |
| 1212 all_flags = (1 << 8) - 1 | |
| 1213 }; | |
| 1214 | |
| 1215 LIR_OpArrayCopy(LIR_Opr src, LIR_Opr src_pos, LIR_Opr dst, LIR_Opr dst_pos, LIR_Opr length, LIR_Opr tmp, | |
| 1216 ciArrayKlass* expected_type, int flags, CodeEmitInfo* info); | |
| 1217 | |
| 1218 LIR_Opr src() const { return _src; } | |
| 1219 LIR_Opr src_pos() const { return _src_pos; } | |
| 1220 LIR_Opr dst() const { return _dst; } | |
| 1221 LIR_Opr dst_pos() const { return _dst_pos; } | |
| 1222 LIR_Opr length() const { return _length; } | |
| 1223 LIR_Opr tmp() const { return _tmp; } | |
| 1224 int flags() const { return _flags; } | |
| 1225 ciArrayKlass* expected_type() const { return _expected_type; } | |
| 1226 ArrayCopyStub* stub() const { return _stub; } | |
| 1227 | |
| 1228 virtual void emit_code(LIR_Assembler* masm); | |
| 1229 virtual LIR_OpArrayCopy* as_OpArrayCopy() { return this; } | |
| 1230 void print_instr(outputStream* out) const PRODUCT_RETURN; | |
| 1231 }; | |
| 1232 | |
| 1233 | |
| 1234 // -------------------------------------------------- | |
| 1235 // LIR_Op0 | |
| 1236 // -------------------------------------------------- | |
| 1237 class LIR_Op0: public LIR_Op { | |
| 1238 friend class LIR_OpVisitState; | |
| 1239 | |
| 1240 public: | |
| 1241 LIR_Op0(LIR_Code code) | |
| 1242 : LIR_Op(code, LIR_OprFact::illegalOpr, NULL) { assert(is_in_range(code, begin_op0, end_op0), "code check"); } | |
| 1243 LIR_Op0(LIR_Code code, LIR_Opr result, CodeEmitInfo* info = NULL) | |
| 1244 : LIR_Op(code, result, info) { assert(is_in_range(code, begin_op0, end_op0), "code check"); } | |
| 1245 | |
| 1246 virtual void emit_code(LIR_Assembler* masm); | |
| 1247 virtual LIR_Op0* as_Op0() { return this; } | |
| 1248 virtual void print_instr(outputStream* out) const PRODUCT_RETURN; | |
| 1249 }; | |
| 1250 | |
| 1251 | |
| 1252 // -------------------------------------------------- | |
| 1253 // LIR_Op1 | |
| 1254 // -------------------------------------------------- | |
| 1255 | |
| 1256 class LIR_Op1: public LIR_Op { | |
| 1257 friend class LIR_OpVisitState; | |
| 1258 | |
| 1259 protected: | |
| 1260 LIR_Opr _opr; // input operand | |
| 1261 BasicType _type; // Operand types | |
| 1262 LIR_PatchCode _patch; // only required with patchin (NEEDS_CLEANUP: do we want a special instruction for patching?) | |
| 1263 | |
| 1264 static void print_patch_code(outputStream* out, LIR_PatchCode code); | |
| 1265 | |
| 1266 void set_kind(LIR_MoveKind kind) { | |
| 1267 assert(code() == lir_move, "must be"); | |
| 1268 _flags = kind; | |
| 1269 } | |
| 1270 | |
| 1271 public: | |
| 1272 LIR_Op1(LIR_Code code, LIR_Opr opr, LIR_Opr result = LIR_OprFact::illegalOpr, BasicType type = T_ILLEGAL, LIR_PatchCode patch = lir_patch_none, CodeEmitInfo* info = NULL) | |
| 1273 : LIR_Op(code, result, info) | |
| 1274 , _opr(opr) | |
| 1275 , _patch(patch) | |
| 1276 , _type(type) { assert(is_in_range(code, begin_op1, end_op1), "code check"); } | |
| 1277 | |
| 1278 LIR_Op1(LIR_Code code, LIR_Opr opr, LIR_Opr result, BasicType type, LIR_PatchCode patch, CodeEmitInfo* info, LIR_MoveKind kind) | |
| 1279 : LIR_Op(code, result, info) | |
| 1280 , _opr(opr) | |
| 1281 , _patch(patch) | |
| 1282 , _type(type) { | |
| 1283 assert(code == lir_move, "must be"); | |
| 1284 set_kind(kind); | |
| 1285 } | |
| 1286 | |
| 1287 LIR_Op1(LIR_Code code, LIR_Opr opr, CodeEmitInfo* info) | |
| 1288 : LIR_Op(code, LIR_OprFact::illegalOpr, info) | |
| 1289 , _opr(opr) | |
| 1290 , _patch(lir_patch_none) | |
| 1291 , _type(T_ILLEGAL) { assert(is_in_range(code, begin_op1, end_op1), "code check"); } | |
| 1292 | |
| 1293 LIR_Opr in_opr() const { return _opr; } | |
| 1294 LIR_PatchCode patch_code() const { return _patch; } | |
| 1295 BasicType type() const { return _type; } | |
| 1296 | |
| 1297 LIR_MoveKind move_kind() const { | |
| 1298 assert(code() == lir_move, "must be"); | |
| 1299 return (LIR_MoveKind)_flags; | |
| 1300 } | |
| 1301 | |
| 1302 virtual void emit_code(LIR_Assembler* masm); | |
| 1303 virtual LIR_Op1* as_Op1() { return this; } | |
| 1304 virtual const char * name() const PRODUCT_RETURN0; | |
| 1305 | |
| 1306 void set_in_opr(LIR_Opr opr) { _opr = opr; } | |
| 1307 | |
| 1308 virtual void print_instr(outputStream* out) const PRODUCT_RETURN; | |
| 1309 virtual void verify() const; | |
| 1310 }; | |
| 1311 | |
| 1312 | |
| 1313 // for runtime calls | |
| 1314 class LIR_OpRTCall: public LIR_OpCall { | |
| 1315 friend class LIR_OpVisitState; | |
| 1316 | |
| 1317 private: | |
| 1318 LIR_Opr _tmp; | |
| 1319 public: | |
| 1320 LIR_OpRTCall(address addr, LIR_Opr tmp, | |
| 1321 LIR_Opr result, LIR_OprList* arguments, CodeEmitInfo* info = NULL) | |
| 1322 : LIR_OpCall(lir_rtcall, addr, result, arguments, info) | |
| 1323 , _tmp(tmp) {} | |
| 1324 | |
| 1325 virtual void print_instr(outputStream* out) const PRODUCT_RETURN; | |
| 1326 virtual void emit_code(LIR_Assembler* masm); | |
| 1327 virtual LIR_OpRTCall* as_OpRTCall() { return this; } | |
| 1328 | |
| 1329 LIR_Opr tmp() const { return _tmp; } | |
| 1330 | |
| 1331 virtual void verify() const; | |
| 1332 }; | |
| 1333 | |
| 1334 | |
| 1335 class LIR_OpBranch: public LIR_Op { | |
| 1336 friend class LIR_OpVisitState; | |
| 1337 | |
| 1338 private: | |
| 1339 LIR_Condition _cond; | |
| 1340 BasicType _type; | |
| 1341 Label* _label; | |
| 1342 BlockBegin* _block; // if this is a branch to a block, this is the block | |
| 1343 BlockBegin* _ublock; // if this is a float-branch, this is the unorderd block | |
| 1344 CodeStub* _stub; // if this is a branch to a stub, this is the stub | |
| 1345 | |
| 1346 public: | |
| 1347 LIR_OpBranch(LIR_Condition cond, Label* lbl) | |
| 1348 : LIR_Op(lir_branch, LIR_OprFact::illegalOpr, (CodeEmitInfo*) NULL) | |
| 1349 , _cond(cond) | |
| 1350 , _label(lbl) | |
| 1351 , _block(NULL) | |
| 1352 , _ublock(NULL) | |
| 1353 , _stub(NULL) { } | |
| 1354 | |
| 1355 LIR_OpBranch(LIR_Condition cond, BasicType type, BlockBegin* block); | |
| 1356 LIR_OpBranch(LIR_Condition cond, BasicType type, CodeStub* stub); | |
| 1357 | |
| 1358 // for unordered comparisons | |
| 1359 LIR_OpBranch(LIR_Condition cond, BasicType type, BlockBegin* block, BlockBegin* ublock); | |
| 1360 | |
| 1361 LIR_Condition cond() const { return _cond; } | |
| 1362 BasicType type() const { return _type; } | |
| 1363 Label* label() const { return _label; } | |
| 1364 BlockBegin* block() const { return _block; } | |
| 1365 BlockBegin* ublock() const { return _ublock; } | |
| 1366 CodeStub* stub() const { return _stub; } | |
| 1367 | |
| 1368 void change_block(BlockBegin* b); | |
| 1369 void change_ublock(BlockBegin* b); | |
| 1370 void negate_cond(); | |
| 1371 | |
| 1372 virtual void emit_code(LIR_Assembler* masm); | |
| 1373 virtual LIR_OpBranch* as_OpBranch() { return this; } | |
| 1374 virtual void print_instr(outputStream* out) const PRODUCT_RETURN; | |
| 1375 }; | |
| 1376 | |
| 1377 | |
| 1378 class ConversionStub; | |
| 1379 | |
| 1380 class LIR_OpConvert: public LIR_Op1 { | |
| 1381 friend class LIR_OpVisitState; | |
| 1382 | |
| 1383 private: | |
| 1384 Bytecodes::Code _bytecode; | |
| 1385 ConversionStub* _stub; | |
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1386 #ifdef PPC |
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1387 LIR_Opr _tmp1; |
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1388 LIR_Opr _tmp2; |
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1389 #endif |
| 0 | 1390 |
| 1391 public: | |
| 1392 LIR_OpConvert(Bytecodes::Code code, LIR_Opr opr, LIR_Opr result, ConversionStub* stub) | |
| 1393 : LIR_Op1(lir_convert, opr, result) | |
| 1394 , _stub(stub) | |
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1395 #ifdef PPC |
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1396 , _tmp1(LIR_OprDesc::illegalOpr()) |
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1397 , _tmp2(LIR_OprDesc::illegalOpr()) |
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1398 #endif |
| 0 | 1399 , _bytecode(code) {} |
| 1400 | |
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1401 #ifdef PPC |
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1402 LIR_OpConvert(Bytecodes::Code code, LIR_Opr opr, LIR_Opr result, ConversionStub* stub |
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1403 ,LIR_Opr tmp1, LIR_Opr tmp2) |
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1404 : LIR_Op1(lir_convert, opr, result) |
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1405 , _stub(stub) |
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1406 , _tmp1(tmp1) |
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1407 , _tmp2(tmp2) |
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1408 , _bytecode(code) {} |
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1409 #endif |
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1410 |
| 0 | 1411 Bytecodes::Code bytecode() const { return _bytecode; } |
| 1412 ConversionStub* stub() const { return _stub; } | |
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1413 #ifdef PPC |
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1414 LIR_Opr tmp1() const { return _tmp1; } |
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1415 LIR_Opr tmp2() const { return _tmp2; } |
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1416 #endif |
| 0 | 1417 |
| 1418 virtual void emit_code(LIR_Assembler* masm); | |
| 1419 virtual LIR_OpConvert* as_OpConvert() { return this; } | |
| 1420 virtual void print_instr(outputStream* out) const PRODUCT_RETURN; | |
| 1421 | |
| 1422 static void print_bytecode(outputStream* out, Bytecodes::Code code) PRODUCT_RETURN; | |
| 1423 }; | |
| 1424 | |
| 1425 | |
| 1426 // LIR_OpAllocObj | |
| 1427 class LIR_OpAllocObj : public LIR_Op1 { | |
| 1428 friend class LIR_OpVisitState; | |
| 1429 | |
| 1430 private: | |
| 1431 LIR_Opr _tmp1; | |
| 1432 LIR_Opr _tmp2; | |
| 1433 LIR_Opr _tmp3; | |
| 1434 LIR_Opr _tmp4; | |
| 1435 int _hdr_size; | |
| 1436 int _obj_size; | |
| 1437 CodeStub* _stub; | |
| 1438 bool _init_check; | |
| 1439 | |
| 1440 public: | |
| 1441 LIR_OpAllocObj(LIR_Opr klass, LIR_Opr result, | |
| 1442 LIR_Opr t1, LIR_Opr t2, LIR_Opr t3, LIR_Opr t4, | |
| 1443 int hdr_size, int obj_size, bool init_check, CodeStub* stub) | |
| 1444 : LIR_Op1(lir_alloc_object, klass, result) | |
| 1445 , _tmp1(t1) | |
| 1446 , _tmp2(t2) | |
| 1447 , _tmp3(t3) | |
| 1448 , _tmp4(t4) | |
| 1449 , _hdr_size(hdr_size) | |
| 1450 , _obj_size(obj_size) | |
| 1451 , _init_check(init_check) | |
| 1452 , _stub(stub) { } | |
| 1453 | |
| 1454 LIR_Opr klass() const { return in_opr(); } | |
| 1455 LIR_Opr obj() const { return result_opr(); } | |
| 1456 LIR_Opr tmp1() const { return _tmp1; } | |
| 1457 LIR_Opr tmp2() const { return _tmp2; } | |
| 1458 LIR_Opr tmp3() const { return _tmp3; } | |
| 1459 LIR_Opr tmp4() const { return _tmp4; } | |
| 1460 int header_size() const { return _hdr_size; } | |
| 1461 int object_size() const { return _obj_size; } | |
| 1462 bool init_check() const { return _init_check; } | |
| 1463 CodeStub* stub() const { return _stub; } | |
| 1464 | |
| 1465 virtual void emit_code(LIR_Assembler* masm); | |
| 1466 virtual LIR_OpAllocObj * as_OpAllocObj () { return this; } | |
| 1467 virtual void print_instr(outputStream* out) const PRODUCT_RETURN; | |
| 1468 }; | |
| 1469 | |
| 1470 | |
| 1471 // LIR_OpRoundFP | |
| 1472 class LIR_OpRoundFP : public LIR_Op1 { | |
| 1473 friend class LIR_OpVisitState; | |
| 1474 | |
| 1475 private: | |
| 1476 LIR_Opr _tmp; | |
| 1477 | |
| 1478 public: | |
| 1479 LIR_OpRoundFP(LIR_Opr reg, LIR_Opr stack_loc_temp, LIR_Opr result) | |
| 1480 : LIR_Op1(lir_roundfp, reg, result) | |
| 1481 , _tmp(stack_loc_temp) {} | |
| 1482 | |
| 1483 LIR_Opr tmp() const { return _tmp; } | |
| 1484 virtual LIR_OpRoundFP* as_OpRoundFP() { return this; } | |
| 1485 void print_instr(outputStream* out) const PRODUCT_RETURN; | |
| 1486 }; | |
| 1487 | |
| 1488 // LIR_OpTypeCheck | |
| 1489 class LIR_OpTypeCheck: public LIR_Op { | |
| 1490 friend class LIR_OpVisitState; | |
| 1491 | |
| 1492 private: | |
| 1493 LIR_Opr _object; | |
| 1494 LIR_Opr _array; | |
| 1495 ciKlass* _klass; | |
| 1496 LIR_Opr _tmp1; | |
| 1497 LIR_Opr _tmp2; | |
| 1498 LIR_Opr _tmp3; | |
| 1499 bool _fast_check; | |
| 1500 CodeEmitInfo* _info_for_patch; | |
| 1501 CodeEmitInfo* _info_for_exception; | |
| 1502 CodeStub* _stub; | |
| 1503 ciMethod* _profiled_method; | |
| 1504 int _profiled_bci; | |
| 1783 | 1505 bool _should_profile; |
| 0 | 1506 |
| 1507 public: | |
| 1508 LIR_OpTypeCheck(LIR_Code code, LIR_Opr result, LIR_Opr object, ciKlass* klass, | |
| 1509 LIR_Opr tmp1, LIR_Opr tmp2, LIR_Opr tmp3, bool fast_check, | |
| 1783 | 1510 CodeEmitInfo* info_for_exception, CodeEmitInfo* info_for_patch, CodeStub* stub); |
| 0 | 1511 LIR_OpTypeCheck(LIR_Code code, LIR_Opr object, LIR_Opr array, |
| 1783 | 1512 LIR_Opr tmp1, LIR_Opr tmp2, LIR_Opr tmp3, CodeEmitInfo* info_for_exception); |
| 0 | 1513 |
| 1514 LIR_Opr object() const { return _object; } | |
| 1515 LIR_Opr array() const { assert(code() == lir_store_check, "not valid"); return _array; } | |
| 1516 LIR_Opr tmp1() const { return _tmp1; } | |
| 1517 LIR_Opr tmp2() const { return _tmp2; } | |
| 1518 LIR_Opr tmp3() const { return _tmp3; } | |
| 1519 ciKlass* klass() const { assert(code() == lir_instanceof || code() == lir_checkcast, "not valid"); return _klass; } | |
| 1520 bool fast_check() const { assert(code() == lir_instanceof || code() == lir_checkcast, "not valid"); return _fast_check; } | |
| 1521 CodeEmitInfo* info_for_patch() const { return _info_for_patch; } | |
| 1522 CodeEmitInfo* info_for_exception() const { return _info_for_exception; } | |
| 1523 CodeStub* stub() const { return _stub; } | |
| 1524 | |
| 1525 // methodDataOop profiling | |
| 1783 | 1526 void set_profiled_method(ciMethod *method) { _profiled_method = method; } |
| 1527 void set_profiled_bci(int bci) { _profiled_bci = bci; } | |
| 1528 void set_should_profile(bool b) { _should_profile = b; } | |
| 1529 ciMethod* profiled_method() const { return _profiled_method; } | |
| 1530 int profiled_bci() const { return _profiled_bci; } | |
| 1531 bool should_profile() const { return _should_profile; } | |
| 0 | 1532 |
| 1533 virtual void emit_code(LIR_Assembler* masm); | |
| 1534 virtual LIR_OpTypeCheck* as_OpTypeCheck() { return this; } | |
| 1535 void print_instr(outputStream* out) const PRODUCT_RETURN; | |
| 1536 }; | |
| 1537 | |
| 1538 // LIR_Op2 | |
| 1539 class LIR_Op2: public LIR_Op { | |
| 1540 friend class LIR_OpVisitState; | |
| 1541 | |
| 1542 int _fpu_stack_size; // for sin/cos implementation on Intel | |
| 1543 | |
| 1544 protected: | |
| 1545 LIR_Opr _opr1; | |
| 1546 LIR_Opr _opr2; | |
| 1547 BasicType _type; | |
| 1548 LIR_Opr _tmp; | |
| 1549 LIR_Condition _condition; | |
| 1550 | |
| 1551 void verify() const; | |
| 1552 | |
| 1553 public: | |
| 1554 LIR_Op2(LIR_Code code, LIR_Condition condition, LIR_Opr opr1, LIR_Opr opr2, CodeEmitInfo* info = NULL) | |
| 1555 : LIR_Op(code, LIR_OprFact::illegalOpr, info) | |
| 1556 , _opr1(opr1) | |
| 1557 , _opr2(opr2) | |
| 1558 , _type(T_ILLEGAL) | |
| 1559 , _condition(condition) | |
| 1560 , _fpu_stack_size(0) | |
| 1561 , _tmp(LIR_OprFact::illegalOpr) { | |
| 1562 assert(code == lir_cmp, "code check"); | |
| 1563 } | |
| 1564 | |
| 1565 LIR_Op2(LIR_Code code, LIR_Condition condition, LIR_Opr opr1, LIR_Opr opr2, LIR_Opr result) | |
| 1566 : LIR_Op(code, result, NULL) | |
| 1567 , _opr1(opr1) | |
| 1568 , _opr2(opr2) | |
| 1569 , _type(T_ILLEGAL) | |
| 1570 , _condition(condition) | |
| 1571 , _fpu_stack_size(0) | |
| 1572 , _tmp(LIR_OprFact::illegalOpr) { | |
| 1573 assert(code == lir_cmove, "code check"); | |
| 1574 } | |
| 1575 | |
| 1576 LIR_Op2(LIR_Code code, LIR_Opr opr1, LIR_Opr opr2, LIR_Opr result = LIR_OprFact::illegalOpr, | |
| 1577 CodeEmitInfo* info = NULL, BasicType type = T_ILLEGAL) | |
| 1578 : LIR_Op(code, result, info) | |
| 1579 , _opr1(opr1) | |
| 1580 , _opr2(opr2) | |
| 1581 , _type(type) | |
| 1582 , _condition(lir_cond_unknown) | |
| 1583 , _fpu_stack_size(0) | |
| 1584 , _tmp(LIR_OprFact::illegalOpr) { | |
| 1585 assert(code != lir_cmp && is_in_range(code, begin_op2, end_op2), "code check"); | |
| 1586 } | |
| 1587 | |
| 1588 LIR_Op2(LIR_Code code, LIR_Opr opr1, LIR_Opr opr2, LIR_Opr result, LIR_Opr tmp) | |
| 1589 : LIR_Op(code, result, NULL) | |
| 1590 , _opr1(opr1) | |
| 1591 , _opr2(opr2) | |
| 1592 , _type(T_ILLEGAL) | |
| 1593 , _condition(lir_cond_unknown) | |
| 1594 , _fpu_stack_size(0) | |
| 1595 , _tmp(tmp) { | |
| 1596 assert(code != lir_cmp && is_in_range(code, begin_op2, end_op2), "code check"); | |
| 1597 } | |
| 1598 | |
| 1599 LIR_Opr in_opr1() const { return _opr1; } | |
| 1600 LIR_Opr in_opr2() const { return _opr2; } | |
| 1601 BasicType type() const { return _type; } | |
| 1602 LIR_Opr tmp_opr() const { return _tmp; } | |
| 1603 LIR_Condition condition() const { | |
| 1604 assert(code() == lir_cmp || code() == lir_cmove, "only valid for cmp and cmove"); return _condition; | |
| 1605 } | |
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1606 void set_condition(LIR_Condition condition) { |
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1607 assert(code() == lir_cmp || code() == lir_cmove, "only valid for cmp and cmove"); _condition = condition; |
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1608 } |
| 0 | 1609 |
| 1610 void set_fpu_stack_size(int size) { _fpu_stack_size = size; } | |
| 1611 int fpu_stack_size() const { return _fpu_stack_size; } | |
| 1612 | |
| 1613 void set_in_opr1(LIR_Opr opr) { _opr1 = opr; } | |
| 1614 void set_in_opr2(LIR_Opr opr) { _opr2 = opr; } | |
| 1615 | |
| 1616 virtual void emit_code(LIR_Assembler* masm); | |
| 1617 virtual LIR_Op2* as_Op2() { return this; } | |
| 1618 virtual void print_instr(outputStream* out) const PRODUCT_RETURN; | |
| 1619 }; | |
| 1620 | |
| 1621 class LIR_OpAllocArray : public LIR_Op { | |
| 1622 friend class LIR_OpVisitState; | |
| 1623 | |
| 1624 private: | |
| 1625 LIR_Opr _klass; | |
| 1626 LIR_Opr _len; | |
| 1627 LIR_Opr _tmp1; | |
| 1628 LIR_Opr _tmp2; | |
| 1629 LIR_Opr _tmp3; | |
| 1630 LIR_Opr _tmp4; | |
| 1631 BasicType _type; | |
| 1632 CodeStub* _stub; | |
| 1633 | |
| 1634 public: | |
| 1635 LIR_OpAllocArray(LIR_Opr klass, LIR_Opr len, LIR_Opr result, LIR_Opr t1, LIR_Opr t2, LIR_Opr t3, LIR_Opr t4, BasicType type, CodeStub* stub) | |
| 1636 : LIR_Op(lir_alloc_array, result, NULL) | |
| 1637 , _klass(klass) | |
| 1638 , _len(len) | |
| 1639 , _tmp1(t1) | |
| 1640 , _tmp2(t2) | |
| 1641 , _tmp3(t3) | |
| 1642 , _tmp4(t4) | |
| 1643 , _type(type) | |
| 1644 , _stub(stub) {} | |
| 1645 | |
| 1646 LIR_Opr klass() const { return _klass; } | |
| 1647 LIR_Opr len() const { return _len; } | |
| 1648 LIR_Opr obj() const { return result_opr(); } | |
| 1649 LIR_Opr tmp1() const { return _tmp1; } | |
| 1650 LIR_Opr tmp2() const { return _tmp2; } | |
| 1651 LIR_Opr tmp3() const { return _tmp3; } | |
| 1652 LIR_Opr tmp4() const { return _tmp4; } | |
| 1653 BasicType type() const { return _type; } | |
| 1654 CodeStub* stub() const { return _stub; } | |
| 1655 | |
| 1656 virtual void emit_code(LIR_Assembler* masm); | |
| 1657 virtual LIR_OpAllocArray * as_OpAllocArray () { return this; } | |
| 1658 virtual void print_instr(outputStream* out) const PRODUCT_RETURN; | |
| 1659 }; | |
| 1660 | |
| 1661 | |
| 1662 class LIR_Op3: public LIR_Op { | |
| 1663 friend class LIR_OpVisitState; | |
| 1664 | |
| 1665 private: | |
| 1666 LIR_Opr _opr1; | |
| 1667 LIR_Opr _opr2; | |
| 1668 LIR_Opr _opr3; | |
| 1669 public: | |
| 1670 LIR_Op3(LIR_Code code, LIR_Opr opr1, LIR_Opr opr2, LIR_Opr opr3, LIR_Opr result, CodeEmitInfo* info = NULL) | |
| 1671 : LIR_Op(code, result, info) | |
| 1672 , _opr1(opr1) | |
| 1673 , _opr2(opr2) | |
| 1674 , _opr3(opr3) { assert(is_in_range(code, begin_op3, end_op3), "code check"); } | |
| 1675 LIR_Opr in_opr1() const { return _opr1; } | |
| 1676 LIR_Opr in_opr2() const { return _opr2; } | |
| 1677 LIR_Opr in_opr3() const { return _opr3; } | |
| 1678 | |
| 1679 virtual void emit_code(LIR_Assembler* masm); | |
| 1680 virtual LIR_Op3* as_Op3() { return this; } | |
| 1681 virtual void print_instr(outputStream* out) const PRODUCT_RETURN; | |
| 1682 }; | |
| 1683 | |
| 1684 | |
| 1685 //-------------------------------- | |
| 1686 class LabelObj: public CompilationResourceObj { | |
| 1687 private: | |
| 1688 Label _label; | |
| 1689 public: | |
| 1690 LabelObj() {} | |
| 1691 Label* label() { return &_label; } | |
| 1692 }; | |
| 1693 | |
| 1694 | |
| 1695 class LIR_OpLock: public LIR_Op { | |
| 1696 friend class LIR_OpVisitState; | |
| 1697 | |
| 1698 private: | |
| 1699 LIR_Opr _hdr; | |
| 1700 LIR_Opr _obj; | |
| 1701 LIR_Opr _lock; | |
| 1702 LIR_Opr _scratch; | |
| 1703 CodeStub* _stub; | |
| 1704 public: | |
| 1705 LIR_OpLock(LIR_Code code, LIR_Opr hdr, LIR_Opr obj, LIR_Opr lock, LIR_Opr scratch, CodeStub* stub, CodeEmitInfo* info) | |
| 1706 : LIR_Op(code, LIR_OprFact::illegalOpr, info) | |
| 1707 , _hdr(hdr) | |
| 1708 , _obj(obj) | |
| 1709 , _lock(lock) | |
| 1710 , _scratch(scratch) | |
| 1711 , _stub(stub) {} | |
| 1712 | |
| 1713 LIR_Opr hdr_opr() const { return _hdr; } | |
| 1714 LIR_Opr obj_opr() const { return _obj; } | |
| 1715 LIR_Opr lock_opr() const { return _lock; } | |
| 1716 LIR_Opr scratch_opr() const { return _scratch; } | |
| 1717 CodeStub* stub() const { return _stub; } | |
| 1718 | |
| 1719 virtual void emit_code(LIR_Assembler* masm); | |
| 1720 virtual LIR_OpLock* as_OpLock() { return this; } | |
| 1721 void print_instr(outputStream* out) const PRODUCT_RETURN; | |
| 1722 }; | |
| 1723 | |
| 1724 | |
| 1725 class LIR_OpDelay: public LIR_Op { | |
| 1726 friend class LIR_OpVisitState; | |
| 1727 | |
| 1728 private: | |
| 1729 LIR_Op* _op; | |
| 1730 | |
| 1731 public: | |
| 1732 LIR_OpDelay(LIR_Op* op, CodeEmitInfo* info): | |
| 1733 LIR_Op(lir_delay_slot, LIR_OprFact::illegalOpr, info), | |
| 1734 _op(op) { | |
| 1735 assert(op->code() == lir_nop || LIRFillDelaySlots, "should be filling with nops"); | |
| 1736 } | |
| 1737 virtual void emit_code(LIR_Assembler* masm); | |
| 1738 virtual LIR_OpDelay* as_OpDelay() { return this; } | |
| 1739 void print_instr(outputStream* out) const PRODUCT_RETURN; | |
| 1740 LIR_Op* delay_op() const { return _op; } | |
| 1741 CodeEmitInfo* call_info() const { return info(); } | |
| 1742 }; | |
| 1743 | |
| 1744 | |
| 1745 // LIR_OpCompareAndSwap | |
| 1746 class LIR_OpCompareAndSwap : public LIR_Op { | |
| 1747 friend class LIR_OpVisitState; | |
| 1748 | |
| 1749 private: | |
| 1750 LIR_Opr _addr; | |
| 1751 LIR_Opr _cmp_value; | |
| 1752 LIR_Opr _new_value; | |
| 1753 LIR_Opr _tmp1; | |
| 1754 LIR_Opr _tmp2; | |
| 1755 | |
| 1756 public: | |
|
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1757 LIR_OpCompareAndSwap(LIR_Code code, LIR_Opr addr, LIR_Opr cmp_value, LIR_Opr new_value, |
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1758 LIR_Opr t1, LIR_Opr t2, LIR_Opr result) |
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1759 : LIR_Op(code, result, NULL) // no result, no info |
| 0 | 1760 , _addr(addr) |
| 1761 , _cmp_value(cmp_value) | |
| 1762 , _new_value(new_value) | |
| 1763 , _tmp1(t1) | |
| 1764 , _tmp2(t2) { } | |
| 1765 | |
| 1766 LIR_Opr addr() const { return _addr; } | |
| 1767 LIR_Opr cmp_value() const { return _cmp_value; } | |
| 1768 LIR_Opr new_value() const { return _new_value; } | |
| 1769 LIR_Opr tmp1() const { return _tmp1; } | |
| 1770 LIR_Opr tmp2() const { return _tmp2; } | |
| 1771 | |
| 1772 virtual void emit_code(LIR_Assembler* masm); | |
| 1773 virtual LIR_OpCompareAndSwap * as_OpCompareAndSwap () { return this; } | |
| 1774 virtual void print_instr(outputStream* out) const PRODUCT_RETURN; | |
| 1775 }; | |
| 1776 | |
| 1777 // LIR_OpProfileCall | |
| 1778 class LIR_OpProfileCall : public LIR_Op { | |
| 1779 friend class LIR_OpVisitState; | |
| 1780 | |
| 1781 private: | |
| 1782 ciMethod* _profiled_method; | |
| 1783 int _profiled_bci; | |
| 1784 LIR_Opr _mdo; | |
| 1785 LIR_Opr _recv; | |
| 1786 LIR_Opr _tmp1; | |
| 1787 ciKlass* _known_holder; | |
| 1788 | |
| 1789 public: | |
| 1790 // Destroys recv | |
| 1791 LIR_OpProfileCall(LIR_Code code, ciMethod* profiled_method, int profiled_bci, LIR_Opr mdo, LIR_Opr recv, LIR_Opr t1, ciKlass* known_holder) | |
| 1792 : LIR_Op(code, LIR_OprFact::illegalOpr, NULL) // no result, no info | |
| 1793 , _profiled_method(profiled_method) | |
| 1794 , _profiled_bci(profiled_bci) | |
| 1795 , _mdo(mdo) | |
| 1796 , _recv(recv) | |
| 1797 , _tmp1(t1) | |
| 1798 , _known_holder(known_holder) { } | |
| 1799 | |
| 1800 ciMethod* profiled_method() const { return _profiled_method; } | |
| 1801 int profiled_bci() const { return _profiled_bci; } | |
| 1802 LIR_Opr mdo() const { return _mdo; } | |
| 1803 LIR_Opr recv() const { return _recv; } | |
| 1804 LIR_Opr tmp1() const { return _tmp1; } | |
| 1805 ciKlass* known_holder() const { return _known_holder; } | |
| 1806 | |
| 1807 virtual void emit_code(LIR_Assembler* masm); | |
| 1808 virtual LIR_OpProfileCall* as_OpProfileCall() { return this; } | |
| 1809 virtual void print_instr(outputStream* out) const PRODUCT_RETURN; | |
| 1810 }; | |
| 1811 | |
| 1812 class LIR_InsertionBuffer; | |
| 1813 | |
| 1814 //--------------------------------LIR_List--------------------------------------------------- | |
| 1815 // Maintains a list of LIR instructions (one instance of LIR_List per basic block) | |
| 1816 // The LIR instructions are appended by the LIR_List class itself; | |
| 1817 // | |
| 1818 // Notes: | |
| 1819 // - all offsets are(should be) in bytes | |
| 1820 // - local positions are specified with an offset, with offset 0 being local 0 | |
| 1821 | |
| 1822 class LIR_List: public CompilationResourceObj { | |
| 1823 private: | |
| 1824 LIR_OpList _operations; | |
| 1825 | |
| 1826 Compilation* _compilation; | |
| 1827 #ifndef PRODUCT | |
| 1828 BlockBegin* _block; | |
| 1829 #endif | |
| 1830 #ifdef ASSERT | |
| 1831 const char * _file; | |
| 1832 int _line; | |
| 1833 #endif | |
| 1834 | |
| 1835 void append(LIR_Op* op) { | |
| 1836 if (op->source() == NULL) | |
| 1837 op->set_source(_compilation->current_instruction()); | |
| 1838 #ifndef PRODUCT | |
| 1839 if (PrintIRWithLIR) { | |
| 1840 _compilation->maybe_print_current_instruction(); | |
| 1841 op->print(); tty->cr(); | |
| 1842 } | |
| 1843 #endif // PRODUCT | |
| 1844 | |
| 1845 _operations.append(op); | |
| 1846 | |
| 1847 #ifdef ASSERT | |
| 1848 op->verify(); | |
| 1849 op->set_file_and_line(_file, _line); | |
| 1850 _file = NULL; | |
| 1851 _line = 0; | |
| 1852 #endif | |
| 1853 } | |
| 1854 | |
| 1855 public: | |
| 1856 LIR_List(Compilation* compilation, BlockBegin* block = NULL); | |
| 1857 | |
| 1858 #ifdef ASSERT | |
| 1859 void set_file_and_line(const char * file, int line); | |
| 1860 #endif | |
| 1861 | |
| 1862 //---------- accessors --------------- | |
| 1863 LIR_OpList* instructions_list() { return &_operations; } | |
| 1864 int length() const { return _operations.length(); } | |
| 1865 LIR_Op* at(int i) const { return _operations.at(i); } | |
| 1866 | |
| 1867 NOT_PRODUCT(BlockBegin* block() const { return _block; }); | |
| 1868 | |
| 1869 // insert LIR_Ops in buffer to right places in LIR_List | |
| 1870 void append(LIR_InsertionBuffer* buffer); | |
| 1871 | |
| 1872 //---------- mutators --------------- | |
| 1873 void insert_before(int i, LIR_List* op_list) { _operations.insert_before(i, op_list->instructions_list()); } | |
| 1874 void insert_before(int i, LIR_Op* op) { _operations.insert_before(i, op); } | |
| 1783 | 1875 void remove_at(int i) { _operations.remove_at(i); } |
| 0 | 1876 |
| 1877 //---------- printing ------------- | |
| 1878 void print_instructions() PRODUCT_RETURN; | |
| 1879 | |
| 1880 | |
| 1881 //---------- instructions ------------- | |
| 1882 void call_opt_virtual(ciMethod* method, LIR_Opr receiver, LIR_Opr result, | |
| 1883 address dest, LIR_OprList* arguments, | |
| 1884 CodeEmitInfo* info) { | |
| 1885 append(new LIR_OpJavaCall(lir_optvirtual_call, method, receiver, result, dest, arguments, info)); | |
| 1886 } | |
| 1887 void call_static(ciMethod* method, LIR_Opr result, | |
| 1888 address dest, LIR_OprList* arguments, CodeEmitInfo* info) { | |
| 1889 append(new LIR_OpJavaCall(lir_static_call, method, LIR_OprFact::illegalOpr, result, dest, arguments, info)); | |
| 1890 } | |
| 1891 void call_icvirtual(ciMethod* method, LIR_Opr receiver, LIR_Opr result, | |
| 1892 address dest, LIR_OprList* arguments, CodeEmitInfo* info) { | |
| 1893 append(new LIR_OpJavaCall(lir_icvirtual_call, method, receiver, result, dest, arguments, info)); | |
| 1894 } | |
| 1895 void call_virtual(ciMethod* method, LIR_Opr receiver, LIR_Opr result, | |
| 1896 intptr_t vtable_offset, LIR_OprList* arguments, CodeEmitInfo* info) { | |
| 1897 append(new LIR_OpJavaCall(lir_virtual_call, method, receiver, result, vtable_offset, arguments, info)); | |
| 1898 } | |
| 1295 | 1899 void call_dynamic(ciMethod* method, LIR_Opr receiver, LIR_Opr result, |
| 1900 address dest, LIR_OprList* arguments, CodeEmitInfo* info) { | |
| 1901 append(new LIR_OpJavaCall(lir_dynamic_call, method, receiver, result, dest, arguments, info)); | |
| 1902 } | |
| 0 | 1903 |
| 1904 void get_thread(LIR_Opr result) { append(new LIR_Op0(lir_get_thread, result)); } | |
| 1905 void word_align() { append(new LIR_Op0(lir_word_align)); } | |
| 1906 void membar() { append(new LIR_Op0(lir_membar)); } | |
| 1907 void membar_acquire() { append(new LIR_Op0(lir_membar_acquire)); } | |
| 1908 void membar_release() { append(new LIR_Op0(lir_membar_release)); } | |
| 1909 | |
| 1910 void nop() { append(new LIR_Op0(lir_nop)); } | |
| 1911 void build_frame() { append(new LIR_Op0(lir_build_frame)); } | |
| 1912 | |
| 1913 void std_entry(LIR_Opr receiver) { append(new LIR_Op0(lir_std_entry, receiver)); } | |
| 1914 void osr_entry(LIR_Opr osrPointer) { append(new LIR_Op0(lir_osr_entry, osrPointer)); } | |
| 1915 | |
| 1916 void branch_destination(Label* lbl) { append(new LIR_OpLabel(lbl)); } | |
| 1917 | |
| 1918 void negate(LIR_Opr from, LIR_Opr to) { append(new LIR_Op1(lir_neg, from, to)); } | |
| 1919 void leal(LIR_Opr from, LIR_Opr result_reg) { append(new LIR_Op1(lir_leal, from, result_reg)); } | |
| 1920 | |
| 1921 // result is a stack location for old backend and vreg for UseLinearScan | |
| 1922 // stack_loc_temp is an illegal register for old backend | |
| 1923 void roundfp(LIR_Opr reg, LIR_Opr stack_loc_temp, LIR_Opr result) { append(new LIR_OpRoundFP(reg, stack_loc_temp, result)); } | |
| 1924 void unaligned_move(LIR_Address* src, LIR_Opr dst) { append(new LIR_Op1(lir_move, LIR_OprFact::address(src), dst, dst->type(), lir_patch_none, NULL, lir_move_unaligned)); } | |
| 1925 void unaligned_move(LIR_Opr src, LIR_Address* dst) { append(new LIR_Op1(lir_move, src, LIR_OprFact::address(dst), src->type(), lir_patch_none, NULL, lir_move_unaligned)); } | |
| 1926 void unaligned_move(LIR_Opr src, LIR_Opr dst) { append(new LIR_Op1(lir_move, src, dst, dst->type(), lir_patch_none, NULL, lir_move_unaligned)); } | |
| 1927 void move(LIR_Opr src, LIR_Opr dst, CodeEmitInfo* info = NULL) { append(new LIR_Op1(lir_move, src, dst, dst->type(), lir_patch_none, info)); } | |
| 1928 void move(LIR_Address* src, LIR_Opr dst, CodeEmitInfo* info = NULL) { append(new LIR_Op1(lir_move, LIR_OprFact::address(src), dst, src->type(), lir_patch_none, info)); } | |
| 1929 void move(LIR_Opr src, LIR_Address* dst, CodeEmitInfo* info = NULL) { append(new LIR_Op1(lir_move, src, LIR_OprFact::address(dst), dst->type(), lir_patch_none, info)); } | |
| 1930 | |
| 1931 void volatile_move(LIR_Opr src, LIR_Opr dst, BasicType type, CodeEmitInfo* info = NULL, LIR_PatchCode patch_code = lir_patch_none) { append(new LIR_Op1(lir_move, src, dst, type, patch_code, info, lir_move_volatile)); } | |
| 1932 | |
| 1933 void oop2reg (jobject o, LIR_Opr reg) { append(new LIR_Op1(lir_move, LIR_OprFact::oopConst(o), reg)); } | |
| 1934 void oop2reg_patch(jobject o, LIR_Opr reg, CodeEmitInfo* info); | |
| 1935 | |
| 1936 void return_op(LIR_Opr result) { append(new LIR_Op1(lir_return, result)); } | |
| 1937 | |
| 1938 void safepoint(LIR_Opr tmp, CodeEmitInfo* info) { append(new LIR_Op1(lir_safepoint, tmp, info)); } | |
| 1939 | |
|
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1940 #ifdef PPC |
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1941 void convert(Bytecodes::Code code, LIR_Opr left, LIR_Opr dst, LIR_Opr tmp1, LIR_Opr tmp2) { append(new LIR_OpConvert(code, left, dst, NULL, tmp1, tmp2)); } |
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1942 #endif |
| 0 | 1943 void convert(Bytecodes::Code code, LIR_Opr left, LIR_Opr dst, ConversionStub* stub = NULL/*, bool is_32bit = false*/) { append(new LIR_OpConvert(code, left, dst, stub)); } |
| 1944 | |
| 1945 void logical_and (LIR_Opr left, LIR_Opr right, LIR_Opr dst) { append(new LIR_Op2(lir_logic_and, left, right, dst)); } | |
| 1946 void logical_or (LIR_Opr left, LIR_Opr right, LIR_Opr dst) { append(new LIR_Op2(lir_logic_or, left, right, dst)); } | |
| 1947 void logical_xor (LIR_Opr left, LIR_Opr right, LIR_Opr dst) { append(new LIR_Op2(lir_logic_xor, left, right, dst)); } | |
| 1948 | |
| 1783 | 1949 void pack64(LIR_Opr src, LIR_Opr dst) { append(new LIR_Op1(lir_pack64, src, dst, T_LONG, lir_patch_none, NULL)); } |
| 1950 void unpack64(LIR_Opr src, LIR_Opr dst) { append(new LIR_Op1(lir_unpack64, src, dst, T_LONG, lir_patch_none, NULL)); } | |
| 1951 | |
| 0 | 1952 void null_check(LIR_Opr opr, CodeEmitInfo* info) { append(new LIR_Op1(lir_null_check, opr, info)); } |
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1953 void throw_exception(LIR_Opr exceptionPC, LIR_Opr exceptionOop, CodeEmitInfo* info) { |
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1954 append(new LIR_Op2(lir_throw, exceptionPC, exceptionOop, LIR_OprFact::illegalOpr, info)); |
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1955 } |
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1956 void unwind_exception(LIR_Opr exceptionOop) { |
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1957 append(new LIR_Op1(lir_unwind, exceptionOop)); |
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1958 } |
| 0 | 1959 |
| 1960 void compare_to (LIR_Opr left, LIR_Opr right, LIR_Opr dst) { | |
| 1961 append(new LIR_Op2(lir_compare_to, left, right, dst)); | |
| 1962 } | |
| 1963 | |
| 1964 void push(LIR_Opr opr) { append(new LIR_Op1(lir_push, opr)); } | |
| 1965 void pop(LIR_Opr reg) { append(new LIR_Op1(lir_pop, reg)); } | |
| 1966 | |
| 1967 void cmp(LIR_Condition condition, LIR_Opr left, LIR_Opr right, CodeEmitInfo* info = NULL) { | |
| 1968 append(new LIR_Op2(lir_cmp, condition, left, right, info)); | |
| 1969 } | |
| 1970 void cmp(LIR_Condition condition, LIR_Opr left, int right, CodeEmitInfo* info = NULL) { | |
| 1971 cmp(condition, left, LIR_OprFact::intConst(right), info); | |
| 1972 } | |
| 1973 | |
| 1974 void cmp_mem_int(LIR_Condition condition, LIR_Opr base, int disp, int c, CodeEmitInfo* info); | |
| 1975 void cmp_reg_mem(LIR_Condition condition, LIR_Opr reg, LIR_Address* addr, CodeEmitInfo* info); | |
| 1976 | |
| 1977 void cmove(LIR_Condition condition, LIR_Opr src1, LIR_Opr src2, LIR_Opr dst) { | |
| 1978 append(new LIR_Op2(lir_cmove, condition, src1, src2, dst)); | |
| 1979 } | |
| 1980 | |
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1981 void cas_long(LIR_Opr addr, LIR_Opr cmp_value, LIR_Opr new_value, |
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1982 LIR_Opr t1, LIR_Opr t2, LIR_Opr result = LIR_OprFact::illegalOpr); |
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1983 void cas_obj(LIR_Opr addr, LIR_Opr cmp_value, LIR_Opr new_value, |
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1984 LIR_Opr t1, LIR_Opr t2, LIR_Opr result = LIR_OprFact::illegalOpr); |
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1985 void cas_int(LIR_Opr addr, LIR_Opr cmp_value, LIR_Opr new_value, |
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1986 LIR_Opr t1, LIR_Opr t2, LIR_Opr result = LIR_OprFact::illegalOpr); |
| 0 | 1987 |
| 1988 void abs (LIR_Opr from, LIR_Opr to, LIR_Opr tmp) { append(new LIR_Op2(lir_abs , from, tmp, to)); } | |
| 1989 void sqrt(LIR_Opr from, LIR_Opr to, LIR_Opr tmp) { append(new LIR_Op2(lir_sqrt, from, tmp, to)); } | |
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1990 void log (LIR_Opr from, LIR_Opr to, LIR_Opr tmp) { append(new LIR_Op2(lir_log, from, LIR_OprFact::illegalOpr, to, tmp)); } |
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1991 void log10 (LIR_Opr from, LIR_Opr to, LIR_Opr tmp) { append(new LIR_Op2(lir_log10, from, LIR_OprFact::illegalOpr, to, tmp)); } |
| 0 | 1992 void sin (LIR_Opr from, LIR_Opr to, LIR_Opr tmp1, LIR_Opr tmp2) { append(new LIR_Op2(lir_sin , from, tmp1, to, tmp2)); } |
| 1993 void cos (LIR_Opr from, LIR_Opr to, LIR_Opr tmp1, LIR_Opr tmp2) { append(new LIR_Op2(lir_cos , from, tmp1, to, tmp2)); } | |
| 1994 void tan (LIR_Opr from, LIR_Opr to, LIR_Opr tmp1, LIR_Opr tmp2) { append(new LIR_Op2(lir_tan , from, tmp1, to, tmp2)); } | |
| 1995 | |
| 1996 void add (LIR_Opr left, LIR_Opr right, LIR_Opr res) { append(new LIR_Op2(lir_add, left, right, res)); } | |
| 1997 void sub (LIR_Opr left, LIR_Opr right, LIR_Opr res, CodeEmitInfo* info = NULL) { append(new LIR_Op2(lir_sub, left, right, res, info)); } | |
| 1998 void mul (LIR_Opr left, LIR_Opr right, LIR_Opr res) { append(new LIR_Op2(lir_mul, left, right, res)); } | |
| 1999 void mul_strictfp (LIR_Opr left, LIR_Opr right, LIR_Opr res, LIR_Opr tmp) { append(new LIR_Op2(lir_mul_strictfp, left, right, res, tmp)); } | |
| 2000 void div (LIR_Opr left, LIR_Opr right, LIR_Opr res, CodeEmitInfo* info = NULL) { append(new LIR_Op2(lir_div, left, right, res, info)); } | |
| 2001 void div_strictfp (LIR_Opr left, LIR_Opr right, LIR_Opr res, LIR_Opr tmp) { append(new LIR_Op2(lir_div_strictfp, left, right, res, tmp)); } | |
| 2002 void rem (LIR_Opr left, LIR_Opr right, LIR_Opr res, CodeEmitInfo* info = NULL) { append(new LIR_Op2(lir_rem, left, right, res, info)); } | |
| 2003 | |
| 2004 void volatile_load_mem_reg(LIR_Address* address, LIR_Opr dst, CodeEmitInfo* info, LIR_PatchCode patch_code = lir_patch_none); | |
| 2005 void volatile_load_unsafe_reg(LIR_Opr base, LIR_Opr offset, LIR_Opr dst, BasicType type, CodeEmitInfo* info, LIR_PatchCode patch_code); | |
| 2006 | |
| 2007 void load(LIR_Address* addr, LIR_Opr src, CodeEmitInfo* info = NULL, LIR_PatchCode patch_code = lir_patch_none); | |
| 2008 | |
| 2009 void prefetch(LIR_Address* addr, bool is_store); | |
| 2010 | |
| 2011 void store_mem_int(jint v, LIR_Opr base, int offset_in_bytes, BasicType type, CodeEmitInfo* info, LIR_PatchCode patch_code = lir_patch_none); | |
| 2012 void store_mem_oop(jobject o, LIR_Opr base, int offset_in_bytes, BasicType type, CodeEmitInfo* info, LIR_PatchCode patch_code = lir_patch_none); | |
| 2013 void store(LIR_Opr src, LIR_Address* addr, CodeEmitInfo* info = NULL, LIR_PatchCode patch_code = lir_patch_none); | |
| 2014 void volatile_store_mem_reg(LIR_Opr src, LIR_Address* address, CodeEmitInfo* info, LIR_PatchCode patch_code = lir_patch_none); | |
| 2015 void volatile_store_unsafe_reg(LIR_Opr src, LIR_Opr base, LIR_Opr offset, BasicType type, CodeEmitInfo* info, LIR_PatchCode patch_code); | |
| 2016 | |
| 2017 void idiv(LIR_Opr left, LIR_Opr right, LIR_Opr res, LIR_Opr tmp, CodeEmitInfo* info); | |
| 2018 void idiv(LIR_Opr left, int right, LIR_Opr res, LIR_Opr tmp, CodeEmitInfo* info); | |
| 2019 void irem(LIR_Opr left, LIR_Opr right, LIR_Opr res, LIR_Opr tmp, CodeEmitInfo* info); | |
| 2020 void irem(LIR_Opr left, int right, LIR_Opr res, LIR_Opr tmp, CodeEmitInfo* info); | |
| 2021 | |
| 2022 void allocate_object(LIR_Opr dst, LIR_Opr t1, LIR_Opr t2, LIR_Opr t3, LIR_Opr t4, int header_size, int object_size, LIR_Opr klass, bool init_check, CodeStub* stub); | |
| 2023 void allocate_array(LIR_Opr dst, LIR_Opr len, LIR_Opr t1,LIR_Opr t2, LIR_Opr t3,LIR_Opr t4, BasicType type, LIR_Opr klass, CodeStub* stub); | |
| 2024 | |
| 2025 // jump is an unconditional branch | |
| 2026 void jump(BlockBegin* block) { | |
| 2027 append(new LIR_OpBranch(lir_cond_always, T_ILLEGAL, block)); | |
| 2028 } | |
| 2029 void jump(CodeStub* stub) { | |
| 2030 append(new LIR_OpBranch(lir_cond_always, T_ILLEGAL, stub)); | |
| 2031 } | |
| 2032 void branch(LIR_Condition cond, Label* lbl) { append(new LIR_OpBranch(cond, lbl)); } | |
| 2033 void branch(LIR_Condition cond, BasicType type, BlockBegin* block) { | |
| 2034 assert(type != T_FLOAT && type != T_DOUBLE, "no fp comparisons"); | |
| 2035 append(new LIR_OpBranch(cond, type, block)); | |
| 2036 } | |
| 2037 void branch(LIR_Condition cond, BasicType type, CodeStub* stub) { | |
| 2038 assert(type != T_FLOAT && type != T_DOUBLE, "no fp comparisons"); | |
| 2039 append(new LIR_OpBranch(cond, type, stub)); | |
| 2040 } | |
| 2041 void branch(LIR_Condition cond, BasicType type, BlockBegin* block, BlockBegin* unordered) { | |
| 2042 assert(type == T_FLOAT || type == T_DOUBLE, "fp comparisons only"); | |
| 2043 append(new LIR_OpBranch(cond, type, block, unordered)); | |
| 2044 } | |
| 2045 | |
| 2046 void shift_left(LIR_Opr value, LIR_Opr count, LIR_Opr dst, LIR_Opr tmp); | |
| 2047 void shift_right(LIR_Opr value, LIR_Opr count, LIR_Opr dst, LIR_Opr tmp); | |
| 2048 void unsigned_shift_right(LIR_Opr value, LIR_Opr count, LIR_Opr dst, LIR_Opr tmp); | |
| 2049 | |
| 2050 void shift_left(LIR_Opr value, int count, LIR_Opr dst) { shift_left(value, LIR_OprFact::intConst(count), dst, LIR_OprFact::illegalOpr); } | |
| 2051 void shift_right(LIR_Opr value, int count, LIR_Opr dst) { shift_right(value, LIR_OprFact::intConst(count), dst, LIR_OprFact::illegalOpr); } | |
| 2052 void unsigned_shift_right(LIR_Opr value, int count, LIR_Opr dst) { unsigned_shift_right(value, LIR_OprFact::intConst(count), dst, LIR_OprFact::illegalOpr); } | |
| 2053 | |
| 2054 void lcmp2int(LIR_Opr left, LIR_Opr right, LIR_Opr dst) { append(new LIR_Op2(lir_cmp_l2i, left, right, dst)); } | |
| 2055 void fcmp2int(LIR_Opr left, LIR_Opr right, LIR_Opr dst, bool is_unordered_less); | |
| 2056 | |
| 2057 void call_runtime_leaf(address routine, LIR_Opr tmp, LIR_Opr result, LIR_OprList* arguments) { | |
| 2058 append(new LIR_OpRTCall(routine, tmp, result, arguments)); | |
| 2059 } | |
| 2060 | |
| 2061 void call_runtime(address routine, LIR_Opr tmp, LIR_Opr result, | |
| 2062 LIR_OprList* arguments, CodeEmitInfo* info) { | |
| 2063 append(new LIR_OpRTCall(routine, tmp, result, arguments, info)); | |
| 2064 } | |
| 2065 | |
| 2066 void load_stack_address_monitor(int monitor_ix, LIR_Opr dst) { append(new LIR_Op1(lir_monaddr, LIR_OprFact::intConst(monitor_ix), dst)); } | |
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2067 void unlock_object(LIR_Opr hdr, LIR_Opr obj, LIR_Opr lock, LIR_Opr scratch, CodeStub* stub); |
| 0 | 2068 void lock_object(LIR_Opr hdr, LIR_Opr obj, LIR_Opr lock, LIR_Opr scratch, CodeStub* stub, CodeEmitInfo* info); |
| 2069 | |
| 2070 void set_24bit_fpu() { append(new LIR_Op0(lir_24bit_FPU )); } | |
| 2071 void restore_fpu() { append(new LIR_Op0(lir_reset_FPU )); } | |
| 2072 void breakpoint() { append(new LIR_Op0(lir_breakpoint)); } | |
| 2073 | |
| 2074 void arraycopy(LIR_Opr src, LIR_Opr src_pos, LIR_Opr dst, LIR_Opr dst_pos, LIR_Opr length, LIR_Opr tmp, ciArrayKlass* expected_type, int flags, CodeEmitInfo* info) { append(new LIR_OpArrayCopy(src, src_pos, dst, dst_pos, length, tmp, expected_type, flags, info)); } | |
| 2075 | |
| 2076 void fpop_raw() { append(new LIR_Op0(lir_fpop_raw)); } | |
| 2077 | |
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2078 void instanceof(LIR_Opr result, LIR_Opr object, ciKlass* klass, LIR_Opr tmp1, LIR_Opr tmp2, LIR_Opr tmp3, bool fast_check, CodeEmitInfo* info_for_patch, ciMethod* profiled_method, int profiled_bci); |
| 1783 | 2079 void store_check(LIR_Opr object, LIR_Opr array, LIR_Opr tmp1, LIR_Opr tmp2, LIR_Opr tmp3, CodeEmitInfo* info_for_exception); |
| 2080 | |
| 0 | 2081 void checkcast (LIR_Opr result, LIR_Opr object, ciKlass* klass, |
| 2082 LIR_Opr tmp1, LIR_Opr tmp2, LIR_Opr tmp3, bool fast_check, | |
| 2083 CodeEmitInfo* info_for_exception, CodeEmitInfo* info_for_patch, CodeStub* stub, | |
| 2084 ciMethod* profiled_method, int profiled_bci); | |
| 2085 // methodDataOop profiling | |
| 1783 | 2086 void profile_call(ciMethod* method, int bci, LIR_Opr mdo, LIR_Opr recv, LIR_Opr t1, ciKlass* cha_klass) { |
| 2087 append(new LIR_OpProfileCall(lir_profile_call, method, bci, mdo, recv, t1, cha_klass)); | |
| 2088 } | |
| 0 | 2089 }; |
| 2090 | |
| 2091 void print_LIR(BlockList* blocks); | |
| 2092 | |
| 2093 class LIR_InsertionBuffer : public CompilationResourceObj { | |
| 2094 private: | |
| 2095 LIR_List* _lir; // the lir list where ops of this buffer should be inserted later (NULL when uninitialized) | |
| 2096 | |
| 2097 // list of insertion points. index and count are stored alternately: | |
| 2098 // _index_and_count[i * 2]: the index into lir list where "count" ops should be inserted | |
| 2099 // _index_and_count[i * 2 + 1]: the number of ops to be inserted at index | |
| 2100 intStack _index_and_count; | |
| 2101 | |
| 2102 // the LIR_Ops to be inserted | |
| 2103 LIR_OpList _ops; | |
| 2104 | |
| 2105 void append_new(int index, int count) { _index_and_count.append(index); _index_and_count.append(count); } | |
| 2106 void set_index_at(int i, int value) { _index_and_count.at_put((i << 1), value); } | |
| 2107 void set_count_at(int i, int value) { _index_and_count.at_put((i << 1) + 1, value); } | |
| 2108 | |
| 2109 #ifdef ASSERT | |
| 2110 void verify(); | |
| 2111 #endif | |
| 2112 public: | |
| 2113 LIR_InsertionBuffer() : _lir(NULL), _index_and_count(8), _ops(8) { } | |
| 2114 | |
| 2115 // must be called before using the insertion buffer | |
| 2116 void init(LIR_List* lir) { assert(!initialized(), "already initialized"); _lir = lir; _index_and_count.clear(); _ops.clear(); } | |
| 2117 bool initialized() const { return _lir != NULL; } | |
| 2118 // called automatically when the buffer is appended to the LIR_List | |
| 2119 void finish() { _lir = NULL; } | |
| 2120 | |
| 2121 // accessors | |
| 2122 LIR_List* lir_list() const { return _lir; } | |
| 2123 int number_of_insertion_points() const { return _index_and_count.length() >> 1; } | |
| 2124 int index_at(int i) const { return _index_and_count.at((i << 1)); } | |
| 2125 int count_at(int i) const { return _index_and_count.at((i << 1) + 1); } | |
| 2126 | |
| 2127 int number_of_ops() const { return _ops.length(); } | |
| 2128 LIR_Op* op_at(int i) const { return _ops.at(i); } | |
| 2129 | |
| 2130 // append an instruction to the buffer | |
| 2131 void append(int index, LIR_Op* op); | |
| 2132 | |
| 2133 // instruction | |
| 2134 void move(int index, LIR_Opr src, LIR_Opr dst, CodeEmitInfo* info = NULL) { append(index, new LIR_Op1(lir_move, src, dst, dst->type(), lir_patch_none, info)); } | |
| 2135 }; | |
| 2136 | |
| 2137 | |
| 2138 // | |
| 2139 // LIR_OpVisitState is used for manipulating LIR_Ops in an abstract way. | |
| 2140 // Calling a LIR_Op's visit function with a LIR_OpVisitState causes | |
| 2141 // information about the input, output and temporaries used by the | |
| 2142 // op to be recorded. It also records whether the op has call semantics | |
| 2143 // and also records all the CodeEmitInfos used by this op. | |
| 2144 // | |
| 2145 | |
| 2146 | |
| 2147 class LIR_OpVisitState: public StackObj { | |
| 2148 public: | |
| 2149 typedef enum { inputMode, firstMode = inputMode, tempMode, outputMode, numModes, invalidMode = -1 } OprMode; | |
| 2150 | |
| 2151 enum { | |
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2152 maxNumberOfOperands = 16, |
| 0 | 2153 maxNumberOfInfos = 4 |
| 2154 }; | |
| 2155 | |
| 2156 private: | |
| 2157 LIR_Op* _op; | |
| 2158 | |
| 2159 // optimization: the operands and infos are not stored in a variable-length | |
| 2160 // list, but in a fixed-size array to save time of size checks and resizing | |
| 2161 int _oprs_len[numModes]; | |
| 2162 LIR_Opr* _oprs_new[numModes][maxNumberOfOperands]; | |
| 2163 int _info_len; | |
| 2164 CodeEmitInfo* _info_new[maxNumberOfInfos]; | |
| 2165 | |
| 2166 bool _has_call; | |
| 2167 bool _has_slow_case; | |
| 2168 | |
| 2169 | |
| 2170 // only include register operands | |
| 2171 // addresses are decomposed to the base and index registers | |
| 2172 // constants and stack operands are ignored | |
| 2173 void append(LIR_Opr& opr, OprMode mode) { | |
| 2174 assert(opr->is_valid(), "should not call this otherwise"); | |
| 2175 assert(mode >= 0 && mode < numModes, "bad mode"); | |
| 2176 | |
| 2177 if (opr->is_register()) { | |
| 2178 assert(_oprs_len[mode] < maxNumberOfOperands, "array overflow"); | |
| 2179 _oprs_new[mode][_oprs_len[mode]++] = &opr; | |
| 2180 | |
| 2181 } else if (opr->is_pointer()) { | |
| 2182 LIR_Address* address = opr->as_address_ptr(); | |
| 2183 if (address != NULL) { | |
| 2184 // special handling for addresses: add base and index register of the address | |
| 2185 // both are always input operands! | |
| 2186 if (address->_base->is_valid()) { | |
| 2187 assert(address->_base->is_register(), "must be"); | |
| 2188 assert(_oprs_len[inputMode] < maxNumberOfOperands, "array overflow"); | |
| 2189 _oprs_new[inputMode][_oprs_len[inputMode]++] = &address->_base; | |
| 2190 } | |
| 2191 if (address->_index->is_valid()) { | |
| 2192 assert(address->_index->is_register(), "must be"); | |
| 2193 assert(_oprs_len[inputMode] < maxNumberOfOperands, "array overflow"); | |
| 2194 _oprs_new[inputMode][_oprs_len[inputMode]++] = &address->_index; | |
| 2195 } | |
| 2196 | |
| 2197 } else { | |
| 2198 assert(opr->is_constant(), "constant operands are not processed"); | |
| 2199 } | |
| 2200 } else { | |
| 2201 assert(opr->is_stack(), "stack operands are not processed"); | |
| 2202 } | |
| 2203 } | |
| 2204 | |
| 2205 void append(CodeEmitInfo* info) { | |
| 2206 assert(info != NULL, "should not call this otherwise"); | |
| 2207 assert(_info_len < maxNumberOfInfos, "array overflow"); | |
| 2208 _info_new[_info_len++] = info; | |
| 2209 } | |
| 2210 | |
| 2211 public: | |
| 2212 LIR_OpVisitState() { reset(); } | |
| 2213 | |
| 2214 LIR_Op* op() const { return _op; } | |
| 2215 void set_op(LIR_Op* op) { reset(); _op = op; } | |
| 2216 | |
| 2217 bool has_call() const { return _has_call; } | |
| 2218 bool has_slow_case() const { return _has_slow_case; } | |
| 2219 | |
| 2220 void reset() { | |
| 2221 _op = NULL; | |
| 2222 _has_call = false; | |
| 2223 _has_slow_case = false; | |
| 2224 | |
| 2225 _oprs_len[inputMode] = 0; | |
| 2226 _oprs_len[tempMode] = 0; | |
| 2227 _oprs_len[outputMode] = 0; | |
| 2228 _info_len = 0; | |
| 2229 } | |
| 2230 | |
| 2231 | |
| 2232 int opr_count(OprMode mode) const { | |
| 2233 assert(mode >= 0 && mode < numModes, "bad mode"); | |
| 2234 return _oprs_len[mode]; | |
| 2235 } | |
| 2236 | |
| 2237 LIR_Opr opr_at(OprMode mode, int index) const { | |
| 2238 assert(mode >= 0 && mode < numModes, "bad mode"); | |
| 2239 assert(index >= 0 && index < _oprs_len[mode], "index out of bound"); | |
| 2240 return *_oprs_new[mode][index]; | |
| 2241 } | |
| 2242 | |
| 2243 void set_opr_at(OprMode mode, int index, LIR_Opr opr) const { | |
| 2244 assert(mode >= 0 && mode < numModes, "bad mode"); | |
| 2245 assert(index >= 0 && index < _oprs_len[mode], "index out of bound"); | |
| 2246 *_oprs_new[mode][index] = opr; | |
| 2247 } | |
| 2248 | |
| 2249 int info_count() const { | |
| 2250 return _info_len; | |
| 2251 } | |
| 2252 | |
| 2253 CodeEmitInfo* info_at(int index) const { | |
| 2254 assert(index < _info_len, "index out of bounds"); | |
| 2255 return _info_new[index]; | |
| 2256 } | |
| 2257 | |
| 2258 XHandlers* all_xhandler(); | |
| 2259 | |
| 2260 // collects all register operands of the instruction | |
| 2261 void visit(LIR_Op* op); | |
| 2262 | |
| 2263 #if ASSERT | |
| 2264 // check that an operation has no operands | |
| 2265 bool no_operands(LIR_Op* op); | |
| 2266 #endif | |
| 2267 | |
| 2268 // LIR_Op visitor functions use these to fill in the state | |
| 2269 void do_input(LIR_Opr& opr) { append(opr, LIR_OpVisitState::inputMode); } | |
| 2270 void do_output(LIR_Opr& opr) { append(opr, LIR_OpVisitState::outputMode); } | |
| 2271 void do_temp(LIR_Opr& opr) { append(opr, LIR_OpVisitState::tempMode); } | |
| 2272 void do_info(CodeEmitInfo* info) { append(info); } | |
| 2273 | |
| 2274 void do_stub(CodeStub* stub); | |
| 2275 void do_call() { _has_call = true; } | |
| 2276 void do_slow_case() { _has_slow_case = true; } | |
| 2277 void do_slow_case(CodeEmitInfo* info) { | |
| 2278 _has_slow_case = true; | |
| 2279 append(info); | |
| 2280 } | |
| 2281 }; | |
| 2282 | |
| 2283 | |
| 2284 inline LIR_Opr LIR_OprDesc::illegalOpr() { return LIR_OprFact::illegalOpr; }; |