Mercurial > hg > graal-compiler
annotate src/cpu/x86/vm/assembler_x86.cpp @ 10267:8b40495b9381
Merge
author | minqi |
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date | Mon, 13 May 2013 18:08:13 +0000 |
parents | cc32ccaaf47f |
children | 89e4d67fdd2a b800986664f4 |
rev | line source |
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0 | 1 /* |
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2 * Copyright (c) 1997, 2012, Oracle and/or its affiliates. All rights reserved. |
0 | 3 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. |
4 * | |
5 * This code is free software; you can redistribute it and/or modify it | |
6 * under the terms of the GNU General Public License version 2 only, as | |
7 * published by the Free Software Foundation. | |
8 * | |
9 * This code is distributed in the hope that it will be useful, but WITHOUT | |
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or | |
11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License | |
12 * version 2 for more details (a copy is included in the LICENSE file that | |
13 * accompanied this code). | |
14 * | |
15 * You should have received a copy of the GNU General Public License version | |
16 * 2 along with this work; if not, write to the Free Software Foundation, | |
17 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA. | |
18 * | |
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19 * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA |
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20 * or visit www.oracle.com if you need additional information or have any |
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21 * questions. |
0 | 22 * |
23 */ | |
24 | |
1972 | 25 #include "precompiled.hpp" |
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26 #include "asm/assembler.hpp" |
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27 #include "asm/assembler.inline.hpp" |
1972 | 28 #include "gc_interface/collectedHeap.inline.hpp" |
29 #include "interpreter/interpreter.hpp" | |
30 #include "memory/cardTableModRefBS.hpp" | |
31 #include "memory/resourceArea.hpp" | |
32 #include "prims/methodHandles.hpp" | |
33 #include "runtime/biasedLocking.hpp" | |
34 #include "runtime/interfaceSupport.hpp" | |
35 #include "runtime/objectMonitor.hpp" | |
36 #include "runtime/os.hpp" | |
37 #include "runtime/sharedRuntime.hpp" | |
38 #include "runtime/stubRoutines.hpp" | |
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39 #include "utilities/macros.hpp" |
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40 #if INCLUDE_ALL_GCS |
1972 | 41 #include "gc_implementation/g1/g1CollectedHeap.inline.hpp" |
42 #include "gc_implementation/g1/g1SATBCardTableModRefBS.hpp" | |
43 #include "gc_implementation/g1/heapRegion.hpp" | |
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44 #endif // INCLUDE_ALL_GCS |
0 | 45 |
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46 #ifdef PRODUCT |
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47 #define BLOCK_COMMENT(str) /* nothing */ |
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48 #define STOP(error) stop(error) |
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49 #else |
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50 #define BLOCK_COMMENT(str) block_comment(str) |
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51 #define STOP(error) block_comment(error); stop(error) |
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52 #endif |
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53 |
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54 #define BIND(label) bind(label); BLOCK_COMMENT(#label ":") |
0 | 55 // Implementation of AddressLiteral |
56 | |
57 AddressLiteral::AddressLiteral(address target, relocInfo::relocType rtype) { | |
58 _is_lval = false; | |
59 _target = target; | |
60 switch (rtype) { | |
61 case relocInfo::oop_type: | |
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62 case relocInfo::metadata_type: |
0 | 63 // Oops are a special case. Normally they would be their own section |
64 // but in cases like icBuffer they are literals in the code stream that | |
65 // we don't have a section for. We use none so that we get a literal address | |
66 // which is always patchable. | |
67 break; | |
68 case relocInfo::external_word_type: | |
69 _rspec = external_word_Relocation::spec(target); | |
70 break; | |
71 case relocInfo::internal_word_type: | |
72 _rspec = internal_word_Relocation::spec(target); | |
73 break; | |
74 case relocInfo::opt_virtual_call_type: | |
75 _rspec = opt_virtual_call_Relocation::spec(); | |
76 break; | |
77 case relocInfo::static_call_type: | |
78 _rspec = static_call_Relocation::spec(); | |
79 break; | |
80 case relocInfo::runtime_call_type: | |
81 _rspec = runtime_call_Relocation::spec(); | |
82 break; | |
83 case relocInfo::poll_type: | |
84 case relocInfo::poll_return_type: | |
85 _rspec = Relocation::spec_simple(rtype); | |
86 break; | |
87 case relocInfo::none: | |
88 break; | |
89 default: | |
90 ShouldNotReachHere(); | |
91 break; | |
92 } | |
93 } | |
94 | |
95 // Implementation of Address | |
96 | |
304 | 97 #ifdef _LP64 |
98 | |
0 | 99 Address Address::make_array(ArrayAddress adr) { |
100 // Not implementable on 64bit machines | |
101 // Should have been handled higher up the call chain. | |
102 ShouldNotReachHere(); | |
304 | 103 return Address(); |
104 } | |
105 | |
106 // exceedingly dangerous constructor | |
107 Address::Address(int disp, address loc, relocInfo::relocType rtype) { | |
108 _base = noreg; | |
109 _index = noreg; | |
110 _scale = no_scale; | |
111 _disp = disp; | |
112 switch (rtype) { | |
113 case relocInfo::external_word_type: | |
114 _rspec = external_word_Relocation::spec(loc); | |
115 break; | |
116 case relocInfo::internal_word_type: | |
117 _rspec = internal_word_Relocation::spec(loc); | |
118 break; | |
119 case relocInfo::runtime_call_type: | |
120 // HMM | |
121 _rspec = runtime_call_Relocation::spec(); | |
122 break; | |
123 case relocInfo::poll_type: | |
124 case relocInfo::poll_return_type: | |
125 _rspec = Relocation::spec_simple(rtype); | |
126 break; | |
127 case relocInfo::none: | |
128 break; | |
129 default: | |
130 ShouldNotReachHere(); | |
131 } | |
132 } | |
133 #else // LP64 | |
134 | |
135 Address Address::make_array(ArrayAddress adr) { | |
0 | 136 AddressLiteral base = adr.base(); |
137 Address index = adr.index(); | |
138 assert(index._disp == 0, "must not have disp"); // maybe it can? | |
139 Address array(index._base, index._index, index._scale, (intptr_t) base.target()); | |
140 array._rspec = base._rspec; | |
141 return array; | |
304 | 142 } |
0 | 143 |
144 // exceedingly dangerous constructor | |
145 Address::Address(address loc, RelocationHolder spec) { | |
146 _base = noreg; | |
147 _index = noreg; | |
148 _scale = no_scale; | |
149 _disp = (intptr_t) loc; | |
150 _rspec = spec; | |
151 } | |
304 | 152 |
0 | 153 #endif // _LP64 |
154 | |
304 | 155 |
156 | |
0 | 157 // Convert the raw encoding form into the form expected by the constructor for |
158 // Address. An index of 4 (rsp) corresponds to having no index, so convert | |
159 // that to noreg for the Address constructor. | |
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160 Address Address::make_raw(int base, int index, int scale, int disp, relocInfo::relocType disp_reloc) { |
624 | 161 RelocationHolder rspec; |
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162 if (disp_reloc != relocInfo::none) { |
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163 rspec = Relocation::spec_simple(disp_reloc); |
624 | 164 } |
0 | 165 bool valid_index = index != rsp->encoding(); |
166 if (valid_index) { | |
167 Address madr(as_Register(base), as_Register(index), (Address::ScaleFactor)scale, in_ByteSize(disp)); | |
624 | 168 madr._rspec = rspec; |
0 | 169 return madr; |
170 } else { | |
171 Address madr(as_Register(base), noreg, Address::no_scale, in_ByteSize(disp)); | |
624 | 172 madr._rspec = rspec; |
0 | 173 return madr; |
174 } | |
175 } | |
176 | |
177 // Implementation of Assembler | |
178 | |
179 int AbstractAssembler::code_fill_byte() { | |
180 return (u_char)'\xF4'; // hlt | |
181 } | |
182 | |
183 // make this go away someday | |
184 void Assembler::emit_data(jint data, relocInfo::relocType rtype, int format) { | |
185 if (rtype == relocInfo::none) | |
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186 emit_int32(data); |
0 | 187 else emit_data(data, Relocation::spec_simple(rtype), format); |
188 } | |
189 | |
190 void Assembler::emit_data(jint data, RelocationHolder const& rspec, int format) { | |
304 | 191 assert(imm_operand == 0, "default format must be immediate in this file"); |
0 | 192 assert(inst_mark() != NULL, "must be inside InstructionMark"); |
193 if (rspec.type() != relocInfo::none) { | |
194 #ifdef ASSERT | |
195 check_relocation(rspec, format); | |
196 #endif | |
197 // Do not use AbstractAssembler::relocate, which is not intended for | |
198 // embedded words. Instead, relocate to the enclosing instruction. | |
199 | |
200 // hack. call32 is too wide for mask so use disp32 | |
201 if (format == call32_operand) | |
202 code_section()->relocate(inst_mark(), rspec, disp32_operand); | |
203 else | |
204 code_section()->relocate(inst_mark(), rspec, format); | |
205 } | |
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206 emit_int32(data); |
0 | 207 } |
208 | |
304 | 209 static int encode(Register r) { |
210 int enc = r->encoding(); | |
211 if (enc >= 8) { | |
212 enc -= 8; | |
213 } | |
214 return enc; | |
215 } | |
216 | |
0 | 217 void Assembler::emit_arith_b(int op1, int op2, Register dst, int imm8) { |
218 assert(dst->has_byte_register(), "must have byte register"); | |
219 assert(isByte(op1) && isByte(op2), "wrong opcode"); | |
220 assert(isByte(imm8), "not a byte"); | |
221 assert((op1 & 0x01) == 0, "should be 8bit operation"); | |
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222 emit_int8(op1); |
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223 emit_int8(op2 | encode(dst)); |
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224 emit_int8(imm8); |
0 | 225 } |
226 | |
227 | |
304 | 228 void Assembler::emit_arith(int op1, int op2, Register dst, int32_t imm32) { |
0 | 229 assert(isByte(op1) && isByte(op2), "wrong opcode"); |
230 assert((op1 & 0x01) == 1, "should be 32bit operation"); | |
231 assert((op1 & 0x02) == 0, "sign-extension bit should not be set"); | |
232 if (is8bit(imm32)) { | |
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233 emit_int8(op1 | 0x02); // set sign bit |
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234 emit_int8(op2 | encode(dst)); |
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235 emit_int8(imm32 & 0xFF); |
0 | 236 } else { |
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237 emit_int8(op1); |
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238 emit_int8(op2 | encode(dst)); |
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239 emit_int32(imm32); |
0 | 240 } |
241 } | |
242 | |
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243 // Force generation of a 4 byte immediate value even if it fits into 8bit |
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244 void Assembler::emit_arith_imm32(int op1, int op2, Register dst, int32_t imm32) { |
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245 assert(isByte(op1) && isByte(op2), "wrong opcode"); |
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246 assert((op1 & 0x01) == 1, "should be 32bit operation"); |
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247 assert((op1 & 0x02) == 0, "sign-extension bit should not be set"); |
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248 emit_int8(op1); |
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249 emit_int8(op2 | encode(dst)); |
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250 emit_int32(imm32); |
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251 } |
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252 |
0 | 253 // immediate-to-memory forms |
304 | 254 void Assembler::emit_arith_operand(int op1, Register rm, Address adr, int32_t imm32) { |
0 | 255 assert((op1 & 0x01) == 1, "should be 32bit operation"); |
256 assert((op1 & 0x02) == 0, "sign-extension bit should not be set"); | |
257 if (is8bit(imm32)) { | |
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258 emit_int8(op1 | 0x02); // set sign bit |
304 | 259 emit_operand(rm, adr, 1); |
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260 emit_int8(imm32 & 0xFF); |
0 | 261 } else { |
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262 emit_int8(op1); |
304 | 263 emit_operand(rm, adr, 4); |
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264 emit_int32(imm32); |
0 | 265 } |
266 } | |
267 | |
268 | |
269 void Assembler::emit_arith(int op1, int op2, Register dst, Register src) { | |
270 assert(isByte(op1) && isByte(op2), "wrong opcode"); | |
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271 emit_int8(op1); |
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272 emit_int8(op2 | encode(dst) << 3 | encode(src)); |
304 | 273 } |
274 | |
275 | |
276 void Assembler::emit_operand(Register reg, Register base, Register index, | |
277 Address::ScaleFactor scale, int disp, | |
278 RelocationHolder const& rspec, | |
279 int rip_relative_correction) { | |
0 | 280 relocInfo::relocType rtype = (relocInfo::relocType) rspec.type(); |
304 | 281 |
282 // Encode the registers as needed in the fields they are used in | |
283 | |
284 int regenc = encode(reg) << 3; | |
285 int indexenc = index->is_valid() ? encode(index) << 3 : 0; | |
286 int baseenc = base->is_valid() ? encode(base) : 0; | |
287 | |
0 | 288 if (base->is_valid()) { |
289 if (index->is_valid()) { | |
290 assert(scale != Address::no_scale, "inconsistent address"); | |
291 // [base + index*scale + disp] | |
304 | 292 if (disp == 0 && rtype == relocInfo::none && |
293 base != rbp LP64_ONLY(&& base != r13)) { | |
0 | 294 // [base + index*scale] |
295 // [00 reg 100][ss index base] | |
296 assert(index != rsp, "illegal addressing mode"); | |
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297 emit_int8(0x04 | regenc); |
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298 emit_int8(scale << 6 | indexenc | baseenc); |
0 | 299 } else if (is8bit(disp) && rtype == relocInfo::none) { |
300 // [base + index*scale + imm8] | |
301 // [01 reg 100][ss index base] imm8 | |
302 assert(index != rsp, "illegal addressing mode"); | |
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303 emit_int8(0x44 | regenc); |
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304 emit_int8(scale << 6 | indexenc | baseenc); |
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305 emit_int8(disp & 0xFF); |
0 | 306 } else { |
304 | 307 // [base + index*scale + disp32] |
308 // [10 reg 100][ss index base] disp32 | |
0 | 309 assert(index != rsp, "illegal addressing mode"); |
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310 emit_int8(0x84 | regenc); |
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311 emit_int8(scale << 6 | indexenc | baseenc); |
0 | 312 emit_data(disp, rspec, disp32_operand); |
313 } | |
304 | 314 } else if (base == rsp LP64_ONLY(|| base == r12)) { |
315 // [rsp + disp] | |
0 | 316 if (disp == 0 && rtype == relocInfo::none) { |
304 | 317 // [rsp] |
0 | 318 // [00 reg 100][00 100 100] |
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319 emit_int8(0x04 | regenc); |
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320 emit_int8(0x24); |
0 | 321 } else if (is8bit(disp) && rtype == relocInfo::none) { |
304 | 322 // [rsp + imm8] |
323 // [01 reg 100][00 100 100] disp8 | |
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324 emit_int8(0x44 | regenc); |
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325 emit_int8(0x24); |
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326 emit_int8(disp & 0xFF); |
0 | 327 } else { |
304 | 328 // [rsp + imm32] |
329 // [10 reg 100][00 100 100] disp32 | |
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330 emit_int8(0x84 | regenc); |
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331 emit_int8(0x24); |
0 | 332 emit_data(disp, rspec, disp32_operand); |
333 } | |
334 } else { | |
335 // [base + disp] | |
304 | 336 assert(base != rsp LP64_ONLY(&& base != r12), "illegal addressing mode"); |
337 if (disp == 0 && rtype == relocInfo::none && | |
338 base != rbp LP64_ONLY(&& base != r13)) { | |
0 | 339 // [base] |
340 // [00 reg base] | |
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341 emit_int8(0x00 | regenc | baseenc); |
0 | 342 } else if (is8bit(disp) && rtype == relocInfo::none) { |
304 | 343 // [base + disp8] |
344 // [01 reg base] disp8 | |
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345 emit_int8(0x40 | regenc | baseenc); |
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346 emit_int8(disp & 0xFF); |
0 | 347 } else { |
304 | 348 // [base + disp32] |
349 // [10 reg base] disp32 | |
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350 emit_int8(0x80 | regenc | baseenc); |
0 | 351 emit_data(disp, rspec, disp32_operand); |
352 } | |
353 } | |
354 } else { | |
355 if (index->is_valid()) { | |
356 assert(scale != Address::no_scale, "inconsistent address"); | |
357 // [index*scale + disp] | |
304 | 358 // [00 reg 100][ss index 101] disp32 |
0 | 359 assert(index != rsp, "illegal addressing mode"); |
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360 emit_int8(0x04 | regenc); |
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361 emit_int8(scale << 6 | indexenc | 0x05); |
0 | 362 emit_data(disp, rspec, disp32_operand); |
304 | 363 } else if (rtype != relocInfo::none ) { |
364 // [disp] (64bit) RIP-RELATIVE (32bit) abs | |
365 // [00 000 101] disp32 | |
366 | |
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367 emit_int8(0x05 | regenc); |
304 | 368 // Note that the RIP-rel. correction applies to the generated |
369 // disp field, but _not_ to the target address in the rspec. | |
370 | |
371 // disp was created by converting the target address minus the pc | |
372 // at the start of the instruction. That needs more correction here. | |
373 // intptr_t disp = target - next_ip; | |
374 assert(inst_mark() != NULL, "must be inside InstructionMark"); | |
375 address next_ip = pc() + sizeof(int32_t) + rip_relative_correction; | |
376 int64_t adjusted = disp; | |
377 // Do rip-rel adjustment for 64bit | |
378 LP64_ONLY(adjusted -= (next_ip - inst_mark())); | |
379 assert(is_simm32(adjusted), | |
380 "must be 32bit offset (RIP relative address)"); | |
381 emit_data((int32_t) adjusted, rspec, disp32_operand); | |
382 | |
0 | 383 } else { |
304 | 384 // 32bit never did this, did everything as the rip-rel/disp code above |
385 // [disp] ABSOLUTE | |
386 // [00 reg 100][00 100 101] disp32 | |
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387 emit_int8(0x04 | regenc); |
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388 emit_int8(0x25); |
0 | 389 emit_data(disp, rspec, disp32_operand); |
390 } | |
391 } | |
392 } | |
393 | |
304 | 394 void Assembler::emit_operand(XMMRegister reg, Register base, Register index, |
395 Address::ScaleFactor scale, int disp, | |
396 RelocationHolder const& rspec) { | |
397 emit_operand((Register)reg, base, index, scale, disp, rspec); | |
398 } | |
399 | |
0 | 400 // Secret local extension to Assembler::WhichOperand: |
401 #define end_pc_operand (_WhichOperand_limit) | |
402 | |
403 address Assembler::locate_operand(address inst, WhichOperand which) { | |
404 // Decode the given instruction, and return the address of | |
405 // an embedded 32-bit operand word. | |
406 | |
407 // If "which" is disp32_operand, selects the displacement portion | |
408 // of an effective address specifier. | |
304 | 409 // If "which" is imm64_operand, selects the trailing immediate constant. |
0 | 410 // If "which" is call32_operand, selects the displacement of a call or jump. |
411 // Caller is responsible for ensuring that there is such an operand, | |
304 | 412 // and that it is 32/64 bits wide. |
0 | 413 |
414 // If "which" is end_pc_operand, find the end of the instruction. | |
415 | |
416 address ip = inst; | |
304 | 417 bool is_64bit = false; |
418 | |
419 debug_only(bool has_disp32 = false); | |
420 int tail_size = 0; // other random bytes (#32, #16, etc.) at end of insn | |
421 | |
422 again_after_prefix: | |
0 | 423 switch (0xFF & *ip++) { |
424 | |
425 // These convenience macros generate groups of "case" labels for the switch. | |
304 | 426 #define REP4(x) (x)+0: case (x)+1: case (x)+2: case (x)+3 |
427 #define REP8(x) (x)+0: case (x)+1: case (x)+2: case (x)+3: \ | |
0 | 428 case (x)+4: case (x)+5: case (x)+6: case (x)+7 |
304 | 429 #define REP16(x) REP8((x)+0): \ |
0 | 430 case REP8((x)+8) |
431 | |
432 case CS_segment: | |
433 case SS_segment: | |
434 case DS_segment: | |
435 case ES_segment: | |
436 case FS_segment: | |
437 case GS_segment: | |
304 | 438 // Seems dubious |
439 LP64_ONLY(assert(false, "shouldn't have that prefix")); | |
0 | 440 assert(ip == inst+1, "only one prefix allowed"); |
441 goto again_after_prefix; | |
442 | |
304 | 443 case 0x67: |
444 case REX: | |
445 case REX_B: | |
446 case REX_X: | |
447 case REX_XB: | |
448 case REX_R: | |
449 case REX_RB: | |
450 case REX_RX: | |
451 case REX_RXB: | |
452 NOT_LP64(assert(false, "64bit prefixes")); | |
453 goto again_after_prefix; | |
454 | |
455 case REX_W: | |
456 case REX_WB: | |
457 case REX_WX: | |
458 case REX_WXB: | |
459 case REX_WR: | |
460 case REX_WRB: | |
461 case REX_WRX: | |
462 case REX_WRXB: | |
463 NOT_LP64(assert(false, "64bit prefixes")); | |
464 is_64bit = true; | |
465 goto again_after_prefix; | |
466 | |
467 case 0xFF: // pushq a; decl a; incl a; call a; jmp a | |
0 | 468 case 0x88: // movb a, r |
469 case 0x89: // movl a, r | |
470 case 0x8A: // movb r, a | |
471 case 0x8B: // movl r, a | |
472 case 0x8F: // popl a | |
304 | 473 debug_only(has_disp32 = true); |
0 | 474 break; |
475 | |
304 | 476 case 0x68: // pushq #32 |
477 if (which == end_pc_operand) { | |
478 return ip + 4; | |
479 } | |
480 assert(which == imm_operand && !is_64bit, "pushl has no disp32 or 64bit immediate"); | |
0 | 481 return ip; // not produced by emit_operand |
482 | |
483 case 0x66: // movw ... (size prefix) | |
304 | 484 again_after_size_prefix2: |
0 | 485 switch (0xFF & *ip++) { |
304 | 486 case REX: |
487 case REX_B: | |
488 case REX_X: | |
489 case REX_XB: | |
490 case REX_R: | |
491 case REX_RB: | |
492 case REX_RX: | |
493 case REX_RXB: | |
494 case REX_W: | |
495 case REX_WB: | |
496 case REX_WX: | |
497 case REX_WXB: | |
498 case REX_WR: | |
499 case REX_WRB: | |
500 case REX_WRX: | |
501 case REX_WRXB: | |
502 NOT_LP64(assert(false, "64bit prefix found")); | |
503 goto again_after_size_prefix2; | |
0 | 504 case 0x8B: // movw r, a |
505 case 0x89: // movw a, r | |
304 | 506 debug_only(has_disp32 = true); |
0 | 507 break; |
508 case 0xC7: // movw a, #16 | |
304 | 509 debug_only(has_disp32 = true); |
0 | 510 tail_size = 2; // the imm16 |
511 break; | |
512 case 0x0F: // several SSE/SSE2 variants | |
513 ip--; // reparse the 0x0F | |
514 goto again_after_prefix; | |
515 default: | |
516 ShouldNotReachHere(); | |
517 } | |
518 break; | |
519 | |
304 | 520 case REP8(0xB8): // movl/q r, #32/#64(oop?) |
521 if (which == end_pc_operand) return ip + (is_64bit ? 8 : 4); | |
522 // these asserts are somewhat nonsensical | |
523 #ifndef _LP64 | |
5984 | 524 assert(which == imm_operand || which == disp32_operand, |
525 err_msg("which %d is_64_bit %d ip " INTPTR_FORMAT, which, is_64bit, ip)); | |
304 | 526 #else |
527 assert((which == call32_operand || which == imm_operand) && is_64bit || | |
5984 | 528 which == narrow_oop_operand && !is_64bit, |
529 err_msg("which %d is_64_bit %d ip " INTPTR_FORMAT, which, is_64bit, ip)); | |
304 | 530 #endif // _LP64 |
0 | 531 return ip; |
532 | |
533 case 0x69: // imul r, a, #32 | |
534 case 0xC7: // movl a, #32(oop?) | |
535 tail_size = 4; | |
304 | 536 debug_only(has_disp32 = true); // has both kinds of operands! |
0 | 537 break; |
538 | |
539 case 0x0F: // movx..., etc. | |
540 switch (0xFF & *ip++) { | |
4759 | 541 case 0x3A: // pcmpestri |
542 tail_size = 1; | |
543 case 0x38: // ptest, pmovzxbw | |
544 ip++; // skip opcode | |
545 debug_only(has_disp32 = true); // has both kinds of operands! | |
546 break; | |
547 | |
548 case 0x70: // pshufd r, r/a, #8 | |
549 debug_only(has_disp32 = true); // has both kinds of operands! | |
550 case 0x73: // psrldq r, #8 | |
551 tail_size = 1; | |
552 break; | |
553 | |
0 | 554 case 0x12: // movlps |
555 case 0x28: // movaps | |
556 case 0x2E: // ucomiss | |
557 case 0x2F: // comiss | |
558 case 0x54: // andps | |
559 case 0x55: // andnps | |
560 case 0x56: // orps | |
561 case 0x57: // xorps | |
562 case 0x6E: // movd | |
563 case 0x7E: // movd | |
4759 | 564 case 0xAE: // ldmxcsr, stmxcsr, fxrstor, fxsave, clflush |
304 | 565 debug_only(has_disp32 = true); |
0 | 566 break; |
567 | |
568 case 0xAD: // shrd r, a, %cl | |
569 case 0xAF: // imul r, a | |
304 | 570 case 0xBE: // movsbl r, a (movsxb) |
571 case 0xBF: // movswl r, a (movsxw) | |
572 case 0xB6: // movzbl r, a (movzxb) | |
573 case 0xB7: // movzwl r, a (movzxw) | |
0 | 574 case REP16(0x40): // cmovl cc, r, a |
575 case 0xB0: // cmpxchgb | |
576 case 0xB1: // cmpxchg | |
577 case 0xC1: // xaddl | |
578 case 0xC7: // cmpxchg8 | |
579 case REP16(0x90): // setcc a | |
304 | 580 debug_only(has_disp32 = true); |
0 | 581 // fall out of the switch to decode the address |
582 break; | |
304 | 583 |
4759 | 584 case 0xC4: // pinsrw r, a, #8 |
585 debug_only(has_disp32 = true); | |
586 case 0xC5: // pextrw r, r, #8 | |
587 tail_size = 1; // the imm8 | |
588 break; | |
589 | |
0 | 590 case 0xAC: // shrd r, a, #8 |
304 | 591 debug_only(has_disp32 = true); |
0 | 592 tail_size = 1; // the imm8 |
593 break; | |
304 | 594 |
0 | 595 case REP16(0x80): // jcc rdisp32 |
596 if (which == end_pc_operand) return ip + 4; | |
304 | 597 assert(which == call32_operand, "jcc has no disp32 or imm"); |
0 | 598 return ip; |
599 default: | |
600 ShouldNotReachHere(); | |
601 } | |
602 break; | |
603 | |
604 case 0x81: // addl a, #32; addl r, #32 | |
605 // also: orl, adcl, sbbl, andl, subl, xorl, cmpl | |
304 | 606 // on 32bit in the case of cmpl, the imm might be an oop |
0 | 607 tail_size = 4; |
304 | 608 debug_only(has_disp32 = true); // has both kinds of operands! |
0 | 609 break; |
610 | |
611 case 0x83: // addl a, #8; addl r, #8 | |
612 // also: orl, adcl, sbbl, andl, subl, xorl, cmpl | |
304 | 613 debug_only(has_disp32 = true); // has both kinds of operands! |
0 | 614 tail_size = 1; |
615 break; | |
616 | |
617 case 0x9B: | |
618 switch (0xFF & *ip++) { | |
619 case 0xD9: // fnstcw a | |
304 | 620 debug_only(has_disp32 = true); |
0 | 621 break; |
622 default: | |
623 ShouldNotReachHere(); | |
624 } | |
625 break; | |
626 | |
627 case REP4(0x00): // addb a, r; addl a, r; addb r, a; addl r, a | |
628 case REP4(0x10): // adc... | |
629 case REP4(0x20): // and... | |
630 case REP4(0x30): // xor... | |
631 case REP4(0x08): // or... | |
632 case REP4(0x18): // sbb... | |
633 case REP4(0x28): // sub... | |
304 | 634 case 0xF7: // mull a |
635 case 0x8D: // lea r, a | |
636 case 0x87: // xchg r, a | |
0 | 637 case REP4(0x38): // cmp... |
304 | 638 case 0x85: // test r, a |
639 debug_only(has_disp32 = true); // has both kinds of operands! | |
0 | 640 break; |
641 | |
642 case 0xC1: // sal a, #8; sar a, #8; shl a, #8; shr a, #8 | |
643 case 0xC6: // movb a, #8 | |
644 case 0x80: // cmpb a, #8 | |
645 case 0x6B: // imul r, a, #8 | |
304 | 646 debug_only(has_disp32 = true); // has both kinds of operands! |
0 | 647 tail_size = 1; // the imm8 |
648 break; | |
649 | |
4759 | 650 case 0xC4: // VEX_3bytes |
651 case 0xC5: // VEX_2bytes | |
652 assert((UseAVX > 0), "shouldn't have VEX prefix"); | |
653 assert(ip == inst+1, "no prefixes allowed"); | |
654 // C4 and C5 are also used as opcodes for PINSRW and PEXTRW instructions | |
655 // but they have prefix 0x0F and processed when 0x0F processed above. | |
656 // | |
657 // In 32-bit mode the VEX first byte C4 and C5 alias onto LDS and LES | |
658 // instructions (these instructions are not supported in 64-bit mode). | |
659 // To distinguish them bits [7:6] are set in the VEX second byte since | |
660 // ModRM byte can not be of the form 11xxxxxx in 32-bit mode. To set | |
661 // those VEX bits REX and vvvv bits are inverted. | |
662 // | |
663 // Fortunately C2 doesn't generate these instructions so we don't need | |
664 // to check for them in product version. | |
665 | |
666 // Check second byte | |
667 NOT_LP64(assert((0xC0 & *ip) == 0xC0, "shouldn't have LDS and LES instructions")); | |
668 | |
669 // First byte | |
670 if ((0xFF & *inst) == VEX_3bytes) { | |
671 ip++; // third byte | |
672 is_64bit = ((VEX_W & *ip) == VEX_W); | |
673 } | |
674 ip++; // opcode | |
675 // To find the end of instruction (which == end_pc_operand). | |
676 switch (0xFF & *ip) { | |
677 case 0x61: // pcmpestri r, r/a, #8 | |
678 case 0x70: // pshufd r, r/a, #8 | |
679 case 0x73: // psrldq r, #8 | |
680 tail_size = 1; // the imm8 | |
681 break; | |
682 default: | |
683 break; | |
684 } | |
685 ip++; // skip opcode | |
686 debug_only(has_disp32 = true); // has both kinds of operands! | |
687 break; | |
0 | 688 |
689 case 0xD1: // sal a, 1; sar a, 1; shl a, 1; shr a, 1 | |
690 case 0xD3: // sal a, %cl; sar a, %cl; shl a, %cl; shr a, %cl | |
691 case 0xD9: // fld_s a; fst_s a; fstp_s a; fldcw a | |
692 case 0xDD: // fld_d a; fst_d a; fstp_d a | |
693 case 0xDB: // fild_s a; fistp_s a; fld_x a; fstp_x a | |
694 case 0xDF: // fild_d a; fistp_d a | |
695 case 0xD8: // fadd_s a; fsubr_s a; fmul_s a; fdivr_s a; fcomp_s a | |
696 case 0xDC: // fadd_d a; fsubr_d a; fmul_d a; fdivr_d a; fcomp_d a | |
697 case 0xDE: // faddp_d a; fsubrp_d a; fmulp_d a; fdivrp_d a; fcompp_d a | |
304 | 698 debug_only(has_disp32 = true); |
0 | 699 break; |
700 | |
4759 | 701 case 0xE8: // call rdisp32 |
702 case 0xE9: // jmp rdisp32 | |
703 if (which == end_pc_operand) return ip + 4; | |
704 assert(which == call32_operand, "call has no disp32 or imm"); | |
705 return ip; | |
706 | |
420
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707 case 0xF0: // Lock |
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708 assert(os::is_MP(), "only on MP"); |
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709 goto again_after_prefix; |
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710 |
0 | 711 case 0xF3: // For SSE |
712 case 0xF2: // For SSE2 | |
304 | 713 switch (0xFF & *ip++) { |
714 case REX: | |
715 case REX_B: | |
716 case REX_X: | |
717 case REX_XB: | |
718 case REX_R: | |
719 case REX_RB: | |
720 case REX_RX: | |
721 case REX_RXB: | |
722 case REX_W: | |
723 case REX_WB: | |
724 case REX_WX: | |
725 case REX_WXB: | |
726 case REX_WR: | |
727 case REX_WRB: | |
728 case REX_WRX: | |
729 case REX_WRXB: | |
730 NOT_LP64(assert(false, "found 64bit prefix")); | |
731 ip++; | |
732 default: | |
733 ip++; | |
734 } | |
735 debug_only(has_disp32 = true); // has both kinds of operands! | |
0 | 736 break; |
737 | |
738 default: | |
739 ShouldNotReachHere(); | |
740 | |
304 | 741 #undef REP8 |
742 #undef REP16 | |
0 | 743 } |
744 | |
745 assert(which != call32_operand, "instruction is not a call, jmp, or jcc"); | |
304 | 746 #ifdef _LP64 |
747 assert(which != imm_operand, "instruction is not a movq reg, imm64"); | |
748 #else | |
749 // assert(which != imm_operand || has_imm32, "instruction has no imm32 field"); | |
750 assert(which != imm_operand || has_disp32, "instruction has no imm32 field"); | |
751 #endif // LP64 | |
752 assert(which != disp32_operand || has_disp32, "instruction has no disp32 field"); | |
0 | 753 |
754 // parse the output of emit_operand | |
755 int op2 = 0xFF & *ip++; | |
756 int base = op2 & 0x07; | |
757 int op3 = -1; | |
758 const int b100 = 4; | |
759 const int b101 = 5; | |
760 if (base == b100 && (op2 >> 6) != 3) { | |
761 op3 = 0xFF & *ip++; | |
762 base = op3 & 0x07; // refetch the base | |
763 } | |
764 // now ip points at the disp (if any) | |
765 | |
766 switch (op2 >> 6) { | |
767 case 0: | |
768 // [00 reg 100][ss index base] | |
304 | 769 // [00 reg 100][00 100 esp] |
0 | 770 // [00 reg base] |
771 // [00 reg 100][ss index 101][disp32] | |
772 // [00 reg 101] [disp32] | |
773 | |
774 if (base == b101) { | |
775 if (which == disp32_operand) | |
776 return ip; // caller wants the disp32 | |
777 ip += 4; // skip the disp32 | |
778 } | |
779 break; | |
780 | |
781 case 1: | |
782 // [01 reg 100][ss index base][disp8] | |
304 | 783 // [01 reg 100][00 100 esp][disp8] |
0 | 784 // [01 reg base] [disp8] |
785 ip += 1; // skip the disp8 | |
786 break; | |
787 | |
788 case 2: | |
789 // [10 reg 100][ss index base][disp32] | |
304 | 790 // [10 reg 100][00 100 esp][disp32] |
0 | 791 // [10 reg base] [disp32] |
792 if (which == disp32_operand) | |
793 return ip; // caller wants the disp32 | |
794 ip += 4; // skip the disp32 | |
795 break; | |
796 | |
797 case 3: | |
798 // [11 reg base] (not a memory addressing mode) | |
799 break; | |
800 } | |
801 | |
802 if (which == end_pc_operand) { | |
803 return ip + tail_size; | |
804 } | |
805 | |
304 | 806 #ifdef _LP64 |
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807 assert(which == narrow_oop_operand && !is_64bit, "instruction is not a movl adr, imm32"); |
304 | 808 #else |
809 assert(which == imm_operand, "instruction has only an imm field"); | |
810 #endif // LP64 | |
0 | 811 return ip; |
812 } | |
813 | |
814 address Assembler::locate_next_instruction(address inst) { | |
815 // Secretly share code with locate_operand: | |
816 return locate_operand(inst, end_pc_operand); | |
817 } | |
818 | |
819 | |
820 #ifdef ASSERT | |
821 void Assembler::check_relocation(RelocationHolder const& rspec, int format) { | |
822 address inst = inst_mark(); | |
823 assert(inst != NULL && inst < pc(), "must point to beginning of instruction"); | |
824 address opnd; | |
825 | |
826 Relocation* r = rspec.reloc(); | |
827 if (r->type() == relocInfo::none) { | |
828 return; | |
829 } else if (r->is_call() || format == call32_operand) { | |
830 // assert(format == imm32_operand, "cannot specify a nonzero format"); | |
831 opnd = locate_operand(inst, call32_operand); | |
832 } else if (r->is_data()) { | |
304 | 833 assert(format == imm_operand || format == disp32_operand |
834 LP64_ONLY(|| format == narrow_oop_operand), "format ok"); | |
0 | 835 opnd = locate_operand(inst, (WhichOperand)format); |
836 } else { | |
304 | 837 assert(format == imm_operand, "cannot specify a format"); |
0 | 838 return; |
839 } | |
840 assert(opnd == pc(), "must put operand where relocs can find it"); | |
841 } | |
304 | 842 #endif // ASSERT |
843 | |
844 void Assembler::emit_operand32(Register reg, Address adr) { | |
845 assert(reg->encoding() < 8, "no extended registers"); | |
846 assert(!adr.base_needs_rex() && !adr.index_needs_rex(), "no extended registers"); | |
847 emit_operand(reg, adr._base, adr._index, adr._scale, adr._disp, | |
848 adr._rspec); | |
849 } | |
850 | |
851 void Assembler::emit_operand(Register reg, Address adr, | |
852 int rip_relative_correction) { | |
853 emit_operand(reg, adr._base, adr._index, adr._scale, adr._disp, | |
854 adr._rspec, | |
855 rip_relative_correction); | |
856 } | |
857 | |
858 void Assembler::emit_operand(XMMRegister reg, Address adr) { | |
859 emit_operand(reg, adr._base, adr._index, adr._scale, adr._disp, | |
860 adr._rspec); | |
861 } | |
862 | |
863 // MMX operations | |
864 void Assembler::emit_operand(MMXRegister reg, Address adr) { | |
865 assert(!adr.base_needs_rex() && !adr.index_needs_rex(), "no extended registers"); | |
866 emit_operand((Register)reg, adr._base, adr._index, adr._scale, adr._disp, adr._rspec); | |
867 } | |
868 | |
869 // work around gcc (3.2.1-7a) bug | |
870 void Assembler::emit_operand(Address adr, MMXRegister reg) { | |
871 assert(!adr.base_needs_rex() && !adr.index_needs_rex(), "no extended registers"); | |
872 emit_operand((Register)reg, adr._base, adr._index, adr._scale, adr._disp, adr._rspec); | |
0 | 873 } |
874 | |
875 | |
876 void Assembler::emit_farith(int b1, int b2, int i) { | |
877 assert(isByte(b1) && isByte(b2), "wrong opcode"); | |
878 assert(0 <= i && i < 8, "illegal stack offset"); | |
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879 emit_int8(b1); |
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880 emit_int8(b2 + i); |
0 | 881 } |
882 | |
883 | |
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884 // Now the Assembler instructions (identical for 32/64 bits) |
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885 |
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886 void Assembler::adcl(Address dst, int32_t imm32) { |
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887 InstructionMark im(this); |
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888 prefix(dst); |
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889 emit_arith_operand(0x81, rdx, dst, imm32); |
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890 } |
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891 |
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892 void Assembler::adcl(Address dst, Register src) { |
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893 InstructionMark im(this); |
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894 prefix(dst, src); |
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895 emit_int8(0x11); |
2100
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896 emit_operand(src, dst); |
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897 } |
304 | 898 |
899 void Assembler::adcl(Register dst, int32_t imm32) { | |
900 prefix(dst); | |
0 | 901 emit_arith(0x81, 0xD0, dst, imm32); |
902 } | |
903 | |
904 void Assembler::adcl(Register dst, Address src) { | |
905 InstructionMark im(this); | |
304 | 906 prefix(src, dst); |
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907 emit_int8(0x13); |
0 | 908 emit_operand(dst, src); |
909 } | |
910 | |
911 void Assembler::adcl(Register dst, Register src) { | |
304 | 912 (void) prefix_and_encode(dst->encoding(), src->encoding()); |
0 | 913 emit_arith(0x13, 0xC0, dst, src); |
914 } | |
915 | |
304 | 916 void Assembler::addl(Address dst, int32_t imm32) { |
917 InstructionMark im(this); | |
918 prefix(dst); | |
919 emit_arith_operand(0x81, rax, dst, imm32); | |
920 } | |
0 | 921 |
922 void Assembler::addl(Address dst, Register src) { | |
923 InstructionMark im(this); | |
304 | 924 prefix(dst, src); |
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925 emit_int8(0x01); |
0 | 926 emit_operand(src, dst); |
927 } | |
928 | |
304 | 929 void Assembler::addl(Register dst, int32_t imm32) { |
930 prefix(dst); | |
0 | 931 emit_arith(0x81, 0xC0, dst, imm32); |
932 } | |
933 | |
934 void Assembler::addl(Register dst, Address src) { | |
935 InstructionMark im(this); | |
304 | 936 prefix(src, dst); |
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937 emit_int8(0x03); |
0 | 938 emit_operand(dst, src); |
939 } | |
940 | |
941 void Assembler::addl(Register dst, Register src) { | |
304 | 942 (void) prefix_and_encode(dst->encoding(), src->encoding()); |
0 | 943 emit_arith(0x03, 0xC0, dst, src); |
944 } | |
945 | |
946 void Assembler::addr_nop_4() { | |
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947 assert(UseAddressNop, "no CPU support"); |
0 | 948 // 4 bytes: NOP DWORD PTR [EAX+0] |
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949 emit_int8(0x0F); |
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950 emit_int8(0x1F); |
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951 emit_int8(0x40); // emit_rm(cbuf, 0x1, EAX_enc, EAX_enc); |
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952 emit_int8(0); // 8-bits offset (1 byte) |
0 | 953 } |
954 | |
955 void Assembler::addr_nop_5() { | |
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956 assert(UseAddressNop, "no CPU support"); |
0 | 957 // 5 bytes: NOP DWORD PTR [EAX+EAX*0+0] 8-bits offset |
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958 emit_int8(0x0F); |
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959 emit_int8(0x1F); |
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960 emit_int8(0x44); // emit_rm(cbuf, 0x1, EAX_enc, 0x4); |
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961 emit_int8(0x00); // emit_rm(cbuf, 0x0, EAX_enc, EAX_enc); |
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962 emit_int8(0); // 8-bits offset (1 byte) |
0 | 963 } |
964 | |
965 void Assembler::addr_nop_7() { | |
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966 assert(UseAddressNop, "no CPU support"); |
0 | 967 // 7 bytes: NOP DWORD PTR [EAX+0] 32-bits offset |
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968 emit_int8(0x0F); |
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969 emit_int8(0x1F); |
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970 emit_int8((unsigned char)0x80); |
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971 // emit_rm(cbuf, 0x2, EAX_enc, EAX_enc); |
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972 emit_int32(0); // 32-bits offset (4 bytes) |
0 | 973 } |
974 | |
975 void Assembler::addr_nop_8() { | |
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976 assert(UseAddressNop, "no CPU support"); |
0 | 977 // 8 bytes: NOP DWORD PTR [EAX+EAX*0+0] 32-bits offset |
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978 emit_int8(0x0F); |
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979 emit_int8(0x1F); |
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980 emit_int8((unsigned char)0x84); |
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981 // emit_rm(cbuf, 0x2, EAX_enc, 0x4); |
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982 emit_int8(0x00); // emit_rm(cbuf, 0x0, EAX_enc, EAX_enc); |
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983 emit_int32(0); // 32-bits offset (4 bytes) |
0 | 984 } |
985 | |
304 | 986 void Assembler::addsd(XMMRegister dst, XMMRegister src) { |
987 NOT_LP64(assert(VM_Version::supports_sse2(), "")); | |
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988 emit_simd_arith(0x58, dst, src, VEX_SIMD_F2); |
304 | 989 } |
990 | |
991 void Assembler::addsd(XMMRegister dst, Address src) { | |
992 NOT_LP64(assert(VM_Version::supports_sse2(), "")); | |
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993 emit_simd_arith(0x58, dst, src, VEX_SIMD_F2); |
304 | 994 } |
995 | |
996 void Assembler::addss(XMMRegister dst, XMMRegister src) { | |
997 NOT_LP64(assert(VM_Version::supports_sse(), "")); | |
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998 emit_simd_arith(0x58, dst, src, VEX_SIMD_F3); |
304 | 999 } |
1000 | |
1001 void Assembler::addss(XMMRegister dst, Address src) { | |
1002 NOT_LP64(assert(VM_Version::supports_sse(), "")); | |
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1003 emit_simd_arith(0x58, dst, src, VEX_SIMD_F3); |
304 | 1004 } |
1005 | |
6894 | 1006 void Assembler::aesdec(XMMRegister dst, Address src) { |
1007 assert(VM_Version::supports_aes(), ""); | |
1008 InstructionMark im(this); | |
1009 simd_prefix(dst, dst, src, VEX_SIMD_66, VEX_OPCODE_0F_38); | |
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1010 emit_int8((unsigned char)0xDE); |
6894 | 1011 emit_operand(dst, src); |
1012 } | |
1013 | |
1014 void Assembler::aesdec(XMMRegister dst, XMMRegister src) { | |
1015 assert(VM_Version::supports_aes(), ""); | |
1016 int encode = simd_prefix_and_encode(dst, dst, src, VEX_SIMD_66, VEX_OPCODE_0F_38); | |
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1017 emit_int8((unsigned char)0xDE); |
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1018 emit_int8(0xC0 | encode); |
6894 | 1019 } |
1020 | |
1021 void Assembler::aesdeclast(XMMRegister dst, Address src) { | |
1022 assert(VM_Version::supports_aes(), ""); | |
1023 InstructionMark im(this); | |
1024 simd_prefix(dst, dst, src, VEX_SIMD_66, VEX_OPCODE_0F_38); | |
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1025 emit_int8((unsigned char)0xDF); |
6894 | 1026 emit_operand(dst, src); |
1027 } | |
1028 | |
1029 void Assembler::aesdeclast(XMMRegister dst, XMMRegister src) { | |
1030 assert(VM_Version::supports_aes(), ""); | |
1031 int encode = simd_prefix_and_encode(dst, dst, src, VEX_SIMD_66, VEX_OPCODE_0F_38); | |
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1032 emit_int8((unsigned char)0xDF); |
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1033 emit_int8((unsigned char)(0xC0 | encode)); |
6894 | 1034 } |
1035 | |
1036 void Assembler::aesenc(XMMRegister dst, Address src) { | |
1037 assert(VM_Version::supports_aes(), ""); | |
1038 InstructionMark im(this); | |
1039 simd_prefix(dst, dst, src, VEX_SIMD_66, VEX_OPCODE_0F_38); | |
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1040 emit_int8((unsigned char)0xDC); |
6894 | 1041 emit_operand(dst, src); |
1042 } | |
1043 | |
1044 void Assembler::aesenc(XMMRegister dst, XMMRegister src) { | |
1045 assert(VM_Version::supports_aes(), ""); | |
1046 int encode = simd_prefix_and_encode(dst, dst, src, VEX_SIMD_66, VEX_OPCODE_0F_38); | |
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1047 emit_int8((unsigned char)0xDC); |
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1048 emit_int8(0xC0 | encode); |
6894 | 1049 } |
1050 | |
1051 void Assembler::aesenclast(XMMRegister dst, Address src) { | |
1052 assert(VM_Version::supports_aes(), ""); | |
1053 InstructionMark im(this); | |
1054 simd_prefix(dst, dst, src, VEX_SIMD_66, VEX_OPCODE_0F_38); | |
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1055 emit_int8((unsigned char)0xDD); |
6894 | 1056 emit_operand(dst, src); |
1057 } | |
1058 | |
1059 void Assembler::aesenclast(XMMRegister dst, XMMRegister src) { | |
1060 assert(VM_Version::supports_aes(), ""); | |
1061 int encode = simd_prefix_and_encode(dst, dst, src, VEX_SIMD_66, VEX_OPCODE_0F_38); | |
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1062 emit_int8((unsigned char)0xDD); |
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1063 emit_int8((unsigned char)(0xC0 | encode)); |
6894 | 1064 } |
1065 | |
1066 | |
4759 | 1067 void Assembler::andl(Address dst, int32_t imm32) { |
1068 InstructionMark im(this); | |
1069 prefix(dst); | |
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1070 emit_int8((unsigned char)0x81); |
4759 | 1071 emit_operand(rsp, dst, 4); |
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1072 emit_int32(imm32); |
4759 | 1073 } |
1074 | |
304 | 1075 void Assembler::andl(Register dst, int32_t imm32) { |
1076 prefix(dst); | |
1077 emit_arith(0x81, 0xE0, dst, imm32); | |
1078 } | |
1079 | |
1080 void Assembler::andl(Register dst, Address src) { | |
1081 InstructionMark im(this); | |
1082 prefix(src, dst); | |
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1083 emit_int8(0x23); |
304 | 1084 emit_operand(dst, src); |
1085 } | |
1086 | |
1087 void Assembler::andl(Register dst, Register src) { | |
1088 (void) prefix_and_encode(dst->encoding(), src->encoding()); | |
1089 emit_arith(0x23, 0xC0, dst, src); | |
1090 } | |
1091 | |
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1092 void Assembler::bsfl(Register dst, Register src) { |
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1093 int encode = prefix_and_encode(dst->encoding(), src->encoding()); |
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1094 emit_int8(0x0F); |
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1095 emit_int8((unsigned char)0xBC); |
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1096 emit_int8((unsigned char)(0xC0 | encode)); |
775
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1097 } |
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1098 |
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1099 void Assembler::bsrl(Register dst, Register src) { |
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1100 assert(!VM_Version::supports_lzcnt(), "encoding is treated as LZCNT"); |
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1101 int encode = prefix_and_encode(dst->encoding(), src->encoding()); |
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1102 emit_int8(0x0F); |
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1103 emit_int8((unsigned char)0xBD); |
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1104 emit_int8((unsigned char)(0xC0 | encode)); |
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1105 } |
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1106 |
304 | 1107 void Assembler::bswapl(Register reg) { // bswap |
1108 int encode = prefix_and_encode(reg->encoding()); | |
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1109 emit_int8(0x0F); |
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1110 emit_int8((unsigned char)(0xC8 | encode)); |
304 | 1111 } |
1112 | |
1113 void Assembler::call(Label& L, relocInfo::relocType rtype) { | |
1114 // suspect disp32 is always good | |
1115 int operand = LP64_ONLY(disp32_operand) NOT_LP64(imm_operand); | |
1116 | |
1117 if (L.is_bound()) { | |
1118 const int long_size = 5; | |
1119 int offs = (int)( target(L) - pc() ); | |
1120 assert(offs <= 0, "assembler error"); | |
1121 InstructionMark im(this); | |
1122 // 1110 1000 #32-bit disp | |
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1123 emit_int8((unsigned char)0xE8); |
304 | 1124 emit_data(offs - long_size, rtype, operand); |
1125 } else { | |
1126 InstructionMark im(this); | |
1127 // 1110 1000 #32-bit disp | |
1128 L.add_patch_at(code(), locator()); | |
1129 | |
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1130 emit_int8((unsigned char)0xE8); |
304 | 1131 emit_data(int(0), rtype, operand); |
1132 } | |
1133 } | |
1134 | |
1135 void Assembler::call(Register dst) { | |
4759 | 1136 int encode = prefix_and_encode(dst->encoding()); |
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1137 emit_int8((unsigned char)0xFF); |
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1138 emit_int8((unsigned char)(0xD0 | encode)); |
304 | 1139 } |
1140 | |
1141 | |
1142 void Assembler::call(Address adr) { | |
1143 InstructionMark im(this); | |
1144 prefix(adr); | |
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1145 emit_int8((unsigned char)0xFF); |
304 | 1146 emit_operand(rdx, adr); |
1147 } | |
1148 | |
1149 void Assembler::call_literal(address entry, RelocationHolder const& rspec) { | |
1150 assert(entry != NULL, "call most probably wrong"); | |
1151 InstructionMark im(this); | |
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1152 emit_int8((unsigned char)0xE8); |
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1153 intptr_t disp = entry - (pc() + sizeof(int32_t)); |
304 | 1154 assert(is_simm32(disp), "must be 32bit offset (call2)"); |
1155 // Technically, should use call32_operand, but this format is | |
1156 // implied by the fact that we're emitting a call instruction. | |
1157 | |
1158 int operand = LP64_ONLY(disp32_operand) NOT_LP64(call32_operand); | |
1159 emit_data((int) disp, rspec, operand); | |
1160 } | |
1161 | |
1162 void Assembler::cdql() { | |
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1163 emit_int8((unsigned char)0x99); |
304 | 1164 } |
1165 | |
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1166 void Assembler::cld() { |
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1167 emit_int8((unsigned char)0xFC); |
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1168 } |
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1169 |
304 | 1170 void Assembler::cmovl(Condition cc, Register dst, Register src) { |
1171 NOT_LP64(guarantee(VM_Version::supports_cmov(), "illegal instruction")); | |
1172 int encode = prefix_and_encode(dst->encoding(), src->encoding()); | |
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1173 emit_int8(0x0F); |
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1174 emit_int8(0x40 | cc); |
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1175 emit_int8((unsigned char)(0xC0 | encode)); |
304 | 1176 } |
1177 | |
1178 | |
1179 void Assembler::cmovl(Condition cc, Register dst, Address src) { | |
1180 NOT_LP64(guarantee(VM_Version::supports_cmov(), "illegal instruction")); | |
1181 prefix(src, dst); | |
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1182 emit_int8(0x0F); |
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1183 emit_int8(0x40 | cc); |
304 | 1184 emit_operand(dst, src); |
1185 } | |
1186 | |
1187 void Assembler::cmpb(Address dst, int imm8) { | |
1188 InstructionMark im(this); | |
1189 prefix(dst); | |
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1190 emit_int8((unsigned char)0x80); |
304 | 1191 emit_operand(rdi, dst, 1); |
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1192 emit_int8(imm8); |
304 | 1193 } |
1194 | |
1195 void Assembler::cmpl(Address dst, int32_t imm32) { | |
1196 InstructionMark im(this); | |
1197 prefix(dst); | |
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1198 emit_int8((unsigned char)0x81); |
304 | 1199 emit_operand(rdi, dst, 4); |
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1200 emit_int32(imm32); |
304 | 1201 } |
1202 | |
1203 void Assembler::cmpl(Register dst, int32_t imm32) { | |
1204 prefix(dst); | |
1205 emit_arith(0x81, 0xF8, dst, imm32); | |
1206 } | |
1207 | |
1208 void Assembler::cmpl(Register dst, Register src) { | |
1209 (void) prefix_and_encode(dst->encoding(), src->encoding()); | |
1210 emit_arith(0x3B, 0xC0, dst, src); | |
1211 } | |
1212 | |
1213 | |
1214 void Assembler::cmpl(Register dst, Address src) { | |
1215 InstructionMark im(this); | |
1216 prefix(src, dst); | |
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1217 emit_int8((unsigned char)0x3B); |
304 | 1218 emit_operand(dst, src); |
1219 } | |
1220 | |
1221 void Assembler::cmpw(Address dst, int imm16) { | |
1222 InstructionMark im(this); | |
1223 assert(!dst.base_needs_rex() && !dst.index_needs_rex(), "no extended registers"); | |
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1224 emit_int8(0x66); |
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1225 emit_int8((unsigned char)0x81); |
304 | 1226 emit_operand(rdi, dst, 2); |
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1227 emit_int16(imm16); |
304 | 1228 } |
1229 | |
1230 // The 32-bit cmpxchg compares the value at adr with the contents of rax, | |
1231 // and stores reg into adr if so; otherwise, the value at adr is loaded into rax,. | |
1232 // The ZF is set if the compared values were equal, and cleared otherwise. | |
1233 void Assembler::cmpxchgl(Register reg, Address adr) { // cmpxchg | |
6834 | 1234 InstructionMark im(this); |
1235 prefix(adr, reg); | |
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1236 emit_int8(0x0F); |
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1237 emit_int8((unsigned char)0xB1); |
6834 | 1238 emit_operand(reg, adr); |
304 | 1239 } |
1240 | |
1241 void Assembler::comisd(XMMRegister dst, Address src) { | |
1242 // NOTE: dbx seems to decode this as comiss even though the | |
1243 // 0x66 is there. Strangly ucomisd comes out correct | |
1244 NOT_LP64(assert(VM_Version::supports_sse2(), "")); | |
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1245 emit_simd_arith_nonds(0x2F, dst, src, VEX_SIMD_66); |
4759 | 1246 } |
1247 | |
1248 void Assembler::comisd(XMMRegister dst, XMMRegister src) { | |
1249 NOT_LP64(assert(VM_Version::supports_sse2(), "")); | |
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1250 emit_simd_arith_nonds(0x2F, dst, src, VEX_SIMD_66); |
304 | 1251 } |
1252 | |
1253 void Assembler::comiss(XMMRegister dst, Address src) { | |
1254 NOT_LP64(assert(VM_Version::supports_sse(), "")); | |
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1255 emit_simd_arith_nonds(0x2F, dst, src, VEX_SIMD_NONE); |
304 | 1256 } |
1257 | |
4759 | 1258 void Assembler::comiss(XMMRegister dst, XMMRegister src) { |
1259 NOT_LP64(assert(VM_Version::supports_sse(), "")); | |
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1260 emit_simd_arith_nonds(0x2F, dst, src, VEX_SIMD_NONE); |
4759 | 1261 } |
1262 | |
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1263 void Assembler::cpuid() { |
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1264 emit_int8(0x0F); |
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1265 emit_int8((unsigned char)0xA2); |
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1266 } |
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1267 |
304 | 1268 void Assembler::cvtdq2pd(XMMRegister dst, XMMRegister src) { |
1269 NOT_LP64(assert(VM_Version::supports_sse2(), "")); | |
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1270 emit_simd_arith_nonds(0xE6, dst, src, VEX_SIMD_F3); |
304 | 1271 } |
1272 | |
1273 void Assembler::cvtdq2ps(XMMRegister dst, XMMRegister src) { | |
1274 NOT_LP64(assert(VM_Version::supports_sse2(), "")); | |
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1275 emit_simd_arith_nonds(0x5B, dst, src, VEX_SIMD_NONE); |
304 | 1276 } |
1277 | |
1278 void Assembler::cvtsd2ss(XMMRegister dst, XMMRegister src) { | |
1279 NOT_LP64(assert(VM_Version::supports_sse2(), "")); | |
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1280 emit_simd_arith(0x5A, dst, src, VEX_SIMD_F2); |
304 | 1281 } |
1282 | |
4759 | 1283 void Assembler::cvtsd2ss(XMMRegister dst, Address src) { |
1284 NOT_LP64(assert(VM_Version::supports_sse2(), "")); | |
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1285 emit_simd_arith(0x5A, dst, src, VEX_SIMD_F2); |
4759 | 1286 } |
1287 | |
304 | 1288 void Assembler::cvtsi2sdl(XMMRegister dst, Register src) { |
1289 NOT_LP64(assert(VM_Version::supports_sse2(), "")); | |
4759 | 1290 int encode = simd_prefix_and_encode(dst, dst, src, VEX_SIMD_F2); |
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1291 emit_int8(0x2A); |
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1292 emit_int8((unsigned char)(0xC0 | encode)); |
304 | 1293 } |
1294 | |
4759 | 1295 void Assembler::cvtsi2sdl(XMMRegister dst, Address src) { |
1296 NOT_LP64(assert(VM_Version::supports_sse2(), "")); | |
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1297 emit_simd_arith(0x2A, dst, src, VEX_SIMD_F2); |
4759 | 1298 } |
1299 | |
304 | 1300 void Assembler::cvtsi2ssl(XMMRegister dst, Register src) { |
1301 NOT_LP64(assert(VM_Version::supports_sse(), "")); | |
4759 | 1302 int encode = simd_prefix_and_encode(dst, dst, src, VEX_SIMD_F3); |
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1303 emit_int8(0x2A); |
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1304 emit_int8((unsigned char)(0xC0 | encode)); |
304 | 1305 } |
1306 | |
4759 | 1307 void Assembler::cvtsi2ssl(XMMRegister dst, Address src) { |
1308 NOT_LP64(assert(VM_Version::supports_sse(), "")); | |
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1309 emit_simd_arith(0x2A, dst, src, VEX_SIMD_F3); |
4759 | 1310 } |
1311 | |
304 | 1312 void Assembler::cvtss2sd(XMMRegister dst, XMMRegister src) { |
1313 NOT_LP64(assert(VM_Version::supports_sse2(), "")); | |
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1314 emit_simd_arith(0x5A, dst, src, VEX_SIMD_F3); |
304 | 1315 } |
1316 | |
4759 | 1317 void Assembler::cvtss2sd(XMMRegister dst, Address src) { |
1318 NOT_LP64(assert(VM_Version::supports_sse2(), "")); | |
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1319 emit_simd_arith(0x5A, dst, src, VEX_SIMD_F3); |
4759 | 1320 } |
1321 | |
1322 | |
304 | 1323 void Assembler::cvttsd2sil(Register dst, XMMRegister src) { |
1324 NOT_LP64(assert(VM_Version::supports_sse2(), "")); | |
4759 | 1325 int encode = simd_prefix_and_encode(dst, src, VEX_SIMD_F2); |
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1326 emit_int8(0x2C); |
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1327 emit_int8((unsigned char)(0xC0 | encode)); |
304 | 1328 } |
1329 | |
1330 void Assembler::cvttss2sil(Register dst, XMMRegister src) { | |
1331 NOT_LP64(assert(VM_Version::supports_sse(), "")); | |
4759 | 1332 int encode = simd_prefix_and_encode(dst, src, VEX_SIMD_F3); |
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1333 emit_int8(0x2C); |
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1334 emit_int8((unsigned char)(0xC0 | encode)); |
304 | 1335 } |
1336 | |
1337 void Assembler::decl(Address dst) { | |
1338 // Don't use it directly. Use MacroAssembler::decrement() instead. | |
1339 InstructionMark im(this); | |
1340 prefix(dst); | |
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1341 emit_int8((unsigned char)0xFF); |
304 | 1342 emit_operand(rcx, dst); |
1343 } | |
1344 | |
1345 void Assembler::divsd(XMMRegister dst, Address src) { | |
1346 NOT_LP64(assert(VM_Version::supports_sse2(), "")); | |
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1347 emit_simd_arith(0x5E, dst, src, VEX_SIMD_F2); |
304 | 1348 } |
1349 | |
1350 void Assembler::divsd(XMMRegister dst, XMMRegister src) { | |
1351 NOT_LP64(assert(VM_Version::supports_sse2(), "")); | |
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1352 emit_simd_arith(0x5E, dst, src, VEX_SIMD_F2); |
304 | 1353 } |
1354 | |
1355 void Assembler::divss(XMMRegister dst, Address src) { | |
1356 NOT_LP64(assert(VM_Version::supports_sse(), "")); | |
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1357 emit_simd_arith(0x5E, dst, src, VEX_SIMD_F3); |
304 | 1358 } |
1359 | |
1360 void Assembler::divss(XMMRegister dst, XMMRegister src) { | |
1361 NOT_LP64(assert(VM_Version::supports_sse(), "")); | |
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1362 emit_simd_arith(0x5E, dst, src, VEX_SIMD_F3); |
304 | 1363 } |
1364 | |
1365 void Assembler::emms() { | |
1366 NOT_LP64(assert(VM_Version::supports_mmx(), "")); | |
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1367 emit_int8(0x0F); |
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1368 emit_int8(0x77); |
304 | 1369 } |
1370 | |
1371 void Assembler::hlt() { | |
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1372 emit_int8((unsigned char)0xF4); |
304 | 1373 } |
1374 | |
1375 void Assembler::idivl(Register src) { | |
1376 int encode = prefix_and_encode(src->encoding()); | |
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1377 emit_int8((unsigned char)0xF7); |
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1378 emit_int8((unsigned char)(0xF8 | encode)); |
304 | 1379 } |
1380 | |
1920 | 1381 void Assembler::divl(Register src) { // Unsigned |
1382 int encode = prefix_and_encode(src->encoding()); | |
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1383 emit_int8((unsigned char)0xF7); |
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1384 emit_int8((unsigned char)(0xF0 | encode)); |
1920 | 1385 } |
1386 | |
304 | 1387 void Assembler::imull(Register dst, Register src) { |
1388 int encode = prefix_and_encode(dst->encoding(), src->encoding()); | |
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1389 emit_int8(0x0F); |
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1390 emit_int8((unsigned char)0xAF); |
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1391 emit_int8((unsigned char)(0xC0 | encode)); |
304 | 1392 } |
1393 | |
1394 | |
1395 void Assembler::imull(Register dst, Register src, int value) { | |
1396 int encode = prefix_and_encode(dst->encoding(), src->encoding()); | |
1397 if (is8bit(value)) { | |
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1398 emit_int8(0x6B); |
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1399 emit_int8((unsigned char)(0xC0 | encode)); |
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1400 emit_int8(value & 0xFF); |
304 | 1401 } else { |
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1402 emit_int8(0x69); |
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1403 emit_int8((unsigned char)(0xC0 | encode)); |
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1404 emit_int32(value); |
304 | 1405 } |
1406 } | |
1407 | |
1408 void Assembler::incl(Address dst) { | |
1409 // Don't use it directly. Use MacroAssembler::increment() instead. | |
1410 InstructionMark im(this); | |
1411 prefix(dst); | |
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1412 emit_int8((unsigned char)0xFF); |
304 | 1413 emit_operand(rax, dst); |
1414 } | |
1415 | |
3851 | 1416 void Assembler::jcc(Condition cc, Label& L, bool maybe_short) { |
1417 InstructionMark im(this); | |
304 | 1418 assert((0 <= cc) && (cc < 16), "illegal cc"); |
1419 if (L.is_bound()) { | |
1420 address dst = target(L); | |
1421 assert(dst != NULL, "jcc most probably wrong"); | |
1422 | |
1423 const int short_size = 2; | |
1424 const int long_size = 6; | |
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1425 intptr_t offs = (intptr_t)dst - (intptr_t)pc(); |
3851 | 1426 if (maybe_short && is8bit(offs - short_size)) { |
304 | 1427 // 0111 tttn #8-bit disp |
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1428 emit_int8(0x70 | cc); |
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1429 emit_int8((offs - short_size) & 0xFF); |
304 | 1430 } else { |
1431 // 0000 1111 1000 tttn #32-bit disp | |
1432 assert(is_simm32(offs - long_size), | |
1433 "must be 32bit offset (call4)"); | |
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1434 emit_int8(0x0F); |
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1435 emit_int8((unsigned char)(0x80 | cc)); |
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1436 emit_int32(offs - long_size); |
304 | 1437 } |
1438 } else { | |
1439 // Note: could eliminate cond. jumps to this jump if condition | |
1440 // is the same however, seems to be rather unlikely case. | |
1441 // Note: use jccb() if label to be bound is very close to get | |
1442 // an 8-bit displacement | |
1443 L.add_patch_at(code(), locator()); | |
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1444 emit_int8(0x0F); |
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1445 emit_int8((unsigned char)(0x80 | cc)); |
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1446 emit_int32(0); |
304 | 1447 } |
1448 } | |
1449 | |
1450 void Assembler::jccb(Condition cc, Label& L) { | |
1451 if (L.is_bound()) { | |
1452 const int short_size = 2; | |
1453 address entry = target(L); | |
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1454 #ifdef ASSERT |
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1455 intptr_t dist = (intptr_t)entry - ((intptr_t)pc() + short_size); |
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1456 intptr_t delta = short_branch_delta(); |
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1457 if (delta != 0) { |
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1458 dist += (dist < 0 ? (-delta) :delta); |
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1459 } |
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1460 assert(is8bit(dist), "Dispacement too large for a short jmp"); |
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1461 #endif |
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1462 intptr_t offs = (intptr_t)entry - (intptr_t)pc(); |
304 | 1463 // 0111 tttn #8-bit disp |
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1464 emit_int8(0x70 | cc); |
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1465 emit_int8((offs - short_size) & 0xFF); |
304 | 1466 } else { |
1467 InstructionMark im(this); | |
1468 L.add_patch_at(code(), locator()); | |
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1469 emit_int8(0x70 | cc); |
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1470 emit_int8(0); |
304 | 1471 } |
1472 } | |
1473 | |
1474 void Assembler::jmp(Address adr) { | |
1475 InstructionMark im(this); | |
1476 prefix(adr); | |
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1477 emit_int8((unsigned char)0xFF); |
304 | 1478 emit_operand(rsp, adr); |
1479 } | |
1480 | |
3851 | 1481 void Assembler::jmp(Label& L, bool maybe_short) { |
304 | 1482 if (L.is_bound()) { |
1483 address entry = target(L); | |
1484 assert(entry != NULL, "jmp most probably wrong"); | |
1485 InstructionMark im(this); | |
1486 const int short_size = 2; | |
1487 const int long_size = 5; | |
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1488 intptr_t offs = entry - pc(); |
3851 | 1489 if (maybe_short && is8bit(offs - short_size)) { |
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1490 emit_int8((unsigned char)0xEB); |
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1491 emit_int8((offs - short_size) & 0xFF); |
304 | 1492 } else { |
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1493 emit_int8((unsigned char)0xE9); |
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1494 emit_int32(offs - long_size); |
304 | 1495 } |
1496 } else { | |
1497 // By default, forward jumps are always 32-bit displacements, since | |
1498 // we can't yet know where the label will be bound. If you're sure that | |
1499 // the forward jump will not run beyond 256 bytes, use jmpb to | |
1500 // force an 8-bit displacement. | |
1501 InstructionMark im(this); | |
1502 L.add_patch_at(code(), locator()); | |
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1503 emit_int8((unsigned char)0xE9); |
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1504 emit_int32(0); |
304 | 1505 } |
1506 } | |
1507 | |
1508 void Assembler::jmp(Register entry) { | |
1509 int encode = prefix_and_encode(entry->encoding()); | |
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1510 emit_int8((unsigned char)0xFF); |
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1511 emit_int8((unsigned char)(0xE0 | encode)); |
304 | 1512 } |
1513 | |
1514 void Assembler::jmp_literal(address dest, RelocationHolder const& rspec) { | |
1515 InstructionMark im(this); | |
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1516 emit_int8((unsigned char)0xE9); |
304 | 1517 assert(dest != NULL, "must have a target"); |
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1518 intptr_t disp = dest - (pc() + sizeof(int32_t)); |
304 | 1519 assert(is_simm32(disp), "must be 32bit offset (jmp)"); |
1520 emit_data(disp, rspec.reloc(), call32_operand); | |
1521 } | |
1522 | |
1523 void Assembler::jmpb(Label& L) { | |
1524 if (L.is_bound()) { | |
1525 const int short_size = 2; | |
1526 address entry = target(L); | |
1527 assert(entry != NULL, "jmp most probably wrong"); | |
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1528 #ifdef ASSERT |
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1529 intptr_t dist = (intptr_t)entry - ((intptr_t)pc() + short_size); |
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1530 intptr_t delta = short_branch_delta(); |
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1531 if (delta != 0) { |
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1532 dist += (dist < 0 ? (-delta) :delta); |
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1533 } |
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1534 assert(is8bit(dist), "Dispacement too large for a short jmp"); |
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1535 #endif |
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1536 intptr_t offs = entry - pc(); |
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1537 emit_int8((unsigned char)0xEB); |
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1538 emit_int8((offs - short_size) & 0xFF); |
304 | 1539 } else { |
1540 InstructionMark im(this); | |
1541 L.add_patch_at(code(), locator()); | |
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1542 emit_int8((unsigned char)0xEB); |
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1543 emit_int8(0); |
304 | 1544 } |
1545 } | |
1546 | |
1547 void Assembler::ldmxcsr( Address src) { | |
1548 NOT_LP64(assert(VM_Version::supports_sse(), "")); | |
1549 InstructionMark im(this); | |
1550 prefix(src); | |
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1551 emit_int8(0x0F); |
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1552 emit_int8((unsigned char)0xAE); |
304 | 1553 emit_operand(as_Register(2), src); |
1554 } | |
1555 | |
1556 void Assembler::leal(Register dst, Address src) { | |
1557 InstructionMark im(this); | |
1558 #ifdef _LP64 | |
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1559 emit_int8(0x67); // addr32 |
304 | 1560 prefix(src, dst); |
1561 #endif // LP64 | |
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1562 emit_int8((unsigned char)0x8D); |
304 | 1563 emit_operand(dst, src); |
1564 } | |
1565 | |
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1566 void Assembler::lfence() { |
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1567 emit_int8(0x0F); |
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1568 emit_int8((unsigned char)0xAE); |
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1569 emit_int8((unsigned char)0xE8); |
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1570 } |
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1571 |
304 | 1572 void Assembler::lock() { |
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1573 emit_int8((unsigned char)0xF0); |
304 | 1574 } |
1575 | |
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1576 void Assembler::lzcntl(Register dst, Register src) { |
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1577 assert(VM_Version::supports_lzcnt(), "encoding is treated as BSR"); |
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1578 emit_int8((unsigned char)0xF3); |
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1579 int encode = prefix_and_encode(dst->encoding(), src->encoding()); |
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1580 emit_int8(0x0F); |
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1581 emit_int8((unsigned char)0xBD); |
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1582 emit_int8((unsigned char)(0xC0 | encode)); |
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1583 } |
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1584 |
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1585 // Emit mfence instruction |
304 | 1586 void Assembler::mfence() { |
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1587 NOT_LP64(assert(VM_Version::supports_sse2(), "unsupported");) |
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1588 emit_int8(0x0F); |
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1589 emit_int8((unsigned char)0xAE); |
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1590 emit_int8((unsigned char)0xF0); |
304 | 1591 } |
1592 | |
1593 void Assembler::mov(Register dst, Register src) { | |
1594 LP64_ONLY(movq(dst, src)) NOT_LP64(movl(dst, src)); | |
1595 } | |
1596 | |
1597 void Assembler::movapd(XMMRegister dst, XMMRegister src) { | |
1598 NOT_LP64(assert(VM_Version::supports_sse2(), "")); | |
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1599 emit_simd_arith_nonds(0x28, dst, src, VEX_SIMD_66); |
304 | 1600 } |
1601 | |
1602 void Assembler::movaps(XMMRegister dst, XMMRegister src) { | |
1603 NOT_LP64(assert(VM_Version::supports_sse(), "")); | |
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1604 emit_simd_arith_nonds(0x28, dst, src, VEX_SIMD_NONE); |
304 | 1605 } |
1606 | |
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1607 void Assembler::movlhps(XMMRegister dst, XMMRegister src) { |
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1608 NOT_LP64(assert(VM_Version::supports_sse(), "")); |
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1609 int encode = simd_prefix_and_encode(dst, src, src, VEX_SIMD_NONE); |
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1610 emit_int8(0x16); |
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1611 emit_int8((unsigned char)(0xC0 | encode)); |
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1612 } |
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1613 |
304 | 1614 void Assembler::movb(Register dst, Address src) { |
1615 NOT_LP64(assert(dst->has_byte_register(), "must have byte register")); | |
1616 InstructionMark im(this); | |
1617 prefix(src, dst, true); | |
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1618 emit_int8((unsigned char)0x8A); |
304 | 1619 emit_operand(dst, src); |
1620 } | |
1621 | |
1622 | |
1623 void Assembler::movb(Address dst, int imm8) { | |
1624 InstructionMark im(this); | |
1625 prefix(dst); | |
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1626 emit_int8((unsigned char)0xC6); |
304 | 1627 emit_operand(rax, dst, 1); |
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1628 emit_int8(imm8); |
304 | 1629 } |
1630 | |
1631 | |
1632 void Assembler::movb(Address dst, Register src) { | |
1633 assert(src->has_byte_register(), "must have byte register"); | |
1634 InstructionMark im(this); | |
1635 prefix(dst, src, true); | |
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1636 emit_int8((unsigned char)0x88); |
304 | 1637 emit_operand(src, dst); |
1638 } | |
1639 | |
1640 void Assembler::movdl(XMMRegister dst, Register src) { | |
1641 NOT_LP64(assert(VM_Version::supports_sse2(), "")); | |
4759 | 1642 int encode = simd_prefix_and_encode(dst, src, VEX_SIMD_66); |
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1643 emit_int8(0x6E); |
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1644 emit_int8((unsigned char)(0xC0 | encode)); |
304 | 1645 } |
1646 | |
1647 void Assembler::movdl(Register dst, XMMRegister src) { | |
1648 NOT_LP64(assert(VM_Version::supports_sse2(), "")); | |
1649 // swap src/dst to get correct prefix | |
4759 | 1650 int encode = simd_prefix_and_encode(src, dst, VEX_SIMD_66); |
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1651 emit_int8(0x7E); |
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1652 emit_int8((unsigned char)(0xC0 | encode)); |
304 | 1653 } |
1654 | |
2320
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1655 void Assembler::movdl(XMMRegister dst, Address src) { |
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1656 NOT_LP64(assert(VM_Version::supports_sse2(), "")); |
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1657 InstructionMark im(this); |
4759 | 1658 simd_prefix(dst, src, VEX_SIMD_66); |
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1659 emit_int8(0x6E); |
2320
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1660 emit_operand(dst, src); |
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1661 } |
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1662 |
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1663 void Assembler::movdl(Address dst, XMMRegister src) { |
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1664 NOT_LP64(assert(VM_Version::supports_sse2(), "")); |
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1665 InstructionMark im(this); |
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1666 simd_prefix(dst, src, VEX_SIMD_66); |
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1667 emit_int8(0x7E); |
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1668 emit_operand(src, dst); |
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1669 } |
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1670 |
304 | 1671 void Assembler::movdqa(XMMRegister dst, XMMRegister src) { |
1672 NOT_LP64(assert(VM_Version::supports_sse2(), "")); | |
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1673 emit_simd_arith_nonds(0x6F, dst, src, VEX_SIMD_66); |
304 | 1674 } |
1675 | |
405 | 1676 void Assembler::movdqu(XMMRegister dst, Address src) { |
1677 NOT_LP64(assert(VM_Version::supports_sse2(), "")); | |
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1678 emit_simd_arith_nonds(0x6F, dst, src, VEX_SIMD_F3); |
405 | 1679 } |
1680 | |
1681 void Assembler::movdqu(XMMRegister dst, XMMRegister src) { | |
1682 NOT_LP64(assert(VM_Version::supports_sse2(), "")); | |
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1683 emit_simd_arith_nonds(0x6F, dst, src, VEX_SIMD_F3); |
405 | 1684 } |
1685 | |
1686 void Assembler::movdqu(Address dst, XMMRegister src) { | |
1687 NOT_LP64(assert(VM_Version::supports_sse2(), "")); | |
1688 InstructionMark im(this); | |
4759 | 1689 simd_prefix(dst, src, VEX_SIMD_F3); |
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1690 emit_int8(0x7F); |
405 | 1691 emit_operand(src, dst); |
1692 } | |
1693 | |
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1694 // Move Unaligned 256bit Vector |
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1695 void Assembler::vmovdqu(XMMRegister dst, XMMRegister src) { |
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1696 assert(UseAVX, ""); |
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1697 bool vector256 = true; |
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1698 int encode = vex_prefix_and_encode(dst, xnoreg, src, VEX_SIMD_F3, vector256); |
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1699 emit_int8(0x6F); |
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1700 emit_int8((unsigned char)(0xC0 | encode)); |
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1701 } |
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1702 |
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1703 void Assembler::vmovdqu(XMMRegister dst, Address src) { |
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1704 assert(UseAVX, ""); |
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1705 InstructionMark im(this); |
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1706 bool vector256 = true; |
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1707 vex_prefix(dst, xnoreg, src, VEX_SIMD_F3, vector256); |
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1708 emit_int8(0x6F); |
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1709 emit_operand(dst, src); |
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1710 } |
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1711 |
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1712 void Assembler::vmovdqu(Address dst, XMMRegister src) { |
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1713 assert(UseAVX, ""); |
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1714 InstructionMark im(this); |
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1715 bool vector256 = true; |
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1716 // swap src<->dst for encoding |
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1717 assert(src != xnoreg, "sanity"); |
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1718 vex_prefix(src, xnoreg, dst, VEX_SIMD_F3, vector256); |
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1719 emit_int8(0x7F); |
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1720 emit_operand(src, dst); |
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1721 } |
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1722 |
304 | 1723 // Uses zero extension on 64bit |
1724 | |
1725 void Assembler::movl(Register dst, int32_t imm32) { | |
1726 int encode = prefix_and_encode(dst->encoding()); | |
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1727 emit_int8((unsigned char)(0xB8 | encode)); |
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1728 emit_int32(imm32); |
304 | 1729 } |
1730 | |
1731 void Assembler::movl(Register dst, Register src) { | |
1732 int encode = prefix_and_encode(dst->encoding(), src->encoding()); | |
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1733 emit_int8((unsigned char)0x8B); |
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1734 emit_int8((unsigned char)(0xC0 | encode)); |
304 | 1735 } |
1736 | |
1737 void Assembler::movl(Register dst, Address src) { | |
1738 InstructionMark im(this); | |
1739 prefix(src, dst); | |
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1740 emit_int8((unsigned char)0x8B); |
304 | 1741 emit_operand(dst, src); |
1742 } | |
1743 | |
1744 void Assembler::movl(Address dst, int32_t imm32) { | |
1745 InstructionMark im(this); | |
1746 prefix(dst); | |
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1747 emit_int8((unsigned char)0xC7); |
304 | 1748 emit_operand(rax, dst, 4); |
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1749 emit_int32(imm32); |
304 | 1750 } |
1751 | |
1752 void Assembler::movl(Address dst, Register src) { | |
1753 InstructionMark im(this); | |
1754 prefix(dst, src); | |
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1755 emit_int8((unsigned char)0x89); |
304 | 1756 emit_operand(src, dst); |
1757 } | |
1758 | |
1759 // New cpus require to use movsd and movss to avoid partial register stall | |
1760 // when loading from memory. But for old Opteron use movlpd instead of movsd. | |
1761 // The selection is done in MacroAssembler::movdbl() and movflt(). | |
1762 void Assembler::movlpd(XMMRegister dst, Address src) { | |
1763 NOT_LP64(assert(VM_Version::supports_sse2(), "")); | |
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1764 emit_simd_arith(0x12, dst, src, VEX_SIMD_66); |
304 | 1765 } |
1766 | |
1767 void Assembler::movq( MMXRegister dst, Address src ) { | |
1768 assert( VM_Version::supports_mmx(), "" ); | |
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1769 emit_int8(0x0F); |
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1770 emit_int8(0x6F); |
304 | 1771 emit_operand(dst, src); |
1772 } | |
1773 | |
1774 void Assembler::movq( Address dst, MMXRegister src ) { | |
1775 assert( VM_Version::supports_mmx(), "" ); | |
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1776 emit_int8(0x0F); |
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1777 emit_int8(0x7F); |
304 | 1778 // workaround gcc (3.2.1-7a) bug |
1779 // In that version of gcc with only an emit_operand(MMX, Address) | |
1780 // gcc will tail jump and try and reverse the parameters completely | |
1781 // obliterating dst in the process. By having a version available | |
1782 // that doesn't need to swap the args at the tail jump the bug is | |
1783 // avoided. | |
1784 emit_operand(dst, src); | |
1785 } | |
1786 | |
1787 void Assembler::movq(XMMRegister dst, Address src) { | |
1788 NOT_LP64(assert(VM_Version::supports_sse2(), "")); | |
1789 InstructionMark im(this); | |
4759 | 1790 simd_prefix(dst, src, VEX_SIMD_F3); |
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1791 emit_int8(0x7E); |
304 | 1792 emit_operand(dst, src); |
1793 } | |
1794 | |
1795 void Assembler::movq(Address dst, XMMRegister src) { | |
1796 NOT_LP64(assert(VM_Version::supports_sse2(), "")); | |
1797 InstructionMark im(this); | |
4759 | 1798 simd_prefix(dst, src, VEX_SIMD_66); |
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1799 emit_int8((unsigned char)0xD6); |
304 | 1800 emit_operand(src, dst); |
1801 } | |
1802 | |
1803 void Assembler::movsbl(Register dst, Address src) { // movsxb | |
1804 InstructionMark im(this); | |
1805 prefix(src, dst); | |
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1806 emit_int8(0x0F); |
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1807 emit_int8((unsigned char)0xBE); |
304 | 1808 emit_operand(dst, src); |
1809 } | |
1810 | |
1811 void Assembler::movsbl(Register dst, Register src) { // movsxb | |
1812 NOT_LP64(assert(src->has_byte_register(), "must have byte register")); | |
1813 int encode = prefix_and_encode(dst->encoding(), src->encoding(), true); | |
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1814 emit_int8(0x0F); |
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1815 emit_int8((unsigned char)0xBE); |
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1816 emit_int8((unsigned char)(0xC0 | encode)); |
304 | 1817 } |
1818 | |
1819 void Assembler::movsd(XMMRegister dst, XMMRegister src) { | |
1820 NOT_LP64(assert(VM_Version::supports_sse2(), "")); | |
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1821 emit_simd_arith(0x10, dst, src, VEX_SIMD_F2); |
304 | 1822 } |
1823 | |
1824 void Assembler::movsd(XMMRegister dst, Address src) { | |
1825 NOT_LP64(assert(VM_Version::supports_sse2(), "")); | |
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1826 emit_simd_arith_nonds(0x10, dst, src, VEX_SIMD_F2); |
304 | 1827 } |
1828 | |
1829 void Assembler::movsd(Address dst, XMMRegister src) { | |
1830 NOT_LP64(assert(VM_Version::supports_sse2(), "")); | |
1831 InstructionMark im(this); | |
4759 | 1832 simd_prefix(dst, src, VEX_SIMD_F2); |
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1833 emit_int8(0x11); |
304 | 1834 emit_operand(src, dst); |
1835 } | |
1836 | |
1837 void Assembler::movss(XMMRegister dst, XMMRegister src) { | |
1838 NOT_LP64(assert(VM_Version::supports_sse(), "")); | |
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1839 emit_simd_arith(0x10, dst, src, VEX_SIMD_F3); |
304 | 1840 } |
1841 | |
1842 void Assembler::movss(XMMRegister dst, Address src) { | |
1843 NOT_LP64(assert(VM_Version::supports_sse(), "")); | |
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1844 emit_simd_arith_nonds(0x10, dst, src, VEX_SIMD_F3); |
304 | 1845 } |
1846 | |
1847 void Assembler::movss(Address dst, XMMRegister src) { | |
1848 NOT_LP64(assert(VM_Version::supports_sse(), "")); | |
1849 InstructionMark im(this); | |
4759 | 1850 simd_prefix(dst, src, VEX_SIMD_F3); |
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1851 emit_int8(0x11); |
304 | 1852 emit_operand(src, dst); |
1853 } | |
1854 | |
1855 void Assembler::movswl(Register dst, Address src) { // movsxw | |
1856 InstructionMark im(this); | |
1857 prefix(src, dst); | |
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1858 emit_int8(0x0F); |
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1859 emit_int8((unsigned char)0xBF); |
304 | 1860 emit_operand(dst, src); |
1861 } | |
1862 | |
1863 void Assembler::movswl(Register dst, Register src) { // movsxw | |
1864 int encode = prefix_and_encode(dst->encoding(), src->encoding()); | |
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1865 emit_int8(0x0F); |
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1866 emit_int8((unsigned char)0xBF); |
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1867 emit_int8((unsigned char)(0xC0 | encode)); |
304 | 1868 } |
1869 | |
1870 void Assembler::movw(Address dst, int imm16) { | |
1871 InstructionMark im(this); | |
1872 | |
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1873 emit_int8(0x66); // switch to 16-bit mode |
304 | 1874 prefix(dst); |
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1875 emit_int8((unsigned char)0xC7); |
304 | 1876 emit_operand(rax, dst, 2); |
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1877 emit_int16(imm16); |
304 | 1878 } |
1879 | |
1880 void Assembler::movw(Register dst, Address src) { | |
1881 InstructionMark im(this); | |
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1882 emit_int8(0x66); |
304 | 1883 prefix(src, dst); |
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1884 emit_int8((unsigned char)0x8B); |
304 | 1885 emit_operand(dst, src); |
1886 } | |
1887 | |
1888 void Assembler::movw(Address dst, Register src) { | |
1889 InstructionMark im(this); | |
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1890 emit_int8(0x66); |
304 | 1891 prefix(dst, src); |
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1892 emit_int8((unsigned char)0x89); |
304 | 1893 emit_operand(src, dst); |
1894 } | |
1895 | |
1896 void Assembler::movzbl(Register dst, Address src) { // movzxb | |
1897 InstructionMark im(this); | |
1898 prefix(src, dst); | |
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1899 emit_int8(0x0F); |
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1900 emit_int8((unsigned char)0xB6); |
304 | 1901 emit_operand(dst, src); |
1902 } | |
1903 | |
1904 void Assembler::movzbl(Register dst, Register src) { // movzxb | |
1905 NOT_LP64(assert(src->has_byte_register(), "must have byte register")); | |
1906 int encode = prefix_and_encode(dst->encoding(), src->encoding(), true); | |
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1907 emit_int8(0x0F); |
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1908 emit_int8((unsigned char)0xB6); |
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1909 emit_int8(0xC0 | encode); |
304 | 1910 } |
1911 | |
1912 void Assembler::movzwl(Register dst, Address src) { // movzxw | |
1913 InstructionMark im(this); | |
1914 prefix(src, dst); | |
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1915 emit_int8(0x0F); |
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1916 emit_int8((unsigned char)0xB7); |
304 | 1917 emit_operand(dst, src); |
1918 } | |
1919 | |
1920 void Assembler::movzwl(Register dst, Register src) { // movzxw | |
1921 int encode = prefix_and_encode(dst->encoding(), src->encoding()); | |
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1922 emit_int8(0x0F); |
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1923 emit_int8((unsigned char)0xB7); |
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1924 emit_int8(0xC0 | encode); |
304 | 1925 } |
1926 | |
1927 void Assembler::mull(Address src) { | |
1928 InstructionMark im(this); | |
1929 prefix(src); | |
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1930 emit_int8((unsigned char)0xF7); |
304 | 1931 emit_operand(rsp, src); |
1932 } | |
1933 | |
1934 void Assembler::mull(Register src) { | |
1935 int encode = prefix_and_encode(src->encoding()); | |
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1936 emit_int8((unsigned char)0xF7); |
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1937 emit_int8((unsigned char)(0xE0 | encode)); |
304 | 1938 } |
1939 | |
1940 void Assembler::mulsd(XMMRegister dst, Address src) { | |
1941 NOT_LP64(assert(VM_Version::supports_sse2(), "")); | |
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1942 emit_simd_arith(0x59, dst, src, VEX_SIMD_F2); |
304 | 1943 } |
1944 | |
1945 void Assembler::mulsd(XMMRegister dst, XMMRegister src) { | |
1946 NOT_LP64(assert(VM_Version::supports_sse2(), "")); | |
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1947 emit_simd_arith(0x59, dst, src, VEX_SIMD_F2); |
304 | 1948 } |
1949 | |
1950 void Assembler::mulss(XMMRegister dst, Address src) { | |
1951 NOT_LP64(assert(VM_Version::supports_sse(), "")); | |
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1952 emit_simd_arith(0x59, dst, src, VEX_SIMD_F3); |
304 | 1953 } |
1954 | |
1955 void Assembler::mulss(XMMRegister dst, XMMRegister src) { | |
1956 NOT_LP64(assert(VM_Version::supports_sse(), "")); | |
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1957 emit_simd_arith(0x59, dst, src, VEX_SIMD_F3); |
304 | 1958 } |
1959 | |
1960 void Assembler::negl(Register dst) { | |
1961 int encode = prefix_and_encode(dst->encoding()); | |
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1962 emit_int8((unsigned char)0xF7); |
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1963 emit_int8((unsigned char)(0xD8 | encode)); |
304 | 1964 } |
1965 | |
0 | 1966 void Assembler::nop(int i) { |
304 | 1967 #ifdef ASSERT |
0 | 1968 assert(i > 0, " "); |
304 | 1969 // The fancy nops aren't currently recognized by debuggers making it a |
1970 // pain to disassemble code while debugging. If asserts are on clearly | |
1971 // speed is not an issue so simply use the single byte traditional nop | |
1972 // to do alignment. | |
1973 | |
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1974 for (; i > 0 ; i--) emit_int8((unsigned char)0x90); |
304 | 1975 return; |
1976 | |
1977 #endif // ASSERT | |
1978 | |
0 | 1979 if (UseAddressNop && VM_Version::is_intel()) { |
1980 // | |
1981 // Using multi-bytes nops "0x0F 0x1F [address]" for Intel | |
1982 // 1: 0x90 | |
1983 // 2: 0x66 0x90 | |
1984 // 3: 0x66 0x66 0x90 (don't use "0x0F 0x1F 0x00" - need patching safe padding) | |
1985 // 4: 0x0F 0x1F 0x40 0x00 | |
1986 // 5: 0x0F 0x1F 0x44 0x00 0x00 | |
1987 // 6: 0x66 0x0F 0x1F 0x44 0x00 0x00 | |
1988 // 7: 0x0F 0x1F 0x80 0x00 0x00 0x00 0x00 | |
1989 // 8: 0x0F 0x1F 0x84 0x00 0x00 0x00 0x00 0x00 | |
1990 // 9: 0x66 0x0F 0x1F 0x84 0x00 0x00 0x00 0x00 0x00 | |
1991 // 10: 0x66 0x66 0x0F 0x1F 0x84 0x00 0x00 0x00 0x00 0x00 | |
1992 // 11: 0x66 0x66 0x66 0x0F 0x1F 0x84 0x00 0x00 0x00 0x00 0x00 | |
1993 | |
1994 // The rest coding is Intel specific - don't use consecutive address nops | |
1995 | |
1996 // 12: 0x0F 0x1F 0x84 0x00 0x00 0x00 0x00 0x00 0x66 0x66 0x66 0x90 | |
1997 // 13: 0x66 0x0F 0x1F 0x84 0x00 0x00 0x00 0x00 0x00 0x66 0x66 0x66 0x90 | |
1998 // 14: 0x66 0x66 0x0F 0x1F 0x84 0x00 0x00 0x00 0x00 0x00 0x66 0x66 0x66 0x90 | |
1999 // 15: 0x66 0x66 0x66 0x0F 0x1F 0x84 0x00 0x00 0x00 0x00 0x00 0x66 0x66 0x66 0x90 | |
2000 | |
2001 while(i >= 15) { | |
2002 // For Intel don't generate consecutive addess nops (mix with regular nops) | |
2003 i -= 15; | |
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2004 emit_int8(0x66); // size prefix |
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2005 emit_int8(0x66); // size prefix |
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2006 emit_int8(0x66); // size prefix |
0 | 2007 addr_nop_8(); |
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2008 emit_int8(0x66); // size prefix |
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2009 emit_int8(0x66); // size prefix |
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2010 emit_int8(0x66); // size prefix |
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2011 emit_int8((unsigned char)0x90); |
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2012 // nop |
0 | 2013 } |
2014 switch (i) { | |
2015 case 14: | |
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2016 emit_int8(0x66); // size prefix |
0 | 2017 case 13: |
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2018 emit_int8(0x66); // size prefix |
0 | 2019 case 12: |
2020 addr_nop_8(); | |
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2021 emit_int8(0x66); // size prefix |
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2022 emit_int8(0x66); // size prefix |
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2023 emit_int8(0x66); // size prefix |
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2024 emit_int8((unsigned char)0x90); |
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2025 // nop |
0 | 2026 break; |
2027 case 11: | |
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2028 emit_int8(0x66); // size prefix |
0 | 2029 case 10: |
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2030 emit_int8(0x66); // size prefix |
0 | 2031 case 9: |
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2032 emit_int8(0x66); // size prefix |
0 | 2033 case 8: |
2034 addr_nop_8(); | |
2035 break; | |
2036 case 7: | |
2037 addr_nop_7(); | |
2038 break; | |
2039 case 6: | |
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2040 emit_int8(0x66); // size prefix |
0 | 2041 case 5: |
2042 addr_nop_5(); | |
2043 break; | |
2044 case 4: | |
2045 addr_nop_4(); | |
2046 break; | |
2047 case 3: | |
2048 // Don't use "0x0F 0x1F 0x00" - need patching safe padding | |
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2049 emit_int8(0x66); // size prefix |
0 | 2050 case 2: |
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2051 emit_int8(0x66); // size prefix |
0 | 2052 case 1: |
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2053 emit_int8((unsigned char)0x90); |
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2054 // nop |
0 | 2055 break; |
2056 default: | |
2057 assert(i == 0, " "); | |
2058 } | |
2059 return; | |
2060 } | |
2061 if (UseAddressNop && VM_Version::is_amd()) { | |
2062 // | |
2063 // Using multi-bytes nops "0x0F 0x1F [address]" for AMD. | |
2064 // 1: 0x90 | |
2065 // 2: 0x66 0x90 | |
2066 // 3: 0x66 0x66 0x90 (don't use "0x0F 0x1F 0x00" - need patching safe padding) | |
2067 // 4: 0x0F 0x1F 0x40 0x00 | |
2068 // 5: 0x0F 0x1F 0x44 0x00 0x00 | |
2069 // 6: 0x66 0x0F 0x1F 0x44 0x00 0x00 | |
2070 // 7: 0x0F 0x1F 0x80 0x00 0x00 0x00 0x00 | |
2071 // 8: 0x0F 0x1F 0x84 0x00 0x00 0x00 0x00 0x00 | |
2072 // 9: 0x66 0x0F 0x1F 0x84 0x00 0x00 0x00 0x00 0x00 | |
2073 // 10: 0x66 0x66 0x0F 0x1F 0x84 0x00 0x00 0x00 0x00 0x00 | |
2074 // 11: 0x66 0x66 0x66 0x0F 0x1F 0x84 0x00 0x00 0x00 0x00 0x00 | |
2075 | |
2076 // The rest coding is AMD specific - use consecutive address nops | |
2077 | |
2078 // 12: 0x66 0x0F 0x1F 0x44 0x00 0x00 0x66 0x0F 0x1F 0x44 0x00 0x00 | |
2079 // 13: 0x0F 0x1F 0x80 0x00 0x00 0x00 0x00 0x66 0x0F 0x1F 0x44 0x00 0x00 | |
2080 // 14: 0x0F 0x1F 0x80 0x00 0x00 0x00 0x00 0x0F 0x1F 0x80 0x00 0x00 0x00 0x00 | |
2081 // 15: 0x0F 0x1F 0x84 0x00 0x00 0x00 0x00 0x00 0x0F 0x1F 0x80 0x00 0x00 0x00 0x00 | |
2082 // 16: 0x0F 0x1F 0x84 0x00 0x00 0x00 0x00 0x00 0x0F 0x1F 0x84 0x00 0x00 0x00 0x00 0x00 | |
2083 // Size prefixes (0x66) are added for larger sizes | |
2084 | |
2085 while(i >= 22) { | |
2086 i -= 11; | |
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2087 emit_int8(0x66); // size prefix |
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2088 emit_int8(0x66); // size prefix |
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2089 emit_int8(0x66); // size prefix |
0 | 2090 addr_nop_8(); |
2091 } | |
2092 // Generate first nop for size between 21-12 | |
2093 switch (i) { | |
2094 case 21: | |
2095 i -= 1; | |
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2096 emit_int8(0x66); // size prefix |
0 | 2097 case 20: |
2098 case 19: | |
2099 i -= 1; | |
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2100 emit_int8(0x66); // size prefix |
0 | 2101 case 18: |
2102 case 17: | |
2103 i -= 1; | |
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2104 emit_int8(0x66); // size prefix |
0 | 2105 case 16: |
2106 case 15: | |
2107 i -= 8; | |
2108 addr_nop_8(); | |
2109 break; | |
2110 case 14: | |
2111 case 13: | |
2112 i -= 7; | |
2113 addr_nop_7(); | |
2114 break; | |
2115 case 12: | |
2116 i -= 6; | |
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2117 emit_int8(0x66); // size prefix |
0 | 2118 addr_nop_5(); |
2119 break; | |
2120 default: | |
2121 assert(i < 12, " "); | |
2122 } | |
2123 | |
2124 // Generate second nop for size between 11-1 | |
2125 switch (i) { | |
2126 case 11: | |
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2127 emit_int8(0x66); // size prefix |
0 | 2128 case 10: |
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2129 emit_int8(0x66); // size prefix |
0 | 2130 case 9: |
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2131 emit_int8(0x66); // size prefix |
0 | 2132 case 8: |
2133 addr_nop_8(); | |
2134 break; | |
2135 case 7: | |
2136 addr_nop_7(); | |
2137 break; | |
2138 case 6: | |
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2139 emit_int8(0x66); // size prefix |
0 | 2140 case 5: |
2141 addr_nop_5(); | |
2142 break; | |
2143 case 4: | |
2144 addr_nop_4(); | |
2145 break; | |
2146 case 3: | |
2147 // Don't use "0x0F 0x1F 0x00" - need patching safe padding | |
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2148 emit_int8(0x66); // size prefix |
0 | 2149 case 2: |
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2150 emit_int8(0x66); // size prefix |
0 | 2151 case 1: |
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2152 emit_int8((unsigned char)0x90); |
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|
2153 // nop |
0 | 2154 break; |
2155 default: | |
2156 assert(i == 0, " "); | |
2157 } | |
2158 return; | |
2159 } | |
2160 | |
2161 // Using nops with size prefixes "0x66 0x90". | |
2162 // From AMD Optimization Guide: | |
2163 // 1: 0x90 | |
2164 // 2: 0x66 0x90 | |
2165 // 3: 0x66 0x66 0x90 | |
2166 // 4: 0x66 0x66 0x66 0x90 | |
2167 // 5: 0x66 0x66 0x90 0x66 0x90 | |
2168 // 6: 0x66 0x66 0x90 0x66 0x66 0x90 | |
2169 // 7: 0x66 0x66 0x66 0x90 0x66 0x66 0x90 | |
2170 // 8: 0x66 0x66 0x66 0x90 0x66 0x66 0x66 0x90 | |
2171 // 9: 0x66 0x66 0x90 0x66 0x66 0x90 0x66 0x66 0x90 | |
2172 // 10: 0x66 0x66 0x66 0x90 0x66 0x66 0x90 0x66 0x66 0x90 | |
2173 // | |
2174 while(i > 12) { | |
2175 i -= 4; | |
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2176 emit_int8(0x66); // size prefix |
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2177 emit_int8(0x66); |
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2178 emit_int8(0x66); |
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2179 emit_int8((unsigned char)0x90); |
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|
2180 // nop |
0 | 2181 } |
2182 // 1 - 12 nops | |
2183 if(i > 8) { | |
2184 if(i > 9) { | |
2185 i -= 1; | |
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2186 emit_int8(0x66); |
0 | 2187 } |
2188 i -= 3; | |
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2189 emit_int8(0x66); |
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2190 emit_int8(0x66); |
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2191 emit_int8((unsigned char)0x90); |
0 | 2192 } |
2193 // 1 - 8 nops | |
2194 if(i > 4) { | |
2195 if(i > 6) { | |
2196 i -= 1; | |
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2197 emit_int8(0x66); |
0 | 2198 } |
2199 i -= 3; | |
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2200 emit_int8(0x66); |
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2201 emit_int8(0x66); |
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|
2202 emit_int8((unsigned char)0x90); |
0 | 2203 } |
2204 switch (i) { | |
2205 case 4: | |
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|
2206 emit_int8(0x66); |
0 | 2207 case 3: |
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2208 emit_int8(0x66); |
0 | 2209 case 2: |
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|
2210 emit_int8(0x66); |
0 | 2211 case 1: |
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|
2212 emit_int8((unsigned char)0x90); |
0 | 2213 break; |
2214 default: | |
2215 assert(i == 0, " "); | |
2216 } | |
2217 } | |
2218 | |
304 | 2219 void Assembler::notl(Register dst) { |
2220 int encode = prefix_and_encode(dst->encoding()); | |
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2221 emit_int8((unsigned char)0xF7); |
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2222 emit_int8((unsigned char)(0xD0 | encode)); |
304 | 2223 } |
2224 | |
2225 void Assembler::orl(Address dst, int32_t imm32) { | |
2226 InstructionMark im(this); | |
2227 prefix(dst); | |
2100
b1a2afa37ec4
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2228 emit_arith_operand(0x81, rcx, dst, imm32); |
304 | 2229 } |
2230 | |
2231 void Assembler::orl(Register dst, int32_t imm32) { | |
2232 prefix(dst); | |
2233 emit_arith(0x81, 0xC8, dst, imm32); | |
2234 } | |
2235 | |
2236 void Assembler::orl(Register dst, Address src) { | |
2237 InstructionMark im(this); | |
2238 prefix(src, dst); | |
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2239 emit_int8(0x0B); |
304 | 2240 emit_operand(dst, src); |
2241 } | |
2242 | |
2243 void Assembler::orl(Register dst, Register src) { | |
2244 (void) prefix_and_encode(dst->encoding(), src->encoding()); | |
2245 emit_arith(0x0B, 0xC0, dst, src); | |
2246 } | |
2247 | |
4759 | 2248 void Assembler::packuswb(XMMRegister dst, Address src) { |
2249 NOT_LP64(assert(VM_Version::supports_sse2(), "")); | |
2250 assert((UseAVX > 0), "SSE mode requires address alignment 16 bytes"); | |
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2251 emit_simd_arith(0x67, dst, src, VEX_SIMD_66); |
4759 | 2252 } |
2253 | |
2254 void Assembler::packuswb(XMMRegister dst, XMMRegister src) { | |
2255 NOT_LP64(assert(VM_Version::supports_sse2(), "")); | |
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2256 emit_simd_arith(0x67, dst, src, VEX_SIMD_66); |
4759 | 2257 } |
2258 | |
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2259 void Assembler::vpackuswb(XMMRegister dst, XMMRegister nds, XMMRegister src, bool vector256) { |
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2260 assert(VM_Version::supports_avx() && !vector256 || VM_Version::supports_avx2(), "256 bit integer vectors requires AVX2"); |
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2261 emit_vex_arith(0x67, dst, nds, src, VEX_SIMD_66, vector256); |
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2262 } |
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2263 |
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2264 void Assembler::vpermq(XMMRegister dst, XMMRegister src, int imm8, bool vector256) { |
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2265 assert(VM_Version::supports_avx2(), ""); |
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2266 int encode = simd_prefix_and_encode(dst, xnoreg, src, VEX_SIMD_66, VEX_OPCODE_0F_3A, true, vector256); |
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2267 emit_int8(0x00); |
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2268 emit_int8(0xC0 | encode); |
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|
2269 emit_int8(imm8); |
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2270 } |
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2271 |
681 | 2272 void Assembler::pcmpestri(XMMRegister dst, Address src, int imm8) { |
2273 assert(VM_Version::supports_sse4_2(), ""); | |
4759 | 2274 InstructionMark im(this); |
2275 simd_prefix(dst, src, VEX_SIMD_66, VEX_OPCODE_0F_3A); | |
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2276 emit_int8(0x61); |
681 | 2277 emit_operand(dst, src); |
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|
2278 emit_int8(imm8); |
681 | 2279 } |
2280 | |
2281 void Assembler::pcmpestri(XMMRegister dst, XMMRegister src, int imm8) { | |
2282 assert(VM_Version::supports_sse4_2(), ""); | |
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2283 int encode = simd_prefix_and_encode(dst, xnoreg, src, VEX_SIMD_66, VEX_OPCODE_0F_3A); |
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2284 emit_int8(0x61); |
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|
2285 emit_int8((unsigned char)(0xC0 | encode)); |
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2286 emit_int8(imm8); |
681 | 2287 } |
2288 | |
4759 | 2289 void Assembler::pmovzxbw(XMMRegister dst, Address src) { |
2290 assert(VM_Version::supports_sse4_1(), ""); | |
2291 InstructionMark im(this); | |
2292 simd_prefix(dst, src, VEX_SIMD_66, VEX_OPCODE_0F_38); | |
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2293 emit_int8(0x30); |
4759 | 2294 emit_operand(dst, src); |
2295 } | |
2296 | |
2297 void Assembler::pmovzxbw(XMMRegister dst, XMMRegister src) { | |
2298 assert(VM_Version::supports_sse4_1(), ""); | |
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2299 int encode = simd_prefix_and_encode(dst, xnoreg, src, VEX_SIMD_66, VEX_OPCODE_0F_38); |
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2300 emit_int8(0x30); |
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2301 emit_int8((unsigned char)(0xC0 | encode)); |
4759 | 2302 } |
2303 | |
304 | 2304 // generic |
2305 void Assembler::pop(Register dst) { | |
2306 int encode = prefix_and_encode(dst->encoding()); | |
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2307 emit_int8(0x58 | encode); |
304 | 2308 } |
2309 | |
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2310 void Assembler::popcntl(Register dst, Address src) { |
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2311 assert(VM_Version::supports_popcnt(), "must support"); |
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2312 InstructionMark im(this); |
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2313 emit_int8((unsigned char)0xF3); |
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2314 prefix(src, dst); |
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2315 emit_int8(0x0F); |
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2316 emit_int8((unsigned char)0xB8); |
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2317 emit_operand(dst, src); |
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2318 } |
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2319 |
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2320 void Assembler::popcntl(Register dst, Register src) { |
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2321 assert(VM_Version::supports_popcnt(), "must support"); |
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2322 emit_int8((unsigned char)0xF3); |
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2323 int encode = prefix_and_encode(dst->encoding(), src->encoding()); |
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2324 emit_int8(0x0F); |
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2325 emit_int8((unsigned char)0xB8); |
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2326 emit_int8((unsigned char)(0xC0 | encode)); |
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2327 } |
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2328 |
304 | 2329 void Assembler::popf() { |
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2330 emit_int8((unsigned char)0x9D); |
304 | 2331 } |
2332 | |
1060 | 2333 #ifndef _LP64 // no 32bit push/pop on amd64 |
304 | 2334 void Assembler::popl(Address dst) { |
2335 // NOTE: this will adjust stack by 8byte on 64bits | |
2336 InstructionMark im(this); | |
2337 prefix(dst); | |
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2338 emit_int8((unsigned char)0x8F); |
304 | 2339 emit_operand(rax, dst); |
2340 } | |
1060 | 2341 #endif |
304 | 2342 |
2343 void Assembler::prefetch_prefix(Address src) { | |
2344 prefix(src); | |
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2345 emit_int8(0x0F); |
304 | 2346 } |
2347 | |
2348 void Assembler::prefetchnta(Address src) { | |
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2349 NOT_LP64(assert(VM_Version::supports_sse(), "must support")); |
304 | 2350 InstructionMark im(this); |
2351 prefetch_prefix(src); | |
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|
2352 emit_int8(0x18); |
304 | 2353 emit_operand(rax, src); // 0, src |
2354 } | |
2355 | |
2356 void Assembler::prefetchr(Address src) { | |
3854 | 2357 assert(VM_Version::supports_3dnow_prefetch(), "must support"); |
304 | 2358 InstructionMark im(this); |
2359 prefetch_prefix(src); | |
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2360 emit_int8(0x0D); |
304 | 2361 emit_operand(rax, src); // 0, src |
2362 } | |
2363 | |
2364 void Assembler::prefetcht0(Address src) { | |
2365 NOT_LP64(assert(VM_Version::supports_sse(), "must support")); | |
2366 InstructionMark im(this); | |
2367 prefetch_prefix(src); | |
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2368 emit_int8(0x18); |
304 | 2369 emit_operand(rcx, src); // 1, src |
2370 } | |
2371 | |
2372 void Assembler::prefetcht1(Address src) { | |
2373 NOT_LP64(assert(VM_Version::supports_sse(), "must support")); | |
2374 InstructionMark im(this); | |
2375 prefetch_prefix(src); | |
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2376 emit_int8(0x18); |
304 | 2377 emit_operand(rdx, src); // 2, src |
2378 } | |
2379 | |
2380 void Assembler::prefetcht2(Address src) { | |
2381 NOT_LP64(assert(VM_Version::supports_sse(), "must support")); | |
2382 InstructionMark im(this); | |
2383 prefetch_prefix(src); | |
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2384 emit_int8(0x18); |
304 | 2385 emit_operand(rbx, src); // 3, src |
2386 } | |
2387 | |
2388 void Assembler::prefetchw(Address src) { | |
3854 | 2389 assert(VM_Version::supports_3dnow_prefetch(), "must support"); |
304 | 2390 InstructionMark im(this); |
2391 prefetch_prefix(src); | |
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2392 emit_int8(0x0D); |
304 | 2393 emit_operand(rcx, src); // 1, src |
2394 } | |
2395 | |
2396 void Assembler::prefix(Prefix p) { | |
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2397 emit_int8(p); |
304 | 2398 } |
2399 | |
6894 | 2400 void Assembler::pshufb(XMMRegister dst, XMMRegister src) { |
2401 assert(VM_Version::supports_ssse3(), ""); | |
2402 int encode = simd_prefix_and_encode(dst, dst, src, VEX_SIMD_66, VEX_OPCODE_0F_38); | |
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2403 emit_int8(0x00); |
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2404 emit_int8((unsigned char)(0xC0 | encode)); |
6894 | 2405 } |
2406 | |
2407 void Assembler::pshufb(XMMRegister dst, Address src) { | |
2408 assert(VM_Version::supports_ssse3(), ""); | |
2409 InstructionMark im(this); | |
2410 simd_prefix(dst, dst, src, VEX_SIMD_66, VEX_OPCODE_0F_38); | |
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2411 emit_int8(0x00); |
6894 | 2412 emit_operand(dst, src); |
2413 } | |
2414 | |
304 | 2415 void Assembler::pshufd(XMMRegister dst, XMMRegister src, int mode) { |
2416 assert(isByte(mode), "invalid value"); | |
2417 NOT_LP64(assert(VM_Version::supports_sse2(), "")); | |
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2418 emit_simd_arith_nonds(0x70, dst, src, VEX_SIMD_66); |
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2419 emit_int8(mode & 0xFF); |
304 | 2420 |
2421 } | |
2422 | |
2423 void Assembler::pshufd(XMMRegister dst, Address src, int mode) { | |
2424 assert(isByte(mode), "invalid value"); | |
2425 NOT_LP64(assert(VM_Version::supports_sse2(), "")); | |
4759 | 2426 assert((UseAVX > 0), "SSE mode requires address alignment 16 bytes"); |
2427 InstructionMark im(this); | |
2428 simd_prefix(dst, src, VEX_SIMD_66); | |
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2429 emit_int8(0x70); |
304 | 2430 emit_operand(dst, src); |
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2431 emit_int8(mode & 0xFF); |
304 | 2432 } |
2433 | |
2434 void Assembler::pshuflw(XMMRegister dst, XMMRegister src, int mode) { | |
2435 assert(isByte(mode), "invalid value"); | |
2436 NOT_LP64(assert(VM_Version::supports_sse2(), "")); | |
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2437 emit_simd_arith_nonds(0x70, dst, src, VEX_SIMD_F2); |
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2438 emit_int8(mode & 0xFF); |
304 | 2439 } |
2440 | |
2441 void Assembler::pshuflw(XMMRegister dst, Address src, int mode) { | |
2442 assert(isByte(mode), "invalid value"); | |
2443 NOT_LP64(assert(VM_Version::supports_sse2(), "")); | |
4759 | 2444 assert((UseAVX > 0), "SSE mode requires address alignment 16 bytes"); |
2445 InstructionMark im(this); | |
2446 simd_prefix(dst, src, VEX_SIMD_F2); | |
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|
2447 emit_int8(0x70); |
304 | 2448 emit_operand(dst, src); |
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2449 emit_int8(mode & 0xFF); |
304 | 2450 } |
2451 | |
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2452 void Assembler::psrldq(XMMRegister dst, int shift) { |
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2453 // Shift 128 bit value in xmm register by number of bytes. |
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2454 NOT_LP64(assert(VM_Version::supports_sse2(), "")); |
4759 | 2455 int encode = simd_prefix_and_encode(xmm3, dst, dst, VEX_SIMD_66); |
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2456 emit_int8(0x73); |
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2457 emit_int8((unsigned char)(0xC0 | encode)); |
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2458 emit_int8(shift); |
2320
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2459 } |
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2460 |
681 | 2461 void Assembler::ptest(XMMRegister dst, Address src) { |
2462 assert(VM_Version::supports_sse4_1(), ""); | |
4759 | 2463 assert((UseAVX > 0), "SSE mode requires address alignment 16 bytes"); |
2464 InstructionMark im(this); | |
2465 simd_prefix(dst, src, VEX_SIMD_66, VEX_OPCODE_0F_38); | |
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|
2466 emit_int8(0x17); |
681 | 2467 emit_operand(dst, src); |
2468 } | |
2469 | |
2470 void Assembler::ptest(XMMRegister dst, XMMRegister src) { | |
2471 assert(VM_Version::supports_sse4_1(), ""); | |
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2472 int encode = simd_prefix_and_encode(dst, xnoreg, src, VEX_SIMD_66, VEX_OPCODE_0F_38); |
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2473 emit_int8(0x17); |
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2474 emit_int8((unsigned char)(0xC0 | encode)); |
681 | 2475 } |
2476 | |
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2477 void Assembler::vptest(XMMRegister dst, Address src) { |
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2478 assert(VM_Version::supports_avx(), ""); |
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|
2479 InstructionMark im(this); |
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|
2480 bool vector256 = true; |
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2481 assert(dst != xnoreg, "sanity"); |
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2482 int dst_enc = dst->encoding(); |
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2483 // swap src<->dst for encoding |
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2484 vex_prefix(src, 0, dst_enc, VEX_SIMD_66, VEX_OPCODE_0F_38, false, vector256); |
7477
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|
2485 emit_int8(0x17); |
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|
2486 emit_operand(dst, src); |
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|
2487 } |
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|
2488 |
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2489 void Assembler::vptest(XMMRegister dst, XMMRegister src) { |
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2490 assert(VM_Version::supports_avx(), ""); |
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|
2491 bool vector256 = true; |
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2492 int encode = vex_prefix_and_encode(dst, xnoreg, src, VEX_SIMD_66, vector256, VEX_OPCODE_0F_38); |
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|
2493 emit_int8(0x17); |
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|
2494 emit_int8((unsigned char)(0xC0 | encode)); |
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|
2495 } |
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|
2496 |
4759 | 2497 void Assembler::punpcklbw(XMMRegister dst, Address src) { |
2498 NOT_LP64(assert(VM_Version::supports_sse2(), "")); | |
2499 assert((UseAVX > 0), "SSE mode requires address alignment 16 bytes"); | |
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2500 emit_simd_arith(0x60, dst, src, VEX_SIMD_66); |
4759 | 2501 } |
2502 | |
304 | 2503 void Assembler::punpcklbw(XMMRegister dst, XMMRegister src) { |
2504 NOT_LP64(assert(VM_Version::supports_sse2(), "")); | |
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2505 emit_simd_arith(0x60, dst, src, VEX_SIMD_66); |
304 | 2506 } |
2507 | |
4759 | 2508 void Assembler::punpckldq(XMMRegister dst, Address src) { |
2509 NOT_LP64(assert(VM_Version::supports_sse2(), "")); | |
2510 assert((UseAVX > 0), "SSE mode requires address alignment 16 bytes"); | |
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2511 emit_simd_arith(0x62, dst, src, VEX_SIMD_66); |
4759 | 2512 } |
2513 | |
2514 void Assembler::punpckldq(XMMRegister dst, XMMRegister src) { | |
2515 NOT_LP64(assert(VM_Version::supports_sse2(), "")); | |
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2516 emit_simd_arith(0x62, dst, src, VEX_SIMD_66); |
4759 | 2517 } |
2518 | |
6225 | 2519 void Assembler::punpcklqdq(XMMRegister dst, XMMRegister src) { |
2520 NOT_LP64(assert(VM_Version::supports_sse2(), "")); | |
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2521 emit_simd_arith(0x6C, dst, src, VEX_SIMD_66); |
6225 | 2522 } |
2523 | |
304 | 2524 void Assembler::push(int32_t imm32) { |
2525 // in 64bits we push 64bits onto the stack but only | |
2526 // take a 32bit immediate | |
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2527 emit_int8(0x68); |
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2528 emit_int32(imm32); |
304 | 2529 } |
2530 | |
2531 void Assembler::push(Register src) { | |
2532 int encode = prefix_and_encode(src->encoding()); | |
2533 | |
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2534 emit_int8(0x50 | encode); |
304 | 2535 } |
2536 | |
2537 void Assembler::pushf() { | |
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2538 emit_int8((unsigned char)0x9C); |
304 | 2539 } |
2540 | |
1060 | 2541 #ifndef _LP64 // no 32bit push/pop on amd64 |
304 | 2542 void Assembler::pushl(Address src) { |
2543 // Note this will push 64bit on 64bit | |
2544 InstructionMark im(this); | |
2545 prefix(src); | |
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2546 emit_int8((unsigned char)0xFF); |
304 | 2547 emit_operand(rsi, src); |
2548 } | |
1060 | 2549 #endif |
304 | 2550 |
2551 void Assembler::rcll(Register dst, int imm8) { | |
2552 assert(isShiftCount(imm8), "illegal shift count"); | |
2553 int encode = prefix_and_encode(dst->encoding()); | |
2554 if (imm8 == 1) { | |
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2555 emit_int8((unsigned char)0xD1); |
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2556 emit_int8((unsigned char)(0xD0 | encode)); |
304 | 2557 } else { |
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2558 emit_int8((unsigned char)0xC1); |
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2559 emit_int8((unsigned char)0xD0 | encode); |
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2560 emit_int8(imm8); |
304 | 2561 } |
2562 } | |
2563 | |
2564 // copies data from [esi] to [edi] using rcx pointer sized words | |
2565 // generic | |
2566 void Assembler::rep_mov() { | |
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2567 emit_int8((unsigned char)0xF3); |
304 | 2568 // MOVSQ |
2569 LP64_ONLY(prefix(REX_W)); | |
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2570 emit_int8((unsigned char)0xA5); |
304 | 2571 } |
2572 | |
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2573 // sets rcx bytes with rax, value at [edi] |
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2574 void Assembler::rep_stosb() { |
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2575 emit_int8((unsigned char)0xF3); // REP |
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2576 LP64_ONLY(prefix(REX_W)); |
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2577 emit_int8((unsigned char)0xAA); // STOSB |
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2578 } |
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2579 |
304 | 2580 // sets rcx pointer sized words with rax, value at [edi] |
2581 // generic | |
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2582 void Assembler::rep_stos() { |
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2583 emit_int8((unsigned char)0xF3); // REP |
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2584 LP64_ONLY(prefix(REX_W)); // LP64:STOSQ, LP32:STOSD |
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2585 emit_int8((unsigned char)0xAB); |
304 | 2586 } |
2587 | |
2588 // scans rcx pointer sized words at [edi] for occurance of rax, | |
2589 // generic | |
2590 void Assembler::repne_scan() { // repne_scan | |
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2591 emit_int8((unsigned char)0xF2); |
304 | 2592 // SCASQ |
2593 LP64_ONLY(prefix(REX_W)); | |
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2594 emit_int8((unsigned char)0xAF); |
304 | 2595 } |
2596 | |
2597 #ifdef _LP64 | |
2598 // scans rcx 4 byte words at [edi] for occurance of rax, | |
2599 // generic | |
2600 void Assembler::repne_scanl() { // repne_scan | |
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2601 emit_int8((unsigned char)0xF2); |
304 | 2602 // SCASL |
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2603 emit_int8((unsigned char)0xAF); |
304 | 2604 } |
2605 #endif | |
2606 | |
0 | 2607 void Assembler::ret(int imm16) { |
2608 if (imm16 == 0) { | |
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2609 emit_int8((unsigned char)0xC3); |
0 | 2610 } else { |
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2611 emit_int8((unsigned char)0xC2); |
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2612 emit_int16(imm16); |
0 | 2613 } |
2614 } | |
2615 | |
304 | 2616 void Assembler::sahf() { |
2617 #ifdef _LP64 | |
2618 // Not supported in 64bit mode | |
2619 ShouldNotReachHere(); | |
2620 #endif | |
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2621 emit_int8((unsigned char)0x9E); |
304 | 2622 } |
2623 | |
2624 void Assembler::sarl(Register dst, int imm8) { | |
2625 int encode = prefix_and_encode(dst->encoding()); | |
2626 assert(isShiftCount(imm8), "illegal shift count"); | |
2627 if (imm8 == 1) { | |
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2628 emit_int8((unsigned char)0xD1); |
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2629 emit_int8((unsigned char)(0xF8 | encode)); |
304 | 2630 } else { |
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|
2631 emit_int8((unsigned char)0xC1); |
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|
2632 emit_int8((unsigned char)(0xF8 | encode)); |
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|
2633 emit_int8(imm8); |
304 | 2634 } |
2635 } | |
2636 | |
2637 void Assembler::sarl(Register dst) { | |
2638 int encode = prefix_and_encode(dst->encoding()); | |
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|
2639 emit_int8((unsigned char)0xD3); |
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|
2640 emit_int8((unsigned char)(0xF8 | encode)); |
304 | 2641 } |
2642 | |
2643 void Assembler::sbbl(Address dst, int32_t imm32) { | |
2644 InstructionMark im(this); | |
2645 prefix(dst); | |
2646 emit_arith_operand(0x81, rbx, dst, imm32); | |
2647 } | |
2648 | |
2649 void Assembler::sbbl(Register dst, int32_t imm32) { | |
2650 prefix(dst); | |
2651 emit_arith(0x81, 0xD8, dst, imm32); | |
2652 } | |
2653 | |
2654 | |
2655 void Assembler::sbbl(Register dst, Address src) { | |
2656 InstructionMark im(this); | |
2657 prefix(src, dst); | |
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|
2658 emit_int8(0x1B); |
304 | 2659 emit_operand(dst, src); |
2660 } | |
2661 | |
2662 void Assembler::sbbl(Register dst, Register src) { | |
2663 (void) prefix_and_encode(dst->encoding(), src->encoding()); | |
2664 emit_arith(0x1B, 0xC0, dst, src); | |
2665 } | |
2666 | |
2667 void Assembler::setb(Condition cc, Register dst) { | |
2668 assert(0 <= cc && cc < 16, "illegal cc"); | |
2669 int encode = prefix_and_encode(dst->encoding(), true); | |
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|
2670 emit_int8(0x0F); |
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|
2671 emit_int8((unsigned char)0x90 | cc); |
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|
2672 emit_int8((unsigned char)(0xC0 | encode)); |
304 | 2673 } |
2674 | |
2675 void Assembler::shll(Register dst, int imm8) { | |
2676 assert(isShiftCount(imm8), "illegal shift count"); | |
2677 int encode = prefix_and_encode(dst->encoding()); | |
2678 if (imm8 == 1 ) { | |
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|
2679 emit_int8((unsigned char)0xD1); |
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|
2680 emit_int8((unsigned char)(0xE0 | encode)); |
304 | 2681 } else { |
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|
2682 emit_int8((unsigned char)0xC1); |
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changeset
|
2683 emit_int8((unsigned char)(0xE0 | encode)); |
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changeset
|
2684 emit_int8(imm8); |
304 | 2685 } |
2686 } | |
2687 | |
2688 void Assembler::shll(Register dst) { | |
2689 int encode = prefix_and_encode(dst->encoding()); | |
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|
2690 emit_int8((unsigned char)0xD3); |
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|
2691 emit_int8((unsigned char)(0xE0 | encode)); |
304 | 2692 } |
2693 | |
2694 void Assembler::shrl(Register dst, int imm8) { | |
2695 assert(isShiftCount(imm8), "illegal shift count"); | |
2696 int encode = prefix_and_encode(dst->encoding()); | |
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|
2697 emit_int8((unsigned char)0xC1); |
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changeset
|
2698 emit_int8((unsigned char)(0xE8 | encode)); |
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|
2699 emit_int8(imm8); |
304 | 2700 } |
2701 | |
2702 void Assembler::shrl(Register dst) { | |
2703 int encode = prefix_and_encode(dst->encoding()); | |
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|
2704 emit_int8((unsigned char)0xD3); |
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|
2705 emit_int8((unsigned char)(0xE8 | encode)); |
304 | 2706 } |
0 | 2707 |
2708 // copies a single word from [esi] to [edi] | |
2709 void Assembler::smovl() { | |
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|
2710 emit_int8((unsigned char)0xA5); |
0 | 2711 } |
2712 | |
304 | 2713 void Assembler::sqrtsd(XMMRegister dst, XMMRegister src) { |
2714 NOT_LP64(assert(VM_Version::supports_sse2(), "")); | |
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2715 emit_simd_arith(0x51, dst, src, VEX_SIMD_F2); |
304 | 2716 } |
2717 | |
2008 | 2718 void Assembler::sqrtsd(XMMRegister dst, Address src) { |
2719 NOT_LP64(assert(VM_Version::supports_sse2(), "")); | |
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2720 emit_simd_arith(0x51, dst, src, VEX_SIMD_F2); |
2008 | 2721 } |
2722 | |
2723 void Assembler::sqrtss(XMMRegister dst, XMMRegister src) { | |
4759 | 2724 NOT_LP64(assert(VM_Version::supports_sse(), "")); |
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2725 emit_simd_arith(0x51, dst, src, VEX_SIMD_F3); |
2008 | 2726 } |
2727 | |
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2728 void Assembler::std() { |
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|
2729 emit_int8((unsigned char)0xFD); |
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2730 } |
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|
2731 |
2008 | 2732 void Assembler::sqrtss(XMMRegister dst, Address src) { |
4759 | 2733 NOT_LP64(assert(VM_Version::supports_sse(), "")); |
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|
2734 emit_simd_arith(0x51, dst, src, VEX_SIMD_F3); |
2008 | 2735 } |
2736 | |
304 | 2737 void Assembler::stmxcsr( Address dst) { |
2738 NOT_LP64(assert(VM_Version::supports_sse(), "")); | |
2739 InstructionMark im(this); | |
2740 prefix(dst); | |
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|
2741 emit_int8(0x0F); |
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|
2742 emit_int8((unsigned char)0xAE); |
304 | 2743 emit_operand(as_Register(3), dst); |
2744 } | |
2745 | |
2746 void Assembler::subl(Address dst, int32_t imm32) { | |
2747 InstructionMark im(this); | |
2748 prefix(dst); | |
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changeset
|
2749 emit_arith_operand(0x81, rbp, dst, imm32); |
304 | 2750 } |
2751 | |
2752 void Assembler::subl(Address dst, Register src) { | |
2753 InstructionMark im(this); | |
2754 prefix(dst, src); | |
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|
2755 emit_int8(0x29); |
304 | 2756 emit_operand(src, dst); |
2757 } | |
2758 | |
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|
2759 void Assembler::subl(Register dst, int32_t imm32) { |
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|
2760 prefix(dst); |
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|
2761 emit_arith(0x81, 0xE8, dst, imm32); |
b1a2afa37ec4
7003271: Hotspot should track cumulative Java heap bytes allocated on a per-thread basis
phh
parents:
2014
diff
changeset
|
2762 } |
b1a2afa37ec4
7003271: Hotspot should track cumulative Java heap bytes allocated on a per-thread basis
phh
parents:
2014
diff
changeset
|
2763 |
4947
fd8114661503
7125136: SIGILL on linux amd64 in gc/ArrayJuggle/Juggle29
kvn
parents:
4770
diff
changeset
|
2764 // Force generation of a 4 byte immediate value even if it fits into 8bit |
fd8114661503
7125136: SIGILL on linux amd64 in gc/ArrayJuggle/Juggle29
kvn
parents:
4770
diff
changeset
|
2765 void Assembler::subl_imm32(Register dst, int32_t imm32) { |
fd8114661503
7125136: SIGILL on linux amd64 in gc/ArrayJuggle/Juggle29
kvn
parents:
4770
diff
changeset
|
2766 prefix(dst); |
fd8114661503
7125136: SIGILL on linux amd64 in gc/ArrayJuggle/Juggle29
kvn
parents:
4770
diff
changeset
|
2767 emit_arith_imm32(0x81, 0xE8, dst, imm32); |
fd8114661503
7125136: SIGILL on linux amd64 in gc/ArrayJuggle/Juggle29
kvn
parents:
4770
diff
changeset
|
2768 } |
fd8114661503
7125136: SIGILL on linux amd64 in gc/ArrayJuggle/Juggle29
kvn
parents:
4770
diff
changeset
|
2769 |
304 | 2770 void Assembler::subl(Register dst, Address src) { |
2771 InstructionMark im(this); | |
2772 prefix(src, dst); | |
7430
d02120b7a34f
8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
twisti
parents:
7427
diff
changeset
|
2773 emit_int8(0x2B); |
304 | 2774 emit_operand(dst, src); |
2775 } | |
2776 | |
2777 void Assembler::subl(Register dst, Register src) { | |
2778 (void) prefix_and_encode(dst->encoding(), src->encoding()); | |
2779 emit_arith(0x2B, 0xC0, dst, src); | |
2780 } | |
2781 | |
2782 void Assembler::subsd(XMMRegister dst, XMMRegister src) { | |
2783 NOT_LP64(assert(VM_Version::supports_sse2(), "")); | |
6614
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
2784 emit_simd_arith(0x5C, dst, src, VEX_SIMD_F2); |
304 | 2785 } |
2786 | |
2787 void Assembler::subsd(XMMRegister dst, Address src) { | |
2788 NOT_LP64(assert(VM_Version::supports_sse2(), "")); | |
6614
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
2789 emit_simd_arith(0x5C, dst, src, VEX_SIMD_F2); |
304 | 2790 } |
2791 | |
2792 void Assembler::subss(XMMRegister dst, XMMRegister src) { | |
2793 NOT_LP64(assert(VM_Version::supports_sse(), "")); | |
6614
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
2794 emit_simd_arith(0x5C, dst, src, VEX_SIMD_F3); |
304 | 2795 } |
2796 | |
2797 void Assembler::subss(XMMRegister dst, Address src) { | |
2798 NOT_LP64(assert(VM_Version::supports_sse(), "")); | |
6614
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
2799 emit_simd_arith(0x5C, dst, src, VEX_SIMD_F3); |
304 | 2800 } |
2801 | |
2802 void Assembler::testb(Register dst, int imm8) { | |
2803 NOT_LP64(assert(dst->has_byte_register(), "must have byte register")); | |
2804 (void) prefix_and_encode(dst->encoding(), true); | |
2805 emit_arith_b(0xF6, 0xC0, dst, imm8); | |
2806 } | |
2807 | |
2808 void Assembler::testl(Register dst, int32_t imm32) { | |
2809 // not using emit_arith because test | |
2810 // doesn't support sign-extension of | |
2811 // 8bit operands | |
2812 int encode = dst->encoding(); | |
2813 if (encode == 0) { | |
7430
d02120b7a34f
8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
twisti
parents:
7427
diff
changeset
|
2814 emit_int8((unsigned char)0xA9); |
304 | 2815 } else { |
2816 encode = prefix_and_encode(encode); | |
7430
d02120b7a34f
8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
twisti
parents:
7427
diff
changeset
|
2817 emit_int8((unsigned char)0xF7); |
d02120b7a34f
8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
twisti
parents:
7427
diff
changeset
|
2818 emit_int8((unsigned char)(0xC0 | encode)); |
304 | 2819 } |
7476
ffa87474d7a4
8004537: replace AbstractAssembler emit_long with emit_int32
twisti
parents:
7475
diff
changeset
|
2820 emit_int32(imm32); |
304 | 2821 } |
2822 | |
2823 void Assembler::testl(Register dst, Register src) { | |
2824 (void) prefix_and_encode(dst->encoding(), src->encoding()); | |
2825 emit_arith(0x85, 0xC0, dst, src); | |
2826 } | |
2827 | |
2828 void Assembler::testl(Register dst, Address src) { | |
2829 InstructionMark im(this); | |
2830 prefix(src, dst); | |
7430
d02120b7a34f
8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
twisti
parents:
7427
diff
changeset
|
2831 emit_int8((unsigned char)0x85); |
304 | 2832 emit_operand(dst, src); |
2833 } | |
2834 | |
2835 void Assembler::ucomisd(XMMRegister dst, Address src) { | |
2836 NOT_LP64(assert(VM_Version::supports_sse2(), "")); | |
6614
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
2837 emit_simd_arith_nonds(0x2E, dst, src, VEX_SIMD_66); |
304 | 2838 } |
2839 | |
2840 void Assembler::ucomisd(XMMRegister dst, XMMRegister src) { | |
2841 NOT_LP64(assert(VM_Version::supports_sse2(), "")); | |
6614
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
2842 emit_simd_arith_nonds(0x2E, dst, src, VEX_SIMD_66); |
304 | 2843 } |
2844 | |
2845 void Assembler::ucomiss(XMMRegister dst, Address src) { | |
2846 NOT_LP64(assert(VM_Version::supports_sse(), "")); | |
6614
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
2847 emit_simd_arith_nonds(0x2E, dst, src, VEX_SIMD_NONE); |
304 | 2848 } |
2849 | |
2850 void Assembler::ucomiss(XMMRegister dst, XMMRegister src) { | |
2851 NOT_LP64(assert(VM_Version::supports_sse(), "")); | |
6614
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
2852 emit_simd_arith_nonds(0x2E, dst, src, VEX_SIMD_NONE); |
304 | 2853 } |
2854 | |
2855 | |
2856 void Assembler::xaddl(Address dst, Register src) { | |
2857 InstructionMark im(this); | |
2858 prefix(dst, src); | |
7430
d02120b7a34f
8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
twisti
parents:
7427
diff
changeset
|
2859 emit_int8(0x0F); |
d02120b7a34f
8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
twisti
parents:
7427
diff
changeset
|
2860 emit_int8((unsigned char)0xC1); |
304 | 2861 emit_operand(src, dst); |
2862 } | |
2863 | |
2864 void Assembler::xchgl(Register dst, Address src) { // xchg | |
2865 InstructionMark im(this); | |
2866 prefix(src, dst); | |
7430
d02120b7a34f
8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
twisti
parents:
7427
diff
changeset
|
2867 emit_int8((unsigned char)0x87); |
304 | 2868 emit_operand(dst, src); |
2869 } | |
2870 | |
2871 void Assembler::xchgl(Register dst, Register src) { | |
2872 int encode = prefix_and_encode(dst->encoding(), src->encoding()); | |
7430
d02120b7a34f
8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
twisti
parents:
7427
diff
changeset
|
2873 emit_int8((unsigned char)0x87); |
d02120b7a34f
8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
twisti
parents:
7427
diff
changeset
|
2874 emit_int8((unsigned char)(0xC0 | encode)); |
304 | 2875 } |
2876 | |
7199
cd3d6a6b95d9
8003240: x86: move MacroAssembler into separate file
twisti
parents:
7198
diff
changeset
|
2877 void Assembler::xgetbv() { |
7430
d02120b7a34f
8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
twisti
parents:
7427
diff
changeset
|
2878 emit_int8(0x0F); |
d02120b7a34f
8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
twisti
parents:
7427
diff
changeset
|
2879 emit_int8(0x01); |
d02120b7a34f
8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
twisti
parents:
7427
diff
changeset
|
2880 emit_int8((unsigned char)0xD0); |
7199
cd3d6a6b95d9
8003240: x86: move MacroAssembler into separate file
twisti
parents:
7198
diff
changeset
|
2881 } |
cd3d6a6b95d9
8003240: x86: move MacroAssembler into separate file
twisti
parents:
7198
diff
changeset
|
2882 |
304 | 2883 void Assembler::xorl(Register dst, int32_t imm32) { |
2884 prefix(dst); | |
2885 emit_arith(0x81, 0xF0, dst, imm32); | |
2886 } | |
2887 | |
2888 void Assembler::xorl(Register dst, Address src) { | |
2889 InstructionMark im(this); | |
2890 prefix(src, dst); | |
7430
d02120b7a34f
8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
twisti
parents:
7427
diff
changeset
|
2891 emit_int8(0x33); |
304 | 2892 emit_operand(dst, src); |
2893 } | |
2894 | |
2895 void Assembler::xorl(Register dst, Register src) { | |
2896 (void) prefix_and_encode(dst->encoding(), src->encoding()); | |
2897 emit_arith(0x33, 0xC0, dst, src); | |
2898 } | |
2899 | |
6614
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
2900 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
2901 // AVX 3-operands scalar float-point arithmetic instructions |
4761
65149e74c706
7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
4759
diff
changeset
|
2902 |
65149e74c706
7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
4759
diff
changeset
|
2903 void Assembler::vaddsd(XMMRegister dst, XMMRegister nds, Address src) { |
65149e74c706
7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
4759
diff
changeset
|
2904 assert(VM_Version::supports_avx(), ""); |
6614
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
2905 emit_vex_arith(0x58, dst, nds, src, VEX_SIMD_F2, /* vector256 */ false); |
4761
65149e74c706
7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
4759
diff
changeset
|
2906 } |
65149e74c706
7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
4759
diff
changeset
|
2907 |
65149e74c706
7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
4759
diff
changeset
|
2908 void Assembler::vaddsd(XMMRegister dst, XMMRegister nds, XMMRegister src) { |
65149e74c706
7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
4759
diff
changeset
|
2909 assert(VM_Version::supports_avx(), ""); |
6614
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
2910 emit_vex_arith(0x58, dst, nds, src, VEX_SIMD_F2, /* vector256 */ false); |
4761
65149e74c706
7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
4759
diff
changeset
|
2911 } |
65149e74c706
7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
4759
diff
changeset
|
2912 |
65149e74c706
7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
4759
diff
changeset
|
2913 void Assembler::vaddss(XMMRegister dst, XMMRegister nds, Address src) { |
65149e74c706
7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
4759
diff
changeset
|
2914 assert(VM_Version::supports_avx(), ""); |
6614
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
2915 emit_vex_arith(0x58, dst, nds, src, VEX_SIMD_F3, /* vector256 */ false); |
4761
65149e74c706
7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
4759
diff
changeset
|
2916 } |
65149e74c706
7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
4759
diff
changeset
|
2917 |
65149e74c706
7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
4759
diff
changeset
|
2918 void Assembler::vaddss(XMMRegister dst, XMMRegister nds, XMMRegister src) { |
65149e74c706
7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
4759
diff
changeset
|
2919 assert(VM_Version::supports_avx(), ""); |
6614
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
2920 emit_vex_arith(0x58, dst, nds, src, VEX_SIMD_F3, /* vector256 */ false); |
4761
65149e74c706
7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
4759
diff
changeset
|
2921 } |
65149e74c706
7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
4759
diff
changeset
|
2922 |
65149e74c706
7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
4759
diff
changeset
|
2923 void Assembler::vdivsd(XMMRegister dst, XMMRegister nds, Address src) { |
65149e74c706
7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
4759
diff
changeset
|
2924 assert(VM_Version::supports_avx(), ""); |
6614
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
2925 emit_vex_arith(0x5E, dst, nds, src, VEX_SIMD_F2, /* vector256 */ false); |
4761
65149e74c706
7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
4759
diff
changeset
|
2926 } |
65149e74c706
7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
4759
diff
changeset
|
2927 |
65149e74c706
7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
4759
diff
changeset
|
2928 void Assembler::vdivsd(XMMRegister dst, XMMRegister nds, XMMRegister src) { |
65149e74c706
7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
4759
diff
changeset
|
2929 assert(VM_Version::supports_avx(), ""); |
6614
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
2930 emit_vex_arith(0x5E, dst, nds, src, VEX_SIMD_F2, /* vector256 */ false); |
4761
65149e74c706
7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
4759
diff
changeset
|
2931 } |
65149e74c706
7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
4759
diff
changeset
|
2932 |
65149e74c706
7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
4759
diff
changeset
|
2933 void Assembler::vdivss(XMMRegister dst, XMMRegister nds, Address src) { |
65149e74c706
7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
4759
diff
changeset
|
2934 assert(VM_Version::supports_avx(), ""); |
6614
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
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6266
diff
changeset
|
2935 emit_vex_arith(0x5E, dst, nds, src, VEX_SIMD_F3, /* vector256 */ false); |
4761
65149e74c706
7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
4759
diff
changeset
|
2936 } |
65149e74c706
7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
4759
diff
changeset
|
2937 |
65149e74c706
7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
4759
diff
changeset
|
2938 void Assembler::vdivss(XMMRegister dst, XMMRegister nds, XMMRegister src) { |
65149e74c706
7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
4759
diff
changeset
|
2939 assert(VM_Version::supports_avx(), ""); |
6614
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
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6266
diff
changeset
|
2940 emit_vex_arith(0x5E, dst, nds, src, VEX_SIMD_F3, /* vector256 */ false); |
4761
65149e74c706
7121648: Use 3-operands SIMD instructions on x86 with AVX
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parents:
4759
diff
changeset
|
2941 } |
65149e74c706
7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
4759
diff
changeset
|
2942 |
65149e74c706
7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
4759
diff
changeset
|
2943 void Assembler::vmulsd(XMMRegister dst, XMMRegister nds, Address src) { |
65149e74c706
7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
4759
diff
changeset
|
2944 assert(VM_Version::supports_avx(), ""); |
6614
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6340864: Implement vectorization optimizations in hotspot-server
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6266
diff
changeset
|
2945 emit_vex_arith(0x59, dst, nds, src, VEX_SIMD_F2, /* vector256 */ false); |
4761
65149e74c706
7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
4759
diff
changeset
|
2946 } |
65149e74c706
7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
4759
diff
changeset
|
2947 |
65149e74c706
7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
4759
diff
changeset
|
2948 void Assembler::vmulsd(XMMRegister dst, XMMRegister nds, XMMRegister src) { |
65149e74c706
7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
4759
diff
changeset
|
2949 assert(VM_Version::supports_avx(), ""); |
6614
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6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
2950 emit_vex_arith(0x59, dst, nds, src, VEX_SIMD_F2, /* vector256 */ false); |
4761
65149e74c706
7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
4759
diff
changeset
|
2951 } |
65149e74c706
7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
4759
diff
changeset
|
2952 |
65149e74c706
7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
4759
diff
changeset
|
2953 void Assembler::vmulss(XMMRegister dst, XMMRegister nds, Address src) { |
6614
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
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6266
diff
changeset
|
2954 assert(VM_Version::supports_avx(), ""); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
2955 emit_vex_arith(0x59, dst, nds, src, VEX_SIMD_F3, /* vector256 */ false); |
4761
65149e74c706
7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
4759
diff
changeset
|
2956 } |
65149e74c706
7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
4759
diff
changeset
|
2957 |
65149e74c706
7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
4759
diff
changeset
|
2958 void Assembler::vmulss(XMMRegister dst, XMMRegister nds, XMMRegister src) { |
65149e74c706
7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
4759
diff
changeset
|
2959 assert(VM_Version::supports_avx(), ""); |
6614
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
2960 emit_vex_arith(0x59, dst, nds, src, VEX_SIMD_F3, /* vector256 */ false); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
2961 } |
4761
65149e74c706
7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
4759
diff
changeset
|
2962 |
65149e74c706
7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
4759
diff
changeset
|
2963 void Assembler::vsubsd(XMMRegister dst, XMMRegister nds, Address src) { |
65149e74c706
7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
4759
diff
changeset
|
2964 assert(VM_Version::supports_avx(), ""); |
6614
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
2965 emit_vex_arith(0x5C, dst, nds, src, VEX_SIMD_F2, /* vector256 */ false); |
4761
65149e74c706
7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
4759
diff
changeset
|
2966 } |
65149e74c706
7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
4759
diff
changeset
|
2967 |
65149e74c706
7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
4759
diff
changeset
|
2968 void Assembler::vsubsd(XMMRegister dst, XMMRegister nds, XMMRegister src) { |
65149e74c706
7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
4759
diff
changeset
|
2969 assert(VM_Version::supports_avx(), ""); |
6614
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
2970 emit_vex_arith(0x5C, dst, nds, src, VEX_SIMD_F2, /* vector256 */ false); |
4761
65149e74c706
7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
4759
diff
changeset
|
2971 } |
65149e74c706
7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
4759
diff
changeset
|
2972 |
65149e74c706
7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
4759
diff
changeset
|
2973 void Assembler::vsubss(XMMRegister dst, XMMRegister nds, Address src) { |
65149e74c706
7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
4759
diff
changeset
|
2974 assert(VM_Version::supports_avx(), ""); |
6614
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
2975 emit_vex_arith(0x5C, dst, nds, src, VEX_SIMD_F3, /* vector256 */ false); |
4761
65149e74c706
7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
4759
diff
changeset
|
2976 } |
65149e74c706
7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
4759
diff
changeset
|
2977 |
65149e74c706
7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
4759
diff
changeset
|
2978 void Assembler::vsubss(XMMRegister dst, XMMRegister nds, XMMRegister src) { |
65149e74c706
7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
4759
diff
changeset
|
2979 assert(VM_Version::supports_avx(), ""); |
6614
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
2980 emit_vex_arith(0x5C, dst, nds, src, VEX_SIMD_F3, /* vector256 */ false); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
2981 } |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
2982 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
2983 //====================VECTOR ARITHMETIC===================================== |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
2984 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
2985 // Float-point vector arithmetic |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
2986 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
2987 void Assembler::addpd(XMMRegister dst, XMMRegister src) { |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
2988 NOT_LP64(assert(VM_Version::supports_sse2(), "")); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
2989 emit_simd_arith(0x58, dst, src, VEX_SIMD_66); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
2990 } |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
2991 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
2992 void Assembler::addps(XMMRegister dst, XMMRegister src) { |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
2993 NOT_LP64(assert(VM_Version::supports_sse2(), "")); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
2994 emit_simd_arith(0x58, dst, src, VEX_SIMD_NONE); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
2995 } |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
2996 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
2997 void Assembler::vaddpd(XMMRegister dst, XMMRegister nds, XMMRegister src, bool vector256) { |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
2998 assert(VM_Version::supports_avx(), ""); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
2999 emit_vex_arith(0x58, dst, nds, src, VEX_SIMD_66, vector256); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3000 } |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3001 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3002 void Assembler::vaddps(XMMRegister dst, XMMRegister nds, XMMRegister src, bool vector256) { |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3003 assert(VM_Version::supports_avx(), ""); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3004 emit_vex_arith(0x58, dst, nds, src, VEX_SIMD_NONE, vector256); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3005 } |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3006 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3007 void Assembler::vaddpd(XMMRegister dst, XMMRegister nds, Address src, bool vector256) { |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3008 assert(VM_Version::supports_avx(), ""); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3009 emit_vex_arith(0x58, dst, nds, src, VEX_SIMD_66, vector256); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3010 } |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3011 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3012 void Assembler::vaddps(XMMRegister dst, XMMRegister nds, Address src, bool vector256) { |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3013 assert(VM_Version::supports_avx(), ""); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3014 emit_vex_arith(0x58, dst, nds, src, VEX_SIMD_NONE, vector256); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3015 } |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3016 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3017 void Assembler::subpd(XMMRegister dst, XMMRegister src) { |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3018 NOT_LP64(assert(VM_Version::supports_sse2(), "")); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3019 emit_simd_arith(0x5C, dst, src, VEX_SIMD_66); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3020 } |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3021 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3022 void Assembler::subps(XMMRegister dst, XMMRegister src) { |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3023 NOT_LP64(assert(VM_Version::supports_sse2(), "")); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3024 emit_simd_arith(0x5C, dst, src, VEX_SIMD_NONE); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3025 } |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3026 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3027 void Assembler::vsubpd(XMMRegister dst, XMMRegister nds, XMMRegister src, bool vector256) { |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3028 assert(VM_Version::supports_avx(), ""); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3029 emit_vex_arith(0x5C, dst, nds, src, VEX_SIMD_66, vector256); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3030 } |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3031 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3032 void Assembler::vsubps(XMMRegister dst, XMMRegister nds, XMMRegister src, bool vector256) { |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3033 assert(VM_Version::supports_avx(), ""); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3034 emit_vex_arith(0x5C, dst, nds, src, VEX_SIMD_NONE, vector256); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3035 } |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3036 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3037 void Assembler::vsubpd(XMMRegister dst, XMMRegister nds, Address src, bool vector256) { |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3038 assert(VM_Version::supports_avx(), ""); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3039 emit_vex_arith(0x5C, dst, nds, src, VEX_SIMD_66, vector256); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3040 } |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3041 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3042 void Assembler::vsubps(XMMRegister dst, XMMRegister nds, Address src, bool vector256) { |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3043 assert(VM_Version::supports_avx(), ""); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3044 emit_vex_arith(0x5C, dst, nds, src, VEX_SIMD_NONE, vector256); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3045 } |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3046 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3047 void Assembler::mulpd(XMMRegister dst, XMMRegister src) { |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3048 NOT_LP64(assert(VM_Version::supports_sse2(), "")); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3049 emit_simd_arith(0x59, dst, src, VEX_SIMD_66); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3050 } |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3051 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3052 void Assembler::mulps(XMMRegister dst, XMMRegister src) { |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3053 NOT_LP64(assert(VM_Version::supports_sse2(), "")); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3054 emit_simd_arith(0x59, dst, src, VEX_SIMD_NONE); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3055 } |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3056 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3057 void Assembler::vmulpd(XMMRegister dst, XMMRegister nds, XMMRegister src, bool vector256) { |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3058 assert(VM_Version::supports_avx(), ""); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3059 emit_vex_arith(0x59, dst, nds, src, VEX_SIMD_66, vector256); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3060 } |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3061 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3062 void Assembler::vmulps(XMMRegister dst, XMMRegister nds, XMMRegister src, bool vector256) { |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3063 assert(VM_Version::supports_avx(), ""); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3064 emit_vex_arith(0x59, dst, nds, src, VEX_SIMD_NONE, vector256); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3065 } |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3066 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3067 void Assembler::vmulpd(XMMRegister dst, XMMRegister nds, Address src, bool vector256) { |
4761
65149e74c706
7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
4759
diff
changeset
|
3068 assert(VM_Version::supports_avx(), ""); |
6614
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3069 emit_vex_arith(0x59, dst, nds, src, VEX_SIMD_66, vector256); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3070 } |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3071 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3072 void Assembler::vmulps(XMMRegister dst, XMMRegister nds, Address src, bool vector256) { |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3073 assert(VM_Version::supports_avx(), ""); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3074 emit_vex_arith(0x59, dst, nds, src, VEX_SIMD_NONE, vector256); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3075 } |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3076 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3077 void Assembler::divpd(XMMRegister dst, XMMRegister src) { |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3078 NOT_LP64(assert(VM_Version::supports_sse2(), "")); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3079 emit_simd_arith(0x5E, dst, src, VEX_SIMD_66); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3080 } |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3081 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3082 void Assembler::divps(XMMRegister dst, XMMRegister src) { |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3083 NOT_LP64(assert(VM_Version::supports_sse2(), "")); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3084 emit_simd_arith(0x5E, dst, src, VEX_SIMD_NONE); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3085 } |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3086 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3087 void Assembler::vdivpd(XMMRegister dst, XMMRegister nds, XMMRegister src, bool vector256) { |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3088 assert(VM_Version::supports_avx(), ""); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3089 emit_vex_arith(0x5E, dst, nds, src, VEX_SIMD_66, vector256); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3090 } |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3091 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3092 void Assembler::vdivps(XMMRegister dst, XMMRegister nds, XMMRegister src, bool vector256) { |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3093 assert(VM_Version::supports_avx(), ""); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3094 emit_vex_arith(0x5E, dst, nds, src, VEX_SIMD_NONE, vector256); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3095 } |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3096 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3097 void Assembler::vdivpd(XMMRegister dst, XMMRegister nds, Address src, bool vector256) { |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3098 assert(VM_Version::supports_avx(), ""); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3099 emit_vex_arith(0x5E, dst, nds, src, VEX_SIMD_66, vector256); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3100 } |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3101 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3102 void Assembler::vdivps(XMMRegister dst, XMMRegister nds, Address src, bool vector256) { |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3103 assert(VM_Version::supports_avx(), ""); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3104 emit_vex_arith(0x5E, dst, nds, src, VEX_SIMD_NONE, vector256); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3105 } |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3106 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3107 void Assembler::andpd(XMMRegister dst, XMMRegister src) { |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3108 NOT_LP64(assert(VM_Version::supports_sse2(), "")); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3109 emit_simd_arith(0x54, dst, src, VEX_SIMD_66); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3110 } |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3111 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3112 void Assembler::andps(XMMRegister dst, XMMRegister src) { |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3113 NOT_LP64(assert(VM_Version::supports_sse(), "")); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3114 emit_simd_arith(0x54, dst, src, VEX_SIMD_NONE); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3115 } |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3116 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3117 void Assembler::andps(XMMRegister dst, Address src) { |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3118 NOT_LP64(assert(VM_Version::supports_sse(), "")); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3119 emit_simd_arith(0x54, dst, src, VEX_SIMD_NONE); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3120 } |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3121 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3122 void Assembler::andpd(XMMRegister dst, Address src) { |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3123 NOT_LP64(assert(VM_Version::supports_sse2(), "")); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3124 emit_simd_arith(0x54, dst, src, VEX_SIMD_66); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3125 } |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3126 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3127 void Assembler::vandpd(XMMRegister dst, XMMRegister nds, XMMRegister src, bool vector256) { |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3128 assert(VM_Version::supports_avx(), ""); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3129 emit_vex_arith(0x54, dst, nds, src, VEX_SIMD_66, vector256); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3130 } |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3131 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3132 void Assembler::vandps(XMMRegister dst, XMMRegister nds, XMMRegister src, bool vector256) { |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3133 assert(VM_Version::supports_avx(), ""); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3134 emit_vex_arith(0x54, dst, nds, src, VEX_SIMD_NONE, vector256); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3135 } |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3136 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3137 void Assembler::vandpd(XMMRegister dst, XMMRegister nds, Address src, bool vector256) { |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3138 assert(VM_Version::supports_avx(), ""); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3139 emit_vex_arith(0x54, dst, nds, src, VEX_SIMD_66, vector256); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3140 } |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3141 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3142 void Assembler::vandps(XMMRegister dst, XMMRegister nds, Address src, bool vector256) { |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3143 assert(VM_Version::supports_avx(), ""); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3144 emit_vex_arith(0x54, dst, nds, src, VEX_SIMD_NONE, vector256); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3145 } |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3146 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3147 void Assembler::xorpd(XMMRegister dst, XMMRegister src) { |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3148 NOT_LP64(assert(VM_Version::supports_sse2(), "")); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3149 emit_simd_arith(0x57, dst, src, VEX_SIMD_66); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3150 } |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3151 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3152 void Assembler::xorps(XMMRegister dst, XMMRegister src) { |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3153 NOT_LP64(assert(VM_Version::supports_sse(), "")); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3154 emit_simd_arith(0x57, dst, src, VEX_SIMD_NONE); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3155 } |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3156 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3157 void Assembler::xorpd(XMMRegister dst, Address src) { |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3158 NOT_LP64(assert(VM_Version::supports_sse2(), "")); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3159 emit_simd_arith(0x57, dst, src, VEX_SIMD_66); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3160 } |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3161 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3162 void Assembler::xorps(XMMRegister dst, Address src) { |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3163 NOT_LP64(assert(VM_Version::supports_sse(), "")); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3164 emit_simd_arith(0x57, dst, src, VEX_SIMD_NONE); |
4761
65149e74c706
7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
4759
diff
changeset
|
3165 } |
65149e74c706
7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
4759
diff
changeset
|
3166 |
6179
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
6141
diff
changeset
|
3167 void Assembler::vxorpd(XMMRegister dst, XMMRegister nds, XMMRegister src, bool vector256) { |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
6141
diff
changeset
|
3168 assert(VM_Version::supports_avx(), ""); |
6614
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3169 emit_vex_arith(0x57, dst, nds, src, VEX_SIMD_66, vector256); |
4761
65149e74c706
7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
4759
diff
changeset
|
3170 } |
65149e74c706
7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
4759
diff
changeset
|
3171 |
6179
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
6141
diff
changeset
|
3172 void Assembler::vxorps(XMMRegister dst, XMMRegister nds, XMMRegister src, bool vector256) { |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
6141
diff
changeset
|
3173 assert(VM_Version::supports_avx(), ""); |
6614
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3174 emit_vex_arith(0x57, dst, nds, src, VEX_SIMD_NONE, vector256); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3175 } |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3176 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3177 void Assembler::vxorpd(XMMRegister dst, XMMRegister nds, Address src, bool vector256) { |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3178 assert(VM_Version::supports_avx(), ""); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3179 emit_vex_arith(0x57, dst, nds, src, VEX_SIMD_66, vector256); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3180 } |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3181 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3182 void Assembler::vxorps(XMMRegister dst, XMMRegister nds, Address src, bool vector256) { |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3183 assert(VM_Version::supports_avx(), ""); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3184 emit_vex_arith(0x57, dst, nds, src, VEX_SIMD_NONE, vector256); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3185 } |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3186 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3187 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3188 // Integer vector arithmetic |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3189 void Assembler::paddb(XMMRegister dst, XMMRegister src) { |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3190 NOT_LP64(assert(VM_Version::supports_sse2(), "")); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3191 emit_simd_arith(0xFC, dst, src, VEX_SIMD_66); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3192 } |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3193 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3194 void Assembler::paddw(XMMRegister dst, XMMRegister src) { |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3195 NOT_LP64(assert(VM_Version::supports_sse2(), "")); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3196 emit_simd_arith(0xFD, dst, src, VEX_SIMD_66); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3197 } |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3198 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3199 void Assembler::paddd(XMMRegister dst, XMMRegister src) { |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3200 NOT_LP64(assert(VM_Version::supports_sse2(), "")); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3201 emit_simd_arith(0xFE, dst, src, VEX_SIMD_66); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3202 } |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3203 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3204 void Assembler::paddq(XMMRegister dst, XMMRegister src) { |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3205 NOT_LP64(assert(VM_Version::supports_sse2(), "")); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3206 emit_simd_arith(0xD4, dst, src, VEX_SIMD_66); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3207 } |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3208 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3209 void Assembler::vpaddb(XMMRegister dst, XMMRegister nds, XMMRegister src, bool vector256) { |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3210 assert(VM_Version::supports_avx() && !vector256 || VM_Version::supports_avx2(), "256 bit integer vectors requires AVX2"); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3211 emit_vex_arith(0xFC, dst, nds, src, VEX_SIMD_66, vector256); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3212 } |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3213 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3214 void Assembler::vpaddw(XMMRegister dst, XMMRegister nds, XMMRegister src, bool vector256) { |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3215 assert(VM_Version::supports_avx() && !vector256 || VM_Version::supports_avx2(), "256 bit integer vectors requires AVX2"); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3216 emit_vex_arith(0xFD, dst, nds, src, VEX_SIMD_66, vector256); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3217 } |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3218 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3219 void Assembler::vpaddd(XMMRegister dst, XMMRegister nds, XMMRegister src, bool vector256) { |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3220 assert(VM_Version::supports_avx() && !vector256 || VM_Version::supports_avx2(), "256 bit integer vectors requires AVX2"); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3221 emit_vex_arith(0xFE, dst, nds, src, VEX_SIMD_66, vector256); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3222 } |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3223 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3224 void Assembler::vpaddq(XMMRegister dst, XMMRegister nds, XMMRegister src, bool vector256) { |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3225 assert(VM_Version::supports_avx() && !vector256 || VM_Version::supports_avx2(), "256 bit integer vectors requires AVX2"); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3226 emit_vex_arith(0xD4, dst, nds, src, VEX_SIMD_66, vector256); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3227 } |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3228 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3229 void Assembler::vpaddb(XMMRegister dst, XMMRegister nds, Address src, bool vector256) { |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3230 assert(VM_Version::supports_avx() && !vector256 || VM_Version::supports_avx2(), "256 bit integer vectors requires AVX2"); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3231 emit_vex_arith(0xFC, dst, nds, src, VEX_SIMD_66, vector256); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3232 } |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3233 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3234 void Assembler::vpaddw(XMMRegister dst, XMMRegister nds, Address src, bool vector256) { |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3235 assert(VM_Version::supports_avx() && !vector256 || VM_Version::supports_avx2(), "256 bit integer vectors requires AVX2"); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3236 emit_vex_arith(0xFD, dst, nds, src, VEX_SIMD_66, vector256); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3237 } |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3238 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3239 void Assembler::vpaddd(XMMRegister dst, XMMRegister nds, Address src, bool vector256) { |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3240 assert(VM_Version::supports_avx() && !vector256 || VM_Version::supports_avx2(), "256 bit integer vectors requires AVX2"); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3241 emit_vex_arith(0xFE, dst, nds, src, VEX_SIMD_66, vector256); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3242 } |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3243 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3244 void Assembler::vpaddq(XMMRegister dst, XMMRegister nds, Address src, bool vector256) { |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3245 assert(VM_Version::supports_avx() && !vector256 || VM_Version::supports_avx2(), "256 bit integer vectors requires AVX2"); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3246 emit_vex_arith(0xD4, dst, nds, src, VEX_SIMD_66, vector256); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3247 } |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3248 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3249 void Assembler::psubb(XMMRegister dst, XMMRegister src) { |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3250 NOT_LP64(assert(VM_Version::supports_sse2(), "")); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3251 emit_simd_arith(0xF8, dst, src, VEX_SIMD_66); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3252 } |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3253 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3254 void Assembler::psubw(XMMRegister dst, XMMRegister src) { |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3255 NOT_LP64(assert(VM_Version::supports_sse2(), "")); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3256 emit_simd_arith(0xF9, dst, src, VEX_SIMD_66); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3257 } |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3258 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3259 void Assembler::psubd(XMMRegister dst, XMMRegister src) { |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3260 NOT_LP64(assert(VM_Version::supports_sse2(), "")); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3261 emit_simd_arith(0xFA, dst, src, VEX_SIMD_66); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3262 } |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3263 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3264 void Assembler::psubq(XMMRegister dst, XMMRegister src) { |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3265 NOT_LP64(assert(VM_Version::supports_sse2(), "")); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3266 emit_simd_arith(0xFB, dst, src, VEX_SIMD_66); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3267 } |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3268 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3269 void Assembler::vpsubb(XMMRegister dst, XMMRegister nds, XMMRegister src, bool vector256) { |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3270 assert(VM_Version::supports_avx() && !vector256 || VM_Version::supports_avx2(), "256 bit integer vectors requires AVX2"); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3271 emit_vex_arith(0xF8, dst, nds, src, VEX_SIMD_66, vector256); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3272 } |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3273 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3274 void Assembler::vpsubw(XMMRegister dst, XMMRegister nds, XMMRegister src, bool vector256) { |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3275 assert(VM_Version::supports_avx() && !vector256 || VM_Version::supports_avx2(), "256 bit integer vectors requires AVX2"); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3276 emit_vex_arith(0xF9, dst, nds, src, VEX_SIMD_66, vector256); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3277 } |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3278 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3279 void Assembler::vpsubd(XMMRegister dst, XMMRegister nds, XMMRegister src, bool vector256) { |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3280 assert(VM_Version::supports_avx() && !vector256 || VM_Version::supports_avx2(), "256 bit integer vectors requires AVX2"); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3281 emit_vex_arith(0xFA, dst, nds, src, VEX_SIMD_66, vector256); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3282 } |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3283 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3284 void Assembler::vpsubq(XMMRegister dst, XMMRegister nds, XMMRegister src, bool vector256) { |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3285 assert(VM_Version::supports_avx() && !vector256 || VM_Version::supports_avx2(), "256 bit integer vectors requires AVX2"); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3286 emit_vex_arith(0xFB, dst, nds, src, VEX_SIMD_66, vector256); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3287 } |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3288 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3289 void Assembler::vpsubb(XMMRegister dst, XMMRegister nds, Address src, bool vector256) { |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3290 assert(VM_Version::supports_avx() && !vector256 || VM_Version::supports_avx2(), "256 bit integer vectors requires AVX2"); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3291 emit_vex_arith(0xF8, dst, nds, src, VEX_SIMD_66, vector256); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3292 } |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3293 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3294 void Assembler::vpsubw(XMMRegister dst, XMMRegister nds, Address src, bool vector256) { |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3295 assert(VM_Version::supports_avx() && !vector256 || VM_Version::supports_avx2(), "256 bit integer vectors requires AVX2"); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3296 emit_vex_arith(0xF9, dst, nds, src, VEX_SIMD_66, vector256); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3297 } |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3298 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3299 void Assembler::vpsubd(XMMRegister dst, XMMRegister nds, Address src, bool vector256) { |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3300 assert(VM_Version::supports_avx() && !vector256 || VM_Version::supports_avx2(), "256 bit integer vectors requires AVX2"); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3301 emit_vex_arith(0xFA, dst, nds, src, VEX_SIMD_66, vector256); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3302 } |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3303 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3304 void Assembler::vpsubq(XMMRegister dst, XMMRegister nds, Address src, bool vector256) { |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3305 assert(VM_Version::supports_avx() && !vector256 || VM_Version::supports_avx2(), "256 bit integer vectors requires AVX2"); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3306 emit_vex_arith(0xFB, dst, nds, src, VEX_SIMD_66, vector256); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3307 } |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3308 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3309 void Assembler::pmullw(XMMRegister dst, XMMRegister src) { |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3310 NOT_LP64(assert(VM_Version::supports_sse2(), "")); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3311 emit_simd_arith(0xD5, dst, src, VEX_SIMD_66); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3312 } |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3313 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3314 void Assembler::pmulld(XMMRegister dst, XMMRegister src) { |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3315 assert(VM_Version::supports_sse4_1(), ""); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3316 int encode = simd_prefix_and_encode(dst, dst, src, VEX_SIMD_66, VEX_OPCODE_0F_38); |
7430
d02120b7a34f
8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
twisti
parents:
7427
diff
changeset
|
3317 emit_int8(0x40); |
d02120b7a34f
8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
twisti
parents:
7427
diff
changeset
|
3318 emit_int8((unsigned char)(0xC0 | encode)); |
6614
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3319 } |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3320 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3321 void Assembler::vpmullw(XMMRegister dst, XMMRegister nds, XMMRegister src, bool vector256) { |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3322 assert(VM_Version::supports_avx() && !vector256 || VM_Version::supports_avx2(), "256 bit integer vectors requires AVX2"); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3323 emit_vex_arith(0xD5, dst, nds, src, VEX_SIMD_66, vector256); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3324 } |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3325 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3326 void Assembler::vpmulld(XMMRegister dst, XMMRegister nds, XMMRegister src, bool vector256) { |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3327 assert(VM_Version::supports_avx() && !vector256 || VM_Version::supports_avx2(), "256 bit integer vectors requires AVX2"); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3328 int encode = vex_prefix_and_encode(dst, nds, src, VEX_SIMD_66, vector256, VEX_OPCODE_0F_38); |
7430
d02120b7a34f
8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
twisti
parents:
7427
diff
changeset
|
3329 emit_int8(0x40); |
d02120b7a34f
8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
twisti
parents:
7427
diff
changeset
|
3330 emit_int8((unsigned char)(0xC0 | encode)); |
6614
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3331 } |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3332 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3333 void Assembler::vpmullw(XMMRegister dst, XMMRegister nds, Address src, bool vector256) { |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3334 assert(VM_Version::supports_avx() && !vector256 || VM_Version::supports_avx2(), "256 bit integer vectors requires AVX2"); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3335 emit_vex_arith(0xD5, dst, nds, src, VEX_SIMD_66, vector256); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3336 } |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3337 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3338 void Assembler::vpmulld(XMMRegister dst, XMMRegister nds, Address src, bool vector256) { |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3339 assert(VM_Version::supports_avx() && !vector256 || VM_Version::supports_avx2(), "256 bit integer vectors requires AVX2"); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3340 InstructionMark im(this); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3341 int dst_enc = dst->encoding(); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3342 int nds_enc = nds->is_valid() ? nds->encoding() : 0; |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3343 vex_prefix(src, nds_enc, dst_enc, VEX_SIMD_66, VEX_OPCODE_0F_38, false, vector256); |
7430
d02120b7a34f
8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
twisti
parents:
7427
diff
changeset
|
3344 emit_int8(0x40); |
6614
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3345 emit_operand(dst, src); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3346 } |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3347 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3348 // Shift packed integers left by specified number of bits. |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3349 void Assembler::psllw(XMMRegister dst, int shift) { |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3350 NOT_LP64(assert(VM_Version::supports_sse2(), "")); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3351 // XMM6 is for /6 encoding: 66 0F 71 /6 ib |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3352 int encode = simd_prefix_and_encode(xmm6, dst, dst, VEX_SIMD_66); |
7430
d02120b7a34f
8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
twisti
parents:
7427
diff
changeset
|
3353 emit_int8(0x71); |
d02120b7a34f
8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
twisti
parents:
7427
diff
changeset
|
3354 emit_int8((unsigned char)(0xC0 | encode)); |
d02120b7a34f
8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
twisti
parents:
7427
diff
changeset
|
3355 emit_int8(shift & 0xFF); |
6614
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3356 } |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3357 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3358 void Assembler::pslld(XMMRegister dst, int shift) { |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3359 NOT_LP64(assert(VM_Version::supports_sse2(), "")); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3360 // XMM6 is for /6 encoding: 66 0F 72 /6 ib |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3361 int encode = simd_prefix_and_encode(xmm6, dst, dst, VEX_SIMD_66); |
7430
d02120b7a34f
8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
twisti
parents:
7427
diff
changeset
|
3362 emit_int8(0x72); |
d02120b7a34f
8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
twisti
parents:
7427
diff
changeset
|
3363 emit_int8((unsigned char)(0xC0 | encode)); |
d02120b7a34f
8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
twisti
parents:
7427
diff
changeset
|
3364 emit_int8(shift & 0xFF); |
6614
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3365 } |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3366 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3367 void Assembler::psllq(XMMRegister dst, int shift) { |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3368 NOT_LP64(assert(VM_Version::supports_sse2(), "")); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3369 // XMM6 is for /6 encoding: 66 0F 73 /6 ib |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3370 int encode = simd_prefix_and_encode(xmm6, dst, dst, VEX_SIMD_66); |
7430
d02120b7a34f
8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
twisti
parents:
7427
diff
changeset
|
3371 emit_int8(0x73); |
d02120b7a34f
8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
twisti
parents:
7427
diff
changeset
|
3372 emit_int8((unsigned char)(0xC0 | encode)); |
d02120b7a34f
8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
twisti
parents:
7427
diff
changeset
|
3373 emit_int8(shift & 0xFF); |
6614
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3374 } |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3375 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3376 void Assembler::psllw(XMMRegister dst, XMMRegister shift) { |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3377 NOT_LP64(assert(VM_Version::supports_sse2(), "")); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3378 emit_simd_arith(0xF1, dst, shift, VEX_SIMD_66); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3379 } |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3380 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3381 void Assembler::pslld(XMMRegister dst, XMMRegister shift) { |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3382 NOT_LP64(assert(VM_Version::supports_sse2(), "")); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3383 emit_simd_arith(0xF2, dst, shift, VEX_SIMD_66); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3384 } |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3385 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3386 void Assembler::psllq(XMMRegister dst, XMMRegister shift) { |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3387 NOT_LP64(assert(VM_Version::supports_sse2(), "")); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3388 emit_simd_arith(0xF3, dst, shift, VEX_SIMD_66); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3389 } |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3390 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3391 void Assembler::vpsllw(XMMRegister dst, XMMRegister src, int shift, bool vector256) { |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3392 assert(VM_Version::supports_avx() && !vector256 || VM_Version::supports_avx2(), "256 bit integer vectors requires AVX2"); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3393 // XMM6 is for /6 encoding: 66 0F 71 /6 ib |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3394 emit_vex_arith(0x71, xmm6, dst, src, VEX_SIMD_66, vector256); |
7430
d02120b7a34f
8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
twisti
parents:
7427
diff
changeset
|
3395 emit_int8(shift & 0xFF); |
6614
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3396 } |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3397 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3398 void Assembler::vpslld(XMMRegister dst, XMMRegister src, int shift, bool vector256) { |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3399 assert(VM_Version::supports_avx() && !vector256 || VM_Version::supports_avx2(), "256 bit integer vectors requires AVX2"); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3400 // XMM6 is for /6 encoding: 66 0F 72 /6 ib |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3401 emit_vex_arith(0x72, xmm6, dst, src, VEX_SIMD_66, vector256); |
7430
d02120b7a34f
8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
twisti
parents:
7427
diff
changeset
|
3402 emit_int8(shift & 0xFF); |
6614
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3403 } |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3404 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3405 void Assembler::vpsllq(XMMRegister dst, XMMRegister src, int shift, bool vector256) { |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3406 assert(VM_Version::supports_avx() && !vector256 || VM_Version::supports_avx2(), "256 bit integer vectors requires AVX2"); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3407 // XMM6 is for /6 encoding: 66 0F 73 /6 ib |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3408 emit_vex_arith(0x73, xmm6, dst, src, VEX_SIMD_66, vector256); |
7430
d02120b7a34f
8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
twisti
parents:
7427
diff
changeset
|
3409 emit_int8(shift & 0xFF); |
6614
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3410 } |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3411 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3412 void Assembler::vpsllw(XMMRegister dst, XMMRegister src, XMMRegister shift, bool vector256) { |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3413 assert(VM_Version::supports_avx() && !vector256 || VM_Version::supports_avx2(), "256 bit integer vectors requires AVX2"); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3414 emit_vex_arith(0xF1, dst, src, shift, VEX_SIMD_66, vector256); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3415 } |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3416 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3417 void Assembler::vpslld(XMMRegister dst, XMMRegister src, XMMRegister shift, bool vector256) { |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3418 assert(VM_Version::supports_avx() && !vector256 || VM_Version::supports_avx2(), "256 bit integer vectors requires AVX2"); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3419 emit_vex_arith(0xF2, dst, src, shift, VEX_SIMD_66, vector256); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3420 } |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3421 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3422 void Assembler::vpsllq(XMMRegister dst, XMMRegister src, XMMRegister shift, bool vector256) { |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3423 assert(VM_Version::supports_avx() && !vector256 || VM_Version::supports_avx2(), "256 bit integer vectors requires AVX2"); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3424 emit_vex_arith(0xF3, dst, src, shift, VEX_SIMD_66, vector256); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3425 } |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3426 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3427 // Shift packed integers logically right by specified number of bits. |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3428 void Assembler::psrlw(XMMRegister dst, int shift) { |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3429 NOT_LP64(assert(VM_Version::supports_sse2(), "")); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3430 // XMM2 is for /2 encoding: 66 0F 71 /2 ib |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3431 int encode = simd_prefix_and_encode(xmm2, dst, dst, VEX_SIMD_66); |
7430
d02120b7a34f
8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
twisti
parents:
7427
diff
changeset
|
3432 emit_int8(0x71); |
d02120b7a34f
8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
twisti
parents:
7427
diff
changeset
|
3433 emit_int8((unsigned char)(0xC0 | encode)); |
d02120b7a34f
8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
twisti
parents:
7427
diff
changeset
|
3434 emit_int8(shift & 0xFF); |
6614
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3435 } |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3436 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3437 void Assembler::psrld(XMMRegister dst, int shift) { |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3438 NOT_LP64(assert(VM_Version::supports_sse2(), "")); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3439 // XMM2 is for /2 encoding: 66 0F 72 /2 ib |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3440 int encode = simd_prefix_and_encode(xmm2, dst, dst, VEX_SIMD_66); |
7430
d02120b7a34f
8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
twisti
parents:
7427
diff
changeset
|
3441 emit_int8(0x72); |
d02120b7a34f
8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
twisti
parents:
7427
diff
changeset
|
3442 emit_int8((unsigned char)(0xC0 | encode)); |
d02120b7a34f
8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
twisti
parents:
7427
diff
changeset
|
3443 emit_int8(shift & 0xFF); |
6614
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3444 } |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3445 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3446 void Assembler::psrlq(XMMRegister dst, int shift) { |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3447 // Do not confuse it with psrldq SSE2 instruction which |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3448 // shifts 128 bit value in xmm register by number of bytes. |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3449 NOT_LP64(assert(VM_Version::supports_sse2(), "")); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3450 // XMM2 is for /2 encoding: 66 0F 73 /2 ib |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3451 int encode = simd_prefix_and_encode(xmm2, dst, dst, VEX_SIMD_66); |
7430
d02120b7a34f
8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
twisti
parents:
7427
diff
changeset
|
3452 emit_int8(0x73); |
d02120b7a34f
8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
twisti
parents:
7427
diff
changeset
|
3453 emit_int8((unsigned char)(0xC0 | encode)); |
d02120b7a34f
8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
twisti
parents:
7427
diff
changeset
|
3454 emit_int8(shift & 0xFF); |
6614
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3455 } |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3456 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3457 void Assembler::psrlw(XMMRegister dst, XMMRegister shift) { |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3458 NOT_LP64(assert(VM_Version::supports_sse2(), "")); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3459 emit_simd_arith(0xD1, dst, shift, VEX_SIMD_66); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3460 } |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3461 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3462 void Assembler::psrld(XMMRegister dst, XMMRegister shift) { |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3463 NOT_LP64(assert(VM_Version::supports_sse2(), "")); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3464 emit_simd_arith(0xD2, dst, shift, VEX_SIMD_66); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3465 } |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3466 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3467 void Assembler::psrlq(XMMRegister dst, XMMRegister shift) { |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3468 NOT_LP64(assert(VM_Version::supports_sse2(), "")); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3469 emit_simd_arith(0xD3, dst, shift, VEX_SIMD_66); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3470 } |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3471 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3472 void Assembler::vpsrlw(XMMRegister dst, XMMRegister src, int shift, bool vector256) { |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3473 assert(VM_Version::supports_avx() && !vector256 || VM_Version::supports_avx2(), "256 bit integer vectors requires AVX2"); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3474 // XMM2 is for /2 encoding: 66 0F 73 /2 ib |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3475 emit_vex_arith(0x71, xmm2, dst, src, VEX_SIMD_66, vector256); |
7430
d02120b7a34f
8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
twisti
parents:
7427
diff
changeset
|
3476 emit_int8(shift & 0xFF); |
6614
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3477 } |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3478 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3479 void Assembler::vpsrld(XMMRegister dst, XMMRegister src, int shift, bool vector256) { |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3480 assert(VM_Version::supports_avx() && !vector256 || VM_Version::supports_avx2(), "256 bit integer vectors requires AVX2"); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3481 // XMM2 is for /2 encoding: 66 0F 73 /2 ib |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3482 emit_vex_arith(0x72, xmm2, dst, src, VEX_SIMD_66, vector256); |
7430
d02120b7a34f
8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
twisti
parents:
7427
diff
changeset
|
3483 emit_int8(shift & 0xFF); |
6614
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3484 } |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3485 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3486 void Assembler::vpsrlq(XMMRegister dst, XMMRegister src, int shift, bool vector256) { |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3487 assert(VM_Version::supports_avx() && !vector256 || VM_Version::supports_avx2(), "256 bit integer vectors requires AVX2"); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3488 // XMM2 is for /2 encoding: 66 0F 73 /2 ib |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3489 emit_vex_arith(0x73, xmm2, dst, src, VEX_SIMD_66, vector256); |
7430
d02120b7a34f
8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
twisti
parents:
7427
diff
changeset
|
3490 emit_int8(shift & 0xFF); |
6614
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3491 } |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3492 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3493 void Assembler::vpsrlw(XMMRegister dst, XMMRegister src, XMMRegister shift, bool vector256) { |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3494 assert(VM_Version::supports_avx() && !vector256 || VM_Version::supports_avx2(), "256 bit integer vectors requires AVX2"); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3495 emit_vex_arith(0xD1, dst, src, shift, VEX_SIMD_66, vector256); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3496 } |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3497 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3498 void Assembler::vpsrld(XMMRegister dst, XMMRegister src, XMMRegister shift, bool vector256) { |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3499 assert(VM_Version::supports_avx() && !vector256 || VM_Version::supports_avx2(), "256 bit integer vectors requires AVX2"); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3500 emit_vex_arith(0xD2, dst, src, shift, VEX_SIMD_66, vector256); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3501 } |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3502 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3503 void Assembler::vpsrlq(XMMRegister dst, XMMRegister src, XMMRegister shift, bool vector256) { |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3504 assert(VM_Version::supports_avx() && !vector256 || VM_Version::supports_avx2(), "256 bit integer vectors requires AVX2"); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3505 emit_vex_arith(0xD3, dst, src, shift, VEX_SIMD_66, vector256); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3506 } |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3507 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3508 // Shift packed integers arithmetically right by specified number of bits. |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3509 void Assembler::psraw(XMMRegister dst, int shift) { |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3510 NOT_LP64(assert(VM_Version::supports_sse2(), "")); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3511 // XMM4 is for /4 encoding: 66 0F 71 /4 ib |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3512 int encode = simd_prefix_and_encode(xmm4, dst, dst, VEX_SIMD_66); |
7430
d02120b7a34f
8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
twisti
parents:
7427
diff
changeset
|
3513 emit_int8(0x71); |
d02120b7a34f
8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
twisti
parents:
7427
diff
changeset
|
3514 emit_int8((unsigned char)(0xC0 | encode)); |
d02120b7a34f
8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
twisti
parents:
7427
diff
changeset
|
3515 emit_int8(shift & 0xFF); |
6614
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3516 } |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3517 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3518 void Assembler::psrad(XMMRegister dst, int shift) { |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3519 NOT_LP64(assert(VM_Version::supports_sse2(), "")); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3520 // XMM4 is for /4 encoding: 66 0F 72 /4 ib |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3521 int encode = simd_prefix_and_encode(xmm4, dst, dst, VEX_SIMD_66); |
7430
d02120b7a34f
8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
twisti
parents:
7427
diff
changeset
|
3522 emit_int8(0x72); |
d02120b7a34f
8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
twisti
parents:
7427
diff
changeset
|
3523 emit_int8((unsigned char)(0xC0 | encode)); |
d02120b7a34f
8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
twisti
parents:
7427
diff
changeset
|
3524 emit_int8(shift & 0xFF); |
6614
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3525 } |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3526 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3527 void Assembler::psraw(XMMRegister dst, XMMRegister shift) { |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3528 NOT_LP64(assert(VM_Version::supports_sse2(), "")); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3529 emit_simd_arith(0xE1, dst, shift, VEX_SIMD_66); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3530 } |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3531 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3532 void Assembler::psrad(XMMRegister dst, XMMRegister shift) { |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3533 NOT_LP64(assert(VM_Version::supports_sse2(), "")); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3534 emit_simd_arith(0xE2, dst, shift, VEX_SIMD_66); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3535 } |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3536 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3537 void Assembler::vpsraw(XMMRegister dst, XMMRegister src, int shift, bool vector256) { |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3538 assert(VM_Version::supports_avx() && !vector256 || VM_Version::supports_avx2(), "256 bit integer vectors requires AVX2"); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3539 // XMM4 is for /4 encoding: 66 0F 71 /4 ib |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3540 emit_vex_arith(0x71, xmm4, dst, src, VEX_SIMD_66, vector256); |
7430
d02120b7a34f
8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
twisti
parents:
7427
diff
changeset
|
3541 emit_int8(shift & 0xFF); |
6614
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3542 } |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3543 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3544 void Assembler::vpsrad(XMMRegister dst, XMMRegister src, int shift, bool vector256) { |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3545 assert(VM_Version::supports_avx() && !vector256 || VM_Version::supports_avx2(), "256 bit integer vectors requires AVX2"); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3546 // XMM4 is for /4 encoding: 66 0F 71 /4 ib |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3547 emit_vex_arith(0x72, xmm4, dst, src, VEX_SIMD_66, vector256); |
7430
d02120b7a34f
8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
twisti
parents:
7427
diff
changeset
|
3548 emit_int8(shift & 0xFF); |
6614
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3549 } |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3550 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3551 void Assembler::vpsraw(XMMRegister dst, XMMRegister src, XMMRegister shift, bool vector256) { |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3552 assert(VM_Version::supports_avx() && !vector256 || VM_Version::supports_avx2(), "256 bit integer vectors requires AVX2"); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3553 emit_vex_arith(0xE1, dst, src, shift, VEX_SIMD_66, vector256); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3554 } |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3555 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3556 void Assembler::vpsrad(XMMRegister dst, XMMRegister src, XMMRegister shift, bool vector256) { |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3557 assert(VM_Version::supports_avx() && !vector256 || VM_Version::supports_avx2(), "256 bit integer vectors requires AVX2"); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3558 emit_vex_arith(0xE2, dst, src, shift, VEX_SIMD_66, vector256); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3559 } |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3560 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3561 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3562 // AND packed integers |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3563 void Assembler::pand(XMMRegister dst, XMMRegister src) { |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3564 NOT_LP64(assert(VM_Version::supports_sse2(), "")); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3565 emit_simd_arith(0xDB, dst, src, VEX_SIMD_66); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3566 } |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3567 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3568 void Assembler::vpand(XMMRegister dst, XMMRegister nds, XMMRegister src, bool vector256) { |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3569 assert(VM_Version::supports_avx() && !vector256 || VM_Version::supports_avx2(), "256 bit integer vectors requires AVX2"); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3570 emit_vex_arith(0xDB, dst, nds, src, VEX_SIMD_66, vector256); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3571 } |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3572 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3573 void Assembler::vpand(XMMRegister dst, XMMRegister nds, Address src, bool vector256) { |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3574 assert(VM_Version::supports_avx() && !vector256 || VM_Version::supports_avx2(), "256 bit integer vectors requires AVX2"); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3575 emit_vex_arith(0xDB, dst, nds, src, VEX_SIMD_66, vector256); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3576 } |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3577 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3578 void Assembler::por(XMMRegister dst, XMMRegister src) { |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3579 NOT_LP64(assert(VM_Version::supports_sse2(), "")); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3580 emit_simd_arith(0xEB, dst, src, VEX_SIMD_66); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3581 } |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3582 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3583 void Assembler::vpor(XMMRegister dst, XMMRegister nds, XMMRegister src, bool vector256) { |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3584 assert(VM_Version::supports_avx() && !vector256 || VM_Version::supports_avx2(), "256 bit integer vectors requires AVX2"); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3585 emit_vex_arith(0xEB, dst, nds, src, VEX_SIMD_66, vector256); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3586 } |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3587 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3588 void Assembler::vpor(XMMRegister dst, XMMRegister nds, Address src, bool vector256) { |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3589 assert(VM_Version::supports_avx() && !vector256 || VM_Version::supports_avx2(), "256 bit integer vectors requires AVX2"); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3590 emit_vex_arith(0xEB, dst, nds, src, VEX_SIMD_66, vector256); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3591 } |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3592 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3593 void Assembler::pxor(XMMRegister dst, XMMRegister src) { |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3594 NOT_LP64(assert(VM_Version::supports_sse2(), "")); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3595 emit_simd_arith(0xEF, dst, src, VEX_SIMD_66); |
6179
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
6141
diff
changeset
|
3596 } |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
6141
diff
changeset
|
3597 |
6225 | 3598 void Assembler::vpxor(XMMRegister dst, XMMRegister nds, XMMRegister src, bool vector256) { |
6614
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3599 assert(VM_Version::supports_avx() && !vector256 || VM_Version::supports_avx2(), "256 bit integer vectors requires AVX2"); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3600 emit_vex_arith(0xEF, dst, nds, src, VEX_SIMD_66, vector256); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3601 } |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3602 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3603 void Assembler::vpxor(XMMRegister dst, XMMRegister nds, Address src, bool vector256) { |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3604 assert(VM_Version::supports_avx() && !vector256 || VM_Version::supports_avx2(), "256 bit integer vectors requires AVX2"); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3605 emit_vex_arith(0xEF, dst, nds, src, VEX_SIMD_66, vector256); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3606 } |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3607 |
6225 | 3608 |
6179
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
6141
diff
changeset
|
3609 void Assembler::vinsertf128h(XMMRegister dst, XMMRegister nds, XMMRegister src) { |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
6141
diff
changeset
|
3610 assert(VM_Version::supports_avx(), ""); |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
6141
diff
changeset
|
3611 bool vector256 = true; |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
6141
diff
changeset
|
3612 int encode = vex_prefix_and_encode(dst, nds, src, VEX_SIMD_66, vector256, VEX_OPCODE_0F_3A); |
7430
d02120b7a34f
8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
twisti
parents:
7427
diff
changeset
|
3613 emit_int8(0x18); |
d02120b7a34f
8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
twisti
parents:
7427
diff
changeset
|
3614 emit_int8((unsigned char)(0xC0 | encode)); |
6179
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
6141
diff
changeset
|
3615 // 0x00 - insert into lower 128 bits |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
6141
diff
changeset
|
3616 // 0x01 - insert into upper 128 bits |
7430
d02120b7a34f
8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
twisti
parents:
7427
diff
changeset
|
3617 emit_int8(0x01); |
6179
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
6141
diff
changeset
|
3618 } |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
6141
diff
changeset
|
3619 |
6792
137868b7aa6f
7196199: java/text/Bidi/Bug6665028.java failed: Bidi run count incorrect
kvn
parents:
6725
diff
changeset
|
3620 void Assembler::vinsertf128h(XMMRegister dst, Address src) { |
137868b7aa6f
7196199: java/text/Bidi/Bug6665028.java failed: Bidi run count incorrect
kvn
parents:
6725
diff
changeset
|
3621 assert(VM_Version::supports_avx(), ""); |
137868b7aa6f
7196199: java/text/Bidi/Bug6665028.java failed: Bidi run count incorrect
kvn
parents:
6725
diff
changeset
|
3622 InstructionMark im(this); |
137868b7aa6f
7196199: java/text/Bidi/Bug6665028.java failed: Bidi run count incorrect
kvn
parents:
6725
diff
changeset
|
3623 bool vector256 = true; |
137868b7aa6f
7196199: java/text/Bidi/Bug6665028.java failed: Bidi run count incorrect
kvn
parents:
6725
diff
changeset
|
3624 assert(dst != xnoreg, "sanity"); |
137868b7aa6f
7196199: java/text/Bidi/Bug6665028.java failed: Bidi run count incorrect
kvn
parents:
6725
diff
changeset
|
3625 int dst_enc = dst->encoding(); |
137868b7aa6f
7196199: java/text/Bidi/Bug6665028.java failed: Bidi run count incorrect
kvn
parents:
6725
diff
changeset
|
3626 // swap src<->dst for encoding |
137868b7aa6f
7196199: java/text/Bidi/Bug6665028.java failed: Bidi run count incorrect
kvn
parents:
6725
diff
changeset
|
3627 vex_prefix(src, dst_enc, dst_enc, VEX_SIMD_66, VEX_OPCODE_0F_3A, false, vector256); |
7430
d02120b7a34f
8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
twisti
parents:
7427
diff
changeset
|
3628 emit_int8(0x18); |
6792
137868b7aa6f
7196199: java/text/Bidi/Bug6665028.java failed: Bidi run count incorrect
kvn
parents:
6725
diff
changeset
|
3629 emit_operand(dst, src); |
137868b7aa6f
7196199: java/text/Bidi/Bug6665028.java failed: Bidi run count incorrect
kvn
parents:
6725
diff
changeset
|
3630 // 0x01 - insert into upper 128 bits |
7430
d02120b7a34f
8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
twisti
parents:
7427
diff
changeset
|
3631 emit_int8(0x01); |
6792
137868b7aa6f
7196199: java/text/Bidi/Bug6665028.java failed: Bidi run count incorrect
kvn
parents:
6725
diff
changeset
|
3632 } |
137868b7aa6f
7196199: java/text/Bidi/Bug6665028.java failed: Bidi run count incorrect
kvn
parents:
6725
diff
changeset
|
3633 |
137868b7aa6f
7196199: java/text/Bidi/Bug6665028.java failed: Bidi run count incorrect
kvn
parents:
6725
diff
changeset
|
3634 void Assembler::vextractf128h(Address dst, XMMRegister src) { |
137868b7aa6f
7196199: java/text/Bidi/Bug6665028.java failed: Bidi run count incorrect
kvn
parents:
6725
diff
changeset
|
3635 assert(VM_Version::supports_avx(), ""); |
137868b7aa6f
7196199: java/text/Bidi/Bug6665028.java failed: Bidi run count incorrect
kvn
parents:
6725
diff
changeset
|
3636 InstructionMark im(this); |
137868b7aa6f
7196199: java/text/Bidi/Bug6665028.java failed: Bidi run count incorrect
kvn
parents:
6725
diff
changeset
|
3637 bool vector256 = true; |
137868b7aa6f
7196199: java/text/Bidi/Bug6665028.java failed: Bidi run count incorrect
kvn
parents:
6725
diff
changeset
|
3638 assert(src != xnoreg, "sanity"); |
137868b7aa6f
7196199: java/text/Bidi/Bug6665028.java failed: Bidi run count incorrect
kvn
parents:
6725
diff
changeset
|
3639 int src_enc = src->encoding(); |
137868b7aa6f
7196199: java/text/Bidi/Bug6665028.java failed: Bidi run count incorrect
kvn
parents:
6725
diff
changeset
|
3640 vex_prefix(dst, 0, src_enc, VEX_SIMD_66, VEX_OPCODE_0F_3A, false, vector256); |
7430
d02120b7a34f
8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
twisti
parents:
7427
diff
changeset
|
3641 emit_int8(0x19); |
6792
137868b7aa6f
7196199: java/text/Bidi/Bug6665028.java failed: Bidi run count incorrect
kvn
parents:
6725
diff
changeset
|
3642 emit_operand(src, dst); |
137868b7aa6f
7196199: java/text/Bidi/Bug6665028.java failed: Bidi run count incorrect
kvn
parents:
6725
diff
changeset
|
3643 // 0x01 - extract from upper 128 bits |
7430
d02120b7a34f
8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
twisti
parents:
7427
diff
changeset
|
3644 emit_int8(0x01); |
6792
137868b7aa6f
7196199: java/text/Bidi/Bug6665028.java failed: Bidi run count incorrect
kvn
parents:
6725
diff
changeset
|
3645 } |
137868b7aa6f
7196199: java/text/Bidi/Bug6665028.java failed: Bidi run count incorrect
kvn
parents:
6725
diff
changeset
|
3646 |
6225 | 3647 void Assembler::vinserti128h(XMMRegister dst, XMMRegister nds, XMMRegister src) { |
3648 assert(VM_Version::supports_avx2(), ""); | |
3649 bool vector256 = true; | |
3650 int encode = vex_prefix_and_encode(dst, nds, src, VEX_SIMD_66, vector256, VEX_OPCODE_0F_3A); | |
7430
d02120b7a34f
8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
twisti
parents:
7427
diff
changeset
|
3651 emit_int8(0x38); |
d02120b7a34f
8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
twisti
parents:
7427
diff
changeset
|
3652 emit_int8((unsigned char)(0xC0 | encode)); |
6225 | 3653 // 0x00 - insert into lower 128 bits |
3654 // 0x01 - insert into upper 128 bits | |
7430
d02120b7a34f
8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
twisti
parents:
7427
diff
changeset
|
3655 emit_int8(0x01); |
6225 | 3656 } |
3657 | |
6792
137868b7aa6f
7196199: java/text/Bidi/Bug6665028.java failed: Bidi run count incorrect
kvn
parents:
6725
diff
changeset
|
3658 void Assembler::vinserti128h(XMMRegister dst, Address src) { |
137868b7aa6f
7196199: java/text/Bidi/Bug6665028.java failed: Bidi run count incorrect
kvn
parents:
6725
diff
changeset
|
3659 assert(VM_Version::supports_avx2(), ""); |
137868b7aa6f
7196199: java/text/Bidi/Bug6665028.java failed: Bidi run count incorrect
kvn
parents:
6725
diff
changeset
|
3660 InstructionMark im(this); |
137868b7aa6f
7196199: java/text/Bidi/Bug6665028.java failed: Bidi run count incorrect
kvn
parents:
6725
diff
changeset
|
3661 bool vector256 = true; |
137868b7aa6f
7196199: java/text/Bidi/Bug6665028.java failed: Bidi run count incorrect
kvn
parents:
6725
diff
changeset
|
3662 assert(dst != xnoreg, "sanity"); |
137868b7aa6f
7196199: java/text/Bidi/Bug6665028.java failed: Bidi run count incorrect
kvn
parents:
6725
diff
changeset
|
3663 int dst_enc = dst->encoding(); |
137868b7aa6f
7196199: java/text/Bidi/Bug6665028.java failed: Bidi run count incorrect
kvn
parents:
6725
diff
changeset
|
3664 // swap src<->dst for encoding |
137868b7aa6f
7196199: java/text/Bidi/Bug6665028.java failed: Bidi run count incorrect
kvn
parents:
6725
diff
changeset
|
3665 vex_prefix(src, dst_enc, dst_enc, VEX_SIMD_66, VEX_OPCODE_0F_3A, false, vector256); |
7430
d02120b7a34f
8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
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7427
diff
changeset
|
3666 emit_int8(0x38); |
6792
137868b7aa6f
7196199: java/text/Bidi/Bug6665028.java failed: Bidi run count incorrect
kvn
parents:
6725
diff
changeset
|
3667 emit_operand(dst, src); |
137868b7aa6f
7196199: java/text/Bidi/Bug6665028.java failed: Bidi run count incorrect
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parents:
6725
diff
changeset
|
3668 // 0x01 - insert into upper 128 bits |
7430
d02120b7a34f
8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
twisti
parents:
7427
diff
changeset
|
3669 emit_int8(0x01); |
6792
137868b7aa6f
7196199: java/text/Bidi/Bug6665028.java failed: Bidi run count incorrect
kvn
parents:
6725
diff
changeset
|
3670 } |
137868b7aa6f
7196199: java/text/Bidi/Bug6665028.java failed: Bidi run count incorrect
kvn
parents:
6725
diff
changeset
|
3671 |
137868b7aa6f
7196199: java/text/Bidi/Bug6665028.java failed: Bidi run count incorrect
kvn
parents:
6725
diff
changeset
|
3672 void Assembler::vextracti128h(Address dst, XMMRegister src) { |
137868b7aa6f
7196199: java/text/Bidi/Bug6665028.java failed: Bidi run count incorrect
kvn
parents:
6725
diff
changeset
|
3673 assert(VM_Version::supports_avx2(), ""); |
137868b7aa6f
7196199: java/text/Bidi/Bug6665028.java failed: Bidi run count incorrect
kvn
parents:
6725
diff
changeset
|
3674 InstructionMark im(this); |
137868b7aa6f
7196199: java/text/Bidi/Bug6665028.java failed: Bidi run count incorrect
kvn
parents:
6725
diff
changeset
|
3675 bool vector256 = true; |
137868b7aa6f
7196199: java/text/Bidi/Bug6665028.java failed: Bidi run count incorrect
kvn
parents:
6725
diff
changeset
|
3676 assert(src != xnoreg, "sanity"); |
137868b7aa6f
7196199: java/text/Bidi/Bug6665028.java failed: Bidi run count incorrect
kvn
parents:
6725
diff
changeset
|
3677 int src_enc = src->encoding(); |
137868b7aa6f
7196199: java/text/Bidi/Bug6665028.java failed: Bidi run count incorrect
kvn
parents:
6725
diff
changeset
|
3678 vex_prefix(dst, 0, src_enc, VEX_SIMD_66, VEX_OPCODE_0F_3A, false, vector256); |
7430
d02120b7a34f
8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
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parents:
7427
diff
changeset
|
3679 emit_int8(0x39); |
6792
137868b7aa6f
7196199: java/text/Bidi/Bug6665028.java failed: Bidi run count incorrect
kvn
parents:
6725
diff
changeset
|
3680 emit_operand(src, dst); |
137868b7aa6f
7196199: java/text/Bidi/Bug6665028.java failed: Bidi run count incorrect
kvn
parents:
6725
diff
changeset
|
3681 // 0x01 - extract from upper 128 bits |
7430
d02120b7a34f
8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
twisti
parents:
7427
diff
changeset
|
3682 emit_int8(0x01); |
6792
137868b7aa6f
7196199: java/text/Bidi/Bug6665028.java failed: Bidi run count incorrect
kvn
parents:
6725
diff
changeset
|
3683 } |
137868b7aa6f
7196199: java/text/Bidi/Bug6665028.java failed: Bidi run count incorrect
kvn
parents:
6725
diff
changeset
|
3684 |
7475
e2e6bf86682c
8005544: Use 256bit YMM registers in arraycopy stubs on x86
kvn
parents:
7474
diff
changeset
|
3685 // duplicate 4-bytes integer data from src into 8 locations in dest |
e2e6bf86682c
8005544: Use 256bit YMM registers in arraycopy stubs on x86
kvn
parents:
7474
diff
changeset
|
3686 void Assembler::vpbroadcastd(XMMRegister dst, XMMRegister src) { |
e2e6bf86682c
8005544: Use 256bit YMM registers in arraycopy stubs on x86
kvn
parents:
7474
diff
changeset
|
3687 assert(VM_Version::supports_avx2(), ""); |
e2e6bf86682c
8005544: Use 256bit YMM registers in arraycopy stubs on x86
kvn
parents:
7474
diff
changeset
|
3688 bool vector256 = true; |
e2e6bf86682c
8005544: Use 256bit YMM registers in arraycopy stubs on x86
kvn
parents:
7474
diff
changeset
|
3689 int encode = vex_prefix_and_encode(dst, xnoreg, src, VEX_SIMD_66, vector256, VEX_OPCODE_0F_38); |
e2e6bf86682c
8005544: Use 256bit YMM registers in arraycopy stubs on x86
kvn
parents:
7474
diff
changeset
|
3690 emit_int8(0x58); |
e2e6bf86682c
8005544: Use 256bit YMM registers in arraycopy stubs on x86
kvn
parents:
7474
diff
changeset
|
3691 emit_int8((unsigned char)(0xC0 | encode)); |
e2e6bf86682c
8005544: Use 256bit YMM registers in arraycopy stubs on x86
kvn
parents:
7474
diff
changeset
|
3692 } |
e2e6bf86682c
8005544: Use 256bit YMM registers in arraycopy stubs on x86
kvn
parents:
7474
diff
changeset
|
3693 |
6179
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
6141
diff
changeset
|
3694 void Assembler::vzeroupper() { |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
6141
diff
changeset
|
3695 assert(VM_Version::supports_avx(), ""); |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
6141
diff
changeset
|
3696 (void)vex_prefix_and_encode(xmm0, xmm0, xmm0, VEX_SIMD_NONE); |
7430
d02120b7a34f
8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
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parents:
7427
diff
changeset
|
3697 emit_int8(0x77); |
6179
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
6141
diff
changeset
|
3698 } |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
6141
diff
changeset
|
3699 |
4761
65149e74c706
7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
4759
diff
changeset
|
3700 |
304 | 3701 #ifndef _LP64 |
3702 // 32bit only pieces of the assembler | |
3703 | |
3704 void Assembler::cmp_literal32(Register src1, int32_t imm32, RelocationHolder const& rspec) { | |
3705 // NO PREFIX AS NEVER 64BIT | |
3706 InstructionMark im(this); | |
7430
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8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
twisti
parents:
7427
diff
changeset
|
3707 emit_int8((unsigned char)0x81); |
d02120b7a34f
8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
twisti
parents:
7427
diff
changeset
|
3708 emit_int8((unsigned char)(0xF8 | src1->encoding())); |
304 | 3709 emit_data(imm32, rspec, 0); |
3710 } | |
3711 | |
3712 void Assembler::cmp_literal32(Address src1, int32_t imm32, RelocationHolder const& rspec) { | |
3713 // NO PREFIX AS NEVER 64BIT (not even 32bit versions of 64bit regs | |
3714 InstructionMark im(this); | |
7430
d02120b7a34f
8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
twisti
parents:
7427
diff
changeset
|
3715 emit_int8((unsigned char)0x81); |
304 | 3716 emit_operand(rdi, src1); |
3717 emit_data(imm32, rspec, 0); | |
3718 } | |
3719 | |
3720 // The 64-bit (32bit platform) cmpxchg compares the value at adr with the contents of rdx:rax, | |
3721 // and stores rcx:rbx into adr if so; otherwise, the value at adr is loaded | |
3722 // into rdx:rax. The ZF is set if the compared values were equal, and cleared otherwise. | |
3723 void Assembler::cmpxchg8(Address adr) { | |
3724 InstructionMark im(this); | |
7430
d02120b7a34f
8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
twisti
parents:
7427
diff
changeset
|
3725 emit_int8(0x0F); |
d02120b7a34f
8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
twisti
parents:
7427
diff
changeset
|
3726 emit_int8((unsigned char)0xC7); |
304 | 3727 emit_operand(rcx, adr); |
3728 } | |
3729 | |
3730 void Assembler::decl(Register dst) { | |
3731 // Don't use it directly. Use MacroAssembler::decrementl() instead. | |
7430
d02120b7a34f
8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
twisti
parents:
7427
diff
changeset
|
3732 emit_int8(0x48 | dst->encoding()); |
304 | 3733 } |
3734 | |
3735 #endif // _LP64 | |
3736 | |
3737 // 64bit typically doesn't use the x87 but needs to for the trig funcs | |
3738 | |
3739 void Assembler::fabs() { | |
7430
d02120b7a34f
8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
twisti
parents:
7427
diff
changeset
|
3740 emit_int8((unsigned char)0xD9); |
d02120b7a34f
8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
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parents:
7427
diff
changeset
|
3741 emit_int8((unsigned char)0xE1); |
304 | 3742 } |
3743 | |
3744 void Assembler::fadd(int i) { | |
3745 emit_farith(0xD8, 0xC0, i); | |
3746 } | |
3747 | |
3748 void Assembler::fadd_d(Address src) { | |
3749 InstructionMark im(this); | |
7430
d02120b7a34f
8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
twisti
parents:
7427
diff
changeset
|
3750 emit_int8((unsigned char)0xDC); |
304 | 3751 emit_operand32(rax, src); |
3752 } | |
3753 | |
3754 void Assembler::fadd_s(Address src) { | |
3755 InstructionMark im(this); | |
7430
d02120b7a34f
8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
twisti
parents:
7427
diff
changeset
|
3756 emit_int8((unsigned char)0xD8); |
304 | 3757 emit_operand32(rax, src); |
3758 } | |
3759 | |
3760 void Assembler::fadda(int i) { | |
3761 emit_farith(0xDC, 0xC0, i); | |
3762 } | |
3763 | |
3764 void Assembler::faddp(int i) { | |
3765 emit_farith(0xDE, 0xC0, i); | |
3766 } | |
3767 | |
3768 void Assembler::fchs() { | |
7430
d02120b7a34f
8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
twisti
parents:
7427
diff
changeset
|
3769 emit_int8((unsigned char)0xD9); |
d02120b7a34f
8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
twisti
parents:
7427
diff
changeset
|
3770 emit_int8((unsigned char)0xE0); |
304 | 3771 } |
3772 | |
3773 void Assembler::fcom(int i) { | |
3774 emit_farith(0xD8, 0xD0, i); | |
3775 } | |
3776 | |
3777 void Assembler::fcomp(int i) { | |
3778 emit_farith(0xD8, 0xD8, i); | |
3779 } | |
3780 | |
3781 void Assembler::fcomp_d(Address src) { | |
3782 InstructionMark im(this); | |
7430
d02120b7a34f
8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
twisti
parents:
7427
diff
changeset
|
3783 emit_int8((unsigned char)0xDC); |
304 | 3784 emit_operand32(rbx, src); |
3785 } | |
3786 | |
3787 void Assembler::fcomp_s(Address src) { | |
3788 InstructionMark im(this); | |
7430
d02120b7a34f
8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
twisti
parents:
7427
diff
changeset
|
3789 emit_int8((unsigned char)0xD8); |
304 | 3790 emit_operand32(rbx, src); |
3791 } | |
3792 | |
3793 void Assembler::fcompp() { | |
7430
d02120b7a34f
8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
twisti
parents:
7427
diff
changeset
|
3794 emit_int8((unsigned char)0xDE); |
d02120b7a34f
8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
twisti
parents:
7427
diff
changeset
|
3795 emit_int8((unsigned char)0xD9); |
304 | 3796 } |
3797 | |
3798 void Assembler::fcos() { | |
7430
d02120b7a34f
8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
twisti
parents:
7427
diff
changeset
|
3799 emit_int8((unsigned char)0xD9); |
d02120b7a34f
8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
twisti
parents:
7427
diff
changeset
|
3800 emit_int8((unsigned char)0xFF); |
304 | 3801 } |
3802 | |
3803 void Assembler::fdecstp() { | |
7430
d02120b7a34f
8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
twisti
parents:
7427
diff
changeset
|
3804 emit_int8((unsigned char)0xD9); |
d02120b7a34f
8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
twisti
parents:
7427
diff
changeset
|
3805 emit_int8((unsigned char)0xF6); |
304 | 3806 } |
3807 | |
3808 void Assembler::fdiv(int i) { | |
3809 emit_farith(0xD8, 0xF0, i); | |
3810 } | |
3811 | |
3812 void Assembler::fdiv_d(Address src) { | |
3813 InstructionMark im(this); | |
7430
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8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
twisti
parents:
7427
diff
changeset
|
3814 emit_int8((unsigned char)0xDC); |
304 | 3815 emit_operand32(rsi, src); |
3816 } | |
3817 | |
3818 void Assembler::fdiv_s(Address src) { | |
3819 InstructionMark im(this); | |
7430
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8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
twisti
parents:
7427
diff
changeset
|
3820 emit_int8((unsigned char)0xD8); |
304 | 3821 emit_operand32(rsi, src); |
3822 } | |
3823 | |
3824 void Assembler::fdiva(int i) { | |
3825 emit_farith(0xDC, 0xF8, i); | |
3826 } | |
3827 | |
3828 // Note: The Intel manual (Pentium Processor User's Manual, Vol.3, 1994) | |
3829 // is erroneous for some of the floating-point instructions below. | |
3830 | |
3831 void Assembler::fdivp(int i) { | |
3832 emit_farith(0xDE, 0xF8, i); // ST(0) <- ST(0) / ST(1) and pop (Intel manual wrong) | |
3833 } | |
3834 | |
3835 void Assembler::fdivr(int i) { | |
3836 emit_farith(0xD8, 0xF8, i); | |
3837 } | |
3838 | |
3839 void Assembler::fdivr_d(Address src) { | |
3840 InstructionMark im(this); | |
7430
d02120b7a34f
8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
twisti
parents:
7427
diff
changeset
|
3841 emit_int8((unsigned char)0xDC); |
304 | 3842 emit_operand32(rdi, src); |
3843 } | |
3844 | |
3845 void Assembler::fdivr_s(Address src) { | |
3846 InstructionMark im(this); | |
7430
d02120b7a34f
8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
twisti
parents:
7427
diff
changeset
|
3847 emit_int8((unsigned char)0xD8); |
304 | 3848 emit_operand32(rdi, src); |
3849 } | |
3850 | |
3851 void Assembler::fdivra(int i) { | |
3852 emit_farith(0xDC, 0xF0, i); | |
3853 } | |
3854 | |
3855 void Assembler::fdivrp(int i) { | |
3856 emit_farith(0xDE, 0xF0, i); // ST(0) <- ST(1) / ST(0) and pop (Intel manual wrong) | |
3857 } | |
3858 | |
3859 void Assembler::ffree(int i) { | |
3860 emit_farith(0xDD, 0xC0, i); | |
3861 } | |
3862 | |
3863 void Assembler::fild_d(Address adr) { | |
3864 InstructionMark im(this); | |
7430
d02120b7a34f
8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
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7427
diff
changeset
|
3865 emit_int8((unsigned char)0xDF); |
304 | 3866 emit_operand32(rbp, adr); |
3867 } | |
3868 | |
3869 void Assembler::fild_s(Address adr) { | |
3870 InstructionMark im(this); | |
7430
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8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
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diff
changeset
|
3871 emit_int8((unsigned char)0xDB); |
304 | 3872 emit_operand32(rax, adr); |
3873 } | |
3874 | |
3875 void Assembler::fincstp() { | |
7430
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8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
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diff
changeset
|
3876 emit_int8((unsigned char)0xD9); |
d02120b7a34f
8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
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parents:
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diff
changeset
|
3877 emit_int8((unsigned char)0xF7); |
304 | 3878 } |
3879 | |
3880 void Assembler::finit() { | |
7430
d02120b7a34f
8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
twisti
parents:
7427
diff
changeset
|
3881 emit_int8((unsigned char)0x9B); |
d02120b7a34f
8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
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7427
diff
changeset
|
3882 emit_int8((unsigned char)0xDB); |
d02120b7a34f
8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
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diff
changeset
|
3883 emit_int8((unsigned char)0xE3); |
304 | 3884 } |
3885 | |
3886 void Assembler::fist_s(Address adr) { | |
3887 InstructionMark im(this); | |
7430
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8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
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diff
changeset
|
3888 emit_int8((unsigned char)0xDB); |
304 | 3889 emit_operand32(rdx, adr); |
3890 } | |
3891 | |
3892 void Assembler::fistp_d(Address adr) { | |
3893 InstructionMark im(this); | |
7430
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8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
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diff
changeset
|
3894 emit_int8((unsigned char)0xDF); |
304 | 3895 emit_operand32(rdi, adr); |
3896 } | |
3897 | |
3898 void Assembler::fistp_s(Address adr) { | |
3899 InstructionMark im(this); | |
7430
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8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
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changeset
|
3900 emit_int8((unsigned char)0xDB); |
304 | 3901 emit_operand32(rbx, adr); |
3902 } | |
0 | 3903 |
3904 void Assembler::fld1() { | |
7430
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8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
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diff
changeset
|
3905 emit_int8((unsigned char)0xD9); |
d02120b7a34f
8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
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diff
changeset
|
3906 emit_int8((unsigned char)0xE8); |
0 | 3907 } |
3908 | |
304 | 3909 void Assembler::fld_d(Address adr) { |
3910 InstructionMark im(this); | |
7430
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8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
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changeset
|
3911 emit_int8((unsigned char)0xDD); |
304 | 3912 emit_operand32(rax, adr); |
3913 } | |
0 | 3914 |
3915 void Assembler::fld_s(Address adr) { | |
3916 InstructionMark im(this); | |
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8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
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changeset
|
3917 emit_int8((unsigned char)0xD9); |
304 | 3918 emit_operand32(rax, adr); |
3919 } | |
3920 | |
3921 | |
3922 void Assembler::fld_s(int index) { | |
0 | 3923 emit_farith(0xD9, 0xC0, index); |
3924 } | |
3925 | |
3926 void Assembler::fld_x(Address adr) { | |
3927 InstructionMark im(this); | |
7430
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changeset
|
3928 emit_int8((unsigned char)0xDB); |
304 | 3929 emit_operand32(rbp, adr); |
3930 } | |
3931 | |
3932 void Assembler::fldcw(Address src) { | |
3933 InstructionMark im(this); | |
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3934 emit_int8((unsigned char)0xD9); |
304 | 3935 emit_operand32(rbp, src); |
3936 } | |
3937 | |
3938 void Assembler::fldenv(Address src) { | |
0 | 3939 InstructionMark im(this); |
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3940 emit_int8((unsigned char)0xD9); |
304 | 3941 emit_operand32(rsp, src); |
3942 } | |
3943 | |
3944 void Assembler::fldlg2() { | |
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3945 emit_int8((unsigned char)0xD9); |
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3946 emit_int8((unsigned char)0xEC); |
304 | 3947 } |
0 | 3948 |
3949 void Assembler::fldln2() { | |
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3950 emit_int8((unsigned char)0xD9); |
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3951 emit_int8((unsigned char)0xED); |
0 | 3952 } |
3953 | |
304 | 3954 void Assembler::fldz() { |
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3955 emit_int8((unsigned char)0xD9); |
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3956 emit_int8((unsigned char)0xEE); |
304 | 3957 } |
0 | 3958 |
3959 void Assembler::flog() { | |
3960 fldln2(); | |
3961 fxch(); | |
3962 fyl2x(); | |
3963 } | |
3964 | |
3965 void Assembler::flog10() { | |
3966 fldlg2(); | |
3967 fxch(); | |
3968 fyl2x(); | |
3969 } | |
3970 | |
304 | 3971 void Assembler::fmul(int i) { |
3972 emit_farith(0xD8, 0xC8, i); | |
3973 } | |
3974 | |
3975 void Assembler::fmul_d(Address src) { | |
3976 InstructionMark im(this); | |
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3977 emit_int8((unsigned char)0xDC); |
304 | 3978 emit_operand32(rcx, src); |
3979 } | |
3980 | |
3981 void Assembler::fmul_s(Address src) { | |
3982 InstructionMark im(this); | |
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3983 emit_int8((unsigned char)0xD8); |
304 | 3984 emit_operand32(rcx, src); |
3985 } | |
3986 | |
3987 void Assembler::fmula(int i) { | |
3988 emit_farith(0xDC, 0xC8, i); | |
3989 } | |
3990 | |
3991 void Assembler::fmulp(int i) { | |
3992 emit_farith(0xDE, 0xC8, i); | |
3993 } | |
3994 | |
3995 void Assembler::fnsave(Address dst) { | |
3996 InstructionMark im(this); | |
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3997 emit_int8((unsigned char)0xDD); |
304 | 3998 emit_operand32(rsi, dst); |
3999 } | |
4000 | |
4001 void Assembler::fnstcw(Address src) { | |
4002 InstructionMark im(this); | |
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4003 emit_int8((unsigned char)0x9B); |
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4004 emit_int8((unsigned char)0xD9); |
304 | 4005 emit_operand32(rdi, src); |
4006 } | |
4007 | |
4008 void Assembler::fnstsw_ax() { | |
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4009 emit_int8((unsigned char)0xDF); |
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|
4010 emit_int8((unsigned char)0xE0); |
304 | 4011 } |
4012 | |
4013 void Assembler::fprem() { | |
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|
4014 emit_int8((unsigned char)0xD9); |
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4015 emit_int8((unsigned char)0xF8); |
304 | 4016 } |
4017 | |
4018 void Assembler::fprem1() { | |
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|
4019 emit_int8((unsigned char)0xD9); |
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|
4020 emit_int8((unsigned char)0xF5); |
304 | 4021 } |
4022 | |
4023 void Assembler::frstor(Address src) { | |
4024 InstructionMark im(this); | |
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|
4025 emit_int8((unsigned char)0xDD); |
304 | 4026 emit_operand32(rsp, src); |
4027 } | |
0 | 4028 |
4029 void Assembler::fsin() { | |
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|
4030 emit_int8((unsigned char)0xD9); |
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|
4031 emit_int8((unsigned char)0xFE); |
0 | 4032 } |
4033 | |
304 | 4034 void Assembler::fsqrt() { |
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|
4035 emit_int8((unsigned char)0xD9); |
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|
4036 emit_int8((unsigned char)0xFA); |
304 | 4037 } |
4038 | |
4039 void Assembler::fst_d(Address adr) { | |
4040 InstructionMark im(this); | |
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4041 emit_int8((unsigned char)0xDD); |
304 | 4042 emit_operand32(rdx, adr); |
4043 } | |
4044 | |
4045 void Assembler::fst_s(Address adr) { | |
4046 InstructionMark im(this); | |
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|
4047 emit_int8((unsigned char)0xD9); |
304 | 4048 emit_operand32(rdx, adr); |
4049 } | |
4050 | |
4051 void Assembler::fstp_d(Address adr) { | |
4052 InstructionMark im(this); | |
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|
4053 emit_int8((unsigned char)0xDD); |
304 | 4054 emit_operand32(rbx, adr); |
4055 } | |
4056 | |
4057 void Assembler::fstp_d(int index) { | |
4058 emit_farith(0xDD, 0xD8, index); | |
4059 } | |
4060 | |
4061 void Assembler::fstp_s(Address adr) { | |
4062 InstructionMark im(this); | |
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|
4063 emit_int8((unsigned char)0xD9); |
304 | 4064 emit_operand32(rbx, adr); |
4065 } | |
4066 | |
4067 void Assembler::fstp_x(Address adr) { | |
4068 InstructionMark im(this); | |
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|
4069 emit_int8((unsigned char)0xDB); |
304 | 4070 emit_operand32(rdi, adr); |
4071 } | |
4072 | |
4073 void Assembler::fsub(int i) { | |
4074 emit_farith(0xD8, 0xE0, i); | |
4075 } | |
4076 | |
4077 void Assembler::fsub_d(Address src) { | |
4078 InstructionMark im(this); | |
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|
4079 emit_int8((unsigned char)0xDC); |
304 | 4080 emit_operand32(rsp, src); |
4081 } | |
4082 | |
4083 void Assembler::fsub_s(Address src) { | |
4084 InstructionMark im(this); | |
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|
4085 emit_int8((unsigned char)0xD8); |
304 | 4086 emit_operand32(rsp, src); |
4087 } | |
4088 | |
4089 void Assembler::fsuba(int i) { | |
4090 emit_farith(0xDC, 0xE8, i); | |
4091 } | |
4092 | |
4093 void Assembler::fsubp(int i) { | |
4094 emit_farith(0xDE, 0xE8, i); // ST(0) <- ST(0) - ST(1) and pop (Intel manual wrong) | |
4095 } | |
4096 | |
4097 void Assembler::fsubr(int i) { | |
4098 emit_farith(0xD8, 0xE8, i); | |
4099 } | |
4100 | |
4101 void Assembler::fsubr_d(Address src) { | |
4102 InstructionMark im(this); | |
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|
4103 emit_int8((unsigned char)0xDC); |
304 | 4104 emit_operand32(rbp, src); |
4105 } | |
4106 | |
4107 void Assembler::fsubr_s(Address src) { | |
4108 InstructionMark im(this); | |
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|
4109 emit_int8((unsigned char)0xD8); |
304 | 4110 emit_operand32(rbp, src); |
4111 } | |
4112 | |
4113 void Assembler::fsubra(int i) { | |
4114 emit_farith(0xDC, 0xE0, i); | |
4115 } | |
4116 | |
4117 void Assembler::fsubrp(int i) { | |
4118 emit_farith(0xDE, 0xE0, i); // ST(0) <- ST(1) - ST(0) and pop (Intel manual wrong) | |
0 | 4119 } |
4120 | |
4121 void Assembler::ftan() { | |
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|
4122 emit_int8((unsigned char)0xD9); |
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|
4123 emit_int8((unsigned char)0xF2); |
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|
4124 emit_int8((unsigned char)0xDD); |
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|
4125 emit_int8((unsigned char)0xD8); |
0 | 4126 } |
4127 | |
304 | 4128 void Assembler::ftst() { |
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changeset
|
4129 emit_int8((unsigned char)0xD9); |
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|
4130 emit_int8((unsigned char)0xE4); |
304 | 4131 } |
0 | 4132 |
4133 void Assembler::fucomi(int i) { | |
4134 // make sure the instruction is supported (introduced for P6, together with cmov) | |
4135 guarantee(VM_Version::supports_cmov(), "illegal instruction"); | |
4136 emit_farith(0xDB, 0xE8, i); | |
4137 } | |
4138 | |
4139 void Assembler::fucomip(int i) { | |
4140 // make sure the instruction is supported (introduced for P6, together with cmov) | |
4141 guarantee(VM_Version::supports_cmov(), "illegal instruction"); | |
4142 emit_farith(0xDF, 0xE8, i); | |
4143 } | |
4144 | |
4145 void Assembler::fwait() { | |
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changeset
|
4146 emit_int8((unsigned char)0x9B); |
0 | 4147 } |
4148 | |
304 | 4149 void Assembler::fxch(int i) { |
4150 emit_farith(0xD9, 0xC8, i); | |
4151 } | |
4152 | |
4153 void Assembler::fyl2x() { | |
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|
4154 emit_int8((unsigned char)0xD9); |
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changeset
|
4155 emit_int8((unsigned char)0xF1); |
304 | 4156 } |
4157 | |
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|
4158 void Assembler::frndint() { |
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changeset
|
4159 emit_int8((unsigned char)0xD9); |
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|
4160 emit_int8((unsigned char)0xFC); |
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|
4161 } |
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|
4162 |
6759698e3140
7133857: exp() and pow() should use the x87 ISA on x86
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|
4163 void Assembler::f2xm1() { |
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|
4164 emit_int8((unsigned char)0xD9); |
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|
4165 emit_int8((unsigned char)0xF0); |
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|
4166 } |
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|
4167 |
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|
4168 void Assembler::fldl2e() { |
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|
4169 emit_int8((unsigned char)0xD9); |
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|
4170 emit_int8((unsigned char)0xEA); |
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|
4171 } |
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|
4172 |
4759 | 4173 // SSE SIMD prefix byte values corresponding to VexSimdPrefix encoding. |
4174 static int simd_pre[4] = { 0, 0x66, 0xF3, 0xF2 }; | |
4175 // SSE opcode second byte values (first is 0x0F) corresponding to VexOpcode encoding. | |
4176 static int simd_opc[4] = { 0, 0, 0x38, 0x3A }; | |
4177 | |
4178 // Generate SSE legacy REX prefix and SIMD opcode based on VEX encoding. | |
4179 void Assembler::rex_prefix(Address adr, XMMRegister xreg, VexSimdPrefix pre, VexOpcode opc, bool rex_w) { | |
4180 if (pre > 0) { | |
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|
4181 emit_int8(simd_pre[pre]); |
4759 | 4182 } |
4183 if (rex_w) { | |
4184 prefixq(adr, xreg); | |
4185 } else { | |
4186 prefix(adr, xreg); | |
4187 } | |
4188 if (opc > 0) { | |
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|
4189 emit_int8(0x0F); |
4759 | 4190 int opc2 = simd_opc[opc]; |
4191 if (opc2 > 0) { | |
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|
4192 emit_int8(opc2); |
4759 | 4193 } |
4194 } | |
4195 } | |
4196 | |
4197 int Assembler::rex_prefix_and_encode(int dst_enc, int src_enc, VexSimdPrefix pre, VexOpcode opc, bool rex_w) { | |
4198 if (pre > 0) { | |
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|
4199 emit_int8(simd_pre[pre]); |
4759 | 4200 } |
4201 int encode = (rex_w) ? prefixq_and_encode(dst_enc, src_enc) : | |
4202 prefix_and_encode(dst_enc, src_enc); | |
4203 if (opc > 0) { | |
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|
4204 emit_int8(0x0F); |
4759 | 4205 int opc2 = simd_opc[opc]; |
4206 if (opc2 > 0) { | |
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|
4207 emit_int8(opc2); |
4759 | 4208 } |
4209 } | |
4210 return encode; | |
4211 } | |
4212 | |
4213 | |
4214 void Assembler::vex_prefix(bool vex_r, bool vex_b, bool vex_x, bool vex_w, int nds_enc, VexSimdPrefix pre, VexOpcode opc, bool vector256) { | |
4215 if (vex_b || vex_x || vex_w || (opc == VEX_OPCODE_0F_38) || (opc == VEX_OPCODE_0F_3A)) { | |
4216 prefix(VEX_3bytes); | |
4217 | |
4218 int byte1 = (vex_r ? VEX_R : 0) | (vex_x ? VEX_X : 0) | (vex_b ? VEX_B : 0); | |
4219 byte1 = (~byte1) & 0xE0; | |
4220 byte1 |= opc; | |
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changeset
|
4221 emit_int8(byte1); |
4759 | 4222 |
4223 int byte2 = ((~nds_enc) & 0xf) << 3; | |
4224 byte2 |= (vex_w ? VEX_W : 0) | (vector256 ? 4 : 0) | pre; | |
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4225 emit_int8(byte2); |
4759 | 4226 } else { |
4227 prefix(VEX_2bytes); | |
4228 | |
4229 int byte1 = vex_r ? VEX_R : 0; | |
4230 byte1 = (~byte1) & 0x80; | |
4231 byte1 |= ((~nds_enc) & 0xf) << 3; | |
4232 byte1 |= (vector256 ? 4 : 0) | pre; | |
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4233 emit_int8(byte1); |
4759 | 4234 } |
4235 } | |
4236 | |
4237 void Assembler::vex_prefix(Address adr, int nds_enc, int xreg_enc, VexSimdPrefix pre, VexOpcode opc, bool vex_w, bool vector256){ | |
4238 bool vex_r = (xreg_enc >= 8); | |
4239 bool vex_b = adr.base_needs_rex(); | |
4240 bool vex_x = adr.index_needs_rex(); | |
4241 vex_prefix(vex_r, vex_b, vex_x, vex_w, nds_enc, pre, opc, vector256); | |
4242 } | |
4243 | |
4244 int Assembler::vex_prefix_and_encode(int dst_enc, int nds_enc, int src_enc, VexSimdPrefix pre, VexOpcode opc, bool vex_w, bool vector256) { | |
4245 bool vex_r = (dst_enc >= 8); | |
4246 bool vex_b = (src_enc >= 8); | |
4247 bool vex_x = false; | |
4248 vex_prefix(vex_r, vex_b, vex_x, vex_w, nds_enc, pre, opc, vector256); | |
4249 return (((dst_enc & 7) << 3) | (src_enc & 7)); | |
4250 } | |
4251 | |
4252 | |
4253 void Assembler::simd_prefix(XMMRegister xreg, XMMRegister nds, Address adr, VexSimdPrefix pre, VexOpcode opc, bool rex_w, bool vector256) { | |
4254 if (UseAVX > 0) { | |
4255 int xreg_enc = xreg->encoding(); | |
4256 int nds_enc = nds->is_valid() ? nds->encoding() : 0; | |
4257 vex_prefix(adr, nds_enc, xreg_enc, pre, opc, rex_w, vector256); | |
4258 } else { | |
4259 assert((nds == xreg) || (nds == xnoreg), "wrong sse encoding"); | |
4260 rex_prefix(adr, xreg, pre, opc, rex_w); | |
4261 } | |
4262 } | |
4263 | |
4264 int Assembler::simd_prefix_and_encode(XMMRegister dst, XMMRegister nds, XMMRegister src, VexSimdPrefix pre, VexOpcode opc, bool rex_w, bool vector256) { | |
4265 int dst_enc = dst->encoding(); | |
4266 int src_enc = src->encoding(); | |
4267 if (UseAVX > 0) { | |
4268 int nds_enc = nds->is_valid() ? nds->encoding() : 0; | |
4269 return vex_prefix_and_encode(dst_enc, nds_enc, src_enc, pre, opc, rex_w, vector256); | |
4270 } else { | |
4271 assert((nds == dst) || (nds == src) || (nds == xnoreg), "wrong sse encoding"); | |
4272 return rex_prefix_and_encode(dst_enc, src_enc, pre, opc, rex_w); | |
4273 } | |
4274 } | |
304 | 4275 |
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4276 void Assembler::emit_simd_arith(int opcode, XMMRegister dst, Address src, VexSimdPrefix pre) { |
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4277 InstructionMark im(this); |
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4278 simd_prefix(dst, dst, src, pre); |
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4279 emit_int8(opcode); |
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4280 emit_operand(dst, src); |
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4281 } |
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4282 |
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4283 void Assembler::emit_simd_arith(int opcode, XMMRegister dst, XMMRegister src, VexSimdPrefix pre) { |
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4284 int encode = simd_prefix_and_encode(dst, dst, src, pre); |
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4285 emit_int8(opcode); |
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4286 emit_int8((unsigned char)(0xC0 | encode)); |
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4287 } |
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4288 |
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4289 // Versions with no second source register (non-destructive source). |
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4290 void Assembler::emit_simd_arith_nonds(int opcode, XMMRegister dst, Address src, VexSimdPrefix pre) { |
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4291 InstructionMark im(this); |
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4292 simd_prefix(dst, xnoreg, src, pre); |
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4293 emit_int8(opcode); |
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4294 emit_operand(dst, src); |
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4295 } |
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4296 |
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4297 void Assembler::emit_simd_arith_nonds(int opcode, XMMRegister dst, XMMRegister src, VexSimdPrefix pre) { |
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4298 int encode = simd_prefix_and_encode(dst, xnoreg, src, pre); |
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4299 emit_int8(opcode); |
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4300 emit_int8((unsigned char)(0xC0 | encode)); |
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4301 } |
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4302 |
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4303 // 3-operands AVX instructions |
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4304 void Assembler::emit_vex_arith(int opcode, XMMRegister dst, XMMRegister nds, |
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4305 Address src, VexSimdPrefix pre, bool vector256) { |
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4306 InstructionMark im(this); |
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4307 vex_prefix(dst, nds, src, pre, vector256); |
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4308 emit_int8(opcode); |
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4309 emit_operand(dst, src); |
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4310 } |
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4311 |
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4312 void Assembler::emit_vex_arith(int opcode, XMMRegister dst, XMMRegister nds, |
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4313 XMMRegister src, VexSimdPrefix pre, bool vector256) { |
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4314 int encode = vex_prefix_and_encode(dst, nds, src, pre, vector256); |
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4315 emit_int8(opcode); |
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4316 emit_int8((unsigned char)(0xC0 | encode)); |
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4317 } |
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4318 |
304 | 4319 #ifndef _LP64 |
4320 | |
4321 void Assembler::incl(Register dst) { | |
4322 // Don't use it directly. Use MacroAssembler::incrementl() instead. | |
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4323 emit_int8(0x40 | dst->encoding()); |
304 | 4324 } |
4325 | |
4326 void Assembler::lea(Register dst, Address src) { | |
4327 leal(dst, src); | |
4328 } | |
4329 | |
4330 void Assembler::mov_literal32(Address dst, int32_t imm32, RelocationHolder const& rspec) { | |
4331 InstructionMark im(this); | |
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4332 emit_int8((unsigned char)0xC7); |
304 | 4333 emit_operand(rax, dst); |
4334 emit_data((int)imm32, rspec, 0); | |
4335 } | |
4336 | |
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4337 void Assembler::mov_literal32(Register dst, int32_t imm32, RelocationHolder const& rspec) { |
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4338 InstructionMark im(this); |
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4339 int encode = prefix_and_encode(dst->encoding()); |
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4340 emit_int8((unsigned char)(0xB8 | encode)); |
642
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4341 emit_data((int)imm32, rspec, 0); |
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4342 } |
304 | 4343 |
4344 void Assembler::popa() { // 32bit | |
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4345 emit_int8(0x61); |
304 | 4346 } |
4347 | |
4348 void Assembler::push_literal32(int32_t imm32, RelocationHolder const& rspec) { | |
4349 InstructionMark im(this); | |
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4350 emit_int8(0x68); |
304 | 4351 emit_data(imm32, rspec, 0); |
4352 } | |
4353 | |
4354 void Assembler::pusha() { // 32bit | |
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4355 emit_int8(0x60); |
304 | 4356 } |
4357 | |
4358 void Assembler::set_byte_if_not_zero(Register dst) { | |
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4359 emit_int8(0x0F); |
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4360 emit_int8((unsigned char)0x95); |
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4361 emit_int8((unsigned char)(0xE0 | dst->encoding())); |
304 | 4362 } |
4363 | |
4364 void Assembler::shldl(Register dst, Register src) { | |
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4365 emit_int8(0x0F); |
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4366 emit_int8((unsigned char)0xA5); |
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4367 emit_int8((unsigned char)(0xC0 | src->encoding() << 3 | dst->encoding())); |
304 | 4368 } |
4369 | |
4370 void Assembler::shrdl(Register dst, Register src) { | |
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4371 emit_int8(0x0F); |
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4372 emit_int8((unsigned char)0xAD); |
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4373 emit_int8((unsigned char)(0xC0 | src->encoding() << 3 | dst->encoding())); |
304 | 4374 } |
4375 | |
4376 #else // LP64 | |
4377 | |
1369 | 4378 void Assembler::set_byte_if_not_zero(Register dst) { |
4379 int enc = prefix_and_encode(dst->encoding(), true); | |
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4380 emit_int8(0x0F); |
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4381 emit_int8((unsigned char)0x95); |
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4382 emit_int8((unsigned char)(0xE0 | enc)); |
1369 | 4383 } |
4384 | |
304 | 4385 // 64bit only pieces of the assembler |
4386 // This should only be used by 64bit instructions that can use rip-relative | |
4387 // it cannot be used by instructions that want an immediate value. | |
4388 | |
4389 bool Assembler::reachable(AddressLiteral adr) { | |
4390 int64_t disp; | |
4391 // None will force a 64bit literal to the code stream. Likely a placeholder | |
4392 // for something that will be patched later and we need to certain it will | |
4393 // always be reachable. | |
4394 if (adr.reloc() == relocInfo::none) { | |
4395 return false; | |
4396 } | |
4397 if (adr.reloc() == relocInfo::internal_word_type) { | |
4398 // This should be rip relative and easily reachable. | |
4399 return true; | |
4400 } | |
4401 if (adr.reloc() == relocInfo::virtual_call_type || | |
4402 adr.reloc() == relocInfo::opt_virtual_call_type || | |
4403 adr.reloc() == relocInfo::static_call_type || | |
4404 adr.reloc() == relocInfo::static_stub_type ) { | |
4405 // This should be rip relative within the code cache and easily | |
4406 // reachable until we get huge code caches. (At which point | |
4407 // ic code is going to have issues). | |
4408 return true; | |
4409 } | |
4410 if (adr.reloc() != relocInfo::external_word_type && | |
4411 adr.reloc() != relocInfo::poll_return_type && // these are really external_word but need special | |
4412 adr.reloc() != relocInfo::poll_type && // relocs to identify them | |
4413 adr.reloc() != relocInfo::runtime_call_type ) { | |
4414 return false; | |
4415 } | |
4416 | |
4417 // Stress the correction code | |
4418 if (ForceUnreachable) { | |
4419 // Must be runtimecall reloc, see if it is in the codecache | |
4420 // Flipping stuff in the codecache to be unreachable causes issues | |
4421 // with things like inline caches where the additional instructions | |
4422 // are not handled. | |
4423 if (CodeCache::find_blob(adr._target) == NULL) { | |
4424 return false; | |
4425 } | |
4426 } | |
4427 // For external_word_type/runtime_call_type if it is reachable from where we | |
4428 // are now (possibly a temp buffer) and where we might end up | |
4429 // anywhere in the codeCache then we are always reachable. | |
4430 // This would have to change if we ever save/restore shared code | |
4431 // to be more pessimistic. | |
4432 disp = (int64_t)adr._target - ((int64_t)CodeCache::low_bound() + sizeof(int)); | |
4433 if (!is_simm32(disp)) return false; | |
4434 disp = (int64_t)adr._target - ((int64_t)CodeCache::high_bound() + sizeof(int)); | |
4435 if (!is_simm32(disp)) return false; | |
4436 | |
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4437 disp = (int64_t)adr._target - ((int64_t)pc() + sizeof(int)); |
304 | 4438 |
4439 // Because rip relative is a disp + address_of_next_instruction and we | |
4440 // don't know the value of address_of_next_instruction we apply a fudge factor | |
4441 // to make sure we will be ok no matter the size of the instruction we get placed into. | |
4442 // We don't have to fudge the checks above here because they are already worst case. | |
4443 | |
4444 // 12 == override/rex byte, opcode byte, rm byte, sib byte, a 4-byte disp , 4-byte literal | |
4445 // + 4 because better safe than sorry. | |
4446 const int fudge = 12 + 4; | |
4447 if (disp < 0) { | |
4448 disp -= fudge; | |
4449 } else { | |
4450 disp += fudge; | |
4451 } | |
4452 return is_simm32(disp); | |
4453 } | |
4454 | |
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4455 // Check if the polling page is not reachable from the code cache using rip-relative |
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4456 // addressing. |
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4457 bool Assembler::is_polling_page_far() { |
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4458 intptr_t addr = (intptr_t)os::get_polling_page(); |
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4459 return ForceUnreachable || |
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|
4460 !is_simm32(addr - (intptr_t)CodeCache::low_bound()) || |
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diff
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|
4461 !is_simm32(addr - (intptr_t)CodeCache::high_bound()); |
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6964776: c2 should ensure the polling page is reachable on 64 bit
iveresov
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2357
diff
changeset
|
4462 } |
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diff
changeset
|
4463 |
304 | 4464 void Assembler::emit_data64(jlong data, |
4465 relocInfo::relocType rtype, | |
4466 int format) { | |
4467 if (rtype == relocInfo::none) { | |
7198
6ab62ad83507
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twisti
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6894
diff
changeset
|
4468 emit_int64(data); |
304 | 4469 } else { |
4470 emit_data64(data, Relocation::spec_simple(rtype), format); | |
4471 } | |
4472 } | |
4473 | |
4474 void Assembler::emit_data64(jlong data, | |
4475 RelocationHolder const& rspec, | |
4476 int format) { | |
4477 assert(imm_operand == 0, "default format must be immediate in this file"); | |
4478 assert(imm_operand == format, "must be immediate"); | |
4479 assert(inst_mark() != NULL, "must be inside InstructionMark"); | |
4480 // Do not use AbstractAssembler::relocate, which is not intended for | |
4481 // embedded words. Instead, relocate to the enclosing instruction. | |
4482 code_section()->relocate(inst_mark(), rspec, format); | |
4483 #ifdef ASSERT | |
4484 check_relocation(rspec, format); | |
4485 #endif | |
7198
6ab62ad83507
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diff
changeset
|
4486 emit_int64(data); |
304 | 4487 } |
4488 | |
4489 int Assembler::prefix_and_encode(int reg_enc, bool byteinst) { | |
4490 if (reg_enc >= 8) { | |
4491 prefix(REX_B); | |
4492 reg_enc -= 8; | |
4493 } else if (byteinst && reg_enc >= 4) { | |
4494 prefix(REX); | |
4495 } | |
4496 return reg_enc; | |
4497 } | |
4498 | |
4499 int Assembler::prefixq_and_encode(int reg_enc) { | |
4500 if (reg_enc < 8) { | |
4501 prefix(REX_W); | |
4502 } else { | |
4503 prefix(REX_WB); | |
4504 reg_enc -= 8; | |
4505 } | |
4506 return reg_enc; | |
4507 } | |
4508 | |
4509 int Assembler::prefix_and_encode(int dst_enc, int src_enc, bool byteinst) { | |
4510 if (dst_enc < 8) { | |
4511 if (src_enc >= 8) { | |
4512 prefix(REX_B); | |
4513 src_enc -= 8; | |
4514 } else if (byteinst && src_enc >= 4) { | |
4515 prefix(REX); | |
4516 } | |
4517 } else { | |
4518 if (src_enc < 8) { | |
4519 prefix(REX_R); | |
4520 } else { | |
4521 prefix(REX_RB); | |
4522 src_enc -= 8; | |
4523 } | |
4524 dst_enc -= 8; | |
4525 } | |
4526 return dst_enc << 3 | src_enc; | |
4527 } | |
4528 | |
4529 int Assembler::prefixq_and_encode(int dst_enc, int src_enc) { | |
4530 if (dst_enc < 8) { | |
4531 if (src_enc < 8) { | |
4532 prefix(REX_W); | |
4533 } else { | |
4534 prefix(REX_WB); | |
4535 src_enc -= 8; | |
4536 } | |
4537 } else { | |
4538 if (src_enc < 8) { | |
4539 prefix(REX_WR); | |
4540 } else { | |
4541 prefix(REX_WRB); | |
4542 src_enc -= 8; | |
4543 } | |
4544 dst_enc -= 8; | |
4545 } | |
4546 return dst_enc << 3 | src_enc; | |
4547 } | |
4548 | |
4549 void Assembler::prefix(Register reg) { | |
4550 if (reg->encoding() >= 8) { | |
4551 prefix(REX_B); | |
4552 } | |
4553 } | |
4554 | |
4555 void Assembler::prefix(Address adr) { | |
4556 if (adr.base_needs_rex()) { | |
4557 if (adr.index_needs_rex()) { | |
4558 prefix(REX_XB); | |
4559 } else { | |
4560 prefix(REX_B); | |
4561 } | |
4562 } else { | |
4563 if (adr.index_needs_rex()) { | |
4564 prefix(REX_X); | |
4565 } | |
4566 } | |
4567 } | |
4568 | |
4569 void Assembler::prefixq(Address adr) { | |
4570 if (adr.base_needs_rex()) { | |
4571 if (adr.index_needs_rex()) { | |
4572 prefix(REX_WXB); | |
4573 } else { | |
4574 prefix(REX_WB); | |
4575 } | |
4576 } else { | |
4577 if (adr.index_needs_rex()) { | |
4578 prefix(REX_WX); | |
4579 } else { | |
4580 prefix(REX_W); | |
4581 } | |
4582 } | |
4583 } | |
4584 | |
4585 | |
4586 void Assembler::prefix(Address adr, Register reg, bool byteinst) { | |
4587 if (reg->encoding() < 8) { | |
4588 if (adr.base_needs_rex()) { | |
4589 if (adr.index_needs_rex()) { | |
4590 prefix(REX_XB); | |
4591 } else { | |
4592 prefix(REX_B); | |
4593 } | |
4594 } else { | |
4595 if (adr.index_needs_rex()) { | |
4596 prefix(REX_X); | |
3855 | 4597 } else if (byteinst && reg->encoding() >= 4 ) { |
304 | 4598 prefix(REX); |
4599 } | |
4600 } | |
4601 } else { | |
4602 if (adr.base_needs_rex()) { | |
4603 if (adr.index_needs_rex()) { | |
4604 prefix(REX_RXB); | |
4605 } else { | |
4606 prefix(REX_RB); | |
4607 } | |
4608 } else { | |
4609 if (adr.index_needs_rex()) { | |
4610 prefix(REX_RX); | |
4611 } else { | |
4612 prefix(REX_R); | |
4613 } | |
4614 } | |
4615 } | |
4616 } | |
4617 | |
4618 void Assembler::prefixq(Address adr, Register src) { | |
4619 if (src->encoding() < 8) { | |
4620 if (adr.base_needs_rex()) { | |
4621 if (adr.index_needs_rex()) { | |
4622 prefix(REX_WXB); | |
4623 } else { | |
4624 prefix(REX_WB); | |
4625 } | |
4626 } else { | |
4627 if (adr.index_needs_rex()) { | |
4628 prefix(REX_WX); | |
4629 } else { | |
4630 prefix(REX_W); | |
4631 } | |
4632 } | |
4633 } else { | |
4634 if (adr.base_needs_rex()) { | |
4635 if (adr.index_needs_rex()) { | |
4636 prefix(REX_WRXB); | |
4637 } else { | |
4638 prefix(REX_WRB); | |
4639 } | |
4640 } else { | |
4641 if (adr.index_needs_rex()) { | |
4642 prefix(REX_WRX); | |
4643 } else { | |
4644 prefix(REX_WR); | |
4645 } | |
4646 } | |
4647 } | |
4648 } | |
4649 | |
4650 void Assembler::prefix(Address adr, XMMRegister reg) { | |
4651 if (reg->encoding() < 8) { | |
4652 if (adr.base_needs_rex()) { | |
4653 if (adr.index_needs_rex()) { | |
4654 prefix(REX_XB); | |
4655 } else { | |
4656 prefix(REX_B); | |
4657 } | |
4658 } else { | |
4659 if (adr.index_needs_rex()) { | |
4660 prefix(REX_X); | |
4661 } | |
4662 } | |
4663 } else { | |
4664 if (adr.base_needs_rex()) { | |
4665 if (adr.index_needs_rex()) { | |
4666 prefix(REX_RXB); | |
4667 } else { | |
4668 prefix(REX_RB); | |
4669 } | |
4670 } else { | |
4671 if (adr.index_needs_rex()) { | |
4672 prefix(REX_RX); | |
4673 } else { | |
4674 prefix(REX_R); | |
4675 } | |
4676 } | |
4677 } | |
4678 } | |
4679 | |
4759 | 4680 void Assembler::prefixq(Address adr, XMMRegister src) { |
4681 if (src->encoding() < 8) { | |
4682 if (adr.base_needs_rex()) { | |
4683 if (adr.index_needs_rex()) { | |
4684 prefix(REX_WXB); | |
4685 } else { | |
4686 prefix(REX_WB); | |
4687 } | |
4688 } else { | |
4689 if (adr.index_needs_rex()) { | |
4690 prefix(REX_WX); | |
4691 } else { | |
4692 prefix(REX_W); | |
4693 } | |
4694 } | |
4695 } else { | |
4696 if (adr.base_needs_rex()) { | |
4697 if (adr.index_needs_rex()) { | |
4698 prefix(REX_WRXB); | |
4699 } else { | |
4700 prefix(REX_WRB); | |
4701 } | |
4702 } else { | |
4703 if (adr.index_needs_rex()) { | |
4704 prefix(REX_WRX); | |
4705 } else { | |
4706 prefix(REX_WR); | |
4707 } | |
4708 } | |
4709 } | |
4710 } | |
4711 | |
304 | 4712 void Assembler::adcq(Register dst, int32_t imm32) { |
4713 (void) prefixq_and_encode(dst->encoding()); | |
4714 emit_arith(0x81, 0xD0, dst, imm32); | |
4715 } | |
4716 | |
4717 void Assembler::adcq(Register dst, Address src) { | |
4718 InstructionMark im(this); | |
4719 prefixq(src, dst); | |
7430
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diff
changeset
|
4720 emit_int8(0x13); |
304 | 4721 emit_operand(dst, src); |
4722 } | |
4723 | |
4724 void Assembler::adcq(Register dst, Register src) { | |
4725 (int) prefixq_and_encode(dst->encoding(), src->encoding()); | |
4726 emit_arith(0x13, 0xC0, dst, src); | |
4727 } | |
4728 | |
4729 void Assembler::addq(Address dst, int32_t imm32) { | |
4730 InstructionMark im(this); | |
4731 prefixq(dst); | |
4732 emit_arith_operand(0x81, rax, dst,imm32); | |
4733 } | |
4734 | |
4735 void Assembler::addq(Address dst, Register src) { | |
4736 InstructionMark im(this); | |
4737 prefixq(dst, src); | |
7430
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8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
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7427
diff
changeset
|
4738 emit_int8(0x01); |
304 | 4739 emit_operand(src, dst); |
4740 } | |
4741 | |
4742 void Assembler::addq(Register dst, int32_t imm32) { | |
4743 (void) prefixq_and_encode(dst->encoding()); | |
4744 emit_arith(0x81, 0xC0, dst, imm32); | |
4745 } | |
4746 | |
4747 void Assembler::addq(Register dst, Address src) { | |
4748 InstructionMark im(this); | |
4749 prefixq(src, dst); | |
7430
d02120b7a34f
8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
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7427
diff
changeset
|
4750 emit_int8(0x03); |
304 | 4751 emit_operand(dst, src); |
4752 } | |
4753 | |
4754 void Assembler::addq(Register dst, Register src) { | |
4755 (void) prefixq_and_encode(dst->encoding(), src->encoding()); | |
4756 emit_arith(0x03, 0xC0, dst, src); | |
4757 } | |
4758 | |
3783 | 4759 void Assembler::andq(Address dst, int32_t imm32) { |
4760 InstructionMark im(this); | |
4761 prefixq(dst); | |
7430
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8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
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7427
diff
changeset
|
4762 emit_int8((unsigned char)0x81); |
3783 | 4763 emit_operand(rsp, dst, 4); |
7476
ffa87474d7a4
8004537: replace AbstractAssembler emit_long with emit_int32
twisti
parents:
7475
diff
changeset
|
4764 emit_int32(imm32); |
3783 | 4765 } |
4766 | |
304 | 4767 void Assembler::andq(Register dst, int32_t imm32) { |
4768 (void) prefixq_and_encode(dst->encoding()); | |
4769 emit_arith(0x81, 0xE0, dst, imm32); | |
4770 } | |
4771 | |
4772 void Assembler::andq(Register dst, Address src) { | |
4773 InstructionMark im(this); | |
4774 prefixq(src, dst); | |
7430
d02120b7a34f
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7427
diff
changeset
|
4775 emit_int8(0x23); |
304 | 4776 emit_operand(dst, src); |
4777 } | |
4778 | |
4779 void Assembler::andq(Register dst, Register src) { | |
4780 (int) prefixq_and_encode(dst->encoding(), src->encoding()); | |
4781 emit_arith(0x23, 0xC0, dst, src); | |
4782 } | |
4783 | |
775
93c14e5562c4
6823354: Add intrinsics for {Integer,Long}.{numberOfLeadingZeros,numberOfTrailingZeros}()
twisti
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710
diff
changeset
|
4784 void Assembler::bsfq(Register dst, Register src) { |
93c14e5562c4
6823354: Add intrinsics for {Integer,Long}.{numberOfLeadingZeros,numberOfTrailingZeros}()
twisti
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710
diff
changeset
|
4785 int encode = prefixq_and_encode(dst->encoding(), src->encoding()); |
7430
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8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
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7427
diff
changeset
|
4786 emit_int8(0x0F); |
d02120b7a34f
8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
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7427
diff
changeset
|
4787 emit_int8((unsigned char)0xBC); |
d02120b7a34f
8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
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7427
diff
changeset
|
4788 emit_int8((unsigned char)(0xC0 | encode)); |
775
93c14e5562c4
6823354: Add intrinsics for {Integer,Long}.{numberOfLeadingZeros,numberOfTrailingZeros}()
twisti
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710
diff
changeset
|
4789 } |
93c14e5562c4
6823354: Add intrinsics for {Integer,Long}.{numberOfLeadingZeros,numberOfTrailingZeros}()
twisti
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710
diff
changeset
|
4790 |
93c14e5562c4
6823354: Add intrinsics for {Integer,Long}.{numberOfLeadingZeros,numberOfTrailingZeros}()
twisti
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710
diff
changeset
|
4791 void Assembler::bsrq(Register dst, Register src) { |
93c14e5562c4
6823354: Add intrinsics for {Integer,Long}.{numberOfLeadingZeros,numberOfTrailingZeros}()
twisti
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710
diff
changeset
|
4792 assert(!VM_Version::supports_lzcnt(), "encoding is treated as LZCNT"); |
93c14e5562c4
6823354: Add intrinsics for {Integer,Long}.{numberOfLeadingZeros,numberOfTrailingZeros}()
twisti
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710
diff
changeset
|
4793 int encode = prefixq_and_encode(dst->encoding(), src->encoding()); |
7430
d02120b7a34f
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7427
diff
changeset
|
4794 emit_int8(0x0F); |
d02120b7a34f
8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
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7427
diff
changeset
|
4795 emit_int8((unsigned char)0xBD); |
d02120b7a34f
8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
twisti
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7427
diff
changeset
|
4796 emit_int8((unsigned char)(0xC0 | encode)); |
775
93c14e5562c4
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twisti
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710
diff
changeset
|
4797 } |
93c14e5562c4
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twisti
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diff
changeset
|
4798 |
304 | 4799 void Assembler::bswapq(Register reg) { |
4800 int encode = prefixq_and_encode(reg->encoding()); | |
7430
d02120b7a34f
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diff
changeset
|
4801 emit_int8(0x0F); |
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8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
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7427
diff
changeset
|
4802 emit_int8((unsigned char)(0xC8 | encode)); |
304 | 4803 } |
4804 | |
4805 void Assembler::cdqq() { | |
4806 prefix(REX_W); | |
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changeset
|
4807 emit_int8((unsigned char)0x99); |
304 | 4808 } |
4809 | |
4810 void Assembler::clflush(Address adr) { | |
4811 prefix(adr); | |
7430
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diff
changeset
|
4812 emit_int8(0x0F); |
d02120b7a34f
8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
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diff
changeset
|
4813 emit_int8((unsigned char)0xAE); |
304 | 4814 emit_operand(rdi, adr); |
4815 } | |
4816 | |
4817 void Assembler::cmovq(Condition cc, Register dst, Register src) { | |
4818 int encode = prefixq_and_encode(dst->encoding(), src->encoding()); | |
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diff
changeset
|
4819 emit_int8(0x0F); |
d02120b7a34f
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diff
changeset
|
4820 emit_int8(0x40 | cc); |
d02120b7a34f
8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
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diff
changeset
|
4821 emit_int8((unsigned char)(0xC0 | encode)); |
304 | 4822 } |
4823 | |
4824 void Assembler::cmovq(Condition cc, Register dst, Address src) { | |
4825 InstructionMark im(this); | |
4826 prefixq(src, dst); | |
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diff
changeset
|
4827 emit_int8(0x0F); |
d02120b7a34f
8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
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7427
diff
changeset
|
4828 emit_int8(0x40 | cc); |
304 | 4829 emit_operand(dst, src); |
4830 } | |
4831 | |
4832 void Assembler::cmpq(Address dst, int32_t imm32) { | |
4833 InstructionMark im(this); | |
4834 prefixq(dst); | |
7430
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7427
diff
changeset
|
4835 emit_int8((unsigned char)0x81); |
304 | 4836 emit_operand(rdi, dst, 4); |
7476
ffa87474d7a4
8004537: replace AbstractAssembler emit_long with emit_int32
twisti
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7475
diff
changeset
|
4837 emit_int32(imm32); |
304 | 4838 } |
4839 | |
4840 void Assembler::cmpq(Register dst, int32_t imm32) { | |
4841 (void) prefixq_and_encode(dst->encoding()); | |
4842 emit_arith(0x81, 0xF8, dst, imm32); | |
4843 } | |
4844 | |
4845 void Assembler::cmpq(Address dst, Register src) { | |
4846 InstructionMark im(this); | |
4847 prefixq(dst, src); | |
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7427
diff
changeset
|
4848 emit_int8(0x3B); |
304 | 4849 emit_operand(src, dst); |
4850 } | |
4851 | |
4852 void Assembler::cmpq(Register dst, Register src) { | |
4853 (void) prefixq_and_encode(dst->encoding(), src->encoding()); | |
4854 emit_arith(0x3B, 0xC0, dst, src); | |
4855 } | |
4856 | |
4857 void Assembler::cmpq(Register dst, Address src) { | |
4858 InstructionMark im(this); | |
4859 prefixq(src, dst); | |
7430
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7427
diff
changeset
|
4860 emit_int8(0x3B); |
304 | 4861 emit_operand(dst, src); |
4862 } | |
4863 | |
4864 void Assembler::cmpxchgq(Register reg, Address adr) { | |
4865 InstructionMark im(this); | |
4866 prefixq(adr, reg); | |
7430
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7427
diff
changeset
|
4867 emit_int8(0x0F); |
d02120b7a34f
8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
twisti
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7427
diff
changeset
|
4868 emit_int8((unsigned char)0xB1); |
304 | 4869 emit_operand(reg, adr); |
4870 } | |
4871 | |
4872 void Assembler::cvtsi2sdq(XMMRegister dst, Register src) { | |
4873 NOT_LP64(assert(VM_Version::supports_sse2(), "")); | |
4759 | 4874 int encode = simd_prefix_and_encode_q(dst, dst, src, VEX_SIMD_F2); |
7430
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twisti
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7427
diff
changeset
|
4875 emit_int8(0x2A); |
d02120b7a34f
8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
twisti
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7427
diff
changeset
|
4876 emit_int8((unsigned char)(0xC0 | encode)); |
304 | 4877 } |
4878 | |
4759 | 4879 void Assembler::cvtsi2sdq(XMMRegister dst, Address src) { |
4880 NOT_LP64(assert(VM_Version::supports_sse2(), "")); | |
4881 InstructionMark im(this); | |
4882 simd_prefix_q(dst, dst, src, VEX_SIMD_F2); | |
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8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
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diff
changeset
|
4883 emit_int8(0x2A); |
4759 | 4884 emit_operand(dst, src); |
4885 } | |
4886 | |
304 | 4887 void Assembler::cvtsi2ssq(XMMRegister dst, Register src) { |
4888 NOT_LP64(assert(VM_Version::supports_sse(), "")); | |
4759 | 4889 int encode = simd_prefix_and_encode_q(dst, dst, src, VEX_SIMD_F3); |
7430
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8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
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diff
changeset
|
4890 emit_int8(0x2A); |
d02120b7a34f
8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
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7427
diff
changeset
|
4891 emit_int8((unsigned char)(0xC0 | encode)); |
304 | 4892 } |
4893 | |
4759 | 4894 void Assembler::cvtsi2ssq(XMMRegister dst, Address src) { |
4895 NOT_LP64(assert(VM_Version::supports_sse(), "")); | |
4896 InstructionMark im(this); | |
4897 simd_prefix_q(dst, dst, src, VEX_SIMD_F3); | |
7430
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8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
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diff
changeset
|
4898 emit_int8(0x2A); |
4759 | 4899 emit_operand(dst, src); |
4900 } | |
4901 | |
304 | 4902 void Assembler::cvttsd2siq(Register dst, XMMRegister src) { |
4903 NOT_LP64(assert(VM_Version::supports_sse2(), "")); | |
4759 | 4904 int encode = simd_prefix_and_encode_q(dst, src, VEX_SIMD_F2); |
7430
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8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
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7427
diff
changeset
|
4905 emit_int8(0x2C); |
d02120b7a34f
8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
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7427
diff
changeset
|
4906 emit_int8((unsigned char)(0xC0 | encode)); |
304 | 4907 } |
4908 | |
4909 void Assembler::cvttss2siq(Register dst, XMMRegister src) { | |
4910 NOT_LP64(assert(VM_Version::supports_sse(), "")); | |
4759 | 4911 int encode = simd_prefix_and_encode_q(dst, src, VEX_SIMD_F3); |
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8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
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changeset
|
4912 emit_int8(0x2C); |
d02120b7a34f
8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
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diff
changeset
|
4913 emit_int8((unsigned char)(0xC0 | encode)); |
304 | 4914 } |
4915 | |
4916 void Assembler::decl(Register dst) { | |
4917 // Don't use it directly. Use MacroAssembler::decrementl() instead. | |
4918 // Use two-byte form (one-byte form is a REX prefix in 64-bit mode) | |
4919 int encode = prefix_and_encode(dst->encoding()); | |
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changeset
|
4920 emit_int8((unsigned char)0xFF); |
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8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
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diff
changeset
|
4921 emit_int8((unsigned char)(0xC8 | encode)); |
304 | 4922 } |
4923 | |
4924 void Assembler::decq(Register dst) { | |
4925 // Don't use it directly. Use MacroAssembler::decrementq() instead. | |
4926 // Use two-byte form (one-byte from is a REX prefix in 64-bit mode) | |
4927 int encode = prefixq_and_encode(dst->encoding()); | |
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changeset
|
4928 emit_int8((unsigned char)0xFF); |
d02120b7a34f
8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
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diff
changeset
|
4929 emit_int8(0xC8 | encode); |
304 | 4930 } |
4931 | |
4932 void Assembler::decq(Address dst) { | |
4933 // Don't use it directly. Use MacroAssembler::decrementq() instead. | |
4934 InstructionMark im(this); | |
4935 prefixq(dst); | |
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changeset
|
4936 emit_int8((unsigned char)0xFF); |
304 | 4937 emit_operand(rcx, dst); |
4938 } | |
4939 | |
4940 void Assembler::fxrstor(Address src) { | |
4941 prefixq(src); | |
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8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
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changeset
|
4942 emit_int8(0x0F); |
d02120b7a34f
8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
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diff
changeset
|
4943 emit_int8((unsigned char)0xAE); |
304 | 4944 emit_operand(as_Register(1), src); |
4945 } | |
4946 | |
4947 void Assembler::fxsave(Address dst) { | |
4948 prefixq(dst); | |
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8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
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changeset
|
4949 emit_int8(0x0F); |
d02120b7a34f
8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
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7427
diff
changeset
|
4950 emit_int8((unsigned char)0xAE); |
304 | 4951 emit_operand(as_Register(0), dst); |
4952 } | |
4953 | |
4954 void Assembler::idivq(Register src) { | |
4955 int encode = prefixq_and_encode(src->encoding()); | |
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|
4956 emit_int8((unsigned char)0xF7); |
d02120b7a34f
8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
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diff
changeset
|
4957 emit_int8((unsigned char)(0xF8 | encode)); |
304 | 4958 } |
4959 | |
4960 void Assembler::imulq(Register dst, Register src) { | |
4961 int encode = prefixq_and_encode(dst->encoding(), src->encoding()); | |
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8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
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diff
changeset
|
4962 emit_int8(0x0F); |
d02120b7a34f
8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
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7427
diff
changeset
|
4963 emit_int8((unsigned char)0xAF); |
d02120b7a34f
8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
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7427
diff
changeset
|
4964 emit_int8((unsigned char)(0xC0 | encode)); |
304 | 4965 } |
4966 | |
4967 void Assembler::imulq(Register dst, Register src, int value) { | |
4968 int encode = prefixq_and_encode(dst->encoding(), src->encoding()); | |
4969 if (is8bit(value)) { | |
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8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
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changeset
|
4970 emit_int8(0x6B); |
d02120b7a34f
8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
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7427
diff
changeset
|
4971 emit_int8((unsigned char)(0xC0 | encode)); |
d02120b7a34f
8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
twisti
parents:
7427
diff
changeset
|
4972 emit_int8(value & 0xFF); |
304 | 4973 } else { |
7430
d02120b7a34f
8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
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diff
changeset
|
4974 emit_int8(0x69); |
d02120b7a34f
8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
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parents:
7427
diff
changeset
|
4975 emit_int8((unsigned char)(0xC0 | encode)); |
7476
ffa87474d7a4
8004537: replace AbstractAssembler emit_long with emit_int32
twisti
parents:
7475
diff
changeset
|
4976 emit_int32(value); |
304 | 4977 } |
4978 } | |
4979 | |
4980 void Assembler::incl(Register dst) { | |
4981 // Don't use it directly. Use MacroAssembler::incrementl() instead. | |
4982 // Use two-byte form (one-byte from is a REX prefix in 64-bit mode) | |
4983 int encode = prefix_and_encode(dst->encoding()); | |
7430
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8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
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diff
changeset
|
4984 emit_int8((unsigned char)0xFF); |
d02120b7a34f
8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
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7427
diff
changeset
|
4985 emit_int8((unsigned char)(0xC0 | encode)); |
304 | 4986 } |
4987 | |
4988 void Assembler::incq(Register dst) { | |
4989 // Don't use it directly. Use MacroAssembler::incrementq() instead. | |
4990 // Use two-byte form (one-byte from is a REX prefix in 64-bit mode) | |
4991 int encode = prefixq_and_encode(dst->encoding()); | |
7430
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8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
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diff
changeset
|
4992 emit_int8((unsigned char)0xFF); |
d02120b7a34f
8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
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diff
changeset
|
4993 emit_int8((unsigned char)(0xC0 | encode)); |
304 | 4994 } |
4995 | |
4996 void Assembler::incq(Address dst) { | |
4997 // Don't use it directly. Use MacroAssembler::incrementq() instead. | |
4998 InstructionMark im(this); | |
4999 prefixq(dst); | |
7430
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8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
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7427
diff
changeset
|
5000 emit_int8((unsigned char)0xFF); |
304 | 5001 emit_operand(rax, dst); |
5002 } | |
5003 | |
5004 void Assembler::lea(Register dst, Address src) { | |
5005 leaq(dst, src); | |
5006 } | |
5007 | |
5008 void Assembler::leaq(Register dst, Address src) { | |
5009 InstructionMark im(this); | |
5010 prefixq(src, dst); | |
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8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
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7427
diff
changeset
|
5011 emit_int8((unsigned char)0x8D); |
304 | 5012 emit_operand(dst, src); |
5013 } | |
5014 | |
5015 void Assembler::mov64(Register dst, int64_t imm64) { | |
5016 InstructionMark im(this); | |
5017 int encode = prefixq_and_encode(dst->encoding()); | |
7430
d02120b7a34f
8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
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parents:
7427
diff
changeset
|
5018 emit_int8((unsigned char)(0xB8 | encode)); |
7198
6ab62ad83507
8003195: AbstractAssembler should not store code pointers but use the CodeSection directly
twisti
parents:
6894
diff
changeset
|
5019 emit_int64(imm64); |
304 | 5020 } |
5021 | |
5022 void Assembler::mov_literal64(Register dst, intptr_t imm64, RelocationHolder const& rspec) { | |
5023 InstructionMark im(this); | |
5024 int encode = prefixq_and_encode(dst->encoding()); | |
7430
d02120b7a34f
8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
twisti
parents:
7427
diff
changeset
|
5025 emit_int8(0xB8 | encode); |
304 | 5026 emit_data64(imm64, rspec); |
5027 } | |
5028 | |
642
660978a2a31a
6791178: Specialize for zero as the compressed oop vm heap base
kvn
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624
diff
changeset
|
5029 void Assembler::mov_narrow_oop(Register dst, int32_t imm32, RelocationHolder const& rspec) { |
660978a2a31a
6791178: Specialize for zero as the compressed oop vm heap base
kvn
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624
diff
changeset
|
5030 InstructionMark im(this); |
660978a2a31a
6791178: Specialize for zero as the compressed oop vm heap base
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624
diff
changeset
|
5031 int encode = prefix_and_encode(dst->encoding()); |
7430
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8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
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parents:
7427
diff
changeset
|
5032 emit_int8((unsigned char)(0xB8 | encode)); |
642
660978a2a31a
6791178: Specialize for zero as the compressed oop vm heap base
kvn
parents:
624
diff
changeset
|
5033 emit_data((int)imm32, rspec, narrow_oop_operand); |
660978a2a31a
6791178: Specialize for zero as the compressed oop vm heap base
kvn
parents:
624
diff
changeset
|
5034 } |
660978a2a31a
6791178: Specialize for zero as the compressed oop vm heap base
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624
diff
changeset
|
5035 |
660978a2a31a
6791178: Specialize for zero as the compressed oop vm heap base
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624
diff
changeset
|
5036 void Assembler::mov_narrow_oop(Address dst, int32_t imm32, RelocationHolder const& rspec) { |
660978a2a31a
6791178: Specialize for zero as the compressed oop vm heap base
kvn
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624
diff
changeset
|
5037 InstructionMark im(this); |
660978a2a31a
6791178: Specialize for zero as the compressed oop vm heap base
kvn
parents:
624
diff
changeset
|
5038 prefix(dst); |
7430
d02120b7a34f
8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
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parents:
7427
diff
changeset
|
5039 emit_int8((unsigned char)0xC7); |
642
660978a2a31a
6791178: Specialize for zero as the compressed oop vm heap base
kvn
parents:
624
diff
changeset
|
5040 emit_operand(rax, dst, 4); |
660978a2a31a
6791178: Specialize for zero as the compressed oop vm heap base
kvn
parents:
624
diff
changeset
|
5041 emit_data((int)imm32, rspec, narrow_oop_operand); |
660978a2a31a
6791178: Specialize for zero as the compressed oop vm heap base
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624
diff
changeset
|
5042 } |
660978a2a31a
6791178: Specialize for zero as the compressed oop vm heap base
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624
diff
changeset
|
5043 |
660978a2a31a
6791178: Specialize for zero as the compressed oop vm heap base
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624
diff
changeset
|
5044 void Assembler::cmp_narrow_oop(Register src1, int32_t imm32, RelocationHolder const& rspec) { |
660978a2a31a
6791178: Specialize for zero as the compressed oop vm heap base
kvn
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624
diff
changeset
|
5045 InstructionMark im(this); |
660978a2a31a
6791178: Specialize for zero as the compressed oop vm heap base
kvn
parents:
624
diff
changeset
|
5046 int encode = prefix_and_encode(src1->encoding()); |
7430
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8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
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parents:
7427
diff
changeset
|
5047 emit_int8((unsigned char)0x81); |
d02120b7a34f
8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
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parents:
7427
diff
changeset
|
5048 emit_int8((unsigned char)(0xF8 | encode)); |
642
660978a2a31a
6791178: Specialize for zero as the compressed oop vm heap base
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624
diff
changeset
|
5049 emit_data((int)imm32, rspec, narrow_oop_operand); |
660978a2a31a
6791178: Specialize for zero as the compressed oop vm heap base
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624
diff
changeset
|
5050 } |
660978a2a31a
6791178: Specialize for zero as the compressed oop vm heap base
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624
diff
changeset
|
5051 |
660978a2a31a
6791178: Specialize for zero as the compressed oop vm heap base
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diff
changeset
|
5052 void Assembler::cmp_narrow_oop(Address src1, int32_t imm32, RelocationHolder const& rspec) { |
660978a2a31a
6791178: Specialize for zero as the compressed oop vm heap base
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624
diff
changeset
|
5053 InstructionMark im(this); |
660978a2a31a
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624
diff
changeset
|
5054 prefix(src1); |
7430
d02120b7a34f
8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
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7427
diff
changeset
|
5055 emit_int8((unsigned char)0x81); |
642
660978a2a31a
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624
diff
changeset
|
5056 emit_operand(rax, src1, 4); |
660978a2a31a
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diff
changeset
|
5057 emit_data((int)imm32, rspec, narrow_oop_operand); |
660978a2a31a
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diff
changeset
|
5058 } |
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diff
changeset
|
5059 |
775
93c14e5562c4
6823354: Add intrinsics for {Integer,Long}.{numberOfLeadingZeros,numberOfTrailingZeros}()
twisti
parents:
710
diff
changeset
|
5060 void Assembler::lzcntq(Register dst, Register src) { |
93c14e5562c4
6823354: Add intrinsics for {Integer,Long}.{numberOfLeadingZeros,numberOfTrailingZeros}()
twisti
parents:
710
diff
changeset
|
5061 assert(VM_Version::supports_lzcnt(), "encoding is treated as BSR"); |
7430
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8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
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7427
diff
changeset
|
5062 emit_int8((unsigned char)0xF3); |
775
93c14e5562c4
6823354: Add intrinsics for {Integer,Long}.{numberOfLeadingZeros,numberOfTrailingZeros}()
twisti
parents:
710
diff
changeset
|
5063 int encode = prefixq_and_encode(dst->encoding(), src->encoding()); |
7430
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7427
diff
changeset
|
5064 emit_int8(0x0F); |
d02120b7a34f
8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
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7427
diff
changeset
|
5065 emit_int8((unsigned char)0xBD); |
d02120b7a34f
8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
twisti
parents:
7427
diff
changeset
|
5066 emit_int8((unsigned char)(0xC0 | encode)); |
775
93c14e5562c4
6823354: Add intrinsics for {Integer,Long}.{numberOfLeadingZeros,numberOfTrailingZeros}()
twisti
parents:
710
diff
changeset
|
5067 } |
93c14e5562c4
6823354: Add intrinsics for {Integer,Long}.{numberOfLeadingZeros,numberOfTrailingZeros}()
twisti
parents:
710
diff
changeset
|
5068 |
304 | 5069 void Assembler::movdq(XMMRegister dst, Register src) { |
5070 // table D-1 says MMX/SSE2 | |
4759 | 5071 NOT_LP64(assert(VM_Version::supports_sse2(), "")); |
5072 int encode = simd_prefix_and_encode_q(dst, src, VEX_SIMD_66); | |
7430
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8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
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7427
diff
changeset
|
5073 emit_int8(0x6E); |
d02120b7a34f
8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
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7427
diff
changeset
|
5074 emit_int8((unsigned char)(0xC0 | encode)); |
304 | 5075 } |
5076 | |
5077 void Assembler::movdq(Register dst, XMMRegister src) { | |
5078 // table D-1 says MMX/SSE2 | |
4759 | 5079 NOT_LP64(assert(VM_Version::supports_sse2(), "")); |
304 | 5080 // swap src/dst to get correct prefix |
4759 | 5081 int encode = simd_prefix_and_encode_q(src, dst, VEX_SIMD_66); |
7430
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7427
diff
changeset
|
5082 emit_int8(0x7E); |
d02120b7a34f
8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
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7427
diff
changeset
|
5083 emit_int8((unsigned char)(0xC0 | encode)); |
304 | 5084 } |
5085 | |
5086 void Assembler::movq(Register dst, Register src) { | |
5087 int encode = prefixq_and_encode(dst->encoding(), src->encoding()); | |
7430
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5088 emit_int8((unsigned char)0x8B); |
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5089 emit_int8((unsigned char)(0xC0 | encode)); |
304 | 5090 } |
5091 | |
5092 void Assembler::movq(Register dst, Address src) { | |
5093 InstructionMark im(this); | |
5094 prefixq(src, dst); | |
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5095 emit_int8((unsigned char)0x8B); |
304 | 5096 emit_operand(dst, src); |
5097 } | |
5098 | |
5099 void Assembler::movq(Address dst, Register src) { | |
5100 InstructionMark im(this); | |
5101 prefixq(dst, src); | |
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5102 emit_int8((unsigned char)0x89); |
304 | 5103 emit_operand(src, dst); |
5104 } | |
5105 | |
624 | 5106 void Assembler::movsbq(Register dst, Address src) { |
5107 InstructionMark im(this); | |
5108 prefixq(src, dst); | |
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5109 emit_int8(0x0F); |
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5110 emit_int8((unsigned char)0xBE); |
624 | 5111 emit_operand(dst, src); |
5112 } | |
5113 | |
5114 void Assembler::movsbq(Register dst, Register src) { | |
5115 int encode = prefixq_and_encode(dst->encoding(), src->encoding()); | |
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5116 emit_int8(0x0F); |
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5117 emit_int8((unsigned char)0xBE); |
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5118 emit_int8((unsigned char)(0xC0 | encode)); |
624 | 5119 } |
5120 | |
304 | 5121 void Assembler::movslq(Register dst, int32_t imm32) { |
5122 // dbx shows movslq(rcx, 3) as movq $0x0000000049000000,(%rbx) | |
5123 // and movslq(r8, 3); as movl $0x0000000048000000,(%rbx) | |
5124 // as a result we shouldn't use until tested at runtime... | |
5125 ShouldNotReachHere(); | |
5126 InstructionMark im(this); | |
5127 int encode = prefixq_and_encode(dst->encoding()); | |
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5128 emit_int8((unsigned char)(0xC7 | encode)); |
7476
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5129 emit_int32(imm32); |
304 | 5130 } |
5131 | |
5132 void Assembler::movslq(Address dst, int32_t imm32) { | |
5133 assert(is_simm32(imm32), "lost bits"); | |
5134 InstructionMark im(this); | |
5135 prefixq(dst); | |
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5136 emit_int8((unsigned char)0xC7); |
304 | 5137 emit_operand(rax, dst, 4); |
7476
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5138 emit_int32(imm32); |
304 | 5139 } |
5140 | |
5141 void Assembler::movslq(Register dst, Address src) { | |
5142 InstructionMark im(this); | |
5143 prefixq(src, dst); | |
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5144 emit_int8(0x63); |
304 | 5145 emit_operand(dst, src); |
5146 } | |
5147 | |
5148 void Assembler::movslq(Register dst, Register src) { | |
5149 int encode = prefixq_and_encode(dst->encoding(), src->encoding()); | |
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5150 emit_int8(0x63); |
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5151 emit_int8((unsigned char)(0xC0 | encode)); |
304 | 5152 } |
5153 | |
624 | 5154 void Assembler::movswq(Register dst, Address src) { |
5155 InstructionMark im(this); | |
5156 prefixq(src, dst); | |
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5157 emit_int8(0x0F); |
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5158 emit_int8((unsigned char)0xBF); |
624 | 5159 emit_operand(dst, src); |
5160 } | |
5161 | |
5162 void Assembler::movswq(Register dst, Register src) { | |
5163 int encode = prefixq_and_encode(dst->encoding(), src->encoding()); | |
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5164 emit_int8((unsigned char)0x0F); |
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5165 emit_int8((unsigned char)0xBF); |
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5166 emit_int8((unsigned char)(0xC0 | encode)); |
624 | 5167 } |
5168 | |
5169 void Assembler::movzbq(Register dst, Address src) { | |
5170 InstructionMark im(this); | |
5171 prefixq(src, dst); | |
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5172 emit_int8((unsigned char)0x0F); |
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5173 emit_int8((unsigned char)0xB6); |
624 | 5174 emit_operand(dst, src); |
5175 } | |
5176 | |
5177 void Assembler::movzbq(Register dst, Register src) { | |
5178 int encode = prefixq_and_encode(dst->encoding(), src->encoding()); | |
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5179 emit_int8(0x0F); |
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5180 emit_int8((unsigned char)0xB6); |
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5181 emit_int8(0xC0 | encode); |
624 | 5182 } |
5183 | |
5184 void Assembler::movzwq(Register dst, Address src) { | |
5185 InstructionMark im(this); | |
5186 prefixq(src, dst); | |
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5187 emit_int8((unsigned char)0x0F); |
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5188 emit_int8((unsigned char)0xB7); |
624 | 5189 emit_operand(dst, src); |
5190 } | |
5191 | |
5192 void Assembler::movzwq(Register dst, Register src) { | |
5193 int encode = prefixq_and_encode(dst->encoding(), src->encoding()); | |
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5194 emit_int8((unsigned char)0x0F); |
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5195 emit_int8((unsigned char)0xB7); |
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5196 emit_int8((unsigned char)(0xC0 | encode)); |
624 | 5197 } |
5198 | |
304 | 5199 void Assembler::negq(Register dst) { |
5200 int encode = prefixq_and_encode(dst->encoding()); | |
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5201 emit_int8((unsigned char)0xF7); |
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5202 emit_int8((unsigned char)(0xD8 | encode)); |
304 | 5203 } |
5204 | |
5205 void Assembler::notq(Register dst) { | |
5206 int encode = prefixq_and_encode(dst->encoding()); | |
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5207 emit_int8((unsigned char)0xF7); |
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5208 emit_int8((unsigned char)(0xD0 | encode)); |
304 | 5209 } |
5210 | |
5211 void Assembler::orq(Address dst, int32_t imm32) { | |
5212 InstructionMark im(this); | |
5213 prefixq(dst); | |
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5214 emit_int8((unsigned char)0x81); |
304 | 5215 emit_operand(rcx, dst, 4); |
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5216 emit_int32(imm32); |
304 | 5217 } |
5218 | |
5219 void Assembler::orq(Register dst, int32_t imm32) { | |
5220 (void) prefixq_and_encode(dst->encoding()); | |
5221 emit_arith(0x81, 0xC8, dst, imm32); | |
5222 } | |
5223 | |
5224 void Assembler::orq(Register dst, Address src) { | |
5225 InstructionMark im(this); | |
5226 prefixq(src, dst); | |
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5227 emit_int8(0x0B); |
304 | 5228 emit_operand(dst, src); |
5229 } | |
5230 | |
5231 void Assembler::orq(Register dst, Register src) { | |
5232 (void) prefixq_and_encode(dst->encoding(), src->encoding()); | |
5233 emit_arith(0x0B, 0xC0, dst, src); | |
5234 } | |
5235 | |
5236 void Assembler::popa() { // 64bit | |
5237 movq(r15, Address(rsp, 0)); | |
5238 movq(r14, Address(rsp, wordSize)); | |
5239 movq(r13, Address(rsp, 2 * wordSize)); | |
5240 movq(r12, Address(rsp, 3 * wordSize)); | |
5241 movq(r11, Address(rsp, 4 * wordSize)); | |
5242 movq(r10, Address(rsp, 5 * wordSize)); | |
5243 movq(r9, Address(rsp, 6 * wordSize)); | |
5244 movq(r8, Address(rsp, 7 * wordSize)); | |
5245 movq(rdi, Address(rsp, 8 * wordSize)); | |
5246 movq(rsi, Address(rsp, 9 * wordSize)); | |
5247 movq(rbp, Address(rsp, 10 * wordSize)); | |
5248 // skip rsp | |
5249 movq(rbx, Address(rsp, 12 * wordSize)); | |
5250 movq(rdx, Address(rsp, 13 * wordSize)); | |
5251 movq(rcx, Address(rsp, 14 * wordSize)); | |
5252 movq(rax, Address(rsp, 15 * wordSize)); | |
5253 | |
5254 addq(rsp, 16 * wordSize); | |
5255 } | |
5256 | |
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5257 void Assembler::popcntq(Register dst, Address src) { |
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5258 assert(VM_Version::supports_popcnt(), "must support"); |
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5259 InstructionMark im(this); |
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5260 emit_int8((unsigned char)0xF3); |
643
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5261 prefixq(src, dst); |
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5262 emit_int8((unsigned char)0x0F); |
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5263 emit_int8((unsigned char)0xB8); |
643
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5264 emit_operand(dst, src); |
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5265 } |
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5266 |
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5267 void Assembler::popcntq(Register dst, Register src) { |
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5268 assert(VM_Version::supports_popcnt(), "must support"); |
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5269 emit_int8((unsigned char)0xF3); |
643
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5270 int encode = prefixq_and_encode(dst->encoding(), src->encoding()); |
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5271 emit_int8((unsigned char)0x0F); |
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5272 emit_int8((unsigned char)0xB8); |
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|
5273 emit_int8((unsigned char)(0xC0 | encode)); |
643
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5274 } |
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5275 |
304 | 5276 void Assembler::popq(Address dst) { |
5277 InstructionMark im(this); | |
5278 prefixq(dst); | |
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5279 emit_int8((unsigned char)0x8F); |
304 | 5280 emit_operand(rax, dst); |
5281 } | |
5282 | |
5283 void Assembler::pusha() { // 64bit | |
5284 // we have to store original rsp. ABI says that 128 bytes | |
5285 // below rsp are local scratch. | |
5286 movq(Address(rsp, -5 * wordSize), rsp); | |
5287 | |
5288 subq(rsp, 16 * wordSize); | |
5289 | |
5290 movq(Address(rsp, 15 * wordSize), rax); | |
5291 movq(Address(rsp, 14 * wordSize), rcx); | |
5292 movq(Address(rsp, 13 * wordSize), rdx); | |
5293 movq(Address(rsp, 12 * wordSize), rbx); | |
5294 // skip rsp | |
5295 movq(Address(rsp, 10 * wordSize), rbp); | |
5296 movq(Address(rsp, 9 * wordSize), rsi); | |
5297 movq(Address(rsp, 8 * wordSize), rdi); | |
5298 movq(Address(rsp, 7 * wordSize), r8); | |
5299 movq(Address(rsp, 6 * wordSize), r9); | |
5300 movq(Address(rsp, 5 * wordSize), r10); | |
5301 movq(Address(rsp, 4 * wordSize), r11); | |
5302 movq(Address(rsp, 3 * wordSize), r12); | |
5303 movq(Address(rsp, 2 * wordSize), r13); | |
5304 movq(Address(rsp, wordSize), r14); | |
5305 movq(Address(rsp, 0), r15); | |
5306 } | |
5307 | |
5308 void Assembler::pushq(Address src) { | |
5309 InstructionMark im(this); | |
5310 prefixq(src); | |
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5311 emit_int8((unsigned char)0xFF); |
304 | 5312 emit_operand(rsi, src); |
5313 } | |
5314 | |
5315 void Assembler::rclq(Register dst, int imm8) { | |
5316 assert(isShiftCount(imm8 >> 1), "illegal shift count"); | |
5317 int encode = prefixq_and_encode(dst->encoding()); | |
5318 if (imm8 == 1) { | |
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5319 emit_int8((unsigned char)0xD1); |
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5320 emit_int8((unsigned char)(0xD0 | encode)); |
304 | 5321 } else { |
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|
5322 emit_int8((unsigned char)0xC1); |
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|
5323 emit_int8((unsigned char)(0xD0 | encode)); |
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|
5324 emit_int8(imm8); |
304 | 5325 } |
5326 } | |
5327 void Assembler::sarq(Register dst, int imm8) { | |
5328 assert(isShiftCount(imm8 >> 1), "illegal shift count"); | |
5329 int encode = prefixq_and_encode(dst->encoding()); | |
5330 if (imm8 == 1) { | |
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5331 emit_int8((unsigned char)0xD1); |
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5332 emit_int8((unsigned char)(0xF8 | encode)); |
304 | 5333 } else { |
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|
5334 emit_int8((unsigned char)0xC1); |
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changeset
|
5335 emit_int8((unsigned char)(0xF8 | encode)); |
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|
5336 emit_int8(imm8); |
304 | 5337 } |
5338 } | |
5339 | |
5340 void Assembler::sarq(Register dst) { | |
5341 int encode = prefixq_and_encode(dst->encoding()); | |
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|
5342 emit_int8((unsigned char)0xD3); |
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5343 emit_int8((unsigned char)(0xF8 | encode)); |
304 | 5344 } |
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5345 |
304 | 5346 void Assembler::sbbq(Address dst, int32_t imm32) { |
5347 InstructionMark im(this); | |
5348 prefixq(dst); | |
5349 emit_arith_operand(0x81, rbx, dst, imm32); | |
5350 } | |
5351 | |
5352 void Assembler::sbbq(Register dst, int32_t imm32) { | |
5353 (void) prefixq_and_encode(dst->encoding()); | |
5354 emit_arith(0x81, 0xD8, dst, imm32); | |
5355 } | |
5356 | |
5357 void Assembler::sbbq(Register dst, Address src) { | |
5358 InstructionMark im(this); | |
5359 prefixq(src, dst); | |
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5360 emit_int8(0x1B); |
304 | 5361 emit_operand(dst, src); |
5362 } | |
5363 | |
5364 void Assembler::sbbq(Register dst, Register src) { | |
5365 (void) prefixq_and_encode(dst->encoding(), src->encoding()); | |
5366 emit_arith(0x1B, 0xC0, dst, src); | |
5367 } | |
5368 | |
5369 void Assembler::shlq(Register dst, int imm8) { | |
5370 assert(isShiftCount(imm8 >> 1), "illegal shift count"); | |
5371 int encode = prefixq_and_encode(dst->encoding()); | |
5372 if (imm8 == 1) { | |
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5373 emit_int8((unsigned char)0xD1); |
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5374 emit_int8((unsigned char)(0xE0 | encode)); |
304 | 5375 } else { |
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5376 emit_int8((unsigned char)0xC1); |
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5377 emit_int8((unsigned char)(0xE0 | encode)); |
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5378 emit_int8(imm8); |
304 | 5379 } |
5380 } | |
5381 | |
5382 void Assembler::shlq(Register dst) { | |
5383 int encode = prefixq_and_encode(dst->encoding()); | |
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5384 emit_int8((unsigned char)0xD3); |
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5385 emit_int8((unsigned char)(0xE0 | encode)); |
304 | 5386 } |
5387 | |
5388 void Assembler::shrq(Register dst, int imm8) { | |
5389 assert(isShiftCount(imm8 >> 1), "illegal shift count"); | |
5390 int encode = prefixq_and_encode(dst->encoding()); | |
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5391 emit_int8((unsigned char)0xC1); |
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5392 emit_int8((unsigned char)(0xE8 | encode)); |
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5393 emit_int8(imm8); |
304 | 5394 } |
5395 | |
5396 void Assembler::shrq(Register dst) { | |
5397 int encode = prefixq_and_encode(dst->encoding()); | |
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5398 emit_int8((unsigned char)0xD3); |
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5399 emit_int8(0xE8 | encode); |
304 | 5400 } |
5401 | |
5402 void Assembler::subq(Address dst, int32_t imm32) { | |
5403 InstructionMark im(this); | |
5404 prefixq(dst); | |
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5405 emit_arith_operand(0x81, rbp, dst, imm32); |
304 | 5406 } |
5407 | |
5408 void Assembler::subq(Address dst, Register src) { | |
5409 InstructionMark im(this); | |
5410 prefixq(dst, src); | |
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5411 emit_int8(0x29); |
304 | 5412 emit_operand(src, dst); |
5413 } | |
5414 | |
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5415 void Assembler::subq(Register dst, int32_t imm32) { |
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5416 (void) prefixq_and_encode(dst->encoding()); |
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5417 emit_arith(0x81, 0xE8, dst, imm32); |
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5418 } |
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5419 |
4947
fd8114661503
7125136: SIGILL on linux amd64 in gc/ArrayJuggle/Juggle29
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5420 // Force generation of a 4 byte immediate value even if it fits into 8bit |
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5421 void Assembler::subq_imm32(Register dst, int32_t imm32) { |
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5422 (void) prefixq_and_encode(dst->encoding()); |
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5423 emit_arith_imm32(0x81, 0xE8, dst, imm32); |
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5424 } |
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5425 |
304 | 5426 void Assembler::subq(Register dst, Address src) { |
5427 InstructionMark im(this); | |
5428 prefixq(src, dst); | |
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5429 emit_int8(0x2B); |
304 | 5430 emit_operand(dst, src); |
5431 } | |
5432 | |
5433 void Assembler::subq(Register dst, Register src) { | |
5434 (void) prefixq_and_encode(dst->encoding(), src->encoding()); | |
5435 emit_arith(0x2B, 0xC0, dst, src); | |
5436 } | |
5437 | |
5438 void Assembler::testq(Register dst, int32_t imm32) { | |
5439 // not using emit_arith because test | |
5440 // doesn't support sign-extension of | |
5441 // 8bit operands | |
5442 int encode = dst->encoding(); | |
5443 if (encode == 0) { | |
5444 prefix(REX_W); | |
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5445 emit_int8((unsigned char)0xA9); |
304 | 5446 } else { |
5447 encode = prefixq_and_encode(encode); | |
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5448 emit_int8((unsigned char)0xF7); |
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5449 emit_int8((unsigned char)(0xC0 | encode)); |
304 | 5450 } |
7476
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8004537: replace AbstractAssembler emit_long with emit_int32
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5451 emit_int32(imm32); |
304 | 5452 } |
5453 | |
5454 void Assembler::testq(Register dst, Register src) { | |
5455 (void) prefixq_and_encode(dst->encoding(), src->encoding()); | |
5456 emit_arith(0x85, 0xC0, dst, src); | |
5457 } | |
5458 | |
5459 void Assembler::xaddq(Address dst, Register src) { | |
5460 InstructionMark im(this); | |
5461 prefixq(dst, src); | |
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5462 emit_int8(0x0F); |
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5463 emit_int8((unsigned char)0xC1); |
304 | 5464 emit_operand(src, dst); |
5465 } | |
5466 | |
5467 void Assembler::xchgq(Register dst, Address src) { | |
5468 InstructionMark im(this); | |
5469 prefixq(src, dst); | |
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5470 emit_int8((unsigned char)0x87); |
304 | 5471 emit_operand(dst, src); |
5472 } | |
5473 | |
5474 void Assembler::xchgq(Register dst, Register src) { | |
5475 int encode = prefixq_and_encode(dst->encoding(), src->encoding()); | |
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5476 emit_int8((unsigned char)0x87); |
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5477 emit_int8((unsigned char)(0xc0 | encode)); |
304 | 5478 } |
5479 | |
5480 void Assembler::xorq(Register dst, Register src) { | |
5481 (void) prefixq_and_encode(dst->encoding(), src->encoding()); | |
5482 emit_arith(0x33, 0xC0, dst, src); | |
5483 } | |
5484 | |
5485 void Assembler::xorq(Register dst, Address src) { | |
5486 InstructionMark im(this); | |
5487 prefixq(src, dst); | |
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5488 emit_int8(0x33); |
304 | 5489 emit_operand(dst, src); |
5490 } | |
5491 | |
5492 #endif // !LP64 |