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annotate graal/com.oracle.graal.amd64/src/com/oracle/graal/amd64/AMD64.java @ 14908:8db6e76cb658

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Formatter: Keep one enum constant per line
author Gilles Duboscq <duboscq@ssw.jku.at>
date Tue, 01 Apr 2014 14:09:03 +0200
parents 82e4fe6fa525
children 39be5bc00046
Ignore whitespace changes - Everywhere: Within whitespace: At end of lines:
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1 /*
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2 * Copyright (c) 2009, 2011, Oracle and/or its affiliates. All rights reserved.
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3 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
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4 *
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5 * This code is free software; you can redistribute it and/or modify it
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6 * under the terms of the GNU General Public License version 2 only, as
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7 * published by the Free Software Foundation.
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8 *
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9 * This code is distributed in the hope that it will be useful, but WITHOUT
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10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
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12 * version 2 for more details (a copy is included in the LICENSE file that
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13 * accompanied this code).
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14 *
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15 * You should have received a copy of the GNU General Public License version
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16 * 2 along with this work; if not, write to the Free Software Foundation,
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17 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
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18 *
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19 * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
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20 * or visit www.oracle.com if you need additional information or have any
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21 * questions.
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22 */
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23 package com.oracle.graal.amd64;
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24
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25 import static com.oracle.graal.api.code.MemoryBarriers.*;
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26 import static com.oracle.graal.api.code.Register.*;
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27
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28 import java.nio.*;
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29 import java.util.*;
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30
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31 import com.oracle.graal.api.code.*;
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32 import com.oracle.graal.api.code.Register.RegisterCategory;
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33 import com.oracle.graal.api.meta.*;
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34
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35 /**
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36 * Represents the AMD64 architecture.
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37 */
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38 public class AMD64 extends Architecture {
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39
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40 public static final RegisterCategory CPU = new RegisterCategory("CPU");
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41 public static final RegisterCategory XMM = new RegisterCategory("XMM");
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42
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43 // @formatter:off
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44
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45 // General purpose CPU registers
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46 public static final Register rax = new Register(0, 0, "rax", CPU);
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47 public static final Register rcx = new Register(1, 1, "rcx", CPU);
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48 public static final Register rdx = new Register(2, 2, "rdx", CPU);
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49 public static final Register rbx = new Register(3, 3, "rbx", CPU);
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50 public static final Register rsp = new Register(4, 4, "rsp", CPU);
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51 public static final Register rbp = new Register(5, 5, "rbp", CPU);
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52 public static final Register rsi = new Register(6, 6, "rsi", CPU);
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53 public static final Register rdi = new Register(7, 7, "rdi", CPU);
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54
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55 public static final Register r8 = new Register(8, 8, "r8", CPU);
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56 public static final Register r9 = new Register(9, 9, "r9", CPU);
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57 public static final Register r10 = new Register(10, 10, "r10", CPU);
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58 public static final Register r11 = new Register(11, 11, "r11", CPU);
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59 public static final Register r12 = new Register(12, 12, "r12", CPU);
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60 public static final Register r13 = new Register(13, 13, "r13", CPU);
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61 public static final Register r14 = new Register(14, 14, "r14", CPU);
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62 public static final Register r15 = new Register(15, 15, "r15", CPU);
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63
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64 public static final Register[] cpuRegisters = {
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65 rax, rcx, rdx, rbx, rsp, rbp, rsi, rdi,
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66 r8, r9, r10, r11, r12, r13, r14, r15
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67 };
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68
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69 // XMM registers
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70 public static final Register xmm0 = new Register(16, 0, "xmm0", XMM);
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71 public static final Register xmm1 = new Register(17, 1, "xmm1", XMM);
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72 public static final Register xmm2 = new Register(18, 2, "xmm2", XMM);
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73 public static final Register xmm3 = new Register(19, 3, "xmm3", XMM);
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74 public static final Register xmm4 = new Register(20, 4, "xmm4", XMM);
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75 public static final Register xmm5 = new Register(21, 5, "xmm5", XMM);
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76 public static final Register xmm6 = new Register(22, 6, "xmm6", XMM);
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77 public static final Register xmm7 = new Register(23, 7, "xmm7", XMM);
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78
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79 public static final Register xmm8 = new Register(24, 8, "xmm8", XMM);
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80 public static final Register xmm9 = new Register(25, 9, "xmm9", XMM);
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81 public static final Register xmm10 = new Register(26, 10, "xmm10", XMM);
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82 public static final Register xmm11 = new Register(27, 11, "xmm11", XMM);
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83 public static final Register xmm12 = new Register(28, 12, "xmm12", XMM);
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84 public static final Register xmm13 = new Register(29, 13, "xmm13", XMM);
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85 public static final Register xmm14 = new Register(30, 14, "xmm14", XMM);
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86 public static final Register xmm15 = new Register(31, 15, "xmm15", XMM);
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87
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88 public static final Register[] xmmRegisters = {
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89 xmm0, xmm1, xmm2, xmm3, xmm4, xmm5, xmm6, xmm7,
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90 xmm8, xmm9, xmm10, xmm11, xmm12, xmm13, xmm14, xmm15
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91 };
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92
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93 public static final Register[] cpuxmmRegisters = {
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94 rax, rcx, rdx, rbx, rsp, rbp, rsi, rdi,
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95 r8, r9, r10, r11, r12, r13, r14, r15,
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96 xmm0, xmm1, xmm2, xmm3, xmm4, xmm5, xmm6, xmm7,
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97 xmm8, xmm9, xmm10, xmm11, xmm12, xmm13, xmm14, xmm15
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98 };
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99
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100 /**
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101 * Register used to construct an instruction-relative address.
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102 */
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103 public static final Register rip = new Register(32, -1, "rip", SPECIAL);
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104
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105 public static final Register[] allRegisters = {
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106 rax, rcx, rdx, rbx, rsp, rbp, rsi, rdi,
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107 r8, r9, r10, r11, r12, r13, r14, r15,
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108 xmm0, xmm1, xmm2, xmm3, xmm4, xmm5, xmm6, xmm7,
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109 xmm8, xmm9, xmm10, xmm11, xmm12, xmm13, xmm14, xmm15,
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110 rip
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111 };
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112
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113 // @formatter:on
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114
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115 /**
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116 * Basic set of CPU features mirroring what is returned from the cpuid instruction.
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117 */
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118 public static enum CPUFeature {
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119 SSE,
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120 SSE2,
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121 SSE3,
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122 SSE4a,
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123 SSE4_1,
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124 SSE4_2,
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125 SSSE3,
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126 POPCNT,
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127 LZCNT,
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Gilles Duboscq <duboscq@ssw.jku.at>
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128 AVX,
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Gilles Duboscq <duboscq@ssw.jku.at>
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129 AVX2,
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Gilles Duboscq <duboscq@ssw.jku.at>
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130 ERMS,
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131 AMD_3DNOW_PREFETCH,
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132 AES,
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133 }
9189
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134
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135 private final EnumSet<CPUFeature> features;
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136
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137 public AMD64(EnumSet<CPUFeature> features) {
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138 super("AMD64", 8, ByteOrder.LITTLE_ENDIAN, true, allRegisters, LOAD_STORE | STORE_STORE, 1, r15.encoding + 1, 8);
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139 this.features = features;
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140 assert features.contains(CPUFeature.SSE2) : "minimum config for x64";
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141 }
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142
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143 public EnumSet<CPUFeature> getFeatures() {
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144 return features;
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145 }
9425
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146
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147 @Override
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148 public boolean canStoreValue(RegisterCategory category, PlatformKind platformKind) {
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149 if (!(platformKind instanceof Kind)) {
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150 return false;
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151 }
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152
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153 Kind kind = (Kind) platformKind;
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154 if (category == CPU) {
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155 switch (kind) {
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156 case Boolean:
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157 case Byte:
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158 case Char:
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159 case Short:
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160 case Int:
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161 case Long:
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162 case Object:
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163 return true;
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164 }
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165 } else if (category == XMM) {
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166 switch (kind) {
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167 case Float:
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168 case Double:
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169 return true;
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170 }
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171 }
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172
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173 return false;
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174 }
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175
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176 @Override
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177 public PlatformKind getLargestStorableKind(RegisterCategory category) {
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178 if (category == CPU) {
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179 return Kind.Long;
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180 } else if (category == XMM) {
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181 return Kind.Double;
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182 } else {
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183 return Kind.Illegal;
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184 }
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185 }
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186 }