Mercurial > hg > graal-compiler
annotate src/share/vm/opto/matcher.cpp @ 14726:92aa6797d639
Backed out merge changeset: b51e29501f30
Backed out merge revision to its first parent (8f483e200405)
| author | Doug Simon <doug.simon@oracle.com> |
|---|---|
| date | Mon, 24 Mar 2014 21:30:43 +0100 |
| parents | 9e9af3aa4278 |
| children |
| rev | line source |
|---|---|
| 0 | 1 /* |
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2 * Copyright (c) 1997, 2013, Oracle and/or its affiliates. All rights reserved. |
| 0 | 3 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. |
| 4 * | |
| 5 * This code is free software; you can redistribute it and/or modify it | |
| 6 * under the terms of the GNU General Public License version 2 only, as | |
| 7 * published by the Free Software Foundation. | |
| 8 * | |
| 9 * This code is distributed in the hope that it will be useful, but WITHOUT | |
| 10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or | |
| 11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License | |
| 12 * version 2 for more details (a copy is included in the LICENSE file that | |
| 13 * accompanied this code). | |
| 14 * | |
| 15 * You should have received a copy of the GNU General Public License version | |
| 16 * 2 along with this work; if not, write to the Free Software Foundation, | |
| 17 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA. | |
| 18 * | |
|
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19 * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA |
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20 * or visit www.oracle.com if you need additional information or have any |
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21 * questions. |
| 0 | 22 * |
| 23 */ | |
| 24 | |
| 1972 | 25 #include "precompiled.hpp" |
| 26 #include "memory/allocation.inline.hpp" | |
| 27 #include "opto/addnode.hpp" | |
| 28 #include "opto/callnode.hpp" | |
| 29 #include "opto/connode.hpp" | |
| 30 #include "opto/idealGraphPrinter.hpp" | |
| 31 #include "opto/matcher.hpp" | |
| 32 #include "opto/memnode.hpp" | |
| 33 #include "opto/opcodes.hpp" | |
| 34 #include "opto/regmask.hpp" | |
| 35 #include "opto/rootnode.hpp" | |
| 36 #include "opto/runtime.hpp" | |
| 37 #include "opto/type.hpp" | |
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38 #include "opto/vectornode.hpp" |
| 1972 | 39 #include "runtime/atomic.hpp" |
| 40 #include "runtime/os.hpp" | |
| 41 #ifdef TARGET_ARCH_MODEL_x86_32 | |
| 42 # include "adfiles/ad_x86_32.hpp" | |
| 43 #endif | |
| 44 #ifdef TARGET_ARCH_MODEL_x86_64 | |
| 45 # include "adfiles/ad_x86_64.hpp" | |
| 46 #endif | |
| 47 #ifdef TARGET_ARCH_MODEL_sparc | |
| 48 # include "adfiles/ad_sparc.hpp" | |
| 49 #endif | |
| 50 #ifdef TARGET_ARCH_MODEL_zero | |
| 51 # include "adfiles/ad_zero.hpp" | |
| 52 #endif | |
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53 #ifdef TARGET_ARCH_MODEL_arm |
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54 # include "adfiles/ad_arm.hpp" |
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55 #endif |
| 14391 | 56 #ifdef TARGET_ARCH_MODEL_ppc_32 |
| 57 # include "adfiles/ad_ppc_32.hpp" | |
| 58 #endif | |
| 59 #ifdef TARGET_ARCH_MODEL_ppc_64 | |
| 60 # include "adfiles/ad_ppc_64.hpp" | |
| 3796 | 61 #endif |
| 0 | 62 |
| 63 OptoReg::Name OptoReg::c_frame_pointer; | |
| 64 | |
| 65 const RegMask *Matcher::idealreg2regmask[_last_machine_leaf]; | |
| 66 RegMask Matcher::mreg2regmask[_last_Mach_Reg]; | |
| 67 RegMask Matcher::STACK_ONLY_mask; | |
| 68 RegMask Matcher::c_frame_ptr_mask; | |
| 69 const uint Matcher::_begin_rematerialize = _BEGIN_REMATERIALIZE; | |
| 70 const uint Matcher::_end_rematerialize = _END_REMATERIALIZE; | |
| 71 | |
| 72 //---------------------------Matcher------------------------------------------- | |
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73 Matcher::Matcher() |
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74 : PhaseTransform( Phase::Ins_Select ), |
| 0 | 75 #ifdef ASSERT |
| 76 _old2new_map(C->comp_arena()), | |
| 222 | 77 _new2old_map(C->comp_arena()), |
| 0 | 78 #endif |
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79 _shared_nodes(C->comp_arena()), |
| 0 | 80 _reduceOp(reduceOp), _leftOp(leftOp), _rightOp(rightOp), |
| 81 _swallowed(swallowed), | |
| 82 _begin_inst_chain_rule(_BEGIN_INST_CHAIN_RULE), | |
| 83 _end_inst_chain_rule(_END_INST_CHAIN_RULE), | |
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84 _must_clone(must_clone), |
| 0 | 85 _register_save_policy(register_save_policy), |
| 86 _c_reg_save_policy(c_reg_save_policy), | |
| 87 _register_save_type(register_save_type), | |
| 88 _ruleName(ruleName), | |
| 89 _allocation_started(false), | |
| 90 _states_arena(Chunk::medium_size), | |
| 91 _visited(&_states_arena), | |
| 92 _shared(&_states_arena), | |
| 93 _dontcare(&_states_arena) { | |
| 94 C->set_matcher(this); | |
| 95 | |
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96 idealreg2spillmask [Op_RegI] = NULL; |
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97 idealreg2spillmask [Op_RegN] = NULL; |
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98 idealreg2spillmask [Op_RegL] = NULL; |
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99 idealreg2spillmask [Op_RegF] = NULL; |
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100 idealreg2spillmask [Op_RegD] = NULL; |
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101 idealreg2spillmask [Op_RegP] = NULL; |
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102 idealreg2spillmask [Op_VecS] = NULL; |
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103 idealreg2spillmask [Op_VecD] = NULL; |
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104 idealreg2spillmask [Op_VecX] = NULL; |
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105 idealreg2spillmask [Op_VecY] = NULL; |
| 0 | 106 |
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107 idealreg2debugmask [Op_RegI] = NULL; |
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108 idealreg2debugmask [Op_RegN] = NULL; |
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109 idealreg2debugmask [Op_RegL] = NULL; |
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110 idealreg2debugmask [Op_RegF] = NULL; |
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111 idealreg2debugmask [Op_RegD] = NULL; |
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112 idealreg2debugmask [Op_RegP] = NULL; |
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113 idealreg2debugmask [Op_VecS] = NULL; |
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114 idealreg2debugmask [Op_VecD] = NULL; |
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115 idealreg2debugmask [Op_VecX] = NULL; |
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116 idealreg2debugmask [Op_VecY] = NULL; |
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117 |
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118 idealreg2mhdebugmask[Op_RegI] = NULL; |
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119 idealreg2mhdebugmask[Op_RegN] = NULL; |
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120 idealreg2mhdebugmask[Op_RegL] = NULL; |
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121 idealreg2mhdebugmask[Op_RegF] = NULL; |
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122 idealreg2mhdebugmask[Op_RegD] = NULL; |
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123 idealreg2mhdebugmask[Op_RegP] = NULL; |
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124 idealreg2mhdebugmask[Op_VecS] = NULL; |
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125 idealreg2mhdebugmask[Op_VecD] = NULL; |
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126 idealreg2mhdebugmask[Op_VecX] = NULL; |
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127 idealreg2mhdebugmask[Op_VecY] = NULL; |
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128 |
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129 debug_only(_mem_node = NULL;) // Ideal memory node consumed by mach node |
| 0 | 130 } |
| 131 | |
| 132 //------------------------------warp_incoming_stk_arg------------------------ | |
| 133 // This warps a VMReg into an OptoReg::Name | |
| 134 OptoReg::Name Matcher::warp_incoming_stk_arg( VMReg reg ) { | |
| 135 OptoReg::Name warped; | |
| 136 if( reg->is_stack() ) { // Stack slot argument? | |
| 137 warped = OptoReg::add(_old_SP, reg->reg2stack() ); | |
| 138 warped = OptoReg::add(warped, C->out_preserve_stack_slots()); | |
| 139 if( warped >= _in_arg_limit ) | |
| 140 _in_arg_limit = OptoReg::add(warped, 1); // Bump max stack slot seen | |
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141 if (!RegMask::can_represent_arg(warped)) { |
| 0 | 142 // the compiler cannot represent this method's calling sequence |
| 143 C->record_method_not_compilable_all_tiers("unsupported incoming calling sequence"); | |
| 144 return OptoReg::Bad; | |
| 145 } | |
| 146 return warped; | |
| 147 } | |
| 148 return OptoReg::as_OptoReg(reg); | |
| 149 } | |
| 150 | |
| 151 //---------------------------compute_old_SP------------------------------------ | |
| 152 OptoReg::Name Compile::compute_old_SP() { | |
| 153 int fixed = fixed_slots(); | |
| 154 int preserve = in_preserve_stack_slots(); | |
| 155 return OptoReg::stack2reg(round_to(fixed + preserve, Matcher::stack_alignment_in_slots())); | |
| 156 } | |
| 157 | |
| 158 | |
| 159 | |
| 160 #ifdef ASSERT | |
| 161 void Matcher::verify_new_nodes_only(Node* xroot) { | |
| 162 // Make sure that the new graph only references new nodes | |
| 163 ResourceMark rm; | |
| 164 Unique_Node_List worklist; | |
| 165 VectorSet visited(Thread::current()->resource_area()); | |
| 166 worklist.push(xroot); | |
| 167 while (worklist.size() > 0) { | |
| 168 Node* n = worklist.pop(); | |
| 169 visited <<= n->_idx; | |
| 170 assert(C->node_arena()->contains(n), "dead node"); | |
| 171 for (uint j = 0; j < n->req(); j++) { | |
| 172 Node* in = n->in(j); | |
| 173 if (in != NULL) { | |
| 174 assert(C->node_arena()->contains(in), "dead node"); | |
| 175 if (!visited.test(in->_idx)) { | |
| 176 worklist.push(in); | |
| 177 } | |
| 178 } | |
| 179 } | |
| 180 } | |
| 181 } | |
| 182 #endif | |
| 183 | |
| 184 | |
| 185 //---------------------------match--------------------------------------------- | |
| 186 void Matcher::match( ) { | |
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187 if( MaxLabelRootDepth < 100 ) { // Too small? |
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188 assert(false, "invalid MaxLabelRootDepth, increase it to 100 minimum"); |
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189 MaxLabelRootDepth = 100; |
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190 } |
| 0 | 191 // One-time initialization of some register masks. |
| 192 init_spill_mask( C->root()->in(1) ); | |
| 193 _return_addr_mask = return_addr(); | |
| 194 #ifdef _LP64 | |
| 195 // Pointers take 2 slots in 64-bit land | |
| 196 _return_addr_mask.Insert(OptoReg::add(return_addr(),1)); | |
| 197 #endif | |
| 198 | |
| 199 // Map a Java-signature return type into return register-value | |
| 200 // machine registers for 0, 1 and 2 returned values. | |
| 201 const TypeTuple *range = C->tf()->range(); | |
| 202 if( range->cnt() > TypeFunc::Parms ) { // If not a void function | |
| 203 // Get ideal-register return type | |
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204 int ireg = range->field_at(TypeFunc::Parms)->ideal_reg(); |
| 0 | 205 // Get machine return register |
| 206 uint sop = C->start()->Opcode(); | |
| 207 OptoRegPair regs = return_value(ireg, false); | |
| 208 | |
| 209 // And mask for same | |
| 210 _return_value_mask = RegMask(regs.first()); | |
| 211 if( OptoReg::is_valid(regs.second()) ) | |
| 212 _return_value_mask.Insert(regs.second()); | |
| 213 } | |
| 214 | |
| 215 // --------------- | |
| 216 // Frame Layout | |
| 217 | |
| 218 // Need the method signature to determine the incoming argument types, | |
| 219 // because the types determine which registers the incoming arguments are | |
| 220 // in, and this affects the matched code. | |
| 221 const TypeTuple *domain = C->tf()->domain(); | |
| 222 uint argcnt = domain->cnt() - TypeFunc::Parms; | |
| 223 BasicType *sig_bt = NEW_RESOURCE_ARRAY( BasicType, argcnt ); | |
| 224 VMRegPair *vm_parm_regs = NEW_RESOURCE_ARRAY( VMRegPair, argcnt ); | |
| 225 _parm_regs = NEW_RESOURCE_ARRAY( OptoRegPair, argcnt ); | |
| 226 _calling_convention_mask = NEW_RESOURCE_ARRAY( RegMask, argcnt ); | |
| 227 uint i; | |
| 228 for( i = 0; i<argcnt; i++ ) { | |
| 229 sig_bt[i] = domain->field_at(i+TypeFunc::Parms)->basic_type(); | |
| 230 } | |
| 231 | |
| 232 // Pass array of ideal registers and length to USER code (from the AD file) | |
| 233 // that will convert this to an array of register numbers. | |
| 234 const StartNode *start = C->start(); | |
| 235 start->calling_convention( sig_bt, vm_parm_regs, argcnt ); | |
| 236 #ifdef ASSERT | |
| 237 // Sanity check users' calling convention. Real handy while trying to | |
| 238 // get the initial port correct. | |
| 239 { for (uint i = 0; i<argcnt; i++) { | |
| 240 if( !vm_parm_regs[i].first()->is_valid() && !vm_parm_regs[i].second()->is_valid() ) { | |
| 241 assert(domain->field_at(i+TypeFunc::Parms)==Type::HALF, "only allowed on halve" ); | |
| 242 _parm_regs[i].set_bad(); | |
| 243 continue; | |
| 244 } | |
| 245 VMReg parm_reg = vm_parm_regs[i].first(); | |
| 246 assert(parm_reg->is_valid(), "invalid arg?"); | |
| 247 if (parm_reg->is_reg()) { | |
| 248 OptoReg::Name opto_parm_reg = OptoReg::as_OptoReg(parm_reg); | |
| 249 assert(can_be_java_arg(opto_parm_reg) || | |
| 250 C->stub_function() == CAST_FROM_FN_PTR(address, OptoRuntime::rethrow_C) || | |
| 251 opto_parm_reg == inline_cache_reg(), | |
| 252 "parameters in register must be preserved by runtime stubs"); | |
| 253 } | |
| 254 for (uint j = 0; j < i; j++) { | |
| 255 assert(parm_reg != vm_parm_regs[j].first(), | |
| 256 "calling conv. must produce distinct regs"); | |
| 257 } | |
| 258 } | |
| 259 } | |
| 260 #endif | |
| 261 | |
| 262 // Do some initial frame layout. | |
| 263 | |
| 264 // Compute the old incoming SP (may be called FP) as | |
| 265 // OptoReg::stack0() + locks + in_preserve_stack_slots + pad2. | |
| 266 _old_SP = C->compute_old_SP(); | |
| 267 assert( is_even(_old_SP), "must be even" ); | |
| 268 | |
| 269 // Compute highest incoming stack argument as | |
| 270 // _old_SP + out_preserve_stack_slots + incoming argument size. | |
| 271 _in_arg_limit = OptoReg::add(_old_SP, C->out_preserve_stack_slots()); | |
| 272 assert( is_even(_in_arg_limit), "out_preserve must be even" ); | |
| 273 for( i = 0; i < argcnt; i++ ) { | |
| 274 // Permit args to have no register | |
| 275 _calling_convention_mask[i].Clear(); | |
| 276 if( !vm_parm_regs[i].first()->is_valid() && !vm_parm_regs[i].second()->is_valid() ) { | |
| 277 continue; | |
| 278 } | |
| 279 // calling_convention returns stack arguments as a count of | |
| 280 // slots beyond OptoReg::stack0()/VMRegImpl::stack0. We need to convert this to | |
| 281 // the allocators point of view, taking into account all the | |
| 282 // preserve area, locks & pad2. | |
| 283 | |
| 284 OptoReg::Name reg1 = warp_incoming_stk_arg(vm_parm_regs[i].first()); | |
| 285 if( OptoReg::is_valid(reg1)) | |
| 286 _calling_convention_mask[i].Insert(reg1); | |
| 287 | |
| 288 OptoReg::Name reg2 = warp_incoming_stk_arg(vm_parm_regs[i].second()); | |
| 289 if( OptoReg::is_valid(reg2)) | |
| 290 _calling_convention_mask[i].Insert(reg2); | |
| 291 | |
| 292 // Saved biased stack-slot register number | |
| 293 _parm_regs[i].set_pair(reg2, reg1); | |
| 294 } | |
| 295 | |
| 296 // Finally, make sure the incoming arguments take up an even number of | |
| 297 // words, in case the arguments or locals need to contain doubleword stack | |
| 298 // slots. The rest of the system assumes that stack slot pairs (in | |
| 299 // particular, in the spill area) which look aligned will in fact be | |
| 300 // aligned relative to the stack pointer in the target machine. Double | |
| 301 // stack slots will always be allocated aligned. | |
| 302 _new_SP = OptoReg::Name(round_to(_in_arg_limit, RegMask::SlotsPerLong)); | |
| 303 | |
| 304 // Compute highest outgoing stack argument as | |
| 305 // _new_SP + out_preserve_stack_slots + max(outgoing argument size). | |
| 306 _out_arg_limit = OptoReg::add(_new_SP, C->out_preserve_stack_slots()); | |
| 307 assert( is_even(_out_arg_limit), "out_preserve must be even" ); | |
| 308 | |
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309 if (!RegMask::can_represent_arg(OptoReg::add(_out_arg_limit,-1))) { |
| 0 | 310 // the compiler cannot represent this method's calling sequence |
| 311 C->record_method_not_compilable("must be able to represent all call arguments in reg mask"); | |
| 312 } | |
| 313 | |
| 314 if (C->failing()) return; // bailed out on incoming arg failure | |
| 315 | |
| 316 // --------------- | |
| 317 // Collect roots of matcher trees. Every node for which | |
| 318 // _shared[_idx] is cleared is guaranteed to not be shared, and thus | |
| 319 // can be a valid interior of some tree. | |
| 320 find_shared( C->root() ); | |
| 321 find_shared( C->top() ); | |
| 322 | |
| 10405 | 323 C->print_method(PHASE_BEFORE_MATCHING); |
| 0 | 324 |
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325 // Create new ideal node ConP #NULL even if it does exist in old space |
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326 // to avoid false sharing if the corresponding mach node is not used. |
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327 // The corresponding mach node is only used in rare cases for derived |
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328 // pointers. |
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329 Node* new_ideal_null = ConNode::make(C, TypePtr::NULL_PTR); |
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330 |
| 0 | 331 // Swap out to old-space; emptying new-space |
| 332 Arena *old = C->node_arena()->move_contents(C->old_arena()); | |
| 333 | |
| 334 // Save debug and profile information for nodes in old space: | |
| 335 _old_node_note_array = C->node_note_array(); | |
| 336 if (_old_node_note_array != NULL) { | |
| 337 C->set_node_note_array(new(C->comp_arena()) GrowableArray<Node_Notes*> | |
| 338 (C->comp_arena(), _old_node_note_array->length(), | |
| 339 0, NULL)); | |
| 340 } | |
| 341 | |
| 342 // Pre-size the new_node table to avoid the need for range checks. | |
| 343 grow_new_node_array(C->unique()); | |
| 344 | |
| 345 // Reset node counter so MachNodes start with _idx at 0 | |
| 346 int nodes = C->unique(); // save value | |
| 347 C->set_unique(0); | |
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348 C->reset_dead_node_list(); |
| 0 | 349 |
| 350 // Recursively match trees from old space into new space. | |
| 351 // Correct leaves of new-space Nodes; they point to old-space. | |
| 352 _visited.Clear(); // Clear visit bits for xform call | |
| 353 C->set_cached_top_node(xform( C->top(), nodes )); | |
| 354 if (!C->failing()) { | |
| 355 Node* xroot = xform( C->root(), 1 ); | |
| 356 if (xroot == NULL) { | |
| 357 Matcher::soft_match_failure(); // recursive matching process failed | |
| 358 C->record_method_not_compilable("instruction match failed"); | |
| 359 } else { | |
| 360 // During matching shared constants were attached to C->root() | |
| 361 // because xroot wasn't available yet, so transfer the uses to | |
| 362 // the xroot. | |
| 363 for( DUIterator_Fast jmax, j = C->root()->fast_outs(jmax); j < jmax; j++ ) { | |
| 364 Node* n = C->root()->fast_out(j); | |
| 365 if (C->node_arena()->contains(n)) { | |
| 366 assert(n->in(0) == C->root(), "should be control user"); | |
| 367 n->set_req(0, xroot); | |
| 368 --j; | |
| 369 --jmax; | |
| 370 } | |
| 371 } | |
| 372 | |
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373 // Generate new mach node for ConP #NULL |
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374 assert(new_ideal_null != NULL, "sanity"); |
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375 _mach_null = match_tree(new_ideal_null); |
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376 // Don't set control, it will confuse GCM since there are no uses. |
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377 // The control will be set when this node is used first time |
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378 // in find_base_for_derived(). |
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379 assert(_mach_null != NULL, ""); |
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380 |
| 0 | 381 C->set_root(xroot->is_Root() ? xroot->as_Root() : NULL); |
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382 |
| 0 | 383 #ifdef ASSERT |
| 384 verify_new_nodes_only(xroot); | |
| 385 #endif | |
| 386 } | |
| 387 } | |
| 388 if (C->top() == NULL || C->root() == NULL) { | |
| 389 C->record_method_not_compilable("graph lost"); // %%% cannot happen? | |
| 390 } | |
| 391 if (C->failing()) { | |
| 392 // delete old; | |
| 393 old->destruct_contents(); | |
| 394 return; | |
| 395 } | |
| 396 assert( C->top(), "" ); | |
| 397 assert( C->root(), "" ); | |
| 398 validate_null_checks(); | |
| 399 | |
| 400 // Now smoke old-space | |
| 401 NOT_DEBUG( old->destruct_contents() ); | |
| 402 | |
| 403 // ------------------------ | |
| 404 // Set up save-on-entry registers | |
| 405 Fixup_Save_On_Entry( ); | |
| 406 } | |
| 407 | |
| 408 | |
| 409 //------------------------------Fixup_Save_On_Entry---------------------------- | |
| 410 // The stated purpose of this routine is to take care of save-on-entry | |
| 411 // registers. However, the overall goal of the Match phase is to convert into | |
| 412 // machine-specific instructions which have RegMasks to guide allocation. | |
| 413 // So what this procedure really does is put a valid RegMask on each input | |
| 414 // to the machine-specific variations of all Return, TailCall and Halt | |
| 415 // instructions. It also adds edgs to define the save-on-entry values (and of | |
| 416 // course gives them a mask). | |
| 417 | |
| 418 static RegMask *init_input_masks( uint size, RegMask &ret_adr, RegMask &fp ) { | |
| 419 RegMask *rms = NEW_RESOURCE_ARRAY( RegMask, size ); | |
| 420 // Do all the pre-defined register masks | |
| 421 rms[TypeFunc::Control ] = RegMask::Empty; | |
| 422 rms[TypeFunc::I_O ] = RegMask::Empty; | |
| 423 rms[TypeFunc::Memory ] = RegMask::Empty; | |
| 424 rms[TypeFunc::ReturnAdr] = ret_adr; | |
| 425 rms[TypeFunc::FramePtr ] = fp; | |
| 426 return rms; | |
| 427 } | |
| 428 | |
| 429 //---------------------------init_first_stack_mask----------------------------- | |
| 430 // Create the initial stack mask used by values spilling to the stack. | |
| 431 // Disallow any debug info in outgoing argument areas by setting the | |
| 432 // initial mask accordingly. | |
| 433 void Matcher::init_first_stack_mask() { | |
| 434 | |
| 435 // Allocate storage for spill masks as masks for the appropriate load type. | |
|
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436 RegMask *rms = (RegMask*)C->comp_arena()->Amalloc_D(sizeof(RegMask) * (3*6+4)); |
|
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437 |
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438 idealreg2spillmask [Op_RegN] = &rms[0]; |
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439 idealreg2spillmask [Op_RegI] = &rms[1]; |
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440 idealreg2spillmask [Op_RegL] = &rms[2]; |
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441 idealreg2spillmask [Op_RegF] = &rms[3]; |
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442 idealreg2spillmask [Op_RegD] = &rms[4]; |
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443 idealreg2spillmask [Op_RegP] = &rms[5]; |
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444 |
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445 idealreg2debugmask [Op_RegN] = &rms[6]; |
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446 idealreg2debugmask [Op_RegI] = &rms[7]; |
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447 idealreg2debugmask [Op_RegL] = &rms[8]; |
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448 idealreg2debugmask [Op_RegF] = &rms[9]; |
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449 idealreg2debugmask [Op_RegD] = &rms[10]; |
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450 idealreg2debugmask [Op_RegP] = &rms[11]; |
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451 |
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452 idealreg2mhdebugmask[Op_RegN] = &rms[12]; |
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453 idealreg2mhdebugmask[Op_RegI] = &rms[13]; |
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454 idealreg2mhdebugmask[Op_RegL] = &rms[14]; |
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455 idealreg2mhdebugmask[Op_RegF] = &rms[15]; |
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456 idealreg2mhdebugmask[Op_RegD] = &rms[16]; |
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457 idealreg2mhdebugmask[Op_RegP] = &rms[17]; |
| 0 | 458 |
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459 idealreg2spillmask [Op_VecS] = &rms[18]; |
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460 idealreg2spillmask [Op_VecD] = &rms[19]; |
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461 idealreg2spillmask [Op_VecX] = &rms[20]; |
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462 idealreg2spillmask [Op_VecY] = &rms[21]; |
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463 |
| 0 | 464 OptoReg::Name i; |
| 465 | |
| 466 // At first, start with the empty mask | |
| 467 C->FIRST_STACK_mask().Clear(); | |
| 468 | |
| 469 // Add in the incoming argument area | |
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470 OptoReg::Name init_in = OptoReg::add(_old_SP, C->out_preserve_stack_slots()); |
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471 for (i = init_in; i < _in_arg_limit; i = OptoReg::add(i,1)) { |
| 0 | 472 C->FIRST_STACK_mask().Insert(i); |
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473 } |
| 0 | 474 // Add in all bits past the outgoing argument area |
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475 guarantee(RegMask::can_represent_arg(OptoReg::add(_out_arg_limit,-1)), |
| 0 | 476 "must be able to represent all call arguments in reg mask"); |
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477 OptoReg::Name init = _out_arg_limit; |
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478 for (i = init; RegMask::can_represent(i); i = OptoReg::add(i,1)) { |
| 0 | 479 C->FIRST_STACK_mask().Insert(i); |
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480 } |
| 0 | 481 // Finally, set the "infinite stack" bit. |
| 482 C->FIRST_STACK_mask().set_AllStack(); | |
| 483 | |
| 484 // Make spill masks. Registers for their class, plus FIRST_STACK_mask. | |
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485 RegMask aligned_stack_mask = C->FIRST_STACK_mask(); |
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486 // Keep spill masks aligned. |
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487 aligned_stack_mask.clear_to_pairs(); |
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488 assert(aligned_stack_mask.is_AllStack(), "should be infinite stack"); |
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489 |
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490 *idealreg2spillmask[Op_RegP] = *idealreg2regmask[Op_RegP]; |
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491 #ifdef _LP64 |
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492 *idealreg2spillmask[Op_RegN] = *idealreg2regmask[Op_RegN]; |
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493 idealreg2spillmask[Op_RegN]->OR(C->FIRST_STACK_mask()); |
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494 idealreg2spillmask[Op_RegP]->OR(aligned_stack_mask); |
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495 #else |
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496 idealreg2spillmask[Op_RegP]->OR(C->FIRST_STACK_mask()); |
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497 #endif |
| 0 | 498 *idealreg2spillmask[Op_RegI] = *idealreg2regmask[Op_RegI]; |
| 499 idealreg2spillmask[Op_RegI]->OR(C->FIRST_STACK_mask()); | |
| 500 *idealreg2spillmask[Op_RegL] = *idealreg2regmask[Op_RegL]; | |
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501 idealreg2spillmask[Op_RegL]->OR(aligned_stack_mask); |
| 0 | 502 *idealreg2spillmask[Op_RegF] = *idealreg2regmask[Op_RegF]; |
| 503 idealreg2spillmask[Op_RegF]->OR(C->FIRST_STACK_mask()); | |
| 504 *idealreg2spillmask[Op_RegD] = *idealreg2regmask[Op_RegD]; | |
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505 idealreg2spillmask[Op_RegD]->OR(aligned_stack_mask); |
| 0 | 506 |
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507 if (Matcher::vector_size_supported(T_BYTE,4)) { |
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508 *idealreg2spillmask[Op_VecS] = *idealreg2regmask[Op_VecS]; |
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509 idealreg2spillmask[Op_VecS]->OR(C->FIRST_STACK_mask()); |
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510 } |
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511 if (Matcher::vector_size_supported(T_FLOAT,2)) { |
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512 // For VecD we need dual alignment and 8 bytes (2 slots) for spills. |
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513 // RA guarantees such alignment since it is needed for Double and Long values. |
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514 *idealreg2spillmask[Op_VecD] = *idealreg2regmask[Op_VecD]; |
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515 idealreg2spillmask[Op_VecD]->OR(aligned_stack_mask); |
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516 } |
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517 if (Matcher::vector_size_supported(T_FLOAT,4)) { |
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518 // For VecX we need quadro alignment and 16 bytes (4 slots) for spills. |
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519 // |
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520 // RA can use input arguments stack slots for spills but until RA |
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521 // we don't know frame size and offset of input arg stack slots. |
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522 // |
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523 // Exclude last input arg stack slots to avoid spilling vectors there |
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524 // otherwise vector spills could stomp over stack slots in caller frame. |
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525 OptoReg::Name in = OptoReg::add(_in_arg_limit, -1); |
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526 for (int k = 1; (in >= init_in) && (k < RegMask::SlotsPerVecX); k++) { |
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527 aligned_stack_mask.Remove(in); |
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528 in = OptoReg::add(in, -1); |
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529 } |
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530 aligned_stack_mask.clear_to_sets(RegMask::SlotsPerVecX); |
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531 assert(aligned_stack_mask.is_AllStack(), "should be infinite stack"); |
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532 *idealreg2spillmask[Op_VecX] = *idealreg2regmask[Op_VecX]; |
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533 idealreg2spillmask[Op_VecX]->OR(aligned_stack_mask); |
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534 } |
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535 if (Matcher::vector_size_supported(T_FLOAT,8)) { |
|
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536 // For VecY we need octo alignment and 32 bytes (8 slots) for spills. |
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537 OptoReg::Name in = OptoReg::add(_in_arg_limit, -1); |
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538 for (int k = 1; (in >= init_in) && (k < RegMask::SlotsPerVecY); k++) { |
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539 aligned_stack_mask.Remove(in); |
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540 in = OptoReg::add(in, -1); |
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541 } |
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542 aligned_stack_mask.clear_to_sets(RegMask::SlotsPerVecY); |
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543 assert(aligned_stack_mask.is_AllStack(), "should be infinite stack"); |
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544 *idealreg2spillmask[Op_VecY] = *idealreg2regmask[Op_VecY]; |
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545 idealreg2spillmask[Op_VecY]->OR(aligned_stack_mask); |
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546 } |
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547 if (UseFPUForSpilling) { |
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548 // This mask logic assumes that the spill operations are |
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549 // symmetric and that the registers involved are the same size. |
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550 // On sparc for instance we may have to use 64 bit moves will |
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551 // kill 2 registers when used with F0-F31. |
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552 idealreg2spillmask[Op_RegI]->OR(*idealreg2regmask[Op_RegF]); |
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553 idealreg2spillmask[Op_RegF]->OR(*idealreg2regmask[Op_RegI]); |
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554 #ifdef _LP64 |
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555 idealreg2spillmask[Op_RegN]->OR(*idealreg2regmask[Op_RegF]); |
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556 idealreg2spillmask[Op_RegL]->OR(*idealreg2regmask[Op_RegD]); |
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557 idealreg2spillmask[Op_RegD]->OR(*idealreg2regmask[Op_RegL]); |
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558 idealreg2spillmask[Op_RegP]->OR(*idealreg2regmask[Op_RegD]); |
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559 #else |
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560 idealreg2spillmask[Op_RegP]->OR(*idealreg2regmask[Op_RegF]); |
| 3909 | 561 #ifdef ARM |
| 562 // ARM has support for moving 64bit values between a pair of | |
| 563 // integer registers and a double register | |
| 564 idealreg2spillmask[Op_RegL]->OR(*idealreg2regmask[Op_RegD]); | |
| 565 idealreg2spillmask[Op_RegD]->OR(*idealreg2regmask[Op_RegL]); | |
| 566 #endif | |
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567 #endif |
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568 } |
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569 |
| 0 | 570 // Make up debug masks. Any spill slot plus callee-save registers. |
| 571 // Caller-save registers are assumed to be trashable by the various | |
| 572 // inline-cache fixup routines. | |
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573 *idealreg2debugmask [Op_RegN]= *idealreg2spillmask[Op_RegN]; |
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574 *idealreg2debugmask [Op_RegI]= *idealreg2spillmask[Op_RegI]; |
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575 *idealreg2debugmask [Op_RegL]= *idealreg2spillmask[Op_RegL]; |
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576 *idealreg2debugmask [Op_RegF]= *idealreg2spillmask[Op_RegF]; |
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577 *idealreg2debugmask [Op_RegD]= *idealreg2spillmask[Op_RegD]; |
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578 *idealreg2debugmask [Op_RegP]= *idealreg2spillmask[Op_RegP]; |
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579 |
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580 *idealreg2mhdebugmask[Op_RegN]= *idealreg2spillmask[Op_RegN]; |
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581 *idealreg2mhdebugmask[Op_RegI]= *idealreg2spillmask[Op_RegI]; |
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582 *idealreg2mhdebugmask[Op_RegL]= *idealreg2spillmask[Op_RegL]; |
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583 *idealreg2mhdebugmask[Op_RegF]= *idealreg2spillmask[Op_RegF]; |
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584 *idealreg2mhdebugmask[Op_RegD]= *idealreg2spillmask[Op_RegD]; |
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585 *idealreg2mhdebugmask[Op_RegP]= *idealreg2spillmask[Op_RegP]; |
| 0 | 586 |
| 587 // Prevent stub compilations from attempting to reference | |
| 588 // callee-saved registers from debug info | |
| 589 bool exclude_soe = !Compile::current()->is_method_compilation(); | |
| 590 | |
| 591 for( i=OptoReg::Name(0); i<OptoReg::Name(_last_Mach_Reg); i = OptoReg::add(i,1) ) { | |
| 592 // registers the caller has to save do not work | |
| 593 if( _register_save_policy[i] == 'C' || | |
| 594 _register_save_policy[i] == 'A' || | |
| 595 (_register_save_policy[i] == 'E' && exclude_soe) ) { | |
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596 idealreg2debugmask [Op_RegN]->Remove(i); |
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597 idealreg2debugmask [Op_RegI]->Remove(i); // Exclude save-on-call |
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598 idealreg2debugmask [Op_RegL]->Remove(i); // registers from debug |
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599 idealreg2debugmask [Op_RegF]->Remove(i); // masks |
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600 idealreg2debugmask [Op_RegD]->Remove(i); |
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601 idealreg2debugmask [Op_RegP]->Remove(i); |
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602 |
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603 idealreg2mhdebugmask[Op_RegN]->Remove(i); |
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604 idealreg2mhdebugmask[Op_RegI]->Remove(i); |
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605 idealreg2mhdebugmask[Op_RegL]->Remove(i); |
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606 idealreg2mhdebugmask[Op_RegF]->Remove(i); |
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607 idealreg2mhdebugmask[Op_RegD]->Remove(i); |
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608 idealreg2mhdebugmask[Op_RegP]->Remove(i); |
| 0 | 609 } |
| 610 } | |
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611 |
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612 // Subtract the register we use to save the SP for MethodHandle |
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613 // invokes to from the debug mask. |
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614 const RegMask save_mask = method_handle_invoke_SP_save_mask(); |
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615 idealreg2mhdebugmask[Op_RegN]->SUBTRACT(save_mask); |
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616 idealreg2mhdebugmask[Op_RegI]->SUBTRACT(save_mask); |
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617 idealreg2mhdebugmask[Op_RegL]->SUBTRACT(save_mask); |
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618 idealreg2mhdebugmask[Op_RegF]->SUBTRACT(save_mask); |
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619 idealreg2mhdebugmask[Op_RegD]->SUBTRACT(save_mask); |
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620 idealreg2mhdebugmask[Op_RegP]->SUBTRACT(save_mask); |
| 0 | 621 } |
| 622 | |
| 623 //---------------------------is_save_on_entry---------------------------------- | |
| 624 bool Matcher::is_save_on_entry( int reg ) { | |
| 625 return | |
| 626 _register_save_policy[reg] == 'E' || | |
| 627 _register_save_policy[reg] == 'A' || // Save-on-entry register? | |
| 628 // Also save argument registers in the trampolining stubs | |
| 629 (C->save_argument_registers() && is_spillable_arg(reg)); | |
| 630 } | |
| 631 | |
| 632 //---------------------------Fixup_Save_On_Entry------------------------------- | |
| 633 void Matcher::Fixup_Save_On_Entry( ) { | |
| 634 init_first_stack_mask(); | |
| 635 | |
| 636 Node *root = C->root(); // Short name for root | |
| 637 // Count number of save-on-entry registers. | |
| 638 uint soe_cnt = number_of_saved_registers(); | |
| 639 uint i; | |
| 640 | |
| 641 // Find the procedure Start Node | |
| 642 StartNode *start = C->start(); | |
| 643 assert( start, "Expect a start node" ); | |
| 644 | |
| 645 // Save argument registers in the trampolining stubs | |
| 646 if( C->save_argument_registers() ) | |
| 647 for( i = 0; i < _last_Mach_Reg; i++ ) | |
| 648 if( is_spillable_arg(i) ) | |
| 649 soe_cnt++; | |
| 650 | |
| 651 // Input RegMask array shared by all Returns. | |
| 652 // The type for doubles and longs has a count of 2, but | |
| 653 // there is only 1 returned value | |
| 654 uint ret_edge_cnt = TypeFunc::Parms + ((C->tf()->range()->cnt() == TypeFunc::Parms) ? 0 : 1); | |
| 655 RegMask *ret_rms = init_input_masks( ret_edge_cnt + soe_cnt, _return_addr_mask, c_frame_ptr_mask ); | |
| 656 // Returns have 0 or 1 returned values depending on call signature. | |
| 657 // Return register is specified by return_value in the AD file. | |
| 658 if (ret_edge_cnt > TypeFunc::Parms) | |
| 659 ret_rms[TypeFunc::Parms+0] = _return_value_mask; | |
| 660 | |
| 661 // Input RegMask array shared by all Rethrows. | |
| 662 uint reth_edge_cnt = TypeFunc::Parms+1; | |
| 663 RegMask *reth_rms = init_input_masks( reth_edge_cnt + soe_cnt, _return_addr_mask, c_frame_ptr_mask ); | |
| 664 // Rethrow takes exception oop only, but in the argument 0 slot. | |
| 665 reth_rms[TypeFunc::Parms] = mreg2regmask[find_receiver(false)]; | |
| 666 #ifdef _LP64 | |
| 667 // Need two slots for ptrs in 64-bit land | |
| 668 reth_rms[TypeFunc::Parms].Insert(OptoReg::add(OptoReg::Name(find_receiver(false)),1)); | |
| 669 #endif | |
| 670 | |
| 671 // Input RegMask array shared by all TailCalls | |
| 672 uint tail_call_edge_cnt = TypeFunc::Parms+2; | |
| 673 RegMask *tail_call_rms = init_input_masks( tail_call_edge_cnt + soe_cnt, _return_addr_mask, c_frame_ptr_mask ); | |
| 674 | |
| 675 // Input RegMask array shared by all TailJumps | |
| 676 uint tail_jump_edge_cnt = TypeFunc::Parms+2; | |
| 677 RegMask *tail_jump_rms = init_input_masks( tail_jump_edge_cnt + soe_cnt, _return_addr_mask, c_frame_ptr_mask ); | |
| 678 | |
| 679 // TailCalls have 2 returned values (target & moop), whose masks come | |
| 680 // from the usual MachNode/MachOper mechanism. Find a sample | |
| 681 // TailCall to extract these masks and put the correct masks into | |
| 682 // the tail_call_rms array. | |
| 683 for( i=1; i < root->req(); i++ ) { | |
| 684 MachReturnNode *m = root->in(i)->as_MachReturn(); | |
| 685 if( m->ideal_Opcode() == Op_TailCall ) { | |
| 686 tail_call_rms[TypeFunc::Parms+0] = m->MachNode::in_RegMask(TypeFunc::Parms+0); | |
| 687 tail_call_rms[TypeFunc::Parms+1] = m->MachNode::in_RegMask(TypeFunc::Parms+1); | |
| 688 break; | |
| 689 } | |
| 690 } | |
| 691 | |
| 692 // TailJumps have 2 returned values (target & ex_oop), whose masks come | |
| 693 // from the usual MachNode/MachOper mechanism. Find a sample | |
| 694 // TailJump to extract these masks and put the correct masks into | |
| 695 // the tail_jump_rms array. | |
| 696 for( i=1; i < root->req(); i++ ) { | |
| 697 MachReturnNode *m = root->in(i)->as_MachReturn(); | |
| 698 if( m->ideal_Opcode() == Op_TailJump ) { | |
| 699 tail_jump_rms[TypeFunc::Parms+0] = m->MachNode::in_RegMask(TypeFunc::Parms+0); | |
| 700 tail_jump_rms[TypeFunc::Parms+1] = m->MachNode::in_RegMask(TypeFunc::Parms+1); | |
| 701 break; | |
| 702 } | |
| 703 } | |
| 704 | |
| 705 // Input RegMask array shared by all Halts | |
| 706 uint halt_edge_cnt = TypeFunc::Parms; | |
| 707 RegMask *halt_rms = init_input_masks( halt_edge_cnt + soe_cnt, _return_addr_mask, c_frame_ptr_mask ); | |
| 708 | |
| 709 // Capture the return input masks into each exit flavor | |
| 710 for( i=1; i < root->req(); i++ ) { | |
| 711 MachReturnNode *exit = root->in(i)->as_MachReturn(); | |
| 712 switch( exit->ideal_Opcode() ) { | |
| 713 case Op_Return : exit->_in_rms = ret_rms; break; | |
| 714 case Op_Rethrow : exit->_in_rms = reth_rms; break; | |
| 715 case Op_TailCall : exit->_in_rms = tail_call_rms; break; | |
| 716 case Op_TailJump : exit->_in_rms = tail_jump_rms; break; | |
| 717 case Op_Halt : exit->_in_rms = halt_rms; break; | |
| 718 default : ShouldNotReachHere(); | |
| 719 } | |
| 720 } | |
| 721 | |
| 722 // Next unused projection number from Start. | |
| 723 int proj_cnt = C->tf()->domain()->cnt(); | |
| 724 | |
| 725 // Do all the save-on-entry registers. Make projections from Start for | |
| 726 // them, and give them a use at the exit points. To the allocator, they | |
| 727 // look like incoming register arguments. | |
| 728 for( i = 0; i < _last_Mach_Reg; i++ ) { | |
| 729 if( is_save_on_entry(i) ) { | |
| 730 | |
| 731 // Add the save-on-entry to the mask array | |
| 732 ret_rms [ ret_edge_cnt] = mreg2regmask[i]; | |
| 733 reth_rms [ reth_edge_cnt] = mreg2regmask[i]; | |
| 734 tail_call_rms[tail_call_edge_cnt] = mreg2regmask[i]; | |
| 735 tail_jump_rms[tail_jump_edge_cnt] = mreg2regmask[i]; | |
| 736 // Halts need the SOE registers, but only in the stack as debug info. | |
| 737 // A just-prior uncommon-trap or deoptimization will use the SOE regs. | |
| 738 halt_rms [ halt_edge_cnt] = *idealreg2spillmask[_register_save_type[i]]; | |
| 739 | |
| 740 Node *mproj; | |
| 741 | |
| 742 // Is this a RegF low half of a RegD? Double up 2 adjacent RegF's | |
| 743 // into a single RegD. | |
| 744 if( (i&1) == 0 && | |
| 745 _register_save_type[i ] == Op_RegF && | |
| 746 _register_save_type[i+1] == Op_RegF && | |
| 747 is_save_on_entry(i+1) ) { | |
| 748 // Add other bit for double | |
| 749 ret_rms [ ret_edge_cnt].Insert(OptoReg::Name(i+1)); | |
| 750 reth_rms [ reth_edge_cnt].Insert(OptoReg::Name(i+1)); | |
| 751 tail_call_rms[tail_call_edge_cnt].Insert(OptoReg::Name(i+1)); | |
| 752 tail_jump_rms[tail_jump_edge_cnt].Insert(OptoReg::Name(i+1)); | |
| 753 halt_rms [ halt_edge_cnt].Insert(OptoReg::Name(i+1)); | |
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754 mproj = new (C) MachProjNode( start, proj_cnt, ret_rms[ret_edge_cnt], Op_RegD ); |
| 0 | 755 proj_cnt += 2; // Skip 2 for doubles |
| 756 } | |
| 757 else if( (i&1) == 1 && // Else check for high half of double | |
| 758 _register_save_type[i-1] == Op_RegF && | |
| 759 _register_save_type[i ] == Op_RegF && | |
| 760 is_save_on_entry(i-1) ) { | |
| 761 ret_rms [ ret_edge_cnt] = RegMask::Empty; | |
| 762 reth_rms [ reth_edge_cnt] = RegMask::Empty; | |
| 763 tail_call_rms[tail_call_edge_cnt] = RegMask::Empty; | |
| 764 tail_jump_rms[tail_jump_edge_cnt] = RegMask::Empty; | |
| 765 halt_rms [ halt_edge_cnt] = RegMask::Empty; | |
| 766 mproj = C->top(); | |
| 767 } | |
| 768 // Is this a RegI low half of a RegL? Double up 2 adjacent RegI's | |
| 769 // into a single RegL. | |
| 770 else if( (i&1) == 0 && | |
| 771 _register_save_type[i ] == Op_RegI && | |
| 772 _register_save_type[i+1] == Op_RegI && | |
| 773 is_save_on_entry(i+1) ) { | |
| 774 // Add other bit for long | |
| 775 ret_rms [ ret_edge_cnt].Insert(OptoReg::Name(i+1)); | |
| 776 reth_rms [ reth_edge_cnt].Insert(OptoReg::Name(i+1)); | |
| 777 tail_call_rms[tail_call_edge_cnt].Insert(OptoReg::Name(i+1)); | |
| 778 tail_jump_rms[tail_jump_edge_cnt].Insert(OptoReg::Name(i+1)); | |
| 779 halt_rms [ halt_edge_cnt].Insert(OptoReg::Name(i+1)); | |
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780 mproj = new (C) MachProjNode( start, proj_cnt, ret_rms[ret_edge_cnt], Op_RegL ); |
| 0 | 781 proj_cnt += 2; // Skip 2 for longs |
| 782 } | |
| 783 else if( (i&1) == 1 && // Else check for high half of long | |
| 784 _register_save_type[i-1] == Op_RegI && | |
| 785 _register_save_type[i ] == Op_RegI && | |
| 786 is_save_on_entry(i-1) ) { | |
| 787 ret_rms [ ret_edge_cnt] = RegMask::Empty; | |
| 788 reth_rms [ reth_edge_cnt] = RegMask::Empty; | |
| 789 tail_call_rms[tail_call_edge_cnt] = RegMask::Empty; | |
| 790 tail_jump_rms[tail_jump_edge_cnt] = RegMask::Empty; | |
| 791 halt_rms [ halt_edge_cnt] = RegMask::Empty; | |
| 792 mproj = C->top(); | |
| 793 } else { | |
| 794 // Make a projection for it off the Start | |
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795 mproj = new (C) MachProjNode( start, proj_cnt++, ret_rms[ret_edge_cnt], _register_save_type[i] ); |
| 0 | 796 } |
| 797 | |
| 798 ret_edge_cnt ++; | |
| 799 reth_edge_cnt ++; | |
| 800 tail_call_edge_cnt ++; | |
| 801 tail_jump_edge_cnt ++; | |
| 802 halt_edge_cnt ++; | |
| 803 | |
| 804 // Add a use of the SOE register to all exit paths | |
| 805 for( uint j=1; j < root->req(); j++ ) | |
| 806 root->in(j)->add_req(mproj); | |
| 807 } // End of if a save-on-entry register | |
| 808 } // End of for all machine registers | |
| 809 } | |
| 810 | |
| 811 //------------------------------init_spill_mask-------------------------------- | |
| 812 void Matcher::init_spill_mask( Node *ret ) { | |
| 813 if( idealreg2regmask[Op_RegI] ) return; // One time only init | |
| 814 | |
| 815 OptoReg::c_frame_pointer = c_frame_pointer(); | |
| 816 c_frame_ptr_mask = c_frame_pointer(); | |
| 817 #ifdef _LP64 | |
| 818 // pointers are twice as big | |
| 819 c_frame_ptr_mask.Insert(OptoReg::add(c_frame_pointer(),1)); | |
| 820 #endif | |
| 821 | |
| 822 // Start at OptoReg::stack0() | |
| 823 STACK_ONLY_mask.Clear(); | |
| 824 OptoReg::Name init = OptoReg::stack2reg(0); | |
| 825 // STACK_ONLY_mask is all stack bits | |
| 826 OptoReg::Name i; | |
| 827 for (i = init; RegMask::can_represent(i); i = OptoReg::add(i,1)) | |
| 828 STACK_ONLY_mask.Insert(i); | |
| 829 // Also set the "infinite stack" bit. | |
| 830 STACK_ONLY_mask.set_AllStack(); | |
| 831 | |
| 832 // Copy the register names over into the shared world | |
| 833 for( i=OptoReg::Name(0); i<OptoReg::Name(_last_Mach_Reg); i = OptoReg::add(i,1) ) { | |
| 834 // SharedInfo::regName[i] = regName[i]; | |
| 835 // Handy RegMasks per machine register | |
| 836 mreg2regmask[i].Insert(i); | |
| 837 } | |
| 838 | |
| 839 // Grab the Frame Pointer | |
| 840 Node *fp = ret->in(TypeFunc::FramePtr); | |
| 841 Node *mem = ret->in(TypeFunc::Memory); | |
| 842 const TypePtr* atp = TypePtr::BOTTOM; | |
| 843 // Share frame pointer while making spill ops | |
| 844 set_shared(fp); | |
| 845 | |
| 846 // Compute generic short-offset Loads | |
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847 #ifdef _LP64 |
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848 MachNode *spillCP = match_tree(new (C) LoadNNode(NULL,mem,fp,atp,TypeInstPtr::BOTTOM,MemNode::unordered)); |
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849 #endif |
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850 MachNode *spillI = match_tree(new (C) LoadINode(NULL,mem,fp,atp,TypeInt::INT,MemNode::unordered)); |
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851 MachNode *spillL = match_tree(new (C) LoadLNode(NULL,mem,fp,atp,TypeLong::LONG,MemNode::unordered,false)); |
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852 MachNode *spillF = match_tree(new (C) LoadFNode(NULL,mem,fp,atp,Type::FLOAT,MemNode::unordered)); |
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853 MachNode *spillD = match_tree(new (C) LoadDNode(NULL,mem,fp,atp,Type::DOUBLE,MemNode::unordered)); |
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854 MachNode *spillP = match_tree(new (C) LoadPNode(NULL,mem,fp,atp,TypeInstPtr::BOTTOM,MemNode::unordered)); |
| 0 | 855 assert(spillI != NULL && spillL != NULL && spillF != NULL && |
| 856 spillD != NULL && spillP != NULL, ""); | |
| 857 // Get the ADLC notion of the right regmask, for each basic type. | |
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858 #ifdef _LP64 |
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859 idealreg2regmask[Op_RegN] = &spillCP->out_RegMask(); |
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860 #endif |
| 0 | 861 idealreg2regmask[Op_RegI] = &spillI->out_RegMask(); |
| 862 idealreg2regmask[Op_RegL] = &spillL->out_RegMask(); | |
| 863 idealreg2regmask[Op_RegF] = &spillF->out_RegMask(); | |
| 864 idealreg2regmask[Op_RegD] = &spillD->out_RegMask(); | |
| 865 idealreg2regmask[Op_RegP] = &spillP->out_RegMask(); | |
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866 |
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867 // Vector regmasks. |
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868 if (Matcher::vector_size_supported(T_BYTE,4)) { |
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869 TypeVect::VECTS = TypeVect::make(T_BYTE, 4); |
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870 MachNode *spillVectS = match_tree(new (C) LoadVectorNode(NULL,mem,fp,atp,TypeVect::VECTS)); |
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871 idealreg2regmask[Op_VecS] = &spillVectS->out_RegMask(); |
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872 } |
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873 if (Matcher::vector_size_supported(T_FLOAT,2)) { |
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874 MachNode *spillVectD = match_tree(new (C) LoadVectorNode(NULL,mem,fp,atp,TypeVect::VECTD)); |
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875 idealreg2regmask[Op_VecD] = &spillVectD->out_RegMask(); |
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876 } |
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877 if (Matcher::vector_size_supported(T_FLOAT,4)) { |
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878 MachNode *spillVectX = match_tree(new (C) LoadVectorNode(NULL,mem,fp,atp,TypeVect::VECTX)); |
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879 idealreg2regmask[Op_VecX] = &spillVectX->out_RegMask(); |
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880 } |
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881 if (Matcher::vector_size_supported(T_FLOAT,8)) { |
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882 MachNode *spillVectY = match_tree(new (C) LoadVectorNode(NULL,mem,fp,atp,TypeVect::VECTY)); |
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883 idealreg2regmask[Op_VecY] = &spillVectY->out_RegMask(); |
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884 } |
| 0 | 885 } |
| 886 | |
| 887 #ifdef ASSERT | |
| 888 static void match_alias_type(Compile* C, Node* n, Node* m) { | |
| 889 if (!VerifyAliases) return; // do not go looking for trouble by default | |
| 890 const TypePtr* nat = n->adr_type(); | |
| 891 const TypePtr* mat = m->adr_type(); | |
| 892 int nidx = C->get_alias_index(nat); | |
| 893 int midx = C->get_alias_index(mat); | |
| 894 // Detune the assert for cases like (AndI 0xFF (LoadB p)). | |
| 895 if (nidx == Compile::AliasIdxTop && midx >= Compile::AliasIdxRaw) { | |
| 896 for (uint i = 1; i < n->req(); i++) { | |
| 897 Node* n1 = n->in(i); | |
| 898 const TypePtr* n1at = n1->adr_type(); | |
| 899 if (n1at != NULL) { | |
| 900 nat = n1at; | |
| 901 nidx = C->get_alias_index(n1at); | |
| 902 } | |
| 903 } | |
| 904 } | |
| 905 // %%% Kludgery. Instead, fix ideal adr_type methods for all these cases: | |
| 906 if (nidx == Compile::AliasIdxTop && midx == Compile::AliasIdxRaw) { | |
| 907 switch (n->Opcode()) { | |
| 908 case Op_PrefetchRead: | |
| 909 case Op_PrefetchWrite: | |
| 3854 | 910 case Op_PrefetchAllocation: |
| 0 | 911 nidx = Compile::AliasIdxRaw; |
| 912 nat = TypeRawPtr::BOTTOM; | |
| 913 break; | |
| 914 } | |
| 915 } | |
| 916 if (nidx == Compile::AliasIdxRaw && midx == Compile::AliasIdxTop) { | |
| 917 switch (n->Opcode()) { | |
| 918 case Op_ClearArray: | |
| 919 midx = Compile::AliasIdxRaw; | |
| 920 mat = TypeRawPtr::BOTTOM; | |
| 921 break; | |
| 922 } | |
| 923 } | |
| 924 if (nidx == Compile::AliasIdxTop && midx == Compile::AliasIdxBot) { | |
| 925 switch (n->Opcode()) { | |
| 926 case Op_Return: | |
| 927 case Op_Rethrow: | |
| 928 case Op_Halt: | |
| 929 case Op_TailCall: | |
| 930 case Op_TailJump: | |
| 931 nidx = Compile::AliasIdxBot; | |
| 932 nat = TypePtr::BOTTOM; | |
| 933 break; | |
| 934 } | |
| 935 } | |
| 936 if (nidx == Compile::AliasIdxBot && midx == Compile::AliasIdxTop) { | |
| 937 switch (n->Opcode()) { | |
| 938 case Op_StrComp: | |
| 681 | 939 case Op_StrEquals: |
| 940 case Op_StrIndexOf: | |
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941 case Op_AryEq: |
| 0 | 942 case Op_MemBarVolatile: |
| 943 case Op_MemBarCPUOrder: // %%% these ideals should have narrower adr_type? | |
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944 case Op_EncodeISOArray: |
| 0 | 945 nidx = Compile::AliasIdxTop; |
| 946 nat = NULL; | |
| 947 break; | |
| 948 } | |
| 949 } | |
| 950 if (nidx != midx) { | |
| 951 if (PrintOpto || (PrintMiscellaneous && (WizardMode || Verbose))) { | |
| 952 tty->print_cr("==== Matcher alias shift %d => %d", nidx, midx); | |
| 953 n->dump(); | |
| 954 m->dump(); | |
| 955 } | |
| 956 assert(C->subsume_loads() && C->must_alias(nat, midx), | |
| 957 "must not lose alias info when matching"); | |
| 958 } | |
| 959 } | |
| 960 #endif | |
| 961 | |
| 962 | |
| 963 //------------------------------MStack----------------------------------------- | |
| 964 // State and MStack class used in xform() and find_shared() iterative methods. | |
| 965 enum Node_State { Pre_Visit, // node has to be pre-visited | |
| 966 Visit, // visit node | |
| 967 Post_Visit, // post-visit node | |
| 968 Alt_Post_Visit // alternative post-visit path | |
| 969 }; | |
| 970 | |
| 971 class MStack: public Node_Stack { | |
| 972 public: | |
| 973 MStack(int size) : Node_Stack(size) { } | |
| 974 | |
| 975 void push(Node *n, Node_State ns) { | |
| 976 Node_Stack::push(n, (uint)ns); | |
| 977 } | |
| 978 void push(Node *n, Node_State ns, Node *parent, int indx) { | |
| 979 ++_inode_top; | |
| 980 if ((_inode_top + 1) >= _inode_max) grow(); | |
| 981 _inode_top->node = parent; | |
| 982 _inode_top->indx = (uint)indx; | |
| 983 ++_inode_top; | |
| 984 _inode_top->node = n; | |
| 985 _inode_top->indx = (uint)ns; | |
| 986 } | |
| 987 Node *parent() { | |
| 988 pop(); | |
| 989 return node(); | |
| 990 } | |
| 991 Node_State state() const { | |
| 992 return (Node_State)index(); | |
| 993 } | |
| 994 void set_state(Node_State ns) { | |
| 995 set_index((uint)ns); | |
| 996 } | |
| 997 }; | |
| 998 | |
| 999 | |
| 1000 //------------------------------xform------------------------------------------ | |
| 1001 // Given a Node in old-space, Match him (Label/Reduce) to produce a machine | |
| 1002 // Node in new-space. Given a new-space Node, recursively walk his children. | |
| 1003 Node *Matcher::transform( Node *n ) { ShouldNotCallThis(); return n; } | |
| 1004 Node *Matcher::xform( Node *n, int max_stack ) { | |
| 1005 // Use one stack to keep both: child's node/state and parent's node/index | |
| 1006 MStack mstack(max_stack * 2 * 2); // C->unique() * 2 * 2 | |
| 1007 mstack.push(n, Visit, NULL, -1); // set NULL as parent to indicate root | |
| 1008 | |
| 1009 while (mstack.is_nonempty()) { | |
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1010 C->check_node_count(NodeLimitFudgeFactor, "too many nodes matching instructions"); |
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1011 if (C->failing()) return NULL; |
| 0 | 1012 n = mstack.node(); // Leave node on stack |
| 1013 Node_State nstate = mstack.state(); | |
| 1014 if (nstate == Visit) { | |
| 1015 mstack.set_state(Post_Visit); | |
| 1016 Node *oldn = n; | |
| 1017 // Old-space or new-space check | |
| 1018 if (!C->node_arena()->contains(n)) { | |
| 1019 // Old space! | |
| 1020 Node* m; | |
| 1021 if (has_new_node(n)) { // Not yet Label/Reduced | |
| 1022 m = new_node(n); | |
| 1023 } else { | |
| 1024 if (!is_dontcare(n)) { // Matcher can match this guy | |
| 1025 // Calls match special. They match alone with no children. | |
| 1026 // Their children, the incoming arguments, match normally. | |
| 1027 m = n->is_SafePoint() ? match_sfpt(n->as_SafePoint()):match_tree(n); | |
| 1028 if (C->failing()) return NULL; | |
| 1029 if (m == NULL) { Matcher::soft_match_failure(); return NULL; } | |
| 1030 } else { // Nothing the matcher cares about | |
| 1031 if( n->is_Proj() && n->in(0)->is_Multi()) { // Projections? | |
| 1032 // Convert to machine-dependent projection | |
| 1033 m = n->in(0)->as_Multi()->match( n->as_Proj(), this ); | |
| 222 | 1034 #ifdef ASSERT |
| 1035 _new2old_map.map(m->_idx, n); | |
| 1036 #endif | |
| 0 | 1037 if (m->in(0) != NULL) // m might be top |
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1038 collect_null_checks(m, n); |
| 0 | 1039 } else { // Else just a regular 'ol guy |
| 1040 m = n->clone(); // So just clone into new-space | |
| 222 | 1041 #ifdef ASSERT |
| 1042 _new2old_map.map(m->_idx, n); | |
| 1043 #endif | |
| 0 | 1044 // Def-Use edges will be added incrementally as Uses |
| 1045 // of this node are matched. | |
| 1046 assert(m->outcnt() == 0, "no Uses of this clone yet"); | |
| 1047 } | |
| 1048 } | |
| 1049 | |
| 1050 set_new_node(n, m); // Map old to new | |
| 1051 if (_old_node_note_array != NULL) { | |
| 1052 Node_Notes* nn = C->locate_node_notes(_old_node_note_array, | |
| 1053 n->_idx); | |
| 1054 C->set_node_notes_at(m->_idx, nn); | |
| 1055 } | |
| 1056 debug_only(match_alias_type(C, n, m)); | |
| 1057 } | |
| 1058 n = m; // n is now a new-space node | |
| 1059 mstack.set_node(n); | |
| 1060 } | |
| 1061 | |
| 1062 // New space! | |
| 1063 if (_visited.test_set(n->_idx)) continue; // while(mstack.is_nonempty()) | |
| 1064 | |
| 1065 int i; | |
| 1066 // Put precedence edges on stack first (match them last). | |
| 1067 for (i = oldn->req(); (uint)i < oldn->len(); i++) { | |
| 1068 Node *m = oldn->in(i); | |
| 1069 if (m == NULL) break; | |
| 1070 // set -1 to call add_prec() instead of set_req() during Step1 | |
| 1071 mstack.push(m, Visit, n, -1); | |
| 1072 } | |
| 1073 | |
| 1074 // For constant debug info, I'd rather have unmatched constants. | |
| 1075 int cnt = n->req(); | |
| 1076 JVMState* jvms = n->jvms(); | |
| 1077 int debug_cnt = jvms ? jvms->debug_start() : cnt; | |
| 1078 | |
| 1079 // Now do only debug info. Clone constants rather than matching. | |
| 1080 // Constants are represented directly in the debug info without | |
| 1081 // the need for executable machine instructions. | |
| 1082 // Monitor boxes are also represented directly. | |
| 1083 for (i = cnt - 1; i >= debug_cnt; --i) { // For all debug inputs do | |
| 1084 Node *m = n->in(i); // Get input | |
| 1085 int op = m->Opcode(); | |
| 1086 assert((op == Op_BoxLock) == jvms->is_monitor_use(i), "boxes only at monitor sites"); | |
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1087 if( op == Op_ConI || op == Op_ConP || op == Op_ConN || op == Op_ConNKlass || |
| 0 | 1088 op == Op_ConF || op == Op_ConD || op == Op_ConL |
| 1089 // || op == Op_BoxLock // %%%% enable this and remove (+++) in chaitin.cpp | |
| 1090 ) { | |
| 1091 m = m->clone(); | |
| 222 | 1092 #ifdef ASSERT |
| 1093 _new2old_map.map(m->_idx, n); | |
| 1094 #endif | |
| 605 | 1095 mstack.push(m, Post_Visit, n, i); // Don't need to visit |
| 0 | 1096 mstack.push(m->in(0), Visit, m, 0); |
| 1097 } else { | |
| 1098 mstack.push(m, Visit, n, i); | |
| 1099 } | |
| 1100 } | |
| 1101 | |
| 1102 // And now walk his children, and convert his inputs to new-space. | |
| 1103 for( ; i >= 0; --i ) { // For all normal inputs do | |
| 1104 Node *m = n->in(i); // Get input | |
| 1105 if(m != NULL) | |
| 1106 mstack.push(m, Visit, n, i); | |
| 1107 } | |
| 1108 | |
| 1109 } | |
| 1110 else if (nstate == Post_Visit) { | |
| 1111 // Set xformed input | |
| 1112 Node *p = mstack.parent(); | |
| 1113 if (p != NULL) { // root doesn't have parent | |
| 1114 int i = (int)mstack.index(); | |
| 1115 if (i >= 0) | |
| 1116 p->set_req(i, n); // required input | |
| 1117 else if (i == -1) | |
| 1118 p->add_prec(n); // precedence input | |
| 1119 else | |
| 1120 ShouldNotReachHere(); | |
| 1121 } | |
| 1122 mstack.pop(); // remove processed node from stack | |
| 1123 } | |
| 1124 else { | |
| 1125 ShouldNotReachHere(); | |
| 1126 } | |
| 1127 } // while (mstack.is_nonempty()) | |
| 1128 return n; // Return new-space Node | |
| 1129 } | |
| 1130 | |
| 1131 //------------------------------warp_outgoing_stk_arg------------------------ | |
| 1132 OptoReg::Name Matcher::warp_outgoing_stk_arg( VMReg reg, OptoReg::Name begin_out_arg_area, OptoReg::Name &out_arg_limit_per_call ) { | |
| 1133 // Convert outgoing argument location to a pre-biased stack offset | |
| 1134 if (reg->is_stack()) { | |
| 1135 OptoReg::Name warped = reg->reg2stack(); | |
| 1136 // Adjust the stack slot offset to be the register number used | |
| 1137 // by the allocator. | |
| 1138 warped = OptoReg::add(begin_out_arg_area, warped); | |
| 1139 // Keep track of the largest numbered stack slot used for an arg. | |
| 1140 // Largest used slot per call-site indicates the amount of stack | |
| 1141 // that is killed by the call. | |
| 1142 if( warped >= out_arg_limit_per_call ) | |
| 1143 out_arg_limit_per_call = OptoReg::add(warped,1); | |
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1144 if (!RegMask::can_represent_arg(warped)) { |
| 0 | 1145 C->record_method_not_compilable_all_tiers("unsupported calling sequence"); |
| 1146 return OptoReg::Bad; | |
| 1147 } | |
| 1148 return warped; | |
| 1149 } | |
| 1150 return OptoReg::as_OptoReg(reg); | |
| 1151 } | |
| 1152 | |
| 1153 | |
| 1154 //------------------------------match_sfpt------------------------------------- | |
| 1155 // Helper function to match call instructions. Calls match special. | |
| 1156 // They match alone with no children. Their children, the incoming | |
| 1157 // arguments, match normally. | |
| 1158 MachNode *Matcher::match_sfpt( SafePointNode *sfpt ) { | |
| 1159 MachSafePointNode *msfpt = NULL; | |
| 1160 MachCallNode *mcall = NULL; | |
| 1161 uint cnt; | |
| 1162 // Split out case for SafePoint vs Call | |
| 1163 CallNode *call; | |
| 1164 const TypeTuple *domain; | |
| 1165 ciMethod* method = NULL; | |
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1166 bool is_method_handle_invoke = false; // for special kill effects |
| 0 | 1167 if( sfpt->is_Call() ) { |
| 1168 call = sfpt->as_Call(); | |
| 1169 domain = call->tf()->domain(); | |
| 1170 cnt = domain->cnt(); | |
| 1171 | |
| 1172 // Match just the call, nothing else | |
| 1173 MachNode *m = match_tree(call); | |
| 1174 if (C->failing()) return NULL; | |
| 1175 if( m == NULL ) { Matcher::soft_match_failure(); return NULL; } | |
| 1176 | |
| 1177 // Copy data from the Ideal SafePoint to the machine version | |
| 1178 mcall = m->as_MachCall(); | |
| 1179 | |
| 1180 mcall->set_tf( call->tf()); | |
| 1181 mcall->set_entry_point(call->entry_point()); | |
| 1182 mcall->set_cnt( call->cnt()); | |
| 1183 | |
| 1184 if( mcall->is_MachCallJava() ) { | |
| 1185 MachCallJavaNode *mcall_java = mcall->as_MachCallJava(); | |
| 1186 const CallJavaNode *call_java = call->as_CallJava(); | |
| 1187 method = call_java->method(); | |
| 1188 mcall_java->_method = method; | |
| 1189 mcall_java->_bci = call_java->_bci; | |
| 1190 mcall_java->_optimized_virtual = call_java->is_optimized_virtual(); | |
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1191 is_method_handle_invoke = call_java->is_method_handle_invoke(); |
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1192 mcall_java->_method_handle_invoke = is_method_handle_invoke; |
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1193 if (is_method_handle_invoke) { |
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1194 C->set_has_method_handle_invokes(true); |
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1195 } |
| 0 | 1196 if( mcall_java->is_MachCallStaticJava() ) |
| 1197 mcall_java->as_MachCallStaticJava()->_name = | |
| 1198 call_java->as_CallStaticJava()->_name; | |
| 1199 if( mcall_java->is_MachCallDynamicJava() ) | |
| 1200 mcall_java->as_MachCallDynamicJava()->_vtable_index = | |
| 1201 call_java->as_CallDynamicJava()->_vtable_index; | |
| 1202 } | |
| 1203 else if( mcall->is_MachCallRuntime() ) { | |
| 1204 mcall->as_MachCallRuntime()->_name = call->as_CallRuntime()->_name; | |
| 1205 } | |
| 1206 msfpt = mcall; | |
| 1207 } | |
| 1208 // This is a non-call safepoint | |
| 1209 else { | |
| 1210 call = NULL; | |
| 1211 domain = NULL; | |
| 1212 MachNode *mn = match_tree(sfpt); | |
| 1213 if (C->failing()) return NULL; | |
| 1214 msfpt = mn->as_MachSafePoint(); | |
| 1215 cnt = TypeFunc::Parms; | |
| 1216 } | |
| 1217 | |
| 1218 // Advertise the correct memory effects (for anti-dependence computation). | |
| 1219 msfpt->set_adr_type(sfpt->adr_type()); | |
| 1220 | |
| 1221 // Allocate a private array of RegMasks. These RegMasks are not shared. | |
| 1222 msfpt->_in_rms = NEW_RESOURCE_ARRAY( RegMask, cnt ); | |
| 1223 // Empty them all. | |
| 1224 memset( msfpt->_in_rms, 0, sizeof(RegMask)*cnt ); | |
| 1225 | |
| 1226 // Do all the pre-defined non-Empty register masks | |
| 1227 msfpt->_in_rms[TypeFunc::ReturnAdr] = _return_addr_mask; | |
| 1228 msfpt->_in_rms[TypeFunc::FramePtr ] = c_frame_ptr_mask; | |
| 1229 | |
| 1230 // Place first outgoing argument can possibly be put. | |
| 1231 OptoReg::Name begin_out_arg_area = OptoReg::add(_new_SP, C->out_preserve_stack_slots()); | |
| 1232 assert( is_even(begin_out_arg_area), "" ); | |
| 1233 // Compute max outgoing register number per call site. | |
| 1234 OptoReg::Name out_arg_limit_per_call = begin_out_arg_area; | |
| 1235 // Calls to C may hammer extra stack slots above and beyond any arguments. | |
| 1236 // These are usually backing store for register arguments for varargs. | |
| 1237 if( call != NULL && call->is_CallRuntime() ) | |
| 1238 out_arg_limit_per_call = OptoReg::add(out_arg_limit_per_call,C->varargs_C_out_slots_killed()); | |
| 1239 | |
| 1240 | |
| 1241 // Do the normal argument list (parameters) register masks | |
| 1242 int argcnt = cnt - TypeFunc::Parms; | |
| 1243 if( argcnt > 0 ) { // Skip it all if we have no args | |
| 1244 BasicType *sig_bt = NEW_RESOURCE_ARRAY( BasicType, argcnt ); | |
| 1245 VMRegPair *parm_regs = NEW_RESOURCE_ARRAY( VMRegPair, argcnt ); | |
| 1246 int i; | |
| 1247 for( i = 0; i < argcnt; i++ ) { | |
| 1248 sig_bt[i] = domain->field_at(i+TypeFunc::Parms)->basic_type(); | |
| 1249 } | |
| 1250 // V-call to pick proper calling convention | |
| 1251 call->calling_convention( sig_bt, parm_regs, argcnt ); | |
| 1252 | |
| 1253 #ifdef ASSERT | |
| 1254 // Sanity check users' calling convention. Really handy during | |
| 1255 // the initial porting effort. Fairly expensive otherwise. | |
| 1256 { for (int i = 0; i<argcnt; i++) { | |
| 1257 if( !parm_regs[i].first()->is_valid() && | |
| 1258 !parm_regs[i].second()->is_valid() ) continue; | |
| 1259 VMReg reg1 = parm_regs[i].first(); | |
| 1260 VMReg reg2 = parm_regs[i].second(); | |
| 1261 for (int j = 0; j < i; j++) { | |
| 1262 if( !parm_regs[j].first()->is_valid() && | |
| 1263 !parm_regs[j].second()->is_valid() ) continue; | |
| 1264 VMReg reg3 = parm_regs[j].first(); | |
| 1265 VMReg reg4 = parm_regs[j].second(); | |
| 1266 if( !reg1->is_valid() ) { | |
| 1267 assert( !reg2->is_valid(), "valid halvsies" ); | |
| 1268 } else if( !reg3->is_valid() ) { | |
| 1269 assert( !reg4->is_valid(), "valid halvsies" ); | |
| 1270 } else { | |
| 1271 assert( reg1 != reg2, "calling conv. must produce distinct regs"); | |
| 1272 assert( reg1 != reg3, "calling conv. must produce distinct regs"); | |
| 1273 assert( reg1 != reg4, "calling conv. must produce distinct regs"); | |
| 1274 assert( reg2 != reg3, "calling conv. must produce distinct regs"); | |
| 1275 assert( reg2 != reg4 || !reg2->is_valid(), "calling conv. must produce distinct regs"); | |
| 1276 assert( reg3 != reg4, "calling conv. must produce distinct regs"); | |
| 1277 } | |
| 1278 } | |
| 1279 } | |
| 1280 } | |
| 1281 #endif | |
| 1282 | |
| 1283 // Visit each argument. Compute its outgoing register mask. | |
| 1284 // Return results now can have 2 bits returned. | |
| 1285 // Compute max over all outgoing arguments both per call-site | |
| 1286 // and over the entire method. | |
| 1287 for( i = 0; i < argcnt; i++ ) { | |
| 1288 // Address of incoming argument mask to fill in | |
| 1289 RegMask *rm = &mcall->_in_rms[i+TypeFunc::Parms]; | |
| 1290 if( !parm_regs[i].first()->is_valid() && | |
| 1291 !parm_regs[i].second()->is_valid() ) { | |
| 1292 continue; // Avoid Halves | |
| 1293 } | |
| 1294 // Grab first register, adjust stack slots and insert in mask. | |
| 1295 OptoReg::Name reg1 = warp_outgoing_stk_arg(parm_regs[i].first(), begin_out_arg_area, out_arg_limit_per_call ); | |
| 1296 if (OptoReg::is_valid(reg1)) | |
| 1297 rm->Insert( reg1 ); | |
| 1298 // Grab second register (if any), adjust stack slots and insert in mask. | |
| 1299 OptoReg::Name reg2 = warp_outgoing_stk_arg(parm_regs[i].second(), begin_out_arg_area, out_arg_limit_per_call ); | |
| 1300 if (OptoReg::is_valid(reg2)) | |
| 1301 rm->Insert( reg2 ); | |
| 1302 } // End of for all arguments | |
| 1303 | |
| 1304 // Compute number of stack slots needed to restore stack in case of | |
| 1305 // Pascal-style argument popping. | |
| 1306 mcall->_argsize = out_arg_limit_per_call - begin_out_arg_area; | |
| 1307 } | |
| 1308 | |
| 1309 // Compute the max stack slot killed by any call. These will not be | |
| 1310 // available for debug info, and will be used to adjust FIRST_STACK_mask | |
| 1311 // after all call sites have been visited. | |
| 1312 if( _out_arg_limit < out_arg_limit_per_call) | |
| 1313 _out_arg_limit = out_arg_limit_per_call; | |
| 1314 | |
| 1315 if (mcall) { | |
| 1316 // Kill the outgoing argument area, including any non-argument holes and | |
| 1317 // any legacy C-killed slots. Use Fat-Projections to do the killing. | |
| 1318 // Since the max-per-method covers the max-per-call-site and debug info | |
| 1319 // is excluded on the max-per-method basis, debug info cannot land in | |
| 1320 // this killed area. | |
| 1321 uint r_cnt = mcall->tf()->range()->cnt(); | |
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1322 MachProjNode *proj = new (C) MachProjNode( mcall, r_cnt+10000, RegMask::Empty, MachProjNode::fat_proj ); |
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1323 if (!RegMask::can_represent_arg(OptoReg::Name(out_arg_limit_per_call-1))) { |
| 0 | 1324 C->record_method_not_compilable_all_tiers("unsupported outgoing calling sequence"); |
| 1325 } else { | |
| 1326 for (int i = begin_out_arg_area; i < out_arg_limit_per_call; i++) | |
| 1327 proj->_rout.Insert(OptoReg::Name(i)); | |
| 1328 } | |
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1329 if (proj->_rout.is_NotEmpty()) { |
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1330 push_projection(proj); |
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1331 } |
| 0 | 1332 } |
| 1333 // Transfer the safepoint information from the call to the mcall | |
| 1334 // Move the JVMState list | |
| 1335 msfpt->set_jvms(sfpt->jvms()); | |
| 1336 for (JVMState* jvms = msfpt->jvms(); jvms; jvms = jvms->caller()) { | |
| 1337 jvms->set_map(sfpt); | |
| 1338 } | |
| 1339 | |
| 1340 // Debug inputs begin just after the last incoming parameter | |
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1341 assert((mcall == NULL) || (mcall->jvms() == NULL) || |
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1342 (mcall->jvms()->debug_start() + mcall->_jvmadj == mcall->tf()->domain()->cnt()), ""); |
| 0 | 1343 |
| 1344 // Move the OopMap | |
| 1345 msfpt->_oop_map = sfpt->_oop_map; | |
| 1346 | |
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1347 // Add additional edges. |
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1348 if (msfpt->mach_constant_base_node_input() != (uint)-1 && !msfpt->is_MachCallLeaf()) { |
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1349 // For these calls we can not add MachConstantBase in expand(), as the |
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1350 // ins are not complete then. |
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1351 msfpt->ins_req(msfpt->mach_constant_base_node_input(), C->mach_constant_base_node()); |
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1352 if (msfpt->jvms() && |
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1353 msfpt->mach_constant_base_node_input() <= msfpt->jvms()->debug_start() + msfpt->_jvmadj) { |
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1354 // We added an edge before jvms, so we must adapt the position of the ins. |
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1355 msfpt->jvms()->adapt_position(+1); |
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1356 } |
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1357 } |
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1358 |
| 0 | 1359 // Registers killed by the call are set in the local scheduling pass |
| 1360 // of Global Code Motion. | |
| 1361 return msfpt; | |
| 1362 } | |
| 1363 | |
| 1364 //---------------------------match_tree---------------------------------------- | |
| 1365 // Match a Ideal Node DAG - turn it into a tree; Label & Reduce. Used as part | |
| 1366 // of the whole-sale conversion from Ideal to Mach Nodes. Also used for | |
| 1367 // making GotoNodes while building the CFG and in init_spill_mask() to identify | |
| 1368 // a Load's result RegMask for memoization in idealreg2regmask[] | |
| 1369 MachNode *Matcher::match_tree( const Node *n ) { | |
| 1370 assert( n->Opcode() != Op_Phi, "cannot match" ); | |
| 1371 assert( !n->is_block_start(), "cannot match" ); | |
| 1372 // Set the mark for all locally allocated State objects. | |
| 1373 // When this call returns, the _states_arena arena will be reset | |
| 1374 // freeing all State objects. | |
| 1375 ResourceMark rm( &_states_arena ); | |
| 1376 | |
| 1377 LabelRootDepth = 0; | |
| 1378 | |
| 1379 // StoreNodes require their Memory input to match any LoadNodes | |
| 1380 Node *mem = n->is_Store() ? n->in(MemNode::Memory) : (Node*)1 ; | |
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1381 #ifdef ASSERT |
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1382 Node* save_mem_node = _mem_node; |
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1383 _mem_node = n->is_Store() ? (Node*)n : NULL; |
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1384 #endif |
| 0 | 1385 // State object for root node of match tree |
| 1386 // Allocate it on _states_arena - stack allocation can cause stack overflow. | |
| 1387 State *s = new (&_states_arena) State; | |
| 1388 s->_kids[0] = NULL; | |
| 1389 s->_kids[1] = NULL; | |
| 1390 s->_leaf = (Node*)n; | |
| 1391 // Label the input tree, allocating labels from top-level arena | |
| 1392 Label_Root( n, s, n->in(0), mem ); | |
| 1393 if (C->failing()) return NULL; | |
| 1394 | |
| 1395 // The minimum cost match for the whole tree is found at the root State | |
| 1396 uint mincost = max_juint; | |
| 1397 uint cost = max_juint; | |
| 1398 uint i; | |
| 1399 for( i = 0; i < NUM_OPERANDS; i++ ) { | |
| 1400 if( s->valid(i) && // valid entry and | |
| 1401 s->_cost[i] < cost && // low cost and | |
| 1402 s->_rule[i] >= NUM_OPERANDS ) // not an operand | |
| 1403 cost = s->_cost[mincost=i]; | |
| 1404 } | |
| 1405 if (mincost == max_juint) { | |
| 1406 #ifndef PRODUCT | |
| 1407 tty->print("No matching rule for:"); | |
| 1408 s->dump(); | |
| 1409 #endif | |
| 1410 Matcher::soft_match_failure(); | |
| 1411 return NULL; | |
| 1412 } | |
| 1413 // Reduce input tree based upon the state labels to machine Nodes | |
| 1414 MachNode *m = ReduceInst( s, s->_rule[mincost], mem ); | |
| 1415 #ifdef ASSERT | |
| 1416 _old2new_map.map(n->_idx, m); | |
| 222 | 1417 _new2old_map.map(m->_idx, (Node*)n); |
| 0 | 1418 #endif |
| 1419 | |
| 1420 // Add any Matcher-ignored edges | |
| 1421 uint cnt = n->req(); | |
| 1422 uint start = 1; | |
| 1423 if( mem != (Node*)1 ) start = MemNode::Memory+1; | |
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1424 if( n->is_AddP() ) { |
| 0 | 1425 assert( mem == (Node*)1, "" ); |
| 1426 start = AddPNode::Base+1; | |
| 1427 } | |
| 1428 for( i = start; i < cnt; i++ ) { | |
| 1429 if( !n->match_edge(i) ) { | |
| 1430 if( i < m->req() ) | |
| 1431 m->ins_req( i, n->in(i) ); | |
| 1432 else | |
| 1433 m->add_req( n->in(i) ); | |
| 1434 } | |
| 1435 } | |
| 1436 | |
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1437 debug_only( _mem_node = save_mem_node; ) |
| 0 | 1438 return m; |
| 1439 } | |
| 1440 | |
| 1441 | |
| 1442 //------------------------------match_into_reg--------------------------------- | |
| 1443 // Choose to either match this Node in a register or part of the current | |
| 1444 // match tree. Return true for requiring a register and false for matching | |
| 1445 // as part of the current match tree. | |
| 1446 static bool match_into_reg( const Node *n, Node *m, Node *control, int i, bool shared ) { | |
| 1447 | |
| 1448 const Type *t = m->bottom_type(); | |
| 1449 | |
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1450 if (t->singleton()) { |
| 0 | 1451 // Never force constants into registers. Allow them to match as |
| 1452 // constants or registers. Copies of the same value will share | |
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1453 // the same register. See find_shared_node. |
| 0 | 1454 return false; |
| 1455 } else { // Not a constant | |
| 1456 // Stop recursion if they have different Controls. | |
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1457 Node* m_control = m->in(0); |
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1458 // Control of load's memory can post-dominates load's control. |
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1459 // So use it since load can't float above its memory. |
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1460 Node* mem_control = (m->is_Load()) ? m->in(MemNode::Memory)->in(0) : NULL; |
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1461 if (control && m_control && control != m_control && control != mem_control) { |
| 0 | 1462 |
| 1463 // Actually, we can live with the most conservative control we | |
| 1464 // find, if it post-dominates the others. This allows us to | |
| 1465 // pick up load/op/store trees where the load can float a little | |
| 1466 // above the store. | |
| 1467 Node *x = control; | |
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1468 const uint max_scan = 6; // Arbitrary scan cutoff |
| 0 | 1469 uint j; |
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1470 for (j=0; j<max_scan; j++) { |
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1471 if (x->is_Region()) // Bail out at merge points |
| 0 | 1472 return true; |
| 1473 x = x->in(0); | |
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1474 if (x == m_control) // Does 'control' post-dominate |
| 0 | 1475 break; // m->in(0)? If so, we can use it |
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1476 if (x == mem_control) // Does 'control' post-dominate |
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1477 break; // mem_control? If so, we can use it |
| 0 | 1478 } |
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1479 if (j == max_scan) // No post-domination before scan end? |
| 0 | 1480 return true; // Then break the match tree up |
| 1481 } | |
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1482 if ((m->is_DecodeN() && Matcher::narrow_oop_use_complex_address()) || |
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1483 (m->is_DecodeNKlass() && Matcher::narrow_klass_use_complex_address())) { |
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1484 // These are commonly used in address expressions and can |
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1485 // efficiently fold into them on X64 in some cases. |
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1486 return false; |
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1487 } |
| 0 | 1488 } |
| 1489 | |
| 605 | 1490 // Not forceable cloning. If shared, put it into a register. |
| 0 | 1491 return shared; |
| 1492 } | |
| 1493 | |
| 1494 | |
| 1495 //------------------------------Instruction Selection-------------------------- | |
| 1496 // Label method walks a "tree" of nodes, using the ADLC generated DFA to match | |
| 1497 // ideal nodes to machine instructions. Trees are delimited by shared Nodes, | |
| 1498 // things the Matcher does not match (e.g., Memory), and things with different | |
| 1499 // Controls (hence forced into different blocks). We pass in the Control | |
| 1500 // selected for this entire State tree. | |
| 1501 | |
| 1502 // The Matcher works on Trees, but an Intel add-to-memory requires a DAG: the | |
| 1503 // Store and the Load must have identical Memories (as well as identical | |
| 1504 // pointers). Since the Matcher does not have anything for Memory (and | |
| 1505 // does not handle DAGs), I have to match the Memory input myself. If the | |
| 1506 // Tree root is a Store, I require all Loads to have the identical memory. | |
| 1507 Node *Matcher::Label_Root( const Node *n, State *svec, Node *control, const Node *mem){ | |
| 1508 // Since Label_Root is a recursive function, its possible that we might run | |
| 1509 // out of stack space. See bugs 6272980 & 6227033 for more info. | |
| 1510 LabelRootDepth++; | |
| 1511 if (LabelRootDepth > MaxLabelRootDepth) { | |
| 1512 C->record_method_not_compilable_all_tiers("Out of stack space, increase MaxLabelRootDepth"); | |
| 1513 return NULL; | |
| 1514 } | |
| 1515 uint care = 0; // Edges matcher cares about | |
| 1516 uint cnt = n->req(); | |
| 1517 uint i = 0; | |
| 1518 | |
| 1519 // Examine children for memory state | |
| 1520 // Can only subsume a child into your match-tree if that child's memory state | |
| 1521 // is not modified along the path to another input. | |
| 1522 // It is unsafe even if the other inputs are separate roots. | |
| 1523 Node *input_mem = NULL; | |
| 1524 for( i = 1; i < cnt; i++ ) { | |
| 1525 if( !n->match_edge(i) ) continue; | |
| 1526 Node *m = n->in(i); // Get ith input | |
| 1527 assert( m, "expect non-null children" ); | |
| 1528 if( m->is_Load() ) { | |
| 1529 if( input_mem == NULL ) { | |
| 1530 input_mem = m->in(MemNode::Memory); | |
| 1531 } else if( input_mem != m->in(MemNode::Memory) ) { | |
| 1532 input_mem = NodeSentinel; | |
| 1533 } | |
| 1534 } | |
| 1535 } | |
| 1536 | |
| 1537 for( i = 1; i < cnt; i++ ){// For my children | |
| 1538 if( !n->match_edge(i) ) continue; | |
| 1539 Node *m = n->in(i); // Get ith input | |
| 1540 // Allocate states out of a private arena | |
| 1541 State *s = new (&_states_arena) State; | |
| 1542 svec->_kids[care++] = s; | |
| 1543 assert( care <= 2, "binary only for now" ); | |
| 1544 | |
| 1545 // Recursively label the State tree. | |
| 1546 s->_kids[0] = NULL; | |
| 1547 s->_kids[1] = NULL; | |
| 1548 s->_leaf = m; | |
| 1549 | |
| 1550 // Check for leaves of the State Tree; things that cannot be a part of | |
| 1551 // the current tree. If it finds any, that value is matched as a | |
| 1552 // register operand. If not, then the normal matching is used. | |
| 1553 if( match_into_reg(n, m, control, i, is_shared(m)) || | |
| 1554 // | |
| 1555 // Stop recursion if this is LoadNode and the root of this tree is a | |
| 1556 // StoreNode and the load & store have different memories. | |
| 1557 ((mem!=(Node*)1) && m->is_Load() && m->in(MemNode::Memory) != mem) || | |
| 1558 // Can NOT include the match of a subtree when its memory state | |
| 1559 // is used by any of the other subtrees | |
| 1560 (input_mem == NodeSentinel) ) { | |
| 1561 #ifndef PRODUCT | |
| 1562 // Print when we exclude matching due to different memory states at input-loads | |
| 1563 if( PrintOpto && (Verbose && WizardMode) && (input_mem == NodeSentinel) | |
| 1564 && !((mem!=(Node*)1) && m->is_Load() && m->in(MemNode::Memory) != mem) ) { | |
| 1565 tty->print_cr("invalid input_mem"); | |
| 1566 } | |
| 1567 #endif | |
| 1568 // Switch to a register-only opcode; this value must be in a register | |
| 1569 // and cannot be subsumed as part of a larger instruction. | |
| 1570 s->DFA( m->ideal_reg(), m ); | |
| 1571 | |
| 1572 } else { | |
| 1573 // If match tree has no control and we do, adopt it for entire tree | |
| 1574 if( control == NULL && m->in(0) != NULL && m->req() > 1 ) | |
| 1575 control = m->in(0); // Pick up control | |
| 1576 // Else match as a normal part of the match tree. | |
| 1577 control = Label_Root(m,s,control,mem); | |
| 1578 if (C->failing()) return NULL; | |
| 1579 } | |
| 1580 } | |
| 1581 | |
| 1582 | |
| 1583 // Call DFA to match this node, and return | |
| 1584 svec->DFA( n->Opcode(), n ); | |
| 1585 | |
| 1586 #ifdef ASSERT | |
| 1587 uint x; | |
| 1588 for( x = 0; x < _LAST_MACH_OPER; x++ ) | |
| 1589 if( svec->valid(x) ) | |
| 1590 break; | |
| 1591 | |
| 1592 if (x >= _LAST_MACH_OPER) { | |
| 1593 n->dump(); | |
| 1594 svec->dump(); | |
| 1595 assert( false, "bad AD file" ); | |
| 1596 } | |
| 1597 #endif | |
| 1598 return control; | |
| 1599 } | |
| 1600 | |
| 1601 | |
| 1602 // Con nodes reduced using the same rule can share their MachNode | |
| 1603 // which reduces the number of copies of a constant in the final | |
| 1604 // program. The register allocator is free to split uses later to | |
| 1605 // split live ranges. | |
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1606 MachNode* Matcher::find_shared_node(Node* leaf, uint rule) { |
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1607 if (!leaf->is_Con() && !leaf->is_DecodeNarrowPtr()) return NULL; |
| 0 | 1608 |
| 1609 // See if this Con has already been reduced using this rule. | |
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1610 if (_shared_nodes.Size() <= leaf->_idx) return NULL; |
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1611 MachNode* last = (MachNode*)_shared_nodes.at(leaf->_idx); |
| 0 | 1612 if (last != NULL && rule == last->rule()) { |
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1613 // Don't expect control change for DecodeN |
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1614 if (leaf->is_DecodeNarrowPtr()) |
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1615 return last; |
| 0 | 1616 // Get the new space root. |
| 1617 Node* xroot = new_node(C->root()); | |
| 1618 if (xroot == NULL) { | |
| 1619 // This shouldn't happen give the order of matching. | |
| 1620 return NULL; | |
| 1621 } | |
| 1622 | |
| 1623 // Shared constants need to have their control be root so they | |
| 1624 // can be scheduled properly. | |
| 1625 Node* control = last->in(0); | |
| 1626 if (control != xroot) { | |
| 1627 if (control == NULL || control == C->root()) { | |
| 1628 last->set_req(0, xroot); | |
| 1629 } else { | |
| 1630 assert(false, "unexpected control"); | |
| 1631 return NULL; | |
| 1632 } | |
| 1633 } | |
| 1634 return last; | |
| 1635 } | |
| 1636 return NULL; | |
| 1637 } | |
| 1638 | |
| 1639 | |
| 1640 //------------------------------ReduceInst------------------------------------- | |
| 1641 // Reduce a State tree (with given Control) into a tree of MachNodes. | |
| 1642 // This routine (and it's cohort ReduceOper) convert Ideal Nodes into | |
| 1643 // complicated machine Nodes. Each MachNode covers some tree of Ideal Nodes. | |
| 1644 // Each MachNode has a number of complicated MachOper operands; each | |
| 1645 // MachOper also covers a further tree of Ideal Nodes. | |
| 1646 | |
| 1647 // The root of the Ideal match tree is always an instruction, so we enter | |
| 1648 // the recursion here. After building the MachNode, we need to recurse | |
| 1649 // the tree checking for these cases: | |
| 1650 // (1) Child is an instruction - | |
| 1651 // Build the instruction (recursively), add it as an edge. | |
| 1652 // Build a simple operand (register) to hold the result of the instruction. | |
| 1653 // (2) Child is an interior part of an instruction - | |
| 1654 // Skip over it (do nothing) | |
| 1655 // (3) Child is the start of a operand - | |
| 1656 // Build the operand, place it inside the instruction | |
| 1657 // Call ReduceOper. | |
| 1658 MachNode *Matcher::ReduceInst( State *s, int rule, Node *&mem ) { | |
| 1659 assert( rule >= NUM_OPERANDS, "called with operand rule" ); | |
| 1660 | |
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1661 MachNode* shared_node = find_shared_node(s->_leaf, rule); |
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1662 if (shared_node != NULL) { |
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1663 return shared_node; |
| 0 | 1664 } |
| 1665 | |
| 1666 // Build the object to represent this state & prepare for recursive calls | |
| 1667 MachNode *mach = s->MachNodeGenerator( rule, C ); | |
| 1668 mach->_opnds[0] = s->MachOperGenerator( _reduceOp[rule], C ); | |
| 1669 assert( mach->_opnds[0] != NULL, "Missing result operand" ); | |
| 1670 Node *leaf = s->_leaf; | |
| 1671 // Check for instruction or instruction chain rule | |
| 1672 if( rule >= _END_INST_CHAIN_RULE || rule < _BEGIN_INST_CHAIN_RULE ) { | |
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1673 assert(C->node_arena()->contains(s->_leaf) || !has_new_node(s->_leaf), |
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1674 "duplicating node that's already been matched"); |
| 0 | 1675 // Instruction |
| 1676 mach->add_req( leaf->in(0) ); // Set initial control | |
| 1677 // Reduce interior of complex instruction | |
| 1678 ReduceInst_Interior( s, rule, mem, mach, 1 ); | |
| 1679 } else { | |
| 1680 // Instruction chain rules are data-dependent on their inputs | |
| 1681 mach->add_req(0); // Set initial control to none | |
| 1682 ReduceInst_Chain_Rule( s, rule, mem, mach ); | |
| 1683 } | |
| 1684 | |
| 1685 // If a Memory was used, insert a Memory edge | |
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1686 if( mem != (Node*)1 ) { |
| 0 | 1687 mach->ins_req(MemNode::Memory,mem); |
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1688 #ifdef ASSERT |
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1689 // Verify adr type after matching memory operation |
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1690 const MachOper* oper = mach->memory_operand(); |
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1691 if (oper != NULL && oper != (MachOper*)-1) { |
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1692 // It has a unique memory operand. Find corresponding ideal mem node. |
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1693 Node* m = NULL; |
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1694 if (leaf->is_Mem()) { |
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1695 m = leaf; |
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1696 } else { |
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1697 m = _mem_node; |
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1698 assert(m != NULL && m->is_Mem(), "expecting memory node"); |
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1699 } |
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1700 const Type* mach_at = mach->adr_type(); |
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1701 // DecodeN node consumed by an address may have different type |
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1702 // then its input. Don't compare types for such case. |
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1703 if (m->adr_type() != mach_at && |
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1704 (m->in(MemNode::Address)->is_DecodeNarrowPtr() || |
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1705 m->in(MemNode::Address)->is_AddP() && |
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1706 m->in(MemNode::Address)->in(AddPNode::Address)->is_DecodeNarrowPtr() || |
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1707 m->in(MemNode::Address)->is_AddP() && |
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1708 m->in(MemNode::Address)->in(AddPNode::Address)->is_AddP() && |
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1709 m->in(MemNode::Address)->in(AddPNode::Address)->in(AddPNode::Address)->is_DecodeNarrowPtr())) { |
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1710 mach_at = m->adr_type(); |
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1711 } |
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1712 if (m->adr_type() != mach_at) { |
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1713 m->dump(); |
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1714 tty->print_cr("mach:"); |
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1715 mach->dump(1); |
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1716 } |
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1717 assert(m->adr_type() == mach_at, "matcher should not change adr type"); |
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1718 } |
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1719 #endif |
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1720 } |
| 0 | 1721 |
| 1722 // If the _leaf is an AddP, insert the base edge | |
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1723 if (leaf->is_AddP()) { |
| 0 | 1724 mach->ins_req(AddPNode::Base,leaf->in(AddPNode::Base)); |
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1725 } |
| 0 | 1726 |
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1727 uint number_of_projections_prior = number_of_projections(); |
| 0 | 1728 |
| 1729 // Perform any 1-to-many expansions required | |
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1730 MachNode *ex = mach->Expand(s, _projection_list, mem); |
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1731 if (ex != mach) { |
| 0 | 1732 assert(ex->ideal_reg() == mach->ideal_reg(), "ideal types should match"); |
| 1733 if( ex->in(1)->is_Con() ) | |
| 1734 ex->in(1)->set_req(0, C->root()); | |
| 1735 // Remove old node from the graph | |
| 1736 for( uint i=0; i<mach->req(); i++ ) { | |
| 1737 mach->set_req(i,NULL); | |
| 1738 } | |
| 222 | 1739 #ifdef ASSERT |
| 1740 _new2old_map.map(ex->_idx, s->_leaf); | |
| 1741 #endif | |
| 0 | 1742 } |
| 1743 | |
| 1744 // PhaseChaitin::fixup_spills will sometimes generate spill code | |
| 1745 // via the matcher. By the time, nodes have been wired into the CFG, | |
| 1746 // and any further nodes generated by expand rules will be left hanging | |
| 1747 // in space, and will not get emitted as output code. Catch this. | |
| 1748 // Also, catch any new register allocation constraints ("projections") | |
| 1749 // generated belatedly during spill code generation. | |
| 1750 if (_allocation_started) { | |
| 1751 guarantee(ex == mach, "no expand rules during spill generation"); | |
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1752 guarantee(number_of_projections_prior == number_of_projections(), "no allocation during spill generation"); |
| 0 | 1753 } |
| 1754 | |
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1755 if (leaf->is_Con() || leaf->is_DecodeNarrowPtr()) { |
| 0 | 1756 // Record the con for sharing |
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1757 _shared_nodes.map(leaf->_idx, ex); |
| 0 | 1758 } |
| 1759 | |
| 1760 return ex; | |
| 1761 } | |
| 1762 | |
| 1763 void Matcher::ReduceInst_Chain_Rule( State *s, int rule, Node *&mem, MachNode *mach ) { | |
| 1764 // 'op' is what I am expecting to receive | |
| 1765 int op = _leftOp[rule]; | |
| 1766 // Operand type to catch childs result | |
| 1767 // This is what my child will give me. | |
| 1768 int opnd_class_instance = s->_rule[op]; | |
| 1769 // Choose between operand class or not. | |
| 605 | 1770 // This is what I will receive. |
| 0 | 1771 int catch_op = (FIRST_OPERAND_CLASS <= op && op < NUM_OPERANDS) ? opnd_class_instance : op; |
| 1772 // New rule for child. Chase operand classes to get the actual rule. | |
| 1773 int newrule = s->_rule[catch_op]; | |
| 1774 | |
| 1775 if( newrule < NUM_OPERANDS ) { | |
| 1776 // Chain from operand or operand class, may be output of shared node | |
| 1777 assert( 0 <= opnd_class_instance && opnd_class_instance < NUM_OPERANDS, | |
| 1778 "Bad AD file: Instruction chain rule must chain from operand"); | |
| 1779 // Insert operand into array of operands for this instruction | |
| 1780 mach->_opnds[1] = s->MachOperGenerator( opnd_class_instance, C ); | |
| 1781 | |
| 1782 ReduceOper( s, newrule, mem, mach ); | |
| 1783 } else { | |
| 1784 // Chain from the result of an instruction | |
| 1785 assert( newrule >= _LAST_MACH_OPER, "Do NOT chain from internal operand"); | |
| 1786 mach->_opnds[1] = s->MachOperGenerator( _reduceOp[catch_op], C ); | |
| 1787 Node *mem1 = (Node*)1; | |
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1788 debug_only(Node *save_mem_node = _mem_node;) |
| 0 | 1789 mach->add_req( ReduceInst(s, newrule, mem1) ); |
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1790 debug_only(_mem_node = save_mem_node;) |
| 0 | 1791 } |
| 1792 return; | |
| 1793 } | |
| 1794 | |
| 1795 | |
| 1796 uint Matcher::ReduceInst_Interior( State *s, int rule, Node *&mem, MachNode *mach, uint num_opnds ) { | |
| 1797 if( s->_leaf->is_Load() ) { | |
| 1798 Node *mem2 = s->_leaf->in(MemNode::Memory); | |
| 1799 assert( mem == (Node*)1 || mem == mem2, "multiple Memories being matched at once?" ); | |
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1800 debug_only( if( mem == (Node*)1 ) _mem_node = s->_leaf;) |
| 0 | 1801 mem = mem2; |
| 1802 } | |
| 1803 if( s->_leaf->in(0) != NULL && s->_leaf->req() > 1) { | |
| 1804 if( mach->in(0) == NULL ) | |
| 1805 mach->set_req(0, s->_leaf->in(0)); | |
| 1806 } | |
| 1807 | |
| 1808 // Now recursively walk the state tree & add operand list. | |
| 1809 for( uint i=0; i<2; i++ ) { // binary tree | |
| 1810 State *newstate = s->_kids[i]; | |
| 1811 if( newstate == NULL ) break; // Might only have 1 child | |
| 1812 // 'op' is what I am expecting to receive | |
| 1813 int op; | |
| 1814 if( i == 0 ) { | |
| 1815 op = _leftOp[rule]; | |
| 1816 } else { | |
| 1817 op = _rightOp[rule]; | |
| 1818 } | |
| 1819 // Operand type to catch childs result | |
| 1820 // This is what my child will give me. | |
| 1821 int opnd_class_instance = newstate->_rule[op]; | |
| 1822 // Choose between operand class or not. | |
| 1823 // This is what I will receive. | |
| 1824 int catch_op = (op >= FIRST_OPERAND_CLASS && op < NUM_OPERANDS) ? opnd_class_instance : op; | |
| 1825 // New rule for child. Chase operand classes to get the actual rule. | |
| 1826 int newrule = newstate->_rule[catch_op]; | |
| 1827 | |
| 1828 if( newrule < NUM_OPERANDS ) { // Operand/operandClass or internalOp/instruction? | |
| 1829 // Operand/operandClass | |
| 1830 // Insert operand into array of operands for this instruction | |
| 1831 mach->_opnds[num_opnds++] = newstate->MachOperGenerator( opnd_class_instance, C ); | |
| 1832 ReduceOper( newstate, newrule, mem, mach ); | |
| 1833 | |
| 1834 } else { // Child is internal operand or new instruction | |
| 1835 if( newrule < _LAST_MACH_OPER ) { // internal operand or instruction? | |
| 1836 // internal operand --> call ReduceInst_Interior | |
| 1837 // Interior of complex instruction. Do nothing but recurse. | |
| 1838 num_opnds = ReduceInst_Interior( newstate, newrule, mem, mach, num_opnds ); | |
| 1839 } else { | |
| 1840 // instruction --> call build operand( ) to catch result | |
| 1841 // --> ReduceInst( newrule ) | |
| 1842 mach->_opnds[num_opnds++] = s->MachOperGenerator( _reduceOp[catch_op], C ); | |
| 1843 Node *mem1 = (Node*)1; | |
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1844 debug_only(Node *save_mem_node = _mem_node;) |
| 0 | 1845 mach->add_req( ReduceInst( newstate, newrule, mem1 ) ); |
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1846 debug_only(_mem_node = save_mem_node;) |
| 0 | 1847 } |
| 1848 } | |
| 1849 assert( mach->_opnds[num_opnds-1], "" ); | |
| 1850 } | |
| 1851 return num_opnds; | |
| 1852 } | |
| 1853 | |
| 1854 // This routine walks the interior of possible complex operands. | |
| 1855 // At each point we check our children in the match tree: | |
| 1856 // (1) No children - | |
| 1857 // We are a leaf; add _leaf field as an input to the MachNode | |
| 1858 // (2) Child is an internal operand - | |
| 1859 // Skip over it ( do nothing ) | |
| 1860 // (3) Child is an instruction - | |
| 1861 // Call ReduceInst recursively and | |
| 1862 // and instruction as an input to the MachNode | |
| 1863 void Matcher::ReduceOper( State *s, int rule, Node *&mem, MachNode *mach ) { | |
| 1864 assert( rule < _LAST_MACH_OPER, "called with operand rule" ); | |
| 1865 State *kid = s->_kids[0]; | |
| 1866 assert( kid == NULL || s->_leaf->in(0) == NULL, "internal operands have no control" ); | |
| 1867 | |
| 1868 // Leaf? And not subsumed? | |
| 1869 if( kid == NULL && !_swallowed[rule] ) { | |
| 1870 mach->add_req( s->_leaf ); // Add leaf pointer | |
| 1871 return; // Bail out | |
| 1872 } | |
| 1873 | |
| 1874 if( s->_leaf->is_Load() ) { | |
| 1875 assert( mem == (Node*)1, "multiple Memories being matched at once?" ); | |
| 1876 mem = s->_leaf->in(MemNode::Memory); | |
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1877 debug_only(_mem_node = s->_leaf;) |
| 0 | 1878 } |
| 1879 if( s->_leaf->in(0) && s->_leaf->req() > 1) { | |
| 1880 if( !mach->in(0) ) | |
| 1881 mach->set_req(0,s->_leaf->in(0)); | |
| 1882 else { | |
| 1883 assert( s->_leaf->in(0) == mach->in(0), "same instruction, differing controls?" ); | |
| 1884 } | |
| 1885 } | |
| 1886 | |
| 1887 for( uint i=0; kid != NULL && i<2; kid = s->_kids[1], i++ ) { // binary tree | |
| 1888 int newrule; | |
| 10405 | 1889 if( i == 0) |
| 0 | 1890 newrule = kid->_rule[_leftOp[rule]]; |
| 1891 else | |
| 1892 newrule = kid->_rule[_rightOp[rule]]; | |
| 1893 | |
| 1894 if( newrule < _LAST_MACH_OPER ) { // Operand or instruction? | |
| 1895 // Internal operand; recurse but do nothing else | |
| 1896 ReduceOper( kid, newrule, mem, mach ); | |
| 1897 | |
| 1898 } else { // Child is a new instruction | |
| 1899 // Reduce the instruction, and add a direct pointer from this | |
| 1900 // machine instruction to the newly reduced one. | |
| 1901 Node *mem1 = (Node*)1; | |
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1902 debug_only(Node *save_mem_node = _mem_node;) |
| 0 | 1903 mach->add_req( ReduceInst( kid, newrule, mem1 ) ); |
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1904 debug_only(_mem_node = save_mem_node;) |
| 0 | 1905 } |
| 1906 } | |
| 1907 } | |
| 1908 | |
| 1909 | |
| 1910 // ------------------------------------------------------------------------- | |
| 1911 // Java-Java calling convention | |
| 1912 // (what you use when Java calls Java) | |
| 1913 | |
| 1914 //------------------------------find_receiver---------------------------------- | |
| 1915 // For a given signature, return the OptoReg for parameter 0. | |
| 1916 OptoReg::Name Matcher::find_receiver( bool is_outgoing ) { | |
| 1917 VMRegPair regs; | |
| 1918 BasicType sig_bt = T_OBJECT; | |
| 1919 calling_convention(&sig_bt, ®s, 1, is_outgoing); | |
| 1920 // Return argument 0 register. In the LP64 build pointers | |
| 1921 // take 2 registers, but the VM wants only the 'main' name. | |
| 1922 return OptoReg::as_OptoReg(regs.first()); | |
| 1923 } | |
| 1924 | |
| 1925 // A method-klass-holder may be passed in the inline_cache_reg | |
| 1926 // and then expanded into the inline_cache_reg and a method_oop register | |
| 1927 // defined in ad_<arch>.cpp | |
| 1928 | |
| 1929 | |
| 1930 //------------------------------find_shared------------------------------------ | |
| 1931 // Set bits if Node is shared or otherwise a root | |
| 1932 void Matcher::find_shared( Node *n ) { | |
| 1933 // Allocate stack of size C->unique() * 2 to avoid frequent realloc | |
| 1934 MStack mstack(C->unique() * 2); | |
|
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1935 // Mark nodes as address_visited if they are inputs to an address expression |
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1936 VectorSet address_visited(Thread::current()->resource_area()); |
| 0 | 1937 mstack.push(n, Visit); // Don't need to pre-visit root node |
| 1938 while (mstack.is_nonempty()) { | |
| 1939 n = mstack.node(); // Leave node on stack | |
| 1940 Node_State nstate = mstack.state(); | |
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1941 uint nop = n->Opcode(); |
| 0 | 1942 if (nstate == Pre_Visit) { |
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1943 if (address_visited.test(n->_idx)) { // Visited in address already? |
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1944 // Flag as visited and shared now. |
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1945 set_visited(n); |
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1946 } |
| 0 | 1947 if (is_visited(n)) { // Visited already? |
| 1948 // Node is shared and has no reason to clone. Flag it as shared. | |
| 1949 // This causes it to match into a register for the sharing. | |
| 1950 set_shared(n); // Flag as shared and | |
| 1951 mstack.pop(); // remove node from stack | |
| 1952 continue; | |
| 1953 } | |
| 1954 nstate = Visit; // Not already visited; so visit now | |
| 1955 } | |
| 1956 if (nstate == Visit) { | |
| 1957 mstack.set_state(Post_Visit); | |
| 1958 set_visited(n); // Flag as visited now | |
| 1959 bool mem_op = false; | |
| 1960 | |
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1961 switch( nop ) { // Handle some opcodes special |
| 0 | 1962 case Op_Phi: // Treat Phis as shared roots |
| 1963 case Op_Parm: | |
| 1964 case Op_Proj: // All handled specially during matching | |
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1965 case Op_SafePointScalarObject: |
| 0 | 1966 set_shared(n); |
| 1967 set_dontcare(n); | |
| 1968 break; | |
| 1969 case Op_If: | |
| 1970 case Op_CountedLoopEnd: | |
| 1971 mstack.set_state(Alt_Post_Visit); // Alternative way | |
| 1972 // Convert (If (Bool (CmpX A B))) into (If (Bool) (CmpX A B)). Helps | |
| 1973 // with matching cmp/branch in 1 instruction. The Matcher needs the | |
| 1974 // Bool and CmpX side-by-side, because it can only get at constants | |
| 1975 // that are at the leaves of Match trees, and the Bool's condition acts | |
| 1976 // as a constant here. | |
| 1977 mstack.push(n->in(1), Visit); // Clone the Bool | |
| 1978 mstack.push(n->in(0), Pre_Visit); // Visit control input | |
| 1979 continue; // while (mstack.is_nonempty()) | |
| 1980 case Op_ConvI2D: // These forms efficiently match with a prior | |
| 1981 case Op_ConvI2F: // Load but not a following Store | |
| 1982 if( n->in(1)->is_Load() && // Prior load | |
| 1983 n->outcnt() == 1 && // Not already shared | |
| 1984 n->unique_out()->is_Store() ) // Following store | |
| 1985 set_shared(n); // Force it to be a root | |
| 1986 break; | |
| 1987 case Op_ReverseBytesI: | |
| 1988 case Op_ReverseBytesL: | |
| 1989 if( n->in(1)->is_Load() && // Prior load | |
| 1990 n->outcnt() == 1 ) // Not already shared | |
| 1991 set_shared(n); // Force it to be a root | |
| 1992 break; | |
| 1993 case Op_BoxLock: // Cant match until we get stack-regs in ADLC | |
| 1994 case Op_IfFalse: | |
| 1995 case Op_IfTrue: | |
| 1996 case Op_MachProj: | |
| 1997 case Op_MergeMem: | |
| 1998 case Op_Catch: | |
| 1999 case Op_CatchProj: | |
| 2000 case Op_CProj: | |
| 2001 case Op_JumpProj: | |
| 2002 case Op_JProj: | |
| 2003 case Op_NeverBranch: | |
| 2004 set_dontcare(n); | |
| 2005 break; | |
| 2006 case Op_Jump: | |
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2007 mstack.push(n->in(1), Pre_Visit); // Switch Value (could be shared) |
| 0 | 2008 mstack.push(n->in(0), Pre_Visit); // Visit Control input |
| 2009 continue; // while (mstack.is_nonempty()) | |
| 2010 case Op_StrComp: | |
| 681 | 2011 case Op_StrEquals: |
| 2012 case Op_StrIndexOf: | |
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2013 case Op_AryEq: |
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2014 case Op_EncodeISOArray: |
| 0 | 2015 set_shared(n); // Force result into register (it will be anyways) |
| 2016 break; | |
| 2017 case Op_ConP: { // Convert pointers above the centerline to NUL | |
| 2018 TypeNode *tn = n->as_Type(); // Constants derive from type nodes | |
| 2019 const TypePtr* tp = tn->type()->is_ptr(); | |
| 2020 if (tp->_ptr == TypePtr::AnyNull) { | |
| 2021 tn->set_type(TypePtr::NULL_PTR); | |
| 2022 } | |
| 2023 break; | |
| 2024 } | |
| 163 | 2025 case Op_ConN: { // Convert narrow pointers above the centerline to NUL |
| 2026 TypeNode *tn = n->as_Type(); // Constants derive from type nodes | |
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2027 const TypePtr* tp = tn->type()->make_ptr(); |
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2028 if (tp && tp->_ptr == TypePtr::AnyNull) { |
| 163 | 2029 tn->set_type(TypeNarrowOop::NULL_PTR); |
| 2030 } | |
| 2031 break; | |
| 2032 } | |
| 0 | 2033 case Op_Binary: // These are introduced in the Post_Visit state. |
| 2034 ShouldNotReachHere(); | |
| 2035 break; | |
| 2036 case Op_ClearArray: | |
| 2037 case Op_SafePoint: | |
| 2038 mem_op = true; | |
| 2039 break; | |
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2040 default: |
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2041 if( n->is_Store() ) { |
|
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6896370: CTW fails share/vm/opto/matcher.cpp:1475 "duplicating node that's already been matched"
kvn
parents:
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diff
changeset
|
2042 // Do match stores, despite no ideal reg |
|
09572fede9d1
6896370: CTW fails share/vm/opto/matcher.cpp:1475 "duplicating node that's already been matched"
kvn
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diff
changeset
|
2043 mem_op = true; |
|
09572fede9d1
6896370: CTW fails share/vm/opto/matcher.cpp:1475 "duplicating node that's already been matched"
kvn
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986
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|
2044 break; |
|
09572fede9d1
6896370: CTW fails share/vm/opto/matcher.cpp:1475 "duplicating node that's already been matched"
kvn
parents:
986
diff
changeset
|
2045 } |
|
09572fede9d1
6896370: CTW fails share/vm/opto/matcher.cpp:1475 "duplicating node that's already been matched"
kvn
parents:
986
diff
changeset
|
2046 if( n->is_Mem() ) { // Loads and LoadStores |
|
09572fede9d1
6896370: CTW fails share/vm/opto/matcher.cpp:1475 "duplicating node that's already been matched"
kvn
parents:
986
diff
changeset
|
2047 mem_op = true; |
|
09572fede9d1
6896370: CTW fails share/vm/opto/matcher.cpp:1475 "duplicating node that's already been matched"
kvn
parents:
986
diff
changeset
|
2048 // Loads must be root of match tree due to prior load conflict |
|
09572fede9d1
6896370: CTW fails share/vm/opto/matcher.cpp:1475 "duplicating node that's already been matched"
kvn
parents:
986
diff
changeset
|
2049 if( C->subsume_loads() == false ) |
|
09572fede9d1
6896370: CTW fails share/vm/opto/matcher.cpp:1475 "duplicating node that's already been matched"
kvn
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986
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|
2050 set_shared(n); |
| 0 | 2051 } |
| 2052 // Fall into default case | |
| 2053 if( !n->ideal_reg() ) | |
| 2054 set_dontcare(n); // Unmatchable Nodes | |
| 2055 } // end_switch | |
| 2056 | |
| 2057 for(int i = n->req() - 1; i >= 0; --i) { // For my children | |
| 2058 Node *m = n->in(i); // Get ith input | |
| 2059 if (m == NULL) continue; // Ignore NULLs | |
| 2060 uint mop = m->Opcode(); | |
| 2061 | |
| 2062 // Must clone all producers of flags, or we will not match correctly. | |
| 2063 // Suppose a compare setting int-flags is shared (e.g., a switch-tree) | |
| 2064 // then it will match into an ideal Op_RegFlags. Alas, the fp-flags | |
| 2065 // are also there, so we may match a float-branch to int-flags and | |
| 2066 // expect the allocator to haul the flags from the int-side to the | |
| 2067 // fp-side. No can do. | |
| 2068 if( _must_clone[mop] ) { | |
| 2069 mstack.push(m, Visit); | |
| 2070 continue; // for(int i = ...) | |
| 2071 } | |
| 2072 | |
|
6848
8e47bac5643a
7054512: Compress class pointers after perm gen removal
roland
parents:
6804
diff
changeset
|
2073 if( mop == Op_AddP && m->in(AddPNode::Base)->is_DecodeNarrowPtr()) { |
|
1061
09572fede9d1
6896370: CTW fails share/vm/opto/matcher.cpp:1475 "duplicating node that's already been matched"
kvn
parents:
986
diff
changeset
|
2074 // Bases used in addresses must be shared but since |
|
09572fede9d1
6896370: CTW fails share/vm/opto/matcher.cpp:1475 "duplicating node that's already been matched"
kvn
parents:
986
diff
changeset
|
2075 // they are shared through a DecodeN they may appear |
|
09572fede9d1
6896370: CTW fails share/vm/opto/matcher.cpp:1475 "duplicating node that's already been matched"
kvn
parents:
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diff
changeset
|
2076 // to have a single use so force sharing here. |
|
09572fede9d1
6896370: CTW fails share/vm/opto/matcher.cpp:1475 "duplicating node that's already been matched"
kvn
parents:
986
diff
changeset
|
2077 set_shared(m->in(AddPNode::Base)->in(1)); |
|
09572fede9d1
6896370: CTW fails share/vm/opto/matcher.cpp:1475 "duplicating node that's already been matched"
kvn
parents:
986
diff
changeset
|
2078 } |
|
09572fede9d1
6896370: CTW fails share/vm/opto/matcher.cpp:1475 "duplicating node that's already been matched"
kvn
parents:
986
diff
changeset
|
2079 |
|
09572fede9d1
6896370: CTW fails share/vm/opto/matcher.cpp:1475 "duplicating node that's already been matched"
kvn
parents:
986
diff
changeset
|
2080 // Clone addressing expressions as they are "free" in memory access instructions |
| 0 | 2081 if( mem_op && i == MemNode::Address && mop == Op_AddP ) { |
|
586
6bea93606c11
6791572: assert("duplicating node that's already been matched")
kvn
parents:
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diff
changeset
|
2082 // Some inputs for address expression are not put on stack |
|
6bea93606c11
6791572: assert("duplicating node that's already been matched")
kvn
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diff
changeset
|
2083 // to avoid marking them as shared and forcing them into register |
|
6bea93606c11
6791572: assert("duplicating node that's already been matched")
kvn
parents:
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diff
changeset
|
2084 // if they are used only in address expressions. |
|
6bea93606c11
6791572: assert("duplicating node that's already been matched")
kvn
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diff
changeset
|
2085 // But they should be marked as shared if there are other uses |
|
6bea93606c11
6791572: assert("duplicating node that's already been matched")
kvn
parents:
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diff
changeset
|
2086 // besides address expressions. |
|
6bea93606c11
6791572: assert("duplicating node that's already been matched")
kvn
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558
diff
changeset
|
2087 |
| 0 | 2088 Node *off = m->in(AddPNode::Offset); |
|
586
6bea93606c11
6791572: assert("duplicating node that's already been matched")
kvn
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558
diff
changeset
|
2089 if( off->is_Con() && |
|
6bea93606c11
6791572: assert("duplicating node that's already been matched")
kvn
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diff
changeset
|
2090 // When there are other uses besides address expressions |
|
6bea93606c11
6791572: assert("duplicating node that's already been matched")
kvn
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diff
changeset
|
2091 // put it on stack and mark as shared. |
|
6bea93606c11
6791572: assert("duplicating node that's already been matched")
kvn
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changeset
|
2092 !is_visited(m) ) { |
|
6bea93606c11
6791572: assert("duplicating node that's already been matched")
kvn
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changeset
|
2093 address_visited.test_set(m->_idx); // Flag as address_visited |
| 0 | 2094 Node *adr = m->in(AddPNode::Address); |
| 2095 | |
| 2096 // Intel, ARM and friends can handle 2 adds in addressing mode | |
|
168
7793bd37a336
6705887: Compressed Oops: generate x64 addressing and implicit null checks with narrow oops
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|
2097 if( clone_shift_expressions && adr->is_AddP() && |
| 0 | 2098 // AtomicAdd is not an addressing expression. |
| 2099 // Cheap to find it by looking for screwy base. | |
|
586
6bea93606c11
6791572: assert("duplicating node that's already been matched")
kvn
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|
2100 !adr->in(AddPNode::Base)->is_top() && |
|
6bea93606c11
6791572: assert("duplicating node that's already been matched")
kvn
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diff
changeset
|
2101 // Are there other uses besides address expressions? |
|
6bea93606c11
6791572: assert("duplicating node that's already been matched")
kvn
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558
diff
changeset
|
2102 !is_visited(adr) ) { |
|
6bea93606c11
6791572: assert("duplicating node that's already been matched")
kvn
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diff
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|
2103 address_visited.set(adr->_idx); // Flag as address_visited |
| 0 | 2104 Node *shift = adr->in(AddPNode::Offset); |
| 2105 // Check for shift by small constant as well | |
| 2106 if( shift->Opcode() == Op_LShiftX && shift->in(2)->is_Con() && | |
|
586
6bea93606c11
6791572: assert("duplicating node that's already been matched")
kvn
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558
diff
changeset
|
2107 shift->in(2)->get_int() <= 3 && |
|
6bea93606c11
6791572: assert("duplicating node that's already been matched")
kvn
parents:
558
diff
changeset
|
2108 // Are there other uses besides address expressions? |
|
6bea93606c11
6791572: assert("duplicating node that's already been matched")
kvn
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558
diff
changeset
|
2109 !is_visited(shift) ) { |
|
6bea93606c11
6791572: assert("duplicating node that's already been matched")
kvn
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diff
changeset
|
2110 address_visited.set(shift->_idx); // Flag as address_visited |
| 0 | 2111 mstack.push(shift->in(2), Visit); |
|
586
6bea93606c11
6791572: assert("duplicating node that's already been matched")
kvn
parents:
558
diff
changeset
|
2112 Node *conv = shift->in(1); |
| 0 | 2113 #ifdef _LP64 |
| 2114 // Allow Matcher to match the rule which bypass | |
| 2115 // ConvI2L operation for an array index on LP64 | |
| 2116 // if the index value is positive. | |
|
586
6bea93606c11
6791572: assert("duplicating node that's already been matched")
kvn
parents:
558
diff
changeset
|
2117 if( conv->Opcode() == Op_ConvI2L && |
|
6bea93606c11
6791572: assert("duplicating node that's already been matched")
kvn
parents:
558
diff
changeset
|
2118 conv->as_Type()->type()->is_long()->_lo >= 0 && |
|
6bea93606c11
6791572: assert("duplicating node that's already been matched")
kvn
parents:
558
diff
changeset
|
2119 // Are there other uses besides address expressions? |
|
6bea93606c11
6791572: assert("duplicating node that's already been matched")
kvn
parents:
558
diff
changeset
|
2120 !is_visited(conv) ) { |
|
6bea93606c11
6791572: assert("duplicating node that's already been matched")
kvn
parents:
558
diff
changeset
|
2121 address_visited.set(conv->_idx); // Flag as address_visited |
|
6bea93606c11
6791572: assert("duplicating node that's already been matched")
kvn
parents:
558
diff
changeset
|
2122 mstack.push(conv->in(1), Pre_Visit); |
| 0 | 2123 } else |
| 2124 #endif | |
|
586
6bea93606c11
6791572: assert("duplicating node that's already been matched")
kvn
parents:
558
diff
changeset
|
2125 mstack.push(conv, Pre_Visit); |
| 0 | 2126 } else { |
| 2127 mstack.push(shift, Pre_Visit); | |
| 2128 } | |
| 2129 mstack.push(adr->in(AddPNode::Address), Pre_Visit); | |
| 2130 mstack.push(adr->in(AddPNode::Base), Pre_Visit); | |
| 2131 } else { // Sparc, Alpha, PPC and friends | |
| 2132 mstack.push(adr, Pre_Visit); | |
| 2133 } | |
| 2134 | |
| 2135 // Clone X+offset as it also folds into most addressing expressions | |
| 2136 mstack.push(off, Visit); | |
| 2137 mstack.push(m->in(AddPNode::Base), Pre_Visit); | |
| 2138 continue; // for(int i = ...) | |
| 2139 } // if( off->is_Con() ) | |
| 2140 } // if( mem_op && | |
| 2141 mstack.push(m, Pre_Visit); | |
| 2142 } // for(int i = ...) | |
| 2143 } | |
| 2144 else if (nstate == Alt_Post_Visit) { | |
| 2145 mstack.pop(); // Remove node from stack | |
| 2146 // We cannot remove the Cmp input from the Bool here, as the Bool may be | |
| 2147 // shared and all users of the Bool need to move the Cmp in parallel. | |
| 2148 // This leaves both the Bool and the If pointing at the Cmp. To | |
| 2149 // prevent the Matcher from trying to Match the Cmp along both paths | |
| 2150 // BoolNode::match_edge always returns a zero. | |
| 2151 | |
| 2152 // We reorder the Op_If in a pre-order manner, so we can visit without | |
| 605 | 2153 // accidentally sharing the Cmp (the Bool and the If make 2 users). |
| 0 | 2154 n->add_req( n->in(1)->in(1) ); // Add the Cmp next to the Bool |
| 2155 } | |
| 2156 else if (nstate == Post_Visit) { | |
| 2157 mstack.pop(); // Remove node from stack | |
| 2158 | |
| 2159 // Now hack a few special opcodes | |
| 2160 switch( n->Opcode() ) { // Handle some opcodes special | |
| 2161 case Op_StorePConditional: | |
|
420
a1980da045cc
6462850: generate biased locking code in C2 ideal graph
kvn
parents:
368
diff
changeset
|
2162 case Op_StoreIConditional: |
| 0 | 2163 case Op_StoreLConditional: |
| 2164 case Op_CompareAndSwapI: | |
| 2165 case Op_CompareAndSwapL: | |
|
113
ba764ed4b6f2
6420645: Create a vm that uses compressed oops for up to 32gb heapsizes
coleenp
parents:
63
diff
changeset
|
2166 case Op_CompareAndSwapP: |
|
ba764ed4b6f2
6420645: Create a vm that uses compressed oops for up to 32gb heapsizes
coleenp
parents:
63
diff
changeset
|
2167 case Op_CompareAndSwapN: { // Convert trinary to binary-tree |
| 0 | 2168 Node *newval = n->in(MemNode::ValueIn ); |
|
6795
7eca5de9e0b6
7023898: Intrinsify AtomicLongFieldUpdater.getAndIncrement()
roland
parents:
6725
diff
changeset
|
2169 Node *oldval = n->in(LoadStoreConditionalNode::ExpectedIn); |
|
6804
e626685e9f6c
7193318: C2: remove number of inputs requirement from Node's new operator
kvn
parents:
6795
diff
changeset
|
2170 Node *pair = new (C) BinaryNode( oldval, newval ); |
| 0 | 2171 n->set_req(MemNode::ValueIn,pair); |
|
6795
7eca5de9e0b6
7023898: Intrinsify AtomicLongFieldUpdater.getAndIncrement()
roland
parents:
6725
diff
changeset
|
2172 n->del_req(LoadStoreConditionalNode::ExpectedIn); |
| 0 | 2173 break; |
| 2174 } | |
| 2175 case Op_CMoveD: // Convert trinary to binary-tree | |
| 2176 case Op_CMoveF: | |
| 2177 case Op_CMoveI: | |
| 2178 case Op_CMoveL: | |
|
164
c436414a719e
6703890: Compressed Oops: add LoadNKlass node to generate narrow oops (32-bits) compare instructions
kvn
parents:
163
diff
changeset
|
2179 case Op_CMoveN: |
| 0 | 2180 case Op_CMoveP: { |
| 2181 // Restructure into a binary tree for Matching. It's possible that | |
| 2182 // we could move this code up next to the graph reshaping for IfNodes | |
| 2183 // or vice-versa, but I do not want to debug this for Ladybird. | |
| 2184 // 10/2/2000 CNC. | |
|
6804
e626685e9f6c
7193318: C2: remove number of inputs requirement from Node's new operator
kvn
parents:
6795
diff
changeset
|
2185 Node *pair1 = new (C) BinaryNode(n->in(1),n->in(1)->in(1)); |
| 0 | 2186 n->set_req(1,pair1); |
|
6804
e626685e9f6c
7193318: C2: remove number of inputs requirement from Node's new operator
kvn
parents:
6795
diff
changeset
|
2187 Node *pair2 = new (C) BinaryNode(n->in(2),n->in(3)); |
| 0 | 2188 n->set_req(2,pair2); |
| 2189 n->del_req(3); | |
| 2190 break; | |
| 2191 } | |
| 3345 | 2192 case Op_LoopLimit: { |
|
6804
e626685e9f6c
7193318: C2: remove number of inputs requirement from Node's new operator
kvn
parents:
6795
diff
changeset
|
2193 Node *pair1 = new (C) BinaryNode(n->in(1),n->in(2)); |
| 3345 | 2194 n->set_req(1,pair1); |
| 2195 n->set_req(2,n->in(3)); | |
| 2196 n->del_req(3); | |
| 2197 break; | |
| 2198 } | |
|
986
62001a362ce9
6827605: new String intrinsics may prevent EA scalar replacement
kvn
parents:
851
diff
changeset
|
2199 case Op_StrEquals: { |
|
6804
e626685e9f6c
7193318: C2: remove number of inputs requirement from Node's new operator
kvn
parents:
6795
diff
changeset
|
2200 Node *pair1 = new (C) BinaryNode(n->in(2),n->in(3)); |
|
986
62001a362ce9
6827605: new String intrinsics may prevent EA scalar replacement
kvn
parents:
851
diff
changeset
|
2201 n->set_req(2,pair1); |
|
62001a362ce9
6827605: new String intrinsics may prevent EA scalar replacement
kvn
parents:
851
diff
changeset
|
2202 n->set_req(3,n->in(4)); |
|
62001a362ce9
6827605: new String intrinsics may prevent EA scalar replacement
kvn
parents:
851
diff
changeset
|
2203 n->del_req(4); |
|
62001a362ce9
6827605: new String intrinsics may prevent EA scalar replacement
kvn
parents:
851
diff
changeset
|
2204 break; |
|
62001a362ce9
6827605: new String intrinsics may prevent EA scalar replacement
kvn
parents:
851
diff
changeset
|
2205 } |
|
62001a362ce9
6827605: new String intrinsics may prevent EA scalar replacement
kvn
parents:
851
diff
changeset
|
2206 case Op_StrComp: |
|
62001a362ce9
6827605: new String intrinsics may prevent EA scalar replacement
kvn
parents:
851
diff
changeset
|
2207 case Op_StrIndexOf: { |
|
6804
e626685e9f6c
7193318: C2: remove number of inputs requirement from Node's new operator
kvn
parents:
6795
diff
changeset
|
2208 Node *pair1 = new (C) BinaryNode(n->in(2),n->in(3)); |
|
986
62001a362ce9
6827605: new String intrinsics may prevent EA scalar replacement
kvn
parents:
851
diff
changeset
|
2209 n->set_req(2,pair1); |
|
6804
e626685e9f6c
7193318: C2: remove number of inputs requirement from Node's new operator
kvn
parents:
6795
diff
changeset
|
2210 Node *pair2 = new (C) BinaryNode(n->in(4),n->in(5)); |
|
986
62001a362ce9
6827605: new String intrinsics may prevent EA scalar replacement
kvn
parents:
851
diff
changeset
|
2211 n->set_req(3,pair2); |
|
62001a362ce9
6827605: new String intrinsics may prevent EA scalar replacement
kvn
parents:
851
diff
changeset
|
2212 n->del_req(5); |
|
62001a362ce9
6827605: new String intrinsics may prevent EA scalar replacement
kvn
parents:
851
diff
changeset
|
2213 n->del_req(4); |
|
62001a362ce9
6827605: new String intrinsics may prevent EA scalar replacement
kvn
parents:
851
diff
changeset
|
2214 break; |
|
62001a362ce9
6827605: new String intrinsics may prevent EA scalar replacement
kvn
parents:
851
diff
changeset
|
2215 } |
|
7637
b30b3c2a0cf2
6896617: Optimize sun.nio.cs.ISO_8859_1$Encode.encodeArrayLoop() on x86
kvn
parents:
7196
diff
changeset
|
2216 case Op_EncodeISOArray: { |
|
b30b3c2a0cf2
6896617: Optimize sun.nio.cs.ISO_8859_1$Encode.encodeArrayLoop() on x86
kvn
parents:
7196
diff
changeset
|
2217 // Restructure into a binary tree for Matching. |
|
b30b3c2a0cf2
6896617: Optimize sun.nio.cs.ISO_8859_1$Encode.encodeArrayLoop() on x86
kvn
parents:
7196
diff
changeset
|
2218 Node* pair = new (C) BinaryNode(n->in(3), n->in(4)); |
|
b30b3c2a0cf2
6896617: Optimize sun.nio.cs.ISO_8859_1$Encode.encodeArrayLoop() on x86
kvn
parents:
7196
diff
changeset
|
2219 n->set_req(3, pair); |
|
b30b3c2a0cf2
6896617: Optimize sun.nio.cs.ISO_8859_1$Encode.encodeArrayLoop() on x86
kvn
parents:
7196
diff
changeset
|
2220 n->del_req(4); |
|
b30b3c2a0cf2
6896617: Optimize sun.nio.cs.ISO_8859_1$Encode.encodeArrayLoop() on x86
kvn
parents:
7196
diff
changeset
|
2221 break; |
|
b30b3c2a0cf2
6896617: Optimize sun.nio.cs.ISO_8859_1$Encode.encodeArrayLoop() on x86
kvn
parents:
7196
diff
changeset
|
2222 } |
| 0 | 2223 default: |
| 2224 break; | |
| 2225 } | |
| 2226 } | |
| 2227 else { | |
| 2228 ShouldNotReachHere(); | |
| 2229 } | |
| 2230 } // end of while (mstack.is_nonempty()) | |
| 2231 } | |
| 2232 | |
| 2233 #ifdef ASSERT | |
| 2234 // machine-independent root to machine-dependent root | |
| 2235 void Matcher::dump_old2new_map() { | |
| 2236 _old2new_map.dump(); | |
| 2237 } | |
| 2238 #endif | |
| 2239 | |
| 2240 //---------------------------collect_null_checks------------------------------- | |
| 2241 // Find null checks in the ideal graph; write a machine-specific node for | |
| 2242 // it. Used by later implicit-null-check handling. Actually collects | |
| 2243 // either an IfTrue or IfFalse for the common NOT-null path, AND the ideal | |
| 2244 // value being tested. | |
|
368
36ccc817fca4
6747051: Improve code and implicit null check generation for compressed oops
kvn
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367
diff
changeset
|
2245 void Matcher::collect_null_checks( Node *proj, Node *orig_proj ) { |
| 0 | 2246 Node *iff = proj->in(0); |
| 2247 if( iff->Opcode() == Op_If ) { | |
| 2248 // During matching If's have Bool & Cmp side-by-side | |
| 2249 BoolNode *b = iff->in(1)->as_Bool(); | |
| 2250 Node *cmp = iff->in(2); | |
|
113
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|
2251 int opc = cmp->Opcode(); |
|
ba764ed4b6f2
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changeset
|
2252 if (opc != Op_CmpP && opc != Op_CmpN) return; |
|
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6420645: Create a vm that uses compressed oops for up to 32gb heapsizes
coleenp
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63
diff
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|
2253 |
|
ba764ed4b6f2
6420645: Create a vm that uses compressed oops for up to 32gb heapsizes
coleenp
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63
diff
changeset
|
2254 const Type* ct = cmp->in(2)->bottom_type(); |
|
ba764ed4b6f2
6420645: Create a vm that uses compressed oops for up to 32gb heapsizes
coleenp
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63
diff
changeset
|
2255 if (ct == TypePtr::NULL_PTR || |
|
ba764ed4b6f2
6420645: Create a vm that uses compressed oops for up to 32gb heapsizes
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63
diff
changeset
|
2256 (opc == Op_CmpN && ct == TypeNarrowOop::NULL_PTR)) { |
| 0 | 2257 |
|
368
36ccc817fca4
6747051: Improve code and implicit null check generation for compressed oops
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367
diff
changeset
|
2258 bool push_it = false; |
|
113
ba764ed4b6f2
6420645: Create a vm that uses compressed oops for up to 32gb heapsizes
coleenp
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63
diff
changeset
|
2259 if( proj->Opcode() == Op_IfTrue ) { |
|
ba764ed4b6f2
6420645: Create a vm that uses compressed oops for up to 32gb heapsizes
coleenp
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63
diff
changeset
|
2260 extern int all_null_checks_found; |
|
ba764ed4b6f2
6420645: Create a vm that uses compressed oops for up to 32gb heapsizes
coleenp
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63
diff
changeset
|
2261 all_null_checks_found++; |
|
ba764ed4b6f2
6420645: Create a vm that uses compressed oops for up to 32gb heapsizes
coleenp
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63
diff
changeset
|
2262 if( b->_test._test == BoolTest::ne ) { |
|
368
36ccc817fca4
6747051: Improve code and implicit null check generation for compressed oops
kvn
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367
diff
changeset
|
2263 push_it = true; |
|
113
ba764ed4b6f2
6420645: Create a vm that uses compressed oops for up to 32gb heapsizes
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63
diff
changeset
|
2264 } |
|
ba764ed4b6f2
6420645: Create a vm that uses compressed oops for up to 32gb heapsizes
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63
diff
changeset
|
2265 } else { |
|
ba764ed4b6f2
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coleenp
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63
diff
changeset
|
2266 assert( proj->Opcode() == Op_IfFalse, "" ); |
|
ba764ed4b6f2
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63
diff
changeset
|
2267 if( b->_test._test == BoolTest::eq ) { |
|
368
36ccc817fca4
6747051: Improve code and implicit null check generation for compressed oops
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367
diff
changeset
|
2268 push_it = true; |
| 0 | 2269 } |
| 2270 } | |
|
368
36ccc817fca4
6747051: Improve code and implicit null check generation for compressed oops
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367
diff
changeset
|
2271 if( push_it ) { |
|
36ccc817fca4
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kvn
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367
diff
changeset
|
2272 _null_check_tests.push(proj); |
|
36ccc817fca4
6747051: Improve code and implicit null check generation for compressed oops
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diff
changeset
|
2273 Node* val = cmp->in(1); |
|
36ccc817fca4
6747051: Improve code and implicit null check generation for compressed oops
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367
diff
changeset
|
2274 #ifdef _LP64 |
|
1575
3657cb01ffc5
6954029: Improve implicit null check generation with compressed oops
kvn
parents:
1203
diff
changeset
|
2275 if (val->bottom_type()->isa_narrowoop() && |
|
3657cb01ffc5
6954029: Improve implicit null check generation with compressed oops
kvn
parents:
1203
diff
changeset
|
2276 !Matcher::narrow_oop_use_complex_address()) { |
|
368
36ccc817fca4
6747051: Improve code and implicit null check generation for compressed oops
kvn
parents:
367
diff
changeset
|
2277 // |
|
36ccc817fca4
6747051: Improve code and implicit null check generation for compressed oops
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367
diff
changeset
|
2278 // Look for DecodeN node which should be pinned to orig_proj. |
|
36ccc817fca4
6747051: Improve code and implicit null check generation for compressed oops
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367
diff
changeset
|
2279 // On platforms (Sparc) which can not handle 2 adds |
|
36ccc817fca4
6747051: Improve code and implicit null check generation for compressed oops
kvn
parents:
367
diff
changeset
|
2280 // in addressing mode we have to keep a DecodeN node and |
|
36ccc817fca4
6747051: Improve code and implicit null check generation for compressed oops
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parents:
367
diff
changeset
|
2281 // use it to do implicit NULL check in address. |
|
36ccc817fca4
6747051: Improve code and implicit null check generation for compressed oops
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parents:
367
diff
changeset
|
2282 // |
|
36ccc817fca4
6747051: Improve code and implicit null check generation for compressed oops
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367
diff
changeset
|
2283 // DecodeN node was pinned to non-null path (orig_proj) during |
|
36ccc817fca4
6747051: Improve code and implicit null check generation for compressed oops
kvn
parents:
367
diff
changeset
|
2284 // CastPP transformation in final_graph_reshaping_impl(). |
|
36ccc817fca4
6747051: Improve code and implicit null check generation for compressed oops
kvn
parents:
367
diff
changeset
|
2285 // |
|
36ccc817fca4
6747051: Improve code and implicit null check generation for compressed oops
kvn
parents:
367
diff
changeset
|
2286 uint cnt = orig_proj->outcnt(); |
|
36ccc817fca4
6747051: Improve code and implicit null check generation for compressed oops
kvn
parents:
367
diff
changeset
|
2287 for (uint i = 0; i < orig_proj->outcnt(); i++) { |
|
36ccc817fca4
6747051: Improve code and implicit null check generation for compressed oops
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parents:
367
diff
changeset
|
2288 Node* d = orig_proj->raw_out(i); |
|
36ccc817fca4
6747051: Improve code and implicit null check generation for compressed oops
kvn
parents:
367
diff
changeset
|
2289 if (d->is_DecodeN() && d->in(1) == val) { |
|
36ccc817fca4
6747051: Improve code and implicit null check generation for compressed oops
kvn
parents:
367
diff
changeset
|
2290 val = d; |
|
36ccc817fca4
6747051: Improve code and implicit null check generation for compressed oops
kvn
parents:
367
diff
changeset
|
2291 val->set_req(0, NULL); // Unpin now. |
|
1575
3657cb01ffc5
6954029: Improve implicit null check generation with compressed oops
kvn
parents:
1203
diff
changeset
|
2292 // Mark this as special case to distinguish from |
|
3657cb01ffc5
6954029: Improve implicit null check generation with compressed oops
kvn
parents:
1203
diff
changeset
|
2293 // a regular case: CmpP(DecodeN, NULL). |
|
3657cb01ffc5
6954029: Improve implicit null check generation with compressed oops
kvn
parents:
1203
diff
changeset
|
2294 val = (Node*)(((intptr_t)val) | 1); |
|
368
36ccc817fca4
6747051: Improve code and implicit null check generation for compressed oops
kvn
parents:
367
diff
changeset
|
2295 break; |
|
36ccc817fca4
6747051: Improve code and implicit null check generation for compressed oops
kvn
parents:
367
diff
changeset
|
2296 } |
|
36ccc817fca4
6747051: Improve code and implicit null check generation for compressed oops
kvn
parents:
367
diff
changeset
|
2297 } |
|
36ccc817fca4
6747051: Improve code and implicit null check generation for compressed oops
kvn
parents:
367
diff
changeset
|
2298 } |
|
36ccc817fca4
6747051: Improve code and implicit null check generation for compressed oops
kvn
parents:
367
diff
changeset
|
2299 #endif |
|
36ccc817fca4
6747051: Improve code and implicit null check generation for compressed oops
kvn
parents:
367
diff
changeset
|
2300 _null_check_tests.push(val); |
|
36ccc817fca4
6747051: Improve code and implicit null check generation for compressed oops
kvn
parents:
367
diff
changeset
|
2301 } |
| 0 | 2302 } |
| 2303 } | |
| 2304 } | |
| 2305 | |
| 2306 //---------------------------validate_null_checks------------------------------ | |
| 2307 // Its possible that the value being NULL checked is not the root of a match | |
| 2308 // tree. If so, I cannot use the value in an implicit null check. | |
| 2309 void Matcher::validate_null_checks( ) { | |
| 2310 uint cnt = _null_check_tests.size(); | |
| 2311 for( uint i=0; i < cnt; i+=2 ) { | |
| 2312 Node *test = _null_check_tests[i]; | |
| 2313 Node *val = _null_check_tests[i+1]; | |
|
1575
3657cb01ffc5
6954029: Improve implicit null check generation with compressed oops
kvn
parents:
1203
diff
changeset
|
2314 bool is_decoden = ((intptr_t)val) & 1; |
|
3657cb01ffc5
6954029: Improve implicit null check generation with compressed oops
kvn
parents:
1203
diff
changeset
|
2315 val = (Node*)(((intptr_t)val) & ~1); |
| 0 | 2316 if (has_new_node(val)) { |
|
1575
3657cb01ffc5
6954029: Improve implicit null check generation with compressed oops
kvn
parents:
1203
diff
changeset
|
2317 Node* new_val = new_node(val); |
|
3657cb01ffc5
6954029: Improve implicit null check generation with compressed oops
kvn
parents:
1203
diff
changeset
|
2318 if (is_decoden) { |
|
6848
8e47bac5643a
7054512: Compress class pointers after perm gen removal
roland
parents:
6804
diff
changeset
|
2319 assert(val->is_DecodeNarrowPtr() && val->in(0) == NULL, "sanity"); |
|
1575
3657cb01ffc5
6954029: Improve implicit null check generation with compressed oops
kvn
parents:
1203
diff
changeset
|
2320 // Note: new_val may have a control edge if |
|
3657cb01ffc5
6954029: Improve implicit null check generation with compressed oops
kvn
parents:
1203
diff
changeset
|
2321 // the original ideal node DecodeN was matched before |
|
3657cb01ffc5
6954029: Improve implicit null check generation with compressed oops
kvn
parents:
1203
diff
changeset
|
2322 // it was unpinned in Matcher::collect_null_checks(). |
|
3657cb01ffc5
6954029: Improve implicit null check generation with compressed oops
kvn
parents:
1203
diff
changeset
|
2323 // Unpin the mach node and mark it. |
|
3657cb01ffc5
6954029: Improve implicit null check generation with compressed oops
kvn
parents:
1203
diff
changeset
|
2324 new_val->set_req(0, NULL); |
|
3657cb01ffc5
6954029: Improve implicit null check generation with compressed oops
kvn
parents:
1203
diff
changeset
|
2325 new_val = (Node*)(((intptr_t)new_val) | 1); |
|
3657cb01ffc5
6954029: Improve implicit null check generation with compressed oops
kvn
parents:
1203
diff
changeset
|
2326 } |
| 0 | 2327 // Is a match-tree root, so replace with the matched value |
|
1575
3657cb01ffc5
6954029: Improve implicit null check generation with compressed oops
kvn
parents:
1203
diff
changeset
|
2328 _null_check_tests.map(i+1, new_val); |
| 0 | 2329 } else { |
| 2330 // Yank from candidate list | |
| 2331 _null_check_tests.map(i+1,_null_check_tests[--cnt]); | |
| 2332 _null_check_tests.map(i,_null_check_tests[--cnt]); | |
| 2333 _null_check_tests.pop(); | |
| 2334 _null_check_tests.pop(); | |
| 2335 i-=2; | |
| 2336 } | |
| 2337 } | |
| 2338 } | |
| 2339 | |
| 2340 // Used by the DFA in dfa_xxx.cpp. Check for a following barrier or | |
| 2341 // atomic instruction acting as a store_load barrier without any | |
| 2342 // intervening volatile load, and thus we don't need a barrier here. | |
| 2343 // We retain the Node to act as a compiler ordering barrier. | |
|
11164
fcf521c3fbc6
8007898: Incorrect optimization of Memory Barriers in Matcher::post_store_load_barrier()
kvn
parents:
11003
diff
changeset
|
2344 bool Matcher::post_store_load_barrier(const Node* vmb) { |
|
fcf521c3fbc6
8007898: Incorrect optimization of Memory Barriers in Matcher::post_store_load_barrier()
kvn
parents:
11003
diff
changeset
|
2345 Compile* C = Compile::current(); |
|
fcf521c3fbc6
8007898: Incorrect optimization of Memory Barriers in Matcher::post_store_load_barrier()
kvn
parents:
11003
diff
changeset
|
2346 assert(vmb->is_MemBar(), ""); |
|
14439
50fdb38839eb
8028515: PPPC64 (part 113.2): opto: Introduce LoadFence/StoreFence.
goetz
parents:
14435
diff
changeset
|
2347 assert(vmb->Opcode() != Op_MemBarAcquire && vmb->Opcode() != Op_LoadFence, ""); |
|
11164
fcf521c3fbc6
8007898: Incorrect optimization of Memory Barriers in Matcher::post_store_load_barrier()
kvn
parents:
11003
diff
changeset
|
2348 const MemBarNode* membar = vmb->as_MemBar(); |
| 0 | 2349 |
|
11164
fcf521c3fbc6
8007898: Incorrect optimization of Memory Barriers in Matcher::post_store_load_barrier()
kvn
parents:
11003
diff
changeset
|
2350 // Get the Ideal Proj node, ctrl, that can be used to iterate forward |
|
fcf521c3fbc6
8007898: Incorrect optimization of Memory Barriers in Matcher::post_store_load_barrier()
kvn
parents:
11003
diff
changeset
|
2351 Node* ctrl = NULL; |
|
fcf521c3fbc6
8007898: Incorrect optimization of Memory Barriers in Matcher::post_store_load_barrier()
kvn
parents:
11003
diff
changeset
|
2352 for (DUIterator_Fast imax, i = membar->fast_outs(imax); i < imax; i++) { |
|
fcf521c3fbc6
8007898: Incorrect optimization of Memory Barriers in Matcher::post_store_load_barrier()
kvn
parents:
11003
diff
changeset
|
2353 Node* p = membar->fast_out(i); |
|
fcf521c3fbc6
8007898: Incorrect optimization of Memory Barriers in Matcher::post_store_load_barrier()
kvn
parents:
11003
diff
changeset
|
2354 assert(p->is_Proj(), "only projections here"); |
|
fcf521c3fbc6
8007898: Incorrect optimization of Memory Barriers in Matcher::post_store_load_barrier()
kvn
parents:
11003
diff
changeset
|
2355 if ((p->as_Proj()->_con == TypeFunc::Control) && |
|
fcf521c3fbc6
8007898: Incorrect optimization of Memory Barriers in Matcher::post_store_load_barrier()
kvn
parents:
11003
diff
changeset
|
2356 !C->node_arena()->contains(p)) { // Unmatched old-space only |
|
fcf521c3fbc6
8007898: Incorrect optimization of Memory Barriers in Matcher::post_store_load_barrier()
kvn
parents:
11003
diff
changeset
|
2357 ctrl = p; |
| 0 | 2358 break; |
|
11164
fcf521c3fbc6
8007898: Incorrect optimization of Memory Barriers in Matcher::post_store_load_barrier()
kvn
parents:
11003
diff
changeset
|
2359 } |
| 0 | 2360 } |
|
11164
fcf521c3fbc6
8007898: Incorrect optimization of Memory Barriers in Matcher::post_store_load_barrier()
kvn
parents:
11003
diff
changeset
|
2361 assert((ctrl != NULL), "missing control projection"); |
| 0 | 2362 |
|
11164
fcf521c3fbc6
8007898: Incorrect optimization of Memory Barriers in Matcher::post_store_load_barrier()
kvn
parents:
11003
diff
changeset
|
2363 for (DUIterator_Fast jmax, j = ctrl->fast_outs(jmax); j < jmax; j++) { |
| 0 | 2364 Node *x = ctrl->fast_out(j); |
| 2365 int xop = x->Opcode(); | |
| 2366 | |
| 2367 // We don't need current barrier if we see another or a lock | |
| 2368 // before seeing volatile load. | |
| 2369 // | |
| 2370 // Op_Fastunlock previously appeared in the Op_* list below. | |
| 2371 // With the advent of 1-0 lock operations we're no longer guaranteed | |
| 2372 // that a monitor exit operation contains a serializing instruction. | |
| 2373 | |
| 2374 if (xop == Op_MemBarVolatile || | |
| 2375 xop == Op_CompareAndSwapL || | |
| 2376 xop == Op_CompareAndSwapP || | |
|
113
ba764ed4b6f2
6420645: Create a vm that uses compressed oops for up to 32gb heapsizes
coleenp
parents:
63
diff
changeset
|
2377 xop == Op_CompareAndSwapN || |
|
11164
fcf521c3fbc6
8007898: Incorrect optimization of Memory Barriers in Matcher::post_store_load_barrier()
kvn
parents:
11003
diff
changeset
|
2378 xop == Op_CompareAndSwapI) { |
| 0 | 2379 return true; |
|
11164
fcf521c3fbc6
8007898: Incorrect optimization of Memory Barriers in Matcher::post_store_load_barrier()
kvn
parents:
11003
diff
changeset
|
2380 } |
|
fcf521c3fbc6
8007898: Incorrect optimization of Memory Barriers in Matcher::post_store_load_barrier()
kvn
parents:
11003
diff
changeset
|
2381 |
|
fcf521c3fbc6
8007898: Incorrect optimization of Memory Barriers in Matcher::post_store_load_barrier()
kvn
parents:
11003
diff
changeset
|
2382 // Op_FastLock previously appeared in the Op_* list above. |
|
fcf521c3fbc6
8007898: Incorrect optimization of Memory Barriers in Matcher::post_store_load_barrier()
kvn
parents:
11003
diff
changeset
|
2383 // With biased locking we're no longer guaranteed that a monitor |
|
fcf521c3fbc6
8007898: Incorrect optimization of Memory Barriers in Matcher::post_store_load_barrier()
kvn
parents:
11003
diff
changeset
|
2384 // enter operation contains a serializing instruction. |
|
fcf521c3fbc6
8007898: Incorrect optimization of Memory Barriers in Matcher::post_store_load_barrier()
kvn
parents:
11003
diff
changeset
|
2385 if ((xop == Op_FastLock) && !UseBiasedLocking) { |
|
fcf521c3fbc6
8007898: Incorrect optimization of Memory Barriers in Matcher::post_store_load_barrier()
kvn
parents:
11003
diff
changeset
|
2386 return true; |
|
fcf521c3fbc6
8007898: Incorrect optimization of Memory Barriers in Matcher::post_store_load_barrier()
kvn
parents:
11003
diff
changeset
|
2387 } |
| 0 | 2388 |
| 2389 if (x->is_MemBar()) { | |
| 2390 // We must retain this membar if there is an upcoming volatile | |
|
11164
fcf521c3fbc6
8007898: Incorrect optimization of Memory Barriers in Matcher::post_store_load_barrier()
kvn
parents:
11003
diff
changeset
|
2391 // load, which will be followed by acquire membar. |
|
14439
50fdb38839eb
8028515: PPPC64 (part 113.2): opto: Introduce LoadFence/StoreFence.
goetz
parents:
14435
diff
changeset
|
2392 if (xop == Op_MemBarAcquire || xop == Op_LoadFence) { |
| 0 | 2393 return false; |
|
11164
fcf521c3fbc6
8007898: Incorrect optimization of Memory Barriers in Matcher::post_store_load_barrier()
kvn
parents:
11003
diff
changeset
|
2394 } else { |
|
fcf521c3fbc6
8007898: Incorrect optimization of Memory Barriers in Matcher::post_store_load_barrier()
kvn
parents:
11003
diff
changeset
|
2395 // For other kinds of barriers, check by pretending we |
|
fcf521c3fbc6
8007898: Incorrect optimization of Memory Barriers in Matcher::post_store_load_barrier()
kvn
parents:
11003
diff
changeset
|
2396 // are them, and seeing if we can be removed. |
|
fcf521c3fbc6
8007898: Incorrect optimization of Memory Barriers in Matcher::post_store_load_barrier()
kvn
parents:
11003
diff
changeset
|
2397 return post_store_load_barrier(x->as_MemBar()); |
|
fcf521c3fbc6
8007898: Incorrect optimization of Memory Barriers in Matcher::post_store_load_barrier()
kvn
parents:
11003
diff
changeset
|
2398 } |
| 0 | 2399 } |
| 2400 | |
|
11164
fcf521c3fbc6
8007898: Incorrect optimization of Memory Barriers in Matcher::post_store_load_barrier()
kvn
parents:
11003
diff
changeset
|
2401 // probably not necessary to check for these |
|
fcf521c3fbc6
8007898: Incorrect optimization of Memory Barriers in Matcher::post_store_load_barrier()
kvn
parents:
11003
diff
changeset
|
2402 if (x->is_Call() || x->is_SafePoint() || x->is_block_proj()) { |
|
fcf521c3fbc6
8007898: Incorrect optimization of Memory Barriers in Matcher::post_store_load_barrier()
kvn
parents:
11003
diff
changeset
|
2403 return false; |
| 0 | 2404 } |
| 2405 } | |
| 2406 return false; | |
| 2407 } | |
| 2408 | |
|
14440
41b780b43b74
8029015: PPC64 (part 216): opto: trap based null and range checks
goetz
parents:
14439
diff
changeset
|
2409 // Check whether node n is a branch to an uncommon trap that we could |
|
41b780b43b74
8029015: PPC64 (part 216): opto: trap based null and range checks
goetz
parents:
14439
diff
changeset
|
2410 // optimize as test with very high branch costs in case of going to |
|
41b780b43b74
8029015: PPC64 (part 216): opto: trap based null and range checks
goetz
parents:
14439
diff
changeset
|
2411 // the uncommon trap. The code must be able to be recompiled to use |
|
41b780b43b74
8029015: PPC64 (part 216): opto: trap based null and range checks
goetz
parents:
14439
diff
changeset
|
2412 // a cheaper test. |
|
41b780b43b74
8029015: PPC64 (part 216): opto: trap based null and range checks
goetz
parents:
14439
diff
changeset
|
2413 bool Matcher::branches_to_uncommon_trap(const Node *n) { |
|
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2414 // Don't do it for natives, adapters, or runtime stubs |
|
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2415 Compile *C = Compile::current(); |
|
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2416 if (!C->is_method_compilation()) return false; |
|
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2417 |
|
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2418 assert(n->is_If(), "You should only call this on if nodes."); |
|
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2419 IfNode *ifn = n->as_If(); |
|
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2420 |
|
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2421 Node *ifFalse = NULL; |
|
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2422 for (DUIterator_Fast imax, i = ifn->fast_outs(imax); i < imax; i++) { |
|
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2423 if (ifn->fast_out(i)->is_IfFalse()) { |
|
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2424 ifFalse = ifn->fast_out(i); |
|
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2425 break; |
|
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|
2426 } |
|
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2427 } |
|
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2428 assert(ifFalse, "An If should have an ifFalse. Graph is broken."); |
|
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2429 |
|
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|
2430 Node *reg = ifFalse; |
|
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2431 int cnt = 4; // We must protect against cycles. Limit to 4 iterations. |
|
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2432 // Alternatively use visited set? Seems too expensive. |
|
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2433 while (reg != NULL && cnt > 0) { |
|
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|
2434 CallNode *call = NULL; |
|
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|
2435 RegionNode *nxt_reg = NULL; |
|
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2436 for (DUIterator_Fast imax, i = reg->fast_outs(imax); i < imax; i++) { |
|
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2437 Node *o = reg->fast_out(i); |
|
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|
2438 if (o->is_Call()) { |
|
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|
2439 call = o->as_Call(); |
|
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|
2440 } |
|
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|
2441 if (o->is_Region()) { |
|
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|
2442 nxt_reg = o->as_Region(); |
|
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|
2443 } |
|
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|
2444 } |
|
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|
2445 |
|
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|
2446 if (call && |
|
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|
2447 call->entry_point() == SharedRuntime::uncommon_trap_blob()->entry_point()) { |
|
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|
2448 const Type* trtype = call->in(TypeFunc::Parms)->bottom_type(); |
|
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2449 if (trtype->isa_int() && trtype->is_int()->is_con()) { |
|
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|
2450 jint tr_con = trtype->is_int()->get_con(); |
|
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|
2451 Deoptimization::DeoptReason reason = Deoptimization::trap_request_reason(tr_con); |
|
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|
2452 Deoptimization::DeoptAction action = Deoptimization::trap_request_action(tr_con); |
|
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|
2453 assert((int)reason < (int)BitsPerInt, "recode bit map"); |
|
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|
2454 |
|
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|
2455 if (is_set_nth_bit(C->allowed_deopt_reasons(), (int)reason) |
|
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|
2456 && action != Deoptimization::Action_none) { |
|
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|
2457 // This uncommon trap is sure to recompile, eventually. |
|
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|
2458 // When that happens, C->too_many_traps will prevent |
|
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|
2459 // this transformation from happening again. |
|
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|
2460 return true; |
|
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|
2461 } |
|
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|
2462 } |
|
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|
2463 } |
|
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|
2464 |
|
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|
2465 reg = nxt_reg; |
|
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|
2466 cnt--; |
|
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|
2467 } |
|
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|
2468 |
|
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changeset
|
2469 return false; |
|
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diff
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|
2470 } |
|
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|
2471 |
| 0 | 2472 //============================================================================= |
| 2473 //---------------------------State--------------------------------------------- | |
| 2474 State::State(void) { | |
| 2475 #ifdef ASSERT | |
| 2476 _id = 0; | |
| 2477 _kids[0] = _kids[1] = (State*)(intptr_t) CONST64(0xcafebabecafebabe); | |
| 2478 _leaf = (Node*)(intptr_t) CONST64(0xbaadf00dbaadf00d); | |
| 2479 //memset(_cost, -1, sizeof(_cost)); | |
| 2480 //memset(_rule, -1, sizeof(_rule)); | |
| 2481 #endif | |
| 2482 memset(_valid, 0, sizeof(_valid)); | |
| 2483 } | |
| 2484 | |
| 2485 #ifdef ASSERT | |
| 2486 State::~State() { | |
| 2487 _id = 99; | |
| 2488 _kids[0] = _kids[1] = (State*)(intptr_t) CONST64(0xcafebabecafebabe); | |
| 2489 _leaf = (Node*)(intptr_t) CONST64(0xbaadf00dbaadf00d); | |
| 2490 memset(_cost, -3, sizeof(_cost)); | |
| 2491 memset(_rule, -3, sizeof(_rule)); | |
| 2492 } | |
| 2493 #endif | |
| 2494 | |
| 2495 #ifndef PRODUCT | |
| 2496 //---------------------------dump---------------------------------------------- | |
| 2497 void State::dump() { | |
| 2498 tty->print("\n"); | |
| 2499 dump(0); | |
| 2500 } | |
| 2501 | |
| 2502 void State::dump(int depth) { | |
| 2503 for( int j = 0; j < depth; j++ ) | |
| 2504 tty->print(" "); | |
| 2505 tty->print("--N: "); | |
| 2506 _leaf->dump(); | |
| 2507 uint i; | |
| 2508 for( i = 0; i < _LAST_MACH_OPER; i++ ) | |
| 2509 // Check for valid entry | |
| 2510 if( valid(i) ) { | |
| 2511 for( int j = 0; j < depth; j++ ) | |
| 2512 tty->print(" "); | |
| 2513 assert(_cost[i] != max_juint, "cost must be a valid value"); | |
| 2514 assert(_rule[i] < _last_Mach_Node, "rule[i] must be valid rule"); | |
| 2515 tty->print_cr("%s %d %s", | |
| 2516 ruleName[i], _cost[i], ruleName[_rule[i]] ); | |
| 2517 } | |
| 2518 tty->print_cr(""); | |
| 2519 | |
| 2520 for( i=0; i<2; i++ ) | |
| 2521 if( _kids[i] ) | |
| 2522 _kids[i]->dump(depth+1); | |
| 2523 } | |
| 2524 #endif |