Mercurial > hg > graal-compiler
annotate src/cpu/x86/vm/assembler_x86.cpp @ 9004:9f3a77848ea2
Merge with d2c34ddac70fe8636b79944417f44d396c0f9acf
author | Michael Haupt <michael.haupt@oracle.com> |
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date | Thu, 11 Apr 2013 11:26:38 +0200 |
parents | 5fc51c1ecdeb |
children | 89e4d67fdd2a |
rev | line source |
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0 | 1 /* |
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2 * Copyright (c) 1997, 2012, Oracle and/or its affiliates. All rights reserved. |
0 | 3 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. |
4 * | |
5 * This code is free software; you can redistribute it and/or modify it | |
6 * under the terms of the GNU General Public License version 2 only, as | |
7 * published by the Free Software Foundation. | |
8 * | |
9 * This code is distributed in the hope that it will be useful, but WITHOUT | |
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or | |
11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License | |
12 * version 2 for more details (a copy is included in the LICENSE file that | |
13 * accompanied this code). | |
14 * | |
15 * You should have received a copy of the GNU General Public License version | |
16 * 2 along with this work; if not, write to the Free Software Foundation, | |
17 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA. | |
18 * | |
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19 * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA |
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20 * or visit www.oracle.com if you need additional information or have any |
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21 * questions. |
0 | 22 * |
23 */ | |
24 | |
1972 | 25 #include "precompiled.hpp" |
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26 #include "asm/assembler.hpp" |
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27 #include "asm/assembler.inline.hpp" |
1972 | 28 #include "gc_interface/collectedHeap.inline.hpp" |
29 #include "interpreter/interpreter.hpp" | |
30 #include "memory/cardTableModRefBS.hpp" | |
31 #include "memory/resourceArea.hpp" | |
32 #include "prims/methodHandles.hpp" | |
33 #include "runtime/biasedLocking.hpp" | |
34 #include "runtime/interfaceSupport.hpp" | |
35 #include "runtime/objectMonitor.hpp" | |
36 #include "runtime/os.hpp" | |
37 #include "runtime/sharedRuntime.hpp" | |
38 #include "runtime/stubRoutines.hpp" | |
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39 #include "utilities/macros.hpp" |
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40 #if INCLUDE_ALL_GCS |
1972 | 41 #include "gc_implementation/g1/g1CollectedHeap.inline.hpp" |
42 #include "gc_implementation/g1/g1SATBCardTableModRefBS.hpp" | |
43 #include "gc_implementation/g1/heapRegion.hpp" | |
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44 #endif // INCLUDE_ALL_GCS |
0 | 45 |
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46 #ifdef PRODUCT |
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47 #define BLOCK_COMMENT(str) /* nothing */ |
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48 #define STOP(error) stop(error) |
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49 #else |
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50 #define BLOCK_COMMENT(str) block_comment(str) |
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51 #define STOP(error) block_comment(error); stop(error) |
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52 #endif |
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53 |
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54 #define BIND(label) bind(label); BLOCK_COMMENT(#label ":") |
0 | 55 // Implementation of AddressLiteral |
56 | |
57 AddressLiteral::AddressLiteral(address target, relocInfo::relocType rtype) { | |
58 _is_lval = false; | |
59 _target = target; | |
60 switch (rtype) { | |
61 case relocInfo::oop_type: | |
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62 case relocInfo::metadata_type: |
0 | 63 // Oops are a special case. Normally they would be their own section |
64 // but in cases like icBuffer they are literals in the code stream that | |
65 // we don't have a section for. We use none so that we get a literal address | |
66 // which is always patchable. | |
67 break; | |
68 case relocInfo::external_word_type: | |
69 _rspec = external_word_Relocation::spec(target); | |
70 break; | |
71 case relocInfo::internal_word_type: | |
72 _rspec = internal_word_Relocation::spec(target); | |
73 break; | |
74 case relocInfo::opt_virtual_call_type: | |
75 _rspec = opt_virtual_call_Relocation::spec(); | |
76 break; | |
77 case relocInfo::static_call_type: | |
78 _rspec = static_call_Relocation::spec(); | |
79 break; | |
80 case relocInfo::runtime_call_type: | |
81 _rspec = runtime_call_Relocation::spec(); | |
82 break; | |
83 case relocInfo::poll_type: | |
84 case relocInfo::poll_return_type: | |
85 _rspec = Relocation::spec_simple(rtype); | |
86 break; | |
87 case relocInfo::none: | |
88 break; | |
89 default: | |
90 ShouldNotReachHere(); | |
91 break; | |
92 } | |
93 } | |
94 | |
95 // Implementation of Address | |
96 | |
304 | 97 #ifdef _LP64 |
98 | |
0 | 99 Address Address::make_array(ArrayAddress adr) { |
100 // Not implementable on 64bit machines | |
101 // Should have been handled higher up the call chain. | |
102 ShouldNotReachHere(); | |
304 | 103 return Address(); |
104 } | |
105 | |
106 // exceedingly dangerous constructor | |
107 Address::Address(int disp, address loc, relocInfo::relocType rtype) { | |
108 _base = noreg; | |
109 _index = noreg; | |
110 _scale = no_scale; | |
111 _disp = disp; | |
112 switch (rtype) { | |
113 case relocInfo::external_word_type: | |
114 _rspec = external_word_Relocation::spec(loc); | |
115 break; | |
116 case relocInfo::internal_word_type: | |
117 _rspec = internal_word_Relocation::spec(loc); | |
118 break; | |
119 case relocInfo::runtime_call_type: | |
120 // HMM | |
121 _rspec = runtime_call_Relocation::spec(); | |
122 break; | |
123 case relocInfo::poll_type: | |
124 case relocInfo::poll_return_type: | |
125 _rspec = Relocation::spec_simple(rtype); | |
126 break; | |
127 case relocInfo::none: | |
128 break; | |
129 default: | |
130 ShouldNotReachHere(); | |
131 } | |
132 } | |
133 #else // LP64 | |
134 | |
135 Address Address::make_array(ArrayAddress adr) { | |
0 | 136 AddressLiteral base = adr.base(); |
137 Address index = adr.index(); | |
138 assert(index._disp == 0, "must not have disp"); // maybe it can? | |
139 Address array(index._base, index._index, index._scale, (intptr_t) base.target()); | |
140 array._rspec = base._rspec; | |
141 return array; | |
304 | 142 } |
0 | 143 |
144 // exceedingly dangerous constructor | |
145 Address::Address(address loc, RelocationHolder spec) { | |
146 _base = noreg; | |
147 _index = noreg; | |
148 _scale = no_scale; | |
149 _disp = (intptr_t) loc; | |
150 _rspec = spec; | |
151 } | |
304 | 152 |
0 | 153 #endif // _LP64 |
154 | |
304 | 155 |
156 | |
0 | 157 // Convert the raw encoding form into the form expected by the constructor for |
158 // Address. An index of 4 (rsp) corresponds to having no index, so convert | |
159 // that to noreg for the Address constructor. | |
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160 Address Address::make_raw(int base, int index, int scale, int disp, relocInfo::relocType disp_reloc) { |
624 | 161 RelocationHolder rspec; |
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162 if (disp_reloc != relocInfo::none) { |
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163 rspec = Relocation::spec_simple(disp_reloc); |
624 | 164 } |
0 | 165 bool valid_index = index != rsp->encoding(); |
166 if (valid_index) { | |
167 Address madr(as_Register(base), as_Register(index), (Address::ScaleFactor)scale, in_ByteSize(disp)); | |
624 | 168 madr._rspec = rspec; |
0 | 169 return madr; |
170 } else { | |
171 Address madr(as_Register(base), noreg, Address::no_scale, in_ByteSize(disp)); | |
624 | 172 madr._rspec = rspec; |
0 | 173 return madr; |
174 } | |
175 } | |
176 | |
177 // Implementation of Assembler | |
178 | |
179 int AbstractAssembler::code_fill_byte() { | |
180 return (u_char)'\xF4'; // hlt | |
181 } | |
182 | |
183 // make this go away someday | |
184 void Assembler::emit_data(jint data, relocInfo::relocType rtype, int format) { | |
185 if (rtype == relocInfo::none) | |
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186 emit_int32(data); |
0 | 187 else emit_data(data, Relocation::spec_simple(rtype), format); |
188 } | |
189 | |
190 void Assembler::emit_data(jint data, RelocationHolder const& rspec, int format) { | |
304 | 191 assert(imm_operand == 0, "default format must be immediate in this file"); |
0 | 192 assert(inst_mark() != NULL, "must be inside InstructionMark"); |
193 if (rspec.type() != relocInfo::none) { | |
194 #ifdef ASSERT | |
195 check_relocation(rspec, format); | |
196 #endif | |
197 // Do not use AbstractAssembler::relocate, which is not intended for | |
198 // embedded words. Instead, relocate to the enclosing instruction. | |
199 | |
200 // hack. call32 is too wide for mask so use disp32 | |
201 if (format == call32_operand) | |
202 code_section()->relocate(inst_mark(), rspec, disp32_operand); | |
203 else | |
204 code_section()->relocate(inst_mark(), rspec, format); | |
205 } | |
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206 emit_int32(data); |
0 | 207 } |
208 | |
304 | 209 static int encode(Register r) { |
210 int enc = r->encoding(); | |
211 if (enc >= 8) { | |
212 enc -= 8; | |
213 } | |
214 return enc; | |
215 } | |
216 | |
217 static int encode(XMMRegister r) { | |
218 int enc = r->encoding(); | |
219 if (enc >= 8) { | |
220 enc -= 8; | |
221 } | |
222 return enc; | |
223 } | |
0 | 224 |
225 void Assembler::emit_arith_b(int op1, int op2, Register dst, int imm8) { | |
226 assert(dst->has_byte_register(), "must have byte register"); | |
227 assert(isByte(op1) && isByte(op2), "wrong opcode"); | |
228 assert(isByte(imm8), "not a byte"); | |
229 assert((op1 & 0x01) == 0, "should be 8bit operation"); | |
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230 emit_int8(op1); |
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231 emit_int8(op2 | encode(dst)); |
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232 emit_int8(imm8); |
0 | 233 } |
234 | |
235 | |
304 | 236 void Assembler::emit_arith(int op1, int op2, Register dst, int32_t imm32) { |
0 | 237 assert(isByte(op1) && isByte(op2), "wrong opcode"); |
238 assert((op1 & 0x01) == 1, "should be 32bit operation"); | |
239 assert((op1 & 0x02) == 0, "sign-extension bit should not be set"); | |
240 if (is8bit(imm32)) { | |
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241 emit_int8(op1 | 0x02); // set sign bit |
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242 emit_int8(op2 | encode(dst)); |
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243 emit_int8(imm32 & 0xFF); |
0 | 244 } else { |
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245 emit_int8(op1); |
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246 emit_int8(op2 | encode(dst)); |
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247 emit_int32(imm32); |
0 | 248 } |
249 } | |
250 | |
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251 // Force generation of a 4 byte immediate value even if it fits into 8bit |
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252 void Assembler::emit_arith_imm32(int op1, int op2, Register dst, int32_t imm32) { |
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253 assert(isByte(op1) && isByte(op2), "wrong opcode"); |
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254 assert((op1 & 0x01) == 1, "should be 32bit operation"); |
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255 assert((op1 & 0x02) == 0, "sign-extension bit should not be set"); |
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256 emit_int8(op1); |
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257 emit_int8(op2 | encode(dst)); |
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258 emit_int32(imm32); |
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259 } |
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260 |
0 | 261 // immediate-to-memory forms |
304 | 262 void Assembler::emit_arith_operand(int op1, Register rm, Address adr, int32_t imm32) { |
0 | 263 assert((op1 & 0x01) == 1, "should be 32bit operation"); |
264 assert((op1 & 0x02) == 0, "sign-extension bit should not be set"); | |
265 if (is8bit(imm32)) { | |
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266 emit_int8(op1 | 0x02); // set sign bit |
304 | 267 emit_operand(rm, adr, 1); |
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268 emit_int8(imm32 & 0xFF); |
0 | 269 } else { |
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270 emit_int8(op1); |
304 | 271 emit_operand(rm, adr, 4); |
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272 emit_int32(imm32); |
0 | 273 } |
274 } | |
275 | |
276 | |
277 void Assembler::emit_arith(int op1, int op2, Register dst, Register src) { | |
278 assert(isByte(op1) && isByte(op2), "wrong opcode"); | |
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279 emit_int8(op1); |
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280 emit_int8(op2 | encode(dst) << 3 | encode(src)); |
304 | 281 } |
282 | |
283 | |
284 void Assembler::emit_operand(Register reg, Register base, Register index, | |
285 Address::ScaleFactor scale, int disp, | |
286 RelocationHolder const& rspec, | |
287 int rip_relative_correction) { | |
0 | 288 relocInfo::relocType rtype = (relocInfo::relocType) rspec.type(); |
304 | 289 |
290 // Encode the registers as needed in the fields they are used in | |
291 | |
292 int regenc = encode(reg) << 3; | |
293 int indexenc = index->is_valid() ? encode(index) << 3 : 0; | |
294 int baseenc = base->is_valid() ? encode(base) : 0; | |
295 | |
0 | 296 if (base->is_valid()) { |
297 if (index->is_valid()) { | |
298 assert(scale != Address::no_scale, "inconsistent address"); | |
299 // [base + index*scale + disp] | |
304 | 300 if (disp == 0 && rtype == relocInfo::none && |
301 base != rbp LP64_ONLY(&& base != r13)) { | |
0 | 302 // [base + index*scale] |
303 // [00 reg 100][ss index base] | |
304 assert(index != rsp, "illegal addressing mode"); | |
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305 emit_int8(0x04 | regenc); |
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306 emit_int8(scale << 6 | indexenc | baseenc); |
0 | 307 } else if (is8bit(disp) && rtype == relocInfo::none) { |
308 // [base + index*scale + imm8] | |
309 // [01 reg 100][ss index base] imm8 | |
310 assert(index != rsp, "illegal addressing mode"); | |
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311 emit_int8(0x44 | regenc); |
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312 emit_int8(scale << 6 | indexenc | baseenc); |
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313 emit_int8(disp & 0xFF); |
0 | 314 } else { |
304 | 315 // [base + index*scale + disp32] |
316 // [10 reg 100][ss index base] disp32 | |
0 | 317 assert(index != rsp, "illegal addressing mode"); |
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318 emit_int8(0x84 | regenc); |
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319 emit_int8(scale << 6 | indexenc | baseenc); |
0 | 320 emit_data(disp, rspec, disp32_operand); |
321 } | |
304 | 322 } else if (base == rsp LP64_ONLY(|| base == r12)) { |
323 // [rsp + disp] | |
0 | 324 if (disp == 0 && rtype == relocInfo::none) { |
304 | 325 // [rsp] |
0 | 326 // [00 reg 100][00 100 100] |
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327 emit_int8(0x04 | regenc); |
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328 emit_int8(0x24); |
0 | 329 } else if (is8bit(disp) && rtype == relocInfo::none) { |
304 | 330 // [rsp + imm8] |
331 // [01 reg 100][00 100 100] disp8 | |
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332 emit_int8(0x44 | regenc); |
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333 emit_int8(0x24); |
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334 emit_int8(disp & 0xFF); |
0 | 335 } else { |
304 | 336 // [rsp + imm32] |
337 // [10 reg 100][00 100 100] disp32 | |
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338 emit_int8(0x84 | regenc); |
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339 emit_int8(0x24); |
0 | 340 emit_data(disp, rspec, disp32_operand); |
341 } | |
342 } else { | |
343 // [base + disp] | |
304 | 344 assert(base != rsp LP64_ONLY(&& base != r12), "illegal addressing mode"); |
345 if (disp == 0 && rtype == relocInfo::none && | |
346 base != rbp LP64_ONLY(&& base != r13)) { | |
0 | 347 // [base] |
348 // [00 reg base] | |
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349 emit_int8(0x00 | regenc | baseenc); |
0 | 350 } else if (is8bit(disp) && rtype == relocInfo::none) { |
304 | 351 // [base + disp8] |
352 // [01 reg base] disp8 | |
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353 emit_int8(0x40 | regenc | baseenc); |
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354 emit_int8(disp & 0xFF); |
0 | 355 } else { |
304 | 356 // [base + disp32] |
357 // [10 reg base] disp32 | |
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358 emit_int8(0x80 | regenc | baseenc); |
0 | 359 emit_data(disp, rspec, disp32_operand); |
360 } | |
361 } | |
362 } else { | |
363 if (index->is_valid()) { | |
364 assert(scale != Address::no_scale, "inconsistent address"); | |
365 // [index*scale + disp] | |
304 | 366 // [00 reg 100][ss index 101] disp32 |
0 | 367 assert(index != rsp, "illegal addressing mode"); |
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368 emit_int8(0x04 | regenc); |
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369 emit_int8(scale << 6 | indexenc | 0x05); |
0 | 370 emit_data(disp, rspec, disp32_operand); |
304 | 371 } else if (rtype != relocInfo::none ) { |
372 // [disp] (64bit) RIP-RELATIVE (32bit) abs | |
373 // [00 000 101] disp32 | |
374 | |
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375 emit_int8(0x05 | regenc); |
304 | 376 // Note that the RIP-rel. correction applies to the generated |
377 // disp field, but _not_ to the target address in the rspec. | |
378 | |
379 // disp was created by converting the target address minus the pc | |
380 // at the start of the instruction. That needs more correction here. | |
381 // intptr_t disp = target - next_ip; | |
382 assert(inst_mark() != NULL, "must be inside InstructionMark"); | |
383 address next_ip = pc() + sizeof(int32_t) + rip_relative_correction; | |
384 int64_t adjusted = disp; | |
385 // Do rip-rel adjustment for 64bit | |
386 LP64_ONLY(adjusted -= (next_ip - inst_mark())); | |
387 assert(is_simm32(adjusted), | |
388 "must be 32bit offset (RIP relative address)"); | |
389 emit_data((int32_t) adjusted, rspec, disp32_operand); | |
390 | |
0 | 391 } else { |
304 | 392 // 32bit never did this, did everything as the rip-rel/disp code above |
393 // [disp] ABSOLUTE | |
394 // [00 reg 100][00 100 101] disp32 | |
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395 emit_int8(0x04 | regenc); |
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396 emit_int8(0x25); |
0 | 397 emit_data(disp, rspec, disp32_operand); |
398 } | |
399 } | |
400 } | |
401 | |
304 | 402 void Assembler::emit_operand(XMMRegister reg, Register base, Register index, |
403 Address::ScaleFactor scale, int disp, | |
404 RelocationHolder const& rspec) { | |
405 emit_operand((Register)reg, base, index, scale, disp, rspec); | |
406 } | |
407 | |
0 | 408 // Secret local extension to Assembler::WhichOperand: |
409 #define end_pc_operand (_WhichOperand_limit) | |
410 | |
411 address Assembler::locate_operand(address inst, WhichOperand which) { | |
412 // Decode the given instruction, and return the address of | |
413 // an embedded 32-bit operand word. | |
414 | |
415 // If "which" is disp32_operand, selects the displacement portion | |
416 // of an effective address specifier. | |
304 | 417 // If "which" is imm64_operand, selects the trailing immediate constant. |
0 | 418 // If "which" is call32_operand, selects the displacement of a call or jump. |
419 // Caller is responsible for ensuring that there is such an operand, | |
304 | 420 // and that it is 32/64 bits wide. |
0 | 421 |
422 // If "which" is end_pc_operand, find the end of the instruction. | |
423 | |
424 address ip = inst; | |
304 | 425 bool is_64bit = false; |
426 | |
427 debug_only(bool has_disp32 = false); | |
428 int tail_size = 0; // other random bytes (#32, #16, etc.) at end of insn | |
429 | |
430 again_after_prefix: | |
0 | 431 switch (0xFF & *ip++) { |
432 | |
433 // These convenience macros generate groups of "case" labels for the switch. | |
304 | 434 #define REP4(x) (x)+0: case (x)+1: case (x)+2: case (x)+3 |
435 #define REP8(x) (x)+0: case (x)+1: case (x)+2: case (x)+3: \ | |
0 | 436 case (x)+4: case (x)+5: case (x)+6: case (x)+7 |
304 | 437 #define REP16(x) REP8((x)+0): \ |
0 | 438 case REP8((x)+8) |
439 | |
440 case CS_segment: | |
441 case SS_segment: | |
442 case DS_segment: | |
443 case ES_segment: | |
444 case FS_segment: | |
445 case GS_segment: | |
304 | 446 // Seems dubious |
447 LP64_ONLY(assert(false, "shouldn't have that prefix")); | |
0 | 448 assert(ip == inst+1, "only one prefix allowed"); |
449 goto again_after_prefix; | |
450 | |
304 | 451 case 0x67: |
452 case REX: | |
453 case REX_B: | |
454 case REX_X: | |
455 case REX_XB: | |
456 case REX_R: | |
457 case REX_RB: | |
458 case REX_RX: | |
459 case REX_RXB: | |
460 NOT_LP64(assert(false, "64bit prefixes")); | |
461 goto again_after_prefix; | |
462 | |
463 case REX_W: | |
464 case REX_WB: | |
465 case REX_WX: | |
466 case REX_WXB: | |
467 case REX_WR: | |
468 case REX_WRB: | |
469 case REX_WRX: | |
470 case REX_WRXB: | |
471 NOT_LP64(assert(false, "64bit prefixes")); | |
472 is_64bit = true; | |
473 goto again_after_prefix; | |
474 | |
475 case 0xFF: // pushq a; decl a; incl a; call a; jmp a | |
0 | 476 case 0x88: // movb a, r |
477 case 0x89: // movl a, r | |
478 case 0x8A: // movb r, a | |
479 case 0x8B: // movl r, a | |
480 case 0x8F: // popl a | |
304 | 481 debug_only(has_disp32 = true); |
0 | 482 break; |
483 | |
304 | 484 case 0x68: // pushq #32 |
485 if (which == end_pc_operand) { | |
486 return ip + 4; | |
487 } | |
488 assert(which == imm_operand && !is_64bit, "pushl has no disp32 or 64bit immediate"); | |
0 | 489 return ip; // not produced by emit_operand |
490 | |
491 case 0x66: // movw ... (size prefix) | |
304 | 492 again_after_size_prefix2: |
0 | 493 switch (0xFF & *ip++) { |
304 | 494 case REX: |
495 case REX_B: | |
496 case REX_X: | |
497 case REX_XB: | |
498 case REX_R: | |
499 case REX_RB: | |
500 case REX_RX: | |
501 case REX_RXB: | |
502 case REX_W: | |
503 case REX_WB: | |
504 case REX_WX: | |
505 case REX_WXB: | |
506 case REX_WR: | |
507 case REX_WRB: | |
508 case REX_WRX: | |
509 case REX_WRXB: | |
510 NOT_LP64(assert(false, "64bit prefix found")); | |
511 goto again_after_size_prefix2; | |
0 | 512 case 0x8B: // movw r, a |
513 case 0x89: // movw a, r | |
304 | 514 debug_only(has_disp32 = true); |
0 | 515 break; |
516 case 0xC7: // movw a, #16 | |
304 | 517 debug_only(has_disp32 = true); |
0 | 518 tail_size = 2; // the imm16 |
519 break; | |
520 case 0x0F: // several SSE/SSE2 variants | |
521 ip--; // reparse the 0x0F | |
522 goto again_after_prefix; | |
523 default: | |
524 ShouldNotReachHere(); | |
525 } | |
526 break; | |
527 | |
304 | 528 case REP8(0xB8): // movl/q r, #32/#64(oop?) |
529 if (which == end_pc_operand) return ip + (is_64bit ? 8 : 4); | |
530 // these asserts are somewhat nonsensical | |
531 #ifndef _LP64 | |
5984 | 532 assert(which == imm_operand || which == disp32_operand, |
533 err_msg("which %d is_64_bit %d ip " INTPTR_FORMAT, which, is_64bit, ip)); | |
304 | 534 #else |
535 assert((which == call32_operand || which == imm_operand) && is_64bit || | |
5984 | 536 which == narrow_oop_operand && !is_64bit, |
537 err_msg("which %d is_64_bit %d ip " INTPTR_FORMAT, which, is_64bit, ip)); | |
304 | 538 #endif // _LP64 |
0 | 539 return ip; |
540 | |
541 case 0x69: // imul r, a, #32 | |
542 case 0xC7: // movl a, #32(oop?) | |
543 tail_size = 4; | |
304 | 544 debug_only(has_disp32 = true); // has both kinds of operands! |
0 | 545 break; |
546 | |
547 case 0x0F: // movx..., etc. | |
548 switch (0xFF & *ip++) { | |
4759 | 549 case 0x3A: // pcmpestri |
550 tail_size = 1; | |
551 case 0x38: // ptest, pmovzxbw | |
552 ip++; // skip opcode | |
553 debug_only(has_disp32 = true); // has both kinds of operands! | |
554 break; | |
555 | |
556 case 0x70: // pshufd r, r/a, #8 | |
557 debug_only(has_disp32 = true); // has both kinds of operands! | |
558 case 0x73: // psrldq r, #8 | |
559 tail_size = 1; | |
560 break; | |
561 | |
0 | 562 case 0x12: // movlps |
563 case 0x28: // movaps | |
564 case 0x2E: // ucomiss | |
565 case 0x2F: // comiss | |
566 case 0x54: // andps | |
567 case 0x55: // andnps | |
568 case 0x56: // orps | |
569 case 0x57: // xorps | |
570 case 0x6E: // movd | |
571 case 0x7E: // movd | |
4759 | 572 case 0xAE: // ldmxcsr, stmxcsr, fxrstor, fxsave, clflush |
304 | 573 debug_only(has_disp32 = true); |
0 | 574 break; |
575 | |
576 case 0xAD: // shrd r, a, %cl | |
577 case 0xAF: // imul r, a | |
304 | 578 case 0xBE: // movsbl r, a (movsxb) |
579 case 0xBF: // movswl r, a (movsxw) | |
580 case 0xB6: // movzbl r, a (movzxb) | |
581 case 0xB7: // movzwl r, a (movzxw) | |
0 | 582 case REP16(0x40): // cmovl cc, r, a |
583 case 0xB0: // cmpxchgb | |
584 case 0xB1: // cmpxchg | |
585 case 0xC1: // xaddl | |
586 case 0xC7: // cmpxchg8 | |
587 case REP16(0x90): // setcc a | |
304 | 588 debug_only(has_disp32 = true); |
0 | 589 // fall out of the switch to decode the address |
590 break; | |
304 | 591 |
4759 | 592 case 0xC4: // pinsrw r, a, #8 |
593 debug_only(has_disp32 = true); | |
594 case 0xC5: // pextrw r, r, #8 | |
595 tail_size = 1; // the imm8 | |
596 break; | |
597 | |
0 | 598 case 0xAC: // shrd r, a, #8 |
304 | 599 debug_only(has_disp32 = true); |
0 | 600 tail_size = 1; // the imm8 |
601 break; | |
304 | 602 |
0 | 603 case REP16(0x80): // jcc rdisp32 |
604 if (which == end_pc_operand) return ip + 4; | |
304 | 605 assert(which == call32_operand, "jcc has no disp32 or imm"); |
0 | 606 return ip; |
607 default: | |
608 ShouldNotReachHere(); | |
609 } | |
610 break; | |
611 | |
612 case 0x81: // addl a, #32; addl r, #32 | |
613 // also: orl, adcl, sbbl, andl, subl, xorl, cmpl | |
304 | 614 // on 32bit in the case of cmpl, the imm might be an oop |
0 | 615 tail_size = 4; |
304 | 616 debug_only(has_disp32 = true); // has both kinds of operands! |
0 | 617 break; |
618 | |
619 case 0x83: // addl a, #8; addl r, #8 | |
620 // also: orl, adcl, sbbl, andl, subl, xorl, cmpl | |
304 | 621 debug_only(has_disp32 = true); // has both kinds of operands! |
0 | 622 tail_size = 1; |
623 break; | |
624 | |
625 case 0x9B: | |
626 switch (0xFF & *ip++) { | |
627 case 0xD9: // fnstcw a | |
304 | 628 debug_only(has_disp32 = true); |
0 | 629 break; |
630 default: | |
631 ShouldNotReachHere(); | |
632 } | |
633 break; | |
634 | |
635 case REP4(0x00): // addb a, r; addl a, r; addb r, a; addl r, a | |
636 case REP4(0x10): // adc... | |
637 case REP4(0x20): // and... | |
638 case REP4(0x30): // xor... | |
639 case REP4(0x08): // or... | |
640 case REP4(0x18): // sbb... | |
641 case REP4(0x28): // sub... | |
304 | 642 case 0xF7: // mull a |
643 case 0x8D: // lea r, a | |
644 case 0x87: // xchg r, a | |
0 | 645 case REP4(0x38): // cmp... |
304 | 646 case 0x85: // test r, a |
647 debug_only(has_disp32 = true); // has both kinds of operands! | |
0 | 648 break; |
649 | |
650 case 0xC1: // sal a, #8; sar a, #8; shl a, #8; shr a, #8 | |
651 case 0xC6: // movb a, #8 | |
652 case 0x80: // cmpb a, #8 | |
653 case 0x6B: // imul r, a, #8 | |
304 | 654 debug_only(has_disp32 = true); // has both kinds of operands! |
0 | 655 tail_size = 1; // the imm8 |
656 break; | |
657 | |
4759 | 658 case 0xC4: // VEX_3bytes |
659 case 0xC5: // VEX_2bytes | |
660 assert((UseAVX > 0), "shouldn't have VEX prefix"); | |
661 assert(ip == inst+1, "no prefixes allowed"); | |
662 // C4 and C5 are also used as opcodes for PINSRW and PEXTRW instructions | |
663 // but they have prefix 0x0F and processed when 0x0F processed above. | |
664 // | |
665 // In 32-bit mode the VEX first byte C4 and C5 alias onto LDS and LES | |
666 // instructions (these instructions are not supported in 64-bit mode). | |
667 // To distinguish them bits [7:6] are set in the VEX second byte since | |
668 // ModRM byte can not be of the form 11xxxxxx in 32-bit mode. To set | |
669 // those VEX bits REX and vvvv bits are inverted. | |
670 // | |
671 // Fortunately C2 doesn't generate these instructions so we don't need | |
672 // to check for them in product version. | |
673 | |
674 // Check second byte | |
675 NOT_LP64(assert((0xC0 & *ip) == 0xC0, "shouldn't have LDS and LES instructions")); | |
676 | |
677 // First byte | |
678 if ((0xFF & *inst) == VEX_3bytes) { | |
679 ip++; // third byte | |
680 is_64bit = ((VEX_W & *ip) == VEX_W); | |
681 } | |
682 ip++; // opcode | |
683 // To find the end of instruction (which == end_pc_operand). | |
684 switch (0xFF & *ip) { | |
685 case 0x61: // pcmpestri r, r/a, #8 | |
686 case 0x70: // pshufd r, r/a, #8 | |
687 case 0x73: // psrldq r, #8 | |
688 tail_size = 1; // the imm8 | |
689 break; | |
690 default: | |
691 break; | |
692 } | |
693 ip++; // skip opcode | |
694 debug_only(has_disp32 = true); // has both kinds of operands! | |
695 break; | |
0 | 696 |
697 case 0xD1: // sal a, 1; sar a, 1; shl a, 1; shr a, 1 | |
698 case 0xD3: // sal a, %cl; sar a, %cl; shl a, %cl; shr a, %cl | |
699 case 0xD9: // fld_s a; fst_s a; fstp_s a; fldcw a | |
700 case 0xDD: // fld_d a; fst_d a; fstp_d a | |
701 case 0xDB: // fild_s a; fistp_s a; fld_x a; fstp_x a | |
702 case 0xDF: // fild_d a; fistp_d a | |
703 case 0xD8: // fadd_s a; fsubr_s a; fmul_s a; fdivr_s a; fcomp_s a | |
704 case 0xDC: // fadd_d a; fsubr_d a; fmul_d a; fdivr_d a; fcomp_d a | |
705 case 0xDE: // faddp_d a; fsubrp_d a; fmulp_d a; fdivrp_d a; fcompp_d a | |
304 | 706 debug_only(has_disp32 = true); |
0 | 707 break; |
708 | |
4759 | 709 case 0xE8: // call rdisp32 |
710 case 0xE9: // jmp rdisp32 | |
711 if (which == end_pc_operand) return ip + 4; | |
712 assert(which == call32_operand, "call has no disp32 or imm"); | |
713 return ip; | |
714 | |
420
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715 case 0xF0: // Lock |
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716 assert(os::is_MP(), "only on MP"); |
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717 goto again_after_prefix; |
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718 |
0 | 719 case 0xF3: // For SSE |
720 case 0xF2: // For SSE2 | |
304 | 721 switch (0xFF & *ip++) { |
722 case REX: | |
723 case REX_B: | |
724 case REX_X: | |
725 case REX_XB: | |
726 case REX_R: | |
727 case REX_RB: | |
728 case REX_RX: | |
729 case REX_RXB: | |
730 case REX_W: | |
731 case REX_WB: | |
732 case REX_WX: | |
733 case REX_WXB: | |
734 case REX_WR: | |
735 case REX_WRB: | |
736 case REX_WRX: | |
737 case REX_WRXB: | |
738 NOT_LP64(assert(false, "found 64bit prefix")); | |
739 ip++; | |
740 default: | |
741 ip++; | |
742 } | |
743 debug_only(has_disp32 = true); // has both kinds of operands! | |
0 | 744 break; |
745 | |
746 default: | |
747 ShouldNotReachHere(); | |
748 | |
304 | 749 #undef REP8 |
750 #undef REP16 | |
0 | 751 } |
752 | |
753 assert(which != call32_operand, "instruction is not a call, jmp, or jcc"); | |
304 | 754 #ifdef _LP64 |
755 assert(which != imm_operand, "instruction is not a movq reg, imm64"); | |
756 #else | |
757 // assert(which != imm_operand || has_imm32, "instruction has no imm32 field"); | |
758 assert(which != imm_operand || has_disp32, "instruction has no imm32 field"); | |
759 #endif // LP64 | |
760 assert(which != disp32_operand || has_disp32, "instruction has no disp32 field"); | |
0 | 761 |
762 // parse the output of emit_operand | |
763 int op2 = 0xFF & *ip++; | |
764 int base = op2 & 0x07; | |
765 int op3 = -1; | |
766 const int b100 = 4; | |
767 const int b101 = 5; | |
768 if (base == b100 && (op2 >> 6) != 3) { | |
769 op3 = 0xFF & *ip++; | |
770 base = op3 & 0x07; // refetch the base | |
771 } | |
772 // now ip points at the disp (if any) | |
773 | |
774 switch (op2 >> 6) { | |
775 case 0: | |
776 // [00 reg 100][ss index base] | |
304 | 777 // [00 reg 100][00 100 esp] |
0 | 778 // [00 reg base] |
779 // [00 reg 100][ss index 101][disp32] | |
780 // [00 reg 101] [disp32] | |
781 | |
782 if (base == b101) { | |
783 if (which == disp32_operand) | |
784 return ip; // caller wants the disp32 | |
785 ip += 4; // skip the disp32 | |
786 } | |
787 break; | |
788 | |
789 case 1: | |
790 // [01 reg 100][ss index base][disp8] | |
304 | 791 // [01 reg 100][00 100 esp][disp8] |
0 | 792 // [01 reg base] [disp8] |
793 ip += 1; // skip the disp8 | |
794 break; | |
795 | |
796 case 2: | |
797 // [10 reg 100][ss index base][disp32] | |
304 | 798 // [10 reg 100][00 100 esp][disp32] |
0 | 799 // [10 reg base] [disp32] |
800 if (which == disp32_operand) | |
801 return ip; // caller wants the disp32 | |
802 ip += 4; // skip the disp32 | |
803 break; | |
804 | |
805 case 3: | |
806 // [11 reg base] (not a memory addressing mode) | |
807 break; | |
808 } | |
809 | |
810 if (which == end_pc_operand) { | |
811 return ip + tail_size; | |
812 } | |
813 | |
304 | 814 #ifdef _LP64 |
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815 assert(which == narrow_oop_operand && !is_64bit, "instruction is not a movl adr, imm32"); |
304 | 816 #else |
817 assert(which == imm_operand, "instruction has only an imm field"); | |
818 #endif // LP64 | |
0 | 819 return ip; |
820 } | |
821 | |
822 address Assembler::locate_next_instruction(address inst) { | |
823 // Secretly share code with locate_operand: | |
824 return locate_operand(inst, end_pc_operand); | |
825 } | |
826 | |
827 | |
828 #ifdef ASSERT | |
829 void Assembler::check_relocation(RelocationHolder const& rspec, int format) { | |
830 address inst = inst_mark(); | |
831 assert(inst != NULL && inst < pc(), "must point to beginning of instruction"); | |
832 address opnd; | |
833 | |
834 Relocation* r = rspec.reloc(); | |
835 if (r->type() == relocInfo::none) { | |
836 return; | |
837 } else if (r->is_call() || format == call32_operand) { | |
838 // assert(format == imm32_operand, "cannot specify a nonzero format"); | |
839 opnd = locate_operand(inst, call32_operand); | |
840 } else if (r->is_data()) { | |
304 | 841 assert(format == imm_operand || format == disp32_operand |
842 LP64_ONLY(|| format == narrow_oop_operand), "format ok"); | |
0 | 843 opnd = locate_operand(inst, (WhichOperand)format); |
844 } else { | |
304 | 845 assert(format == imm_operand, "cannot specify a format"); |
0 | 846 return; |
847 } | |
848 assert(opnd == pc(), "must put operand where relocs can find it"); | |
849 } | |
304 | 850 #endif // ASSERT |
851 | |
852 void Assembler::emit_operand32(Register reg, Address adr) { | |
853 assert(reg->encoding() < 8, "no extended registers"); | |
854 assert(!adr.base_needs_rex() && !adr.index_needs_rex(), "no extended registers"); | |
855 emit_operand(reg, adr._base, adr._index, adr._scale, adr._disp, | |
856 adr._rspec); | |
857 } | |
858 | |
859 void Assembler::emit_operand(Register reg, Address adr, | |
860 int rip_relative_correction) { | |
861 emit_operand(reg, adr._base, adr._index, adr._scale, adr._disp, | |
862 adr._rspec, | |
863 rip_relative_correction); | |
864 } | |
865 | |
866 void Assembler::emit_operand(XMMRegister reg, Address adr) { | |
867 emit_operand(reg, adr._base, adr._index, adr._scale, adr._disp, | |
868 adr._rspec); | |
869 } | |
870 | |
871 // MMX operations | |
872 void Assembler::emit_operand(MMXRegister reg, Address adr) { | |
873 assert(!adr.base_needs_rex() && !adr.index_needs_rex(), "no extended registers"); | |
874 emit_operand((Register)reg, adr._base, adr._index, adr._scale, adr._disp, adr._rspec); | |
875 } | |
876 | |
877 // work around gcc (3.2.1-7a) bug | |
878 void Assembler::emit_operand(Address adr, MMXRegister reg) { | |
879 assert(!adr.base_needs_rex() && !adr.index_needs_rex(), "no extended registers"); | |
880 emit_operand((Register)reg, adr._base, adr._index, adr._scale, adr._disp, adr._rspec); | |
0 | 881 } |
882 | |
883 | |
884 void Assembler::emit_farith(int b1, int b2, int i) { | |
885 assert(isByte(b1) && isByte(b2), "wrong opcode"); | |
886 assert(0 <= i && i < 8, "illegal stack offset"); | |
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887 emit_int8(b1); |
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888 emit_int8(b2 + i); |
0 | 889 } |
890 | |
891 | |
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892 // Now the Assembler instructions (identical for 32/64 bits) |
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893 |
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894 void Assembler::adcl(Address dst, int32_t imm32) { |
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895 InstructionMark im(this); |
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896 prefix(dst); |
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897 emit_arith_operand(0x81, rdx, dst, imm32); |
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898 } |
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899 |
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900 void Assembler::adcl(Address dst, Register src) { |
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901 InstructionMark im(this); |
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902 prefix(dst, src); |
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903 emit_int8(0x11); |
2100
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904 emit_operand(src, dst); |
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905 } |
304 | 906 |
907 void Assembler::adcl(Register dst, int32_t imm32) { | |
908 prefix(dst); | |
0 | 909 emit_arith(0x81, 0xD0, dst, imm32); |
910 } | |
911 | |
912 void Assembler::adcl(Register dst, Address src) { | |
913 InstructionMark im(this); | |
304 | 914 prefix(src, dst); |
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915 emit_int8(0x13); |
0 | 916 emit_operand(dst, src); |
917 } | |
918 | |
919 void Assembler::adcl(Register dst, Register src) { | |
304 | 920 (void) prefix_and_encode(dst->encoding(), src->encoding()); |
0 | 921 emit_arith(0x13, 0xC0, dst, src); |
922 } | |
923 | |
304 | 924 void Assembler::addl(Address dst, int32_t imm32) { |
925 InstructionMark im(this); | |
926 prefix(dst); | |
927 emit_arith_operand(0x81, rax, dst, imm32); | |
928 } | |
0 | 929 |
930 void Assembler::addl(Address dst, Register src) { | |
931 InstructionMark im(this); | |
304 | 932 prefix(dst, src); |
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933 emit_int8(0x01); |
0 | 934 emit_operand(src, dst); |
935 } | |
936 | |
304 | 937 void Assembler::addl(Register dst, int32_t imm32) { |
938 prefix(dst); | |
0 | 939 emit_arith(0x81, 0xC0, dst, imm32); |
940 } | |
941 | |
942 void Assembler::addl(Register dst, Address src) { | |
943 InstructionMark im(this); | |
304 | 944 prefix(src, dst); |
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945 emit_int8(0x03); |
0 | 946 emit_operand(dst, src); |
947 } | |
948 | |
949 void Assembler::addl(Register dst, Register src) { | |
304 | 950 (void) prefix_and_encode(dst->encoding(), src->encoding()); |
0 | 951 emit_arith(0x03, 0xC0, dst, src); |
952 } | |
953 | |
954 void Assembler::addr_nop_4() { | |
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955 assert(UseAddressNop, "no CPU support"); |
0 | 956 // 4 bytes: NOP DWORD PTR [EAX+0] |
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957 emit_int8(0x0F); |
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958 emit_int8(0x1F); |
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959 emit_int8(0x40); // emit_rm(cbuf, 0x1, EAX_enc, EAX_enc); |
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960 emit_int8(0); // 8-bits offset (1 byte) |
0 | 961 } |
962 | |
963 void Assembler::addr_nop_5() { | |
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964 assert(UseAddressNop, "no CPU support"); |
0 | 965 // 5 bytes: NOP DWORD PTR [EAX+EAX*0+0] 8-bits offset |
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966 emit_int8(0x0F); |
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967 emit_int8(0x1F); |
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968 emit_int8(0x44); // emit_rm(cbuf, 0x1, EAX_enc, 0x4); |
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969 emit_int8(0x00); // emit_rm(cbuf, 0x0, EAX_enc, EAX_enc); |
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970 emit_int8(0); // 8-bits offset (1 byte) |
0 | 971 } |
972 | |
973 void Assembler::addr_nop_7() { | |
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974 assert(UseAddressNop, "no CPU support"); |
0 | 975 // 7 bytes: NOP DWORD PTR [EAX+0] 32-bits offset |
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976 emit_int8(0x0F); |
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977 emit_int8(0x1F); |
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978 emit_int8((unsigned char)0x80); |
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979 // emit_rm(cbuf, 0x2, EAX_enc, EAX_enc); |
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980 emit_int32(0); // 32-bits offset (4 bytes) |
0 | 981 } |
982 | |
983 void Assembler::addr_nop_8() { | |
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984 assert(UseAddressNop, "no CPU support"); |
0 | 985 // 8 bytes: NOP DWORD PTR [EAX+EAX*0+0] 32-bits offset |
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986 emit_int8(0x0F); |
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987 emit_int8(0x1F); |
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988 emit_int8((unsigned char)0x84); |
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989 // emit_rm(cbuf, 0x2, EAX_enc, 0x4); |
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990 emit_int8(0x00); // emit_rm(cbuf, 0x0, EAX_enc, EAX_enc); |
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991 emit_int32(0); // 32-bits offset (4 bytes) |
0 | 992 } |
993 | |
304 | 994 void Assembler::addsd(XMMRegister dst, XMMRegister src) { |
995 NOT_LP64(assert(VM_Version::supports_sse2(), "")); | |
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996 emit_simd_arith(0x58, dst, src, VEX_SIMD_F2); |
304 | 997 } |
998 | |
999 void Assembler::addsd(XMMRegister dst, Address src) { | |
1000 NOT_LP64(assert(VM_Version::supports_sse2(), "")); | |
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1001 emit_simd_arith(0x58, dst, src, VEX_SIMD_F2); |
304 | 1002 } |
1003 | |
1004 void Assembler::addss(XMMRegister dst, XMMRegister src) { | |
1005 NOT_LP64(assert(VM_Version::supports_sse(), "")); | |
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1006 emit_simd_arith(0x58, dst, src, VEX_SIMD_F3); |
304 | 1007 } |
1008 | |
1009 void Assembler::addss(XMMRegister dst, Address src) { | |
1010 NOT_LP64(assert(VM_Version::supports_sse(), "")); | |
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1011 emit_simd_arith(0x58, dst, src, VEX_SIMD_F3); |
304 | 1012 } |
1013 | |
6894 | 1014 void Assembler::aesdec(XMMRegister dst, Address src) { |
1015 assert(VM_Version::supports_aes(), ""); | |
1016 InstructionMark im(this); | |
1017 simd_prefix(dst, dst, src, VEX_SIMD_66, VEX_OPCODE_0F_38); | |
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1018 emit_int8((unsigned char)0xDE); |
6894 | 1019 emit_operand(dst, src); |
1020 } | |
1021 | |
1022 void Assembler::aesdec(XMMRegister dst, XMMRegister src) { | |
1023 assert(VM_Version::supports_aes(), ""); | |
1024 int encode = simd_prefix_and_encode(dst, dst, src, VEX_SIMD_66, VEX_OPCODE_0F_38); | |
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1025 emit_int8((unsigned char)0xDE); |
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1026 emit_int8(0xC0 | encode); |
6894 | 1027 } |
1028 | |
1029 void Assembler::aesdeclast(XMMRegister dst, Address src) { | |
1030 assert(VM_Version::supports_aes(), ""); | |
1031 InstructionMark im(this); | |
1032 simd_prefix(dst, dst, src, VEX_SIMD_66, VEX_OPCODE_0F_38); | |
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1033 emit_int8((unsigned char)0xDF); |
6894 | 1034 emit_operand(dst, src); |
1035 } | |
1036 | |
1037 void Assembler::aesdeclast(XMMRegister dst, XMMRegister src) { | |
1038 assert(VM_Version::supports_aes(), ""); | |
1039 int encode = simd_prefix_and_encode(dst, dst, src, VEX_SIMD_66, VEX_OPCODE_0F_38); | |
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1040 emit_int8((unsigned char)0xDF); |
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1041 emit_int8((unsigned char)(0xC0 | encode)); |
6894 | 1042 } |
1043 | |
1044 void Assembler::aesenc(XMMRegister dst, Address src) { | |
1045 assert(VM_Version::supports_aes(), ""); | |
1046 InstructionMark im(this); | |
1047 simd_prefix(dst, dst, src, VEX_SIMD_66, VEX_OPCODE_0F_38); | |
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1048 emit_int8((unsigned char)0xDC); |
6894 | 1049 emit_operand(dst, src); |
1050 } | |
1051 | |
1052 void Assembler::aesenc(XMMRegister dst, XMMRegister src) { | |
1053 assert(VM_Version::supports_aes(), ""); | |
1054 int encode = simd_prefix_and_encode(dst, dst, src, VEX_SIMD_66, VEX_OPCODE_0F_38); | |
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1055 emit_int8((unsigned char)0xDC); |
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1056 emit_int8(0xC0 | encode); |
6894 | 1057 } |
1058 | |
1059 void Assembler::aesenclast(XMMRegister dst, Address src) { | |
1060 assert(VM_Version::supports_aes(), ""); | |
1061 InstructionMark im(this); | |
1062 simd_prefix(dst, dst, src, VEX_SIMD_66, VEX_OPCODE_0F_38); | |
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1063 emit_int8((unsigned char)0xDD); |
6894 | 1064 emit_operand(dst, src); |
1065 } | |
1066 | |
1067 void Assembler::aesenclast(XMMRegister dst, XMMRegister src) { | |
1068 assert(VM_Version::supports_aes(), ""); | |
1069 int encode = simd_prefix_and_encode(dst, dst, src, VEX_SIMD_66, VEX_OPCODE_0F_38); | |
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1070 emit_int8((unsigned char)0xDD); |
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1071 emit_int8((unsigned char)(0xC0 | encode)); |
6894 | 1072 } |
1073 | |
1074 | |
4759 | 1075 void Assembler::andl(Address dst, int32_t imm32) { |
1076 InstructionMark im(this); | |
1077 prefix(dst); | |
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1078 emit_int8((unsigned char)0x81); |
4759 | 1079 emit_operand(rsp, dst, 4); |
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1080 emit_int32(imm32); |
4759 | 1081 } |
1082 | |
304 | 1083 void Assembler::andl(Register dst, int32_t imm32) { |
1084 prefix(dst); | |
1085 emit_arith(0x81, 0xE0, dst, imm32); | |
1086 } | |
1087 | |
1088 void Assembler::andl(Register dst, Address src) { | |
1089 InstructionMark im(this); | |
1090 prefix(src, dst); | |
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1091 emit_int8(0x23); |
304 | 1092 emit_operand(dst, src); |
1093 } | |
1094 | |
1095 void Assembler::andl(Register dst, Register src) { | |
1096 (void) prefix_and_encode(dst->encoding(), src->encoding()); | |
1097 emit_arith(0x23, 0xC0, dst, src); | |
1098 } | |
1099 | |
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1100 void Assembler::bsfl(Register dst, Register src) { |
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1101 int encode = prefix_and_encode(dst->encoding(), src->encoding()); |
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1102 emit_int8(0x0F); |
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1103 emit_int8((unsigned char)0xBC); |
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1104 emit_int8((unsigned char)(0xC0 | encode)); |
775
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1105 } |
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1106 |
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1107 void Assembler::bsrl(Register dst, Register src) { |
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1108 assert(!VM_Version::supports_lzcnt(), "encoding is treated as LZCNT"); |
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1109 int encode = prefix_and_encode(dst->encoding(), src->encoding()); |
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1110 emit_int8(0x0F); |
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1111 emit_int8((unsigned char)0xBD); |
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1112 emit_int8((unsigned char)(0xC0 | encode)); |
775
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1113 } |
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1114 |
304 | 1115 void Assembler::bswapl(Register reg) { // bswap |
1116 int encode = prefix_and_encode(reg->encoding()); | |
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1117 emit_int8(0x0F); |
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1118 emit_int8((unsigned char)(0xC8 | encode)); |
304 | 1119 } |
1120 | |
1121 void Assembler::call(Label& L, relocInfo::relocType rtype) { | |
1122 // suspect disp32 is always good | |
1123 int operand = LP64_ONLY(disp32_operand) NOT_LP64(imm_operand); | |
1124 | |
1125 if (L.is_bound()) { | |
1126 const int long_size = 5; | |
1127 int offs = (int)( target(L) - pc() ); | |
1128 assert(offs <= 0, "assembler error"); | |
1129 InstructionMark im(this); | |
1130 // 1110 1000 #32-bit disp | |
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1131 emit_int8((unsigned char)0xE8); |
304 | 1132 emit_data(offs - long_size, rtype, operand); |
1133 } else { | |
1134 InstructionMark im(this); | |
1135 // 1110 1000 #32-bit disp | |
1136 L.add_patch_at(code(), locator()); | |
1137 | |
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1138 emit_int8((unsigned char)0xE8); |
304 | 1139 emit_data(int(0), rtype, operand); |
1140 } | |
1141 } | |
1142 | |
1143 void Assembler::call(Register dst) { | |
4759 | 1144 int encode = prefix_and_encode(dst->encoding()); |
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1145 emit_int8((unsigned char)0xFF); |
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1146 emit_int8((unsigned char)(0xD0 | encode)); |
304 | 1147 } |
1148 | |
1149 | |
1150 void Assembler::call(Address adr) { | |
1151 InstructionMark im(this); | |
1152 prefix(adr); | |
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1153 emit_int8((unsigned char)0xFF); |
304 | 1154 emit_operand(rdx, adr); |
1155 } | |
1156 | |
1157 void Assembler::call_literal(address entry, RelocationHolder const& rspec) { | |
1158 assert(entry != NULL, "call most probably wrong"); | |
1159 InstructionMark im(this); | |
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1160 emit_int8((unsigned char)0xE8); |
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1161 intptr_t disp = entry - (pc() + sizeof(int32_t)); |
304 | 1162 assert(is_simm32(disp), "must be 32bit offset (call2)"); |
1163 // Technically, should use call32_operand, but this format is | |
1164 // implied by the fact that we're emitting a call instruction. | |
1165 | |
1166 int operand = LP64_ONLY(disp32_operand) NOT_LP64(call32_operand); | |
1167 emit_data((int) disp, rspec, operand); | |
1168 } | |
1169 | |
1170 void Assembler::cdql() { | |
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1171 emit_int8((unsigned char)0x99); |
304 | 1172 } |
1173 | |
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1174 void Assembler::cld() { |
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1175 emit_int8((unsigned char)0xFC); |
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1176 } |
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1177 |
304 | 1178 void Assembler::cmovl(Condition cc, Register dst, Register src) { |
1179 NOT_LP64(guarantee(VM_Version::supports_cmov(), "illegal instruction")); | |
1180 int encode = prefix_and_encode(dst->encoding(), src->encoding()); | |
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1181 emit_int8(0x0F); |
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1182 emit_int8(0x40 | cc); |
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1183 emit_int8((unsigned char)(0xC0 | encode)); |
304 | 1184 } |
1185 | |
1186 | |
1187 void Assembler::cmovl(Condition cc, Register dst, Address src) { | |
1188 NOT_LP64(guarantee(VM_Version::supports_cmov(), "illegal instruction")); | |
1189 prefix(src, dst); | |
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1190 emit_int8(0x0F); |
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1191 emit_int8(0x40 | cc); |
304 | 1192 emit_operand(dst, src); |
1193 } | |
1194 | |
1195 void Assembler::cmpb(Address dst, int imm8) { | |
1196 InstructionMark im(this); | |
1197 prefix(dst); | |
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1198 emit_int8((unsigned char)0x80); |
304 | 1199 emit_operand(rdi, dst, 1); |
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1200 emit_int8(imm8); |
304 | 1201 } |
1202 | |
1203 void Assembler::cmpl(Address dst, int32_t imm32) { | |
1204 InstructionMark im(this); | |
1205 prefix(dst); | |
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1206 emit_int8((unsigned char)0x81); |
304 | 1207 emit_operand(rdi, dst, 4); |
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1208 emit_int32(imm32); |
304 | 1209 } |
1210 | |
1211 void Assembler::cmpl(Register dst, int32_t imm32) { | |
1212 prefix(dst); | |
1213 emit_arith(0x81, 0xF8, dst, imm32); | |
1214 } | |
1215 | |
1216 void Assembler::cmpl(Register dst, Register src) { | |
1217 (void) prefix_and_encode(dst->encoding(), src->encoding()); | |
1218 emit_arith(0x3B, 0xC0, dst, src); | |
1219 } | |
1220 | |
1221 | |
1222 void Assembler::cmpl(Register dst, Address src) { | |
1223 InstructionMark im(this); | |
1224 prefix(src, dst); | |
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1225 emit_int8((unsigned char)0x3B); |
304 | 1226 emit_operand(dst, src); |
1227 } | |
1228 | |
1229 void Assembler::cmpw(Address dst, int imm16) { | |
1230 InstructionMark im(this); | |
1231 assert(!dst.base_needs_rex() && !dst.index_needs_rex(), "no extended registers"); | |
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1232 emit_int8(0x66); |
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1233 emit_int8((unsigned char)0x81); |
304 | 1234 emit_operand(rdi, dst, 2); |
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1235 emit_int16(imm16); |
304 | 1236 } |
1237 | |
1238 // The 32-bit cmpxchg compares the value at adr with the contents of rax, | |
1239 // and stores reg into adr if so; otherwise, the value at adr is loaded into rax,. | |
1240 // The ZF is set if the compared values were equal, and cleared otherwise. | |
1241 void Assembler::cmpxchgl(Register reg, Address adr) { // cmpxchg | |
6834 | 1242 InstructionMark im(this); |
1243 prefix(adr, reg); | |
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1244 emit_int8(0x0F); |
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1245 emit_int8((unsigned char)0xB1); |
6834 | 1246 emit_operand(reg, adr); |
304 | 1247 } |
1248 | |
1249 void Assembler::comisd(XMMRegister dst, Address src) { | |
1250 // NOTE: dbx seems to decode this as comiss even though the | |
1251 // 0x66 is there. Strangly ucomisd comes out correct | |
1252 NOT_LP64(assert(VM_Version::supports_sse2(), "")); | |
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1253 emit_simd_arith_nonds(0x2F, dst, src, VEX_SIMD_66); |
4759 | 1254 } |
1255 | |
1256 void Assembler::comisd(XMMRegister dst, XMMRegister src) { | |
1257 NOT_LP64(assert(VM_Version::supports_sse2(), "")); | |
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1258 emit_simd_arith_nonds(0x2F, dst, src, VEX_SIMD_66); |
304 | 1259 } |
1260 | |
1261 void Assembler::comiss(XMMRegister dst, Address src) { | |
1262 NOT_LP64(assert(VM_Version::supports_sse(), "")); | |
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1263 emit_simd_arith_nonds(0x2F, dst, src, VEX_SIMD_NONE); |
304 | 1264 } |
1265 | |
4759 | 1266 void Assembler::comiss(XMMRegister dst, XMMRegister src) { |
1267 NOT_LP64(assert(VM_Version::supports_sse(), "")); | |
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1268 emit_simd_arith_nonds(0x2F, dst, src, VEX_SIMD_NONE); |
4759 | 1269 } |
1270 | |
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1271 void Assembler::cpuid() { |
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1272 emit_int8(0x0F); |
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1273 emit_int8((unsigned char)0xA2); |
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1274 } |
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1275 |
304 | 1276 void Assembler::cvtdq2pd(XMMRegister dst, XMMRegister src) { |
1277 NOT_LP64(assert(VM_Version::supports_sse2(), "")); | |
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1278 emit_simd_arith_nonds(0xE6, dst, src, VEX_SIMD_F3); |
304 | 1279 } |
1280 | |
1281 void Assembler::cvtdq2ps(XMMRegister dst, XMMRegister src) { | |
1282 NOT_LP64(assert(VM_Version::supports_sse2(), "")); | |
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1283 emit_simd_arith_nonds(0x5B, dst, src, VEX_SIMD_NONE); |
304 | 1284 } |
1285 | |
1286 void Assembler::cvtsd2ss(XMMRegister dst, XMMRegister src) { | |
1287 NOT_LP64(assert(VM_Version::supports_sse2(), "")); | |
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1288 emit_simd_arith(0x5A, dst, src, VEX_SIMD_F2); |
304 | 1289 } |
1290 | |
4759 | 1291 void Assembler::cvtsd2ss(XMMRegister dst, Address src) { |
1292 NOT_LP64(assert(VM_Version::supports_sse2(), "")); | |
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1293 emit_simd_arith(0x5A, dst, src, VEX_SIMD_F2); |
4759 | 1294 } |
1295 | |
304 | 1296 void Assembler::cvtsi2sdl(XMMRegister dst, Register src) { |
1297 NOT_LP64(assert(VM_Version::supports_sse2(), "")); | |
4759 | 1298 int encode = simd_prefix_and_encode(dst, dst, src, VEX_SIMD_F2); |
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1299 emit_int8(0x2A); |
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1300 emit_int8((unsigned char)(0xC0 | encode)); |
304 | 1301 } |
1302 | |
4759 | 1303 void Assembler::cvtsi2sdl(XMMRegister dst, Address src) { |
1304 NOT_LP64(assert(VM_Version::supports_sse2(), "")); | |
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1305 emit_simd_arith(0x2A, dst, src, VEX_SIMD_F2); |
4759 | 1306 } |
1307 | |
304 | 1308 void Assembler::cvtsi2ssl(XMMRegister dst, Register src) { |
1309 NOT_LP64(assert(VM_Version::supports_sse(), "")); | |
4759 | 1310 int encode = simd_prefix_and_encode(dst, dst, src, VEX_SIMD_F3); |
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1311 emit_int8(0x2A); |
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1312 emit_int8((unsigned char)(0xC0 | encode)); |
304 | 1313 } |
1314 | |
4759 | 1315 void Assembler::cvtsi2ssl(XMMRegister dst, Address src) { |
1316 NOT_LP64(assert(VM_Version::supports_sse(), "")); | |
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1317 emit_simd_arith(0x2A, dst, src, VEX_SIMD_F3); |
4759 | 1318 } |
1319 | |
304 | 1320 void Assembler::cvtss2sd(XMMRegister dst, XMMRegister src) { |
1321 NOT_LP64(assert(VM_Version::supports_sse2(), "")); | |
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1322 emit_simd_arith(0x5A, dst, src, VEX_SIMD_F3); |
304 | 1323 } |
1324 | |
4759 | 1325 void Assembler::cvtss2sd(XMMRegister dst, Address src) { |
1326 NOT_LP64(assert(VM_Version::supports_sse2(), "")); | |
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1327 emit_simd_arith(0x5A, dst, src, VEX_SIMD_F3); |
4759 | 1328 } |
1329 | |
1330 | |
304 | 1331 void Assembler::cvttsd2sil(Register dst, XMMRegister src) { |
1332 NOT_LP64(assert(VM_Version::supports_sse2(), "")); | |
4759 | 1333 int encode = simd_prefix_and_encode(dst, src, VEX_SIMD_F2); |
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1334 emit_int8(0x2C); |
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1335 emit_int8((unsigned char)(0xC0 | encode)); |
304 | 1336 } |
1337 | |
1338 void Assembler::cvttss2sil(Register dst, XMMRegister src) { | |
1339 NOT_LP64(assert(VM_Version::supports_sse(), "")); | |
4759 | 1340 int encode = simd_prefix_and_encode(dst, src, VEX_SIMD_F3); |
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1341 emit_int8(0x2C); |
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1342 emit_int8((unsigned char)(0xC0 | encode)); |
304 | 1343 } |
1344 | |
1345 void Assembler::decl(Address dst) { | |
1346 // Don't use it directly. Use MacroAssembler::decrement() instead. | |
1347 InstructionMark im(this); | |
1348 prefix(dst); | |
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1349 emit_int8((unsigned char)0xFF); |
304 | 1350 emit_operand(rcx, dst); |
1351 } | |
1352 | |
1353 void Assembler::divsd(XMMRegister dst, Address src) { | |
1354 NOT_LP64(assert(VM_Version::supports_sse2(), "")); | |
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1355 emit_simd_arith(0x5E, dst, src, VEX_SIMD_F2); |
304 | 1356 } |
1357 | |
1358 void Assembler::divsd(XMMRegister dst, XMMRegister src) { | |
1359 NOT_LP64(assert(VM_Version::supports_sse2(), "")); | |
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1360 emit_simd_arith(0x5E, dst, src, VEX_SIMD_F2); |
304 | 1361 } |
1362 | |
1363 void Assembler::divss(XMMRegister dst, Address src) { | |
1364 NOT_LP64(assert(VM_Version::supports_sse(), "")); | |
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1365 emit_simd_arith(0x5E, dst, src, VEX_SIMD_F3); |
304 | 1366 } |
1367 | |
1368 void Assembler::divss(XMMRegister dst, XMMRegister src) { | |
1369 NOT_LP64(assert(VM_Version::supports_sse(), "")); | |
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1370 emit_simd_arith(0x5E, dst, src, VEX_SIMD_F3); |
304 | 1371 } |
1372 | |
1373 void Assembler::emms() { | |
1374 NOT_LP64(assert(VM_Version::supports_mmx(), "")); | |
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1375 emit_int8(0x0F); |
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1376 emit_int8(0x77); |
304 | 1377 } |
1378 | |
1379 void Assembler::hlt() { | |
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1380 emit_int8((unsigned char)0xF4); |
304 | 1381 } |
1382 | |
1383 void Assembler::idivl(Register src) { | |
1384 int encode = prefix_and_encode(src->encoding()); | |
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1385 emit_int8((unsigned char)0xF7); |
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1386 emit_int8((unsigned char)(0xF8 | encode)); |
304 | 1387 } |
1388 | |
1920 | 1389 void Assembler::divl(Register src) { // Unsigned |
1390 int encode = prefix_and_encode(src->encoding()); | |
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1391 emit_int8((unsigned char)0xF7); |
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1392 emit_int8((unsigned char)(0xF0 | encode)); |
1920 | 1393 } |
1394 | |
304 | 1395 void Assembler::imull(Register dst, Register src) { |
1396 int encode = prefix_and_encode(dst->encoding(), src->encoding()); | |
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1397 emit_int8(0x0F); |
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1398 emit_int8((unsigned char)0xAF); |
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1399 emit_int8((unsigned char)(0xC0 | encode)); |
304 | 1400 } |
1401 | |
1402 | |
1403 void Assembler::imull(Register dst, Register src, int value) { | |
1404 int encode = prefix_and_encode(dst->encoding(), src->encoding()); | |
1405 if (is8bit(value)) { | |
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1406 emit_int8(0x6B); |
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1407 emit_int8((unsigned char)(0xC0 | encode)); |
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1408 emit_int8(value & 0xFF); |
304 | 1409 } else { |
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1410 emit_int8(0x69); |
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1411 emit_int8((unsigned char)(0xC0 | encode)); |
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1412 emit_int32(value); |
304 | 1413 } |
1414 } | |
1415 | |
1416 void Assembler::incl(Address dst) { | |
1417 // Don't use it directly. Use MacroAssembler::increment() instead. | |
1418 InstructionMark im(this); | |
1419 prefix(dst); | |
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1420 emit_int8((unsigned char)0xFF); |
304 | 1421 emit_operand(rax, dst); |
1422 } | |
1423 | |
3851 | 1424 void Assembler::jcc(Condition cc, Label& L, bool maybe_short) { |
1425 InstructionMark im(this); | |
304 | 1426 assert((0 <= cc) && (cc < 16), "illegal cc"); |
1427 if (L.is_bound()) { | |
1428 address dst = target(L); | |
1429 assert(dst != NULL, "jcc most probably wrong"); | |
1430 | |
1431 const int short_size = 2; | |
1432 const int long_size = 6; | |
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1433 intptr_t offs = (intptr_t)dst - (intptr_t)pc(); |
3851 | 1434 if (maybe_short && is8bit(offs - short_size)) { |
304 | 1435 // 0111 tttn #8-bit disp |
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1436 emit_int8(0x70 | cc); |
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1437 emit_int8((offs - short_size) & 0xFF); |
304 | 1438 } else { |
1439 // 0000 1111 1000 tttn #32-bit disp | |
1440 assert(is_simm32(offs - long_size), | |
1441 "must be 32bit offset (call4)"); | |
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1442 emit_int8(0x0F); |
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1443 emit_int8((unsigned char)(0x80 | cc)); |
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1444 emit_int32(offs - long_size); |
304 | 1445 } |
1446 } else { | |
1447 // Note: could eliminate cond. jumps to this jump if condition | |
1448 // is the same however, seems to be rather unlikely case. | |
1449 // Note: use jccb() if label to be bound is very close to get | |
1450 // an 8-bit displacement | |
1451 L.add_patch_at(code(), locator()); | |
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1452 emit_int8(0x0F); |
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1453 emit_int8((unsigned char)(0x80 | cc)); |
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1454 emit_int32(0); |
304 | 1455 } |
1456 } | |
1457 | |
1458 void Assembler::jccb(Condition cc, Label& L) { | |
1459 if (L.is_bound()) { | |
1460 const int short_size = 2; | |
1461 address entry = target(L); | |
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1462 #ifdef ASSERT |
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1463 intptr_t dist = (intptr_t)entry - ((intptr_t)pc() + short_size); |
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1464 intptr_t delta = short_branch_delta(); |
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1465 if (delta != 0) { |
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1466 dist += (dist < 0 ? (-delta) :delta); |
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1467 } |
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1468 assert(is8bit(dist), "Dispacement too large for a short jmp"); |
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1469 #endif |
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1470 intptr_t offs = (intptr_t)entry - (intptr_t)pc(); |
304 | 1471 // 0111 tttn #8-bit disp |
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1472 emit_int8(0x70 | cc); |
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1473 emit_int8((offs - short_size) & 0xFF); |
304 | 1474 } else { |
1475 InstructionMark im(this); | |
1476 L.add_patch_at(code(), locator()); | |
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1477 emit_int8(0x70 | cc); |
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1478 emit_int8(0); |
304 | 1479 } |
1480 } | |
1481 | |
1482 void Assembler::jmp(Address adr) { | |
1483 InstructionMark im(this); | |
1484 prefix(adr); | |
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1485 emit_int8((unsigned char)0xFF); |
304 | 1486 emit_operand(rsp, adr); |
1487 } | |
1488 | |
3851 | 1489 void Assembler::jmp(Label& L, bool maybe_short) { |
304 | 1490 if (L.is_bound()) { |
1491 address entry = target(L); | |
1492 assert(entry != NULL, "jmp most probably wrong"); | |
1493 InstructionMark im(this); | |
1494 const int short_size = 2; | |
1495 const int long_size = 5; | |
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1496 intptr_t offs = entry - pc(); |
3851 | 1497 if (maybe_short && is8bit(offs - short_size)) { |
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1498 emit_int8((unsigned char)0xEB); |
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1499 emit_int8((offs - short_size) & 0xFF); |
304 | 1500 } else { |
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1501 emit_int8((unsigned char)0xE9); |
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1502 emit_int32(offs - long_size); |
304 | 1503 } |
1504 } else { | |
1505 // By default, forward jumps are always 32-bit displacements, since | |
1506 // we can't yet know where the label will be bound. If you're sure that | |
1507 // the forward jump will not run beyond 256 bytes, use jmpb to | |
1508 // force an 8-bit displacement. | |
1509 InstructionMark im(this); | |
1510 L.add_patch_at(code(), locator()); | |
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1511 emit_int8((unsigned char)0xE9); |
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1512 emit_int32(0); |
304 | 1513 } |
1514 } | |
1515 | |
1516 void Assembler::jmp(Register entry) { | |
1517 int encode = prefix_and_encode(entry->encoding()); | |
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1518 emit_int8((unsigned char)0xFF); |
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1519 emit_int8((unsigned char)(0xE0 | encode)); |
304 | 1520 } |
1521 | |
1522 void Assembler::jmp_literal(address dest, RelocationHolder const& rspec) { | |
1523 InstructionMark im(this); | |
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1524 emit_int8((unsigned char)0xE9); |
304 | 1525 assert(dest != NULL, "must have a target"); |
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1526 intptr_t disp = dest - (pc() + sizeof(int32_t)); |
304 | 1527 assert(is_simm32(disp), "must be 32bit offset (jmp)"); |
1528 emit_data(disp, rspec.reloc(), call32_operand); | |
1529 } | |
1530 | |
1531 void Assembler::jmpb(Label& L) { | |
1532 if (L.is_bound()) { | |
1533 const int short_size = 2; | |
1534 address entry = target(L); | |
1535 assert(entry != NULL, "jmp most probably wrong"); | |
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1536 #ifdef ASSERT |
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1537 intptr_t dist = (intptr_t)entry - ((intptr_t)pc() + short_size); |
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1538 intptr_t delta = short_branch_delta(); |
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1539 if (delta != 0) { |
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1540 dist += (dist < 0 ? (-delta) :delta); |
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1541 } |
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1542 assert(is8bit(dist), "Dispacement too large for a short jmp"); |
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1543 #endif |
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1544 intptr_t offs = entry - pc(); |
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1545 emit_int8((unsigned char)0xEB); |
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1546 emit_int8((offs - short_size) & 0xFF); |
304 | 1547 } else { |
1548 InstructionMark im(this); | |
1549 L.add_patch_at(code(), locator()); | |
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1550 emit_int8((unsigned char)0xEB); |
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1551 emit_int8(0); |
304 | 1552 } |
1553 } | |
1554 | |
1555 void Assembler::ldmxcsr( Address src) { | |
1556 NOT_LP64(assert(VM_Version::supports_sse(), "")); | |
1557 InstructionMark im(this); | |
1558 prefix(src); | |
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1559 emit_int8(0x0F); |
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1560 emit_int8((unsigned char)0xAE); |
304 | 1561 emit_operand(as_Register(2), src); |
1562 } | |
1563 | |
1564 void Assembler::leal(Register dst, Address src) { | |
1565 InstructionMark im(this); | |
1566 #ifdef _LP64 | |
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1567 emit_int8(0x67); // addr32 |
304 | 1568 prefix(src, dst); |
1569 #endif // LP64 | |
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|
1570 emit_int8((unsigned char)0x8D); |
304 | 1571 emit_operand(dst, src); |
1572 } | |
1573 | |
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1574 void Assembler::lfence() { |
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1575 emit_int8(0x0F); |
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1576 emit_int8((unsigned char)0xAE); |
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1577 emit_int8((unsigned char)0xE8); |
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1578 } |
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1579 |
304 | 1580 void Assembler::lock() { |
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1581 emit_int8((unsigned char)0xF0); |
304 | 1582 } |
1583 | |
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1584 void Assembler::lzcntl(Register dst, Register src) { |
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1585 assert(VM_Version::supports_lzcnt(), "encoding is treated as BSR"); |
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1586 emit_int8((unsigned char)0xF3); |
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1587 int encode = prefix_and_encode(dst->encoding(), src->encoding()); |
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1588 emit_int8(0x0F); |
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1589 emit_int8((unsigned char)0xBD); |
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1590 emit_int8((unsigned char)(0xC0 | encode)); |
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1591 } |
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1592 |
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1593 // Emit mfence instruction |
304 | 1594 void Assembler::mfence() { |
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1595 NOT_LP64(assert(VM_Version::supports_sse2(), "unsupported");) |
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1596 emit_int8(0x0F); |
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1597 emit_int8((unsigned char)0xAE); |
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1598 emit_int8((unsigned char)0xF0); |
304 | 1599 } |
1600 | |
1601 void Assembler::mov(Register dst, Register src) { | |
1602 LP64_ONLY(movq(dst, src)) NOT_LP64(movl(dst, src)); | |
1603 } | |
1604 | |
1605 void Assembler::movapd(XMMRegister dst, XMMRegister src) { | |
1606 NOT_LP64(assert(VM_Version::supports_sse2(), "")); | |
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1607 emit_simd_arith_nonds(0x28, dst, src, VEX_SIMD_66); |
304 | 1608 } |
1609 | |
1610 void Assembler::movaps(XMMRegister dst, XMMRegister src) { | |
1611 NOT_LP64(assert(VM_Version::supports_sse(), "")); | |
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1612 emit_simd_arith_nonds(0x28, dst, src, VEX_SIMD_NONE); |
304 | 1613 } |
1614 | |
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1615 void Assembler::movlhps(XMMRegister dst, XMMRegister src) { |
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1616 NOT_LP64(assert(VM_Version::supports_sse(), "")); |
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1617 int encode = simd_prefix_and_encode(dst, src, src, VEX_SIMD_NONE); |
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1618 emit_int8(0x16); |
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1619 emit_int8((unsigned char)(0xC0 | encode)); |
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1620 } |
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1621 |
304 | 1622 void Assembler::movb(Register dst, Address src) { |
1623 NOT_LP64(assert(dst->has_byte_register(), "must have byte register")); | |
1624 InstructionMark im(this); | |
1625 prefix(src, dst, true); | |
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1626 emit_int8((unsigned char)0x8A); |
304 | 1627 emit_operand(dst, src); |
1628 } | |
1629 | |
1630 | |
1631 void Assembler::movb(Address dst, int imm8) { | |
1632 InstructionMark im(this); | |
1633 prefix(dst); | |
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1634 emit_int8((unsigned char)0xC6); |
304 | 1635 emit_operand(rax, dst, 1); |
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1636 emit_int8(imm8); |
304 | 1637 } |
1638 | |
1639 | |
1640 void Assembler::movb(Address dst, Register src) { | |
1641 assert(src->has_byte_register(), "must have byte register"); | |
1642 InstructionMark im(this); | |
1643 prefix(dst, src, true); | |
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1644 emit_int8((unsigned char)0x88); |
304 | 1645 emit_operand(src, dst); |
1646 } | |
1647 | |
1648 void Assembler::movdl(XMMRegister dst, Register src) { | |
1649 NOT_LP64(assert(VM_Version::supports_sse2(), "")); | |
4759 | 1650 int encode = simd_prefix_and_encode(dst, src, VEX_SIMD_66); |
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1651 emit_int8(0x6E); |
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1652 emit_int8((unsigned char)(0xC0 | encode)); |
304 | 1653 } |
1654 | |
1655 void Assembler::movdl(Register dst, XMMRegister src) { | |
1656 NOT_LP64(assert(VM_Version::supports_sse2(), "")); | |
1657 // swap src/dst to get correct prefix | |
4759 | 1658 int encode = simd_prefix_and_encode(src, dst, VEX_SIMD_66); |
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1659 emit_int8(0x7E); |
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1660 emit_int8((unsigned char)(0xC0 | encode)); |
304 | 1661 } |
1662 | |
2320
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1663 void Assembler::movdl(XMMRegister dst, Address src) { |
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1664 NOT_LP64(assert(VM_Version::supports_sse2(), "")); |
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1665 InstructionMark im(this); |
4759 | 1666 simd_prefix(dst, src, VEX_SIMD_66); |
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1667 emit_int8(0x6E); |
2320
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1668 emit_operand(dst, src); |
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1669 } |
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1670 |
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1671 void Assembler::movdl(Address dst, XMMRegister src) { |
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1672 NOT_LP64(assert(VM_Version::supports_sse2(), "")); |
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1673 InstructionMark im(this); |
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1674 simd_prefix(dst, src, VEX_SIMD_66); |
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1675 emit_int8(0x7E); |
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1676 emit_operand(src, dst); |
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1677 } |
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1678 |
304 | 1679 void Assembler::movdqa(XMMRegister dst, XMMRegister src) { |
1680 NOT_LP64(assert(VM_Version::supports_sse2(), "")); | |
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1681 emit_simd_arith_nonds(0x6F, dst, src, VEX_SIMD_66); |
304 | 1682 } |
1683 | |
405 | 1684 void Assembler::movdqu(XMMRegister dst, Address src) { |
1685 NOT_LP64(assert(VM_Version::supports_sse2(), "")); | |
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1686 emit_simd_arith_nonds(0x6F, dst, src, VEX_SIMD_F3); |
405 | 1687 } |
1688 | |
1689 void Assembler::movdqu(XMMRegister dst, XMMRegister src) { | |
1690 NOT_LP64(assert(VM_Version::supports_sse2(), "")); | |
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1691 emit_simd_arith_nonds(0x6F, dst, src, VEX_SIMD_F3); |
405 | 1692 } |
1693 | |
1694 void Assembler::movdqu(Address dst, XMMRegister src) { | |
1695 NOT_LP64(assert(VM_Version::supports_sse2(), "")); | |
1696 InstructionMark im(this); | |
4759 | 1697 simd_prefix(dst, src, VEX_SIMD_F3); |
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1698 emit_int8(0x7F); |
405 | 1699 emit_operand(src, dst); |
1700 } | |
1701 | |
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1702 // Move Unaligned 256bit Vector |
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1703 void Assembler::vmovdqu(XMMRegister dst, XMMRegister src) { |
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1704 assert(UseAVX, ""); |
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|
1705 bool vector256 = true; |
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1706 int encode = vex_prefix_and_encode(dst, xnoreg, src, VEX_SIMD_F3, vector256); |
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1707 emit_int8(0x6F); |
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1708 emit_int8((unsigned char)(0xC0 | encode)); |
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1709 } |
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|
1710 |
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1711 void Assembler::vmovdqu(XMMRegister dst, Address src) { |
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1712 assert(UseAVX, ""); |
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|
1713 InstructionMark im(this); |
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1714 bool vector256 = true; |
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1715 vex_prefix(dst, xnoreg, src, VEX_SIMD_F3, vector256); |
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1716 emit_int8(0x6F); |
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1717 emit_operand(dst, src); |
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1718 } |
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1719 |
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1720 void Assembler::vmovdqu(Address dst, XMMRegister src) { |
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1721 assert(UseAVX, ""); |
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1722 InstructionMark im(this); |
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1723 bool vector256 = true; |
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1724 // swap src<->dst for encoding |
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1725 assert(src != xnoreg, "sanity"); |
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1726 vex_prefix(src, xnoreg, dst, VEX_SIMD_F3, vector256); |
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1727 emit_int8(0x7F); |
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1728 emit_operand(src, dst); |
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1729 } |
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1730 |
304 | 1731 // Uses zero extension on 64bit |
1732 | |
1733 void Assembler::movl(Register dst, int32_t imm32) { | |
1734 int encode = prefix_and_encode(dst->encoding()); | |
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1735 emit_int8((unsigned char)(0xB8 | encode)); |
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1736 emit_int32(imm32); |
304 | 1737 } |
1738 | |
1739 void Assembler::movl(Register dst, Register src) { | |
1740 int encode = prefix_and_encode(dst->encoding(), src->encoding()); | |
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1741 emit_int8((unsigned char)0x8B); |
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1742 emit_int8((unsigned char)(0xC0 | encode)); |
304 | 1743 } |
1744 | |
1745 void Assembler::movl(Register dst, Address src) { | |
1746 InstructionMark im(this); | |
1747 prefix(src, dst); | |
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1748 emit_int8((unsigned char)0x8B); |
304 | 1749 emit_operand(dst, src); |
1750 } | |
1751 | |
1752 void Assembler::movl(Address dst, int32_t imm32) { | |
1753 InstructionMark im(this); | |
1754 prefix(dst); | |
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1755 emit_int8((unsigned char)0xC7); |
304 | 1756 emit_operand(rax, dst, 4); |
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1757 emit_int32(imm32); |
304 | 1758 } |
1759 | |
1760 void Assembler::movl(Address dst, Register src) { | |
1761 InstructionMark im(this); | |
1762 prefix(dst, src); | |
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1763 emit_int8((unsigned char)0x89); |
304 | 1764 emit_operand(src, dst); |
1765 } | |
1766 | |
1767 // New cpus require to use movsd and movss to avoid partial register stall | |
1768 // when loading from memory. But for old Opteron use movlpd instead of movsd. | |
1769 // The selection is done in MacroAssembler::movdbl() and movflt(). | |
1770 void Assembler::movlpd(XMMRegister dst, Address src) { | |
1771 NOT_LP64(assert(VM_Version::supports_sse2(), "")); | |
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1772 emit_simd_arith(0x12, dst, src, VEX_SIMD_66); |
304 | 1773 } |
1774 | |
1775 void Assembler::movq( MMXRegister dst, Address src ) { | |
1776 assert( VM_Version::supports_mmx(), "" ); | |
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1777 emit_int8(0x0F); |
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1778 emit_int8(0x6F); |
304 | 1779 emit_operand(dst, src); |
1780 } | |
1781 | |
1782 void Assembler::movq( Address dst, MMXRegister src ) { | |
1783 assert( VM_Version::supports_mmx(), "" ); | |
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1784 emit_int8(0x0F); |
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1785 emit_int8(0x7F); |
304 | 1786 // workaround gcc (3.2.1-7a) bug |
1787 // In that version of gcc with only an emit_operand(MMX, Address) | |
1788 // gcc will tail jump and try and reverse the parameters completely | |
1789 // obliterating dst in the process. By having a version available | |
1790 // that doesn't need to swap the args at the tail jump the bug is | |
1791 // avoided. | |
1792 emit_operand(dst, src); | |
1793 } | |
1794 | |
1795 void Assembler::movq(XMMRegister dst, Address src) { | |
1796 NOT_LP64(assert(VM_Version::supports_sse2(), "")); | |
1797 InstructionMark im(this); | |
4759 | 1798 simd_prefix(dst, src, VEX_SIMD_F3); |
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1799 emit_int8(0x7E); |
304 | 1800 emit_operand(dst, src); |
1801 } | |
1802 | |
1803 void Assembler::movq(Address dst, XMMRegister src) { | |
1804 NOT_LP64(assert(VM_Version::supports_sse2(), "")); | |
1805 InstructionMark im(this); | |
4759 | 1806 simd_prefix(dst, src, VEX_SIMD_66); |
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1807 emit_int8((unsigned char)0xD6); |
304 | 1808 emit_operand(src, dst); |
1809 } | |
1810 | |
1811 void Assembler::movsbl(Register dst, Address src) { // movsxb | |
1812 InstructionMark im(this); | |
1813 prefix(src, dst); | |
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1814 emit_int8(0x0F); |
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1815 emit_int8((unsigned char)0xBE); |
304 | 1816 emit_operand(dst, src); |
1817 } | |
1818 | |
1819 void Assembler::movsbl(Register dst, Register src) { // movsxb | |
1820 NOT_LP64(assert(src->has_byte_register(), "must have byte register")); | |
1821 int encode = prefix_and_encode(dst->encoding(), src->encoding(), true); | |
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1822 emit_int8(0x0F); |
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1823 emit_int8((unsigned char)0xBE); |
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1824 emit_int8((unsigned char)(0xC0 | encode)); |
304 | 1825 } |
1826 | |
1827 void Assembler::movsd(XMMRegister dst, XMMRegister src) { | |
1828 NOT_LP64(assert(VM_Version::supports_sse2(), "")); | |
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1829 emit_simd_arith(0x10, dst, src, VEX_SIMD_F2); |
304 | 1830 } |
1831 | |
1832 void Assembler::movsd(XMMRegister dst, Address src) { | |
1833 NOT_LP64(assert(VM_Version::supports_sse2(), "")); | |
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1834 emit_simd_arith_nonds(0x10, dst, src, VEX_SIMD_F2); |
304 | 1835 } |
1836 | |
1837 void Assembler::movsd(Address dst, XMMRegister src) { | |
1838 NOT_LP64(assert(VM_Version::supports_sse2(), "")); | |
1839 InstructionMark im(this); | |
4759 | 1840 simd_prefix(dst, src, VEX_SIMD_F2); |
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1841 emit_int8(0x11); |
304 | 1842 emit_operand(src, dst); |
1843 } | |
1844 | |
1845 void Assembler::movss(XMMRegister dst, XMMRegister src) { | |
1846 NOT_LP64(assert(VM_Version::supports_sse(), "")); | |
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1847 emit_simd_arith(0x10, dst, src, VEX_SIMD_F3); |
304 | 1848 } |
1849 | |
1850 void Assembler::movss(XMMRegister dst, Address src) { | |
1851 NOT_LP64(assert(VM_Version::supports_sse(), "")); | |
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1852 emit_simd_arith_nonds(0x10, dst, src, VEX_SIMD_F3); |
304 | 1853 } |
1854 | |
1855 void Assembler::movss(Address dst, XMMRegister src) { | |
1856 NOT_LP64(assert(VM_Version::supports_sse(), "")); | |
1857 InstructionMark im(this); | |
4759 | 1858 simd_prefix(dst, src, VEX_SIMD_F3); |
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1859 emit_int8(0x11); |
304 | 1860 emit_operand(src, dst); |
1861 } | |
1862 | |
1863 void Assembler::movswl(Register dst, Address src) { // movsxw | |
1864 InstructionMark im(this); | |
1865 prefix(src, dst); | |
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1866 emit_int8(0x0F); |
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1867 emit_int8((unsigned char)0xBF); |
304 | 1868 emit_operand(dst, src); |
1869 } | |
1870 | |
1871 void Assembler::movswl(Register dst, Register src) { // movsxw | |
1872 int encode = prefix_and_encode(dst->encoding(), src->encoding()); | |
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1873 emit_int8(0x0F); |
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1874 emit_int8((unsigned char)0xBF); |
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1875 emit_int8((unsigned char)(0xC0 | encode)); |
304 | 1876 } |
1877 | |
1878 void Assembler::movw(Address dst, int imm16) { | |
1879 InstructionMark im(this); | |
1880 | |
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1881 emit_int8(0x66); // switch to 16-bit mode |
304 | 1882 prefix(dst); |
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1883 emit_int8((unsigned char)0xC7); |
304 | 1884 emit_operand(rax, dst, 2); |
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1885 emit_int16(imm16); |
304 | 1886 } |
1887 | |
1888 void Assembler::movw(Register dst, Address src) { | |
1889 InstructionMark im(this); | |
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1890 emit_int8(0x66); |
304 | 1891 prefix(src, dst); |
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1892 emit_int8((unsigned char)0x8B); |
304 | 1893 emit_operand(dst, src); |
1894 } | |
1895 | |
1896 void Assembler::movw(Address dst, Register src) { | |
1897 InstructionMark im(this); | |
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1898 emit_int8(0x66); |
304 | 1899 prefix(dst, src); |
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1900 emit_int8((unsigned char)0x89); |
304 | 1901 emit_operand(src, dst); |
1902 } | |
1903 | |
1904 void Assembler::movzbl(Register dst, Address src) { // movzxb | |
1905 InstructionMark im(this); | |
1906 prefix(src, dst); | |
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1907 emit_int8(0x0F); |
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1908 emit_int8((unsigned char)0xB6); |
304 | 1909 emit_operand(dst, src); |
1910 } | |
1911 | |
1912 void Assembler::movzbl(Register dst, Register src) { // movzxb | |
1913 NOT_LP64(assert(src->has_byte_register(), "must have byte register")); | |
1914 int encode = prefix_and_encode(dst->encoding(), src->encoding(), true); | |
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1915 emit_int8(0x0F); |
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1916 emit_int8((unsigned char)0xB6); |
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1917 emit_int8(0xC0 | encode); |
304 | 1918 } |
1919 | |
1920 void Assembler::movzwl(Register dst, Address src) { // movzxw | |
1921 InstructionMark im(this); | |
1922 prefix(src, dst); | |
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1923 emit_int8(0x0F); |
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1924 emit_int8((unsigned char)0xB7); |
304 | 1925 emit_operand(dst, src); |
1926 } | |
1927 | |
1928 void Assembler::movzwl(Register dst, Register src) { // movzxw | |
1929 int encode = prefix_and_encode(dst->encoding(), src->encoding()); | |
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1930 emit_int8(0x0F); |
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1931 emit_int8((unsigned char)0xB7); |
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1932 emit_int8(0xC0 | encode); |
304 | 1933 } |
1934 | |
1935 void Assembler::mull(Address src) { | |
1936 InstructionMark im(this); | |
1937 prefix(src); | |
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1938 emit_int8((unsigned char)0xF7); |
304 | 1939 emit_operand(rsp, src); |
1940 } | |
1941 | |
1942 void Assembler::mull(Register src) { | |
1943 int encode = prefix_and_encode(src->encoding()); | |
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1944 emit_int8((unsigned char)0xF7); |
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1945 emit_int8((unsigned char)(0xE0 | encode)); |
304 | 1946 } |
1947 | |
1948 void Assembler::mulsd(XMMRegister dst, Address src) { | |
1949 NOT_LP64(assert(VM_Version::supports_sse2(), "")); | |
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1950 emit_simd_arith(0x59, dst, src, VEX_SIMD_F2); |
304 | 1951 } |
1952 | |
1953 void Assembler::mulsd(XMMRegister dst, XMMRegister src) { | |
1954 NOT_LP64(assert(VM_Version::supports_sse2(), "")); | |
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1955 emit_simd_arith(0x59, dst, src, VEX_SIMD_F2); |
304 | 1956 } |
1957 | |
1958 void Assembler::mulss(XMMRegister dst, Address src) { | |
1959 NOT_LP64(assert(VM_Version::supports_sse(), "")); | |
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1960 emit_simd_arith(0x59, dst, src, VEX_SIMD_F3); |
304 | 1961 } |
1962 | |
1963 void Assembler::mulss(XMMRegister dst, XMMRegister src) { | |
1964 NOT_LP64(assert(VM_Version::supports_sse(), "")); | |
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1965 emit_simd_arith(0x59, dst, src, VEX_SIMD_F3); |
304 | 1966 } |
1967 | |
1968 void Assembler::negl(Register dst) { | |
1969 int encode = prefix_and_encode(dst->encoding()); | |
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1970 emit_int8((unsigned char)0xF7); |
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1971 emit_int8((unsigned char)(0xD8 | encode)); |
304 | 1972 } |
1973 | |
0 | 1974 void Assembler::nop(int i) { |
304 | 1975 #ifdef ASSERT |
0 | 1976 assert(i > 0, " "); |
304 | 1977 // The fancy nops aren't currently recognized by debuggers making it a |
1978 // pain to disassemble code while debugging. If asserts are on clearly | |
1979 // speed is not an issue so simply use the single byte traditional nop | |
1980 // to do alignment. | |
1981 | |
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1982 for (; i > 0 ; i--) emit_int8((unsigned char)0x90); |
304 | 1983 return; |
1984 | |
1985 #endif // ASSERT | |
1986 | |
0 | 1987 if (UseAddressNop && VM_Version::is_intel()) { |
1988 // | |
1989 // Using multi-bytes nops "0x0F 0x1F [address]" for Intel | |
1990 // 1: 0x90 | |
1991 // 2: 0x66 0x90 | |
1992 // 3: 0x66 0x66 0x90 (don't use "0x0F 0x1F 0x00" - need patching safe padding) | |
1993 // 4: 0x0F 0x1F 0x40 0x00 | |
1994 // 5: 0x0F 0x1F 0x44 0x00 0x00 | |
1995 // 6: 0x66 0x0F 0x1F 0x44 0x00 0x00 | |
1996 // 7: 0x0F 0x1F 0x80 0x00 0x00 0x00 0x00 | |
1997 // 8: 0x0F 0x1F 0x84 0x00 0x00 0x00 0x00 0x00 | |
1998 // 9: 0x66 0x0F 0x1F 0x84 0x00 0x00 0x00 0x00 0x00 | |
1999 // 10: 0x66 0x66 0x0F 0x1F 0x84 0x00 0x00 0x00 0x00 0x00 | |
2000 // 11: 0x66 0x66 0x66 0x0F 0x1F 0x84 0x00 0x00 0x00 0x00 0x00 | |
2001 | |
2002 // The rest coding is Intel specific - don't use consecutive address nops | |
2003 | |
2004 // 12: 0x0F 0x1F 0x84 0x00 0x00 0x00 0x00 0x00 0x66 0x66 0x66 0x90 | |
2005 // 13: 0x66 0x0F 0x1F 0x84 0x00 0x00 0x00 0x00 0x00 0x66 0x66 0x66 0x90 | |
2006 // 14: 0x66 0x66 0x0F 0x1F 0x84 0x00 0x00 0x00 0x00 0x00 0x66 0x66 0x66 0x90 | |
2007 // 15: 0x66 0x66 0x66 0x0F 0x1F 0x84 0x00 0x00 0x00 0x00 0x00 0x66 0x66 0x66 0x90 | |
2008 | |
2009 while(i >= 15) { | |
2010 // For Intel don't generate consecutive addess nops (mix with regular nops) | |
2011 i -= 15; | |
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2012 emit_int8(0x66); // size prefix |
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2013 emit_int8(0x66); // size prefix |
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2014 emit_int8(0x66); // size prefix |
0 | 2015 addr_nop_8(); |
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2016 emit_int8(0x66); // size prefix |
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2017 emit_int8(0x66); // size prefix |
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2018 emit_int8(0x66); // size prefix |
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2019 emit_int8((unsigned char)0x90); |
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2020 // nop |
0 | 2021 } |
2022 switch (i) { | |
2023 case 14: | |
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2024 emit_int8(0x66); // size prefix |
0 | 2025 case 13: |
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2026 emit_int8(0x66); // size prefix |
0 | 2027 case 12: |
2028 addr_nop_8(); | |
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2029 emit_int8(0x66); // size prefix |
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2030 emit_int8(0x66); // size prefix |
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2031 emit_int8(0x66); // size prefix |
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2032 emit_int8((unsigned char)0x90); |
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2033 // nop |
0 | 2034 break; |
2035 case 11: | |
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2036 emit_int8(0x66); // size prefix |
0 | 2037 case 10: |
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2038 emit_int8(0x66); // size prefix |
0 | 2039 case 9: |
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2040 emit_int8(0x66); // size prefix |
0 | 2041 case 8: |
2042 addr_nop_8(); | |
2043 break; | |
2044 case 7: | |
2045 addr_nop_7(); | |
2046 break; | |
2047 case 6: | |
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2048 emit_int8(0x66); // size prefix |
0 | 2049 case 5: |
2050 addr_nop_5(); | |
2051 break; | |
2052 case 4: | |
2053 addr_nop_4(); | |
2054 break; | |
2055 case 3: | |
2056 // Don't use "0x0F 0x1F 0x00" - need patching safe padding | |
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2057 emit_int8(0x66); // size prefix |
0 | 2058 case 2: |
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2059 emit_int8(0x66); // size prefix |
0 | 2060 case 1: |
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2061 emit_int8((unsigned char)0x90); |
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2062 // nop |
0 | 2063 break; |
2064 default: | |
2065 assert(i == 0, " "); | |
2066 } | |
2067 return; | |
2068 } | |
2069 if (UseAddressNop && VM_Version::is_amd()) { | |
2070 // | |
2071 // Using multi-bytes nops "0x0F 0x1F [address]" for AMD. | |
2072 // 1: 0x90 | |
2073 // 2: 0x66 0x90 | |
2074 // 3: 0x66 0x66 0x90 (don't use "0x0F 0x1F 0x00" - need patching safe padding) | |
2075 // 4: 0x0F 0x1F 0x40 0x00 | |
2076 // 5: 0x0F 0x1F 0x44 0x00 0x00 | |
2077 // 6: 0x66 0x0F 0x1F 0x44 0x00 0x00 | |
2078 // 7: 0x0F 0x1F 0x80 0x00 0x00 0x00 0x00 | |
2079 // 8: 0x0F 0x1F 0x84 0x00 0x00 0x00 0x00 0x00 | |
2080 // 9: 0x66 0x0F 0x1F 0x84 0x00 0x00 0x00 0x00 0x00 | |
2081 // 10: 0x66 0x66 0x0F 0x1F 0x84 0x00 0x00 0x00 0x00 0x00 | |
2082 // 11: 0x66 0x66 0x66 0x0F 0x1F 0x84 0x00 0x00 0x00 0x00 0x00 | |
2083 | |
2084 // The rest coding is AMD specific - use consecutive address nops | |
2085 | |
2086 // 12: 0x66 0x0F 0x1F 0x44 0x00 0x00 0x66 0x0F 0x1F 0x44 0x00 0x00 | |
2087 // 13: 0x0F 0x1F 0x80 0x00 0x00 0x00 0x00 0x66 0x0F 0x1F 0x44 0x00 0x00 | |
2088 // 14: 0x0F 0x1F 0x80 0x00 0x00 0x00 0x00 0x0F 0x1F 0x80 0x00 0x00 0x00 0x00 | |
2089 // 15: 0x0F 0x1F 0x84 0x00 0x00 0x00 0x00 0x00 0x0F 0x1F 0x80 0x00 0x00 0x00 0x00 | |
2090 // 16: 0x0F 0x1F 0x84 0x00 0x00 0x00 0x00 0x00 0x0F 0x1F 0x84 0x00 0x00 0x00 0x00 0x00 | |
2091 // Size prefixes (0x66) are added for larger sizes | |
2092 | |
2093 while(i >= 22) { | |
2094 i -= 11; | |
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2095 emit_int8(0x66); // size prefix |
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2096 emit_int8(0x66); // size prefix |
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2097 emit_int8(0x66); // size prefix |
0 | 2098 addr_nop_8(); |
2099 } | |
2100 // Generate first nop for size between 21-12 | |
2101 switch (i) { | |
2102 case 21: | |
2103 i -= 1; | |
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2104 emit_int8(0x66); // size prefix |
0 | 2105 case 20: |
2106 case 19: | |
2107 i -= 1; | |
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2108 emit_int8(0x66); // size prefix |
0 | 2109 case 18: |
2110 case 17: | |
2111 i -= 1; | |
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2112 emit_int8(0x66); // size prefix |
0 | 2113 case 16: |
2114 case 15: | |
2115 i -= 8; | |
2116 addr_nop_8(); | |
2117 break; | |
2118 case 14: | |
2119 case 13: | |
2120 i -= 7; | |
2121 addr_nop_7(); | |
2122 break; | |
2123 case 12: | |
2124 i -= 6; | |
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2125 emit_int8(0x66); // size prefix |
0 | 2126 addr_nop_5(); |
2127 break; | |
2128 default: | |
2129 assert(i < 12, " "); | |
2130 } | |
2131 | |
2132 // Generate second nop for size between 11-1 | |
2133 switch (i) { | |
2134 case 11: | |
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2135 emit_int8(0x66); // size prefix |
0 | 2136 case 10: |
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2137 emit_int8(0x66); // size prefix |
0 | 2138 case 9: |
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2139 emit_int8(0x66); // size prefix |
0 | 2140 case 8: |
2141 addr_nop_8(); | |
2142 break; | |
2143 case 7: | |
2144 addr_nop_7(); | |
2145 break; | |
2146 case 6: | |
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2147 emit_int8(0x66); // size prefix |
0 | 2148 case 5: |
2149 addr_nop_5(); | |
2150 break; | |
2151 case 4: | |
2152 addr_nop_4(); | |
2153 break; | |
2154 case 3: | |
2155 // Don't use "0x0F 0x1F 0x00" - need patching safe padding | |
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2156 emit_int8(0x66); // size prefix |
0 | 2157 case 2: |
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2158 emit_int8(0x66); // size prefix |
0 | 2159 case 1: |
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2160 emit_int8((unsigned char)0x90); |
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2161 // nop |
0 | 2162 break; |
2163 default: | |
2164 assert(i == 0, " "); | |
2165 } | |
2166 return; | |
2167 } | |
2168 | |
2169 // Using nops with size prefixes "0x66 0x90". | |
2170 // From AMD Optimization Guide: | |
2171 // 1: 0x90 | |
2172 // 2: 0x66 0x90 | |
2173 // 3: 0x66 0x66 0x90 | |
2174 // 4: 0x66 0x66 0x66 0x90 | |
2175 // 5: 0x66 0x66 0x90 0x66 0x90 | |
2176 // 6: 0x66 0x66 0x90 0x66 0x66 0x90 | |
2177 // 7: 0x66 0x66 0x66 0x90 0x66 0x66 0x90 | |
2178 // 8: 0x66 0x66 0x66 0x90 0x66 0x66 0x66 0x90 | |
2179 // 9: 0x66 0x66 0x90 0x66 0x66 0x90 0x66 0x66 0x90 | |
2180 // 10: 0x66 0x66 0x66 0x90 0x66 0x66 0x90 0x66 0x66 0x90 | |
2181 // | |
2182 while(i > 12) { | |
2183 i -= 4; | |
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2184 emit_int8(0x66); // size prefix |
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2185 emit_int8(0x66); |
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2186 emit_int8(0x66); |
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2187 emit_int8((unsigned char)0x90); |
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|
2188 // nop |
0 | 2189 } |
2190 // 1 - 12 nops | |
2191 if(i > 8) { | |
2192 if(i > 9) { | |
2193 i -= 1; | |
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2194 emit_int8(0x66); |
0 | 2195 } |
2196 i -= 3; | |
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2197 emit_int8(0x66); |
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2198 emit_int8(0x66); |
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2199 emit_int8((unsigned char)0x90); |
0 | 2200 } |
2201 // 1 - 8 nops | |
2202 if(i > 4) { | |
2203 if(i > 6) { | |
2204 i -= 1; | |
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2205 emit_int8(0x66); |
0 | 2206 } |
2207 i -= 3; | |
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2208 emit_int8(0x66); |
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2209 emit_int8(0x66); |
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|
2210 emit_int8((unsigned char)0x90); |
0 | 2211 } |
2212 switch (i) { | |
2213 case 4: | |
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2214 emit_int8(0x66); |
0 | 2215 case 3: |
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2216 emit_int8(0x66); |
0 | 2217 case 2: |
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2218 emit_int8(0x66); |
0 | 2219 case 1: |
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|
2220 emit_int8((unsigned char)0x90); |
0 | 2221 break; |
2222 default: | |
2223 assert(i == 0, " "); | |
2224 } | |
2225 } | |
2226 | |
304 | 2227 void Assembler::notl(Register dst) { |
2228 int encode = prefix_and_encode(dst->encoding()); | |
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2229 emit_int8((unsigned char)0xF7); |
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|
2230 emit_int8((unsigned char)(0xD0 | encode)); |
304 | 2231 } |
2232 | |
2233 void Assembler::orl(Address dst, int32_t imm32) { | |
2234 InstructionMark im(this); | |
2235 prefix(dst); | |
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|
2236 emit_arith_operand(0x81, rcx, dst, imm32); |
304 | 2237 } |
2238 | |
2239 void Assembler::orl(Register dst, int32_t imm32) { | |
2240 prefix(dst); | |
2241 emit_arith(0x81, 0xC8, dst, imm32); | |
2242 } | |
2243 | |
2244 void Assembler::orl(Register dst, Address src) { | |
2245 InstructionMark im(this); | |
2246 prefix(src, dst); | |
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2247 emit_int8(0x0B); |
304 | 2248 emit_operand(dst, src); |
2249 } | |
2250 | |
2251 void Assembler::orl(Register dst, Register src) { | |
2252 (void) prefix_and_encode(dst->encoding(), src->encoding()); | |
2253 emit_arith(0x0B, 0xC0, dst, src); | |
2254 } | |
2255 | |
4759 | 2256 void Assembler::packuswb(XMMRegister dst, Address src) { |
2257 NOT_LP64(assert(VM_Version::supports_sse2(), "")); | |
2258 assert((UseAVX > 0), "SSE mode requires address alignment 16 bytes"); | |
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2259 emit_simd_arith(0x67, dst, src, VEX_SIMD_66); |
4759 | 2260 } |
2261 | |
2262 void Assembler::packuswb(XMMRegister dst, XMMRegister src) { | |
2263 NOT_LP64(assert(VM_Version::supports_sse2(), "")); | |
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2264 emit_simd_arith(0x67, dst, src, VEX_SIMD_66); |
4759 | 2265 } |
2266 | |
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2267 void Assembler::vpackuswb(XMMRegister dst, XMMRegister nds, XMMRegister src, bool vector256) { |
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2268 assert(VM_Version::supports_avx() && !vector256 || VM_Version::supports_avx2(), "256 bit integer vectors requires AVX2"); |
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2269 emit_vex_arith(0x67, dst, nds, src, VEX_SIMD_66, vector256); |
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2270 } |
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2271 |
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2272 void Assembler::vpermq(XMMRegister dst, XMMRegister src, int imm8, bool vector256) { |
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2273 assert(VM_Version::supports_avx2(), ""); |
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2274 int encode = simd_prefix_and_encode(dst, xnoreg, src, VEX_SIMD_66, VEX_OPCODE_0F_3A, true, vector256); |
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2275 emit_int8(0x00); |
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2276 emit_int8(0xC0 | encode); |
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|
2277 emit_int8(imm8); |
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2278 } |
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2279 |
681 | 2280 void Assembler::pcmpestri(XMMRegister dst, Address src, int imm8) { |
2281 assert(VM_Version::supports_sse4_2(), ""); | |
4759 | 2282 InstructionMark im(this); |
2283 simd_prefix(dst, src, VEX_SIMD_66, VEX_OPCODE_0F_3A); | |
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2284 emit_int8(0x61); |
681 | 2285 emit_operand(dst, src); |
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|
2286 emit_int8(imm8); |
681 | 2287 } |
2288 | |
2289 void Assembler::pcmpestri(XMMRegister dst, XMMRegister src, int imm8) { | |
2290 assert(VM_Version::supports_sse4_2(), ""); | |
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2291 int encode = simd_prefix_and_encode(dst, xnoreg, src, VEX_SIMD_66, VEX_OPCODE_0F_3A); |
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2292 emit_int8(0x61); |
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2293 emit_int8((unsigned char)(0xC0 | encode)); |
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2294 emit_int8(imm8); |
681 | 2295 } |
2296 | |
4759 | 2297 void Assembler::pmovzxbw(XMMRegister dst, Address src) { |
2298 assert(VM_Version::supports_sse4_1(), ""); | |
2299 InstructionMark im(this); | |
2300 simd_prefix(dst, src, VEX_SIMD_66, VEX_OPCODE_0F_38); | |
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2301 emit_int8(0x30); |
4759 | 2302 emit_operand(dst, src); |
2303 } | |
2304 | |
2305 void Assembler::pmovzxbw(XMMRegister dst, XMMRegister src) { | |
2306 assert(VM_Version::supports_sse4_1(), ""); | |
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2307 int encode = simd_prefix_and_encode(dst, xnoreg, src, VEX_SIMD_66, VEX_OPCODE_0F_38); |
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2308 emit_int8(0x30); |
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2309 emit_int8((unsigned char)(0xC0 | encode)); |
4759 | 2310 } |
2311 | |
304 | 2312 // generic |
2313 void Assembler::pop(Register dst) { | |
2314 int encode = prefix_and_encode(dst->encoding()); | |
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2315 emit_int8(0x58 | encode); |
304 | 2316 } |
2317 | |
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2318 void Assembler::popcntl(Register dst, Address src) { |
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2319 assert(VM_Version::supports_popcnt(), "must support"); |
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2320 InstructionMark im(this); |
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2321 emit_int8((unsigned char)0xF3); |
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2322 prefix(src, dst); |
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2323 emit_int8(0x0F); |
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2324 emit_int8((unsigned char)0xB8); |
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2325 emit_operand(dst, src); |
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2326 } |
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2327 |
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2328 void Assembler::popcntl(Register dst, Register src) { |
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2329 assert(VM_Version::supports_popcnt(), "must support"); |
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2330 emit_int8((unsigned char)0xF3); |
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2331 int encode = prefix_and_encode(dst->encoding(), src->encoding()); |
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2332 emit_int8(0x0F); |
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2333 emit_int8((unsigned char)0xB8); |
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2334 emit_int8((unsigned char)(0xC0 | encode)); |
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2335 } |
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2336 |
304 | 2337 void Assembler::popf() { |
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2338 emit_int8((unsigned char)0x9D); |
304 | 2339 } |
2340 | |
1060 | 2341 #ifndef _LP64 // no 32bit push/pop on amd64 |
304 | 2342 void Assembler::popl(Address dst) { |
2343 // NOTE: this will adjust stack by 8byte on 64bits | |
2344 InstructionMark im(this); | |
2345 prefix(dst); | |
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2346 emit_int8((unsigned char)0x8F); |
304 | 2347 emit_operand(rax, dst); |
2348 } | |
1060 | 2349 #endif |
304 | 2350 |
2351 void Assembler::prefetch_prefix(Address src) { | |
2352 prefix(src); | |
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2353 emit_int8(0x0F); |
304 | 2354 } |
2355 | |
2356 void Assembler::prefetchnta(Address src) { | |
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2357 NOT_LP64(assert(VM_Version::supports_sse(), "must support")); |
304 | 2358 InstructionMark im(this); |
2359 prefetch_prefix(src); | |
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2360 emit_int8(0x18); |
304 | 2361 emit_operand(rax, src); // 0, src |
2362 } | |
2363 | |
2364 void Assembler::prefetchr(Address src) { | |
3854 | 2365 assert(VM_Version::supports_3dnow_prefetch(), "must support"); |
304 | 2366 InstructionMark im(this); |
2367 prefetch_prefix(src); | |
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2368 emit_int8(0x0D); |
304 | 2369 emit_operand(rax, src); // 0, src |
2370 } | |
2371 | |
2372 void Assembler::prefetcht0(Address src) { | |
2373 NOT_LP64(assert(VM_Version::supports_sse(), "must support")); | |
2374 InstructionMark im(this); | |
2375 prefetch_prefix(src); | |
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2376 emit_int8(0x18); |
304 | 2377 emit_operand(rcx, src); // 1, src |
2378 } | |
2379 | |
2380 void Assembler::prefetcht1(Address src) { | |
2381 NOT_LP64(assert(VM_Version::supports_sse(), "must support")); | |
2382 InstructionMark im(this); | |
2383 prefetch_prefix(src); | |
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2384 emit_int8(0x18); |
304 | 2385 emit_operand(rdx, src); // 2, src |
2386 } | |
2387 | |
2388 void Assembler::prefetcht2(Address src) { | |
2389 NOT_LP64(assert(VM_Version::supports_sse(), "must support")); | |
2390 InstructionMark im(this); | |
2391 prefetch_prefix(src); | |
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2392 emit_int8(0x18); |
304 | 2393 emit_operand(rbx, src); // 3, src |
2394 } | |
2395 | |
2396 void Assembler::prefetchw(Address src) { | |
3854 | 2397 assert(VM_Version::supports_3dnow_prefetch(), "must support"); |
304 | 2398 InstructionMark im(this); |
2399 prefetch_prefix(src); | |
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2400 emit_int8(0x0D); |
304 | 2401 emit_operand(rcx, src); // 1, src |
2402 } | |
2403 | |
2404 void Assembler::prefix(Prefix p) { | |
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2405 emit_int8(p); |
304 | 2406 } |
2407 | |
6894 | 2408 void Assembler::pshufb(XMMRegister dst, XMMRegister src) { |
2409 assert(VM_Version::supports_ssse3(), ""); | |
2410 int encode = simd_prefix_and_encode(dst, dst, src, VEX_SIMD_66, VEX_OPCODE_0F_38); | |
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2411 emit_int8(0x00); |
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2412 emit_int8((unsigned char)(0xC0 | encode)); |
6894 | 2413 } |
2414 | |
2415 void Assembler::pshufb(XMMRegister dst, Address src) { | |
2416 assert(VM_Version::supports_ssse3(), ""); | |
2417 InstructionMark im(this); | |
2418 simd_prefix(dst, dst, src, VEX_SIMD_66, VEX_OPCODE_0F_38); | |
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2419 emit_int8(0x00); |
6894 | 2420 emit_operand(dst, src); |
2421 } | |
2422 | |
304 | 2423 void Assembler::pshufd(XMMRegister dst, XMMRegister src, int mode) { |
2424 assert(isByte(mode), "invalid value"); | |
2425 NOT_LP64(assert(VM_Version::supports_sse2(), "")); | |
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2426 emit_simd_arith_nonds(0x70, dst, src, VEX_SIMD_66); |
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2427 emit_int8(mode & 0xFF); |
304 | 2428 |
2429 } | |
2430 | |
2431 void Assembler::pshufd(XMMRegister dst, Address src, int mode) { | |
2432 assert(isByte(mode), "invalid value"); | |
2433 NOT_LP64(assert(VM_Version::supports_sse2(), "")); | |
4759 | 2434 assert((UseAVX > 0), "SSE mode requires address alignment 16 bytes"); |
2435 InstructionMark im(this); | |
2436 simd_prefix(dst, src, VEX_SIMD_66); | |
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2437 emit_int8(0x70); |
304 | 2438 emit_operand(dst, src); |
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2439 emit_int8(mode & 0xFF); |
304 | 2440 } |
2441 | |
2442 void Assembler::pshuflw(XMMRegister dst, XMMRegister src, int mode) { | |
2443 assert(isByte(mode), "invalid value"); | |
2444 NOT_LP64(assert(VM_Version::supports_sse2(), "")); | |
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2445 emit_simd_arith_nonds(0x70, dst, src, VEX_SIMD_F2); |
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2446 emit_int8(mode & 0xFF); |
304 | 2447 } |
2448 | |
2449 void Assembler::pshuflw(XMMRegister dst, Address src, int mode) { | |
2450 assert(isByte(mode), "invalid value"); | |
2451 NOT_LP64(assert(VM_Version::supports_sse2(), "")); | |
4759 | 2452 assert((UseAVX > 0), "SSE mode requires address alignment 16 bytes"); |
2453 InstructionMark im(this); | |
2454 simd_prefix(dst, src, VEX_SIMD_F2); | |
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|
2455 emit_int8(0x70); |
304 | 2456 emit_operand(dst, src); |
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2457 emit_int8(mode & 0xFF); |
304 | 2458 } |
2459 | |
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2460 void Assembler::psrldq(XMMRegister dst, int shift) { |
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2461 // Shift 128 bit value in xmm register by number of bytes. |
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2462 NOT_LP64(assert(VM_Version::supports_sse2(), "")); |
4759 | 2463 int encode = simd_prefix_and_encode(xmm3, dst, dst, VEX_SIMD_66); |
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2464 emit_int8(0x73); |
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2465 emit_int8((unsigned char)(0xC0 | encode)); |
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2466 emit_int8(shift); |
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2467 } |
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2468 |
681 | 2469 void Assembler::ptest(XMMRegister dst, Address src) { |
2470 assert(VM_Version::supports_sse4_1(), ""); | |
4759 | 2471 assert((UseAVX > 0), "SSE mode requires address alignment 16 bytes"); |
2472 InstructionMark im(this); | |
2473 simd_prefix(dst, src, VEX_SIMD_66, VEX_OPCODE_0F_38); | |
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|
2474 emit_int8(0x17); |
681 | 2475 emit_operand(dst, src); |
2476 } | |
2477 | |
2478 void Assembler::ptest(XMMRegister dst, XMMRegister src) { | |
2479 assert(VM_Version::supports_sse4_1(), ""); | |
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2480 int encode = simd_prefix_and_encode(dst, xnoreg, src, VEX_SIMD_66, VEX_OPCODE_0F_38); |
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|
2481 emit_int8(0x17); |
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2482 emit_int8((unsigned char)(0xC0 | encode)); |
681 | 2483 } |
2484 | |
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2485 void Assembler::vptest(XMMRegister dst, Address src) { |
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2486 assert(VM_Version::supports_avx(), ""); |
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|
2487 InstructionMark im(this); |
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|
2488 bool vector256 = true; |
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2489 assert(dst != xnoreg, "sanity"); |
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2490 int dst_enc = dst->encoding(); |
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2491 // swap src<->dst for encoding |
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2492 vex_prefix(src, 0, dst_enc, VEX_SIMD_66, VEX_OPCODE_0F_38, false, vector256); |
7477
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|
2493 emit_int8(0x17); |
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|
2494 emit_operand(dst, src); |
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|
2495 } |
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|
2496 |
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2497 void Assembler::vptest(XMMRegister dst, XMMRegister src) { |
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2498 assert(VM_Version::supports_avx(), ""); |
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|
2499 bool vector256 = true; |
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2500 int encode = vex_prefix_and_encode(dst, xnoreg, src, VEX_SIMD_66, vector256, VEX_OPCODE_0F_38); |
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2501 emit_int8(0x17); |
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2502 emit_int8((unsigned char)(0xC0 | encode)); |
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2503 } |
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2504 |
4759 | 2505 void Assembler::punpcklbw(XMMRegister dst, Address src) { |
2506 NOT_LP64(assert(VM_Version::supports_sse2(), "")); | |
2507 assert((UseAVX > 0), "SSE mode requires address alignment 16 bytes"); | |
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2508 emit_simd_arith(0x60, dst, src, VEX_SIMD_66); |
4759 | 2509 } |
2510 | |
304 | 2511 void Assembler::punpcklbw(XMMRegister dst, XMMRegister src) { |
2512 NOT_LP64(assert(VM_Version::supports_sse2(), "")); | |
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2513 emit_simd_arith(0x60, dst, src, VEX_SIMD_66); |
304 | 2514 } |
2515 | |
4759 | 2516 void Assembler::punpckldq(XMMRegister dst, Address src) { |
2517 NOT_LP64(assert(VM_Version::supports_sse2(), "")); | |
2518 assert((UseAVX > 0), "SSE mode requires address alignment 16 bytes"); | |
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2519 emit_simd_arith(0x62, dst, src, VEX_SIMD_66); |
4759 | 2520 } |
2521 | |
2522 void Assembler::punpckldq(XMMRegister dst, XMMRegister src) { | |
2523 NOT_LP64(assert(VM_Version::supports_sse2(), "")); | |
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2524 emit_simd_arith(0x62, dst, src, VEX_SIMD_66); |
4759 | 2525 } |
2526 | |
6225 | 2527 void Assembler::punpcklqdq(XMMRegister dst, XMMRegister src) { |
2528 NOT_LP64(assert(VM_Version::supports_sse2(), "")); | |
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2529 emit_simd_arith(0x6C, dst, src, VEX_SIMD_66); |
6225 | 2530 } |
2531 | |
304 | 2532 void Assembler::push(int32_t imm32) { |
2533 // in 64bits we push 64bits onto the stack but only | |
2534 // take a 32bit immediate | |
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2535 emit_int8(0x68); |
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2536 emit_int32(imm32); |
304 | 2537 } |
2538 | |
2539 void Assembler::push(Register src) { | |
2540 int encode = prefix_and_encode(src->encoding()); | |
2541 | |
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2542 emit_int8(0x50 | encode); |
304 | 2543 } |
2544 | |
2545 void Assembler::pushf() { | |
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2546 emit_int8((unsigned char)0x9C); |
304 | 2547 } |
2548 | |
1060 | 2549 #ifndef _LP64 // no 32bit push/pop on amd64 |
304 | 2550 void Assembler::pushl(Address src) { |
2551 // Note this will push 64bit on 64bit | |
2552 InstructionMark im(this); | |
2553 prefix(src); | |
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2554 emit_int8((unsigned char)0xFF); |
304 | 2555 emit_operand(rsi, src); |
2556 } | |
1060 | 2557 #endif |
304 | 2558 |
2559 void Assembler::rcll(Register dst, int imm8) { | |
2560 assert(isShiftCount(imm8), "illegal shift count"); | |
2561 int encode = prefix_and_encode(dst->encoding()); | |
2562 if (imm8 == 1) { | |
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2563 emit_int8((unsigned char)0xD1); |
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2564 emit_int8((unsigned char)(0xD0 | encode)); |
304 | 2565 } else { |
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2566 emit_int8((unsigned char)0xC1); |
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2567 emit_int8((unsigned char)0xD0 | encode); |
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2568 emit_int8(imm8); |
304 | 2569 } |
2570 } | |
2571 | |
2572 // copies data from [esi] to [edi] using rcx pointer sized words | |
2573 // generic | |
2574 void Assembler::rep_mov() { | |
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2575 emit_int8((unsigned char)0xF3); |
304 | 2576 // MOVSQ |
2577 LP64_ONLY(prefix(REX_W)); | |
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2578 emit_int8((unsigned char)0xA5); |
304 | 2579 } |
2580 | |
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2581 // sets rcx bytes with rax, value at [edi] |
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2582 void Assembler::rep_stosb() { |
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2583 emit_int8((unsigned char)0xF3); // REP |
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2584 LP64_ONLY(prefix(REX_W)); |
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2585 emit_int8((unsigned char)0xAA); // STOSB |
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2586 } |
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2587 |
304 | 2588 // sets rcx pointer sized words with rax, value at [edi] |
2589 // generic | |
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2590 void Assembler::rep_stos() { |
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2591 emit_int8((unsigned char)0xF3); // REP |
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2592 LP64_ONLY(prefix(REX_W)); // LP64:STOSQ, LP32:STOSD |
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2593 emit_int8((unsigned char)0xAB); |
304 | 2594 } |
2595 | |
2596 // scans rcx pointer sized words at [edi] for occurance of rax, | |
2597 // generic | |
2598 void Assembler::repne_scan() { // repne_scan | |
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2599 emit_int8((unsigned char)0xF2); |
304 | 2600 // SCASQ |
2601 LP64_ONLY(prefix(REX_W)); | |
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2602 emit_int8((unsigned char)0xAF); |
304 | 2603 } |
2604 | |
2605 #ifdef _LP64 | |
2606 // scans rcx 4 byte words at [edi] for occurance of rax, | |
2607 // generic | |
2608 void Assembler::repne_scanl() { // repne_scan | |
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2609 emit_int8((unsigned char)0xF2); |
304 | 2610 // SCASL |
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2611 emit_int8((unsigned char)0xAF); |
304 | 2612 } |
2613 #endif | |
2614 | |
0 | 2615 void Assembler::ret(int imm16) { |
2616 if (imm16 == 0) { | |
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2617 emit_int8((unsigned char)0xC3); |
0 | 2618 } else { |
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2619 emit_int8((unsigned char)0xC2); |
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2620 emit_int16(imm16); |
0 | 2621 } |
2622 } | |
2623 | |
304 | 2624 void Assembler::sahf() { |
2625 #ifdef _LP64 | |
2626 // Not supported in 64bit mode | |
2627 ShouldNotReachHere(); | |
2628 #endif | |
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2629 emit_int8((unsigned char)0x9E); |
304 | 2630 } |
2631 | |
2632 void Assembler::sarl(Register dst, int imm8) { | |
2633 int encode = prefix_and_encode(dst->encoding()); | |
2634 assert(isShiftCount(imm8), "illegal shift count"); | |
2635 if (imm8 == 1) { | |
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|
2636 emit_int8((unsigned char)0xD1); |
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2637 emit_int8((unsigned char)(0xF8 | encode)); |
304 | 2638 } else { |
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|
2639 emit_int8((unsigned char)0xC1); |
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|
2640 emit_int8((unsigned char)(0xF8 | encode)); |
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|
2641 emit_int8(imm8); |
304 | 2642 } |
2643 } | |
2644 | |
2645 void Assembler::sarl(Register dst) { | |
2646 int encode = prefix_and_encode(dst->encoding()); | |
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|
2647 emit_int8((unsigned char)0xD3); |
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|
2648 emit_int8((unsigned char)(0xF8 | encode)); |
304 | 2649 } |
2650 | |
2651 void Assembler::sbbl(Address dst, int32_t imm32) { | |
2652 InstructionMark im(this); | |
2653 prefix(dst); | |
2654 emit_arith_operand(0x81, rbx, dst, imm32); | |
2655 } | |
2656 | |
2657 void Assembler::sbbl(Register dst, int32_t imm32) { | |
2658 prefix(dst); | |
2659 emit_arith(0x81, 0xD8, dst, imm32); | |
2660 } | |
2661 | |
2662 | |
2663 void Assembler::sbbl(Register dst, Address src) { | |
2664 InstructionMark im(this); | |
2665 prefix(src, dst); | |
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|
2666 emit_int8(0x1B); |
304 | 2667 emit_operand(dst, src); |
2668 } | |
2669 | |
2670 void Assembler::sbbl(Register dst, Register src) { | |
2671 (void) prefix_and_encode(dst->encoding(), src->encoding()); | |
2672 emit_arith(0x1B, 0xC0, dst, src); | |
2673 } | |
2674 | |
2675 void Assembler::setb(Condition cc, Register dst) { | |
2676 assert(0 <= cc && cc < 16, "illegal cc"); | |
2677 int encode = prefix_and_encode(dst->encoding(), true); | |
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|
2678 emit_int8(0x0F); |
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|
2679 emit_int8((unsigned char)0x90 | cc); |
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|
2680 emit_int8((unsigned char)(0xC0 | encode)); |
304 | 2681 } |
2682 | |
2683 void Assembler::shll(Register dst, int imm8) { | |
2684 assert(isShiftCount(imm8), "illegal shift count"); | |
2685 int encode = prefix_and_encode(dst->encoding()); | |
2686 if (imm8 == 1 ) { | |
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|
2687 emit_int8((unsigned char)0xD1); |
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|
2688 emit_int8((unsigned char)(0xE0 | encode)); |
304 | 2689 } else { |
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|
2690 emit_int8((unsigned char)0xC1); |
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changeset
|
2691 emit_int8((unsigned char)(0xE0 | encode)); |
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changeset
|
2692 emit_int8(imm8); |
304 | 2693 } |
2694 } | |
2695 | |
2696 void Assembler::shll(Register dst) { | |
2697 int encode = prefix_and_encode(dst->encoding()); | |
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|
2698 emit_int8((unsigned char)0xD3); |
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|
2699 emit_int8((unsigned char)(0xE0 | encode)); |
304 | 2700 } |
2701 | |
2702 void Assembler::shrl(Register dst, int imm8) { | |
2703 assert(isShiftCount(imm8), "illegal shift count"); | |
2704 int encode = prefix_and_encode(dst->encoding()); | |
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|
2705 emit_int8((unsigned char)0xC1); |
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|
2706 emit_int8((unsigned char)(0xE8 | encode)); |
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|
2707 emit_int8(imm8); |
304 | 2708 } |
2709 | |
2710 void Assembler::shrl(Register dst) { | |
2711 int encode = prefix_and_encode(dst->encoding()); | |
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|
2712 emit_int8((unsigned char)0xD3); |
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|
2713 emit_int8((unsigned char)(0xE8 | encode)); |
304 | 2714 } |
0 | 2715 |
2716 // copies a single word from [esi] to [edi] | |
2717 void Assembler::smovl() { | |
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|
2718 emit_int8((unsigned char)0xA5); |
0 | 2719 } |
2720 | |
304 | 2721 void Assembler::sqrtsd(XMMRegister dst, XMMRegister src) { |
2722 NOT_LP64(assert(VM_Version::supports_sse2(), "")); | |
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2723 emit_simd_arith(0x51, dst, src, VEX_SIMD_F2); |
304 | 2724 } |
2725 | |
2008 | 2726 void Assembler::sqrtsd(XMMRegister dst, Address src) { |
2727 NOT_LP64(assert(VM_Version::supports_sse2(), "")); | |
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2728 emit_simd_arith(0x51, dst, src, VEX_SIMD_F2); |
2008 | 2729 } |
2730 | |
2731 void Assembler::sqrtss(XMMRegister dst, XMMRegister src) { | |
4759 | 2732 NOT_LP64(assert(VM_Version::supports_sse(), "")); |
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2733 emit_simd_arith(0x51, dst, src, VEX_SIMD_F3); |
2008 | 2734 } |
2735 | |
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2736 void Assembler::std() { |
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|
2737 emit_int8((unsigned char)0xFD); |
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2738 } |
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|
2739 |
2008 | 2740 void Assembler::sqrtss(XMMRegister dst, Address src) { |
4759 | 2741 NOT_LP64(assert(VM_Version::supports_sse(), "")); |
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|
2742 emit_simd_arith(0x51, dst, src, VEX_SIMD_F3); |
2008 | 2743 } |
2744 | |
304 | 2745 void Assembler::stmxcsr( Address dst) { |
2746 NOT_LP64(assert(VM_Version::supports_sse(), "")); | |
2747 InstructionMark im(this); | |
2748 prefix(dst); | |
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|
2749 emit_int8(0x0F); |
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changeset
|
2750 emit_int8((unsigned char)0xAE); |
304 | 2751 emit_operand(as_Register(3), dst); |
2752 } | |
2753 | |
2754 void Assembler::subl(Address dst, int32_t imm32) { | |
2755 InstructionMark im(this); | |
2756 prefix(dst); | |
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changeset
|
2757 emit_arith_operand(0x81, rbp, dst, imm32); |
304 | 2758 } |
2759 | |
2760 void Assembler::subl(Address dst, Register src) { | |
2761 InstructionMark im(this); | |
2762 prefix(dst, src); | |
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|
2763 emit_int8(0x29); |
304 | 2764 emit_operand(src, dst); |
2765 } | |
2766 | |
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|
2767 void Assembler::subl(Register dst, int32_t imm32) { |
b1a2afa37ec4
7003271: Hotspot should track cumulative Java heap bytes allocated on a per-thread basis
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parents:
2014
diff
changeset
|
2768 prefix(dst); |
b1a2afa37ec4
7003271: Hotspot should track cumulative Java heap bytes allocated on a per-thread basis
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parents:
2014
diff
changeset
|
2769 emit_arith(0x81, 0xE8, dst, imm32); |
b1a2afa37ec4
7003271: Hotspot should track cumulative Java heap bytes allocated on a per-thread basis
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parents:
2014
diff
changeset
|
2770 } |
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7003271: Hotspot should track cumulative Java heap bytes allocated on a per-thread basis
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2014
diff
changeset
|
2771 |
4947
fd8114661503
7125136: SIGILL on linux amd64 in gc/ArrayJuggle/Juggle29
kvn
parents:
4770
diff
changeset
|
2772 // Force generation of a 4 byte immediate value even if it fits into 8bit |
fd8114661503
7125136: SIGILL on linux amd64 in gc/ArrayJuggle/Juggle29
kvn
parents:
4770
diff
changeset
|
2773 void Assembler::subl_imm32(Register dst, int32_t imm32) { |
fd8114661503
7125136: SIGILL on linux amd64 in gc/ArrayJuggle/Juggle29
kvn
parents:
4770
diff
changeset
|
2774 prefix(dst); |
fd8114661503
7125136: SIGILL on linux amd64 in gc/ArrayJuggle/Juggle29
kvn
parents:
4770
diff
changeset
|
2775 emit_arith_imm32(0x81, 0xE8, dst, imm32); |
fd8114661503
7125136: SIGILL on linux amd64 in gc/ArrayJuggle/Juggle29
kvn
parents:
4770
diff
changeset
|
2776 } |
fd8114661503
7125136: SIGILL on linux amd64 in gc/ArrayJuggle/Juggle29
kvn
parents:
4770
diff
changeset
|
2777 |
304 | 2778 void Assembler::subl(Register dst, Address src) { |
2779 InstructionMark im(this); | |
2780 prefix(src, dst); | |
7430
d02120b7a34f
8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
twisti
parents:
7427
diff
changeset
|
2781 emit_int8(0x2B); |
304 | 2782 emit_operand(dst, src); |
2783 } | |
2784 | |
2785 void Assembler::subl(Register dst, Register src) { | |
2786 (void) prefix_and_encode(dst->encoding(), src->encoding()); | |
2787 emit_arith(0x2B, 0xC0, dst, src); | |
2788 } | |
2789 | |
2790 void Assembler::subsd(XMMRegister dst, XMMRegister src) { | |
2791 NOT_LP64(assert(VM_Version::supports_sse2(), "")); | |
6614
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
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6266
diff
changeset
|
2792 emit_simd_arith(0x5C, dst, src, VEX_SIMD_F2); |
304 | 2793 } |
2794 | |
2795 void Assembler::subsd(XMMRegister dst, Address src) { | |
2796 NOT_LP64(assert(VM_Version::supports_sse2(), "")); | |
6614
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
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6266
diff
changeset
|
2797 emit_simd_arith(0x5C, dst, src, VEX_SIMD_F2); |
304 | 2798 } |
2799 | |
2800 void Assembler::subss(XMMRegister dst, XMMRegister src) { | |
2801 NOT_LP64(assert(VM_Version::supports_sse(), "")); | |
6614
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
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6266
diff
changeset
|
2802 emit_simd_arith(0x5C, dst, src, VEX_SIMD_F3); |
304 | 2803 } |
2804 | |
2805 void Assembler::subss(XMMRegister dst, Address src) { | |
2806 NOT_LP64(assert(VM_Version::supports_sse(), "")); | |
6614
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
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6266
diff
changeset
|
2807 emit_simd_arith(0x5C, dst, src, VEX_SIMD_F3); |
304 | 2808 } |
2809 | |
2810 void Assembler::testb(Register dst, int imm8) { | |
2811 NOT_LP64(assert(dst->has_byte_register(), "must have byte register")); | |
2812 (void) prefix_and_encode(dst->encoding(), true); | |
2813 emit_arith_b(0xF6, 0xC0, dst, imm8); | |
2814 } | |
2815 | |
2816 void Assembler::testl(Register dst, int32_t imm32) { | |
2817 // not using emit_arith because test | |
2818 // doesn't support sign-extension of | |
2819 // 8bit operands | |
2820 int encode = dst->encoding(); | |
2821 if (encode == 0) { | |
7430
d02120b7a34f
8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
twisti
parents:
7427
diff
changeset
|
2822 emit_int8((unsigned char)0xA9); |
304 | 2823 } else { |
2824 encode = prefix_and_encode(encode); | |
7430
d02120b7a34f
8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
twisti
parents:
7427
diff
changeset
|
2825 emit_int8((unsigned char)0xF7); |
d02120b7a34f
8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
twisti
parents:
7427
diff
changeset
|
2826 emit_int8((unsigned char)(0xC0 | encode)); |
304 | 2827 } |
7476
ffa87474d7a4
8004537: replace AbstractAssembler emit_long with emit_int32
twisti
parents:
7475
diff
changeset
|
2828 emit_int32(imm32); |
304 | 2829 } |
2830 | |
2831 void Assembler::testl(Register dst, Register src) { | |
2832 (void) prefix_and_encode(dst->encoding(), src->encoding()); | |
2833 emit_arith(0x85, 0xC0, dst, src); | |
2834 } | |
2835 | |
2836 void Assembler::testl(Register dst, Address src) { | |
2837 InstructionMark im(this); | |
2838 prefix(src, dst); | |
7430
d02120b7a34f
8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
twisti
parents:
7427
diff
changeset
|
2839 emit_int8((unsigned char)0x85); |
304 | 2840 emit_operand(dst, src); |
2841 } | |
2842 | |
2843 void Assembler::ucomisd(XMMRegister dst, Address src) { | |
2844 NOT_LP64(assert(VM_Version::supports_sse2(), "")); | |
6614
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
2845 emit_simd_arith_nonds(0x2E, dst, src, VEX_SIMD_66); |
304 | 2846 } |
2847 | |
2848 void Assembler::ucomisd(XMMRegister dst, XMMRegister src) { | |
2849 NOT_LP64(assert(VM_Version::supports_sse2(), "")); | |
6614
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
2850 emit_simd_arith_nonds(0x2E, dst, src, VEX_SIMD_66); |
304 | 2851 } |
2852 | |
2853 void Assembler::ucomiss(XMMRegister dst, Address src) { | |
2854 NOT_LP64(assert(VM_Version::supports_sse(), "")); | |
6614
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
2855 emit_simd_arith_nonds(0x2E, dst, src, VEX_SIMD_NONE); |
304 | 2856 } |
2857 | |
2858 void Assembler::ucomiss(XMMRegister dst, XMMRegister src) { | |
2859 NOT_LP64(assert(VM_Version::supports_sse(), "")); | |
6614
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
2860 emit_simd_arith_nonds(0x2E, dst, src, VEX_SIMD_NONE); |
304 | 2861 } |
2862 | |
2863 | |
2864 void Assembler::xaddl(Address dst, Register src) { | |
2865 InstructionMark im(this); | |
2866 prefix(dst, src); | |
7430
d02120b7a34f
8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
twisti
parents:
7427
diff
changeset
|
2867 emit_int8(0x0F); |
d02120b7a34f
8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
twisti
parents:
7427
diff
changeset
|
2868 emit_int8((unsigned char)0xC1); |
304 | 2869 emit_operand(src, dst); |
2870 } | |
2871 | |
2872 void Assembler::xchgl(Register dst, Address src) { // xchg | |
2873 InstructionMark im(this); | |
2874 prefix(src, dst); | |
7430
d02120b7a34f
8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
twisti
parents:
7427
diff
changeset
|
2875 emit_int8((unsigned char)0x87); |
304 | 2876 emit_operand(dst, src); |
2877 } | |
2878 | |
2879 void Assembler::xchgl(Register dst, Register src) { | |
2880 int encode = prefix_and_encode(dst->encoding(), src->encoding()); | |
7430
d02120b7a34f
8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
twisti
parents:
7427
diff
changeset
|
2881 emit_int8((unsigned char)0x87); |
d02120b7a34f
8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
twisti
parents:
7427
diff
changeset
|
2882 emit_int8((unsigned char)(0xC0 | encode)); |
304 | 2883 } |
2884 | |
7199
cd3d6a6b95d9
8003240: x86: move MacroAssembler into separate file
twisti
parents:
7198
diff
changeset
|
2885 void Assembler::xgetbv() { |
7430
d02120b7a34f
8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
twisti
parents:
7427
diff
changeset
|
2886 emit_int8(0x0F); |
d02120b7a34f
8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
twisti
parents:
7427
diff
changeset
|
2887 emit_int8(0x01); |
d02120b7a34f
8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
twisti
parents:
7427
diff
changeset
|
2888 emit_int8((unsigned char)0xD0); |
7199
cd3d6a6b95d9
8003240: x86: move MacroAssembler into separate file
twisti
parents:
7198
diff
changeset
|
2889 } |
cd3d6a6b95d9
8003240: x86: move MacroAssembler into separate file
twisti
parents:
7198
diff
changeset
|
2890 |
304 | 2891 void Assembler::xorl(Register dst, int32_t imm32) { |
2892 prefix(dst); | |
2893 emit_arith(0x81, 0xF0, dst, imm32); | |
2894 } | |
2895 | |
2896 void Assembler::xorl(Register dst, Address src) { | |
2897 InstructionMark im(this); | |
2898 prefix(src, dst); | |
7430
d02120b7a34f
8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
twisti
parents:
7427
diff
changeset
|
2899 emit_int8(0x33); |
304 | 2900 emit_operand(dst, src); |
2901 } | |
2902 | |
2903 void Assembler::xorl(Register dst, Register src) { | |
2904 (void) prefix_and_encode(dst->encoding(), src->encoding()); | |
2905 emit_arith(0x33, 0xC0, dst, src); | |
2906 } | |
2907 | |
6614
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
2908 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
2909 // AVX 3-operands scalar float-point arithmetic instructions |
4761
65149e74c706
7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
4759
diff
changeset
|
2910 |
65149e74c706
7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
4759
diff
changeset
|
2911 void Assembler::vaddsd(XMMRegister dst, XMMRegister nds, Address src) { |
65149e74c706
7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
4759
diff
changeset
|
2912 assert(VM_Version::supports_avx(), ""); |
6614
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
2913 emit_vex_arith(0x58, dst, nds, src, VEX_SIMD_F2, /* vector256 */ false); |
4761
65149e74c706
7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
4759
diff
changeset
|
2914 } |
65149e74c706
7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
4759
diff
changeset
|
2915 |
65149e74c706
7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
4759
diff
changeset
|
2916 void Assembler::vaddsd(XMMRegister dst, XMMRegister nds, XMMRegister src) { |
65149e74c706
7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
4759
diff
changeset
|
2917 assert(VM_Version::supports_avx(), ""); |
6614
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
2918 emit_vex_arith(0x58, dst, nds, src, VEX_SIMD_F2, /* vector256 */ false); |
4761
65149e74c706
7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
4759
diff
changeset
|
2919 } |
65149e74c706
7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
4759
diff
changeset
|
2920 |
65149e74c706
7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
4759
diff
changeset
|
2921 void Assembler::vaddss(XMMRegister dst, XMMRegister nds, Address src) { |
65149e74c706
7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
4759
diff
changeset
|
2922 assert(VM_Version::supports_avx(), ""); |
6614
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
2923 emit_vex_arith(0x58, dst, nds, src, VEX_SIMD_F3, /* vector256 */ false); |
4761
65149e74c706
7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
4759
diff
changeset
|
2924 } |
65149e74c706
7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
4759
diff
changeset
|
2925 |
65149e74c706
7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
4759
diff
changeset
|
2926 void Assembler::vaddss(XMMRegister dst, XMMRegister nds, XMMRegister src) { |
65149e74c706
7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
4759
diff
changeset
|
2927 assert(VM_Version::supports_avx(), ""); |
6614
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
2928 emit_vex_arith(0x58, dst, nds, src, VEX_SIMD_F3, /* vector256 */ false); |
4761
65149e74c706
7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
4759
diff
changeset
|
2929 } |
65149e74c706
7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
4759
diff
changeset
|
2930 |
65149e74c706
7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
4759
diff
changeset
|
2931 void Assembler::vdivsd(XMMRegister dst, XMMRegister nds, Address src) { |
65149e74c706
7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
4759
diff
changeset
|
2932 assert(VM_Version::supports_avx(), ""); |
6614
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
2933 emit_vex_arith(0x5E, dst, nds, src, VEX_SIMD_F2, /* vector256 */ false); |
4761
65149e74c706
7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
4759
diff
changeset
|
2934 } |
65149e74c706
7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
4759
diff
changeset
|
2935 |
65149e74c706
7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
4759
diff
changeset
|
2936 void Assembler::vdivsd(XMMRegister dst, XMMRegister nds, XMMRegister src) { |
65149e74c706
7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
4759
diff
changeset
|
2937 assert(VM_Version::supports_avx(), ""); |
6614
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
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6266
diff
changeset
|
2938 emit_vex_arith(0x5E, dst, nds, src, VEX_SIMD_F2, /* vector256 */ false); |
4761
65149e74c706
7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
4759
diff
changeset
|
2939 } |
65149e74c706
7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
4759
diff
changeset
|
2940 |
65149e74c706
7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
4759
diff
changeset
|
2941 void Assembler::vdivss(XMMRegister dst, XMMRegister nds, Address src) { |
65149e74c706
7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
4759
diff
changeset
|
2942 assert(VM_Version::supports_avx(), ""); |
6614
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
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6266
diff
changeset
|
2943 emit_vex_arith(0x5E, dst, nds, src, VEX_SIMD_F3, /* vector256 */ false); |
4761
65149e74c706
7121648: Use 3-operands SIMD instructions on x86 with AVX
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4759
diff
changeset
|
2944 } |
65149e74c706
7121648: Use 3-operands SIMD instructions on x86 with AVX
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4759
diff
changeset
|
2945 |
65149e74c706
7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
4759
diff
changeset
|
2946 void Assembler::vdivss(XMMRegister dst, XMMRegister nds, XMMRegister src) { |
65149e74c706
7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
4759
diff
changeset
|
2947 assert(VM_Version::supports_avx(), ""); |
6614
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6340864: Implement vectorization optimizations in hotspot-server
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6266
diff
changeset
|
2948 emit_vex_arith(0x5E, dst, nds, src, VEX_SIMD_F3, /* vector256 */ false); |
4761
65149e74c706
7121648: Use 3-operands SIMD instructions on x86 with AVX
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4759
diff
changeset
|
2949 } |
65149e74c706
7121648: Use 3-operands SIMD instructions on x86 with AVX
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4759
diff
changeset
|
2950 |
65149e74c706
7121648: Use 3-operands SIMD instructions on x86 with AVX
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4759
diff
changeset
|
2951 void Assembler::vmulsd(XMMRegister dst, XMMRegister nds, Address src) { |
65149e74c706
7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
4759
diff
changeset
|
2952 assert(VM_Version::supports_avx(), ""); |
6614
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6340864: Implement vectorization optimizations in hotspot-server
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6266
diff
changeset
|
2953 emit_vex_arith(0x59, dst, nds, src, VEX_SIMD_F2, /* vector256 */ false); |
4761
65149e74c706
7121648: Use 3-operands SIMD instructions on x86 with AVX
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4759
diff
changeset
|
2954 } |
65149e74c706
7121648: Use 3-operands SIMD instructions on x86 with AVX
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4759
diff
changeset
|
2955 |
65149e74c706
7121648: Use 3-operands SIMD instructions on x86 with AVX
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parents:
4759
diff
changeset
|
2956 void Assembler::vmulsd(XMMRegister dst, XMMRegister nds, XMMRegister src) { |
65149e74c706
7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
4759
diff
changeset
|
2957 assert(VM_Version::supports_avx(), ""); |
6614
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6340864: Implement vectorization optimizations in hotspot-server
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6266
diff
changeset
|
2958 emit_vex_arith(0x59, dst, nds, src, VEX_SIMD_F2, /* vector256 */ false); |
4761
65149e74c706
7121648: Use 3-operands SIMD instructions on x86 with AVX
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4759
diff
changeset
|
2959 } |
65149e74c706
7121648: Use 3-operands SIMD instructions on x86 with AVX
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4759
diff
changeset
|
2960 |
65149e74c706
7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
4759
diff
changeset
|
2961 void Assembler::vmulss(XMMRegister dst, XMMRegister nds, Address src) { |
6614
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6340864: Implement vectorization optimizations in hotspot-server
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changeset
|
2962 assert(VM_Version::supports_avx(), ""); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
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6266
diff
changeset
|
2963 emit_vex_arith(0x59, dst, nds, src, VEX_SIMD_F3, /* vector256 */ false); |
4761
65149e74c706
7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
4759
diff
changeset
|
2964 } |
65149e74c706
7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
4759
diff
changeset
|
2965 |
65149e74c706
7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
4759
diff
changeset
|
2966 void Assembler::vmulss(XMMRegister dst, XMMRegister nds, XMMRegister src) { |
65149e74c706
7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
4759
diff
changeset
|
2967 assert(VM_Version::supports_avx(), ""); |
6614
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
2968 emit_vex_arith(0x59, dst, nds, src, VEX_SIMD_F3, /* vector256 */ false); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
2969 } |
4761
65149e74c706
7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
4759
diff
changeset
|
2970 |
65149e74c706
7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
4759
diff
changeset
|
2971 void Assembler::vsubsd(XMMRegister dst, XMMRegister nds, Address src) { |
65149e74c706
7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
4759
diff
changeset
|
2972 assert(VM_Version::supports_avx(), ""); |
6614
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
2973 emit_vex_arith(0x5C, dst, nds, src, VEX_SIMD_F2, /* vector256 */ false); |
4761
65149e74c706
7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
4759
diff
changeset
|
2974 } |
65149e74c706
7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
4759
diff
changeset
|
2975 |
65149e74c706
7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
4759
diff
changeset
|
2976 void Assembler::vsubsd(XMMRegister dst, XMMRegister nds, XMMRegister src) { |
65149e74c706
7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
4759
diff
changeset
|
2977 assert(VM_Version::supports_avx(), ""); |
6614
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
2978 emit_vex_arith(0x5C, dst, nds, src, VEX_SIMD_F2, /* vector256 */ false); |
4761
65149e74c706
7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
4759
diff
changeset
|
2979 } |
65149e74c706
7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
4759
diff
changeset
|
2980 |
65149e74c706
7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
4759
diff
changeset
|
2981 void Assembler::vsubss(XMMRegister dst, XMMRegister nds, Address src) { |
65149e74c706
7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
4759
diff
changeset
|
2982 assert(VM_Version::supports_avx(), ""); |
6614
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
2983 emit_vex_arith(0x5C, dst, nds, src, VEX_SIMD_F3, /* vector256 */ false); |
4761
65149e74c706
7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
4759
diff
changeset
|
2984 } |
65149e74c706
7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
4759
diff
changeset
|
2985 |
65149e74c706
7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
4759
diff
changeset
|
2986 void Assembler::vsubss(XMMRegister dst, XMMRegister nds, XMMRegister src) { |
65149e74c706
7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
4759
diff
changeset
|
2987 assert(VM_Version::supports_avx(), ""); |
6614
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
2988 emit_vex_arith(0x5C, dst, nds, src, VEX_SIMD_F3, /* vector256 */ false); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
2989 } |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
2990 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
2991 //====================VECTOR ARITHMETIC===================================== |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
2992 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
2993 // Float-point vector arithmetic |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
2994 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
2995 void Assembler::addpd(XMMRegister dst, XMMRegister src) { |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
2996 NOT_LP64(assert(VM_Version::supports_sse2(), "")); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
2997 emit_simd_arith(0x58, dst, src, VEX_SIMD_66); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
2998 } |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
2999 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3000 void Assembler::addps(XMMRegister dst, XMMRegister src) { |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3001 NOT_LP64(assert(VM_Version::supports_sse2(), "")); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3002 emit_simd_arith(0x58, dst, src, VEX_SIMD_NONE); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3003 } |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3004 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3005 void Assembler::vaddpd(XMMRegister dst, XMMRegister nds, XMMRegister src, bool vector256) { |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3006 assert(VM_Version::supports_avx(), ""); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3007 emit_vex_arith(0x58, dst, nds, src, VEX_SIMD_66, vector256); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3008 } |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3009 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3010 void Assembler::vaddps(XMMRegister dst, XMMRegister nds, XMMRegister src, bool vector256) { |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3011 assert(VM_Version::supports_avx(), ""); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3012 emit_vex_arith(0x58, dst, nds, src, VEX_SIMD_NONE, vector256); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3013 } |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3014 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3015 void Assembler::vaddpd(XMMRegister dst, XMMRegister nds, Address src, bool vector256) { |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3016 assert(VM_Version::supports_avx(), ""); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3017 emit_vex_arith(0x58, dst, nds, src, VEX_SIMD_66, vector256); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3018 } |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3019 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3020 void Assembler::vaddps(XMMRegister dst, XMMRegister nds, Address src, bool vector256) { |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3021 assert(VM_Version::supports_avx(), ""); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3022 emit_vex_arith(0x58, dst, nds, src, VEX_SIMD_NONE, vector256); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3023 } |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3024 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3025 void Assembler::subpd(XMMRegister dst, XMMRegister src) { |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3026 NOT_LP64(assert(VM_Version::supports_sse2(), "")); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3027 emit_simd_arith(0x5C, dst, src, VEX_SIMD_66); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3028 } |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3029 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3030 void Assembler::subps(XMMRegister dst, XMMRegister src) { |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3031 NOT_LP64(assert(VM_Version::supports_sse2(), "")); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3032 emit_simd_arith(0x5C, dst, src, VEX_SIMD_NONE); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3033 } |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3034 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3035 void Assembler::vsubpd(XMMRegister dst, XMMRegister nds, XMMRegister src, bool vector256) { |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3036 assert(VM_Version::supports_avx(), ""); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3037 emit_vex_arith(0x5C, dst, nds, src, VEX_SIMD_66, vector256); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3038 } |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3039 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3040 void Assembler::vsubps(XMMRegister dst, XMMRegister nds, XMMRegister src, bool vector256) { |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3041 assert(VM_Version::supports_avx(), ""); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3042 emit_vex_arith(0x5C, dst, nds, src, VEX_SIMD_NONE, vector256); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3043 } |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3044 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3045 void Assembler::vsubpd(XMMRegister dst, XMMRegister nds, Address src, bool vector256) { |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3046 assert(VM_Version::supports_avx(), ""); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3047 emit_vex_arith(0x5C, dst, nds, src, VEX_SIMD_66, vector256); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3048 } |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3049 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3050 void Assembler::vsubps(XMMRegister dst, XMMRegister nds, Address src, bool vector256) { |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3051 assert(VM_Version::supports_avx(), ""); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3052 emit_vex_arith(0x5C, dst, nds, src, VEX_SIMD_NONE, vector256); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3053 } |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3054 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3055 void Assembler::mulpd(XMMRegister dst, XMMRegister src) { |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3056 NOT_LP64(assert(VM_Version::supports_sse2(), "")); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3057 emit_simd_arith(0x59, dst, src, VEX_SIMD_66); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3058 } |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3059 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3060 void Assembler::mulps(XMMRegister dst, XMMRegister src) { |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3061 NOT_LP64(assert(VM_Version::supports_sse2(), "")); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3062 emit_simd_arith(0x59, dst, src, VEX_SIMD_NONE); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3063 } |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3064 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3065 void Assembler::vmulpd(XMMRegister dst, XMMRegister nds, XMMRegister src, bool vector256) { |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3066 assert(VM_Version::supports_avx(), ""); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3067 emit_vex_arith(0x59, dst, nds, src, VEX_SIMD_66, vector256); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3068 } |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3069 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3070 void Assembler::vmulps(XMMRegister dst, XMMRegister nds, XMMRegister src, bool vector256) { |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3071 assert(VM_Version::supports_avx(), ""); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3072 emit_vex_arith(0x59, dst, nds, src, VEX_SIMD_NONE, vector256); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3073 } |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3074 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3075 void Assembler::vmulpd(XMMRegister dst, XMMRegister nds, Address src, bool vector256) { |
4761
65149e74c706
7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
4759
diff
changeset
|
3076 assert(VM_Version::supports_avx(), ""); |
6614
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3077 emit_vex_arith(0x59, dst, nds, src, VEX_SIMD_66, vector256); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3078 } |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3079 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3080 void Assembler::vmulps(XMMRegister dst, XMMRegister nds, Address src, bool vector256) { |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3081 assert(VM_Version::supports_avx(), ""); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3082 emit_vex_arith(0x59, dst, nds, src, VEX_SIMD_NONE, vector256); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3083 } |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3084 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3085 void Assembler::divpd(XMMRegister dst, XMMRegister src) { |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3086 NOT_LP64(assert(VM_Version::supports_sse2(), "")); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3087 emit_simd_arith(0x5E, dst, src, VEX_SIMD_66); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3088 } |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3089 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3090 void Assembler::divps(XMMRegister dst, XMMRegister src) { |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3091 NOT_LP64(assert(VM_Version::supports_sse2(), "")); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3092 emit_simd_arith(0x5E, dst, src, VEX_SIMD_NONE); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3093 } |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3094 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3095 void Assembler::vdivpd(XMMRegister dst, XMMRegister nds, XMMRegister src, bool vector256) { |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3096 assert(VM_Version::supports_avx(), ""); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3097 emit_vex_arith(0x5E, dst, nds, src, VEX_SIMD_66, vector256); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3098 } |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3099 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3100 void Assembler::vdivps(XMMRegister dst, XMMRegister nds, XMMRegister src, bool vector256) { |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3101 assert(VM_Version::supports_avx(), ""); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3102 emit_vex_arith(0x5E, dst, nds, src, VEX_SIMD_NONE, vector256); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3103 } |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3104 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3105 void Assembler::vdivpd(XMMRegister dst, XMMRegister nds, Address src, bool vector256) { |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3106 assert(VM_Version::supports_avx(), ""); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3107 emit_vex_arith(0x5E, dst, nds, src, VEX_SIMD_66, vector256); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3108 } |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3109 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3110 void Assembler::vdivps(XMMRegister dst, XMMRegister nds, Address src, bool vector256) { |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3111 assert(VM_Version::supports_avx(), ""); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3112 emit_vex_arith(0x5E, dst, nds, src, VEX_SIMD_NONE, vector256); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3113 } |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3114 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3115 void Assembler::andpd(XMMRegister dst, XMMRegister src) { |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3116 NOT_LP64(assert(VM_Version::supports_sse2(), "")); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3117 emit_simd_arith(0x54, dst, src, VEX_SIMD_66); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3118 } |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3119 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3120 void Assembler::andps(XMMRegister dst, XMMRegister src) { |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3121 NOT_LP64(assert(VM_Version::supports_sse(), "")); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3122 emit_simd_arith(0x54, dst, src, VEX_SIMD_NONE); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3123 } |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3124 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3125 void Assembler::andps(XMMRegister dst, Address src) { |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3126 NOT_LP64(assert(VM_Version::supports_sse(), "")); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3127 emit_simd_arith(0x54, dst, src, VEX_SIMD_NONE); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3128 } |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3129 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3130 void Assembler::andpd(XMMRegister dst, Address src) { |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3131 NOT_LP64(assert(VM_Version::supports_sse2(), "")); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3132 emit_simd_arith(0x54, dst, src, VEX_SIMD_66); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3133 } |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3134 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3135 void Assembler::vandpd(XMMRegister dst, XMMRegister nds, XMMRegister src, bool vector256) { |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3136 assert(VM_Version::supports_avx(), ""); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3137 emit_vex_arith(0x54, dst, nds, src, VEX_SIMD_66, vector256); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3138 } |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3139 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3140 void Assembler::vandps(XMMRegister dst, XMMRegister nds, XMMRegister src, bool vector256) { |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3141 assert(VM_Version::supports_avx(), ""); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3142 emit_vex_arith(0x54, dst, nds, src, VEX_SIMD_NONE, vector256); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3143 } |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3144 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3145 void Assembler::vandpd(XMMRegister dst, XMMRegister nds, Address src, bool vector256) { |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3146 assert(VM_Version::supports_avx(), ""); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3147 emit_vex_arith(0x54, dst, nds, src, VEX_SIMD_66, vector256); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3148 } |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3149 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3150 void Assembler::vandps(XMMRegister dst, XMMRegister nds, Address src, bool vector256) { |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3151 assert(VM_Version::supports_avx(), ""); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3152 emit_vex_arith(0x54, dst, nds, src, VEX_SIMD_NONE, vector256); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3153 } |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3154 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3155 void Assembler::xorpd(XMMRegister dst, XMMRegister src) { |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3156 NOT_LP64(assert(VM_Version::supports_sse2(), "")); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3157 emit_simd_arith(0x57, dst, src, VEX_SIMD_66); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3158 } |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3159 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3160 void Assembler::xorps(XMMRegister dst, XMMRegister src) { |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3161 NOT_LP64(assert(VM_Version::supports_sse(), "")); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3162 emit_simd_arith(0x57, dst, src, VEX_SIMD_NONE); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3163 } |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3164 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3165 void Assembler::xorpd(XMMRegister dst, Address src) { |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3166 NOT_LP64(assert(VM_Version::supports_sse2(), "")); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3167 emit_simd_arith(0x57, dst, src, VEX_SIMD_66); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3168 } |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3169 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3170 void Assembler::xorps(XMMRegister dst, Address src) { |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3171 NOT_LP64(assert(VM_Version::supports_sse(), "")); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3172 emit_simd_arith(0x57, dst, src, VEX_SIMD_NONE); |
4761
65149e74c706
7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
4759
diff
changeset
|
3173 } |
65149e74c706
7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
4759
diff
changeset
|
3174 |
6179
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
6141
diff
changeset
|
3175 void Assembler::vxorpd(XMMRegister dst, XMMRegister nds, XMMRegister src, bool vector256) { |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
6141
diff
changeset
|
3176 assert(VM_Version::supports_avx(), ""); |
6614
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3177 emit_vex_arith(0x57, dst, nds, src, VEX_SIMD_66, vector256); |
4761
65149e74c706
7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
4759
diff
changeset
|
3178 } |
65149e74c706
7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
4759
diff
changeset
|
3179 |
6179
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
6141
diff
changeset
|
3180 void Assembler::vxorps(XMMRegister dst, XMMRegister nds, XMMRegister src, bool vector256) { |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
6141
diff
changeset
|
3181 assert(VM_Version::supports_avx(), ""); |
6614
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3182 emit_vex_arith(0x57, dst, nds, src, VEX_SIMD_NONE, vector256); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3183 } |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3184 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3185 void Assembler::vxorpd(XMMRegister dst, XMMRegister nds, Address src, bool vector256) { |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3186 assert(VM_Version::supports_avx(), ""); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3187 emit_vex_arith(0x57, dst, nds, src, VEX_SIMD_66, vector256); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3188 } |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3189 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3190 void Assembler::vxorps(XMMRegister dst, XMMRegister nds, Address src, bool vector256) { |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3191 assert(VM_Version::supports_avx(), ""); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3192 emit_vex_arith(0x57, dst, nds, src, VEX_SIMD_NONE, vector256); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3193 } |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3194 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3195 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3196 // Integer vector arithmetic |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3197 void Assembler::paddb(XMMRegister dst, XMMRegister src) { |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3198 NOT_LP64(assert(VM_Version::supports_sse2(), "")); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3199 emit_simd_arith(0xFC, dst, src, VEX_SIMD_66); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3200 } |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3201 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3202 void Assembler::paddw(XMMRegister dst, XMMRegister src) { |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3203 NOT_LP64(assert(VM_Version::supports_sse2(), "")); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3204 emit_simd_arith(0xFD, dst, src, VEX_SIMD_66); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3205 } |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3206 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3207 void Assembler::paddd(XMMRegister dst, XMMRegister src) { |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3208 NOT_LP64(assert(VM_Version::supports_sse2(), "")); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3209 emit_simd_arith(0xFE, dst, src, VEX_SIMD_66); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3210 } |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3211 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3212 void Assembler::paddq(XMMRegister dst, XMMRegister src) { |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3213 NOT_LP64(assert(VM_Version::supports_sse2(), "")); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3214 emit_simd_arith(0xD4, dst, src, VEX_SIMD_66); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3215 } |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3216 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3217 void Assembler::vpaddb(XMMRegister dst, XMMRegister nds, XMMRegister src, bool vector256) { |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3218 assert(VM_Version::supports_avx() && !vector256 || VM_Version::supports_avx2(), "256 bit integer vectors requires AVX2"); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3219 emit_vex_arith(0xFC, dst, nds, src, VEX_SIMD_66, vector256); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3220 } |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3221 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3222 void Assembler::vpaddw(XMMRegister dst, XMMRegister nds, XMMRegister src, bool vector256) { |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3223 assert(VM_Version::supports_avx() && !vector256 || VM_Version::supports_avx2(), "256 bit integer vectors requires AVX2"); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3224 emit_vex_arith(0xFD, dst, nds, src, VEX_SIMD_66, vector256); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3225 } |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3226 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3227 void Assembler::vpaddd(XMMRegister dst, XMMRegister nds, XMMRegister src, bool vector256) { |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3228 assert(VM_Version::supports_avx() && !vector256 || VM_Version::supports_avx2(), "256 bit integer vectors requires AVX2"); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3229 emit_vex_arith(0xFE, dst, nds, src, VEX_SIMD_66, vector256); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3230 } |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3231 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3232 void Assembler::vpaddq(XMMRegister dst, XMMRegister nds, XMMRegister src, bool vector256) { |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3233 assert(VM_Version::supports_avx() && !vector256 || VM_Version::supports_avx2(), "256 bit integer vectors requires AVX2"); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3234 emit_vex_arith(0xD4, dst, nds, src, VEX_SIMD_66, vector256); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3235 } |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3236 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3237 void Assembler::vpaddb(XMMRegister dst, XMMRegister nds, Address src, bool vector256) { |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3238 assert(VM_Version::supports_avx() && !vector256 || VM_Version::supports_avx2(), "256 bit integer vectors requires AVX2"); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3239 emit_vex_arith(0xFC, dst, nds, src, VEX_SIMD_66, vector256); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3240 } |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3241 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3242 void Assembler::vpaddw(XMMRegister dst, XMMRegister nds, Address src, bool vector256) { |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3243 assert(VM_Version::supports_avx() && !vector256 || VM_Version::supports_avx2(), "256 bit integer vectors requires AVX2"); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3244 emit_vex_arith(0xFD, dst, nds, src, VEX_SIMD_66, vector256); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3245 } |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3246 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3247 void Assembler::vpaddd(XMMRegister dst, XMMRegister nds, Address src, bool vector256) { |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3248 assert(VM_Version::supports_avx() && !vector256 || VM_Version::supports_avx2(), "256 bit integer vectors requires AVX2"); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3249 emit_vex_arith(0xFE, dst, nds, src, VEX_SIMD_66, vector256); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3250 } |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3251 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3252 void Assembler::vpaddq(XMMRegister dst, XMMRegister nds, Address src, bool vector256) { |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3253 assert(VM_Version::supports_avx() && !vector256 || VM_Version::supports_avx2(), "256 bit integer vectors requires AVX2"); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3254 emit_vex_arith(0xD4, dst, nds, src, VEX_SIMD_66, vector256); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3255 } |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3256 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3257 void Assembler::psubb(XMMRegister dst, XMMRegister src) { |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3258 NOT_LP64(assert(VM_Version::supports_sse2(), "")); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3259 emit_simd_arith(0xF8, dst, src, VEX_SIMD_66); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3260 } |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3261 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3262 void Assembler::psubw(XMMRegister dst, XMMRegister src) { |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3263 NOT_LP64(assert(VM_Version::supports_sse2(), "")); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3264 emit_simd_arith(0xF9, dst, src, VEX_SIMD_66); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3265 } |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3266 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3267 void Assembler::psubd(XMMRegister dst, XMMRegister src) { |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3268 NOT_LP64(assert(VM_Version::supports_sse2(), "")); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3269 emit_simd_arith(0xFA, dst, src, VEX_SIMD_66); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3270 } |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3271 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3272 void Assembler::psubq(XMMRegister dst, XMMRegister src) { |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3273 NOT_LP64(assert(VM_Version::supports_sse2(), "")); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3274 emit_simd_arith(0xFB, dst, src, VEX_SIMD_66); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3275 } |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3276 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3277 void Assembler::vpsubb(XMMRegister dst, XMMRegister nds, XMMRegister src, bool vector256) { |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3278 assert(VM_Version::supports_avx() && !vector256 || VM_Version::supports_avx2(), "256 bit integer vectors requires AVX2"); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3279 emit_vex_arith(0xF8, dst, nds, src, VEX_SIMD_66, vector256); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3280 } |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3281 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3282 void Assembler::vpsubw(XMMRegister dst, XMMRegister nds, XMMRegister src, bool vector256) { |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3283 assert(VM_Version::supports_avx() && !vector256 || VM_Version::supports_avx2(), "256 bit integer vectors requires AVX2"); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3284 emit_vex_arith(0xF9, dst, nds, src, VEX_SIMD_66, vector256); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3285 } |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3286 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3287 void Assembler::vpsubd(XMMRegister dst, XMMRegister nds, XMMRegister src, bool vector256) { |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3288 assert(VM_Version::supports_avx() && !vector256 || VM_Version::supports_avx2(), "256 bit integer vectors requires AVX2"); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3289 emit_vex_arith(0xFA, dst, nds, src, VEX_SIMD_66, vector256); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3290 } |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3291 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3292 void Assembler::vpsubq(XMMRegister dst, XMMRegister nds, XMMRegister src, bool vector256) { |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3293 assert(VM_Version::supports_avx() && !vector256 || VM_Version::supports_avx2(), "256 bit integer vectors requires AVX2"); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3294 emit_vex_arith(0xFB, dst, nds, src, VEX_SIMD_66, vector256); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3295 } |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3296 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3297 void Assembler::vpsubb(XMMRegister dst, XMMRegister nds, Address src, bool vector256) { |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3298 assert(VM_Version::supports_avx() && !vector256 || VM_Version::supports_avx2(), "256 bit integer vectors requires AVX2"); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3299 emit_vex_arith(0xF8, dst, nds, src, VEX_SIMD_66, vector256); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3300 } |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3301 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3302 void Assembler::vpsubw(XMMRegister dst, XMMRegister nds, Address src, bool vector256) { |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3303 assert(VM_Version::supports_avx() && !vector256 || VM_Version::supports_avx2(), "256 bit integer vectors requires AVX2"); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3304 emit_vex_arith(0xF9, dst, nds, src, VEX_SIMD_66, vector256); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3305 } |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3306 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3307 void Assembler::vpsubd(XMMRegister dst, XMMRegister nds, Address src, bool vector256) { |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3308 assert(VM_Version::supports_avx() && !vector256 || VM_Version::supports_avx2(), "256 bit integer vectors requires AVX2"); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3309 emit_vex_arith(0xFA, dst, nds, src, VEX_SIMD_66, vector256); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3310 } |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3311 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3312 void Assembler::vpsubq(XMMRegister dst, XMMRegister nds, Address src, bool vector256) { |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3313 assert(VM_Version::supports_avx() && !vector256 || VM_Version::supports_avx2(), "256 bit integer vectors requires AVX2"); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3314 emit_vex_arith(0xFB, dst, nds, src, VEX_SIMD_66, vector256); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3315 } |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3316 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3317 void Assembler::pmullw(XMMRegister dst, XMMRegister src) { |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3318 NOT_LP64(assert(VM_Version::supports_sse2(), "")); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3319 emit_simd_arith(0xD5, dst, src, VEX_SIMD_66); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3320 } |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3321 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3322 void Assembler::pmulld(XMMRegister dst, XMMRegister src) { |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3323 assert(VM_Version::supports_sse4_1(), ""); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3324 int encode = simd_prefix_and_encode(dst, dst, src, VEX_SIMD_66, VEX_OPCODE_0F_38); |
7430
d02120b7a34f
8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
twisti
parents:
7427
diff
changeset
|
3325 emit_int8(0x40); |
d02120b7a34f
8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
twisti
parents:
7427
diff
changeset
|
3326 emit_int8((unsigned char)(0xC0 | encode)); |
6614
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3327 } |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3328 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3329 void Assembler::vpmullw(XMMRegister dst, XMMRegister nds, XMMRegister src, bool vector256) { |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3330 assert(VM_Version::supports_avx() && !vector256 || VM_Version::supports_avx2(), "256 bit integer vectors requires AVX2"); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3331 emit_vex_arith(0xD5, dst, nds, src, VEX_SIMD_66, vector256); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3332 } |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3333 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3334 void Assembler::vpmulld(XMMRegister dst, XMMRegister nds, XMMRegister src, bool vector256) { |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3335 assert(VM_Version::supports_avx() && !vector256 || VM_Version::supports_avx2(), "256 bit integer vectors requires AVX2"); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3336 int encode = vex_prefix_and_encode(dst, nds, src, VEX_SIMD_66, vector256, VEX_OPCODE_0F_38); |
7430
d02120b7a34f
8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
twisti
parents:
7427
diff
changeset
|
3337 emit_int8(0x40); |
d02120b7a34f
8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
twisti
parents:
7427
diff
changeset
|
3338 emit_int8((unsigned char)(0xC0 | encode)); |
6614
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3339 } |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3340 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3341 void Assembler::vpmullw(XMMRegister dst, XMMRegister nds, Address src, bool vector256) { |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3342 assert(VM_Version::supports_avx() && !vector256 || VM_Version::supports_avx2(), "256 bit integer vectors requires AVX2"); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3343 emit_vex_arith(0xD5, dst, nds, src, VEX_SIMD_66, vector256); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3344 } |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3345 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3346 void Assembler::vpmulld(XMMRegister dst, XMMRegister nds, Address src, bool vector256) { |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3347 assert(VM_Version::supports_avx() && !vector256 || VM_Version::supports_avx2(), "256 bit integer vectors requires AVX2"); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3348 InstructionMark im(this); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3349 int dst_enc = dst->encoding(); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3350 int nds_enc = nds->is_valid() ? nds->encoding() : 0; |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3351 vex_prefix(src, nds_enc, dst_enc, VEX_SIMD_66, VEX_OPCODE_0F_38, false, vector256); |
7430
d02120b7a34f
8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
twisti
parents:
7427
diff
changeset
|
3352 emit_int8(0x40); |
6614
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3353 emit_operand(dst, src); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3354 } |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3355 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3356 // Shift packed integers left by specified number of bits. |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3357 void Assembler::psllw(XMMRegister dst, int shift) { |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3358 NOT_LP64(assert(VM_Version::supports_sse2(), "")); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3359 // XMM6 is for /6 encoding: 66 0F 71 /6 ib |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3360 int encode = simd_prefix_and_encode(xmm6, dst, dst, VEX_SIMD_66); |
7430
d02120b7a34f
8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
twisti
parents:
7427
diff
changeset
|
3361 emit_int8(0x71); |
d02120b7a34f
8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
twisti
parents:
7427
diff
changeset
|
3362 emit_int8((unsigned char)(0xC0 | encode)); |
d02120b7a34f
8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
twisti
parents:
7427
diff
changeset
|
3363 emit_int8(shift & 0xFF); |
6614
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3364 } |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3365 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3366 void Assembler::pslld(XMMRegister dst, int shift) { |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3367 NOT_LP64(assert(VM_Version::supports_sse2(), "")); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3368 // XMM6 is for /6 encoding: 66 0F 72 /6 ib |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3369 int encode = simd_prefix_and_encode(xmm6, dst, dst, VEX_SIMD_66); |
7430
d02120b7a34f
8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
twisti
parents:
7427
diff
changeset
|
3370 emit_int8(0x72); |
d02120b7a34f
8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
twisti
parents:
7427
diff
changeset
|
3371 emit_int8((unsigned char)(0xC0 | encode)); |
d02120b7a34f
8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
twisti
parents:
7427
diff
changeset
|
3372 emit_int8(shift & 0xFF); |
6614
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3373 } |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3374 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3375 void Assembler::psllq(XMMRegister dst, int shift) { |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3376 NOT_LP64(assert(VM_Version::supports_sse2(), "")); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3377 // XMM6 is for /6 encoding: 66 0F 73 /6 ib |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3378 int encode = simd_prefix_and_encode(xmm6, dst, dst, VEX_SIMD_66); |
7430
d02120b7a34f
8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
twisti
parents:
7427
diff
changeset
|
3379 emit_int8(0x73); |
d02120b7a34f
8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
twisti
parents:
7427
diff
changeset
|
3380 emit_int8((unsigned char)(0xC0 | encode)); |
d02120b7a34f
8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
twisti
parents:
7427
diff
changeset
|
3381 emit_int8(shift & 0xFF); |
6614
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3382 } |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3383 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3384 void Assembler::psllw(XMMRegister dst, XMMRegister shift) { |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3385 NOT_LP64(assert(VM_Version::supports_sse2(), "")); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3386 emit_simd_arith(0xF1, dst, shift, VEX_SIMD_66); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3387 } |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3388 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3389 void Assembler::pslld(XMMRegister dst, XMMRegister shift) { |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3390 NOT_LP64(assert(VM_Version::supports_sse2(), "")); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3391 emit_simd_arith(0xF2, dst, shift, VEX_SIMD_66); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3392 } |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3393 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3394 void Assembler::psllq(XMMRegister dst, XMMRegister shift) { |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3395 NOT_LP64(assert(VM_Version::supports_sse2(), "")); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3396 emit_simd_arith(0xF3, dst, shift, VEX_SIMD_66); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3397 } |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3398 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3399 void Assembler::vpsllw(XMMRegister dst, XMMRegister src, int shift, bool vector256) { |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3400 assert(VM_Version::supports_avx() && !vector256 || VM_Version::supports_avx2(), "256 bit integer vectors requires AVX2"); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3401 // XMM6 is for /6 encoding: 66 0F 71 /6 ib |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3402 emit_vex_arith(0x71, xmm6, dst, src, VEX_SIMD_66, vector256); |
7430
d02120b7a34f
8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
twisti
parents:
7427
diff
changeset
|
3403 emit_int8(shift & 0xFF); |
6614
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3404 } |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3405 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3406 void Assembler::vpslld(XMMRegister dst, XMMRegister src, int shift, bool vector256) { |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3407 assert(VM_Version::supports_avx() && !vector256 || VM_Version::supports_avx2(), "256 bit integer vectors requires AVX2"); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3408 // XMM6 is for /6 encoding: 66 0F 72 /6 ib |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3409 emit_vex_arith(0x72, xmm6, dst, src, VEX_SIMD_66, vector256); |
7430
d02120b7a34f
8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
twisti
parents:
7427
diff
changeset
|
3410 emit_int8(shift & 0xFF); |
6614
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3411 } |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3412 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3413 void Assembler::vpsllq(XMMRegister dst, XMMRegister src, int shift, bool vector256) { |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3414 assert(VM_Version::supports_avx() && !vector256 || VM_Version::supports_avx2(), "256 bit integer vectors requires AVX2"); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3415 // XMM6 is for /6 encoding: 66 0F 73 /6 ib |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3416 emit_vex_arith(0x73, xmm6, dst, src, VEX_SIMD_66, vector256); |
7430
d02120b7a34f
8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
twisti
parents:
7427
diff
changeset
|
3417 emit_int8(shift & 0xFF); |
6614
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3418 } |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3419 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3420 void Assembler::vpsllw(XMMRegister dst, XMMRegister src, XMMRegister shift, bool vector256) { |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3421 assert(VM_Version::supports_avx() && !vector256 || VM_Version::supports_avx2(), "256 bit integer vectors requires AVX2"); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3422 emit_vex_arith(0xF1, dst, src, shift, VEX_SIMD_66, vector256); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3423 } |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3424 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3425 void Assembler::vpslld(XMMRegister dst, XMMRegister src, XMMRegister shift, bool vector256) { |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3426 assert(VM_Version::supports_avx() && !vector256 || VM_Version::supports_avx2(), "256 bit integer vectors requires AVX2"); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3427 emit_vex_arith(0xF2, dst, src, shift, VEX_SIMD_66, vector256); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3428 } |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3429 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3430 void Assembler::vpsllq(XMMRegister dst, XMMRegister src, XMMRegister shift, bool vector256) { |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3431 assert(VM_Version::supports_avx() && !vector256 || VM_Version::supports_avx2(), "256 bit integer vectors requires AVX2"); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3432 emit_vex_arith(0xF3, dst, src, shift, VEX_SIMD_66, vector256); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3433 } |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3434 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3435 // Shift packed integers logically right by specified number of bits. |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3436 void Assembler::psrlw(XMMRegister dst, int shift) { |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3437 NOT_LP64(assert(VM_Version::supports_sse2(), "")); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3438 // XMM2 is for /2 encoding: 66 0F 71 /2 ib |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3439 int encode = simd_prefix_and_encode(xmm2, dst, dst, VEX_SIMD_66); |
7430
d02120b7a34f
8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
twisti
parents:
7427
diff
changeset
|
3440 emit_int8(0x71); |
d02120b7a34f
8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
twisti
parents:
7427
diff
changeset
|
3441 emit_int8((unsigned char)(0xC0 | encode)); |
d02120b7a34f
8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
twisti
parents:
7427
diff
changeset
|
3442 emit_int8(shift & 0xFF); |
6614
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3443 } |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3444 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3445 void Assembler::psrld(XMMRegister dst, int shift) { |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3446 NOT_LP64(assert(VM_Version::supports_sse2(), "")); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3447 // XMM2 is for /2 encoding: 66 0F 72 /2 ib |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3448 int encode = simd_prefix_and_encode(xmm2, dst, dst, VEX_SIMD_66); |
7430
d02120b7a34f
8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
twisti
parents:
7427
diff
changeset
|
3449 emit_int8(0x72); |
d02120b7a34f
8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
twisti
parents:
7427
diff
changeset
|
3450 emit_int8((unsigned char)(0xC0 | encode)); |
d02120b7a34f
8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
twisti
parents:
7427
diff
changeset
|
3451 emit_int8(shift & 0xFF); |
6614
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3452 } |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3453 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3454 void Assembler::psrlq(XMMRegister dst, int shift) { |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3455 // Do not confuse it with psrldq SSE2 instruction which |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3456 // shifts 128 bit value in xmm register by number of bytes. |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3457 NOT_LP64(assert(VM_Version::supports_sse2(), "")); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3458 // XMM2 is for /2 encoding: 66 0F 73 /2 ib |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3459 int encode = simd_prefix_and_encode(xmm2, dst, dst, VEX_SIMD_66); |
7430
d02120b7a34f
8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
twisti
parents:
7427
diff
changeset
|
3460 emit_int8(0x73); |
d02120b7a34f
8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
twisti
parents:
7427
diff
changeset
|
3461 emit_int8((unsigned char)(0xC0 | encode)); |
d02120b7a34f
8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
twisti
parents:
7427
diff
changeset
|
3462 emit_int8(shift & 0xFF); |
6614
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3463 } |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3464 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3465 void Assembler::psrlw(XMMRegister dst, XMMRegister shift) { |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3466 NOT_LP64(assert(VM_Version::supports_sse2(), "")); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3467 emit_simd_arith(0xD1, dst, shift, VEX_SIMD_66); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3468 } |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3469 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3470 void Assembler::psrld(XMMRegister dst, XMMRegister shift) { |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3471 NOT_LP64(assert(VM_Version::supports_sse2(), "")); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3472 emit_simd_arith(0xD2, dst, shift, VEX_SIMD_66); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3473 } |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3474 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3475 void Assembler::psrlq(XMMRegister dst, XMMRegister shift) { |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3476 NOT_LP64(assert(VM_Version::supports_sse2(), "")); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3477 emit_simd_arith(0xD3, dst, shift, VEX_SIMD_66); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3478 } |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3479 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3480 void Assembler::vpsrlw(XMMRegister dst, XMMRegister src, int shift, bool vector256) { |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3481 assert(VM_Version::supports_avx() && !vector256 || VM_Version::supports_avx2(), "256 bit integer vectors requires AVX2"); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3482 // XMM2 is for /2 encoding: 66 0F 73 /2 ib |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3483 emit_vex_arith(0x71, xmm2, dst, src, VEX_SIMD_66, vector256); |
7430
d02120b7a34f
8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
twisti
parents:
7427
diff
changeset
|
3484 emit_int8(shift & 0xFF); |
6614
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3485 } |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3486 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3487 void Assembler::vpsrld(XMMRegister dst, XMMRegister src, int shift, bool vector256) { |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3488 assert(VM_Version::supports_avx() && !vector256 || VM_Version::supports_avx2(), "256 bit integer vectors requires AVX2"); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3489 // XMM2 is for /2 encoding: 66 0F 73 /2 ib |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3490 emit_vex_arith(0x72, xmm2, dst, src, VEX_SIMD_66, vector256); |
7430
d02120b7a34f
8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
twisti
parents:
7427
diff
changeset
|
3491 emit_int8(shift & 0xFF); |
6614
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3492 } |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3493 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3494 void Assembler::vpsrlq(XMMRegister dst, XMMRegister src, int shift, bool vector256) { |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3495 assert(VM_Version::supports_avx() && !vector256 || VM_Version::supports_avx2(), "256 bit integer vectors requires AVX2"); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3496 // XMM2 is for /2 encoding: 66 0F 73 /2 ib |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3497 emit_vex_arith(0x73, xmm2, dst, src, VEX_SIMD_66, vector256); |
7430
d02120b7a34f
8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
twisti
parents:
7427
diff
changeset
|
3498 emit_int8(shift & 0xFF); |
6614
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3499 } |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3500 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3501 void Assembler::vpsrlw(XMMRegister dst, XMMRegister src, XMMRegister shift, bool vector256) { |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3502 assert(VM_Version::supports_avx() && !vector256 || VM_Version::supports_avx2(), "256 bit integer vectors requires AVX2"); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3503 emit_vex_arith(0xD1, dst, src, shift, VEX_SIMD_66, vector256); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3504 } |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3505 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3506 void Assembler::vpsrld(XMMRegister dst, XMMRegister src, XMMRegister shift, bool vector256) { |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3507 assert(VM_Version::supports_avx() && !vector256 || VM_Version::supports_avx2(), "256 bit integer vectors requires AVX2"); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3508 emit_vex_arith(0xD2, dst, src, shift, VEX_SIMD_66, vector256); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3509 } |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3510 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3511 void Assembler::vpsrlq(XMMRegister dst, XMMRegister src, XMMRegister shift, bool vector256) { |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3512 assert(VM_Version::supports_avx() && !vector256 || VM_Version::supports_avx2(), "256 bit integer vectors requires AVX2"); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3513 emit_vex_arith(0xD3, dst, src, shift, VEX_SIMD_66, vector256); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3514 } |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3515 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3516 // Shift packed integers arithmetically right by specified number of bits. |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3517 void Assembler::psraw(XMMRegister dst, int shift) { |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3518 NOT_LP64(assert(VM_Version::supports_sse2(), "")); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3519 // XMM4 is for /4 encoding: 66 0F 71 /4 ib |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3520 int encode = simd_prefix_and_encode(xmm4, dst, dst, VEX_SIMD_66); |
7430
d02120b7a34f
8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
twisti
parents:
7427
diff
changeset
|
3521 emit_int8(0x71); |
d02120b7a34f
8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
twisti
parents:
7427
diff
changeset
|
3522 emit_int8((unsigned char)(0xC0 | encode)); |
d02120b7a34f
8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
twisti
parents:
7427
diff
changeset
|
3523 emit_int8(shift & 0xFF); |
6614
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3524 } |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3525 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3526 void Assembler::psrad(XMMRegister dst, int shift) { |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3527 NOT_LP64(assert(VM_Version::supports_sse2(), "")); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3528 // XMM4 is for /4 encoding: 66 0F 72 /4 ib |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3529 int encode = simd_prefix_and_encode(xmm4, dst, dst, VEX_SIMD_66); |
7430
d02120b7a34f
8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
twisti
parents:
7427
diff
changeset
|
3530 emit_int8(0x72); |
d02120b7a34f
8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
twisti
parents:
7427
diff
changeset
|
3531 emit_int8((unsigned char)(0xC0 | encode)); |
d02120b7a34f
8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
twisti
parents:
7427
diff
changeset
|
3532 emit_int8(shift & 0xFF); |
6614
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3533 } |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3534 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3535 void Assembler::psraw(XMMRegister dst, XMMRegister shift) { |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3536 NOT_LP64(assert(VM_Version::supports_sse2(), "")); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3537 emit_simd_arith(0xE1, dst, shift, VEX_SIMD_66); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3538 } |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3539 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3540 void Assembler::psrad(XMMRegister dst, XMMRegister shift) { |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3541 NOT_LP64(assert(VM_Version::supports_sse2(), "")); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3542 emit_simd_arith(0xE2, dst, shift, VEX_SIMD_66); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3543 } |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3544 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3545 void Assembler::vpsraw(XMMRegister dst, XMMRegister src, int shift, bool vector256) { |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3546 assert(VM_Version::supports_avx() && !vector256 || VM_Version::supports_avx2(), "256 bit integer vectors requires AVX2"); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3547 // XMM4 is for /4 encoding: 66 0F 71 /4 ib |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3548 emit_vex_arith(0x71, xmm4, dst, src, VEX_SIMD_66, vector256); |
7430
d02120b7a34f
8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
twisti
parents:
7427
diff
changeset
|
3549 emit_int8(shift & 0xFF); |
6614
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3550 } |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3551 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3552 void Assembler::vpsrad(XMMRegister dst, XMMRegister src, int shift, bool vector256) { |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3553 assert(VM_Version::supports_avx() && !vector256 || VM_Version::supports_avx2(), "256 bit integer vectors requires AVX2"); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3554 // XMM4 is for /4 encoding: 66 0F 71 /4 ib |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3555 emit_vex_arith(0x72, xmm4, dst, src, VEX_SIMD_66, vector256); |
7430
d02120b7a34f
8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
twisti
parents:
7427
diff
changeset
|
3556 emit_int8(shift & 0xFF); |
6614
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3557 } |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3558 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3559 void Assembler::vpsraw(XMMRegister dst, XMMRegister src, XMMRegister shift, bool vector256) { |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3560 assert(VM_Version::supports_avx() && !vector256 || VM_Version::supports_avx2(), "256 bit integer vectors requires AVX2"); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3561 emit_vex_arith(0xE1, dst, src, shift, VEX_SIMD_66, vector256); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3562 } |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3563 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3564 void Assembler::vpsrad(XMMRegister dst, XMMRegister src, XMMRegister shift, bool vector256) { |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3565 assert(VM_Version::supports_avx() && !vector256 || VM_Version::supports_avx2(), "256 bit integer vectors requires AVX2"); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3566 emit_vex_arith(0xE2, dst, src, shift, VEX_SIMD_66, vector256); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3567 } |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3568 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3569 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3570 // AND packed integers |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3571 void Assembler::pand(XMMRegister dst, XMMRegister src) { |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3572 NOT_LP64(assert(VM_Version::supports_sse2(), "")); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3573 emit_simd_arith(0xDB, dst, src, VEX_SIMD_66); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3574 } |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3575 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3576 void Assembler::vpand(XMMRegister dst, XMMRegister nds, XMMRegister src, bool vector256) { |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3577 assert(VM_Version::supports_avx() && !vector256 || VM_Version::supports_avx2(), "256 bit integer vectors requires AVX2"); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3578 emit_vex_arith(0xDB, dst, nds, src, VEX_SIMD_66, vector256); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3579 } |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3580 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3581 void Assembler::vpand(XMMRegister dst, XMMRegister nds, Address src, bool vector256) { |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3582 assert(VM_Version::supports_avx() && !vector256 || VM_Version::supports_avx2(), "256 bit integer vectors requires AVX2"); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3583 emit_vex_arith(0xDB, dst, nds, src, VEX_SIMD_66, vector256); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3584 } |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3585 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3586 void Assembler::por(XMMRegister dst, XMMRegister src) { |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3587 NOT_LP64(assert(VM_Version::supports_sse2(), "")); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3588 emit_simd_arith(0xEB, dst, src, VEX_SIMD_66); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3589 } |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3590 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3591 void Assembler::vpor(XMMRegister dst, XMMRegister nds, XMMRegister src, bool vector256) { |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3592 assert(VM_Version::supports_avx() && !vector256 || VM_Version::supports_avx2(), "256 bit integer vectors requires AVX2"); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3593 emit_vex_arith(0xEB, dst, nds, src, VEX_SIMD_66, vector256); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3594 } |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3595 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3596 void Assembler::vpor(XMMRegister dst, XMMRegister nds, Address src, bool vector256) { |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3597 assert(VM_Version::supports_avx() && !vector256 || VM_Version::supports_avx2(), "256 bit integer vectors requires AVX2"); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3598 emit_vex_arith(0xEB, dst, nds, src, VEX_SIMD_66, vector256); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3599 } |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3600 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3601 void Assembler::pxor(XMMRegister dst, XMMRegister src) { |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3602 NOT_LP64(assert(VM_Version::supports_sse2(), "")); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3603 emit_simd_arith(0xEF, dst, src, VEX_SIMD_66); |
6179
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
6141
diff
changeset
|
3604 } |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
6141
diff
changeset
|
3605 |
6225 | 3606 void Assembler::vpxor(XMMRegister dst, XMMRegister nds, XMMRegister src, bool vector256) { |
6614
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3607 assert(VM_Version::supports_avx() && !vector256 || VM_Version::supports_avx2(), "256 bit integer vectors requires AVX2"); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3608 emit_vex_arith(0xEF, dst, nds, src, VEX_SIMD_66, vector256); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3609 } |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3610 |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3611 void Assembler::vpxor(XMMRegister dst, XMMRegister nds, Address src, bool vector256) { |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3612 assert(VM_Version::supports_avx() && !vector256 || VM_Version::supports_avx2(), "256 bit integer vectors requires AVX2"); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3613 emit_vex_arith(0xEF, dst, nds, src, VEX_SIMD_66, vector256); |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3614 } |
006050192a5a
6340864: Implement vectorization optimizations in hotspot-server
kvn
parents:
6266
diff
changeset
|
3615 |
6225 | 3616 |
6179
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
6141
diff
changeset
|
3617 void Assembler::vinsertf128h(XMMRegister dst, XMMRegister nds, XMMRegister src) { |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
6141
diff
changeset
|
3618 assert(VM_Version::supports_avx(), ""); |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
6141
diff
changeset
|
3619 bool vector256 = true; |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
6141
diff
changeset
|
3620 int encode = vex_prefix_and_encode(dst, nds, src, VEX_SIMD_66, vector256, VEX_OPCODE_0F_3A); |
7430
d02120b7a34f
8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
twisti
parents:
7427
diff
changeset
|
3621 emit_int8(0x18); |
d02120b7a34f
8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
twisti
parents:
7427
diff
changeset
|
3622 emit_int8((unsigned char)(0xC0 | encode)); |
6179
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
6141
diff
changeset
|
3623 // 0x00 - insert into lower 128 bits |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
6141
diff
changeset
|
3624 // 0x01 - insert into upper 128 bits |
7430
d02120b7a34f
8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
twisti
parents:
7427
diff
changeset
|
3625 emit_int8(0x01); |
6179
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
6141
diff
changeset
|
3626 } |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
6141
diff
changeset
|
3627 |
6792
137868b7aa6f
7196199: java/text/Bidi/Bug6665028.java failed: Bidi run count incorrect
kvn
parents:
6725
diff
changeset
|
3628 void Assembler::vinsertf128h(XMMRegister dst, Address src) { |
137868b7aa6f
7196199: java/text/Bidi/Bug6665028.java failed: Bidi run count incorrect
kvn
parents:
6725
diff
changeset
|
3629 assert(VM_Version::supports_avx(), ""); |
137868b7aa6f
7196199: java/text/Bidi/Bug6665028.java failed: Bidi run count incorrect
kvn
parents:
6725
diff
changeset
|
3630 InstructionMark im(this); |
137868b7aa6f
7196199: java/text/Bidi/Bug6665028.java failed: Bidi run count incorrect
kvn
parents:
6725
diff
changeset
|
3631 bool vector256 = true; |
137868b7aa6f
7196199: java/text/Bidi/Bug6665028.java failed: Bidi run count incorrect
kvn
parents:
6725
diff
changeset
|
3632 assert(dst != xnoreg, "sanity"); |
137868b7aa6f
7196199: java/text/Bidi/Bug6665028.java failed: Bidi run count incorrect
kvn
parents:
6725
diff
changeset
|
3633 int dst_enc = dst->encoding(); |
137868b7aa6f
7196199: java/text/Bidi/Bug6665028.java failed: Bidi run count incorrect
kvn
parents:
6725
diff
changeset
|
3634 // swap src<->dst for encoding |
137868b7aa6f
7196199: java/text/Bidi/Bug6665028.java failed: Bidi run count incorrect
kvn
parents:
6725
diff
changeset
|
3635 vex_prefix(src, dst_enc, dst_enc, VEX_SIMD_66, VEX_OPCODE_0F_3A, false, vector256); |
7430
d02120b7a34f
8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
twisti
parents:
7427
diff
changeset
|
3636 emit_int8(0x18); |
6792
137868b7aa6f
7196199: java/text/Bidi/Bug6665028.java failed: Bidi run count incorrect
kvn
parents:
6725
diff
changeset
|
3637 emit_operand(dst, src); |
137868b7aa6f
7196199: java/text/Bidi/Bug6665028.java failed: Bidi run count incorrect
kvn
parents:
6725
diff
changeset
|
3638 // 0x01 - insert into upper 128 bits |
7430
d02120b7a34f
8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
twisti
parents:
7427
diff
changeset
|
3639 emit_int8(0x01); |
6792
137868b7aa6f
7196199: java/text/Bidi/Bug6665028.java failed: Bidi run count incorrect
kvn
parents:
6725
diff
changeset
|
3640 } |
137868b7aa6f
7196199: java/text/Bidi/Bug6665028.java failed: Bidi run count incorrect
kvn
parents:
6725
diff
changeset
|
3641 |
137868b7aa6f
7196199: java/text/Bidi/Bug6665028.java failed: Bidi run count incorrect
kvn
parents:
6725
diff
changeset
|
3642 void Assembler::vextractf128h(Address dst, XMMRegister src) { |
137868b7aa6f
7196199: java/text/Bidi/Bug6665028.java failed: Bidi run count incorrect
kvn
parents:
6725
diff
changeset
|
3643 assert(VM_Version::supports_avx(), ""); |
137868b7aa6f
7196199: java/text/Bidi/Bug6665028.java failed: Bidi run count incorrect
kvn
parents:
6725
diff
changeset
|
3644 InstructionMark im(this); |
137868b7aa6f
7196199: java/text/Bidi/Bug6665028.java failed: Bidi run count incorrect
kvn
parents:
6725
diff
changeset
|
3645 bool vector256 = true; |
137868b7aa6f
7196199: java/text/Bidi/Bug6665028.java failed: Bidi run count incorrect
kvn
parents:
6725
diff
changeset
|
3646 assert(src != xnoreg, "sanity"); |
137868b7aa6f
7196199: java/text/Bidi/Bug6665028.java failed: Bidi run count incorrect
kvn
parents:
6725
diff
changeset
|
3647 int src_enc = src->encoding(); |
137868b7aa6f
7196199: java/text/Bidi/Bug6665028.java failed: Bidi run count incorrect
kvn
parents:
6725
diff
changeset
|
3648 vex_prefix(dst, 0, src_enc, VEX_SIMD_66, VEX_OPCODE_0F_3A, false, vector256); |
7430
d02120b7a34f
8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
twisti
parents:
7427
diff
changeset
|
3649 emit_int8(0x19); |
6792
137868b7aa6f
7196199: java/text/Bidi/Bug6665028.java failed: Bidi run count incorrect
kvn
parents:
6725
diff
changeset
|
3650 emit_operand(src, dst); |
137868b7aa6f
7196199: java/text/Bidi/Bug6665028.java failed: Bidi run count incorrect
kvn
parents:
6725
diff
changeset
|
3651 // 0x01 - extract from upper 128 bits |
7430
d02120b7a34f
8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
twisti
parents:
7427
diff
changeset
|
3652 emit_int8(0x01); |
6792
137868b7aa6f
7196199: java/text/Bidi/Bug6665028.java failed: Bidi run count incorrect
kvn
parents:
6725
diff
changeset
|
3653 } |
137868b7aa6f
7196199: java/text/Bidi/Bug6665028.java failed: Bidi run count incorrect
kvn
parents:
6725
diff
changeset
|
3654 |
6225 | 3655 void Assembler::vinserti128h(XMMRegister dst, XMMRegister nds, XMMRegister src) { |
3656 assert(VM_Version::supports_avx2(), ""); | |
3657 bool vector256 = true; | |
3658 int encode = vex_prefix_and_encode(dst, nds, src, VEX_SIMD_66, vector256, VEX_OPCODE_0F_3A); | |
7430
d02120b7a34f
8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
twisti
parents:
7427
diff
changeset
|
3659 emit_int8(0x38); |
d02120b7a34f
8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
twisti
parents:
7427
diff
changeset
|
3660 emit_int8((unsigned char)(0xC0 | encode)); |
6225 | 3661 // 0x00 - insert into lower 128 bits |
3662 // 0x01 - insert into upper 128 bits | |
7430
d02120b7a34f
8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
twisti
parents:
7427
diff
changeset
|
3663 emit_int8(0x01); |
6225 | 3664 } |
3665 | |
6792
137868b7aa6f
7196199: java/text/Bidi/Bug6665028.java failed: Bidi run count incorrect
kvn
parents:
6725
diff
changeset
|
3666 void Assembler::vinserti128h(XMMRegister dst, Address src) { |
137868b7aa6f
7196199: java/text/Bidi/Bug6665028.java failed: Bidi run count incorrect
kvn
parents:
6725
diff
changeset
|
3667 assert(VM_Version::supports_avx2(), ""); |
137868b7aa6f
7196199: java/text/Bidi/Bug6665028.java failed: Bidi run count incorrect
kvn
parents:
6725
diff
changeset
|
3668 InstructionMark im(this); |
137868b7aa6f
7196199: java/text/Bidi/Bug6665028.java failed: Bidi run count incorrect
kvn
parents:
6725
diff
changeset
|
3669 bool vector256 = true; |
137868b7aa6f
7196199: java/text/Bidi/Bug6665028.java failed: Bidi run count incorrect
kvn
parents:
6725
diff
changeset
|
3670 assert(dst != xnoreg, "sanity"); |
137868b7aa6f
7196199: java/text/Bidi/Bug6665028.java failed: Bidi run count incorrect
kvn
parents:
6725
diff
changeset
|
3671 int dst_enc = dst->encoding(); |
137868b7aa6f
7196199: java/text/Bidi/Bug6665028.java failed: Bidi run count incorrect
kvn
parents:
6725
diff
changeset
|
3672 // swap src<->dst for encoding |
137868b7aa6f
7196199: java/text/Bidi/Bug6665028.java failed: Bidi run count incorrect
kvn
parents:
6725
diff
changeset
|
3673 vex_prefix(src, dst_enc, dst_enc, VEX_SIMD_66, VEX_OPCODE_0F_3A, false, vector256); |
7430
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8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
twisti
parents:
7427
diff
changeset
|
3674 emit_int8(0x38); |
6792
137868b7aa6f
7196199: java/text/Bidi/Bug6665028.java failed: Bidi run count incorrect
kvn
parents:
6725
diff
changeset
|
3675 emit_operand(dst, src); |
137868b7aa6f
7196199: java/text/Bidi/Bug6665028.java failed: Bidi run count incorrect
kvn
parents:
6725
diff
changeset
|
3676 // 0x01 - insert into upper 128 bits |
7430
d02120b7a34f
8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
twisti
parents:
7427
diff
changeset
|
3677 emit_int8(0x01); |
6792
137868b7aa6f
7196199: java/text/Bidi/Bug6665028.java failed: Bidi run count incorrect
kvn
parents:
6725
diff
changeset
|
3678 } |
137868b7aa6f
7196199: java/text/Bidi/Bug6665028.java failed: Bidi run count incorrect
kvn
parents:
6725
diff
changeset
|
3679 |
137868b7aa6f
7196199: java/text/Bidi/Bug6665028.java failed: Bidi run count incorrect
kvn
parents:
6725
diff
changeset
|
3680 void Assembler::vextracti128h(Address dst, XMMRegister src) { |
137868b7aa6f
7196199: java/text/Bidi/Bug6665028.java failed: Bidi run count incorrect
kvn
parents:
6725
diff
changeset
|
3681 assert(VM_Version::supports_avx2(), ""); |
137868b7aa6f
7196199: java/text/Bidi/Bug6665028.java failed: Bidi run count incorrect
kvn
parents:
6725
diff
changeset
|
3682 InstructionMark im(this); |
137868b7aa6f
7196199: java/text/Bidi/Bug6665028.java failed: Bidi run count incorrect
kvn
parents:
6725
diff
changeset
|
3683 bool vector256 = true; |
137868b7aa6f
7196199: java/text/Bidi/Bug6665028.java failed: Bidi run count incorrect
kvn
parents:
6725
diff
changeset
|
3684 assert(src != xnoreg, "sanity"); |
137868b7aa6f
7196199: java/text/Bidi/Bug6665028.java failed: Bidi run count incorrect
kvn
parents:
6725
diff
changeset
|
3685 int src_enc = src->encoding(); |
137868b7aa6f
7196199: java/text/Bidi/Bug6665028.java failed: Bidi run count incorrect
kvn
parents:
6725
diff
changeset
|
3686 vex_prefix(dst, 0, src_enc, VEX_SIMD_66, VEX_OPCODE_0F_3A, false, vector256); |
7430
d02120b7a34f
8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
twisti
parents:
7427
diff
changeset
|
3687 emit_int8(0x39); |
6792
137868b7aa6f
7196199: java/text/Bidi/Bug6665028.java failed: Bidi run count incorrect
kvn
parents:
6725
diff
changeset
|
3688 emit_operand(src, dst); |
137868b7aa6f
7196199: java/text/Bidi/Bug6665028.java failed: Bidi run count incorrect
kvn
parents:
6725
diff
changeset
|
3689 // 0x01 - extract from upper 128 bits |
7430
d02120b7a34f
8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
twisti
parents:
7427
diff
changeset
|
3690 emit_int8(0x01); |
6792
137868b7aa6f
7196199: java/text/Bidi/Bug6665028.java failed: Bidi run count incorrect
kvn
parents:
6725
diff
changeset
|
3691 } |
137868b7aa6f
7196199: java/text/Bidi/Bug6665028.java failed: Bidi run count incorrect
kvn
parents:
6725
diff
changeset
|
3692 |
7475
e2e6bf86682c
8005544: Use 256bit YMM registers in arraycopy stubs on x86
kvn
parents:
7474
diff
changeset
|
3693 // duplicate 4-bytes integer data from src into 8 locations in dest |
e2e6bf86682c
8005544: Use 256bit YMM registers in arraycopy stubs on x86
kvn
parents:
7474
diff
changeset
|
3694 void Assembler::vpbroadcastd(XMMRegister dst, XMMRegister src) { |
e2e6bf86682c
8005544: Use 256bit YMM registers in arraycopy stubs on x86
kvn
parents:
7474
diff
changeset
|
3695 assert(VM_Version::supports_avx2(), ""); |
e2e6bf86682c
8005544: Use 256bit YMM registers in arraycopy stubs on x86
kvn
parents:
7474
diff
changeset
|
3696 bool vector256 = true; |
e2e6bf86682c
8005544: Use 256bit YMM registers in arraycopy stubs on x86
kvn
parents:
7474
diff
changeset
|
3697 int encode = vex_prefix_and_encode(dst, xnoreg, src, VEX_SIMD_66, vector256, VEX_OPCODE_0F_38); |
e2e6bf86682c
8005544: Use 256bit YMM registers in arraycopy stubs on x86
kvn
parents:
7474
diff
changeset
|
3698 emit_int8(0x58); |
e2e6bf86682c
8005544: Use 256bit YMM registers in arraycopy stubs on x86
kvn
parents:
7474
diff
changeset
|
3699 emit_int8((unsigned char)(0xC0 | encode)); |
e2e6bf86682c
8005544: Use 256bit YMM registers in arraycopy stubs on x86
kvn
parents:
7474
diff
changeset
|
3700 } |
e2e6bf86682c
8005544: Use 256bit YMM registers in arraycopy stubs on x86
kvn
parents:
7474
diff
changeset
|
3701 |
6179
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
6141
diff
changeset
|
3702 void Assembler::vzeroupper() { |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
6141
diff
changeset
|
3703 assert(VM_Version::supports_avx(), ""); |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
6141
diff
changeset
|
3704 (void)vex_prefix_and_encode(xmm0, xmm0, xmm0, VEX_SIMD_NONE); |
7430
d02120b7a34f
8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
twisti
parents:
7427
diff
changeset
|
3705 emit_int8(0x77); |
6179
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
6141
diff
changeset
|
3706 } |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
6141
diff
changeset
|
3707 |
4761
65149e74c706
7121648: Use 3-operands SIMD instructions on x86 with AVX
kvn
parents:
4759
diff
changeset
|
3708 |
304 | 3709 #ifndef _LP64 |
3710 // 32bit only pieces of the assembler | |
3711 | |
3712 void Assembler::cmp_literal32(Register src1, int32_t imm32, RelocationHolder const& rspec) { | |
3713 // NO PREFIX AS NEVER 64BIT | |
3714 InstructionMark im(this); | |
7430
d02120b7a34f
8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
twisti
parents:
7427
diff
changeset
|
3715 emit_int8((unsigned char)0x81); |
d02120b7a34f
8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
twisti
parents:
7427
diff
changeset
|
3716 emit_int8((unsigned char)(0xF8 | src1->encoding())); |
304 | 3717 emit_data(imm32, rspec, 0); |
3718 } | |
3719 | |
3720 void Assembler::cmp_literal32(Address src1, int32_t imm32, RelocationHolder const& rspec) { | |
3721 // NO PREFIX AS NEVER 64BIT (not even 32bit versions of 64bit regs | |
3722 InstructionMark im(this); | |
7430
d02120b7a34f
8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
twisti
parents:
7427
diff
changeset
|
3723 emit_int8((unsigned char)0x81); |
304 | 3724 emit_operand(rdi, src1); |
3725 emit_data(imm32, rspec, 0); | |
3726 } | |
3727 | |
3728 // The 64-bit (32bit platform) cmpxchg compares the value at adr with the contents of rdx:rax, | |
3729 // and stores rcx:rbx into adr if so; otherwise, the value at adr is loaded | |
3730 // into rdx:rax. The ZF is set if the compared values were equal, and cleared otherwise. | |
3731 void Assembler::cmpxchg8(Address adr) { | |
3732 InstructionMark im(this); | |
7430
d02120b7a34f
8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
twisti
parents:
7427
diff
changeset
|
3733 emit_int8(0x0F); |
d02120b7a34f
8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
twisti
parents:
7427
diff
changeset
|
3734 emit_int8((unsigned char)0xC7); |
304 | 3735 emit_operand(rcx, adr); |
3736 } | |
3737 | |
3738 void Assembler::decl(Register dst) { | |
3739 // Don't use it directly. Use MacroAssembler::decrementl() instead. | |
7430
d02120b7a34f
8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
twisti
parents:
7427
diff
changeset
|
3740 emit_int8(0x48 | dst->encoding()); |
304 | 3741 } |
3742 | |
3743 #endif // _LP64 | |
3744 | |
3745 // 64bit typically doesn't use the x87 but needs to for the trig funcs | |
3746 | |
3747 void Assembler::fabs() { | |
7430
d02120b7a34f
8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
twisti
parents:
7427
diff
changeset
|
3748 emit_int8((unsigned char)0xD9); |
d02120b7a34f
8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
twisti
parents:
7427
diff
changeset
|
3749 emit_int8((unsigned char)0xE1); |
304 | 3750 } |
3751 | |
3752 void Assembler::fadd(int i) { | |
3753 emit_farith(0xD8, 0xC0, i); | |
3754 } | |
3755 | |
3756 void Assembler::fadd_d(Address src) { | |
3757 InstructionMark im(this); | |
7430
d02120b7a34f
8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
twisti
parents:
7427
diff
changeset
|
3758 emit_int8((unsigned char)0xDC); |
304 | 3759 emit_operand32(rax, src); |
3760 } | |
3761 | |
3762 void Assembler::fadd_s(Address src) { | |
3763 InstructionMark im(this); | |
7430
d02120b7a34f
8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
twisti
parents:
7427
diff
changeset
|
3764 emit_int8((unsigned char)0xD8); |
304 | 3765 emit_operand32(rax, src); |
3766 } | |
3767 | |
3768 void Assembler::fadda(int i) { | |
3769 emit_farith(0xDC, 0xC0, i); | |
3770 } | |
3771 | |
3772 void Assembler::faddp(int i) { | |
3773 emit_farith(0xDE, 0xC0, i); | |
3774 } | |
3775 | |
3776 void Assembler::fchs() { | |
7430
d02120b7a34f
8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
twisti
parents:
7427
diff
changeset
|
3777 emit_int8((unsigned char)0xD9); |
d02120b7a34f
8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
twisti
parents:
7427
diff
changeset
|
3778 emit_int8((unsigned char)0xE0); |
304 | 3779 } |
3780 | |
3781 void Assembler::fcom(int i) { | |
3782 emit_farith(0xD8, 0xD0, i); | |
3783 } | |
3784 | |
3785 void Assembler::fcomp(int i) { | |
3786 emit_farith(0xD8, 0xD8, i); | |
3787 } | |
3788 | |
3789 void Assembler::fcomp_d(Address src) { | |
3790 InstructionMark im(this); | |
7430
d02120b7a34f
8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
twisti
parents:
7427
diff
changeset
|
3791 emit_int8((unsigned char)0xDC); |
304 | 3792 emit_operand32(rbx, src); |
3793 } | |
3794 | |
3795 void Assembler::fcomp_s(Address src) { | |
3796 InstructionMark im(this); | |
7430
d02120b7a34f
8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
twisti
parents:
7427
diff
changeset
|
3797 emit_int8((unsigned char)0xD8); |
304 | 3798 emit_operand32(rbx, src); |
3799 } | |
3800 | |
3801 void Assembler::fcompp() { | |
7430
d02120b7a34f
8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
twisti
parents:
7427
diff
changeset
|
3802 emit_int8((unsigned char)0xDE); |
d02120b7a34f
8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
twisti
parents:
7427
diff
changeset
|
3803 emit_int8((unsigned char)0xD9); |
304 | 3804 } |
3805 | |
3806 void Assembler::fcos() { | |
7430
d02120b7a34f
8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
twisti
parents:
7427
diff
changeset
|
3807 emit_int8((unsigned char)0xD9); |
d02120b7a34f
8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
twisti
parents:
7427
diff
changeset
|
3808 emit_int8((unsigned char)0xFF); |
304 | 3809 } |
3810 | |
3811 void Assembler::fdecstp() { | |
7430
d02120b7a34f
8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
twisti
parents:
7427
diff
changeset
|
3812 emit_int8((unsigned char)0xD9); |
d02120b7a34f
8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
twisti
parents:
7427
diff
changeset
|
3813 emit_int8((unsigned char)0xF6); |
304 | 3814 } |
3815 | |
3816 void Assembler::fdiv(int i) { | |
3817 emit_farith(0xD8, 0xF0, i); | |
3818 } | |
3819 | |
3820 void Assembler::fdiv_d(Address src) { | |
3821 InstructionMark im(this); | |
7430
d02120b7a34f
8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
twisti
parents:
7427
diff
changeset
|
3822 emit_int8((unsigned char)0xDC); |
304 | 3823 emit_operand32(rsi, src); |
3824 } | |
3825 | |
3826 void Assembler::fdiv_s(Address src) { | |
3827 InstructionMark im(this); | |
7430
d02120b7a34f
8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
twisti
parents:
7427
diff
changeset
|
3828 emit_int8((unsigned char)0xD8); |
304 | 3829 emit_operand32(rsi, src); |
3830 } | |
3831 | |
3832 void Assembler::fdiva(int i) { | |
3833 emit_farith(0xDC, 0xF8, i); | |
3834 } | |
3835 | |
3836 // Note: The Intel manual (Pentium Processor User's Manual, Vol.3, 1994) | |
3837 // is erroneous for some of the floating-point instructions below. | |
3838 | |
3839 void Assembler::fdivp(int i) { | |
3840 emit_farith(0xDE, 0xF8, i); // ST(0) <- ST(0) / ST(1) and pop (Intel manual wrong) | |
3841 } | |
3842 | |
3843 void Assembler::fdivr(int i) { | |
3844 emit_farith(0xD8, 0xF8, i); | |
3845 } | |
3846 | |
3847 void Assembler::fdivr_d(Address src) { | |
3848 InstructionMark im(this); | |
7430
d02120b7a34f
8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
twisti
parents:
7427
diff
changeset
|
3849 emit_int8((unsigned char)0xDC); |
304 | 3850 emit_operand32(rdi, src); |
3851 } | |
3852 | |
3853 void Assembler::fdivr_s(Address src) { | |
3854 InstructionMark im(this); | |
7430
d02120b7a34f
8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
twisti
parents:
7427
diff
changeset
|
3855 emit_int8((unsigned char)0xD8); |
304 | 3856 emit_operand32(rdi, src); |
3857 } | |
3858 | |
3859 void Assembler::fdivra(int i) { | |
3860 emit_farith(0xDC, 0xF0, i); | |
3861 } | |
3862 | |
3863 void Assembler::fdivrp(int i) { | |
3864 emit_farith(0xDE, 0xF0, i); // ST(0) <- ST(1) / ST(0) and pop (Intel manual wrong) | |
3865 } | |
3866 | |
3867 void Assembler::ffree(int i) { | |
3868 emit_farith(0xDD, 0xC0, i); | |
3869 } | |
3870 | |
3871 void Assembler::fild_d(Address adr) { | |
3872 InstructionMark im(this); | |
7430
d02120b7a34f
8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
twisti
parents:
7427
diff
changeset
|
3873 emit_int8((unsigned char)0xDF); |
304 | 3874 emit_operand32(rbp, adr); |
3875 } | |
3876 | |
3877 void Assembler::fild_s(Address adr) { | |
3878 InstructionMark im(this); | |
7430
d02120b7a34f
8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
twisti
parents:
7427
diff
changeset
|
3879 emit_int8((unsigned char)0xDB); |
304 | 3880 emit_operand32(rax, adr); |
3881 } | |
3882 | |
3883 void Assembler::fincstp() { | |
7430
d02120b7a34f
8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
twisti
parents:
7427
diff
changeset
|
3884 emit_int8((unsigned char)0xD9); |
d02120b7a34f
8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
twisti
parents:
7427
diff
changeset
|
3885 emit_int8((unsigned char)0xF7); |
304 | 3886 } |
3887 | |
3888 void Assembler::finit() { | |
7430
d02120b7a34f
8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
twisti
parents:
7427
diff
changeset
|
3889 emit_int8((unsigned char)0x9B); |
d02120b7a34f
8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
twisti
parents:
7427
diff
changeset
|
3890 emit_int8((unsigned char)0xDB); |
d02120b7a34f
8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
twisti
parents:
7427
diff
changeset
|
3891 emit_int8((unsigned char)0xE3); |
304 | 3892 } |
3893 | |
3894 void Assembler::fist_s(Address adr) { | |
3895 InstructionMark im(this); | |
7430
d02120b7a34f
8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
twisti
parents:
7427
diff
changeset
|
3896 emit_int8((unsigned char)0xDB); |
304 | 3897 emit_operand32(rdx, adr); |
3898 } | |
3899 | |
3900 void Assembler::fistp_d(Address adr) { | |
3901 InstructionMark im(this); | |
7430
d02120b7a34f
8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
twisti
parents:
7427
diff
changeset
|
3902 emit_int8((unsigned char)0xDF); |
304 | 3903 emit_operand32(rdi, adr); |
3904 } | |
3905 | |
3906 void Assembler::fistp_s(Address adr) { | |
3907 InstructionMark im(this); | |
7430
d02120b7a34f
8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
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parents:
7427
diff
changeset
|
3908 emit_int8((unsigned char)0xDB); |
304 | 3909 emit_operand32(rbx, adr); |
3910 } | |
0 | 3911 |
3912 void Assembler::fld1() { | |
7430
d02120b7a34f
8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
twisti
parents:
7427
diff
changeset
|
3913 emit_int8((unsigned char)0xD9); |
d02120b7a34f
8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
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parents:
7427
diff
changeset
|
3914 emit_int8((unsigned char)0xE8); |
0 | 3915 } |
3916 | |
304 | 3917 void Assembler::fld_d(Address adr) { |
3918 InstructionMark im(this); | |
7430
d02120b7a34f
8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
twisti
parents:
7427
diff
changeset
|
3919 emit_int8((unsigned char)0xDD); |
304 | 3920 emit_operand32(rax, adr); |
3921 } | |
0 | 3922 |
3923 void Assembler::fld_s(Address adr) { | |
3924 InstructionMark im(this); | |
7430
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8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
twisti
parents:
7427
diff
changeset
|
3925 emit_int8((unsigned char)0xD9); |
304 | 3926 emit_operand32(rax, adr); |
3927 } | |
3928 | |
3929 | |
3930 void Assembler::fld_s(int index) { | |
0 | 3931 emit_farith(0xD9, 0xC0, index); |
3932 } | |
3933 | |
3934 void Assembler::fld_x(Address adr) { | |
3935 InstructionMark im(this); | |
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3936 emit_int8((unsigned char)0xDB); |
304 | 3937 emit_operand32(rbp, adr); |
3938 } | |
3939 | |
3940 void Assembler::fldcw(Address src) { | |
3941 InstructionMark im(this); | |
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3942 emit_int8((unsigned char)0xD9); |
304 | 3943 emit_operand32(rbp, src); |
3944 } | |
3945 | |
3946 void Assembler::fldenv(Address src) { | |
0 | 3947 InstructionMark im(this); |
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3948 emit_int8((unsigned char)0xD9); |
304 | 3949 emit_operand32(rsp, src); |
3950 } | |
3951 | |
3952 void Assembler::fldlg2() { | |
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3953 emit_int8((unsigned char)0xD9); |
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3954 emit_int8((unsigned char)0xEC); |
304 | 3955 } |
0 | 3956 |
3957 void Assembler::fldln2() { | |
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3958 emit_int8((unsigned char)0xD9); |
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3959 emit_int8((unsigned char)0xED); |
0 | 3960 } |
3961 | |
304 | 3962 void Assembler::fldz() { |
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3963 emit_int8((unsigned char)0xD9); |
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3964 emit_int8((unsigned char)0xEE); |
304 | 3965 } |
0 | 3966 |
3967 void Assembler::flog() { | |
3968 fldln2(); | |
3969 fxch(); | |
3970 fyl2x(); | |
3971 } | |
3972 | |
3973 void Assembler::flog10() { | |
3974 fldlg2(); | |
3975 fxch(); | |
3976 fyl2x(); | |
3977 } | |
3978 | |
304 | 3979 void Assembler::fmul(int i) { |
3980 emit_farith(0xD8, 0xC8, i); | |
3981 } | |
3982 | |
3983 void Assembler::fmul_d(Address src) { | |
3984 InstructionMark im(this); | |
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3985 emit_int8((unsigned char)0xDC); |
304 | 3986 emit_operand32(rcx, src); |
3987 } | |
3988 | |
3989 void Assembler::fmul_s(Address src) { | |
3990 InstructionMark im(this); | |
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3991 emit_int8((unsigned char)0xD8); |
304 | 3992 emit_operand32(rcx, src); |
3993 } | |
3994 | |
3995 void Assembler::fmula(int i) { | |
3996 emit_farith(0xDC, 0xC8, i); | |
3997 } | |
3998 | |
3999 void Assembler::fmulp(int i) { | |
4000 emit_farith(0xDE, 0xC8, i); | |
4001 } | |
4002 | |
4003 void Assembler::fnsave(Address dst) { | |
4004 InstructionMark im(this); | |
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4005 emit_int8((unsigned char)0xDD); |
304 | 4006 emit_operand32(rsi, dst); |
4007 } | |
4008 | |
4009 void Assembler::fnstcw(Address src) { | |
4010 InstructionMark im(this); | |
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4011 emit_int8((unsigned char)0x9B); |
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4012 emit_int8((unsigned char)0xD9); |
304 | 4013 emit_operand32(rdi, src); |
4014 } | |
4015 | |
4016 void Assembler::fnstsw_ax() { | |
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4017 emit_int8((unsigned char)0xDF); |
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|
4018 emit_int8((unsigned char)0xE0); |
304 | 4019 } |
4020 | |
4021 void Assembler::fprem() { | |
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|
4022 emit_int8((unsigned char)0xD9); |
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|
4023 emit_int8((unsigned char)0xF8); |
304 | 4024 } |
4025 | |
4026 void Assembler::fprem1() { | |
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|
4027 emit_int8((unsigned char)0xD9); |
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|
4028 emit_int8((unsigned char)0xF5); |
304 | 4029 } |
4030 | |
4031 void Assembler::frstor(Address src) { | |
4032 InstructionMark im(this); | |
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4033 emit_int8((unsigned char)0xDD); |
304 | 4034 emit_operand32(rsp, src); |
4035 } | |
0 | 4036 |
4037 void Assembler::fsin() { | |
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|
4038 emit_int8((unsigned char)0xD9); |
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|
4039 emit_int8((unsigned char)0xFE); |
0 | 4040 } |
4041 | |
304 | 4042 void Assembler::fsqrt() { |
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|
4043 emit_int8((unsigned char)0xD9); |
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4044 emit_int8((unsigned char)0xFA); |
304 | 4045 } |
4046 | |
4047 void Assembler::fst_d(Address adr) { | |
4048 InstructionMark im(this); | |
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4049 emit_int8((unsigned char)0xDD); |
304 | 4050 emit_operand32(rdx, adr); |
4051 } | |
4052 | |
4053 void Assembler::fst_s(Address adr) { | |
4054 InstructionMark im(this); | |
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|
4055 emit_int8((unsigned char)0xD9); |
304 | 4056 emit_operand32(rdx, adr); |
4057 } | |
4058 | |
4059 void Assembler::fstp_d(Address adr) { | |
4060 InstructionMark im(this); | |
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|
4061 emit_int8((unsigned char)0xDD); |
304 | 4062 emit_operand32(rbx, adr); |
4063 } | |
4064 | |
4065 void Assembler::fstp_d(int index) { | |
4066 emit_farith(0xDD, 0xD8, index); | |
4067 } | |
4068 | |
4069 void Assembler::fstp_s(Address adr) { | |
4070 InstructionMark im(this); | |
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|
4071 emit_int8((unsigned char)0xD9); |
304 | 4072 emit_operand32(rbx, adr); |
4073 } | |
4074 | |
4075 void Assembler::fstp_x(Address adr) { | |
4076 InstructionMark im(this); | |
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|
4077 emit_int8((unsigned char)0xDB); |
304 | 4078 emit_operand32(rdi, adr); |
4079 } | |
4080 | |
4081 void Assembler::fsub(int i) { | |
4082 emit_farith(0xD8, 0xE0, i); | |
4083 } | |
4084 | |
4085 void Assembler::fsub_d(Address src) { | |
4086 InstructionMark im(this); | |
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|
4087 emit_int8((unsigned char)0xDC); |
304 | 4088 emit_operand32(rsp, src); |
4089 } | |
4090 | |
4091 void Assembler::fsub_s(Address src) { | |
4092 InstructionMark im(this); | |
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|
4093 emit_int8((unsigned char)0xD8); |
304 | 4094 emit_operand32(rsp, src); |
4095 } | |
4096 | |
4097 void Assembler::fsuba(int i) { | |
4098 emit_farith(0xDC, 0xE8, i); | |
4099 } | |
4100 | |
4101 void Assembler::fsubp(int i) { | |
4102 emit_farith(0xDE, 0xE8, i); // ST(0) <- ST(0) - ST(1) and pop (Intel manual wrong) | |
4103 } | |
4104 | |
4105 void Assembler::fsubr(int i) { | |
4106 emit_farith(0xD8, 0xE8, i); | |
4107 } | |
4108 | |
4109 void Assembler::fsubr_d(Address src) { | |
4110 InstructionMark im(this); | |
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|
4111 emit_int8((unsigned char)0xDC); |
304 | 4112 emit_operand32(rbp, src); |
4113 } | |
4114 | |
4115 void Assembler::fsubr_s(Address src) { | |
4116 InstructionMark im(this); | |
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|
4117 emit_int8((unsigned char)0xD8); |
304 | 4118 emit_operand32(rbp, src); |
4119 } | |
4120 | |
4121 void Assembler::fsubra(int i) { | |
4122 emit_farith(0xDC, 0xE0, i); | |
4123 } | |
4124 | |
4125 void Assembler::fsubrp(int i) { | |
4126 emit_farith(0xDE, 0xE0, i); // ST(0) <- ST(1) - ST(0) and pop (Intel manual wrong) | |
0 | 4127 } |
4128 | |
4129 void Assembler::ftan() { | |
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|
4130 emit_int8((unsigned char)0xD9); |
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|
4131 emit_int8((unsigned char)0xF2); |
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|
4132 emit_int8((unsigned char)0xDD); |
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|
4133 emit_int8((unsigned char)0xD8); |
0 | 4134 } |
4135 | |
304 | 4136 void Assembler::ftst() { |
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|
4137 emit_int8((unsigned char)0xD9); |
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|
4138 emit_int8((unsigned char)0xE4); |
304 | 4139 } |
0 | 4140 |
4141 void Assembler::fucomi(int i) { | |
4142 // make sure the instruction is supported (introduced for P6, together with cmov) | |
4143 guarantee(VM_Version::supports_cmov(), "illegal instruction"); | |
4144 emit_farith(0xDB, 0xE8, i); | |
4145 } | |
4146 | |
4147 void Assembler::fucomip(int i) { | |
4148 // make sure the instruction is supported (introduced for P6, together with cmov) | |
4149 guarantee(VM_Version::supports_cmov(), "illegal instruction"); | |
4150 emit_farith(0xDF, 0xE8, i); | |
4151 } | |
4152 | |
4153 void Assembler::fwait() { | |
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changeset
|
4154 emit_int8((unsigned char)0x9B); |
0 | 4155 } |
4156 | |
304 | 4157 void Assembler::fxch(int i) { |
4158 emit_farith(0xD9, 0xC8, i); | |
4159 } | |
4160 | |
4161 void Assembler::fyl2x() { | |
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changeset
|
4162 emit_int8((unsigned char)0xD9); |
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changeset
|
4163 emit_int8((unsigned char)0xF1); |
304 | 4164 } |
4165 | |
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|
4166 void Assembler::frndint() { |
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changeset
|
4167 emit_int8((unsigned char)0xD9); |
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|
4168 emit_int8((unsigned char)0xFC); |
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|
4169 } |
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|
4170 |
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|
4171 void Assembler::f2xm1() { |
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|
4172 emit_int8((unsigned char)0xD9); |
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|
4173 emit_int8((unsigned char)0xF0); |
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|
4174 } |
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|
4175 |
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4176 void Assembler::fldl2e() { |
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changeset
|
4177 emit_int8((unsigned char)0xD9); |
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|
4178 emit_int8((unsigned char)0xEA); |
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|
4179 } |
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|
4180 |
4759 | 4181 // SSE SIMD prefix byte values corresponding to VexSimdPrefix encoding. |
4182 static int simd_pre[4] = { 0, 0x66, 0xF3, 0xF2 }; | |
4183 // SSE opcode second byte values (first is 0x0F) corresponding to VexOpcode encoding. | |
4184 static int simd_opc[4] = { 0, 0, 0x38, 0x3A }; | |
4185 | |
4186 // Generate SSE legacy REX prefix and SIMD opcode based on VEX encoding. | |
4187 void Assembler::rex_prefix(Address adr, XMMRegister xreg, VexSimdPrefix pre, VexOpcode opc, bool rex_w) { | |
4188 if (pre > 0) { | |
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4189 emit_int8(simd_pre[pre]); |
4759 | 4190 } |
4191 if (rex_w) { | |
4192 prefixq(adr, xreg); | |
4193 } else { | |
4194 prefix(adr, xreg); | |
4195 } | |
4196 if (opc > 0) { | |
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4197 emit_int8(0x0F); |
4759 | 4198 int opc2 = simd_opc[opc]; |
4199 if (opc2 > 0) { | |
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|
4200 emit_int8(opc2); |
4759 | 4201 } |
4202 } | |
4203 } | |
4204 | |
4205 int Assembler::rex_prefix_and_encode(int dst_enc, int src_enc, VexSimdPrefix pre, VexOpcode opc, bool rex_w) { | |
4206 if (pre > 0) { | |
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|
4207 emit_int8(simd_pre[pre]); |
4759 | 4208 } |
4209 int encode = (rex_w) ? prefixq_and_encode(dst_enc, src_enc) : | |
4210 prefix_and_encode(dst_enc, src_enc); | |
4211 if (opc > 0) { | |
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|
4212 emit_int8(0x0F); |
4759 | 4213 int opc2 = simd_opc[opc]; |
4214 if (opc2 > 0) { | |
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|
4215 emit_int8(opc2); |
4759 | 4216 } |
4217 } | |
4218 return encode; | |
4219 } | |
4220 | |
4221 | |
4222 void Assembler::vex_prefix(bool vex_r, bool vex_b, bool vex_x, bool vex_w, int nds_enc, VexSimdPrefix pre, VexOpcode opc, bool vector256) { | |
4223 if (vex_b || vex_x || vex_w || (opc == VEX_OPCODE_0F_38) || (opc == VEX_OPCODE_0F_3A)) { | |
4224 prefix(VEX_3bytes); | |
4225 | |
4226 int byte1 = (vex_r ? VEX_R : 0) | (vex_x ? VEX_X : 0) | (vex_b ? VEX_B : 0); | |
4227 byte1 = (~byte1) & 0xE0; | |
4228 byte1 |= opc; | |
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4229 emit_int8(byte1); |
4759 | 4230 |
4231 int byte2 = ((~nds_enc) & 0xf) << 3; | |
4232 byte2 |= (vex_w ? VEX_W : 0) | (vector256 ? 4 : 0) | pre; | |
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4233 emit_int8(byte2); |
4759 | 4234 } else { |
4235 prefix(VEX_2bytes); | |
4236 | |
4237 int byte1 = vex_r ? VEX_R : 0; | |
4238 byte1 = (~byte1) & 0x80; | |
4239 byte1 |= ((~nds_enc) & 0xf) << 3; | |
4240 byte1 |= (vector256 ? 4 : 0) | pre; | |
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4241 emit_int8(byte1); |
4759 | 4242 } |
4243 } | |
4244 | |
4245 void Assembler::vex_prefix(Address adr, int nds_enc, int xreg_enc, VexSimdPrefix pre, VexOpcode opc, bool vex_w, bool vector256){ | |
4246 bool vex_r = (xreg_enc >= 8); | |
4247 bool vex_b = adr.base_needs_rex(); | |
4248 bool vex_x = adr.index_needs_rex(); | |
4249 vex_prefix(vex_r, vex_b, vex_x, vex_w, nds_enc, pre, opc, vector256); | |
4250 } | |
4251 | |
4252 int Assembler::vex_prefix_and_encode(int dst_enc, int nds_enc, int src_enc, VexSimdPrefix pre, VexOpcode opc, bool vex_w, bool vector256) { | |
4253 bool vex_r = (dst_enc >= 8); | |
4254 bool vex_b = (src_enc >= 8); | |
4255 bool vex_x = false; | |
4256 vex_prefix(vex_r, vex_b, vex_x, vex_w, nds_enc, pre, opc, vector256); | |
4257 return (((dst_enc & 7) << 3) | (src_enc & 7)); | |
4258 } | |
4259 | |
4260 | |
4261 void Assembler::simd_prefix(XMMRegister xreg, XMMRegister nds, Address adr, VexSimdPrefix pre, VexOpcode opc, bool rex_w, bool vector256) { | |
4262 if (UseAVX > 0) { | |
4263 int xreg_enc = xreg->encoding(); | |
4264 int nds_enc = nds->is_valid() ? nds->encoding() : 0; | |
4265 vex_prefix(adr, nds_enc, xreg_enc, pre, opc, rex_w, vector256); | |
4266 } else { | |
4267 assert((nds == xreg) || (nds == xnoreg), "wrong sse encoding"); | |
4268 rex_prefix(adr, xreg, pre, opc, rex_w); | |
4269 } | |
4270 } | |
4271 | |
4272 int Assembler::simd_prefix_and_encode(XMMRegister dst, XMMRegister nds, XMMRegister src, VexSimdPrefix pre, VexOpcode opc, bool rex_w, bool vector256) { | |
4273 int dst_enc = dst->encoding(); | |
4274 int src_enc = src->encoding(); | |
4275 if (UseAVX > 0) { | |
4276 int nds_enc = nds->is_valid() ? nds->encoding() : 0; | |
4277 return vex_prefix_and_encode(dst_enc, nds_enc, src_enc, pre, opc, rex_w, vector256); | |
4278 } else { | |
4279 assert((nds == dst) || (nds == src) || (nds == xnoreg), "wrong sse encoding"); | |
4280 return rex_prefix_and_encode(dst_enc, src_enc, pre, opc, rex_w); | |
4281 } | |
4282 } | |
304 | 4283 |
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4284 void Assembler::emit_simd_arith(int opcode, XMMRegister dst, Address src, VexSimdPrefix pre) { |
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4285 InstructionMark im(this); |
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4286 simd_prefix(dst, dst, src, pre); |
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4287 emit_int8(opcode); |
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4288 emit_operand(dst, src); |
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4289 } |
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4290 |
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4291 void Assembler::emit_simd_arith(int opcode, XMMRegister dst, XMMRegister src, VexSimdPrefix pre) { |
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4292 int encode = simd_prefix_and_encode(dst, dst, src, pre); |
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4293 emit_int8(opcode); |
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4294 emit_int8((unsigned char)(0xC0 | encode)); |
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4295 } |
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4296 |
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4297 // Versions with no second source register (non-destructive source). |
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4298 void Assembler::emit_simd_arith_nonds(int opcode, XMMRegister dst, Address src, VexSimdPrefix pre) { |
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4299 InstructionMark im(this); |
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4300 simd_prefix(dst, xnoreg, src, pre); |
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4301 emit_int8(opcode); |
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4302 emit_operand(dst, src); |
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4303 } |
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4304 |
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4305 void Assembler::emit_simd_arith_nonds(int opcode, XMMRegister dst, XMMRegister src, VexSimdPrefix pre) { |
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4306 int encode = simd_prefix_and_encode(dst, xnoreg, src, pre); |
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4307 emit_int8(opcode); |
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4308 emit_int8((unsigned char)(0xC0 | encode)); |
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4309 } |
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4310 |
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4311 // 3-operands AVX instructions |
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4312 void Assembler::emit_vex_arith(int opcode, XMMRegister dst, XMMRegister nds, |
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4313 Address src, VexSimdPrefix pre, bool vector256) { |
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4314 InstructionMark im(this); |
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4315 vex_prefix(dst, nds, src, pre, vector256); |
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4316 emit_int8(opcode); |
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4317 emit_operand(dst, src); |
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4318 } |
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4319 |
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4320 void Assembler::emit_vex_arith(int opcode, XMMRegister dst, XMMRegister nds, |
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4321 XMMRegister src, VexSimdPrefix pre, bool vector256) { |
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4322 int encode = vex_prefix_and_encode(dst, nds, src, pre, vector256); |
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4323 emit_int8(opcode); |
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4324 emit_int8((unsigned char)(0xC0 | encode)); |
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4325 } |
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4326 |
304 | 4327 #ifndef _LP64 |
4328 | |
4329 void Assembler::incl(Register dst) { | |
4330 // Don't use it directly. Use MacroAssembler::incrementl() instead. | |
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4331 emit_int8(0x40 | dst->encoding()); |
304 | 4332 } |
4333 | |
4334 void Assembler::lea(Register dst, Address src) { | |
4335 leal(dst, src); | |
4336 } | |
4337 | |
4338 void Assembler::mov_literal32(Address dst, int32_t imm32, RelocationHolder const& rspec) { | |
4339 InstructionMark im(this); | |
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4340 emit_int8((unsigned char)0xC7); |
304 | 4341 emit_operand(rax, dst); |
4342 emit_data((int)imm32, rspec, 0); | |
4343 } | |
4344 | |
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4345 void Assembler::mov_literal32(Register dst, int32_t imm32, RelocationHolder const& rspec) { |
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4346 InstructionMark im(this); |
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4347 int encode = prefix_and_encode(dst->encoding()); |
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4348 emit_int8((unsigned char)(0xB8 | encode)); |
642
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4349 emit_data((int)imm32, rspec, 0); |
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4350 } |
304 | 4351 |
4352 void Assembler::popa() { // 32bit | |
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4353 emit_int8(0x61); |
304 | 4354 } |
4355 | |
4356 void Assembler::push_literal32(int32_t imm32, RelocationHolder const& rspec) { | |
4357 InstructionMark im(this); | |
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4358 emit_int8(0x68); |
304 | 4359 emit_data(imm32, rspec, 0); |
4360 } | |
4361 | |
4362 void Assembler::pusha() { // 32bit | |
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4363 emit_int8(0x60); |
304 | 4364 } |
4365 | |
4366 void Assembler::set_byte_if_not_zero(Register dst) { | |
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4367 emit_int8(0x0F); |
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4368 emit_int8((unsigned char)0x95); |
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4369 emit_int8((unsigned char)(0xE0 | dst->encoding())); |
304 | 4370 } |
4371 | |
4372 void Assembler::shldl(Register dst, Register src) { | |
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4373 emit_int8(0x0F); |
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4374 emit_int8((unsigned char)0xA5); |
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4375 emit_int8((unsigned char)(0xC0 | src->encoding() << 3 | dst->encoding())); |
304 | 4376 } |
4377 | |
4378 void Assembler::shrdl(Register dst, Register src) { | |
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4379 emit_int8(0x0F); |
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4380 emit_int8((unsigned char)0xAD); |
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4381 emit_int8((unsigned char)(0xC0 | src->encoding() << 3 | dst->encoding())); |
304 | 4382 } |
4383 | |
4384 #else // LP64 | |
4385 | |
1369 | 4386 void Assembler::set_byte_if_not_zero(Register dst) { |
4387 int enc = prefix_and_encode(dst->encoding(), true); | |
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4388 emit_int8(0x0F); |
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4389 emit_int8((unsigned char)0x95); |
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4390 emit_int8((unsigned char)(0xE0 | enc)); |
1369 | 4391 } |
4392 | |
304 | 4393 // 64bit only pieces of the assembler |
4394 // This should only be used by 64bit instructions that can use rip-relative | |
4395 // it cannot be used by instructions that want an immediate value. | |
4396 | |
4397 bool Assembler::reachable(AddressLiteral adr) { | |
4398 int64_t disp; | |
4399 // None will force a 64bit literal to the code stream. Likely a placeholder | |
4400 // for something that will be patched later and we need to certain it will | |
4401 // always be reachable. | |
4402 if (adr.reloc() == relocInfo::none) { | |
4403 return false; | |
4404 } | |
4405 if (adr.reloc() == relocInfo::internal_word_type) { | |
4406 // This should be rip relative and easily reachable. | |
4407 return true; | |
4408 } | |
4409 if (adr.reloc() == relocInfo::virtual_call_type || | |
4410 adr.reloc() == relocInfo::opt_virtual_call_type || | |
4411 adr.reloc() == relocInfo::static_call_type || | |
4412 adr.reloc() == relocInfo::static_stub_type ) { | |
4413 // This should be rip relative within the code cache and easily | |
4414 // reachable until we get huge code caches. (At which point | |
4415 // ic code is going to have issues). | |
4416 return true; | |
4417 } | |
4418 if (adr.reloc() != relocInfo::external_word_type && | |
4419 adr.reloc() != relocInfo::poll_return_type && // these are really external_word but need special | |
4420 adr.reloc() != relocInfo::poll_type && // relocs to identify them | |
4421 adr.reloc() != relocInfo::runtime_call_type ) { | |
4422 return false; | |
4423 } | |
4424 | |
4425 // Stress the correction code | |
4426 if (ForceUnreachable) { | |
4427 // Must be runtimecall reloc, see if it is in the codecache | |
4428 // Flipping stuff in the codecache to be unreachable causes issues | |
4429 // with things like inline caches where the additional instructions | |
4430 // are not handled. | |
4431 if (CodeCache::find_blob(adr._target) == NULL) { | |
4432 return false; | |
4433 } | |
4434 } | |
4435 // For external_word_type/runtime_call_type if it is reachable from where we | |
4436 // are now (possibly a temp buffer) and where we might end up | |
4437 // anywhere in the codeCache then we are always reachable. | |
4438 // This would have to change if we ever save/restore shared code | |
4439 // to be more pessimistic. | |
4440 disp = (int64_t)adr._target - ((int64_t)CodeCache::low_bound() + sizeof(int)); | |
4441 if (!is_simm32(disp)) return false; | |
4442 disp = (int64_t)adr._target - ((int64_t)CodeCache::high_bound() + sizeof(int)); | |
4443 if (!is_simm32(disp)) return false; | |
4444 | |
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4445 disp = (int64_t)adr._target - ((int64_t)pc() + sizeof(int)); |
304 | 4446 |
4447 // Because rip relative is a disp + address_of_next_instruction and we | |
4448 // don't know the value of address_of_next_instruction we apply a fudge factor | |
4449 // to make sure we will be ok no matter the size of the instruction we get placed into. | |
4450 // We don't have to fudge the checks above here because they are already worst case. | |
4451 | |
4452 // 12 == override/rex byte, opcode byte, rm byte, sib byte, a 4-byte disp , 4-byte literal | |
4453 // + 4 because better safe than sorry. | |
4454 const int fudge = 12 + 4; | |
4455 if (disp < 0) { | |
4456 disp -= fudge; | |
4457 } else { | |
4458 disp += fudge; | |
4459 } | |
4460 return is_simm32(disp); | |
4461 } | |
4462 | |
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4463 // Check if the polling page is not reachable from the code cache using rip-relative |
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4464 // addressing. |
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4465 bool Assembler::is_polling_page_far() { |
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4466 intptr_t addr = (intptr_t)os::get_polling_page(); |
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4467 return ForceUnreachable || |
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3938
diff
changeset
|
4468 !is_simm32(addr - (intptr_t)CodeCache::low_bound()) || |
2404
b40d4fa697bf
6964776: c2 should ensure the polling page is reachable on 64 bit
iveresov
parents:
2357
diff
changeset
|
4469 !is_simm32(addr - (intptr_t)CodeCache::high_bound()); |
b40d4fa697bf
6964776: c2 should ensure the polling page is reachable on 64 bit
iveresov
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2357
diff
changeset
|
4470 } |
b40d4fa697bf
6964776: c2 should ensure the polling page is reachable on 64 bit
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2357
diff
changeset
|
4471 |
304 | 4472 void Assembler::emit_data64(jlong data, |
4473 relocInfo::relocType rtype, | |
4474 int format) { | |
4475 if (rtype == relocInfo::none) { | |
7198
6ab62ad83507
8003195: AbstractAssembler should not store code pointers but use the CodeSection directly
twisti
parents:
6894
diff
changeset
|
4476 emit_int64(data); |
304 | 4477 } else { |
4478 emit_data64(data, Relocation::spec_simple(rtype), format); | |
4479 } | |
4480 } | |
4481 | |
4482 void Assembler::emit_data64(jlong data, | |
4483 RelocationHolder const& rspec, | |
4484 int format) { | |
4485 assert(imm_operand == 0, "default format must be immediate in this file"); | |
4486 assert(imm_operand == format, "must be immediate"); | |
4487 assert(inst_mark() != NULL, "must be inside InstructionMark"); | |
4488 // Do not use AbstractAssembler::relocate, which is not intended for | |
4489 // embedded words. Instead, relocate to the enclosing instruction. | |
4490 code_section()->relocate(inst_mark(), rspec, format); | |
4491 #ifdef ASSERT | |
4492 check_relocation(rspec, format); | |
4493 #endif | |
7198
6ab62ad83507
8003195: AbstractAssembler should not store code pointers but use the CodeSection directly
twisti
parents:
6894
diff
changeset
|
4494 emit_int64(data); |
304 | 4495 } |
4496 | |
4497 int Assembler::prefix_and_encode(int reg_enc, bool byteinst) { | |
4498 if (reg_enc >= 8) { | |
4499 prefix(REX_B); | |
4500 reg_enc -= 8; | |
4501 } else if (byteinst && reg_enc >= 4) { | |
4502 prefix(REX); | |
4503 } | |
4504 return reg_enc; | |
4505 } | |
4506 | |
4507 int Assembler::prefixq_and_encode(int reg_enc) { | |
4508 if (reg_enc < 8) { | |
4509 prefix(REX_W); | |
4510 } else { | |
4511 prefix(REX_WB); | |
4512 reg_enc -= 8; | |
4513 } | |
4514 return reg_enc; | |
4515 } | |
4516 | |
4517 int Assembler::prefix_and_encode(int dst_enc, int src_enc, bool byteinst) { | |
4518 if (dst_enc < 8) { | |
4519 if (src_enc >= 8) { | |
4520 prefix(REX_B); | |
4521 src_enc -= 8; | |
4522 } else if (byteinst && src_enc >= 4) { | |
4523 prefix(REX); | |
4524 } | |
4525 } else { | |
4526 if (src_enc < 8) { | |
4527 prefix(REX_R); | |
4528 } else { | |
4529 prefix(REX_RB); | |
4530 src_enc -= 8; | |
4531 } | |
4532 dst_enc -= 8; | |
4533 } | |
4534 return dst_enc << 3 | src_enc; | |
4535 } | |
4536 | |
4537 int Assembler::prefixq_and_encode(int dst_enc, int src_enc) { | |
4538 if (dst_enc < 8) { | |
4539 if (src_enc < 8) { | |
4540 prefix(REX_W); | |
4541 } else { | |
4542 prefix(REX_WB); | |
4543 src_enc -= 8; | |
4544 } | |
4545 } else { | |
4546 if (src_enc < 8) { | |
4547 prefix(REX_WR); | |
4548 } else { | |
4549 prefix(REX_WRB); | |
4550 src_enc -= 8; | |
4551 } | |
4552 dst_enc -= 8; | |
4553 } | |
4554 return dst_enc << 3 | src_enc; | |
4555 } | |
4556 | |
4557 void Assembler::prefix(Register reg) { | |
4558 if (reg->encoding() >= 8) { | |
4559 prefix(REX_B); | |
4560 } | |
4561 } | |
4562 | |
4563 void Assembler::prefix(Address adr) { | |
4564 if (adr.base_needs_rex()) { | |
4565 if (adr.index_needs_rex()) { | |
4566 prefix(REX_XB); | |
4567 } else { | |
4568 prefix(REX_B); | |
4569 } | |
4570 } else { | |
4571 if (adr.index_needs_rex()) { | |
4572 prefix(REX_X); | |
4573 } | |
4574 } | |
4575 } | |
4576 | |
4577 void Assembler::prefixq(Address adr) { | |
4578 if (adr.base_needs_rex()) { | |
4579 if (adr.index_needs_rex()) { | |
4580 prefix(REX_WXB); | |
4581 } else { | |
4582 prefix(REX_WB); | |
4583 } | |
4584 } else { | |
4585 if (adr.index_needs_rex()) { | |
4586 prefix(REX_WX); | |
4587 } else { | |
4588 prefix(REX_W); | |
4589 } | |
4590 } | |
4591 } | |
4592 | |
4593 | |
4594 void Assembler::prefix(Address adr, Register reg, bool byteinst) { | |
4595 if (reg->encoding() < 8) { | |
4596 if (adr.base_needs_rex()) { | |
4597 if (adr.index_needs_rex()) { | |
4598 prefix(REX_XB); | |
4599 } else { | |
4600 prefix(REX_B); | |
4601 } | |
4602 } else { | |
4603 if (adr.index_needs_rex()) { | |
4604 prefix(REX_X); | |
3855 | 4605 } else if (byteinst && reg->encoding() >= 4 ) { |
304 | 4606 prefix(REX); |
4607 } | |
4608 } | |
4609 } else { | |
4610 if (adr.base_needs_rex()) { | |
4611 if (adr.index_needs_rex()) { | |
4612 prefix(REX_RXB); | |
4613 } else { | |
4614 prefix(REX_RB); | |
4615 } | |
4616 } else { | |
4617 if (adr.index_needs_rex()) { | |
4618 prefix(REX_RX); | |
4619 } else { | |
4620 prefix(REX_R); | |
4621 } | |
4622 } | |
4623 } | |
4624 } | |
4625 | |
4626 void Assembler::prefixq(Address adr, Register src) { | |
4627 if (src->encoding() < 8) { | |
4628 if (adr.base_needs_rex()) { | |
4629 if (adr.index_needs_rex()) { | |
4630 prefix(REX_WXB); | |
4631 } else { | |
4632 prefix(REX_WB); | |
4633 } | |
4634 } else { | |
4635 if (adr.index_needs_rex()) { | |
4636 prefix(REX_WX); | |
4637 } else { | |
4638 prefix(REX_W); | |
4639 } | |
4640 } | |
4641 } else { | |
4642 if (adr.base_needs_rex()) { | |
4643 if (adr.index_needs_rex()) { | |
4644 prefix(REX_WRXB); | |
4645 } else { | |
4646 prefix(REX_WRB); | |
4647 } | |
4648 } else { | |
4649 if (adr.index_needs_rex()) { | |
4650 prefix(REX_WRX); | |
4651 } else { | |
4652 prefix(REX_WR); | |
4653 } | |
4654 } | |
4655 } | |
4656 } | |
4657 | |
4658 void Assembler::prefix(Address adr, XMMRegister reg) { | |
4659 if (reg->encoding() < 8) { | |
4660 if (adr.base_needs_rex()) { | |
4661 if (adr.index_needs_rex()) { | |
4662 prefix(REX_XB); | |
4663 } else { | |
4664 prefix(REX_B); | |
4665 } | |
4666 } else { | |
4667 if (adr.index_needs_rex()) { | |
4668 prefix(REX_X); | |
4669 } | |
4670 } | |
4671 } else { | |
4672 if (adr.base_needs_rex()) { | |
4673 if (adr.index_needs_rex()) { | |
4674 prefix(REX_RXB); | |
4675 } else { | |
4676 prefix(REX_RB); | |
4677 } | |
4678 } else { | |
4679 if (adr.index_needs_rex()) { | |
4680 prefix(REX_RX); | |
4681 } else { | |
4682 prefix(REX_R); | |
4683 } | |
4684 } | |
4685 } | |
4686 } | |
4687 | |
4759 | 4688 void Assembler::prefixq(Address adr, XMMRegister src) { |
4689 if (src->encoding() < 8) { | |
4690 if (adr.base_needs_rex()) { | |
4691 if (adr.index_needs_rex()) { | |
4692 prefix(REX_WXB); | |
4693 } else { | |
4694 prefix(REX_WB); | |
4695 } | |
4696 } else { | |
4697 if (adr.index_needs_rex()) { | |
4698 prefix(REX_WX); | |
4699 } else { | |
4700 prefix(REX_W); | |
4701 } | |
4702 } | |
4703 } else { | |
4704 if (adr.base_needs_rex()) { | |
4705 if (adr.index_needs_rex()) { | |
4706 prefix(REX_WRXB); | |
4707 } else { | |
4708 prefix(REX_WRB); | |
4709 } | |
4710 } else { | |
4711 if (adr.index_needs_rex()) { | |
4712 prefix(REX_WRX); | |
4713 } else { | |
4714 prefix(REX_WR); | |
4715 } | |
4716 } | |
4717 } | |
4718 } | |
4719 | |
304 | 4720 void Assembler::adcq(Register dst, int32_t imm32) { |
4721 (void) prefixq_and_encode(dst->encoding()); | |
4722 emit_arith(0x81, 0xD0, dst, imm32); | |
4723 } | |
4724 | |
4725 void Assembler::adcq(Register dst, Address src) { | |
4726 InstructionMark im(this); | |
4727 prefixq(src, dst); | |
7430
d02120b7a34f
8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
twisti
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7427
diff
changeset
|
4728 emit_int8(0x13); |
304 | 4729 emit_operand(dst, src); |
4730 } | |
4731 | |
4732 void Assembler::adcq(Register dst, Register src) { | |
4733 (int) prefixq_and_encode(dst->encoding(), src->encoding()); | |
4734 emit_arith(0x13, 0xC0, dst, src); | |
4735 } | |
4736 | |
4737 void Assembler::addq(Address dst, int32_t imm32) { | |
4738 InstructionMark im(this); | |
4739 prefixq(dst); | |
4740 emit_arith_operand(0x81, rax, dst,imm32); | |
4741 } | |
4742 | |
4743 void Assembler::addq(Address dst, Register src) { | |
4744 InstructionMark im(this); | |
4745 prefixq(dst, src); | |
7430
d02120b7a34f
8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
twisti
parents:
7427
diff
changeset
|
4746 emit_int8(0x01); |
304 | 4747 emit_operand(src, dst); |
4748 } | |
4749 | |
4750 void Assembler::addq(Register dst, int32_t imm32) { | |
4751 (void) prefixq_and_encode(dst->encoding()); | |
4752 emit_arith(0x81, 0xC0, dst, imm32); | |
4753 } | |
4754 | |
4755 void Assembler::addq(Register dst, Address src) { | |
4756 InstructionMark im(this); | |
4757 prefixq(src, dst); | |
7430
d02120b7a34f
8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
twisti
parents:
7427
diff
changeset
|
4758 emit_int8(0x03); |
304 | 4759 emit_operand(dst, src); |
4760 } | |
4761 | |
4762 void Assembler::addq(Register dst, Register src) { | |
4763 (void) prefixq_and_encode(dst->encoding(), src->encoding()); | |
4764 emit_arith(0x03, 0xC0, dst, src); | |
4765 } | |
4766 | |
3457 | 4767 void Assembler::andq(Address dst, int32_t imm32) { |
4768 InstructionMark im(this); | |
4769 prefixq(dst); | |
7430
d02120b7a34f
8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
twisti
parents:
7427
diff
changeset
|
4770 emit_int8((unsigned char)0x81); |
3457 | 4771 emit_operand(rsp, dst, 4); |
7476
ffa87474d7a4
8004537: replace AbstractAssembler emit_long with emit_int32
twisti
parents:
7475
diff
changeset
|
4772 emit_int32(imm32); |
3457 | 4773 } |
4774 | |
304 | 4775 void Assembler::andq(Register dst, int32_t imm32) { |
4776 (void) prefixq_and_encode(dst->encoding()); | |
4777 emit_arith(0x81, 0xE0, dst, imm32); | |
4778 } | |
4779 | |
4780 void Assembler::andq(Register dst, Address src) { | |
4781 InstructionMark im(this); | |
4782 prefixq(src, dst); | |
7430
d02120b7a34f
8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
twisti
parents:
7427
diff
changeset
|
4783 emit_int8(0x23); |
304 | 4784 emit_operand(dst, src); |
4785 } | |
4786 | |
4787 void Assembler::andq(Register dst, Register src) { | |
4788 (int) prefixq_and_encode(dst->encoding(), src->encoding()); | |
4789 emit_arith(0x23, 0xC0, dst, src); | |
4790 } | |
4791 | |
775
93c14e5562c4
6823354: Add intrinsics for {Integer,Long}.{numberOfLeadingZeros,numberOfTrailingZeros}()
twisti
parents:
710
diff
changeset
|
4792 void Assembler::bsfq(Register dst, Register src) { |
93c14e5562c4
6823354: Add intrinsics for {Integer,Long}.{numberOfLeadingZeros,numberOfTrailingZeros}()
twisti
parents:
710
diff
changeset
|
4793 int encode = prefixq_and_encode(dst->encoding(), src->encoding()); |
7430
d02120b7a34f
8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
twisti
parents:
7427
diff
changeset
|
4794 emit_int8(0x0F); |
d02120b7a34f
8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
twisti
parents:
7427
diff
changeset
|
4795 emit_int8((unsigned char)0xBC); |
d02120b7a34f
8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
twisti
parents:
7427
diff
changeset
|
4796 emit_int8((unsigned char)(0xC0 | encode)); |
775
93c14e5562c4
6823354: Add intrinsics for {Integer,Long}.{numberOfLeadingZeros,numberOfTrailingZeros}()
twisti
parents:
710
diff
changeset
|
4797 } |
93c14e5562c4
6823354: Add intrinsics for {Integer,Long}.{numberOfLeadingZeros,numberOfTrailingZeros}()
twisti
parents:
710
diff
changeset
|
4798 |
93c14e5562c4
6823354: Add intrinsics for {Integer,Long}.{numberOfLeadingZeros,numberOfTrailingZeros}()
twisti
parents:
710
diff
changeset
|
4799 void Assembler::bsrq(Register dst, Register src) { |
93c14e5562c4
6823354: Add intrinsics for {Integer,Long}.{numberOfLeadingZeros,numberOfTrailingZeros}()
twisti
parents:
710
diff
changeset
|
4800 assert(!VM_Version::supports_lzcnt(), "encoding is treated as LZCNT"); |
93c14e5562c4
6823354: Add intrinsics for {Integer,Long}.{numberOfLeadingZeros,numberOfTrailingZeros}()
twisti
parents:
710
diff
changeset
|
4801 int encode = prefixq_and_encode(dst->encoding(), src->encoding()); |
7430
d02120b7a34f
8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
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parents:
7427
diff
changeset
|
4802 emit_int8(0x0F); |
d02120b7a34f
8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
twisti
parents:
7427
diff
changeset
|
4803 emit_int8((unsigned char)0xBD); |
d02120b7a34f
8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
twisti
parents:
7427
diff
changeset
|
4804 emit_int8((unsigned char)(0xC0 | encode)); |
775
93c14e5562c4
6823354: Add intrinsics for {Integer,Long}.{numberOfLeadingZeros,numberOfTrailingZeros}()
twisti
parents:
710
diff
changeset
|
4805 } |
93c14e5562c4
6823354: Add intrinsics for {Integer,Long}.{numberOfLeadingZeros,numberOfTrailingZeros}()
twisti
parents:
710
diff
changeset
|
4806 |
304 | 4807 void Assembler::bswapq(Register reg) { |
4808 int encode = prefixq_and_encode(reg->encoding()); | |
7430
d02120b7a34f
8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
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7427
diff
changeset
|
4809 emit_int8(0x0F); |
d02120b7a34f
8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
twisti
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7427
diff
changeset
|
4810 emit_int8((unsigned char)(0xC8 | encode)); |
304 | 4811 } |
4812 | |
4813 void Assembler::cdqq() { | |
4814 prefix(REX_W); | |
7430
d02120b7a34f
8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
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7427
diff
changeset
|
4815 emit_int8((unsigned char)0x99); |
304 | 4816 } |
4817 | |
4818 void Assembler::clflush(Address adr) { | |
4819 prefix(adr); | |
7430
d02120b7a34f
8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
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diff
changeset
|
4820 emit_int8(0x0F); |
d02120b7a34f
8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
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7427
diff
changeset
|
4821 emit_int8((unsigned char)0xAE); |
304 | 4822 emit_operand(rdi, adr); |
4823 } | |
4824 | |
4825 void Assembler::cmovq(Condition cc, Register dst, Register src) { | |
4826 int encode = prefixq_and_encode(dst->encoding(), src->encoding()); | |
7430
d02120b7a34f
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diff
changeset
|
4827 emit_int8(0x0F); |
d02120b7a34f
8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
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parents:
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diff
changeset
|
4828 emit_int8(0x40 | cc); |
d02120b7a34f
8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
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7427
diff
changeset
|
4829 emit_int8((unsigned char)(0xC0 | encode)); |
304 | 4830 } |
4831 | |
4832 void Assembler::cmovq(Condition cc, Register dst, Address src) { | |
4833 InstructionMark im(this); | |
4834 prefixq(src, dst); | |
7430
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8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
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diff
changeset
|
4835 emit_int8(0x0F); |
d02120b7a34f
8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
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7427
diff
changeset
|
4836 emit_int8(0x40 | cc); |
304 | 4837 emit_operand(dst, src); |
4838 } | |
4839 | |
4840 void Assembler::cmpq(Address dst, int32_t imm32) { | |
4841 InstructionMark im(this); | |
4842 prefixq(dst); | |
7430
d02120b7a34f
8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
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7427
diff
changeset
|
4843 emit_int8((unsigned char)0x81); |
304 | 4844 emit_operand(rdi, dst, 4); |
7476
ffa87474d7a4
8004537: replace AbstractAssembler emit_long with emit_int32
twisti
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7475
diff
changeset
|
4845 emit_int32(imm32); |
304 | 4846 } |
4847 | |
4848 void Assembler::cmpq(Register dst, int32_t imm32) { | |
4849 (void) prefixq_and_encode(dst->encoding()); | |
4850 emit_arith(0x81, 0xF8, dst, imm32); | |
4851 } | |
4852 | |
4853 void Assembler::cmpq(Address dst, Register src) { | |
4854 InstructionMark im(this); | |
4855 prefixq(dst, src); | |
7430
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8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
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7427
diff
changeset
|
4856 emit_int8(0x3B); |
304 | 4857 emit_operand(src, dst); |
4858 } | |
4859 | |
4860 void Assembler::cmpq(Register dst, Register src) { | |
4861 (void) prefixq_and_encode(dst->encoding(), src->encoding()); | |
4862 emit_arith(0x3B, 0xC0, dst, src); | |
4863 } | |
4864 | |
4865 void Assembler::cmpq(Register dst, Address src) { | |
4866 InstructionMark im(this); | |
4867 prefixq(src, dst); | |
7430
d02120b7a34f
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7427
diff
changeset
|
4868 emit_int8(0x3B); |
304 | 4869 emit_operand(dst, src); |
4870 } | |
4871 | |
4872 void Assembler::cmpxchgq(Register reg, Address adr) { | |
4873 InstructionMark im(this); | |
4874 prefixq(adr, reg); | |
7430
d02120b7a34f
8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
twisti
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7427
diff
changeset
|
4875 emit_int8(0x0F); |
d02120b7a34f
8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
twisti
parents:
7427
diff
changeset
|
4876 emit_int8((unsigned char)0xB1); |
304 | 4877 emit_operand(reg, adr); |
4878 } | |
4879 | |
4880 void Assembler::cvtsi2sdq(XMMRegister dst, Register src) { | |
4881 NOT_LP64(assert(VM_Version::supports_sse2(), "")); | |
4759 | 4882 int encode = simd_prefix_and_encode_q(dst, dst, src, VEX_SIMD_F2); |
7430
d02120b7a34f
8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
twisti
parents:
7427
diff
changeset
|
4883 emit_int8(0x2A); |
d02120b7a34f
8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
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diff
changeset
|
4884 emit_int8((unsigned char)(0xC0 | encode)); |
304 | 4885 } |
4886 | |
4759 | 4887 void Assembler::cvtsi2sdq(XMMRegister dst, Address src) { |
4888 NOT_LP64(assert(VM_Version::supports_sse2(), "")); | |
4889 InstructionMark im(this); | |
4890 simd_prefix_q(dst, dst, src, VEX_SIMD_F2); | |
7430
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8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
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diff
changeset
|
4891 emit_int8(0x2A); |
4759 | 4892 emit_operand(dst, src); |
4893 } | |
4894 | |
304 | 4895 void Assembler::cvtsi2ssq(XMMRegister dst, Register src) { |
4896 NOT_LP64(assert(VM_Version::supports_sse(), "")); | |
4759 | 4897 int encode = simd_prefix_and_encode_q(dst, dst, src, VEX_SIMD_F3); |
7430
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8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
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diff
changeset
|
4898 emit_int8(0x2A); |
d02120b7a34f
8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
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diff
changeset
|
4899 emit_int8((unsigned char)(0xC0 | encode)); |
304 | 4900 } |
4901 | |
4759 | 4902 void Assembler::cvtsi2ssq(XMMRegister dst, Address src) { |
4903 NOT_LP64(assert(VM_Version::supports_sse(), "")); | |
4904 InstructionMark im(this); | |
4905 simd_prefix_q(dst, dst, src, VEX_SIMD_F3); | |
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8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
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diff
changeset
|
4906 emit_int8(0x2A); |
4759 | 4907 emit_operand(dst, src); |
4908 } | |
4909 | |
304 | 4910 void Assembler::cvttsd2siq(Register dst, XMMRegister src) { |
4911 NOT_LP64(assert(VM_Version::supports_sse2(), "")); | |
4759 | 4912 int encode = simd_prefix_and_encode_q(dst, src, VEX_SIMD_F2); |
7430
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8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
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changeset
|
4913 emit_int8(0x2C); |
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8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
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diff
changeset
|
4914 emit_int8((unsigned char)(0xC0 | encode)); |
304 | 4915 } |
4916 | |
4917 void Assembler::cvttss2siq(Register dst, XMMRegister src) { | |
4918 NOT_LP64(assert(VM_Version::supports_sse(), "")); | |
4759 | 4919 int encode = simd_prefix_and_encode_q(dst, src, VEX_SIMD_F3); |
7430
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changeset
|
4920 emit_int8(0x2C); |
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8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
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changeset
|
4921 emit_int8((unsigned char)(0xC0 | encode)); |
304 | 4922 } |
4923 | |
4924 void Assembler::decl(Register dst) { | |
4925 // Don't use it directly. Use MacroAssembler::decrementl() instead. | |
4926 // Use two-byte form (one-byte form is a REX prefix in 64-bit mode) | |
4927 int encode = prefix_and_encode(dst->encoding()); | |
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changeset
|
4928 emit_int8((unsigned char)0xFF); |
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8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
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diff
changeset
|
4929 emit_int8((unsigned char)(0xC8 | encode)); |
304 | 4930 } |
4931 | |
4932 void Assembler::decq(Register dst) { | |
4933 // Don't use it directly. Use MacroAssembler::decrementq() instead. | |
4934 // Use two-byte form (one-byte from is a REX prefix in 64-bit mode) | |
4935 int encode = prefixq_and_encode(dst->encoding()); | |
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changeset
|
4936 emit_int8((unsigned char)0xFF); |
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8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
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changeset
|
4937 emit_int8(0xC8 | encode); |
304 | 4938 } |
4939 | |
4940 void Assembler::decq(Address dst) { | |
4941 // Don't use it directly. Use MacroAssembler::decrementq() instead. | |
4942 InstructionMark im(this); | |
4943 prefixq(dst); | |
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changeset
|
4944 emit_int8((unsigned char)0xFF); |
304 | 4945 emit_operand(rcx, dst); |
4946 } | |
4947 | |
4948 void Assembler::fxrstor(Address src) { | |
4949 prefixq(src); | |
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8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
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changeset
|
4950 emit_int8(0x0F); |
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8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
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changeset
|
4951 emit_int8((unsigned char)0xAE); |
304 | 4952 emit_operand(as_Register(1), src); |
4953 } | |
4954 | |
4955 void Assembler::fxsave(Address dst) { | |
4956 prefixq(dst); | |
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changeset
|
4957 emit_int8(0x0F); |
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8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
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changeset
|
4958 emit_int8((unsigned char)0xAE); |
304 | 4959 emit_operand(as_Register(0), dst); |
4960 } | |
4961 | |
4962 void Assembler::idivq(Register src) { | |
4963 int encode = prefixq_and_encode(src->encoding()); | |
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changeset
|
4964 emit_int8((unsigned char)0xF7); |
d02120b7a34f
8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
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diff
changeset
|
4965 emit_int8((unsigned char)(0xF8 | encode)); |
304 | 4966 } |
4967 | |
4968 void Assembler::imulq(Register dst, Register src) { | |
4969 int encode = prefixq_and_encode(dst->encoding(), src->encoding()); | |
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changeset
|
4970 emit_int8(0x0F); |
d02120b7a34f
8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
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diff
changeset
|
4971 emit_int8((unsigned char)0xAF); |
d02120b7a34f
8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
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diff
changeset
|
4972 emit_int8((unsigned char)(0xC0 | encode)); |
304 | 4973 } |
4974 | |
4975 void Assembler::imulq(Register dst, Register src, int value) { | |
4976 int encode = prefixq_and_encode(dst->encoding(), src->encoding()); | |
4977 if (is8bit(value)) { | |
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changeset
|
4978 emit_int8(0x6B); |
d02120b7a34f
8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
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7427
diff
changeset
|
4979 emit_int8((unsigned char)(0xC0 | encode)); |
d02120b7a34f
8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
twisti
parents:
7427
diff
changeset
|
4980 emit_int8(value & 0xFF); |
304 | 4981 } else { |
7430
d02120b7a34f
8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
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diff
changeset
|
4982 emit_int8(0x69); |
d02120b7a34f
8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
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diff
changeset
|
4983 emit_int8((unsigned char)(0xC0 | encode)); |
7476
ffa87474d7a4
8004537: replace AbstractAssembler emit_long with emit_int32
twisti
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7475
diff
changeset
|
4984 emit_int32(value); |
304 | 4985 } |
4986 } | |
4987 | |
4988 void Assembler::incl(Register dst) { | |
4989 // Don't use it directly. Use MacroAssembler::incrementl() instead. | |
4990 // Use two-byte form (one-byte from is a REX prefix in 64-bit mode) | |
4991 int encode = prefix_and_encode(dst->encoding()); | |
7430
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changeset
|
4992 emit_int8((unsigned char)0xFF); |
d02120b7a34f
8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
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diff
changeset
|
4993 emit_int8((unsigned char)(0xC0 | encode)); |
304 | 4994 } |
4995 | |
4996 void Assembler::incq(Register dst) { | |
4997 // Don't use it directly. Use MacroAssembler::incrementq() instead. | |
4998 // Use two-byte form (one-byte from is a REX prefix in 64-bit mode) | |
4999 int encode = prefixq_and_encode(dst->encoding()); | |
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diff
changeset
|
5000 emit_int8((unsigned char)0xFF); |
d02120b7a34f
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diff
changeset
|
5001 emit_int8((unsigned char)(0xC0 | encode)); |
304 | 5002 } |
5003 | |
5004 void Assembler::incq(Address dst) { | |
5005 // Don't use it directly. Use MacroAssembler::incrementq() instead. | |
5006 InstructionMark im(this); | |
5007 prefixq(dst); | |
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changeset
|
5008 emit_int8((unsigned char)0xFF); |
304 | 5009 emit_operand(rax, dst); |
5010 } | |
5011 | |
5012 void Assembler::lea(Register dst, Address src) { | |
5013 leaq(dst, src); | |
5014 } | |
5015 | |
5016 void Assembler::leaq(Register dst, Address src) { | |
5017 InstructionMark im(this); | |
5018 prefixq(src, dst); | |
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diff
changeset
|
5019 emit_int8((unsigned char)0x8D); |
304 | 5020 emit_operand(dst, src); |
5021 } | |
5022 | |
5023 void Assembler::mov64(Register dst, int64_t imm64) { | |
5024 InstructionMark im(this); | |
5025 int encode = prefixq_and_encode(dst->encoding()); | |
7430
d02120b7a34f
8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
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diff
changeset
|
5026 emit_int8((unsigned char)(0xB8 | encode)); |
7198
6ab62ad83507
8003195: AbstractAssembler should not store code pointers but use the CodeSection directly
twisti
parents:
6894
diff
changeset
|
5027 emit_int64(imm64); |
304 | 5028 } |
5029 | |
5030 void Assembler::mov_literal64(Register dst, intptr_t imm64, RelocationHolder const& rspec) { | |
5031 InstructionMark im(this); | |
5032 int encode = prefixq_and_encode(dst->encoding()); | |
7430
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8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
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7427
diff
changeset
|
5033 emit_int8(0xB8 | encode); |
304 | 5034 emit_data64(imm64, rspec); |
5035 } | |
5036 | |
642
660978a2a31a
6791178: Specialize for zero as the compressed oop vm heap base
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changeset
|
5037 void Assembler::mov_narrow_oop(Register dst, int32_t imm32, RelocationHolder const& rspec) { |
660978a2a31a
6791178: Specialize for zero as the compressed oop vm heap base
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diff
changeset
|
5038 InstructionMark im(this); |
660978a2a31a
6791178: Specialize for zero as the compressed oop vm heap base
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diff
changeset
|
5039 int encode = prefix_and_encode(dst->encoding()); |
7430
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8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
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7427
diff
changeset
|
5040 emit_int8((unsigned char)(0xB8 | encode)); |
642
660978a2a31a
6791178: Specialize for zero as the compressed oop vm heap base
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parents:
624
diff
changeset
|
5041 emit_data((int)imm32, rspec, narrow_oop_operand); |
660978a2a31a
6791178: Specialize for zero as the compressed oop vm heap base
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624
diff
changeset
|
5042 } |
660978a2a31a
6791178: Specialize for zero as the compressed oop vm heap base
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624
diff
changeset
|
5043 |
660978a2a31a
6791178: Specialize for zero as the compressed oop vm heap base
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diff
changeset
|
5044 void Assembler::mov_narrow_oop(Address dst, int32_t imm32, RelocationHolder const& rspec) { |
660978a2a31a
6791178: Specialize for zero as the compressed oop vm heap base
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diff
changeset
|
5045 InstructionMark im(this); |
660978a2a31a
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diff
changeset
|
5046 prefix(dst); |
7430
d02120b7a34f
8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
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7427
diff
changeset
|
5047 emit_int8((unsigned char)0xC7); |
642
660978a2a31a
6791178: Specialize for zero as the compressed oop vm heap base
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624
diff
changeset
|
5048 emit_operand(rax, dst, 4); |
660978a2a31a
6791178: Specialize for zero as the compressed oop vm heap base
kvn
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diff
changeset
|
5049 emit_data((int)imm32, rspec, narrow_oop_operand); |
660978a2a31a
6791178: Specialize for zero as the compressed oop vm heap base
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624
diff
changeset
|
5050 } |
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624
diff
changeset
|
5051 |
660978a2a31a
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diff
changeset
|
5052 void Assembler::cmp_narrow_oop(Register src1, int32_t imm32, RelocationHolder const& rspec) { |
660978a2a31a
6791178: Specialize for zero as the compressed oop vm heap base
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diff
changeset
|
5053 InstructionMark im(this); |
660978a2a31a
6791178: Specialize for zero as the compressed oop vm heap base
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diff
changeset
|
5054 int encode = prefix_and_encode(src1->encoding()); |
7430
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7427
diff
changeset
|
5055 emit_int8((unsigned char)0x81); |
d02120b7a34f
8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
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7427
diff
changeset
|
5056 emit_int8((unsigned char)(0xF8 | encode)); |
642
660978a2a31a
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624
diff
changeset
|
5057 emit_data((int)imm32, rspec, narrow_oop_operand); |
660978a2a31a
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diff
changeset
|
5058 } |
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diff
changeset
|
5059 |
660978a2a31a
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diff
changeset
|
5060 void Assembler::cmp_narrow_oop(Address src1, int32_t imm32, RelocationHolder const& rspec) { |
660978a2a31a
6791178: Specialize for zero as the compressed oop vm heap base
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diff
changeset
|
5061 InstructionMark im(this); |
660978a2a31a
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diff
changeset
|
5062 prefix(src1); |
7430
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diff
changeset
|
5063 emit_int8((unsigned char)0x81); |
642
660978a2a31a
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diff
changeset
|
5064 emit_operand(rax, src1, 4); |
660978a2a31a
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diff
changeset
|
5065 emit_data((int)imm32, rspec, narrow_oop_operand); |
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diff
changeset
|
5066 } |
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diff
changeset
|
5067 |
775
93c14e5562c4
6823354: Add intrinsics for {Integer,Long}.{numberOfLeadingZeros,numberOfTrailingZeros}()
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710
diff
changeset
|
5068 void Assembler::lzcntq(Register dst, Register src) { |
93c14e5562c4
6823354: Add intrinsics for {Integer,Long}.{numberOfLeadingZeros,numberOfTrailingZeros}()
twisti
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710
diff
changeset
|
5069 assert(VM_Version::supports_lzcnt(), "encoding is treated as BSR"); |
7430
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7427
diff
changeset
|
5070 emit_int8((unsigned char)0xF3); |
775
93c14e5562c4
6823354: Add intrinsics for {Integer,Long}.{numberOfLeadingZeros,numberOfTrailingZeros}()
twisti
parents:
710
diff
changeset
|
5071 int encode = prefixq_and_encode(dst->encoding(), src->encoding()); |
7430
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diff
changeset
|
5072 emit_int8(0x0F); |
d02120b7a34f
8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
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7427
diff
changeset
|
5073 emit_int8((unsigned char)0xBD); |
d02120b7a34f
8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
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7427
diff
changeset
|
5074 emit_int8((unsigned char)(0xC0 | encode)); |
775
93c14e5562c4
6823354: Add intrinsics for {Integer,Long}.{numberOfLeadingZeros,numberOfTrailingZeros}()
twisti
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710
diff
changeset
|
5075 } |
93c14e5562c4
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twisti
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710
diff
changeset
|
5076 |
304 | 5077 void Assembler::movdq(XMMRegister dst, Register src) { |
5078 // table D-1 says MMX/SSE2 | |
4759 | 5079 NOT_LP64(assert(VM_Version::supports_sse2(), "")); |
5080 int encode = simd_prefix_and_encode_q(dst, src, VEX_SIMD_66); | |
7430
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7427
diff
changeset
|
5081 emit_int8(0x6E); |
d02120b7a34f
8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
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7427
diff
changeset
|
5082 emit_int8((unsigned char)(0xC0 | encode)); |
304 | 5083 } |
5084 | |
5085 void Assembler::movdq(Register dst, XMMRegister src) { | |
5086 // table D-1 says MMX/SSE2 | |
4759 | 5087 NOT_LP64(assert(VM_Version::supports_sse2(), "")); |
304 | 5088 // swap src/dst to get correct prefix |
4759 | 5089 int encode = simd_prefix_and_encode_q(src, dst, VEX_SIMD_66); |
7430
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7427
diff
changeset
|
5090 emit_int8(0x7E); |
d02120b7a34f
8004250: replace AbstractAssembler a_byte/a_long with emit_int8/emit_int32
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7427
diff
changeset
|
5091 emit_int8((unsigned char)(0xC0 | encode)); |
304 | 5092 } |
5093 | |
5094 void Assembler::movq(Register dst, Register src) { | |
5095 int encode = prefixq_and_encode(dst->encoding(), src->encoding()); | |
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5096 emit_int8((unsigned char)0x8B); |
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5097 emit_int8((unsigned char)(0xC0 | encode)); |
304 | 5098 } |
5099 | |
5100 void Assembler::movq(Register dst, Address src) { | |
5101 InstructionMark im(this); | |
5102 prefixq(src, dst); | |
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5103 emit_int8((unsigned char)0x8B); |
304 | 5104 emit_operand(dst, src); |
5105 } | |
5106 | |
5107 void Assembler::movq(Address dst, Register src) { | |
5108 InstructionMark im(this); | |
5109 prefixq(dst, src); | |
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|
5110 emit_int8((unsigned char)0x89); |
304 | 5111 emit_operand(src, dst); |
5112 } | |
5113 | |
624 | 5114 void Assembler::movsbq(Register dst, Address src) { |
5115 InstructionMark im(this); | |
5116 prefixq(src, dst); | |
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|
5117 emit_int8(0x0F); |
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5118 emit_int8((unsigned char)0xBE); |
624 | 5119 emit_operand(dst, src); |
5120 } | |
5121 | |
5122 void Assembler::movsbq(Register dst, Register src) { | |
5123 int encode = prefixq_and_encode(dst->encoding(), src->encoding()); | |
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5124 emit_int8(0x0F); |
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|
5125 emit_int8((unsigned char)0xBE); |
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5126 emit_int8((unsigned char)(0xC0 | encode)); |
624 | 5127 } |
5128 | |
304 | 5129 void Assembler::movslq(Register dst, int32_t imm32) { |
5130 // dbx shows movslq(rcx, 3) as movq $0x0000000049000000,(%rbx) | |
5131 // and movslq(r8, 3); as movl $0x0000000048000000,(%rbx) | |
5132 // as a result we shouldn't use until tested at runtime... | |
5133 ShouldNotReachHere(); | |
5134 InstructionMark im(this); | |
5135 int encode = prefixq_and_encode(dst->encoding()); | |
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5136 emit_int8((unsigned char)(0xC7 | encode)); |
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5137 emit_int32(imm32); |
304 | 5138 } |
5139 | |
5140 void Assembler::movslq(Address dst, int32_t imm32) { | |
5141 assert(is_simm32(imm32), "lost bits"); | |
5142 InstructionMark im(this); | |
5143 prefixq(dst); | |
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5144 emit_int8((unsigned char)0xC7); |
304 | 5145 emit_operand(rax, dst, 4); |
7476
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5146 emit_int32(imm32); |
304 | 5147 } |
5148 | |
5149 void Assembler::movslq(Register dst, Address src) { | |
5150 InstructionMark im(this); | |
5151 prefixq(src, dst); | |
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5152 emit_int8(0x63); |
304 | 5153 emit_operand(dst, src); |
5154 } | |
5155 | |
5156 void Assembler::movslq(Register dst, Register src) { | |
5157 int encode = prefixq_and_encode(dst->encoding(), src->encoding()); | |
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|
5158 emit_int8(0x63); |
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5159 emit_int8((unsigned char)(0xC0 | encode)); |
304 | 5160 } |
5161 | |
624 | 5162 void Assembler::movswq(Register dst, Address src) { |
5163 InstructionMark im(this); | |
5164 prefixq(src, dst); | |
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|
5165 emit_int8(0x0F); |
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5166 emit_int8((unsigned char)0xBF); |
624 | 5167 emit_operand(dst, src); |
5168 } | |
5169 | |
5170 void Assembler::movswq(Register dst, Register src) { | |
5171 int encode = prefixq_and_encode(dst->encoding(), src->encoding()); | |
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|
5172 emit_int8((unsigned char)0x0F); |
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|
5173 emit_int8((unsigned char)0xBF); |
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|
5174 emit_int8((unsigned char)(0xC0 | encode)); |
624 | 5175 } |
5176 | |
5177 void Assembler::movzbq(Register dst, Address src) { | |
5178 InstructionMark im(this); | |
5179 prefixq(src, dst); | |
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|
5180 emit_int8((unsigned char)0x0F); |
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|
5181 emit_int8((unsigned char)0xB6); |
624 | 5182 emit_operand(dst, src); |
5183 } | |
5184 | |
5185 void Assembler::movzbq(Register dst, Register src) { | |
5186 int encode = prefixq_and_encode(dst->encoding(), src->encoding()); | |
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|
5187 emit_int8(0x0F); |
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|
5188 emit_int8((unsigned char)0xB6); |
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|
5189 emit_int8(0xC0 | encode); |
624 | 5190 } |
5191 | |
5192 void Assembler::movzwq(Register dst, Address src) { | |
5193 InstructionMark im(this); | |
5194 prefixq(src, dst); | |
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|
5195 emit_int8((unsigned char)0x0F); |
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|
5196 emit_int8((unsigned char)0xB7); |
624 | 5197 emit_operand(dst, src); |
5198 } | |
5199 | |
5200 void Assembler::movzwq(Register dst, Register src) { | |
5201 int encode = prefixq_and_encode(dst->encoding(), src->encoding()); | |
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|
5202 emit_int8((unsigned char)0x0F); |
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changeset
|
5203 emit_int8((unsigned char)0xB7); |
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5204 emit_int8((unsigned char)(0xC0 | encode)); |
624 | 5205 } |
5206 | |
304 | 5207 void Assembler::negq(Register dst) { |
5208 int encode = prefixq_and_encode(dst->encoding()); | |
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|
5209 emit_int8((unsigned char)0xF7); |
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changeset
|
5210 emit_int8((unsigned char)(0xD8 | encode)); |
304 | 5211 } |
5212 | |
5213 void Assembler::notq(Register dst) { | |
5214 int encode = prefixq_and_encode(dst->encoding()); | |
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|
5215 emit_int8((unsigned char)0xF7); |
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changeset
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5216 emit_int8((unsigned char)(0xD0 | encode)); |
304 | 5217 } |
5218 | |
5219 void Assembler::orq(Address dst, int32_t imm32) { | |
5220 InstructionMark im(this); | |
5221 prefixq(dst); | |
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|
5222 emit_int8((unsigned char)0x81); |
304 | 5223 emit_operand(rcx, dst, 4); |
7476
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5224 emit_int32(imm32); |
304 | 5225 } |
5226 | |
5227 void Assembler::orq(Register dst, int32_t imm32) { | |
5228 (void) prefixq_and_encode(dst->encoding()); | |
5229 emit_arith(0x81, 0xC8, dst, imm32); | |
5230 } | |
5231 | |
5232 void Assembler::orq(Register dst, Address src) { | |
5233 InstructionMark im(this); | |
5234 prefixq(src, dst); | |
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|
5235 emit_int8(0x0B); |
304 | 5236 emit_operand(dst, src); |
5237 } | |
5238 | |
5239 void Assembler::orq(Register dst, Register src) { | |
5240 (void) prefixq_and_encode(dst->encoding(), src->encoding()); | |
5241 emit_arith(0x0B, 0xC0, dst, src); | |
5242 } | |
5243 | |
5244 void Assembler::popa() { // 64bit | |
5245 movq(r15, Address(rsp, 0)); | |
5246 movq(r14, Address(rsp, wordSize)); | |
5247 movq(r13, Address(rsp, 2 * wordSize)); | |
5248 movq(r12, Address(rsp, 3 * wordSize)); | |
5249 movq(r11, Address(rsp, 4 * wordSize)); | |
5250 movq(r10, Address(rsp, 5 * wordSize)); | |
5251 movq(r9, Address(rsp, 6 * wordSize)); | |
5252 movq(r8, Address(rsp, 7 * wordSize)); | |
5253 movq(rdi, Address(rsp, 8 * wordSize)); | |
5254 movq(rsi, Address(rsp, 9 * wordSize)); | |
5255 movq(rbp, Address(rsp, 10 * wordSize)); | |
5256 // skip rsp | |
5257 movq(rbx, Address(rsp, 12 * wordSize)); | |
5258 movq(rdx, Address(rsp, 13 * wordSize)); | |
5259 movq(rcx, Address(rsp, 14 * wordSize)); | |
5260 movq(rax, Address(rsp, 15 * wordSize)); | |
5261 | |
5262 addq(rsp, 16 * wordSize); | |
5263 } | |
5264 | |
643
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6378821: bitCount() should use POPC on SPARC processors and AMD+10h
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5265 void Assembler::popcntq(Register dst, Address src) { |
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6378821: bitCount() should use POPC on SPARC processors and AMD+10h
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changeset
|
5266 assert(VM_Version::supports_popcnt(), "must support"); |
c771b7f43bbf
6378821: bitCount() should use POPC on SPARC processors and AMD+10h
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changeset
|
5267 InstructionMark im(this); |
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|
5268 emit_int8((unsigned char)0xF3); |
643
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changeset
|
5269 prefixq(src, dst); |
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|
5270 emit_int8((unsigned char)0x0F); |
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|
5271 emit_int8((unsigned char)0xB8); |
643
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changeset
|
5272 emit_operand(dst, src); |
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changeset
|
5273 } |
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changeset
|
5274 |
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6378821: bitCount() should use POPC on SPARC processors and AMD+10h
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|
5275 void Assembler::popcntq(Register dst, Register src) { |
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6378821: bitCount() should use POPC on SPARC processors and AMD+10h
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changeset
|
5276 assert(VM_Version::supports_popcnt(), "must support"); |
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changeset
|
5277 emit_int8((unsigned char)0xF3); |
643
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changeset
|
5278 int encode = prefixq_and_encode(dst->encoding(), src->encoding()); |
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|
5279 emit_int8((unsigned char)0x0F); |
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changeset
|
5280 emit_int8((unsigned char)0xB8); |
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|
5281 emit_int8((unsigned char)(0xC0 | encode)); |
643
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|
5282 } |
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|
5283 |
304 | 5284 void Assembler::popq(Address dst) { |
5285 InstructionMark im(this); | |
5286 prefixq(dst); | |
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|
5287 emit_int8((unsigned char)0x8F); |
304 | 5288 emit_operand(rax, dst); |
5289 } | |
5290 | |
5291 void Assembler::pusha() { // 64bit | |
5292 // we have to store original rsp. ABI says that 128 bytes | |
5293 // below rsp are local scratch. | |
5294 movq(Address(rsp, -5 * wordSize), rsp); | |
5295 | |
5296 subq(rsp, 16 * wordSize); | |
5297 | |
5298 movq(Address(rsp, 15 * wordSize), rax); | |
5299 movq(Address(rsp, 14 * wordSize), rcx); | |
5300 movq(Address(rsp, 13 * wordSize), rdx); | |
5301 movq(Address(rsp, 12 * wordSize), rbx); | |
5302 // skip rsp | |
5303 movq(Address(rsp, 10 * wordSize), rbp); | |
5304 movq(Address(rsp, 9 * wordSize), rsi); | |
5305 movq(Address(rsp, 8 * wordSize), rdi); | |
5306 movq(Address(rsp, 7 * wordSize), r8); | |
5307 movq(Address(rsp, 6 * wordSize), r9); | |
5308 movq(Address(rsp, 5 * wordSize), r10); | |
5309 movq(Address(rsp, 4 * wordSize), r11); | |
5310 movq(Address(rsp, 3 * wordSize), r12); | |
5311 movq(Address(rsp, 2 * wordSize), r13); | |
5312 movq(Address(rsp, wordSize), r14); | |
5313 movq(Address(rsp, 0), r15); | |
5314 } | |
5315 | |
5316 void Assembler::pushq(Address src) { | |
5317 InstructionMark im(this); | |
5318 prefixq(src); | |
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|
5319 emit_int8((unsigned char)0xFF); |
304 | 5320 emit_operand(rsi, src); |
5321 } | |
5322 | |
5323 void Assembler::rclq(Register dst, int imm8) { | |
5324 assert(isShiftCount(imm8 >> 1), "illegal shift count"); | |
5325 int encode = prefixq_and_encode(dst->encoding()); | |
5326 if (imm8 == 1) { | |
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|
5327 emit_int8((unsigned char)0xD1); |
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|
5328 emit_int8((unsigned char)(0xD0 | encode)); |
304 | 5329 } else { |
7430
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changeset
|
5330 emit_int8((unsigned char)0xC1); |
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changeset
|
5331 emit_int8((unsigned char)(0xD0 | encode)); |
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changeset
|
5332 emit_int8(imm8); |
304 | 5333 } |
5334 } | |
5335 void Assembler::sarq(Register dst, int imm8) { | |
5336 assert(isShiftCount(imm8 >> 1), "illegal shift count"); | |
5337 int encode = prefixq_and_encode(dst->encoding()); | |
5338 if (imm8 == 1) { | |
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|
5339 emit_int8((unsigned char)0xD1); |
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changeset
|
5340 emit_int8((unsigned char)(0xF8 | encode)); |
304 | 5341 } else { |
7430
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changeset
|
5342 emit_int8((unsigned char)0xC1); |
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changeset
|
5343 emit_int8((unsigned char)(0xF8 | encode)); |
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changeset
|
5344 emit_int8(imm8); |
304 | 5345 } |
5346 } | |
5347 | |
5348 void Assembler::sarq(Register dst) { | |
5349 int encode = prefixq_and_encode(dst->encoding()); | |
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5350 emit_int8((unsigned char)0xD3); |
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5351 emit_int8((unsigned char)(0xF8 | encode)); |
304 | 5352 } |
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5353 |
304 | 5354 void Assembler::sbbq(Address dst, int32_t imm32) { |
5355 InstructionMark im(this); | |
5356 prefixq(dst); | |
5357 emit_arith_operand(0x81, rbx, dst, imm32); | |
5358 } | |
5359 | |
5360 void Assembler::sbbq(Register dst, int32_t imm32) { | |
5361 (void) prefixq_and_encode(dst->encoding()); | |
5362 emit_arith(0x81, 0xD8, dst, imm32); | |
5363 } | |
5364 | |
5365 void Assembler::sbbq(Register dst, Address src) { | |
5366 InstructionMark im(this); | |
5367 prefixq(src, dst); | |
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5368 emit_int8(0x1B); |
304 | 5369 emit_operand(dst, src); |
5370 } | |
5371 | |
5372 void Assembler::sbbq(Register dst, Register src) { | |
5373 (void) prefixq_and_encode(dst->encoding(), src->encoding()); | |
5374 emit_arith(0x1B, 0xC0, dst, src); | |
5375 } | |
5376 | |
5377 void Assembler::shlq(Register dst, int imm8) { | |
5378 assert(isShiftCount(imm8 >> 1), "illegal shift count"); | |
5379 int encode = prefixq_and_encode(dst->encoding()); | |
5380 if (imm8 == 1) { | |
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5381 emit_int8((unsigned char)0xD1); |
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5382 emit_int8((unsigned char)(0xE0 | encode)); |
304 | 5383 } else { |
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5384 emit_int8((unsigned char)0xC1); |
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5385 emit_int8((unsigned char)(0xE0 | encode)); |
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5386 emit_int8(imm8); |
304 | 5387 } |
5388 } | |
5389 | |
5390 void Assembler::shlq(Register dst) { | |
5391 int encode = prefixq_and_encode(dst->encoding()); | |
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5392 emit_int8((unsigned char)0xD3); |
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5393 emit_int8((unsigned char)(0xE0 | encode)); |
304 | 5394 } |
5395 | |
5396 void Assembler::shrq(Register dst, int imm8) { | |
5397 assert(isShiftCount(imm8 >> 1), "illegal shift count"); | |
5398 int encode = prefixq_and_encode(dst->encoding()); | |
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5399 emit_int8((unsigned char)0xC1); |
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5400 emit_int8((unsigned char)(0xE8 | encode)); |
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5401 emit_int8(imm8); |
304 | 5402 } |
5403 | |
5404 void Assembler::shrq(Register dst) { | |
5405 int encode = prefixq_and_encode(dst->encoding()); | |
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5406 emit_int8((unsigned char)0xD3); |
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5407 emit_int8(0xE8 | encode); |
304 | 5408 } |
5409 | |
5410 void Assembler::subq(Address dst, int32_t imm32) { | |
5411 InstructionMark im(this); | |
5412 prefixq(dst); | |
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5413 emit_arith_operand(0x81, rbp, dst, imm32); |
304 | 5414 } |
5415 | |
5416 void Assembler::subq(Address dst, Register src) { | |
5417 InstructionMark im(this); | |
5418 prefixq(dst, src); | |
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5419 emit_int8(0x29); |
304 | 5420 emit_operand(src, dst); |
5421 } | |
5422 | |
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5423 void Assembler::subq(Register dst, int32_t imm32) { |
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5424 (void) prefixq_and_encode(dst->encoding()); |
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5425 emit_arith(0x81, 0xE8, dst, imm32); |
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5426 } |
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5427 |
4947
fd8114661503
7125136: SIGILL on linux amd64 in gc/ArrayJuggle/Juggle29
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5428 // Force generation of a 4 byte immediate value even if it fits into 8bit |
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5429 void Assembler::subq_imm32(Register dst, int32_t imm32) { |
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5430 (void) prefixq_and_encode(dst->encoding()); |
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5431 emit_arith_imm32(0x81, 0xE8, dst, imm32); |
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5432 } |
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5433 |
304 | 5434 void Assembler::subq(Register dst, Address src) { |
5435 InstructionMark im(this); | |
5436 prefixq(src, dst); | |
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5437 emit_int8(0x2B); |
304 | 5438 emit_operand(dst, src); |
5439 } | |
5440 | |
5441 void Assembler::subq(Register dst, Register src) { | |
5442 (void) prefixq_and_encode(dst->encoding(), src->encoding()); | |
5443 emit_arith(0x2B, 0xC0, dst, src); | |
5444 } | |
5445 | |
5446 void Assembler::testq(Register dst, int32_t imm32) { | |
5447 // not using emit_arith because test | |
5448 // doesn't support sign-extension of | |
5449 // 8bit operands | |
5450 int encode = dst->encoding(); | |
5451 if (encode == 0) { | |
5452 prefix(REX_W); | |
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5453 emit_int8((unsigned char)0xA9); |
304 | 5454 } else { |
5455 encode = prefixq_and_encode(encode); | |
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5456 emit_int8((unsigned char)0xF7); |
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5457 emit_int8((unsigned char)(0xC0 | encode)); |
304 | 5458 } |
7476
ffa87474d7a4
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7475
diff
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5459 emit_int32(imm32); |
304 | 5460 } |
5461 | |
5462 void Assembler::testq(Register dst, Register src) { | |
5463 (void) prefixq_and_encode(dst->encoding(), src->encoding()); | |
5464 emit_arith(0x85, 0xC0, dst, src); | |
5465 } | |
5466 | |
5467 void Assembler::xaddq(Address dst, Register src) { | |
5468 InstructionMark im(this); | |
5469 prefixq(dst, src); | |
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5470 emit_int8(0x0F); |
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|
5471 emit_int8((unsigned char)0xC1); |
304 | 5472 emit_operand(src, dst); |
5473 } | |
5474 | |
5475 void Assembler::xchgq(Register dst, Address src) { | |
5476 InstructionMark im(this); | |
5477 prefixq(src, dst); | |
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5478 emit_int8((unsigned char)0x87); |
304 | 5479 emit_operand(dst, src); |
5480 } | |
5481 | |
5482 void Assembler::xchgq(Register dst, Register src) { | |
5483 int encode = prefixq_and_encode(dst->encoding(), src->encoding()); | |
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|
5484 emit_int8((unsigned char)0x87); |
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|
5485 emit_int8((unsigned char)(0xc0 | encode)); |
304 | 5486 } |
5487 | |
5488 void Assembler::xorq(Register dst, Register src) { | |
5489 (void) prefixq_and_encode(dst->encoding(), src->encoding()); | |
5490 emit_arith(0x33, 0xC0, dst, src); | |
5491 } | |
5492 | |
5493 void Assembler::xorq(Register dst, Address src) { | |
5494 InstructionMark im(this); | |
5495 prefixq(src, dst); | |
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|
5496 emit_int8(0x33); |
304 | 5497 emit_operand(dst, src); |
5498 } | |
5499 | |
5500 #endif // !LP64 |