annotate src/share/vm/opto/gcm.cpp @ 12023:d1034bd8cefc

8022284: Hide internal data structure in PhaseCFG Summary: Hide private node to block mapping using public interface Reviewed-by: kvn, roland
author adlertz
date Wed, 07 Aug 2013 17:56:19 +0200
parents 571076d3c79d
children adb9a7d94cb5
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1 /*
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2 * Copyright (c) 1997, 2012, Oracle and/or its affiliates. All rights reserved.
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3 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
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4 *
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5 * This code is free software; you can redistribute it and/or modify it
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6 * under the terms of the GNU General Public License version 2 only, as
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7 * published by the Free Software Foundation.
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8 *
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9 * This code is distributed in the hope that it will be useful, but WITHOUT
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10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
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12 * version 2 for more details (a copy is included in the LICENSE file that
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13 * accompanied this code).
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14 *
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15 * You should have received a copy of the GNU General Public License version
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16 * 2 along with this work; if not, write to the Free Software Foundation,
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17 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
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18 *
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19 * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
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20 * or visit www.oracle.com if you need additional information or have any
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21 * questions.
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22 *
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23 */
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24
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25 #include "precompiled.hpp"
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26 #include "libadt/vectset.hpp"
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27 #include "memory/allocation.inline.hpp"
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28 #include "opto/block.hpp"
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29 #include "opto/c2compiler.hpp"
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30 #include "opto/callnode.hpp"
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31 #include "opto/cfgnode.hpp"
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32 #include "opto/machnode.hpp"
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33 #include "opto/opcodes.hpp"
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34 #include "opto/phaseX.hpp"
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35 #include "opto/rootnode.hpp"
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36 #include "opto/runtime.hpp"
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37 #include "runtime/deoptimization.hpp"
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38 #ifdef TARGET_ARCH_MODEL_x86_32
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39 # include "adfiles/ad_x86_32.hpp"
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40 #endif
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41 #ifdef TARGET_ARCH_MODEL_x86_64
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42 # include "adfiles/ad_x86_64.hpp"
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43 #endif
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44 #ifdef TARGET_ARCH_MODEL_sparc
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45 # include "adfiles/ad_sparc.hpp"
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46 #endif
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47 #ifdef TARGET_ARCH_MODEL_zero
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48 # include "adfiles/ad_zero.hpp"
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49 #endif
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50 #ifdef TARGET_ARCH_MODEL_arm
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51 # include "adfiles/ad_arm.hpp"
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52 #endif
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53 #ifdef TARGET_ARCH_MODEL_ppc
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54 # include "adfiles/ad_ppc.hpp"
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55 #endif
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56
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57 // Portions of code courtesy of Clifford Click
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58
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59 // Optimization - Graph Style
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60
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61 // To avoid float value underflow
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62 #define MIN_BLOCK_FREQUENCY 1.e-35f
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63
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64 //----------------------------schedule_node_into_block-------------------------
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65 // Insert node n into block b. Look for projections of n and make sure they
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66 // are in b also.
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67 void PhaseCFG::schedule_node_into_block( Node *n, Block *b ) {
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68 // Set basic block of n, Add n to b,
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69 map_node_to_block(n, b);
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70 b->add_inst(n);
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71
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72 // After Matching, nearly any old Node may have projections trailing it.
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73 // These are usually machine-dependent flags. In any case, they might
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74 // float to another block below this one. Move them up.
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75 for (DUIterator_Fast imax, i = n->fast_outs(imax); i < imax; i++) {
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76 Node* use = n->fast_out(i);
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77 if (use->is_Proj()) {
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78 Block* buse = get_block_for_node(use);
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79 if (buse != b) { // In wrong block?
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80 if (buse != NULL) {
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81 buse->find_remove(use); // Remove from wrong block
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82 }
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83 map_node_to_block(use, b);
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84 b->add_inst(use);
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85 }
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86 }
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87 }
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88 }
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89
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90 //----------------------------replace_block_proj_ctrl-------------------------
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91 // Nodes that have is_block_proj() nodes as their control need to use
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92 // the appropriate Region for their actual block as their control since
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93 // the projection will be in a predecessor block.
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94 void PhaseCFG::replace_block_proj_ctrl( Node *n ) {
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95 const Node *in0 = n->in(0);
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96 assert(in0 != NULL, "Only control-dependent");
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97 const Node *p = in0->is_block_proj();
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98 if (p != NULL && p != n) { // Control from a block projection?
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99 assert(!n->pinned() || n->is_MachConstantBase(), "only pinned MachConstantBase node is expected here");
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100 // Find trailing Region
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101 Block *pb = get_block_for_node(in0); // Block-projection already has basic block
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102 uint j = 0;
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103 if (pb->_num_succs != 1) { // More then 1 successor?
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104 // Search for successor
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105 uint max = pb->_nodes.size();
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106 assert( max > 1, "" );
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107 uint start = max - pb->_num_succs;
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108 // Find which output path belongs to projection
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109 for (j = start; j < max; j++) {
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110 if( pb->_nodes[j] == in0 )
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111 break;
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112 }
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113 assert( j < max, "must find" );
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114 // Change control to match head of successor basic block
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115 j -= start;
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116 }
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117 n->set_req(0, pb->_succs[j]->head());
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118 }
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119 }
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120
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122 //------------------------------schedule_pinned_nodes--------------------------
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123 // Set the basic block for Nodes pinned into blocks
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124 void PhaseCFG::schedule_pinned_nodes( VectorSet &visited ) {
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125 // Allocate node stack of size C->unique()+8 to avoid frequent realloc
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126 GrowableArray <Node *> spstack(C->unique()+8);
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127 spstack.push(_root);
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128 while ( spstack.is_nonempty() ) {
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129 Node *n = spstack.pop();
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130 if( !visited.test_set(n->_idx) ) { // Test node and flag it as visited
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131 if( n->pinned() && !has_block(n)) { // Pinned? Nail it down!
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132 assert( n->in(0), "pinned Node must have Control" );
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133 // Before setting block replace block_proj control edge
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134 replace_block_proj_ctrl(n);
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135 Node *input = n->in(0);
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136 while (!input->is_block_start()) {
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137 input = input->in(0);
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138 }
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139 Block *b = get_block_for_node(input); // Basic block of controlling input
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140 schedule_node_into_block(n, b);
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141 }
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142 for( int i = n->req() - 1; i >= 0; --i ) { // For all inputs
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143 if( n->in(i) != NULL )
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144 spstack.push(n->in(i));
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145 }
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146 }
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147 }
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148 }
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149
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150 #ifdef ASSERT
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151 // Assert that new input b2 is dominated by all previous inputs.
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152 // Check this by by seeing that it is dominated by b1, the deepest
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153 // input observed until b2.
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154 static void assert_dom(Block* b1, Block* b2, Node* n, const PhaseCFG* cfg) {
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155 if (b1 == NULL) return;
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156 assert(b1->_dom_depth < b2->_dom_depth, "sanity");
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157 Block* tmp = b2;
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158 while (tmp != b1 && tmp != NULL) {
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159 tmp = tmp->_idom;
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160 }
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161 if (tmp != b1) {
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162 // Detected an unschedulable graph. Print some nice stuff and die.
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163 tty->print_cr("!!! Unschedulable graph !!!");
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164 for (uint j=0; j<n->len(); j++) { // For all inputs
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165 Node* inn = n->in(j); // Get input
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166 if (inn == NULL) continue; // Ignore NULL, missing inputs
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167 Block* inb = cfg->get_block_for_node(inn);
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168 tty->print("B%d idom=B%d depth=%2d ",inb->_pre_order,
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169 inb->_idom ? inb->_idom->_pre_order : 0, inb->_dom_depth);
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170 inn->dump();
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171 }
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172 tty->print("Failing node: ");
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173 n->dump();
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174 assert(false, "unscheduable graph");
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175 }
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176 }
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177 #endif
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178
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179 static Block* find_deepest_input(Node* n, const PhaseCFG* cfg) {
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180 // Find the last input dominated by all other inputs.
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181 Block* deepb = NULL; // Deepest block so far
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182 int deepb_dom_depth = 0;
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183 for (uint k = 0; k < n->len(); k++) { // For all inputs
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184 Node* inn = n->in(k); // Get input
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185 if (inn == NULL) continue; // Ignore NULL, missing inputs
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186 Block* inb = cfg->get_block_for_node(inn);
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187 assert(inb != NULL, "must already have scheduled this input");
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188 if (deepb_dom_depth < (int) inb->_dom_depth) {
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189 // The new inb must be dominated by the previous deepb.
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190 // The various inputs must be linearly ordered in the dom
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191 // tree, or else there will not be a unique deepest block.
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192 DEBUG_ONLY(assert_dom(deepb, inb, n, cfg));
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193 deepb = inb; // Save deepest block
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194 deepb_dom_depth = deepb->_dom_depth;
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195 }
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196 }
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197 assert(deepb != NULL, "must be at least one input to n");
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198 return deepb;
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199 }
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200
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201
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202 //------------------------------schedule_early---------------------------------
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203 // Find the earliest Block any instruction can be placed in. Some instructions
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204 // are pinned into Blocks. Unpinned instructions can appear in last block in
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205 // which all their inputs occur.
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206 bool PhaseCFG::schedule_early(VectorSet &visited, Node_List &roots) {
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207 // Allocate stack with enough space to avoid frequent realloc
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208 Node_Stack nstack(roots.Size() + 8); // (unique >> 1) + 24 from Java2D stats
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209 // roots.push(_root); _root will be processed among C->top() inputs
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210 roots.push(C->top());
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211 visited.set(C->top()->_idx);
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212
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213 while (roots.size() != 0) {
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214 // Use local variables nstack_top_n & nstack_top_i to cache values
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215 // on stack's top.
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216 Node *nstack_top_n = roots.pop();
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217 uint nstack_top_i = 0;
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218 //while_nstack_nonempty:
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219 while (true) {
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220 // Get parent node and next input's index from stack's top.
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221 Node *n = nstack_top_n;
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222 uint i = nstack_top_i;
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223
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224 if (i == 0) {
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225 // Fixup some control. Constants without control get attached
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226 // to root and nodes that use is_block_proj() nodes should be attached
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227 // to the region that starts their block.
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228 const Node *in0 = n->in(0);
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229 if (in0 != NULL) { // Control-dependent?
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230 replace_block_proj_ctrl(n);
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231 } else { // n->in(0) == NULL
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232 if (n->req() == 1) { // This guy is a constant with NO inputs?
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233 n->set_req(0, _root);
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234 }
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235 }
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236 }
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237
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238 // First, visit all inputs and force them to get a block. If an
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239 // input is already in a block we quit following inputs (to avoid
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240 // cycles). Instead we put that Node on a worklist to be handled
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241 // later (since IT'S inputs may not have a block yet).
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242 bool done = true; // Assume all n's inputs will be processed
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243 while (i < n->len()) { // For all inputs
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244 Node *in = n->in(i); // Get input
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245 ++i;
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246 if (in == NULL) continue; // Ignore NULL, missing inputs
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247 int is_visited = visited.test_set(in->_idx);
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248 if (!has_block(in)) { // Missing block selection?
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249 if (is_visited) {
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250 // assert( !visited.test(in->_idx), "did not schedule early" );
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251 return false;
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252 }
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253 nstack.push(n, i); // Save parent node and next input's index.
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254 nstack_top_n = in; // Process current input now.
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255 nstack_top_i = 0;
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256 done = false; // Not all n's inputs processed.
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257 break; // continue while_nstack_nonempty;
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258 } else if (!is_visited) { // Input not yet visited?
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259 roots.push(in); // Visit this guy later, using worklist
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260 }
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261 }
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262 if (done) {
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263 // All of n's inputs have been processed, complete post-processing.
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264
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265 // Some instructions are pinned into a block. These include Region,
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266 // Phi, Start, Return, and other control-dependent instructions and
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267 // any projections which depend on them.
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268 if (!n->pinned()) {
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269 // Set earliest legal block.
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270 map_node_to_block(n, find_deepest_input(n, this));
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271 } else {
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272 assert(get_block_for_node(n) == get_block_for_node(n->in(0)), "Pinned Node should be at the same block as its control edge");
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273 }
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274
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275 if (nstack.is_empty()) {
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276 // Finished all nodes on stack.
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277 // Process next node on the worklist 'roots'.
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278 break;
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279 }
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280 // Get saved parent node and next input's index.
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281 nstack_top_n = nstack.node();
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282 nstack_top_i = nstack.index();
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283 nstack.pop();
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284 } // if (done)
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285 } // while (true)
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286 } // while (roots.size() != 0)
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287 return true;
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288 }
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289
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290 //------------------------------dom_lca----------------------------------------
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291 // Find least common ancestor in dominator tree
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292 // LCA is a current notion of LCA, to be raised above 'this'.
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293 // As a convenient boundary condition, return 'this' if LCA is NULL.
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294 // Find the LCA of those two nodes.
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295 Block* Block::dom_lca(Block* LCA) {
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296 if (LCA == NULL || LCA == this) return this;
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297
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298 Block* anc = this;
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299 while (anc->_dom_depth > LCA->_dom_depth)
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300 anc = anc->_idom; // Walk up till anc is as high as LCA
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301
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302 while (LCA->_dom_depth > anc->_dom_depth)
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303 LCA = LCA->_idom; // Walk up till LCA is as high as anc
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304
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305 while (LCA != anc) { // Walk both up till they are the same
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306 LCA = LCA->_idom;
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307 anc = anc->_idom;
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308 }
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309
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310 return LCA;
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311 }
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312
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313 //--------------------------raise_LCA_above_use--------------------------------
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314 // We are placing a definition, and have been given a def->use edge.
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315 // The definition must dominate the use, so move the LCA upward in the
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316 // dominator tree to dominate the use. If the use is a phi, adjust
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317 // the LCA only with the phi input paths which actually use this def.
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318 static Block* raise_LCA_above_use(Block* LCA, Node* use, Node* def, const PhaseCFG* cfg) {
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319 Block* buse = cfg->get_block_for_node(use);
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320 if (buse == NULL) return LCA; // Unused killing Projs have no use block
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321 if (!use->is_Phi()) return buse->dom_lca(LCA);
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322 uint pmax = use->req(); // Number of Phi inputs
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323 // Why does not this loop just break after finding the matching input to
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324 // the Phi? Well...it's like this. I do not have true def-use/use-def
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325 // chains. Means I cannot distinguish, from the def-use direction, which
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326 // of many use-defs lead from the same use to the same def. That is, this
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327 // Phi might have several uses of the same def. Each use appears in a
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328 // different predecessor block. But when I enter here, I cannot distinguish
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329 // which use-def edge I should find the predecessor block for. So I find
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330 // them all. Means I do a little extra work if a Phi uses the same value
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331 // more than once.
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332 for (uint j=1; j<pmax; j++) { // For all inputs
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333 if (use->in(j) == def) { // Found matching input?
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334 Block* pred = cfg->get_block_for_node(buse->pred(j));
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335 LCA = pred->dom_lca(LCA);
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336 }
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337 }
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338 return LCA;
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339 }
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340
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341 //----------------------------raise_LCA_above_marks----------------------------
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342 // Return a new LCA that dominates LCA and any of its marked predecessors.
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343 // Search all my parents up to 'early' (exclusive), looking for predecessors
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344 // which are marked with the given index. Return the LCA (in the dom tree)
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345 // of all marked blocks. If there are none marked, return the original
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346 // LCA.
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347 static Block* raise_LCA_above_marks(Block* LCA, node_idx_t mark, Block* early, const PhaseCFG* cfg) {
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348 Block_List worklist;
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349 worklist.push(LCA);
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350 while (worklist.size() > 0) {
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351 Block* mid = worklist.pop();
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352 if (mid == early) continue; // stop searching here
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353
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354 // Test and set the visited bit.
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355 if (mid->raise_LCA_visited() == mark) continue; // already visited
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356
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357 // Don't process the current LCA, otherwise the search may terminate early
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358 if (mid != LCA && mid->raise_LCA_mark() == mark) {
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359 // Raise the LCA.
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360 LCA = mid->dom_lca(LCA);
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361 if (LCA == early) break; // stop searching everywhere
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362 assert(early->dominates(LCA), "early is high enough");
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363 // Resume searching at that point, skipping intermediate levels.
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364 worklist.push(LCA);
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365 if (LCA == mid)
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366 continue; // Don't mark as visited to avoid early termination.
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367 } else {
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368 // Keep searching through this block's predecessors.
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369 for (uint j = 1, jmax = mid->num_preds(); j < jmax; j++) {
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370 Block* mid_parent = cfg->get_block_for_node(mid->pred(j));
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371 worklist.push(mid_parent);
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372 }
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373 }
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374 mid->set_raise_LCA_visited(mark);
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375 }
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376 return LCA;
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377 }
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378
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379 //--------------------------memory_early_block--------------------------------
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380 // This is a variation of find_deepest_input, the heart of schedule_early.
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381 // Find the "early" block for a load, if we considered only memory and
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382 // address inputs, that is, if other data inputs were ignored.
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383 //
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384 // Because a subset of edges are considered, the resulting block will
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385 // be earlier (at a shallower dom_depth) than the true schedule_early
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386 // point of the node. We compute this earlier block as a more permissive
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387 // site for anti-dependency insertion, but only if subsume_loads is enabled.
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diff changeset
388 static Block* memory_early_block(Node* load, Block* early, const PhaseCFG* cfg) {
0
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389 Node* base;
a61af66fc99e Initial load
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parents:
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390 Node* index;
a61af66fc99e Initial load
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391 Node* store = load->in(MemNode::Memory);
a61af66fc99e Initial load
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392 load->as_Mach()->memory_inputs(base, index);
a61af66fc99e Initial load
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parents:
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393
a61af66fc99e Initial load
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394 assert(base != NodeSentinel && index != NodeSentinel,
a61af66fc99e Initial load
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parents:
diff changeset
395 "unexpected base/index inputs");
a61af66fc99e Initial load
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parents:
diff changeset
396
a61af66fc99e Initial load
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parents:
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397 Node* mem_inputs[4];
a61af66fc99e Initial load
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diff changeset
398 int mem_inputs_length = 0;
a61af66fc99e Initial load
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parents:
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399 if (base != NULL) mem_inputs[mem_inputs_length++] = base;
a61af66fc99e Initial load
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parents:
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400 if (index != NULL) mem_inputs[mem_inputs_length++] = index;
a61af66fc99e Initial load
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parents:
diff changeset
401 if (store != NULL) mem_inputs[mem_inputs_length++] = store;
a61af66fc99e Initial load
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402
a61af66fc99e Initial load
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parents:
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403 // In the comparision below, add one to account for the control input,
a61af66fc99e Initial load
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parents:
diff changeset
404 // which may be null, but always takes up a spot in the in array.
a61af66fc99e Initial load
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parents:
diff changeset
405 if (mem_inputs_length + 1 < (int) load->req()) {
a61af66fc99e Initial load
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parents:
diff changeset
406 // This "load" has more inputs than just the memory, base and index inputs.
a61af66fc99e Initial load
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parents:
diff changeset
407 // For purposes of checking anti-dependences, we need to start
a61af66fc99e Initial load
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parents:
diff changeset
408 // from the early block of only the address portion of the instruction,
a61af66fc99e Initial load
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parents:
diff changeset
409 // and ignore other blocks that may have factored into the wider
a61af66fc99e Initial load
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parents:
diff changeset
410 // schedule_early calculation.
a61af66fc99e Initial load
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parents:
diff changeset
411 if (load->in(0) != NULL) mem_inputs[mem_inputs_length++] = load->in(0);
a61af66fc99e Initial load
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parents:
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412
a61af66fc99e Initial load
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parents:
diff changeset
413 Block* deepb = NULL; // Deepest block so far
a61af66fc99e Initial load
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parents:
diff changeset
414 int deepb_dom_depth = 0;
a61af66fc99e Initial load
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parents:
diff changeset
415 for (int i = 0; i < mem_inputs_length; i++) {
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diff changeset
416 Block* inb = cfg->get_block_for_node(mem_inputs[i]);
0
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parents:
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417 if (deepb_dom_depth < (int) inb->_dom_depth) {
a61af66fc99e Initial load
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parents:
diff changeset
418 // The new inb must be dominated by the previous deepb.
a61af66fc99e Initial load
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parents:
diff changeset
419 // The various inputs must be linearly ordered in the dom
a61af66fc99e Initial load
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parents:
diff changeset
420 // tree, or else there will not be a unique deepest block.
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diff changeset
421 DEBUG_ONLY(assert_dom(deepb, inb, load, cfg));
0
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422 deepb = inb; // Save deepest block
a61af66fc99e Initial load
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parents:
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423 deepb_dom_depth = deepb->_dom_depth;
a61af66fc99e Initial load
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parents:
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424 }
a61af66fc99e Initial load
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parents:
diff changeset
425 }
a61af66fc99e Initial load
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diff changeset
426 early = deepb;
a61af66fc99e Initial load
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427 }
a61af66fc99e Initial load
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428
a61af66fc99e Initial load
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diff changeset
429 return early;
a61af66fc99e Initial load
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parents:
diff changeset
430 }
a61af66fc99e Initial load
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parents:
diff changeset
431
a61af66fc99e Initial load
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432 //--------------------------insert_anti_dependences---------------------------
a61af66fc99e Initial load
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parents:
diff changeset
433 // A load may need to witness memory that nearby stores can overwrite.
a61af66fc99e Initial load
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parents:
diff changeset
434 // For each nearby store, either insert an "anti-dependence" edge
a61af66fc99e Initial load
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parents:
diff changeset
435 // from the load to the store, or else move LCA upward to force the
a61af66fc99e Initial load
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parents:
diff changeset
436 // load to (eventually) be scheduled in a block above the store.
a61af66fc99e Initial load
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parents:
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437 //
a61af66fc99e Initial load
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438 // Do not add edges to stores on distinct control-flow paths;
a61af66fc99e Initial load
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parents:
diff changeset
439 // only add edges to stores which might interfere.
a61af66fc99e Initial load
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diff changeset
440 //
a61af66fc99e Initial load
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parents:
diff changeset
441 // Return the (updated) LCA. There will not be any possibly interfering
a61af66fc99e Initial load
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parents:
diff changeset
442 // store between the load's "early block" and the updated LCA.
a61af66fc99e Initial load
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parents:
diff changeset
443 // Any stores in the updated LCA will have new precedence edges
a61af66fc99e Initial load
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parents:
diff changeset
444 // back to the load. The caller is expected to schedule the load
a61af66fc99e Initial load
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parents:
diff changeset
445 // in the LCA, in which case the precedence edges will make LCM
a61af66fc99e Initial load
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parents:
diff changeset
446 // preserve anti-dependences. The caller may also hoist the load
a61af66fc99e Initial load
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parents:
diff changeset
447 // above the LCA, if it is not the early block.
a61af66fc99e Initial load
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parents:
diff changeset
448 Block* PhaseCFG::insert_anti_dependences(Block* LCA, Node* load, bool verify) {
a61af66fc99e Initial load
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parents:
diff changeset
449 assert(load->needs_anti_dependence_check(), "must be a load of some sort");
a61af66fc99e Initial load
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parents:
diff changeset
450 assert(LCA != NULL, "");
a61af66fc99e Initial load
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parents:
diff changeset
451 DEBUG_ONLY(Block* LCA_orig = LCA);
a61af66fc99e Initial load
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parents:
diff changeset
452
a61af66fc99e Initial load
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parents:
diff changeset
453 // Compute the alias index. Loads and stores with different alias indices
a61af66fc99e Initial load
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parents:
diff changeset
454 // do not need anti-dependence edges.
a61af66fc99e Initial load
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parents:
diff changeset
455 uint load_alias_idx = C->get_alias_index(load->adr_type());
a61af66fc99e Initial load
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parents:
diff changeset
456 #ifdef ASSERT
a61af66fc99e Initial load
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parents:
diff changeset
457 if (load_alias_idx == Compile::AliasIdxBot && C->AliasLevel() > 0 &&
a61af66fc99e Initial load
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parents:
diff changeset
458 (PrintOpto || VerifyAliases ||
a61af66fc99e Initial load
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parents:
diff changeset
459 PrintMiscellaneous && (WizardMode || Verbose))) {
a61af66fc99e Initial load
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parents:
diff changeset
460 // Load nodes should not consume all of memory.
a61af66fc99e Initial load
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parents:
diff changeset
461 // Reporting a bottom type indicates a bug in adlc.
a61af66fc99e Initial load
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parents:
diff changeset
462 // If some particular type of node validly consumes all of memory,
a61af66fc99e Initial load
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parents:
diff changeset
463 // sharpen the preceding "if" to exclude it, so we can catch bugs here.
a61af66fc99e Initial load
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parents:
diff changeset
464 tty->print_cr("*** Possible Anti-Dependence Bug: Load consumes all of memory.");
a61af66fc99e Initial load
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parents:
diff changeset
465 load->dump(2);
a61af66fc99e Initial load
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parents:
diff changeset
466 if (VerifyAliases) assert(load_alias_idx != Compile::AliasIdxBot, "");
a61af66fc99e Initial load
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parents:
diff changeset
467 }
a61af66fc99e Initial load
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parents:
diff changeset
468 #endif
a61af66fc99e Initial load
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parents:
diff changeset
469 assert(load_alias_idx || (load->is_Mach() && load->as_Mach()->ideal_Opcode() == Op_StrComp),
a61af66fc99e Initial load
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parents:
diff changeset
470 "String compare is only known 'load' that does not conflict with any stores");
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parents: 673
diff changeset
471 assert(load_alias_idx || (load->is_Mach() && load->as_Mach()->ideal_Opcode() == Op_StrEquals),
fbde8ec322d0 6761600: Use sse 4.2 in intrinsics
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parents: 673
diff changeset
472 "String equals is a 'load' that does not conflict with any stores");
fbde8ec322d0 6761600: Use sse 4.2 in intrinsics
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parents: 673
diff changeset
473 assert(load_alias_idx || (load->is_Mach() && load->as_Mach()->ideal_Opcode() == Op_StrIndexOf),
fbde8ec322d0 6761600: Use sse 4.2 in intrinsics
cfang
parents: 673
diff changeset
474 "String indexOf is a 'load' that does not conflict with any stores");
fbde8ec322d0 6761600: Use sse 4.2 in intrinsics
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parents: 673
diff changeset
475 assert(load_alias_idx || (load->is_Mach() && load->as_Mach()->ideal_Opcode() == Op_AryEq),
fbde8ec322d0 6761600: Use sse 4.2 in intrinsics
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parents: 673
diff changeset
476 "Arrays equals is a 'load' that do not conflict with any stores");
0
a61af66fc99e Initial load
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parents:
diff changeset
477
a61af66fc99e Initial load
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parents:
diff changeset
478 if (!C->alias_type(load_alias_idx)->is_rewritable()) {
a61af66fc99e Initial load
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parents:
diff changeset
479 // It is impossible to spoil this load by putting stores before it,
a61af66fc99e Initial load
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parents:
diff changeset
480 // because we know that the stores will never update the value
a61af66fc99e Initial load
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parents:
diff changeset
481 // which 'load' must witness.
a61af66fc99e Initial load
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parents:
diff changeset
482 return LCA;
a61af66fc99e Initial load
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parents:
diff changeset
483 }
a61af66fc99e Initial load
duke
parents:
diff changeset
484
a61af66fc99e Initial load
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parents:
diff changeset
485 node_idx_t load_index = load->_idx;
a61af66fc99e Initial load
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parents:
diff changeset
486
a61af66fc99e Initial load
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parents:
diff changeset
487 // Note the earliest legal placement of 'load', as determined by
a61af66fc99e Initial load
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parents:
diff changeset
488 // by the unique point in the dom tree where all memory effects
a61af66fc99e Initial load
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parents:
diff changeset
489 // and other inputs are first available. (Computed by schedule_early.)
a61af66fc99e Initial load
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parents:
diff changeset
490 // For normal loads, 'early' is the shallowest place (dom graph wise)
a61af66fc99e Initial load
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parents:
diff changeset
491 // to look for anti-deps between this load and any store.
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diff changeset
492 Block* early = get_block_for_node(load);
0
a61af66fc99e Initial load
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parents:
diff changeset
493
a61af66fc99e Initial load
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parents:
diff changeset
494 // If we are subsuming loads, compute an "early" block that only considers
a61af66fc99e Initial load
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parents:
diff changeset
495 // memory or address inputs. This block may be different than the
a61af66fc99e Initial load
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parents:
diff changeset
496 // schedule_early block in that it could be at an even shallower depth in the
a61af66fc99e Initial load
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parents:
diff changeset
497 // dominator tree, and allow for a broader discovery of anti-dependences.
a61af66fc99e Initial load
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parents:
diff changeset
498 if (C->subsume_loads()) {
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diff changeset
499 early = memory_early_block(load, early, this);
0
a61af66fc99e Initial load
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parents:
diff changeset
500 }
a61af66fc99e Initial load
duke
parents:
diff changeset
501
a61af66fc99e Initial load
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parents:
diff changeset
502 ResourceArea *area = Thread::current()->resource_area();
a61af66fc99e Initial load
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parents:
diff changeset
503 Node_List worklist_mem(area); // prior memory state to store
a61af66fc99e Initial load
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parents:
diff changeset
504 Node_List worklist_store(area); // possible-def to explore
31
6152cbb08ce9 6590177: jck60019 test assert(!repeated,"do not walk merges twice")
kvn
parents: 0
diff changeset
505 Node_List worklist_visited(area); // visited mergemem nodes
0
a61af66fc99e Initial load
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parents:
diff changeset
506 Node_List non_early_stores(area); // all relevant stores outside of early
a61af66fc99e Initial load
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parents:
diff changeset
507 bool must_raise_LCA = false;
a61af66fc99e Initial load
duke
parents:
diff changeset
508
a61af66fc99e Initial load
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parents:
diff changeset
509 #ifdef TRACK_PHI_INPUTS
a61af66fc99e Initial load
duke
parents:
diff changeset
510 // %%% This extra checking fails because MergeMem nodes are not GVNed.
a61af66fc99e Initial load
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parents:
diff changeset
511 // Provide "phi_inputs" to check if every input to a PhiNode is from the
a61af66fc99e Initial load
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parents:
diff changeset
512 // original memory state. This indicates a PhiNode for which should not
a61af66fc99e Initial load
duke
parents:
diff changeset
513 // prevent the load from sinking. For such a block, set_raise_LCA_mark
a61af66fc99e Initial load
duke
parents:
diff changeset
514 // may be overly conservative.
a61af66fc99e Initial load
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parents:
diff changeset
515 // Mechanism: count inputs seen for each Phi encountered in worklist_store.
a61af66fc99e Initial load
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parents:
diff changeset
516 DEBUG_ONLY(GrowableArray<uint> phi_inputs(area, C->unique(),0,0));
a61af66fc99e Initial load
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parents:
diff changeset
517 #endif
a61af66fc99e Initial load
duke
parents:
diff changeset
518
a61af66fc99e Initial load
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parents:
diff changeset
519 // 'load' uses some memory state; look for users of the same state.
a61af66fc99e Initial load
duke
parents:
diff changeset
520 // Recurse through MergeMem nodes to the stores that use them.
a61af66fc99e Initial load
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parents:
diff changeset
521
a61af66fc99e Initial load
duke
parents:
diff changeset
522 // Each of these stores is a possible definition of memory
a61af66fc99e Initial load
duke
parents:
diff changeset
523 // that 'load' needs to use. We need to force 'load'
a61af66fc99e Initial load
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parents:
diff changeset
524 // to occur before each such store. When the store is in
a61af66fc99e Initial load
duke
parents:
diff changeset
525 // the same block as 'load', we insert an anti-dependence
a61af66fc99e Initial load
duke
parents:
diff changeset
526 // edge load->store.
a61af66fc99e Initial load
duke
parents:
diff changeset
527
a61af66fc99e Initial load
duke
parents:
diff changeset
528 // The relevant stores "nearby" the load consist of a tree rooted
a61af66fc99e Initial load
duke
parents:
diff changeset
529 // at initial_mem, with internal nodes of type MergeMem.
a61af66fc99e Initial load
duke
parents:
diff changeset
530 // Therefore, the branches visited by the worklist are of this form:
a61af66fc99e Initial load
duke
parents:
diff changeset
531 // initial_mem -> (MergeMem ->)* store
a61af66fc99e Initial load
duke
parents:
diff changeset
532 // The anti-dependence constraints apply only to the fringe of this tree.
a61af66fc99e Initial load
duke
parents:
diff changeset
533
a61af66fc99e Initial load
duke
parents:
diff changeset
534 Node* initial_mem = load->in(MemNode::Memory);
a61af66fc99e Initial load
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parents:
diff changeset
535 worklist_store.push(initial_mem);
31
6152cbb08ce9 6590177: jck60019 test assert(!repeated,"do not walk merges twice")
kvn
parents: 0
diff changeset
536 worklist_visited.push(initial_mem);
0
a61af66fc99e Initial load
duke
parents:
diff changeset
537 worklist_mem.push(NULL);
a61af66fc99e Initial load
duke
parents:
diff changeset
538 while (worklist_store.size() > 0) {
a61af66fc99e Initial load
duke
parents:
diff changeset
539 // Examine a nearby store to see if it might interfere with our load.
a61af66fc99e Initial load
duke
parents:
diff changeset
540 Node* mem = worklist_mem.pop();
a61af66fc99e Initial load
duke
parents:
diff changeset
541 Node* store = worklist_store.pop();
a61af66fc99e Initial load
duke
parents:
diff changeset
542 uint op = store->Opcode();
a61af66fc99e Initial load
duke
parents:
diff changeset
543
a61af66fc99e Initial load
duke
parents:
diff changeset
544 // MergeMems do not directly have anti-deps.
a61af66fc99e Initial load
duke
parents:
diff changeset
545 // Treat them as internal nodes in a forward tree of memory states,
a61af66fc99e Initial load
duke
parents:
diff changeset
546 // the leaves of which are each a 'possible-def'.
a61af66fc99e Initial load
duke
parents:
diff changeset
547 if (store == initial_mem // root (exclusive) of tree we are searching
a61af66fc99e Initial load
duke
parents:
diff changeset
548 || op == Op_MergeMem // internal node of tree we are searching
a61af66fc99e Initial load
duke
parents:
diff changeset
549 ) {
a61af66fc99e Initial load
duke
parents:
diff changeset
550 mem = store; // It's not a possibly interfering store.
31
6152cbb08ce9 6590177: jck60019 test assert(!repeated,"do not walk merges twice")
kvn
parents: 0
diff changeset
551 if (store == initial_mem)
6152cbb08ce9 6590177: jck60019 test assert(!repeated,"do not walk merges twice")
kvn
parents: 0
diff changeset
552 initial_mem = NULL; // only process initial memory once
6152cbb08ce9 6590177: jck60019 test assert(!repeated,"do not walk merges twice")
kvn
parents: 0
diff changeset
553
0
a61af66fc99e Initial load
duke
parents:
diff changeset
554 for (DUIterator_Fast imax, i = mem->fast_outs(imax); i < imax; i++) {
a61af66fc99e Initial load
duke
parents:
diff changeset
555 store = mem->fast_out(i);
a61af66fc99e Initial load
duke
parents:
diff changeset
556 if (store->is_MergeMem()) {
a61af66fc99e Initial load
duke
parents:
diff changeset
557 // Be sure we don't get into combinatorial problems.
a61af66fc99e Initial load
duke
parents:
diff changeset
558 // (Allow phis to be repeated; they can merge two relevant states.)
31
6152cbb08ce9 6590177: jck60019 test assert(!repeated,"do not walk merges twice")
kvn
parents: 0
diff changeset
559 uint j = worklist_visited.size();
6152cbb08ce9 6590177: jck60019 test assert(!repeated,"do not walk merges twice")
kvn
parents: 0
diff changeset
560 for (; j > 0; j--) {
6152cbb08ce9 6590177: jck60019 test assert(!repeated,"do not walk merges twice")
kvn
parents: 0
diff changeset
561 if (worklist_visited.at(j-1) == store) break;
0
a61af66fc99e Initial load
duke
parents:
diff changeset
562 }
31
6152cbb08ce9 6590177: jck60019 test assert(!repeated,"do not walk merges twice")
kvn
parents: 0
diff changeset
563 if (j > 0) continue; // already on work list; do not repeat
6152cbb08ce9 6590177: jck60019 test assert(!repeated,"do not walk merges twice")
kvn
parents: 0
diff changeset
564 worklist_visited.push(store);
0
a61af66fc99e Initial load
duke
parents:
diff changeset
565 }
a61af66fc99e Initial load
duke
parents:
diff changeset
566 worklist_mem.push(mem);
a61af66fc99e Initial load
duke
parents:
diff changeset
567 worklist_store.push(store);
a61af66fc99e Initial load
duke
parents:
diff changeset
568 }
a61af66fc99e Initial load
duke
parents:
diff changeset
569 continue;
a61af66fc99e Initial load
duke
parents:
diff changeset
570 }
a61af66fc99e Initial load
duke
parents:
diff changeset
571
a61af66fc99e Initial load
duke
parents:
diff changeset
572 if (op == Op_MachProj || op == Op_Catch) continue;
a61af66fc99e Initial load
duke
parents:
diff changeset
573 if (store->needs_anti_dependence_check()) continue; // not really a store
a61af66fc99e Initial load
duke
parents:
diff changeset
574
a61af66fc99e Initial load
duke
parents:
diff changeset
575 // Compute the alias index. Loads and stores with different alias
a61af66fc99e Initial load
duke
parents:
diff changeset
576 // indices do not need anti-dependence edges. Wide MemBar's are
a61af66fc99e Initial load
duke
parents:
diff changeset
577 // anti-dependent on everything (except immutable memories).
a61af66fc99e Initial load
duke
parents:
diff changeset
578 const TypePtr* adr_type = store->adr_type();
a61af66fc99e Initial load
duke
parents:
diff changeset
579 if (!C->can_alias(adr_type, load_alias_idx)) continue;
a61af66fc99e Initial load
duke
parents:
diff changeset
580
a61af66fc99e Initial load
duke
parents:
diff changeset
581 // Most slow-path runtime calls do NOT modify Java memory, but
a61af66fc99e Initial load
duke
parents:
diff changeset
582 // they can block and so write Raw memory.
a61af66fc99e Initial load
duke
parents:
diff changeset
583 if (store->is_Mach()) {
a61af66fc99e Initial load
duke
parents:
diff changeset
584 MachNode* mstore = store->as_Mach();
a61af66fc99e Initial load
duke
parents:
diff changeset
585 if (load_alias_idx != Compile::AliasIdxRaw) {
a61af66fc99e Initial load
duke
parents:
diff changeset
586 // Check for call into the runtime using the Java calling
a61af66fc99e Initial load
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parents:
diff changeset
587 // convention (and from there into a wrapper); it has no
a61af66fc99e Initial load
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parents:
diff changeset
588 // _method. Can't do this optimization for Native calls because
a61af66fc99e Initial load
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parents:
diff changeset
589 // they CAN write to Java memory.
a61af66fc99e Initial load
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parents:
diff changeset
590 if (mstore->ideal_Opcode() == Op_CallStaticJava) {
a61af66fc99e Initial load
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parents:
diff changeset
591 assert(mstore->is_MachSafePoint(), "");
a61af66fc99e Initial load
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parents:
diff changeset
592 MachSafePointNode* ms = (MachSafePointNode*) mstore;
a61af66fc99e Initial load
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parents:
diff changeset
593 assert(ms->is_MachCallJava(), "");
a61af66fc99e Initial load
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parents:
diff changeset
594 MachCallJavaNode* mcj = (MachCallJavaNode*) ms;
a61af66fc99e Initial load
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parents:
diff changeset
595 if (mcj->_method == NULL) {
a61af66fc99e Initial load
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parents:
diff changeset
596 // These runtime calls do not write to Java visible memory
a61af66fc99e Initial load
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parents:
diff changeset
597 // (other than Raw) and so do not require anti-dependence edges.
a61af66fc99e Initial load
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parents:
diff changeset
598 continue;
a61af66fc99e Initial load
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parents:
diff changeset
599 }
a61af66fc99e Initial load
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parents:
diff changeset
600 }
a61af66fc99e Initial load
duke
parents:
diff changeset
601 // Same for SafePoints: they read/write Raw but only read otherwise.
a61af66fc99e Initial load
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parents:
diff changeset
602 // This is basically a workaround for SafePoints only defining control
a61af66fc99e Initial load
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parents:
diff changeset
603 // instead of control + memory.
a61af66fc99e Initial load
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parents:
diff changeset
604 if (mstore->ideal_Opcode() == Op_SafePoint)
a61af66fc99e Initial load
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parents:
diff changeset
605 continue;
a61af66fc99e Initial load
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parents:
diff changeset
606 } else {
a61af66fc99e Initial load
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parents:
diff changeset
607 // Some raw memory, such as the load of "top" at an allocation,
a61af66fc99e Initial load
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parents:
diff changeset
608 // can be control dependent on the previous safepoint. See
a61af66fc99e Initial load
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parents:
diff changeset
609 // comments in GraphKit::allocate_heap() about control input.
a61af66fc99e Initial load
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parents:
diff changeset
610 // Inserting an anti-dep between such a safepoint and a use
a61af66fc99e Initial load
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parents:
diff changeset
611 // creates a cycle, and will cause a subsequent failure in
a61af66fc99e Initial load
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parents:
diff changeset
612 // local scheduling. (BugId 4919904)
a61af66fc99e Initial load
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parents:
diff changeset
613 // (%%% How can a control input be a safepoint and not a projection??)
a61af66fc99e Initial load
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parents:
diff changeset
614 if (mstore->ideal_Opcode() == Op_SafePoint && load->in(0) == mstore)
a61af66fc99e Initial load
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parents:
diff changeset
615 continue;
a61af66fc99e Initial load
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parents:
diff changeset
616 }
a61af66fc99e Initial load
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parents:
diff changeset
617 }
a61af66fc99e Initial load
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parents:
diff changeset
618
a61af66fc99e Initial load
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parents:
diff changeset
619 // Identify a block that the current load must be above,
a61af66fc99e Initial load
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parents:
diff changeset
620 // or else observe that 'store' is all the way up in the
a61af66fc99e Initial load
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parents:
diff changeset
621 // earliest legal block for 'load'. In the latter case,
a61af66fc99e Initial load
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parents:
diff changeset
622 // immediately insert an anti-dependence edge.
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diff changeset
623 Block* store_block = get_block_for_node(store);
0
a61af66fc99e Initial load
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parents:
diff changeset
624 assert(store_block != NULL, "unused killing projections skipped above");
a61af66fc99e Initial load
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parents:
diff changeset
625
a61af66fc99e Initial load
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parents:
diff changeset
626 if (store->is_Phi()) {
a61af66fc99e Initial load
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parents:
diff changeset
627 // 'load' uses memory which is one (or more) of the Phi's inputs.
a61af66fc99e Initial load
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parents:
diff changeset
628 // It must be scheduled not before the Phi, but rather before
a61af66fc99e Initial load
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parents:
diff changeset
629 // each of the relevant Phi inputs.
a61af66fc99e Initial load
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parents:
diff changeset
630 //
a61af66fc99e Initial load
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parents:
diff changeset
631 // Instead of finding the LCA of all inputs to a Phi that match 'mem',
a61af66fc99e Initial load
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parents:
diff changeset
632 // we mark each corresponding predecessor block and do a combined
a61af66fc99e Initial load
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parents:
diff changeset
633 // hoisting operation later (raise_LCA_above_marks).
a61af66fc99e Initial load
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parents:
diff changeset
634 //
a61af66fc99e Initial load
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parents:
diff changeset
635 // Do not assert(store_block != early, "Phi merging memory after access")
a61af66fc99e Initial load
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parents:
diff changeset
636 // PhiNode may be at start of block 'early' with backedge to 'early'
a61af66fc99e Initial load
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parents:
diff changeset
637 DEBUG_ONLY(bool found_match = false);
a61af66fc99e Initial load
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parents:
diff changeset
638 for (uint j = PhiNode::Input, jmax = store->req(); j < jmax; j++) {
a61af66fc99e Initial load
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parents:
diff changeset
639 if (store->in(j) == mem) { // Found matching input?
a61af66fc99e Initial load
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parents:
diff changeset
640 DEBUG_ONLY(found_match = true);
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d1034bd8cefc 8022284: Hide internal data structure in PhaseCFG
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diff changeset
641 Block* pred_block = get_block_for_node(store_block->pred(j));
0
a61af66fc99e Initial load
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parents:
diff changeset
642 if (pred_block != early) {
a61af66fc99e Initial load
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parents:
diff changeset
643 // If any predecessor of the Phi matches the load's "early block",
a61af66fc99e Initial load
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parents:
diff changeset
644 // we do not need a precedence edge between the Phi and 'load'
605
98cb887364d3 6810672: Comment typos
twisti
parents: 601
diff changeset
645 // since the load will be forced into a block preceding the Phi.
0
a61af66fc99e Initial load
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parents:
diff changeset
646 pred_block->set_raise_LCA_mark(load_index);
a61af66fc99e Initial load
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parents:
diff changeset
647 assert(!LCA_orig->dominates(pred_block) ||
a61af66fc99e Initial load
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parents:
diff changeset
648 early->dominates(pred_block), "early is high enough");
a61af66fc99e Initial load
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parents:
diff changeset
649 must_raise_LCA = true;
788
1851e1fb420e 6843752: missing code for an anti-dependent Phi in GCM
kvn
parents: 681
diff changeset
650 } else {
1851e1fb420e 6843752: missing code for an anti-dependent Phi in GCM
kvn
parents: 681
diff changeset
651 // anti-dependent upon PHI pinned below 'early', no edge needed
1851e1fb420e 6843752: missing code for an anti-dependent Phi in GCM
kvn
parents: 681
diff changeset
652 LCA = early; // but can not schedule below 'early'
0
a61af66fc99e Initial load
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parents:
diff changeset
653 }
a61af66fc99e Initial load
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parents:
diff changeset
654 }
a61af66fc99e Initial load
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parents:
diff changeset
655 }
a61af66fc99e Initial load
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parents:
diff changeset
656 assert(found_match, "no worklist bug");
a61af66fc99e Initial load
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parents:
diff changeset
657 #ifdef TRACK_PHI_INPUTS
a61af66fc99e Initial load
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parents:
diff changeset
658 #ifdef ASSERT
a61af66fc99e Initial load
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parents:
diff changeset
659 // This assert asks about correct handling of PhiNodes, which may not
a61af66fc99e Initial load
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parents:
diff changeset
660 // have all input edges directly from 'mem'. See BugId 4621264
a61af66fc99e Initial load
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parents:
diff changeset
661 int num_mem_inputs = phi_inputs.at_grow(store->_idx,0) + 1;
a61af66fc99e Initial load
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parents:
diff changeset
662 // Increment by exactly one even if there are multiple copies of 'mem'
a61af66fc99e Initial load
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parents:
diff changeset
663 // coming into the phi, because we will run this block several times
a61af66fc99e Initial load
duke
parents:
diff changeset
664 // if there are several copies of 'mem'. (That's how DU iterators work.)
a61af66fc99e Initial load
duke
parents:
diff changeset
665 phi_inputs.at_put(store->_idx, num_mem_inputs);
a61af66fc99e Initial load
duke
parents:
diff changeset
666 assert(PhiNode::Input + num_mem_inputs < store->req(),
a61af66fc99e Initial load
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parents:
diff changeset
667 "Expect at least one phi input will not be from original memory state");
a61af66fc99e Initial load
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parents:
diff changeset
668 #endif //ASSERT
a61af66fc99e Initial load
duke
parents:
diff changeset
669 #endif //TRACK_PHI_INPUTS
a61af66fc99e Initial load
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parents:
diff changeset
670 } else if (store_block != early) {
a61af66fc99e Initial load
duke
parents:
diff changeset
671 // 'store' is between the current LCA and earliest possible block.
a61af66fc99e Initial load
duke
parents:
diff changeset
672 // Label its block, and decide later on how to raise the LCA
a61af66fc99e Initial load
duke
parents:
diff changeset
673 // to include the effect on LCA of this store.
a61af66fc99e Initial load
duke
parents:
diff changeset
674 // If this store's block gets chosen as the raised LCA, we
a61af66fc99e Initial load
duke
parents:
diff changeset
675 // will find him on the non_early_stores list and stick him
a61af66fc99e Initial load
duke
parents:
diff changeset
676 // with a precedence edge.
a61af66fc99e Initial load
duke
parents:
diff changeset
677 // (But, don't bother if LCA is already raised all the way.)
a61af66fc99e Initial load
duke
parents:
diff changeset
678 if (LCA != early) {
a61af66fc99e Initial load
duke
parents:
diff changeset
679 store_block->set_raise_LCA_mark(load_index);
a61af66fc99e Initial load
duke
parents:
diff changeset
680 must_raise_LCA = true;
a61af66fc99e Initial load
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parents:
diff changeset
681 non_early_stores.push(store);
a61af66fc99e Initial load
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parents:
diff changeset
682 }
a61af66fc99e Initial load
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parents:
diff changeset
683 } else {
a61af66fc99e Initial load
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parents:
diff changeset
684 // Found a possibly-interfering store in the load's 'early' block.
a61af66fc99e Initial load
duke
parents:
diff changeset
685 // This means 'load' cannot sink at all in the dominator tree.
a61af66fc99e Initial load
duke
parents:
diff changeset
686 // Add an anti-dep edge, and squeeze 'load' into the highest block.
a61af66fc99e Initial load
duke
parents:
diff changeset
687 assert(store != load->in(0), "dependence cycle found");
a61af66fc99e Initial load
duke
parents:
diff changeset
688 if (verify) {
a61af66fc99e Initial load
duke
parents:
diff changeset
689 assert(store->find_edge(load) != -1, "missing precedence edge");
a61af66fc99e Initial load
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parents:
diff changeset
690 } else {
a61af66fc99e Initial load
duke
parents:
diff changeset
691 store->add_prec(load);
a61af66fc99e Initial load
duke
parents:
diff changeset
692 }
a61af66fc99e Initial load
duke
parents:
diff changeset
693 LCA = early;
a61af66fc99e Initial load
duke
parents:
diff changeset
694 // This turns off the process of gathering non_early_stores.
a61af66fc99e Initial load
duke
parents:
diff changeset
695 }
a61af66fc99e Initial load
duke
parents:
diff changeset
696 }
a61af66fc99e Initial load
duke
parents:
diff changeset
697 // (Worklist is now empty; all nearby stores have been visited.)
a61af66fc99e Initial load
duke
parents:
diff changeset
698
a61af66fc99e Initial load
duke
parents:
diff changeset
699 // Finished if 'load' must be scheduled in its 'early' block.
a61af66fc99e Initial load
duke
parents:
diff changeset
700 // If we found any stores there, they have already been given
a61af66fc99e Initial load
duke
parents:
diff changeset
701 // precedence edges.
a61af66fc99e Initial load
duke
parents:
diff changeset
702 if (LCA == early) return LCA;
a61af66fc99e Initial load
duke
parents:
diff changeset
703
a61af66fc99e Initial load
duke
parents:
diff changeset
704 // We get here only if there are no possibly-interfering stores
a61af66fc99e Initial load
duke
parents:
diff changeset
705 // in the load's 'early' block. Move LCA up above all predecessors
a61af66fc99e Initial load
duke
parents:
diff changeset
706 // which contain stores we have noted.
a61af66fc99e Initial load
duke
parents:
diff changeset
707 //
a61af66fc99e Initial load
duke
parents:
diff changeset
708 // The raised LCA block can be a home to such interfering stores,
a61af66fc99e Initial load
duke
parents:
diff changeset
709 // but its predecessors must not contain any such stores.
a61af66fc99e Initial load
duke
parents:
diff changeset
710 //
a61af66fc99e Initial load
duke
parents:
diff changeset
711 // The raised LCA will be a lower bound for placing the load,
a61af66fc99e Initial load
duke
parents:
diff changeset
712 // preventing the load from sinking past any block containing
a61af66fc99e Initial load
duke
parents:
diff changeset
713 // a store that may invalidate the memory state required by 'load'.
a61af66fc99e Initial load
duke
parents:
diff changeset
714 if (must_raise_LCA)
12023
d1034bd8cefc 8022284: Hide internal data structure in PhaseCFG
adlertz
parents: 8691
diff changeset
715 LCA = raise_LCA_above_marks(LCA, load->_idx, early, this);
0
a61af66fc99e Initial load
duke
parents:
diff changeset
716 if (LCA == early) return LCA;
a61af66fc99e Initial load
duke
parents:
diff changeset
717
a61af66fc99e Initial load
duke
parents:
diff changeset
718 // Insert anti-dependence edges from 'load' to each store
a61af66fc99e Initial load
duke
parents:
diff changeset
719 // in the non-early LCA block.
a61af66fc99e Initial load
duke
parents:
diff changeset
720 // Mine the non_early_stores list for such stores.
a61af66fc99e Initial load
duke
parents:
diff changeset
721 if (LCA->raise_LCA_mark() == load_index) {
a61af66fc99e Initial load
duke
parents:
diff changeset
722 while (non_early_stores.size() > 0) {
a61af66fc99e Initial load
duke
parents:
diff changeset
723 Node* store = non_early_stores.pop();
12023
d1034bd8cefc 8022284: Hide internal data structure in PhaseCFG
adlertz
parents: 8691
diff changeset
724 Block* store_block = get_block_for_node(store);
0
a61af66fc99e Initial load
duke
parents:
diff changeset
725 if (store_block == LCA) {
a61af66fc99e Initial load
duke
parents:
diff changeset
726 // add anti_dependence from store to load in its own block
a61af66fc99e Initial load
duke
parents:
diff changeset
727 assert(store != load->in(0), "dependence cycle found");
a61af66fc99e Initial load
duke
parents:
diff changeset
728 if (verify) {
a61af66fc99e Initial load
duke
parents:
diff changeset
729 assert(store->find_edge(load) != -1, "missing precedence edge");
a61af66fc99e Initial load
duke
parents:
diff changeset
730 } else {
a61af66fc99e Initial load
duke
parents:
diff changeset
731 store->add_prec(load);
a61af66fc99e Initial load
duke
parents:
diff changeset
732 }
a61af66fc99e Initial load
duke
parents:
diff changeset
733 } else {
a61af66fc99e Initial load
duke
parents:
diff changeset
734 assert(store_block->raise_LCA_mark() == load_index, "block was marked");
a61af66fc99e Initial load
duke
parents:
diff changeset
735 // Any other stores we found must be either inside the new LCA
a61af66fc99e Initial load
duke
parents:
diff changeset
736 // or else outside the original LCA. In the latter case, they
a61af66fc99e Initial load
duke
parents:
diff changeset
737 // did not interfere with any use of 'load'.
a61af66fc99e Initial load
duke
parents:
diff changeset
738 assert(LCA->dominates(store_block)
a61af66fc99e Initial load
duke
parents:
diff changeset
739 || !LCA_orig->dominates(store_block), "no stray stores");
a61af66fc99e Initial load
duke
parents:
diff changeset
740 }
a61af66fc99e Initial load
duke
parents:
diff changeset
741 }
a61af66fc99e Initial load
duke
parents:
diff changeset
742 }
a61af66fc99e Initial load
duke
parents:
diff changeset
743
a61af66fc99e Initial load
duke
parents:
diff changeset
744 // Return the highest block containing stores; any stores
a61af66fc99e Initial load
duke
parents:
diff changeset
745 // within that block have been given anti-dependence edges.
a61af66fc99e Initial load
duke
parents:
diff changeset
746 return LCA;
a61af66fc99e Initial load
duke
parents:
diff changeset
747 }
a61af66fc99e Initial load
duke
parents:
diff changeset
748
a61af66fc99e Initial load
duke
parents:
diff changeset
749 // This class is used to iterate backwards over the nodes in the graph.
a61af66fc99e Initial load
duke
parents:
diff changeset
750
a61af66fc99e Initial load
duke
parents:
diff changeset
751 class Node_Backward_Iterator {
a61af66fc99e Initial load
duke
parents:
diff changeset
752
a61af66fc99e Initial load
duke
parents:
diff changeset
753 private:
a61af66fc99e Initial load
duke
parents:
diff changeset
754 Node_Backward_Iterator();
a61af66fc99e Initial load
duke
parents:
diff changeset
755
a61af66fc99e Initial load
duke
parents:
diff changeset
756 public:
a61af66fc99e Initial load
duke
parents:
diff changeset
757 // Constructor for the iterator
12023
d1034bd8cefc 8022284: Hide internal data structure in PhaseCFG
adlertz
parents: 8691
diff changeset
758 Node_Backward_Iterator(Node *root, VectorSet &visited, Node_List &stack, PhaseCFG &cfg);
0
a61af66fc99e Initial load
duke
parents:
diff changeset
759
a61af66fc99e Initial load
duke
parents:
diff changeset
760 // Postincrement operator to iterate over the nodes
a61af66fc99e Initial load
duke
parents:
diff changeset
761 Node *next();
a61af66fc99e Initial load
duke
parents:
diff changeset
762
a61af66fc99e Initial load
duke
parents:
diff changeset
763 private:
a61af66fc99e Initial load
duke
parents:
diff changeset
764 VectorSet &_visited;
a61af66fc99e Initial load
duke
parents:
diff changeset
765 Node_List &_stack;
12023
d1034bd8cefc 8022284: Hide internal data structure in PhaseCFG
adlertz
parents: 8691
diff changeset
766 PhaseCFG &_cfg;
0
a61af66fc99e Initial load
duke
parents:
diff changeset
767 };
a61af66fc99e Initial load
duke
parents:
diff changeset
768
a61af66fc99e Initial load
duke
parents:
diff changeset
769 // Constructor for the Node_Backward_Iterator
12023
d1034bd8cefc 8022284: Hide internal data structure in PhaseCFG
adlertz
parents: 8691
diff changeset
770 Node_Backward_Iterator::Node_Backward_Iterator( Node *root, VectorSet &visited, Node_List &stack, PhaseCFG &cfg)
d1034bd8cefc 8022284: Hide internal data structure in PhaseCFG
adlertz
parents: 8691
diff changeset
771 : _visited(visited), _stack(stack), _cfg(cfg) {
0
a61af66fc99e Initial load
duke
parents:
diff changeset
772 // The stack should contain exactly the root
a61af66fc99e Initial load
duke
parents:
diff changeset
773 stack.clear();
a61af66fc99e Initial load
duke
parents:
diff changeset
774 stack.push(root);
a61af66fc99e Initial load
duke
parents:
diff changeset
775
a61af66fc99e Initial load
duke
parents:
diff changeset
776 // Clear the visited bits
a61af66fc99e Initial load
duke
parents:
diff changeset
777 visited.Clear();
a61af66fc99e Initial load
duke
parents:
diff changeset
778 }
a61af66fc99e Initial load
duke
parents:
diff changeset
779
a61af66fc99e Initial load
duke
parents:
diff changeset
780 // Iterator for the Node_Backward_Iterator
a61af66fc99e Initial load
duke
parents:
diff changeset
781 Node *Node_Backward_Iterator::next() {
a61af66fc99e Initial load
duke
parents:
diff changeset
782
a61af66fc99e Initial load
duke
parents:
diff changeset
783 // If the _stack is empty, then just return NULL: finished.
a61af66fc99e Initial load
duke
parents:
diff changeset
784 if ( !_stack.size() )
a61af66fc99e Initial load
duke
parents:
diff changeset
785 return NULL;
a61af66fc99e Initial load
duke
parents:
diff changeset
786
a61af66fc99e Initial load
duke
parents:
diff changeset
787 // '_stack' is emulating a real _stack. The 'visit-all-users' loop has been
a61af66fc99e Initial load
duke
parents:
diff changeset
788 // made stateless, so I do not need to record the index 'i' on my _stack.
a61af66fc99e Initial load
duke
parents:
diff changeset
789 // Instead I visit all users each time, scanning for unvisited users.
a61af66fc99e Initial load
duke
parents:
diff changeset
790 // I visit unvisited not-anti-dependence users first, then anti-dependent
a61af66fc99e Initial load
duke
parents:
diff changeset
791 // children next.
a61af66fc99e Initial load
duke
parents:
diff changeset
792 Node *self = _stack.pop();
a61af66fc99e Initial load
duke
parents:
diff changeset
793
a61af66fc99e Initial load
duke
parents:
diff changeset
794 // I cycle here when I am entering a deeper level of recursion.
a61af66fc99e Initial load
duke
parents:
diff changeset
795 // The key variable 'self' was set prior to jumping here.
a61af66fc99e Initial load
duke
parents:
diff changeset
796 while( 1 ) {
a61af66fc99e Initial load
duke
parents:
diff changeset
797
a61af66fc99e Initial load
duke
parents:
diff changeset
798 _visited.set(self->_idx);
a61af66fc99e Initial load
duke
parents:
diff changeset
799
a61af66fc99e Initial load
duke
parents:
diff changeset
800 // Now schedule all uses as late as possible.
12023
d1034bd8cefc 8022284: Hide internal data structure in PhaseCFG
adlertz
parents: 8691
diff changeset
801 const Node* src = self->is_Proj() ? self->in(0) : self;
d1034bd8cefc 8022284: Hide internal data structure in PhaseCFG
adlertz
parents: 8691
diff changeset
802 uint src_rpo = _cfg.get_block_for_node(src)->_rpo;
0
a61af66fc99e Initial load
duke
parents:
diff changeset
803
a61af66fc99e Initial load
duke
parents:
diff changeset
804 // Schedule all nodes in a post-order visit
a61af66fc99e Initial load
duke
parents:
diff changeset
805 Node *unvisited = NULL; // Unvisited anti-dependent Node, if any
a61af66fc99e Initial load
duke
parents:
diff changeset
806
a61af66fc99e Initial load
duke
parents:
diff changeset
807 // Scan for unvisited nodes
a61af66fc99e Initial load
duke
parents:
diff changeset
808 for (DUIterator_Fast imax, i = self->fast_outs(imax); i < imax; i++) {
a61af66fc99e Initial load
duke
parents:
diff changeset
809 // For all uses, schedule late
a61af66fc99e Initial load
duke
parents:
diff changeset
810 Node* n = self->fast_out(i); // Use
a61af66fc99e Initial load
duke
parents:
diff changeset
811
a61af66fc99e Initial load
duke
parents:
diff changeset
812 // Skip already visited children
a61af66fc99e Initial load
duke
parents:
diff changeset
813 if ( _visited.test(n->_idx) )
a61af66fc99e Initial load
duke
parents:
diff changeset
814 continue;
a61af66fc99e Initial load
duke
parents:
diff changeset
815
a61af66fc99e Initial load
duke
parents:
diff changeset
816 // do not traverse backward control edges
a61af66fc99e Initial load
duke
parents:
diff changeset
817 Node *use = n->is_Proj() ? n->in(0) : n;
12023
d1034bd8cefc 8022284: Hide internal data structure in PhaseCFG
adlertz
parents: 8691
diff changeset
818 uint use_rpo = _cfg.get_block_for_node(use)->_rpo;
0
a61af66fc99e Initial load
duke
parents:
diff changeset
819
a61af66fc99e Initial load
duke
parents:
diff changeset
820 if ( use_rpo < src_rpo )
a61af66fc99e Initial load
duke
parents:
diff changeset
821 continue;
a61af66fc99e Initial load
duke
parents:
diff changeset
822
a61af66fc99e Initial load
duke
parents:
diff changeset
823 // Phi nodes always precede uses in a basic block
a61af66fc99e Initial load
duke
parents:
diff changeset
824 if ( use_rpo == src_rpo && use->is_Phi() )
a61af66fc99e Initial load
duke
parents:
diff changeset
825 continue;
a61af66fc99e Initial load
duke
parents:
diff changeset
826
a61af66fc99e Initial load
duke
parents:
diff changeset
827 unvisited = n; // Found unvisited
a61af66fc99e Initial load
duke
parents:
diff changeset
828
a61af66fc99e Initial load
duke
parents:
diff changeset
829 // Check for possible-anti-dependent
a61af66fc99e Initial load
duke
parents:
diff changeset
830 if( !n->needs_anti_dependence_check() )
a61af66fc99e Initial load
duke
parents:
diff changeset
831 break; // Not visited, not anti-dep; schedule it NOW
a61af66fc99e Initial load
duke
parents:
diff changeset
832 }
a61af66fc99e Initial load
duke
parents:
diff changeset
833
a61af66fc99e Initial load
duke
parents:
diff changeset
834 // Did I find an unvisited not-anti-dependent Node?
a61af66fc99e Initial load
duke
parents:
diff changeset
835 if ( !unvisited )
a61af66fc99e Initial load
duke
parents:
diff changeset
836 break; // All done with children; post-visit 'self'
a61af66fc99e Initial load
duke
parents:
diff changeset
837
a61af66fc99e Initial load
duke
parents:
diff changeset
838 // Visit the unvisited Node. Contains the obvious push to
a61af66fc99e Initial load
duke
parents:
diff changeset
839 // indicate I'm entering a deeper level of recursion. I push the
a61af66fc99e Initial load
duke
parents:
diff changeset
840 // old state onto the _stack and set a new state and loop (recurse).
a61af66fc99e Initial load
duke
parents:
diff changeset
841 _stack.push(self);
a61af66fc99e Initial load
duke
parents:
diff changeset
842 self = unvisited;
a61af66fc99e Initial load
duke
parents:
diff changeset
843 } // End recursion loop
a61af66fc99e Initial load
duke
parents:
diff changeset
844
a61af66fc99e Initial load
duke
parents:
diff changeset
845 return self;
a61af66fc99e Initial load
duke
parents:
diff changeset
846 }
a61af66fc99e Initial load
duke
parents:
diff changeset
847
a61af66fc99e Initial load
duke
parents:
diff changeset
848 //------------------------------ComputeLatenciesBackwards----------------------
a61af66fc99e Initial load
duke
parents:
diff changeset
849 // Compute the latency of all the instructions.
a61af66fc99e Initial load
duke
parents:
diff changeset
850 void PhaseCFG::ComputeLatenciesBackwards(VectorSet &visited, Node_List &stack) {
a61af66fc99e Initial load
duke
parents:
diff changeset
851 #ifndef PRODUCT
a61af66fc99e Initial load
duke
parents:
diff changeset
852 if (trace_opto_pipelining())
a61af66fc99e Initial load
duke
parents:
diff changeset
853 tty->print("\n#---- ComputeLatenciesBackwards ----\n");
a61af66fc99e Initial load
duke
parents:
diff changeset
854 #endif
a61af66fc99e Initial load
duke
parents:
diff changeset
855
12023
d1034bd8cefc 8022284: Hide internal data structure in PhaseCFG
adlertz
parents: 8691
diff changeset
856 Node_Backward_Iterator iter((Node *)_root, visited, stack, *this);
0
a61af66fc99e Initial load
duke
parents:
diff changeset
857 Node *n;
a61af66fc99e Initial load
duke
parents:
diff changeset
858
a61af66fc99e Initial load
duke
parents:
diff changeset
859 // Walk over all the nodes from last to first
a61af66fc99e Initial load
duke
parents:
diff changeset
860 while (n = iter.next()) {
a61af66fc99e Initial load
duke
parents:
diff changeset
861 // Set the latency for the definitions of this instruction
a61af66fc99e Initial load
duke
parents:
diff changeset
862 partial_latency_of_defs(n);
a61af66fc99e Initial load
duke
parents:
diff changeset
863 }
a61af66fc99e Initial load
duke
parents:
diff changeset
864 } // end ComputeLatenciesBackwards
a61af66fc99e Initial load
duke
parents:
diff changeset
865
a61af66fc99e Initial load
duke
parents:
diff changeset
866 //------------------------------partial_latency_of_defs------------------------
a61af66fc99e Initial load
duke
parents:
diff changeset
867 // Compute the latency impact of this node on all defs. This computes
a61af66fc99e Initial load
duke
parents:
diff changeset
868 // a number that increases as we approach the beginning of the routine.
a61af66fc99e Initial load
duke
parents:
diff changeset
869 void PhaseCFG::partial_latency_of_defs(Node *n) {
a61af66fc99e Initial load
duke
parents:
diff changeset
870 // Set the latency for this instruction
a61af66fc99e Initial load
duke
parents:
diff changeset
871 #ifndef PRODUCT
a61af66fc99e Initial load
duke
parents:
diff changeset
872 if (trace_opto_pipelining()) {
a61af66fc99e Initial load
duke
parents:
diff changeset
873 tty->print("# latency_to_inputs: node_latency[%d] = %d for node",
1685
0e35fa8ebccd 6973963: SEGV in ciBlock::start_bci() with EA
kvn
parents: 1552
diff changeset
874 n->_idx, _node_latency->at_grow(n->_idx));
0
a61af66fc99e Initial load
duke
parents:
diff changeset
875 dump();
a61af66fc99e Initial load
duke
parents:
diff changeset
876 }
a61af66fc99e Initial load
duke
parents:
diff changeset
877 #endif
a61af66fc99e Initial load
duke
parents:
diff changeset
878
a61af66fc99e Initial load
duke
parents:
diff changeset
879 if (n->is_Proj())
a61af66fc99e Initial load
duke
parents:
diff changeset
880 n = n->in(0);
a61af66fc99e Initial load
duke
parents:
diff changeset
881
a61af66fc99e Initial load
duke
parents:
diff changeset
882 if (n->is_Root())
a61af66fc99e Initial load
duke
parents:
diff changeset
883 return;
a61af66fc99e Initial load
duke
parents:
diff changeset
884
a61af66fc99e Initial load
duke
parents:
diff changeset
885 uint nlen = n->len();
1685
0e35fa8ebccd 6973963: SEGV in ciBlock::start_bci() with EA
kvn
parents: 1552
diff changeset
886 uint use_latency = _node_latency->at_grow(n->_idx);
12023
d1034bd8cefc 8022284: Hide internal data structure in PhaseCFG
adlertz
parents: 8691
diff changeset
887 uint use_pre_order = get_block_for_node(n)->_pre_order;
0
a61af66fc99e Initial load
duke
parents:
diff changeset
888
a61af66fc99e Initial load
duke
parents:
diff changeset
889 for ( uint j=0; j<nlen; j++ ) {
a61af66fc99e Initial load
duke
parents:
diff changeset
890 Node *def = n->in(j);
a61af66fc99e Initial load
duke
parents:
diff changeset
891
a61af66fc99e Initial load
duke
parents:
diff changeset
892 if (!def || def == n)
a61af66fc99e Initial load
duke
parents:
diff changeset
893 continue;
a61af66fc99e Initial load
duke
parents:
diff changeset
894
a61af66fc99e Initial load
duke
parents:
diff changeset
895 // Walk backwards thru projections
a61af66fc99e Initial load
duke
parents:
diff changeset
896 if (def->is_Proj())
a61af66fc99e Initial load
duke
parents:
diff changeset
897 def = def->in(0);
a61af66fc99e Initial load
duke
parents:
diff changeset
898
a61af66fc99e Initial load
duke
parents:
diff changeset
899 #ifndef PRODUCT
a61af66fc99e Initial load
duke
parents:
diff changeset
900 if (trace_opto_pipelining()) {
a61af66fc99e Initial load
duke
parents:
diff changeset
901 tty->print("# in(%2d): ", j);
a61af66fc99e Initial load
duke
parents:
diff changeset
902 def->dump();
a61af66fc99e Initial load
duke
parents:
diff changeset
903 }
a61af66fc99e Initial load
duke
parents:
diff changeset
904 #endif
a61af66fc99e Initial load
duke
parents:
diff changeset
905
a61af66fc99e Initial load
duke
parents:
diff changeset
906 // If the defining block is not known, assume it is ok
12023
d1034bd8cefc 8022284: Hide internal data structure in PhaseCFG
adlertz
parents: 8691
diff changeset
907 Block *def_block = get_block_for_node(def);
0
a61af66fc99e Initial load
duke
parents:
diff changeset
908 uint def_pre_order = def_block ? def_block->_pre_order : 0;
a61af66fc99e Initial load
duke
parents:
diff changeset
909
a61af66fc99e Initial load
duke
parents:
diff changeset
910 if ( (use_pre_order < def_pre_order) ||
a61af66fc99e Initial load
duke
parents:
diff changeset
911 (use_pre_order == def_pre_order && n->is_Phi()) )
a61af66fc99e Initial load
duke
parents:
diff changeset
912 continue;
a61af66fc99e Initial load
duke
parents:
diff changeset
913
a61af66fc99e Initial load
duke
parents:
diff changeset
914 uint delta_latency = n->latency(j);
a61af66fc99e Initial load
duke
parents:
diff changeset
915 uint current_latency = delta_latency + use_latency;
a61af66fc99e Initial load
duke
parents:
diff changeset
916
1685
0e35fa8ebccd 6973963: SEGV in ciBlock::start_bci() with EA
kvn
parents: 1552
diff changeset
917 if (_node_latency->at_grow(def->_idx) < current_latency) {
0e35fa8ebccd 6973963: SEGV in ciBlock::start_bci() with EA
kvn
parents: 1552
diff changeset
918 _node_latency->at_put_grow(def->_idx, current_latency);
0
a61af66fc99e Initial load
duke
parents:
diff changeset
919 }
a61af66fc99e Initial load
duke
parents:
diff changeset
920
a61af66fc99e Initial load
duke
parents:
diff changeset
921 #ifndef PRODUCT
a61af66fc99e Initial load
duke
parents:
diff changeset
922 if (trace_opto_pipelining()) {
a61af66fc99e Initial load
duke
parents:
diff changeset
923 tty->print_cr("# %d + edge_latency(%d) == %d -> %d, node_latency[%d] = %d",
a61af66fc99e Initial load
duke
parents:
diff changeset
924 use_latency, j, delta_latency, current_latency, def->_idx,
1685
0e35fa8ebccd 6973963: SEGV in ciBlock::start_bci() with EA
kvn
parents: 1552
diff changeset
925 _node_latency->at_grow(def->_idx));
0
a61af66fc99e Initial load
duke
parents:
diff changeset
926 }
a61af66fc99e Initial load
duke
parents:
diff changeset
927 #endif
a61af66fc99e Initial load
duke
parents:
diff changeset
928 }
a61af66fc99e Initial load
duke
parents:
diff changeset
929 }
a61af66fc99e Initial load
duke
parents:
diff changeset
930
a61af66fc99e Initial load
duke
parents:
diff changeset
931 //------------------------------latency_from_use-------------------------------
a61af66fc99e Initial load
duke
parents:
diff changeset
932 // Compute the latency of a specific use
a61af66fc99e Initial load
duke
parents:
diff changeset
933 int PhaseCFG::latency_from_use(Node *n, const Node *def, Node *use) {
a61af66fc99e Initial load
duke
parents:
diff changeset
934 // If self-reference, return no latency
12023
d1034bd8cefc 8022284: Hide internal data structure in PhaseCFG
adlertz
parents: 8691
diff changeset
935 if (use == n || use->is_Root()) {
0
a61af66fc99e Initial load
duke
parents:
diff changeset
936 return 0;
12023
d1034bd8cefc 8022284: Hide internal data structure in PhaseCFG
adlertz
parents: 8691
diff changeset
937 }
0
a61af66fc99e Initial load
duke
parents:
diff changeset
938
12023
d1034bd8cefc 8022284: Hide internal data structure in PhaseCFG
adlertz
parents: 8691
diff changeset
939 uint def_pre_order = get_block_for_node(def)->_pre_order;
0
a61af66fc99e Initial load
duke
parents:
diff changeset
940 uint latency = 0;
a61af66fc99e Initial load
duke
parents:
diff changeset
941
a61af66fc99e Initial load
duke
parents:
diff changeset
942 // If the use is not a projection, then it is simple...
a61af66fc99e Initial load
duke
parents:
diff changeset
943 if (!use->is_Proj()) {
a61af66fc99e Initial load
duke
parents:
diff changeset
944 #ifndef PRODUCT
a61af66fc99e Initial load
duke
parents:
diff changeset
945 if (trace_opto_pipelining()) {
a61af66fc99e Initial load
duke
parents:
diff changeset
946 tty->print("# out(): ");
a61af66fc99e Initial load
duke
parents:
diff changeset
947 use->dump();
a61af66fc99e Initial load
duke
parents:
diff changeset
948 }
a61af66fc99e Initial load
duke
parents:
diff changeset
949 #endif
a61af66fc99e Initial load
duke
parents:
diff changeset
950
12023
d1034bd8cefc 8022284: Hide internal data structure in PhaseCFG
adlertz
parents: 8691
diff changeset
951 uint use_pre_order = get_block_for_node(use)->_pre_order;
0
a61af66fc99e Initial load
duke
parents:
diff changeset
952
a61af66fc99e Initial load
duke
parents:
diff changeset
953 if (use_pre_order < def_pre_order)
a61af66fc99e Initial load
duke
parents:
diff changeset
954 return 0;
a61af66fc99e Initial load
duke
parents:
diff changeset
955
a61af66fc99e Initial load
duke
parents:
diff changeset
956 if (use_pre_order == def_pre_order && use->is_Phi())
a61af66fc99e Initial load
duke
parents:
diff changeset
957 return 0;
a61af66fc99e Initial load
duke
parents:
diff changeset
958
a61af66fc99e Initial load
duke
parents:
diff changeset
959 uint nlen = use->len();
1685
0e35fa8ebccd 6973963: SEGV in ciBlock::start_bci() with EA
kvn
parents: 1552
diff changeset
960 uint nl = _node_latency->at_grow(use->_idx);
0
a61af66fc99e Initial load
duke
parents:
diff changeset
961
a61af66fc99e Initial load
duke
parents:
diff changeset
962 for ( uint j=0; j<nlen; j++ ) {
a61af66fc99e Initial load
duke
parents:
diff changeset
963 if (use->in(j) == n) {
a61af66fc99e Initial load
duke
parents:
diff changeset
964 // Change this if we want local latencies
a61af66fc99e Initial load
duke
parents:
diff changeset
965 uint ul = use->latency(j);
a61af66fc99e Initial load
duke
parents:
diff changeset
966 uint l = ul + nl;
a61af66fc99e Initial load
duke
parents:
diff changeset
967 if (latency < l) latency = l;
a61af66fc99e Initial load
duke
parents:
diff changeset
968 #ifndef PRODUCT
a61af66fc99e Initial load
duke
parents:
diff changeset
969 if (trace_opto_pipelining()) {
a61af66fc99e Initial load
duke
parents:
diff changeset
970 tty->print_cr("# %d + edge_latency(%d) == %d -> %d, latency = %d",
a61af66fc99e Initial load
duke
parents:
diff changeset
971 nl, j, ul, l, latency);
a61af66fc99e Initial load
duke
parents:
diff changeset
972 }
a61af66fc99e Initial load
duke
parents:
diff changeset
973 #endif
a61af66fc99e Initial load
duke
parents:
diff changeset
974 }
a61af66fc99e Initial load
duke
parents:
diff changeset
975 }
a61af66fc99e Initial load
duke
parents:
diff changeset
976 } else {
a61af66fc99e Initial load
duke
parents:
diff changeset
977 // This is a projection, just grab the latency of the use(s)
a61af66fc99e Initial load
duke
parents:
diff changeset
978 for (DUIterator_Fast jmax, j = use->fast_outs(jmax); j < jmax; j++) {
a61af66fc99e Initial load
duke
parents:
diff changeset
979 uint l = latency_from_use(use, def, use->fast_out(j));
a61af66fc99e Initial load
duke
parents:
diff changeset
980 if (latency < l) latency = l;
a61af66fc99e Initial load
duke
parents:
diff changeset
981 }
a61af66fc99e Initial load
duke
parents:
diff changeset
982 }
a61af66fc99e Initial load
duke
parents:
diff changeset
983
a61af66fc99e Initial load
duke
parents:
diff changeset
984 return latency;
a61af66fc99e Initial load
duke
parents:
diff changeset
985 }
a61af66fc99e Initial load
duke
parents:
diff changeset
986
a61af66fc99e Initial load
duke
parents:
diff changeset
987 //------------------------------latency_from_uses------------------------------
a61af66fc99e Initial load
duke
parents:
diff changeset
988 // Compute the latency of this instruction relative to all of it's uses.
a61af66fc99e Initial load
duke
parents:
diff changeset
989 // This computes a number that increases as we approach the beginning of the
a61af66fc99e Initial load
duke
parents:
diff changeset
990 // routine.
a61af66fc99e Initial load
duke
parents:
diff changeset
991 void PhaseCFG::latency_from_uses(Node *n) {
a61af66fc99e Initial load
duke
parents:
diff changeset
992 // Set the latency for this instruction
a61af66fc99e Initial load
duke
parents:
diff changeset
993 #ifndef PRODUCT
a61af66fc99e Initial load
duke
parents:
diff changeset
994 if (trace_opto_pipelining()) {
a61af66fc99e Initial load
duke
parents:
diff changeset
995 tty->print("# latency_from_outputs: node_latency[%d] = %d for node",
1685
0e35fa8ebccd 6973963: SEGV in ciBlock::start_bci() with EA
kvn
parents: 1552
diff changeset
996 n->_idx, _node_latency->at_grow(n->_idx));
0
a61af66fc99e Initial load
duke
parents:
diff changeset
997 dump();
a61af66fc99e Initial load
duke
parents:
diff changeset
998 }
a61af66fc99e Initial load
duke
parents:
diff changeset
999 #endif
a61af66fc99e Initial load
duke
parents:
diff changeset
1000 uint latency=0;
a61af66fc99e Initial load
duke
parents:
diff changeset
1001 const Node *def = n->is_Proj() ? n->in(0): n;
a61af66fc99e Initial load
duke
parents:
diff changeset
1002
a61af66fc99e Initial load
duke
parents:
diff changeset
1003 for (DUIterator_Fast imax, i = n->fast_outs(imax); i < imax; i++) {
a61af66fc99e Initial load
duke
parents:
diff changeset
1004 uint l = latency_from_use(n, def, n->fast_out(i));
a61af66fc99e Initial load
duke
parents:
diff changeset
1005
a61af66fc99e Initial load
duke
parents:
diff changeset
1006 if (latency < l) latency = l;
a61af66fc99e Initial load
duke
parents:
diff changeset
1007 }
a61af66fc99e Initial load
duke
parents:
diff changeset
1008
1685
0e35fa8ebccd 6973963: SEGV in ciBlock::start_bci() with EA
kvn
parents: 1552
diff changeset
1009 _node_latency->at_put_grow(n->_idx, latency);
0
a61af66fc99e Initial load
duke
parents:
diff changeset
1010 }
a61af66fc99e Initial load
duke
parents:
diff changeset
1011
a61af66fc99e Initial load
duke
parents:
diff changeset
1012 //------------------------------hoist_to_cheaper_block-------------------------
a61af66fc99e Initial load
duke
parents:
diff changeset
1013 // Pick a block for node self, between early and LCA, that is a cheaper
a61af66fc99e Initial load
duke
parents:
diff changeset
1014 // alternative to LCA.
a61af66fc99e Initial load
duke
parents:
diff changeset
1015 Block* PhaseCFG::hoist_to_cheaper_block(Block* LCA, Block* early, Node* self) {
a61af66fc99e Initial load
duke
parents:
diff changeset
1016 const double delta = 1+PROB_UNLIKELY_MAG(4);
a61af66fc99e Initial load
duke
parents:
diff changeset
1017 Block* least = LCA;
a61af66fc99e Initial load
duke
parents:
diff changeset
1018 double least_freq = least->_freq;
1685
0e35fa8ebccd 6973963: SEGV in ciBlock::start_bci() with EA
kvn
parents: 1552
diff changeset
1019 uint target = _node_latency->at_grow(self->_idx);
0e35fa8ebccd 6973963: SEGV in ciBlock::start_bci() with EA
kvn
parents: 1552
diff changeset
1020 uint start_latency = _node_latency->at_grow(LCA->_nodes[0]->_idx);
0e35fa8ebccd 6973963: SEGV in ciBlock::start_bci() with EA
kvn
parents: 1552
diff changeset
1021 uint end_latency = _node_latency->at_grow(LCA->_nodes[LCA->end_idx()]->_idx);
0
a61af66fc99e Initial load
duke
parents:
diff changeset
1022 bool in_latency = (target <= start_latency);
12023
d1034bd8cefc 8022284: Hide internal data structure in PhaseCFG
adlertz
parents: 8691
diff changeset
1023 const Block* root_block = get_block_for_node(_root);
0
a61af66fc99e Initial load
duke
parents:
diff changeset
1024
a61af66fc99e Initial load
duke
parents:
diff changeset
1025 // Turn off latency scheduling if scheduling is just plain off
a61af66fc99e Initial load
duke
parents:
diff changeset
1026 if (!C->do_scheduling())
a61af66fc99e Initial load
duke
parents:
diff changeset
1027 in_latency = true;
a61af66fc99e Initial load
duke
parents:
diff changeset
1028
a61af66fc99e Initial load
duke
parents:
diff changeset
1029 // Do not hoist (to cover latency) instructions which target a
a61af66fc99e Initial load
duke
parents:
diff changeset
1030 // single register. Hoisting stretches the live range of the
a61af66fc99e Initial load
duke
parents:
diff changeset
1031 // single register and may force spilling.
a61af66fc99e Initial load
duke
parents:
diff changeset
1032 MachNode* mach = self->is_Mach() ? self->as_Mach() : NULL;
a61af66fc99e Initial load
duke
parents:
diff changeset
1033 if (mach && mach->out_RegMask().is_bound1() && mach->out_RegMask().is_NotEmpty())
a61af66fc99e Initial load
duke
parents:
diff changeset
1034 in_latency = true;
a61af66fc99e Initial load
duke
parents:
diff changeset
1035
a61af66fc99e Initial load
duke
parents:
diff changeset
1036 #ifndef PRODUCT
a61af66fc99e Initial load
duke
parents:
diff changeset
1037 if (trace_opto_pipelining()) {
a61af66fc99e Initial load
duke
parents:
diff changeset
1038 tty->print("# Find cheaper block for latency %d: ",
1685
0e35fa8ebccd 6973963: SEGV in ciBlock::start_bci() with EA
kvn
parents: 1552
diff changeset
1039 _node_latency->at_grow(self->_idx));
0
a61af66fc99e Initial load
duke
parents:
diff changeset
1040 self->dump();
a61af66fc99e Initial load
duke
parents:
diff changeset
1041 tty->print_cr("# B%d: start latency for [%4d]=%d, end latency for [%4d]=%d, freq=%g",
a61af66fc99e Initial load
duke
parents:
diff changeset
1042 LCA->_pre_order,
a61af66fc99e Initial load
duke
parents:
diff changeset
1043 LCA->_nodes[0]->_idx,
a61af66fc99e Initial load
duke
parents:
diff changeset
1044 start_latency,
a61af66fc99e Initial load
duke
parents:
diff changeset
1045 LCA->_nodes[LCA->end_idx()]->_idx,
a61af66fc99e Initial load
duke
parents:
diff changeset
1046 end_latency,
a61af66fc99e Initial load
duke
parents:
diff changeset
1047 least_freq);
a61af66fc99e Initial load
duke
parents:
diff changeset
1048 }
a61af66fc99e Initial load
duke
parents:
diff changeset
1049 #endif
a61af66fc99e Initial load
duke
parents:
diff changeset
1050
8691
571076d3c79d 8009120: Fuzz instruction scheduling in HotSpot compilers
shade
parents: 7196
diff changeset
1051 int cand_cnt = 0; // number of candidates tried
571076d3c79d 8009120: Fuzz instruction scheduling in HotSpot compilers
shade
parents: 7196
diff changeset
1052
0
a61af66fc99e Initial load
duke
parents:
diff changeset
1053 // Walk up the dominator tree from LCA (Lowest common ancestor) to
a61af66fc99e Initial load
duke
parents:
diff changeset
1054 // the earliest legal location. Capture the least execution frequency.
a61af66fc99e Initial load
duke
parents:
diff changeset
1055 while (LCA != early) {
a61af66fc99e Initial load
duke
parents:
diff changeset
1056 LCA = LCA->_idom; // Follow up the dominator tree
a61af66fc99e Initial load
duke
parents:
diff changeset
1057
a61af66fc99e Initial load
duke
parents:
diff changeset
1058 if (LCA == NULL) {
a61af66fc99e Initial load
duke
parents:
diff changeset
1059 // Bailout without retry
a61af66fc99e Initial load
duke
parents:
diff changeset
1060 C->record_method_not_compilable("late schedule failed: LCA == NULL");
a61af66fc99e Initial load
duke
parents:
diff changeset
1061 return least;
a61af66fc99e Initial load
duke
parents:
diff changeset
1062 }
a61af66fc99e Initial load
duke
parents:
diff changeset
1063
a61af66fc99e Initial load
duke
parents:
diff changeset
1064 // Don't hoist machine instructions to the root basic block
a61af66fc99e Initial load
duke
parents:
diff changeset
1065 if (mach && LCA == root_block)
a61af66fc99e Initial load
duke
parents:
diff changeset
1066 break;
a61af66fc99e Initial load
duke
parents:
diff changeset
1067
1685
0e35fa8ebccd 6973963: SEGV in ciBlock::start_bci() with EA
kvn
parents: 1552
diff changeset
1068 uint start_lat = _node_latency->at_grow(LCA->_nodes[0]->_idx);
0
a61af66fc99e Initial load
duke
parents:
diff changeset
1069 uint end_idx = LCA->end_idx();
1685
0e35fa8ebccd 6973963: SEGV in ciBlock::start_bci() with EA
kvn
parents: 1552
diff changeset
1070 uint end_lat = _node_latency->at_grow(LCA->_nodes[end_idx]->_idx);
0
a61af66fc99e Initial load
duke
parents:
diff changeset
1071 double LCA_freq = LCA->_freq;
a61af66fc99e Initial load
duke
parents:
diff changeset
1072 #ifndef PRODUCT
a61af66fc99e Initial load
duke
parents:
diff changeset
1073 if (trace_opto_pipelining()) {
a61af66fc99e Initial load
duke
parents:
diff changeset
1074 tty->print_cr("# B%d: start latency for [%4d]=%d, end latency for [%4d]=%d, freq=%g",
a61af66fc99e Initial load
duke
parents:
diff changeset
1075 LCA->_pre_order, LCA->_nodes[0]->_idx, start_lat, end_idx, end_lat, LCA_freq);
a61af66fc99e Initial load
duke
parents:
diff changeset
1076 }
a61af66fc99e Initial load
duke
parents:
diff changeset
1077 #endif
8691
571076d3c79d 8009120: Fuzz instruction scheduling in HotSpot compilers
shade
parents: 7196
diff changeset
1078 cand_cnt++;
0
a61af66fc99e Initial load
duke
parents:
diff changeset
1079 if (LCA_freq < least_freq || // Better Frequency
8691
571076d3c79d 8009120: Fuzz instruction scheduling in HotSpot compilers
shade
parents: 7196
diff changeset
1080 (StressGCM && Compile::randomized_select(cand_cnt)) || // Should be randomly accepted in stress mode
571076d3c79d 8009120: Fuzz instruction scheduling in HotSpot compilers
shade
parents: 7196
diff changeset
1081 (!StressGCM && // Otherwise, choose with latency
571076d3c79d 8009120: Fuzz instruction scheduling in HotSpot compilers
shade
parents: 7196
diff changeset
1082 !in_latency && // No block containing latency
0
a61af66fc99e Initial load
duke
parents:
diff changeset
1083 LCA_freq < least_freq * delta && // No worse frequency
a61af66fc99e Initial load
duke
parents:
diff changeset
1084 target >= end_lat && // within latency range
a61af66fc99e Initial load
duke
parents:
diff changeset
1085 !self->is_iteratively_computed() ) // But don't hoist IV increments
a61af66fc99e Initial load
duke
parents:
diff changeset
1086 // because they may end up above other uses of their phi forcing
a61af66fc99e Initial load
duke
parents:
diff changeset
1087 // their result register to be different from their input.
a61af66fc99e Initial load
duke
parents:
diff changeset
1088 ) {
a61af66fc99e Initial load
duke
parents:
diff changeset
1089 least = LCA; // Found cheaper block
a61af66fc99e Initial load
duke
parents:
diff changeset
1090 least_freq = LCA_freq;
a61af66fc99e Initial load
duke
parents:
diff changeset
1091 start_latency = start_lat;
a61af66fc99e Initial load
duke
parents:
diff changeset
1092 end_latency = end_lat;
a61af66fc99e Initial load
duke
parents:
diff changeset
1093 if (target <= start_lat)
a61af66fc99e Initial load
duke
parents:
diff changeset
1094 in_latency = true;
a61af66fc99e Initial load
duke
parents:
diff changeset
1095 }
a61af66fc99e Initial load
duke
parents:
diff changeset
1096 }
a61af66fc99e Initial load
duke
parents:
diff changeset
1097
a61af66fc99e Initial load
duke
parents:
diff changeset
1098 #ifndef PRODUCT
a61af66fc99e Initial load
duke
parents:
diff changeset
1099 if (trace_opto_pipelining()) {
a61af66fc99e Initial load
duke
parents:
diff changeset
1100 tty->print_cr("# Choose block B%d with start latency=%d and freq=%g",
a61af66fc99e Initial load
duke
parents:
diff changeset
1101 least->_pre_order, start_latency, least_freq);
a61af66fc99e Initial load
duke
parents:
diff changeset
1102 }
a61af66fc99e Initial load
duke
parents:
diff changeset
1103 #endif
a61af66fc99e Initial load
duke
parents:
diff changeset
1104
a61af66fc99e Initial load
duke
parents:
diff changeset
1105 // See if the latency needs to be updated
a61af66fc99e Initial load
duke
parents:
diff changeset
1106 if (target < end_latency) {
a61af66fc99e Initial load
duke
parents:
diff changeset
1107 #ifndef PRODUCT
a61af66fc99e Initial load
duke
parents:
diff changeset
1108 if (trace_opto_pipelining()) {
a61af66fc99e Initial load
duke
parents:
diff changeset
1109 tty->print_cr("# Change latency for [%4d] from %d to %d", self->_idx, target, end_latency);
a61af66fc99e Initial load
duke
parents:
diff changeset
1110 }
a61af66fc99e Initial load
duke
parents:
diff changeset
1111 #endif
1685
0e35fa8ebccd 6973963: SEGV in ciBlock::start_bci() with EA
kvn
parents: 1552
diff changeset
1112 _node_latency->at_put_grow(self->_idx, end_latency);
0
a61af66fc99e Initial load
duke
parents:
diff changeset
1113 partial_latency_of_defs(self);
a61af66fc99e Initial load
duke
parents:
diff changeset
1114 }
a61af66fc99e Initial load
duke
parents:
diff changeset
1115
a61af66fc99e Initial load
duke
parents:
diff changeset
1116 return least;
a61af66fc99e Initial load
duke
parents:
diff changeset
1117 }
a61af66fc99e Initial load
duke
parents:
diff changeset
1118
a61af66fc99e Initial load
duke
parents:
diff changeset
1119
a61af66fc99e Initial load
duke
parents:
diff changeset
1120 //------------------------------schedule_late-----------------------------------
a61af66fc99e Initial load
duke
parents:
diff changeset
1121 // Now schedule all codes as LATE as possible. This is the LCA in the
a61af66fc99e Initial load
duke
parents:
diff changeset
1122 // dominator tree of all USES of a value. Pick the block with the least
a61af66fc99e Initial load
duke
parents:
diff changeset
1123 // loop nesting depth that is lowest in the dominator tree.
a61af66fc99e Initial load
duke
parents:
diff changeset
1124 extern const char must_clone[];
a61af66fc99e Initial load
duke
parents:
diff changeset
1125 void PhaseCFG::schedule_late(VectorSet &visited, Node_List &stack) {
a61af66fc99e Initial load
duke
parents:
diff changeset
1126 #ifndef PRODUCT
a61af66fc99e Initial load
duke
parents:
diff changeset
1127 if (trace_opto_pipelining())
a61af66fc99e Initial load
duke
parents:
diff changeset
1128 tty->print("\n#---- schedule_late ----\n");
a61af66fc99e Initial load
duke
parents:
diff changeset
1129 #endif
a61af66fc99e Initial load
duke
parents:
diff changeset
1130
12023
d1034bd8cefc 8022284: Hide internal data structure in PhaseCFG
adlertz
parents: 8691
diff changeset
1131 Node_Backward_Iterator iter((Node *)_root, visited, stack, *this);
0
a61af66fc99e Initial load
duke
parents:
diff changeset
1132 Node *self;
a61af66fc99e Initial load
duke
parents:
diff changeset
1133
a61af66fc99e Initial load
duke
parents:
diff changeset
1134 // Walk over all the nodes from last to first
a61af66fc99e Initial load
duke
parents:
diff changeset
1135 while (self = iter.next()) {
12023
d1034bd8cefc 8022284: Hide internal data structure in PhaseCFG
adlertz
parents: 8691
diff changeset
1136 Block* early = get_block_for_node(self); // Earliest legal placement
0
a61af66fc99e Initial load
duke
parents:
diff changeset
1137
a61af66fc99e Initial load
duke
parents:
diff changeset
1138 if (self->is_top()) {
a61af66fc99e Initial load
duke
parents:
diff changeset
1139 // Top node goes in bb #2 with other constants.
a61af66fc99e Initial load
duke
parents:
diff changeset
1140 // It must be special-cased, because it has no out edges.
a61af66fc99e Initial load
duke
parents:
diff changeset
1141 early->add_inst(self);
a61af66fc99e Initial load
duke
parents:
diff changeset
1142 continue;
a61af66fc99e Initial load
duke
parents:
diff changeset
1143 }
a61af66fc99e Initial load
duke
parents:
diff changeset
1144
a61af66fc99e Initial load
duke
parents:
diff changeset
1145 // No uses, just terminate
a61af66fc99e Initial load
duke
parents:
diff changeset
1146 if (self->outcnt() == 0) {
3842
c7b60b601eb4 7069452: Cleanup NodeFlags
kvn
parents: 2426
diff changeset
1147 assert(self->is_MachProj(), "sanity");
0
a61af66fc99e Initial load
duke
parents:
diff changeset
1148 continue; // Must be a dead machine projection
a61af66fc99e Initial load
duke
parents:
diff changeset
1149 }
a61af66fc99e Initial load
duke
parents:
diff changeset
1150
a61af66fc99e Initial load
duke
parents:
diff changeset
1151 // If node is pinned in the block, then no scheduling can be done.
a61af66fc99e Initial load
duke
parents:
diff changeset
1152 if( self->pinned() ) // Pinned in block?
a61af66fc99e Initial load
duke
parents:
diff changeset
1153 continue;
a61af66fc99e Initial load
duke
parents:
diff changeset
1154
a61af66fc99e Initial load
duke
parents:
diff changeset
1155 MachNode* mach = self->is_Mach() ? self->as_Mach() : NULL;
a61af66fc99e Initial load
duke
parents:
diff changeset
1156 if (mach) {
a61af66fc99e Initial load
duke
parents:
diff changeset
1157 switch (mach->ideal_Opcode()) {
a61af66fc99e Initial load
duke
parents:
diff changeset
1158 case Op_CreateEx:
a61af66fc99e Initial load
duke
parents:
diff changeset
1159 // Don't move exception creation
a61af66fc99e Initial load
duke
parents:
diff changeset
1160 early->add_inst(self);
a61af66fc99e Initial load
duke
parents:
diff changeset
1161 continue;
a61af66fc99e Initial load
duke
parents:
diff changeset
1162 break;
a61af66fc99e Initial load
duke
parents:
diff changeset
1163 case Op_CheckCastPP:
a61af66fc99e Initial load
duke
parents:
diff changeset
1164 // Don't move CheckCastPP nodes away from their input, if the input
a61af66fc99e Initial load
duke
parents:
diff changeset
1165 // is a rawptr (5071820).
a61af66fc99e Initial load
duke
parents:
diff changeset
1166 Node *def = self->in(1);
a61af66fc99e Initial load
duke
parents:
diff changeset
1167 if (def != NULL && def->bottom_type()->base() == Type::RawPtr) {
a61af66fc99e Initial load
duke
parents:
diff changeset
1168 early->add_inst(self);
833
acba6af809c8 6840775: Multiple JVM crashes seen with 1.6.0_10 through 1.6.0_14
kvn
parents: 788
diff changeset
1169 #ifdef ASSERT
acba6af809c8 6840775: Multiple JVM crashes seen with 1.6.0_10 through 1.6.0_14
kvn
parents: 788
diff changeset
1170 _raw_oops.push(def);
acba6af809c8 6840775: Multiple JVM crashes seen with 1.6.0_10 through 1.6.0_14
kvn
parents: 788
diff changeset
1171 #endif
0
a61af66fc99e Initial load
duke
parents:
diff changeset
1172 continue;
a61af66fc99e Initial load
duke
parents:
diff changeset
1173 }
a61af66fc99e Initial load
duke
parents:
diff changeset
1174 break;
a61af66fc99e Initial load
duke
parents:
diff changeset
1175 }
a61af66fc99e Initial load
duke
parents:
diff changeset
1176 }
a61af66fc99e Initial load
duke
parents:
diff changeset
1177
a61af66fc99e Initial load
duke
parents:
diff changeset
1178 // Gather LCA of all uses
a61af66fc99e Initial load
duke
parents:
diff changeset
1179 Block *LCA = NULL;
a61af66fc99e Initial load
duke
parents:
diff changeset
1180 {
a61af66fc99e Initial load
duke
parents:
diff changeset
1181 for (DUIterator_Fast imax, i = self->fast_outs(imax); i < imax; i++) {
a61af66fc99e Initial load
duke
parents:
diff changeset
1182 // For all uses, find LCA
a61af66fc99e Initial load
duke
parents:
diff changeset
1183 Node* use = self->fast_out(i);
12023
d1034bd8cefc 8022284: Hide internal data structure in PhaseCFG
adlertz
parents: 8691
diff changeset
1184 LCA = raise_LCA_above_use(LCA, use, self, this);
0
a61af66fc99e Initial load
duke
parents:
diff changeset
1185 }
a61af66fc99e Initial load
duke
parents:
diff changeset
1186 } // (Hide defs of imax, i from rest of block.)
a61af66fc99e Initial load
duke
parents:
diff changeset
1187
a61af66fc99e Initial load
duke
parents:
diff changeset
1188 // Place temps in the block of their use. This isn't a
a61af66fc99e Initial load
duke
parents:
diff changeset
1189 // requirement for correctness but it reduces useless
a61af66fc99e Initial load
duke
parents:
diff changeset
1190 // interference between temps and other nodes.
a61af66fc99e Initial load
duke
parents:
diff changeset
1191 if (mach != NULL && mach->is_MachTemp()) {
12023
d1034bd8cefc 8022284: Hide internal data structure in PhaseCFG
adlertz
parents: 8691
diff changeset
1192 map_node_to_block(self, LCA);
0
a61af66fc99e Initial load
duke
parents:
diff changeset
1193 LCA->add_inst(self);
a61af66fc99e Initial load
duke
parents:
diff changeset
1194 continue;
a61af66fc99e Initial load
duke
parents:
diff changeset
1195 }
a61af66fc99e Initial load
duke
parents:
diff changeset
1196
a61af66fc99e Initial load
duke
parents:
diff changeset
1197 // Check if 'self' could be anti-dependent on memory
a61af66fc99e Initial load
duke
parents:
diff changeset
1198 if (self->needs_anti_dependence_check()) {
a61af66fc99e Initial load
duke
parents:
diff changeset
1199 // Hoist LCA above possible-defs and insert anti-dependences to
a61af66fc99e Initial load
duke
parents:
diff changeset
1200 // defs in new LCA block.
a61af66fc99e Initial load
duke
parents:
diff changeset
1201 LCA = insert_anti_dependences(LCA, self);
a61af66fc99e Initial load
duke
parents:
diff changeset
1202 }
a61af66fc99e Initial load
duke
parents:
diff changeset
1203
a61af66fc99e Initial load
duke
parents:
diff changeset
1204 if (early->_dom_depth > LCA->_dom_depth) {
a61af66fc99e Initial load
duke
parents:
diff changeset
1205 // Somehow the LCA has moved above the earliest legal point.
a61af66fc99e Initial load
duke
parents:
diff changeset
1206 // (One way this can happen is via memory_early_block.)
a61af66fc99e Initial load
duke
parents:
diff changeset
1207 if (C->subsume_loads() == true && !C->failing()) {
a61af66fc99e Initial load
duke
parents:
diff changeset
1208 // Retry with subsume_loads == false
a61af66fc99e Initial load
duke
parents:
diff changeset
1209 // If this is the first failure, the sentinel string will "stick"
a61af66fc99e Initial load
duke
parents:
diff changeset
1210 // to the Compile object, and the C2Compiler will see it and retry.
a61af66fc99e Initial load
duke
parents:
diff changeset
1211 C->record_failure(C2Compiler::retry_no_subsuming_loads());
a61af66fc99e Initial load
duke
parents:
diff changeset
1212 } else {
a61af66fc99e Initial load
duke
parents:
diff changeset
1213 // Bailout without retry when (early->_dom_depth > LCA->_dom_depth)
a61af66fc99e Initial load
duke
parents:
diff changeset
1214 C->record_method_not_compilable("late schedule failed: incorrect graph");
a61af66fc99e Initial load
duke
parents:
diff changeset
1215 }
a61af66fc99e Initial load
duke
parents:
diff changeset
1216 return;
a61af66fc99e Initial load
duke
parents:
diff changeset
1217 }
a61af66fc99e Initial load
duke
parents:
diff changeset
1218
a61af66fc99e Initial load
duke
parents:
diff changeset
1219 // If there is no opportunity to hoist, then we're done.
8691
571076d3c79d 8009120: Fuzz instruction scheduling in HotSpot compilers
shade
parents: 7196
diff changeset
1220 // In stress mode, try to hoist even the single operations.
571076d3c79d 8009120: Fuzz instruction scheduling in HotSpot compilers
shade
parents: 7196
diff changeset
1221 bool try_to_hoist = StressGCM || (LCA != early);
0
a61af66fc99e Initial load
duke
parents:
diff changeset
1222
a61af66fc99e Initial load
duke
parents:
diff changeset
1223 // Must clone guys stay next to use; no hoisting allowed.
a61af66fc99e Initial load
duke
parents:
diff changeset
1224 // Also cannot hoist guys that alter memory or are otherwise not
a61af66fc99e Initial load
duke
parents:
diff changeset
1225 // allocatable (hoisting can make a value live longer, leading to
a61af66fc99e Initial load
duke
parents:
diff changeset
1226 // anti and output dependency problems which are normally resolved
a61af66fc99e Initial load
duke
parents:
diff changeset
1227 // by the register allocator giving everyone a different register).
a61af66fc99e Initial load
duke
parents:
diff changeset
1228 if (mach != NULL && must_clone[mach->ideal_Opcode()])
a61af66fc99e Initial load
duke
parents:
diff changeset
1229 try_to_hoist = false;
a61af66fc99e Initial load
duke
parents:
diff changeset
1230
a61af66fc99e Initial load
duke
parents:
diff changeset
1231 Block* late = NULL;
a61af66fc99e Initial load
duke
parents:
diff changeset
1232 if (try_to_hoist) {
a61af66fc99e Initial load
duke
parents:
diff changeset
1233 // Now find the block with the least execution frequency.
a61af66fc99e Initial load
duke
parents:
diff changeset
1234 // Start at the latest schedule and work up to the earliest schedule
a61af66fc99e Initial load
duke
parents:
diff changeset
1235 // in the dominator tree. Thus the Node will dominate all its uses.
a61af66fc99e Initial load
duke
parents:
diff changeset
1236 late = hoist_to_cheaper_block(LCA, early, self);
a61af66fc99e Initial load
duke
parents:
diff changeset
1237 } else {
a61af66fc99e Initial load
duke
parents:
diff changeset
1238 // Just use the LCA of the uses.
a61af66fc99e Initial load
duke
parents:
diff changeset
1239 late = LCA;
a61af66fc99e Initial load
duke
parents:
diff changeset
1240 }
a61af66fc99e Initial load
duke
parents:
diff changeset
1241
a61af66fc99e Initial load
duke
parents:
diff changeset
1242 // Put the node into target block
a61af66fc99e Initial load
duke
parents:
diff changeset
1243 schedule_node_into_block(self, late);
a61af66fc99e Initial load
duke
parents:
diff changeset
1244
a61af66fc99e Initial load
duke
parents:
diff changeset
1245 #ifdef ASSERT
a61af66fc99e Initial load
duke
parents:
diff changeset
1246 if (self->needs_anti_dependence_check()) {
a61af66fc99e Initial load
duke
parents:
diff changeset
1247 // since precedence edges are only inserted when we're sure they
a61af66fc99e Initial load
duke
parents:
diff changeset
1248 // are needed make sure that after placement in a block we don't
a61af66fc99e Initial load
duke
parents:
diff changeset
1249 // need any new precedence edges.
a61af66fc99e Initial load
duke
parents:
diff changeset
1250 verify_anti_dependences(late, self);
a61af66fc99e Initial load
duke
parents:
diff changeset
1251 }
a61af66fc99e Initial load
duke
parents:
diff changeset
1252 #endif
a61af66fc99e Initial load
duke
parents:
diff changeset
1253 } // Loop until all nodes have been visited
a61af66fc99e Initial load
duke
parents:
diff changeset
1254
a61af66fc99e Initial load
duke
parents:
diff changeset
1255 } // end ScheduleLate
a61af66fc99e Initial load
duke
parents:
diff changeset
1256
a61af66fc99e Initial load
duke
parents:
diff changeset
1257 //------------------------------GlobalCodeMotion-------------------------------
a61af66fc99e Initial load
duke
parents:
diff changeset
1258 void PhaseCFG::GlobalCodeMotion( Matcher &matcher, uint unique, Node_List &proj_list ) {
a61af66fc99e Initial load
duke
parents:
diff changeset
1259 ResourceMark rm;
a61af66fc99e Initial load
duke
parents:
diff changeset
1260
a61af66fc99e Initial load
duke
parents:
diff changeset
1261 #ifndef PRODUCT
a61af66fc99e Initial load
duke
parents:
diff changeset
1262 if (trace_opto_pipelining()) {
a61af66fc99e Initial load
duke
parents:
diff changeset
1263 tty->print("\n---- Start GlobalCodeMotion ----\n");
a61af66fc99e Initial load
duke
parents:
diff changeset
1264 }
a61af66fc99e Initial load
duke
parents:
diff changeset
1265 #endif
a61af66fc99e Initial load
duke
parents:
diff changeset
1266
12023
d1034bd8cefc 8022284: Hide internal data structure in PhaseCFG
adlertz
parents: 8691
diff changeset
1267 // Initialize the node to block mapping for things on the proj_list
d1034bd8cefc 8022284: Hide internal data structure in PhaseCFG
adlertz
parents: 8691
diff changeset
1268 for (uint i = 0; i < proj_list.size(); i++) {
d1034bd8cefc 8022284: Hide internal data structure in PhaseCFG
adlertz
parents: 8691
diff changeset
1269 unmap_node_from_block(proj_list[i]);
d1034bd8cefc 8022284: Hide internal data structure in PhaseCFG
adlertz
parents: 8691
diff changeset
1270 }
0
a61af66fc99e Initial load
duke
parents:
diff changeset
1271
a61af66fc99e Initial load
duke
parents:
diff changeset
1272 // Set the basic block for Nodes pinned into blocks
a61af66fc99e Initial load
duke
parents:
diff changeset
1273 Arena *a = Thread::current()->resource_area();
a61af66fc99e Initial load
duke
parents:
diff changeset
1274 VectorSet visited(a);
a61af66fc99e Initial load
duke
parents:
diff changeset
1275 schedule_pinned_nodes( visited );
a61af66fc99e Initial load
duke
parents:
diff changeset
1276
a61af66fc99e Initial load
duke
parents:
diff changeset
1277 // Find the earliest Block any instruction can be placed in. Some
a61af66fc99e Initial load
duke
parents:
diff changeset
1278 // instructions are pinned into Blocks. Unpinned instructions can
a61af66fc99e Initial load
duke
parents:
diff changeset
1279 // appear in last block in which all their inputs occur.
a61af66fc99e Initial load
duke
parents:
diff changeset
1280 visited.Clear();
a61af66fc99e Initial load
duke
parents:
diff changeset
1281 Node_List stack(a);
a61af66fc99e Initial load
duke
parents:
diff changeset
1282 stack.map( (unique >> 1) + 16, NULL); // Pre-grow the list
a61af66fc99e Initial load
duke
parents:
diff changeset
1283 if (!schedule_early(visited, stack)) {
a61af66fc99e Initial load
duke
parents:
diff changeset
1284 // Bailout without retry
a61af66fc99e Initial load
duke
parents:
diff changeset
1285 C->record_method_not_compilable("early schedule failed");
a61af66fc99e Initial load
duke
parents:
diff changeset
1286 return;
a61af66fc99e Initial load
duke
parents:
diff changeset
1287 }
a61af66fc99e Initial load
duke
parents:
diff changeset
1288
a61af66fc99e Initial load
duke
parents:
diff changeset
1289 // Build Def-Use edges.
a61af66fc99e Initial load
duke
parents:
diff changeset
1290 proj_list.push(_root); // Add real root as another root
a61af66fc99e Initial load
duke
parents:
diff changeset
1291 proj_list.pop();
a61af66fc99e Initial load
duke
parents:
diff changeset
1292
a61af66fc99e Initial load
duke
parents:
diff changeset
1293 // Compute the latency information (via backwards walk) for all the
a61af66fc99e Initial load
duke
parents:
diff changeset
1294 // instructions in the graph
1685
0e35fa8ebccd 6973963: SEGV in ciBlock::start_bci() with EA
kvn
parents: 1552
diff changeset
1295 _node_latency = new GrowableArray<uint>(); // resource_area allocation
0
a61af66fc99e Initial load
duke
parents:
diff changeset
1296
a61af66fc99e Initial load
duke
parents:
diff changeset
1297 if( C->do_scheduling() )
a61af66fc99e Initial load
duke
parents:
diff changeset
1298 ComputeLatenciesBackwards(visited, stack);
a61af66fc99e Initial load
duke
parents:
diff changeset
1299
a61af66fc99e Initial load
duke
parents:
diff changeset
1300 // Now schedule all codes as LATE as possible. This is the LCA in the
a61af66fc99e Initial load
duke
parents:
diff changeset
1301 // dominator tree of all USES of a value. Pick the block with the least
a61af66fc99e Initial load
duke
parents:
diff changeset
1302 // loop nesting depth that is lowest in the dominator tree.
a61af66fc99e Initial load
duke
parents:
diff changeset
1303 // ( visited.Clear() called in schedule_late()->Node_Backward_Iterator() )
a61af66fc99e Initial load
duke
parents:
diff changeset
1304 schedule_late(visited, stack);
a61af66fc99e Initial load
duke
parents:
diff changeset
1305 if( C->failing() ) {
a61af66fc99e Initial load
duke
parents:
diff changeset
1306 // schedule_late fails only when graph is incorrect.
a61af66fc99e Initial load
duke
parents:
diff changeset
1307 assert(!VerifyGraphEdges, "verification should have failed");
a61af66fc99e Initial load
duke
parents:
diff changeset
1308 return;
a61af66fc99e Initial load
duke
parents:
diff changeset
1309 }
a61af66fc99e Initial load
duke
parents:
diff changeset
1310
a61af66fc99e Initial load
duke
parents:
diff changeset
1311 unique = C->unique();
a61af66fc99e Initial load
duke
parents:
diff changeset
1312
a61af66fc99e Initial load
duke
parents:
diff changeset
1313 #ifndef PRODUCT
a61af66fc99e Initial load
duke
parents:
diff changeset
1314 if (trace_opto_pipelining()) {
a61af66fc99e Initial load
duke
parents:
diff changeset
1315 tty->print("\n---- Detect implicit null checks ----\n");
a61af66fc99e Initial load
duke
parents:
diff changeset
1316 }
a61af66fc99e Initial load
duke
parents:
diff changeset
1317 #endif
a61af66fc99e Initial load
duke
parents:
diff changeset
1318
a61af66fc99e Initial load
duke
parents:
diff changeset
1319 // Detect implicit-null-check opportunities. Basically, find NULL checks
a61af66fc99e Initial load
duke
parents:
diff changeset
1320 // with suitable memory ops nearby. Use the memory op to do the NULL check.
a61af66fc99e Initial load
duke
parents:
diff changeset
1321 // I can generate a memory op if there is not one nearby.
a61af66fc99e Initial load
duke
parents:
diff changeset
1322 if (C->is_method_compilation()) {
a61af66fc99e Initial load
duke
parents:
diff changeset
1323 // Don't do it for natives, adapters, or runtime stubs
a61af66fc99e Initial load
duke
parents:
diff changeset
1324 int allowed_reasons = 0;
a61af66fc99e Initial load
duke
parents:
diff changeset
1325 // ...and don't do it when there have been too many traps, globally.
a61af66fc99e Initial load
duke
parents:
diff changeset
1326 for (int reason = (int)Deoptimization::Reason_none+1;
a61af66fc99e Initial load
duke
parents:
diff changeset
1327 reason < Compile::trapHistLength; reason++) {
a61af66fc99e Initial load
duke
parents:
diff changeset
1328 assert(reason < BitsPerInt, "recode bit map");
a61af66fc99e Initial load
duke
parents:
diff changeset
1329 if (!C->too_many_traps((Deoptimization::DeoptReason) reason))
a61af66fc99e Initial load
duke
parents:
diff changeset
1330 allowed_reasons |= nth_bit(reason);
a61af66fc99e Initial load
duke
parents:
diff changeset
1331 }
a61af66fc99e Initial load
duke
parents:
diff changeset
1332 // By reversing the loop direction we get a very minor gain on mpegaudio.
a61af66fc99e Initial load
duke
parents:
diff changeset
1333 // Feel free to revert to a forward loop for clarity.
a61af66fc99e Initial load
duke
parents:
diff changeset
1334 // for( int i=0; i < (int)matcher._null_check_tests.size(); i+=2 ) {
a61af66fc99e Initial load
duke
parents:
diff changeset
1335 for( int i= matcher._null_check_tests.size()-2; i>=0; i-=2 ) {
a61af66fc99e Initial load
duke
parents:
diff changeset
1336 Node *proj = matcher._null_check_tests[i ];
a61af66fc99e Initial load
duke
parents:
diff changeset
1337 Node *val = matcher._null_check_tests[i+1];
12023
d1034bd8cefc 8022284: Hide internal data structure in PhaseCFG
adlertz
parents: 8691
diff changeset
1338 get_block_for_node(proj)->implicit_null_check(this, proj, val, allowed_reasons);
0
a61af66fc99e Initial load
duke
parents:
diff changeset
1339 // The implicit_null_check will only perform the transformation
a61af66fc99e Initial load
duke
parents:
diff changeset
1340 // if the null branch is truly uncommon, *and* it leads to an
a61af66fc99e Initial load
duke
parents:
diff changeset
1341 // uncommon trap. Combined with the too_many_traps guards
a61af66fc99e Initial load
duke
parents:
diff changeset
1342 // above, this prevents SEGV storms reported in 6366351,
a61af66fc99e Initial load
duke
parents:
diff changeset
1343 // by recompiling offending methods without this optimization.
a61af66fc99e Initial load
duke
parents:
diff changeset
1344 }
a61af66fc99e Initial load
duke
parents:
diff changeset
1345 }
a61af66fc99e Initial load
duke
parents:
diff changeset
1346
a61af66fc99e Initial load
duke
parents:
diff changeset
1347 #ifndef PRODUCT
a61af66fc99e Initial load
duke
parents:
diff changeset
1348 if (trace_opto_pipelining()) {
a61af66fc99e Initial load
duke
parents:
diff changeset
1349 tty->print("\n---- Start Local Scheduling ----\n");
a61af66fc99e Initial load
duke
parents:
diff changeset
1350 }
a61af66fc99e Initial load
duke
parents:
diff changeset
1351 #endif
a61af66fc99e Initial load
duke
parents:
diff changeset
1352
a61af66fc99e Initial load
duke
parents:
diff changeset
1353 // Schedule locally. Right now a simple topological sort.
a61af66fc99e Initial load
duke
parents:
diff changeset
1354 // Later, do a real latency aware scheduler.
4820
cf407b7d3d78 7116050: C2/ARM: memory stomping error with DivideMcTests
roland
parents: 4115
diff changeset
1355 uint max_idx = C->unique();
cf407b7d3d78 7116050: C2/ARM: memory stomping error with DivideMcTests
roland
parents: 4115
diff changeset
1356 GrowableArray<int> ready_cnt(max_idx, max_idx, -1);
0
a61af66fc99e Initial load
duke
parents:
diff changeset
1357 visited.Clear();
12023
d1034bd8cefc 8022284: Hide internal data structure in PhaseCFG
adlertz
parents: 8691
diff changeset
1358 for (uint i = 0; i < _num_blocks; i++) {
0
a61af66fc99e Initial load
duke
parents:
diff changeset
1359 if (!_blocks[i]->schedule_local(this, matcher, ready_cnt, visited)) {
a61af66fc99e Initial load
duke
parents:
diff changeset
1360 if (!C->failure_reason_is(C2Compiler::retry_no_subsuming_loads())) {
a61af66fc99e Initial load
duke
parents:
diff changeset
1361 C->record_method_not_compilable("local schedule failed");
a61af66fc99e Initial load
duke
parents:
diff changeset
1362 }
a61af66fc99e Initial load
duke
parents:
diff changeset
1363 return;
a61af66fc99e Initial load
duke
parents:
diff changeset
1364 }
a61af66fc99e Initial load
duke
parents:
diff changeset
1365 }
a61af66fc99e Initial load
duke
parents:
diff changeset
1366
a61af66fc99e Initial load
duke
parents:
diff changeset
1367 // If we inserted any instructions between a Call and his CatchNode,
a61af66fc99e Initial load
duke
parents:
diff changeset
1368 // clone the instructions on all paths below the Catch.
12023
d1034bd8cefc 8022284: Hide internal data structure in PhaseCFG
adlertz
parents: 8691
diff changeset
1369 for (uint i = 0; i < _num_blocks; i++) {
d1034bd8cefc 8022284: Hide internal data structure in PhaseCFG
adlertz
parents: 8691
diff changeset
1370 _blocks[i]->call_catch_cleanup(this, C);
d1034bd8cefc 8022284: Hide internal data structure in PhaseCFG
adlertz
parents: 8691
diff changeset
1371 }
0
a61af66fc99e Initial load
duke
parents:
diff changeset
1372
a61af66fc99e Initial load
duke
parents:
diff changeset
1373 #ifndef PRODUCT
a61af66fc99e Initial load
duke
parents:
diff changeset
1374 if (trace_opto_pipelining()) {
a61af66fc99e Initial load
duke
parents:
diff changeset
1375 tty->print("\n---- After GlobalCodeMotion ----\n");
a61af66fc99e Initial load
duke
parents:
diff changeset
1376 for (uint i = 0; i < _num_blocks; i++) {
a61af66fc99e Initial load
duke
parents:
diff changeset
1377 _blocks[i]->dump();
a61af66fc99e Initial load
duke
parents:
diff changeset
1378 }
a61af66fc99e Initial load
duke
parents:
diff changeset
1379 }
a61af66fc99e Initial load
duke
parents:
diff changeset
1380 #endif
1685
0e35fa8ebccd 6973963: SEGV in ciBlock::start_bci() with EA
kvn
parents: 1552
diff changeset
1381 // Dead.
0e35fa8ebccd 6973963: SEGV in ciBlock::start_bci() with EA
kvn
parents: 1552
diff changeset
1382 _node_latency = (GrowableArray<uint> *)0xdeadbeef;
0
a61af66fc99e Initial load
duke
parents:
diff changeset
1383 }
a61af66fc99e Initial load
duke
parents:
diff changeset
1384
a61af66fc99e Initial load
duke
parents:
diff changeset
1385
a61af66fc99e Initial load
duke
parents:
diff changeset
1386 //------------------------------Estimate_Block_Frequency-----------------------
a61af66fc99e Initial load
duke
parents:
diff changeset
1387 // Estimate block frequencies based on IfNode probabilities.
a61af66fc99e Initial load
duke
parents:
diff changeset
1388 void PhaseCFG::Estimate_Block_Frequency() {
418
72c5366e5d86 6743900: frequency based block layout
rasbold
parents: 308
diff changeset
1389
72c5366e5d86 6743900: frequency based block layout
rasbold
parents: 308
diff changeset
1390 // Force conditional branches leading to uncommon traps to be unlikely,
72c5366e5d86 6743900: frequency based block layout
rasbold
parents: 308
diff changeset
1391 // not because we get to the uncommon_trap with less relative frequency,
72c5366e5d86 6743900: frequency based block layout
rasbold
parents: 308
diff changeset
1392 // but because an uncommon_trap typically causes a deopt, so we only get
72c5366e5d86 6743900: frequency based block layout
rasbold
parents: 308
diff changeset
1393 // there once.
72c5366e5d86 6743900: frequency based block layout
rasbold
parents: 308
diff changeset
1394 if (C->do_freq_based_layout()) {
72c5366e5d86 6743900: frequency based block layout
rasbold
parents: 308
diff changeset
1395 Block_List worklist;
72c5366e5d86 6743900: frequency based block layout
rasbold
parents: 308
diff changeset
1396 Block* root_blk = _blocks[0];
72c5366e5d86 6743900: frequency based block layout
rasbold
parents: 308
diff changeset
1397 for (uint i = 1; i < root_blk->num_preds(); i++) {
12023
d1034bd8cefc 8022284: Hide internal data structure in PhaseCFG
adlertz
parents: 8691
diff changeset
1398 Block *pb = get_block_for_node(root_blk->pred(i));
418
72c5366e5d86 6743900: frequency based block layout
rasbold
parents: 308
diff changeset
1399 if (pb->has_uncommon_code()) {
72c5366e5d86 6743900: frequency based block layout
rasbold
parents: 308
diff changeset
1400 worklist.push(pb);
72c5366e5d86 6743900: frequency based block layout
rasbold
parents: 308
diff changeset
1401 }
72c5366e5d86 6743900: frequency based block layout
rasbold
parents: 308
diff changeset
1402 }
72c5366e5d86 6743900: frequency based block layout
rasbold
parents: 308
diff changeset
1403 while (worklist.size() > 0) {
72c5366e5d86 6743900: frequency based block layout
rasbold
parents: 308
diff changeset
1404 Block* uct = worklist.pop();
72c5366e5d86 6743900: frequency based block layout
rasbold
parents: 308
diff changeset
1405 if (uct == _broot) continue;
72c5366e5d86 6743900: frequency based block layout
rasbold
parents: 308
diff changeset
1406 for (uint i = 1; i < uct->num_preds(); i++) {
12023
d1034bd8cefc 8022284: Hide internal data structure in PhaseCFG
adlertz
parents: 8691
diff changeset
1407 Block *pb = get_block_for_node(uct->pred(i));
418
72c5366e5d86 6743900: frequency based block layout
rasbold
parents: 308
diff changeset
1408 if (pb->_num_succs == 1) {
72c5366e5d86 6743900: frequency based block layout
rasbold
parents: 308
diff changeset
1409 worklist.push(pb);
72c5366e5d86 6743900: frequency based block layout
rasbold
parents: 308
diff changeset
1410 } else if (pb->num_fall_throughs() == 2) {
72c5366e5d86 6743900: frequency based block layout
rasbold
parents: 308
diff changeset
1411 pb->update_uncommon_branch(uct);
72c5366e5d86 6743900: frequency based block layout
rasbold
parents: 308
diff changeset
1412 }
72c5366e5d86 6743900: frequency based block layout
rasbold
parents: 308
diff changeset
1413 }
72c5366e5d86 6743900: frequency based block layout
rasbold
parents: 308
diff changeset
1414 }
72c5366e5d86 6743900: frequency based block layout
rasbold
parents: 308
diff changeset
1415 }
0
a61af66fc99e Initial load
duke
parents:
diff changeset
1416
a61af66fc99e Initial load
duke
parents:
diff changeset
1417 // Create the loop tree and calculate loop depth.
a61af66fc99e Initial load
duke
parents:
diff changeset
1418 _root_loop = create_loop_tree();
a61af66fc99e Initial load
duke
parents:
diff changeset
1419 _root_loop->compute_loop_depth(0);
a61af66fc99e Initial load
duke
parents:
diff changeset
1420
a61af66fc99e Initial load
duke
parents:
diff changeset
1421 // Compute block frequency of each block, relative to a single loop entry.
a61af66fc99e Initial load
duke
parents:
diff changeset
1422 _root_loop->compute_freq();
a61af66fc99e Initial load
duke
parents:
diff changeset
1423
a61af66fc99e Initial load
duke
parents:
diff changeset
1424 // Adjust all frequencies to be relative to a single method entry
418
72c5366e5d86 6743900: frequency based block layout
rasbold
parents: 308
diff changeset
1425 _root_loop->_freq = 1.0;
0
a61af66fc99e Initial load
duke
parents:
diff changeset
1426 _root_loop->scale_freq();
a61af66fc99e Initial load
duke
parents:
diff changeset
1427
673
fbc12e71c476 6810845: Performance regression in mpegaudio on x64
kvn
parents: 628
diff changeset
1428 // Save outmost loop frequency for LRG frequency threshold
fbc12e71c476 6810845: Performance regression in mpegaudio on x64
kvn
parents: 628
diff changeset
1429 _outer_loop_freq = _root_loop->outer_loop_freq();
fbc12e71c476 6810845: Performance regression in mpegaudio on x64
kvn
parents: 628
diff changeset
1430
0
a61af66fc99e Initial load
duke
parents:
diff changeset
1431 // force paths ending at uncommon traps to be infrequent
418
72c5366e5d86 6743900: frequency based block layout
rasbold
parents: 308
diff changeset
1432 if (!C->do_freq_based_layout()) {
72c5366e5d86 6743900: frequency based block layout
rasbold
parents: 308
diff changeset
1433 Block_List worklist;
72c5366e5d86 6743900: frequency based block layout
rasbold
parents: 308
diff changeset
1434 Block* root_blk = _blocks[0];
72c5366e5d86 6743900: frequency based block layout
rasbold
parents: 308
diff changeset
1435 for (uint i = 1; i < root_blk->num_preds(); i++) {
12023
d1034bd8cefc 8022284: Hide internal data structure in PhaseCFG
adlertz
parents: 8691
diff changeset
1436 Block *pb = get_block_for_node(root_blk->pred(i));
418
72c5366e5d86 6743900: frequency based block layout
rasbold
parents: 308
diff changeset
1437 if (pb->has_uncommon_code()) {
72c5366e5d86 6743900: frequency based block layout
rasbold
parents: 308
diff changeset
1438 worklist.push(pb);
72c5366e5d86 6743900: frequency based block layout
rasbold
parents: 308
diff changeset
1439 }
0
a61af66fc99e Initial load
duke
parents:
diff changeset
1440 }
418
72c5366e5d86 6743900: frequency based block layout
rasbold
parents: 308
diff changeset
1441 while (worklist.size() > 0) {
72c5366e5d86 6743900: frequency based block layout
rasbold
parents: 308
diff changeset
1442 Block* uct = worklist.pop();
72c5366e5d86 6743900: frequency based block layout
rasbold
parents: 308
diff changeset
1443 uct->_freq = PROB_MIN;
72c5366e5d86 6743900: frequency based block layout
rasbold
parents: 308
diff changeset
1444 for (uint i = 1; i < uct->num_preds(); i++) {
12023
d1034bd8cefc 8022284: Hide internal data structure in PhaseCFG
adlertz
parents: 8691
diff changeset
1445 Block *pb = get_block_for_node(uct->pred(i));
418
72c5366e5d86 6743900: frequency based block layout
rasbold
parents: 308
diff changeset
1446 if (pb->_num_succs == 1 && pb->_freq > PROB_MIN) {
72c5366e5d86 6743900: frequency based block layout
rasbold
parents: 308
diff changeset
1447 worklist.push(pb);
72c5366e5d86 6743900: frequency based block layout
rasbold
parents: 308
diff changeset
1448 }
0
a61af66fc99e Initial load
duke
parents:
diff changeset
1449 }
a61af66fc99e Initial load
duke
parents:
diff changeset
1450 }
a61af66fc99e Initial load
duke
parents:
diff changeset
1451 }
a61af66fc99e Initial load
duke
parents:
diff changeset
1452
552
011517bbcd7b 6784930: server jvm fails with assert(!n->is_SpillCopy(),"")
kvn
parents: 418
diff changeset
1453 #ifdef ASSERT
011517bbcd7b 6784930: server jvm fails with assert(!n->is_SpillCopy(),"")
kvn
parents: 418
diff changeset
1454 for (uint i = 0; i < _num_blocks; i++ ) {
011517bbcd7b 6784930: server jvm fails with assert(!n->is_SpillCopy(),"")
kvn
parents: 418
diff changeset
1455 Block *b = _blocks[i];
605
98cb887364d3 6810672: Comment typos
twisti
parents: 601
diff changeset
1456 assert(b->_freq >= MIN_BLOCK_FREQUENCY, "Register Allocator requires meaningful block frequency");
552
011517bbcd7b 6784930: server jvm fails with assert(!n->is_SpillCopy(),"")
kvn
parents: 418
diff changeset
1457 }
011517bbcd7b 6784930: server jvm fails with assert(!n->is_SpillCopy(),"")
kvn
parents: 418
diff changeset
1458 #endif
011517bbcd7b 6784930: server jvm fails with assert(!n->is_SpillCopy(),"")
kvn
parents: 418
diff changeset
1459
0
a61af66fc99e Initial load
duke
parents:
diff changeset
1460 #ifndef PRODUCT
a61af66fc99e Initial load
duke
parents:
diff changeset
1461 if (PrintCFGBlockFreq) {
a61af66fc99e Initial load
duke
parents:
diff changeset
1462 tty->print_cr("CFG Block Frequencies");
a61af66fc99e Initial load
duke
parents:
diff changeset
1463 _root_loop->dump_tree();
a61af66fc99e Initial load
duke
parents:
diff changeset
1464 if (Verbose) {
a61af66fc99e Initial load
duke
parents:
diff changeset
1465 tty->print_cr("PhaseCFG dump");
a61af66fc99e Initial load
duke
parents:
diff changeset
1466 dump();
a61af66fc99e Initial load
duke
parents:
diff changeset
1467 tty->print_cr("Node dump");
a61af66fc99e Initial load
duke
parents:
diff changeset
1468 _root->dump(99999);
a61af66fc99e Initial load
duke
parents:
diff changeset
1469 }
a61af66fc99e Initial load
duke
parents:
diff changeset
1470 }
a61af66fc99e Initial load
duke
parents:
diff changeset
1471 #endif
a61af66fc99e Initial load
duke
parents:
diff changeset
1472 }
a61af66fc99e Initial load
duke
parents:
diff changeset
1473
a61af66fc99e Initial load
duke
parents:
diff changeset
1474 //----------------------------create_loop_tree--------------------------------
a61af66fc99e Initial load
duke
parents:
diff changeset
1475 // Create a loop tree from the CFG
a61af66fc99e Initial load
duke
parents:
diff changeset
1476 CFGLoop* PhaseCFG::create_loop_tree() {
a61af66fc99e Initial load
duke
parents:
diff changeset
1477
a61af66fc99e Initial load
duke
parents:
diff changeset
1478 #ifdef ASSERT
a61af66fc99e Initial load
duke
parents:
diff changeset
1479 assert( _blocks[0] == _broot, "" );
a61af66fc99e Initial load
duke
parents:
diff changeset
1480 for (uint i = 0; i < _num_blocks; i++ ) {
a61af66fc99e Initial load
duke
parents:
diff changeset
1481 Block *b = _blocks[i];
a61af66fc99e Initial load
duke
parents:
diff changeset
1482 // Check that _loop field are clear...we could clear them if not.
a61af66fc99e Initial load
duke
parents:
diff changeset
1483 assert(b->_loop == NULL, "clear _loop expected");
a61af66fc99e Initial load
duke
parents:
diff changeset
1484 // Sanity check that the RPO numbering is reflected in the _blocks array.
a61af66fc99e Initial load
duke
parents:
diff changeset
1485 // It doesn't have to be for the loop tree to be built, but if it is not,
a61af66fc99e Initial load
duke
parents:
diff changeset
1486 // then the blocks have been reordered since dom graph building...which
a61af66fc99e Initial load
duke
parents:
diff changeset
1487 // may question the RPO numbering
a61af66fc99e Initial load
duke
parents:
diff changeset
1488 assert(b->_rpo == i, "unexpected reverse post order number");
a61af66fc99e Initial load
duke
parents:
diff changeset
1489 }
a61af66fc99e Initial load
duke
parents:
diff changeset
1490 #endif
a61af66fc99e Initial load
duke
parents:
diff changeset
1491
a61af66fc99e Initial load
duke
parents:
diff changeset
1492 int idct = 0;
a61af66fc99e Initial load
duke
parents:
diff changeset
1493 CFGLoop* root_loop = new CFGLoop(idct++);
a61af66fc99e Initial load
duke
parents:
diff changeset
1494
a61af66fc99e Initial load
duke
parents:
diff changeset
1495 Block_List worklist;
a61af66fc99e Initial load
duke
parents:
diff changeset
1496
a61af66fc99e Initial load
duke
parents:
diff changeset
1497 // Assign blocks to loops
a61af66fc99e Initial load
duke
parents:
diff changeset
1498 for(uint i = _num_blocks - 1; i > 0; i-- ) { // skip Root block
a61af66fc99e Initial load
duke
parents:
diff changeset
1499 Block *b = _blocks[i];
a61af66fc99e Initial load
duke
parents:
diff changeset
1500
a61af66fc99e Initial load
duke
parents:
diff changeset
1501 if (b->head()->is_Loop()) {
a61af66fc99e Initial load
duke
parents:
diff changeset
1502 Block* loop_head = b;
a61af66fc99e Initial load
duke
parents:
diff changeset
1503 assert(loop_head->num_preds() - 1 == 2, "loop must have 2 predecessors");
a61af66fc99e Initial load
duke
parents:
diff changeset
1504 Node* tail_n = loop_head->pred(LoopNode::LoopBackControl);
12023
d1034bd8cefc 8022284: Hide internal data structure in PhaseCFG
adlertz
parents: 8691
diff changeset
1505 Block* tail = get_block_for_node(tail_n);
0
a61af66fc99e Initial load
duke
parents:
diff changeset
1506
a61af66fc99e Initial load
duke
parents:
diff changeset
1507 // Defensively filter out Loop nodes for non-single-entry loops.
a61af66fc99e Initial load
duke
parents:
diff changeset
1508 // For all reasonable loops, the head occurs before the tail in RPO.
a61af66fc99e Initial load
duke
parents:
diff changeset
1509 if (i <= tail->_rpo) {
a61af66fc99e Initial load
duke
parents:
diff changeset
1510
a61af66fc99e Initial load
duke
parents:
diff changeset
1511 // The tail and (recursive) predecessors of the tail
a61af66fc99e Initial load
duke
parents:
diff changeset
1512 // are made members of a new loop.
a61af66fc99e Initial load
duke
parents:
diff changeset
1513
a61af66fc99e Initial load
duke
parents:
diff changeset
1514 assert(worklist.size() == 0, "nonempty worklist");
a61af66fc99e Initial load
duke
parents:
diff changeset
1515 CFGLoop* nloop = new CFGLoop(idct++);
a61af66fc99e Initial load
duke
parents:
diff changeset
1516 assert(loop_head->_loop == NULL, "just checking");
a61af66fc99e Initial load
duke
parents:
diff changeset
1517 loop_head->_loop = nloop;
a61af66fc99e Initial load
duke
parents:
diff changeset
1518 // Add to nloop so push_pred() will skip over inner loops
a61af66fc99e Initial load
duke
parents:
diff changeset
1519 nloop->add_member(loop_head);
12023
d1034bd8cefc 8022284: Hide internal data structure in PhaseCFG
adlertz
parents: 8691
diff changeset
1520 nloop->push_pred(loop_head, LoopNode::LoopBackControl, worklist, this);
0
a61af66fc99e Initial load
duke
parents:
diff changeset
1521
a61af66fc99e Initial load
duke
parents:
diff changeset
1522 while (worklist.size() > 0) {
a61af66fc99e Initial load
duke
parents:
diff changeset
1523 Block* member = worklist.pop();
a61af66fc99e Initial load
duke
parents:
diff changeset
1524 if (member != loop_head) {
a61af66fc99e Initial load
duke
parents:
diff changeset
1525 for (uint j = 1; j < member->num_preds(); j++) {
12023
d1034bd8cefc 8022284: Hide internal data structure in PhaseCFG
adlertz
parents: 8691
diff changeset
1526 nloop->push_pred(member, j, worklist, this);
0
a61af66fc99e Initial load
duke
parents:
diff changeset
1527 }
a61af66fc99e Initial load
duke
parents:
diff changeset
1528 }
a61af66fc99e Initial load
duke
parents:
diff changeset
1529 }
a61af66fc99e Initial load
duke
parents:
diff changeset
1530 }
a61af66fc99e Initial load
duke
parents:
diff changeset
1531 }
a61af66fc99e Initial load
duke
parents:
diff changeset
1532 }
a61af66fc99e Initial load
duke
parents:
diff changeset
1533
a61af66fc99e Initial load
duke
parents:
diff changeset
1534 // Create a member list for each loop consisting
a61af66fc99e Initial load
duke
parents:
diff changeset
1535 // of both blocks and (immediate child) loops.
a61af66fc99e Initial load
duke
parents:
diff changeset
1536 for (uint i = 0; i < _num_blocks; i++) {
a61af66fc99e Initial load
duke
parents:
diff changeset
1537 Block *b = _blocks[i];
a61af66fc99e Initial load
duke
parents:
diff changeset
1538 CFGLoop* lp = b->_loop;
a61af66fc99e Initial load
duke
parents:
diff changeset
1539 if (lp == NULL) {
a61af66fc99e Initial load
duke
parents:
diff changeset
1540 // Not assigned to a loop. Add it to the method's pseudo loop.
a61af66fc99e Initial load
duke
parents:
diff changeset
1541 b->_loop = root_loop;
a61af66fc99e Initial load
duke
parents:
diff changeset
1542 lp = root_loop;
a61af66fc99e Initial load
duke
parents:
diff changeset
1543 }
a61af66fc99e Initial load
duke
parents:
diff changeset
1544 if (lp == root_loop || b != lp->head()) { // loop heads are already members
a61af66fc99e Initial load
duke
parents:
diff changeset
1545 lp->add_member(b);
a61af66fc99e Initial load
duke
parents:
diff changeset
1546 }
a61af66fc99e Initial load
duke
parents:
diff changeset
1547 if (lp != root_loop) {
a61af66fc99e Initial load
duke
parents:
diff changeset
1548 if (lp->parent() == NULL) {
a61af66fc99e Initial load
duke
parents:
diff changeset
1549 // Not a nested loop. Make it a child of the method's pseudo loop.
a61af66fc99e Initial load
duke
parents:
diff changeset
1550 root_loop->add_nested_loop(lp);
a61af66fc99e Initial load
duke
parents:
diff changeset
1551 }
a61af66fc99e Initial load
duke
parents:
diff changeset
1552 if (b == lp->head()) {
a61af66fc99e Initial load
duke
parents:
diff changeset
1553 // Add nested loop to member list of parent loop.
a61af66fc99e Initial load
duke
parents:
diff changeset
1554 lp->parent()->add_member(lp);
a61af66fc99e Initial load
duke
parents:
diff changeset
1555 }
a61af66fc99e Initial load
duke
parents:
diff changeset
1556 }
a61af66fc99e Initial load
duke
parents:
diff changeset
1557 }
a61af66fc99e Initial load
duke
parents:
diff changeset
1558
a61af66fc99e Initial load
duke
parents:
diff changeset
1559 return root_loop;
a61af66fc99e Initial load
duke
parents:
diff changeset
1560 }
a61af66fc99e Initial load
duke
parents:
diff changeset
1561
a61af66fc99e Initial load
duke
parents:
diff changeset
1562 //------------------------------push_pred--------------------------------------
12023
d1034bd8cefc 8022284: Hide internal data structure in PhaseCFG
adlertz
parents: 8691
diff changeset
1563 void CFGLoop::push_pred(Block* blk, int i, Block_List& worklist, PhaseCFG* cfg) {
0
a61af66fc99e Initial load
duke
parents:
diff changeset
1564 Node* pred_n = blk->pred(i);
12023
d1034bd8cefc 8022284: Hide internal data structure in PhaseCFG
adlertz
parents: 8691
diff changeset
1565 Block* pred = cfg->get_block_for_node(pred_n);
0
a61af66fc99e Initial load
duke
parents:
diff changeset
1566 CFGLoop *pred_loop = pred->_loop;
a61af66fc99e Initial load
duke
parents:
diff changeset
1567 if (pred_loop == NULL) {
a61af66fc99e Initial load
duke
parents:
diff changeset
1568 // Filter out blocks for non-single-entry loops.
a61af66fc99e Initial load
duke
parents:
diff changeset
1569 // For all reasonable loops, the head occurs before the tail in RPO.
a61af66fc99e Initial load
duke
parents:
diff changeset
1570 if (pred->_rpo > head()->_rpo) {
a61af66fc99e Initial load
duke
parents:
diff changeset
1571 pred->_loop = this;
a61af66fc99e Initial load
duke
parents:
diff changeset
1572 worklist.push(pred);
a61af66fc99e Initial load
duke
parents:
diff changeset
1573 }
a61af66fc99e Initial load
duke
parents:
diff changeset
1574 } else if (pred_loop != this) {
a61af66fc99e Initial load
duke
parents:
diff changeset
1575 // Nested loop.
a61af66fc99e Initial load
duke
parents:
diff changeset
1576 while (pred_loop->_parent != NULL && pred_loop->_parent != this) {
a61af66fc99e Initial load
duke
parents:
diff changeset
1577 pred_loop = pred_loop->_parent;
a61af66fc99e Initial load
duke
parents:
diff changeset
1578 }
a61af66fc99e Initial load
duke
parents:
diff changeset
1579 // Make pred's loop be a child
a61af66fc99e Initial load
duke
parents:
diff changeset
1580 if (pred_loop->_parent == NULL) {
a61af66fc99e Initial load
duke
parents:
diff changeset
1581 add_nested_loop(pred_loop);
a61af66fc99e Initial load
duke
parents:
diff changeset
1582 // Continue with loop entry predecessor.
a61af66fc99e Initial load
duke
parents:
diff changeset
1583 Block* pred_head = pred_loop->head();
a61af66fc99e Initial load
duke
parents:
diff changeset
1584 assert(pred_head->num_preds() - 1 == 2, "loop must have 2 predecessors");
a61af66fc99e Initial load
duke
parents:
diff changeset
1585 assert(pred_head != head(), "loop head in only one loop");
12023
d1034bd8cefc 8022284: Hide internal data structure in PhaseCFG
adlertz
parents: 8691
diff changeset
1586 push_pred(pred_head, LoopNode::EntryControl, worklist, cfg);
0
a61af66fc99e Initial load
duke
parents:
diff changeset
1587 } else {
a61af66fc99e Initial load
duke
parents:
diff changeset
1588 assert(pred_loop->_parent == this && _parent == NULL, "just checking");
a61af66fc99e Initial load
duke
parents:
diff changeset
1589 }
a61af66fc99e Initial load
duke
parents:
diff changeset
1590 }
a61af66fc99e Initial load
duke
parents:
diff changeset
1591 }
a61af66fc99e Initial load
duke
parents:
diff changeset
1592
a61af66fc99e Initial load
duke
parents:
diff changeset
1593 //------------------------------add_nested_loop--------------------------------
a61af66fc99e Initial load
duke
parents:
diff changeset
1594 // Make cl a child of the current loop in the loop tree.
a61af66fc99e Initial load
duke
parents:
diff changeset
1595 void CFGLoop::add_nested_loop(CFGLoop* cl) {
a61af66fc99e Initial load
duke
parents:
diff changeset
1596 assert(_parent == NULL, "no parent yet");
a61af66fc99e Initial load
duke
parents:
diff changeset
1597 assert(cl != this, "not my own parent");
a61af66fc99e Initial load
duke
parents:
diff changeset
1598 cl->_parent = this;
a61af66fc99e Initial load
duke
parents:
diff changeset
1599 CFGLoop* ch = _child;
a61af66fc99e Initial load
duke
parents:
diff changeset
1600 if (ch == NULL) {
a61af66fc99e Initial load
duke
parents:
diff changeset
1601 _child = cl;
a61af66fc99e Initial load
duke
parents:
diff changeset
1602 } else {
a61af66fc99e Initial load
duke
parents:
diff changeset
1603 while (ch->_sibling != NULL) { ch = ch->_sibling; }
a61af66fc99e Initial load
duke
parents:
diff changeset
1604 ch->_sibling = cl;
a61af66fc99e Initial load
duke
parents:
diff changeset
1605 }
a61af66fc99e Initial load
duke
parents:
diff changeset
1606 }
a61af66fc99e Initial load
duke
parents:
diff changeset
1607
a61af66fc99e Initial load
duke
parents:
diff changeset
1608 //------------------------------compute_loop_depth-----------------------------
a61af66fc99e Initial load
duke
parents:
diff changeset
1609 // Store the loop depth in each CFGLoop object.
a61af66fc99e Initial load
duke
parents:
diff changeset
1610 // Recursively walk the children to do the same for them.
a61af66fc99e Initial load
duke
parents:
diff changeset
1611 void CFGLoop::compute_loop_depth(int depth) {
a61af66fc99e Initial load
duke
parents:
diff changeset
1612 _depth = depth;
a61af66fc99e Initial load
duke
parents:
diff changeset
1613 CFGLoop* ch = _child;
a61af66fc99e Initial load
duke
parents:
diff changeset
1614 while (ch != NULL) {
a61af66fc99e Initial load
duke
parents:
diff changeset
1615 ch->compute_loop_depth(depth + 1);
a61af66fc99e Initial load
duke
parents:
diff changeset
1616 ch = ch->_sibling;
a61af66fc99e Initial load
duke
parents:
diff changeset
1617 }
a61af66fc99e Initial load
duke
parents:
diff changeset
1618 }
a61af66fc99e Initial load
duke
parents:
diff changeset
1619
a61af66fc99e Initial load
duke
parents:
diff changeset
1620 //------------------------------compute_freq-----------------------------------
a61af66fc99e Initial load
duke
parents:
diff changeset
1621 // Compute the frequency of each block and loop, relative to a single entry
a61af66fc99e Initial load
duke
parents:
diff changeset
1622 // into the dominating loop head.
a61af66fc99e Initial load
duke
parents:
diff changeset
1623 void CFGLoop::compute_freq() {
a61af66fc99e Initial load
duke
parents:
diff changeset
1624 // Bottom up traversal of loop tree (visit inner loops first.)
a61af66fc99e Initial load
duke
parents:
diff changeset
1625 // Set loop head frequency to 1.0, then transitively
a61af66fc99e Initial load
duke
parents:
diff changeset
1626 // compute frequency for all successors in the loop,
a61af66fc99e Initial load
duke
parents:
diff changeset
1627 // as well as for each exit edge. Inner loops are
a61af66fc99e Initial load
duke
parents:
diff changeset
1628 // treated as single blocks with loop exit targets
a61af66fc99e Initial load
duke
parents:
diff changeset
1629 // as the successor blocks.
a61af66fc99e Initial load
duke
parents:
diff changeset
1630
a61af66fc99e Initial load
duke
parents:
diff changeset
1631 // Nested loops first
a61af66fc99e Initial load
duke
parents:
diff changeset
1632 CFGLoop* ch = _child;
a61af66fc99e Initial load
duke
parents:
diff changeset
1633 while (ch != NULL) {
a61af66fc99e Initial load
duke
parents:
diff changeset
1634 ch->compute_freq();
a61af66fc99e Initial load
duke
parents:
diff changeset
1635 ch = ch->_sibling;
a61af66fc99e Initial load
duke
parents:
diff changeset
1636 }
a61af66fc99e Initial load
duke
parents:
diff changeset
1637 assert (_members.length() > 0, "no empty loops");
a61af66fc99e Initial load
duke
parents:
diff changeset
1638 Block* hd = head();
a61af66fc99e Initial load
duke
parents:
diff changeset
1639 hd->_freq = 1.0f;
a61af66fc99e Initial load
duke
parents:
diff changeset
1640 for (int i = 0; i < _members.length(); i++) {
a61af66fc99e Initial load
duke
parents:
diff changeset
1641 CFGElement* s = _members.at(i);
a61af66fc99e Initial load
duke
parents:
diff changeset
1642 float freq = s->_freq;
a61af66fc99e Initial load
duke
parents:
diff changeset
1643 if (s->is_block()) {
a61af66fc99e Initial load
duke
parents:
diff changeset
1644 Block* b = s->as_Block();
a61af66fc99e Initial load
duke
parents:
diff changeset
1645 for (uint j = 0; j < b->_num_succs; j++) {
a61af66fc99e Initial load
duke
parents:
diff changeset
1646 Block* sb = b->_succs[j];
a61af66fc99e Initial load
duke
parents:
diff changeset
1647 update_succ_freq(sb, freq * b->succ_prob(j));
a61af66fc99e Initial load
duke
parents:
diff changeset
1648 }
a61af66fc99e Initial load
duke
parents:
diff changeset
1649 } else {
a61af66fc99e Initial load
duke
parents:
diff changeset
1650 CFGLoop* lp = s->as_CFGLoop();
a61af66fc99e Initial load
duke
parents:
diff changeset
1651 assert(lp->_parent == this, "immediate child");
a61af66fc99e Initial load
duke
parents:
diff changeset
1652 for (int k = 0; k < lp->_exits.length(); k++) {
a61af66fc99e Initial load
duke
parents:
diff changeset
1653 Block* eb = lp->_exits.at(k).get_target();
a61af66fc99e Initial load
duke
parents:
diff changeset
1654 float prob = lp->_exits.at(k).get_prob();
a61af66fc99e Initial load
duke
parents:
diff changeset
1655 update_succ_freq(eb, freq * prob);
a61af66fc99e Initial load
duke
parents:
diff changeset
1656 }
a61af66fc99e Initial load
duke
parents:
diff changeset
1657 }
a61af66fc99e Initial load
duke
parents:
diff changeset
1658 }
a61af66fc99e Initial load
duke
parents:
diff changeset
1659
a61af66fc99e Initial load
duke
parents:
diff changeset
1660 // For all loops other than the outer, "method" loop,
a61af66fc99e Initial load
duke
parents:
diff changeset
1661 // sum and normalize the exit probability. The "method" loop
a61af66fc99e Initial load
duke
parents:
diff changeset
1662 // should keep the initial exit probability of 1, so that
a61af66fc99e Initial load
duke
parents:
diff changeset
1663 // inner blocks do not get erroneously scaled.
a61af66fc99e Initial load
duke
parents:
diff changeset
1664 if (_depth != 0) {
a61af66fc99e Initial load
duke
parents:
diff changeset
1665 // Total the exit probabilities for this loop.
a61af66fc99e Initial load
duke
parents:
diff changeset
1666 float exits_sum = 0.0f;
a61af66fc99e Initial load
duke
parents:
diff changeset
1667 for (int i = 0; i < _exits.length(); i++) {
a61af66fc99e Initial load
duke
parents:
diff changeset
1668 exits_sum += _exits.at(i).get_prob();
a61af66fc99e Initial load
duke
parents:
diff changeset
1669 }
a61af66fc99e Initial load
duke
parents:
diff changeset
1670
a61af66fc99e Initial load
duke
parents:
diff changeset
1671 // Normalize the exit probabilities. Until now, the
a61af66fc99e Initial load
duke
parents:
diff changeset
1672 // probabilities estimate the possibility of exit per
a61af66fc99e Initial load
duke
parents:
diff changeset
1673 // a single loop iteration; afterward, they estimate
a61af66fc99e Initial load
duke
parents:
diff changeset
1674 // the probability of exit per loop entry.
a61af66fc99e Initial load
duke
parents:
diff changeset
1675 for (int i = 0; i < _exits.length(); i++) {
a61af66fc99e Initial load
duke
parents:
diff changeset
1676 Block* et = _exits.at(i).get_target();
418
72c5366e5d86 6743900: frequency based block layout
rasbold
parents: 308
diff changeset
1677 float new_prob = 0.0f;
72c5366e5d86 6743900: frequency based block layout
rasbold
parents: 308
diff changeset
1678 if (_exits.at(i).get_prob() > 0.0f) {
72c5366e5d86 6743900: frequency based block layout
rasbold
parents: 308
diff changeset
1679 new_prob = _exits.at(i).get_prob() / exits_sum;
72c5366e5d86 6743900: frequency based block layout
rasbold
parents: 308
diff changeset
1680 }
0
a61af66fc99e Initial load
duke
parents:
diff changeset
1681 BlockProbPair bpp(et, new_prob);
a61af66fc99e Initial load
duke
parents:
diff changeset
1682 _exits.at_put(i, bpp);
a61af66fc99e Initial load
duke
parents:
diff changeset
1683 }
a61af66fc99e Initial load
duke
parents:
diff changeset
1684
418
72c5366e5d86 6743900: frequency based block layout
rasbold
parents: 308
diff changeset
1685 // Save the total, but guard against unreasonable probability,
0
a61af66fc99e Initial load
duke
parents:
diff changeset
1686 // as the value is used to estimate the loop trip count.
a61af66fc99e Initial load
duke
parents:
diff changeset
1687 // An infinite trip count would blur relative block
a61af66fc99e Initial load
duke
parents:
diff changeset
1688 // frequencies.
a61af66fc99e Initial load
duke
parents:
diff changeset
1689 if (exits_sum > 1.0f) exits_sum = 1.0;
a61af66fc99e Initial load
duke
parents:
diff changeset
1690 if (exits_sum < PROB_MIN) exits_sum = PROB_MIN;
a61af66fc99e Initial load
duke
parents:
diff changeset
1691 _exit_prob = exits_sum;
a61af66fc99e Initial load
duke
parents:
diff changeset
1692 }
a61af66fc99e Initial load
duke
parents:
diff changeset
1693 }
a61af66fc99e Initial load
duke
parents:
diff changeset
1694
a61af66fc99e Initial load
duke
parents:
diff changeset
1695 //------------------------------succ_prob-------------------------------------
a61af66fc99e Initial load
duke
parents:
diff changeset
1696 // Determine the probability of reaching successor 'i' from the receiver block.
a61af66fc99e Initial load
duke
parents:
diff changeset
1697 float Block::succ_prob(uint i) {
a61af66fc99e Initial load
duke
parents:
diff changeset
1698 int eidx = end_idx();
a61af66fc99e Initial load
duke
parents:
diff changeset
1699 Node *n = _nodes[eidx]; // Get ending Node
308
756b58154237 6611837: block frequency is zero
rasbold
parents: 235
diff changeset
1700
756b58154237 6611837: block frequency is zero
rasbold
parents: 235
diff changeset
1701 int op = n->Opcode();
756b58154237 6611837: block frequency is zero
rasbold
parents: 235
diff changeset
1702 if (n->is_Mach()) {
756b58154237 6611837: block frequency is zero
rasbold
parents: 235
diff changeset
1703 if (n->is_MachNullCheck()) {
756b58154237 6611837: block frequency is zero
rasbold
parents: 235
diff changeset
1704 // Can only reach here if called after lcm. The original Op_If is gone,
756b58154237 6611837: block frequency is zero
rasbold
parents: 235
diff changeset
1705 // so we attempt to infer the probability from one or both of the
756b58154237 6611837: block frequency is zero
rasbold
parents: 235
diff changeset
1706 // successor blocks.
756b58154237 6611837: block frequency is zero
rasbold
parents: 235
diff changeset
1707 assert(_num_succs == 2, "expecting 2 successors of a null check");
756b58154237 6611837: block frequency is zero
rasbold
parents: 235
diff changeset
1708 // If either successor has only one predecessor, then the
605
98cb887364d3 6810672: Comment typos
twisti
parents: 601
diff changeset
1709 // probability estimate can be derived using the
308
756b58154237 6611837: block frequency is zero
rasbold
parents: 235
diff changeset
1710 // relative frequency of the successor and this block.
756b58154237 6611837: block frequency is zero
rasbold
parents: 235
diff changeset
1711 if (_succs[i]->num_preds() == 2) {
756b58154237 6611837: block frequency is zero
rasbold
parents: 235
diff changeset
1712 return _succs[i]->_freq / _freq;
756b58154237 6611837: block frequency is zero
rasbold
parents: 235
diff changeset
1713 } else if (_succs[1-i]->num_preds() == 2) {
756b58154237 6611837: block frequency is zero
rasbold
parents: 235
diff changeset
1714 return 1 - (_succs[1-i]->_freq / _freq);
756b58154237 6611837: block frequency is zero
rasbold
parents: 235
diff changeset
1715 } else {
756b58154237 6611837: block frequency is zero
rasbold
parents: 235
diff changeset
1716 // Estimate using both successor frequencies
756b58154237 6611837: block frequency is zero
rasbold
parents: 235
diff changeset
1717 float freq = _succs[i]->_freq;
756b58154237 6611837: block frequency is zero
rasbold
parents: 235
diff changeset
1718 return freq / (freq + _succs[1-i]->_freq);
756b58154237 6611837: block frequency is zero
rasbold
parents: 235
diff changeset
1719 }
756b58154237 6611837: block frequency is zero
rasbold
parents: 235
diff changeset
1720 }
756b58154237 6611837: block frequency is zero
rasbold
parents: 235
diff changeset
1721 op = n->as_Mach()->ideal_Opcode();
756b58154237 6611837: block frequency is zero
rasbold
parents: 235
diff changeset
1722 }
756b58154237 6611837: block frequency is zero
rasbold
parents: 235
diff changeset
1723
0
a61af66fc99e Initial load
duke
parents:
diff changeset
1724
a61af66fc99e Initial load
duke
parents:
diff changeset
1725 // Switch on branch type
a61af66fc99e Initial load
duke
parents:
diff changeset
1726 switch( op ) {
a61af66fc99e Initial load
duke
parents:
diff changeset
1727 case Op_CountedLoopEnd:
a61af66fc99e Initial load
duke
parents:
diff changeset
1728 case Op_If: {
a61af66fc99e Initial load
duke
parents:
diff changeset
1729 assert (i < 2, "just checking");
a61af66fc99e Initial load
duke
parents:
diff changeset
1730 // Conditionals pass on only part of their frequency
a61af66fc99e Initial load
duke
parents:
diff changeset
1731 float prob = n->as_MachIf()->_prob;
a61af66fc99e Initial load
duke
parents:
diff changeset
1732 assert(prob >= 0.0 && prob <= 1.0, "out of range probability");
a61af66fc99e Initial load
duke
parents:
diff changeset
1733 // If succ[i] is the FALSE branch, invert path info
a61af66fc99e Initial load
duke
parents:
diff changeset
1734 if( _nodes[i + eidx + 1]->Opcode() == Op_IfFalse ) {
a61af66fc99e Initial load
duke
parents:
diff changeset
1735 return 1.0f - prob; // not taken
a61af66fc99e Initial load
duke
parents:
diff changeset
1736 } else {
a61af66fc99e Initial load
duke
parents:
diff changeset
1737 return prob; // taken
a61af66fc99e Initial load
duke
parents:
diff changeset
1738 }
a61af66fc99e Initial load
duke
parents:
diff changeset
1739 }
a61af66fc99e Initial load
duke
parents:
diff changeset
1740
a61af66fc99e Initial load
duke
parents:
diff changeset
1741 case Op_Jump:
a61af66fc99e Initial load
duke
parents:
diff changeset
1742 // Divide the frequency between all successors evenly
a61af66fc99e Initial load
duke
parents:
diff changeset
1743 return 1.0f/_num_succs;
a61af66fc99e Initial load
duke
parents:
diff changeset
1744
a61af66fc99e Initial load
duke
parents:
diff changeset
1745 case Op_Catch: {
a61af66fc99e Initial load
duke
parents:
diff changeset
1746 const CatchProjNode *ci = _nodes[i + eidx + 1]->as_CatchProj();
a61af66fc99e Initial load
duke
parents:
diff changeset
1747 if (ci->_con == CatchProjNode::fall_through_index) {
a61af66fc99e Initial load
duke
parents:
diff changeset
1748 // Fall-thru path gets the lion's share.
a61af66fc99e Initial load
duke
parents:
diff changeset
1749 return 1.0f - PROB_UNLIKELY_MAG(5)*_num_succs;
a61af66fc99e Initial load
duke
parents:
diff changeset
1750 } else {
a61af66fc99e Initial load
duke
parents:
diff changeset
1751 // Presume exceptional paths are equally unlikely
a61af66fc99e Initial load
duke
parents:
diff changeset
1752 return PROB_UNLIKELY_MAG(5);
a61af66fc99e Initial load
duke
parents:
diff changeset
1753 }
a61af66fc99e Initial load
duke
parents:
diff changeset
1754 }
a61af66fc99e Initial load
duke
parents:
diff changeset
1755
a61af66fc99e Initial load
duke
parents:
diff changeset
1756 case Op_Root:
a61af66fc99e Initial load
duke
parents:
diff changeset
1757 case Op_Goto:
a61af66fc99e Initial load
duke
parents:
diff changeset
1758 // Pass frequency straight thru to target
a61af66fc99e Initial load
duke
parents:
diff changeset
1759 return 1.0f;
a61af66fc99e Initial load
duke
parents:
diff changeset
1760
a61af66fc99e Initial load
duke
parents:
diff changeset
1761 case Op_NeverBranch:
a61af66fc99e Initial load
duke
parents:
diff changeset
1762 return 0.0f;
a61af66fc99e Initial load
duke
parents:
diff changeset
1763
a61af66fc99e Initial load
duke
parents:
diff changeset
1764 case Op_TailCall:
a61af66fc99e Initial load
duke
parents:
diff changeset
1765 case Op_TailJump:
a61af66fc99e Initial load
duke
parents:
diff changeset
1766 case Op_Return:
a61af66fc99e Initial load
duke
parents:
diff changeset
1767 case Op_Halt:
a61af66fc99e Initial load
duke
parents:
diff changeset
1768 case Op_Rethrow:
a61af66fc99e Initial load
duke
parents:
diff changeset
1769 // Do not push out freq to root block
a61af66fc99e Initial load
duke
parents:
diff changeset
1770 return 0.0f;
a61af66fc99e Initial load
duke
parents:
diff changeset
1771
a61af66fc99e Initial load
duke
parents:
diff changeset
1772 default:
a61af66fc99e Initial load
duke
parents:
diff changeset
1773 ShouldNotReachHere();
a61af66fc99e Initial load
duke
parents:
diff changeset
1774 }
a61af66fc99e Initial load
duke
parents:
diff changeset
1775
a61af66fc99e Initial load
duke
parents:
diff changeset
1776 return 0.0f;
a61af66fc99e Initial load
duke
parents:
diff changeset
1777 }
a61af66fc99e Initial load
duke
parents:
diff changeset
1778
418
72c5366e5d86 6743900: frequency based block layout
rasbold
parents: 308
diff changeset
1779 //------------------------------num_fall_throughs-----------------------------
72c5366e5d86 6743900: frequency based block layout
rasbold
parents: 308
diff changeset
1780 // Return the number of fall-through candidates for a block
72c5366e5d86 6743900: frequency based block layout
rasbold
parents: 308
diff changeset
1781 int Block::num_fall_throughs() {
72c5366e5d86 6743900: frequency based block layout
rasbold
parents: 308
diff changeset
1782 int eidx = end_idx();
72c5366e5d86 6743900: frequency based block layout
rasbold
parents: 308
diff changeset
1783 Node *n = _nodes[eidx]; // Get ending Node
72c5366e5d86 6743900: frequency based block layout
rasbold
parents: 308
diff changeset
1784
72c5366e5d86 6743900: frequency based block layout
rasbold
parents: 308
diff changeset
1785 int op = n->Opcode();
72c5366e5d86 6743900: frequency based block layout
rasbold
parents: 308
diff changeset
1786 if (n->is_Mach()) {
72c5366e5d86 6743900: frequency based block layout
rasbold
parents: 308
diff changeset
1787 if (n->is_MachNullCheck()) {
72c5366e5d86 6743900: frequency based block layout
rasbold
parents: 308
diff changeset
1788 // In theory, either side can fall-thru, for simplicity sake,
72c5366e5d86 6743900: frequency based block layout
rasbold
parents: 308
diff changeset
1789 // let's say only the false branch can now.
72c5366e5d86 6743900: frequency based block layout
rasbold
parents: 308
diff changeset
1790 return 1;
72c5366e5d86 6743900: frequency based block layout
rasbold
parents: 308
diff changeset
1791 }
72c5366e5d86 6743900: frequency based block layout
rasbold
parents: 308
diff changeset
1792 op = n->as_Mach()->ideal_Opcode();
72c5366e5d86 6743900: frequency based block layout
rasbold
parents: 308
diff changeset
1793 }
72c5366e5d86 6743900: frequency based block layout
rasbold
parents: 308
diff changeset
1794
72c5366e5d86 6743900: frequency based block layout
rasbold
parents: 308
diff changeset
1795 // Switch on branch type
72c5366e5d86 6743900: frequency based block layout
rasbold
parents: 308
diff changeset
1796 switch( op ) {
72c5366e5d86 6743900: frequency based block layout
rasbold
parents: 308
diff changeset
1797 case Op_CountedLoopEnd:
72c5366e5d86 6743900: frequency based block layout
rasbold
parents: 308
diff changeset
1798 case Op_If:
72c5366e5d86 6743900: frequency based block layout
rasbold
parents: 308
diff changeset
1799 return 2;
72c5366e5d86 6743900: frequency based block layout
rasbold
parents: 308
diff changeset
1800
72c5366e5d86 6743900: frequency based block layout
rasbold
parents: 308
diff changeset
1801 case Op_Root:
72c5366e5d86 6743900: frequency based block layout
rasbold
parents: 308
diff changeset
1802 case Op_Goto:
72c5366e5d86 6743900: frequency based block layout
rasbold
parents: 308
diff changeset
1803 return 1;
72c5366e5d86 6743900: frequency based block layout
rasbold
parents: 308
diff changeset
1804
72c5366e5d86 6743900: frequency based block layout
rasbold
parents: 308
diff changeset
1805 case Op_Catch: {
72c5366e5d86 6743900: frequency based block layout
rasbold
parents: 308
diff changeset
1806 for (uint i = 0; i < _num_succs; i++) {
72c5366e5d86 6743900: frequency based block layout
rasbold
parents: 308
diff changeset
1807 const CatchProjNode *ci = _nodes[i + eidx + 1]->as_CatchProj();
72c5366e5d86 6743900: frequency based block layout
rasbold
parents: 308
diff changeset
1808 if (ci->_con == CatchProjNode::fall_through_index) {
72c5366e5d86 6743900: frequency based block layout
rasbold
parents: 308
diff changeset
1809 return 1;
72c5366e5d86 6743900: frequency based block layout
rasbold
parents: 308
diff changeset
1810 }
72c5366e5d86 6743900: frequency based block layout
rasbold
parents: 308
diff changeset
1811 }
72c5366e5d86 6743900: frequency based block layout
rasbold
parents: 308
diff changeset
1812 return 0;
72c5366e5d86 6743900: frequency based block layout
rasbold
parents: 308
diff changeset
1813 }
72c5366e5d86 6743900: frequency based block layout
rasbold
parents: 308
diff changeset
1814
72c5366e5d86 6743900: frequency based block layout
rasbold
parents: 308
diff changeset
1815 case Op_Jump:
72c5366e5d86 6743900: frequency based block layout
rasbold
parents: 308
diff changeset
1816 case Op_NeverBranch:
72c5366e5d86 6743900: frequency based block layout
rasbold
parents: 308
diff changeset
1817 case Op_TailCall:
72c5366e5d86 6743900: frequency based block layout
rasbold
parents: 308
diff changeset
1818 case Op_TailJump:
72c5366e5d86 6743900: frequency based block layout
rasbold
parents: 308
diff changeset
1819 case Op_Return:
72c5366e5d86 6743900: frequency based block layout
rasbold
parents: 308
diff changeset
1820 case Op_Halt:
72c5366e5d86 6743900: frequency based block layout
rasbold
parents: 308
diff changeset
1821 case Op_Rethrow:
72c5366e5d86 6743900: frequency based block layout
rasbold
parents: 308
diff changeset
1822 return 0;
72c5366e5d86 6743900: frequency based block layout
rasbold
parents: 308
diff changeset
1823
72c5366e5d86 6743900: frequency based block layout
rasbold
parents: 308
diff changeset
1824 default:
72c5366e5d86 6743900: frequency based block layout
rasbold
parents: 308
diff changeset
1825 ShouldNotReachHere();
72c5366e5d86 6743900: frequency based block layout
rasbold
parents: 308
diff changeset
1826 }
72c5366e5d86 6743900: frequency based block layout
rasbold
parents: 308
diff changeset
1827
72c5366e5d86 6743900: frequency based block layout
rasbold
parents: 308
diff changeset
1828 return 0;
72c5366e5d86 6743900: frequency based block layout
rasbold
parents: 308
diff changeset
1829 }
72c5366e5d86 6743900: frequency based block layout
rasbold
parents: 308
diff changeset
1830
72c5366e5d86 6743900: frequency based block layout
rasbold
parents: 308
diff changeset
1831 //------------------------------succ_fall_through-----------------------------
72c5366e5d86 6743900: frequency based block layout
rasbold
parents: 308
diff changeset
1832 // Return true if a specific successor could be fall-through target.
72c5366e5d86 6743900: frequency based block layout
rasbold
parents: 308
diff changeset
1833 bool Block::succ_fall_through(uint i) {
72c5366e5d86 6743900: frequency based block layout
rasbold
parents: 308
diff changeset
1834 int eidx = end_idx();
72c5366e5d86 6743900: frequency based block layout
rasbold
parents: 308
diff changeset
1835 Node *n = _nodes[eidx]; // Get ending Node
72c5366e5d86 6743900: frequency based block layout
rasbold
parents: 308
diff changeset
1836
72c5366e5d86 6743900: frequency based block layout
rasbold
parents: 308
diff changeset
1837 int op = n->Opcode();
72c5366e5d86 6743900: frequency based block layout
rasbold
parents: 308
diff changeset
1838 if (n->is_Mach()) {
72c5366e5d86 6743900: frequency based block layout
rasbold
parents: 308
diff changeset
1839 if (n->is_MachNullCheck()) {
72c5366e5d86 6743900: frequency based block layout
rasbold
parents: 308
diff changeset
1840 // In theory, either side can fall-thru, for simplicity sake,
72c5366e5d86 6743900: frequency based block layout
rasbold
parents: 308
diff changeset
1841 // let's say only the false branch can now.
72c5366e5d86 6743900: frequency based block layout
rasbold
parents: 308
diff changeset
1842 return _nodes[i + eidx + 1]->Opcode() == Op_IfFalse;
72c5366e5d86 6743900: frequency based block layout
rasbold
parents: 308
diff changeset
1843 }
72c5366e5d86 6743900: frequency based block layout
rasbold
parents: 308
diff changeset
1844 op = n->as_Mach()->ideal_Opcode();
72c5366e5d86 6743900: frequency based block layout
rasbold
parents: 308
diff changeset
1845 }
72c5366e5d86 6743900: frequency based block layout
rasbold
parents: 308
diff changeset
1846
72c5366e5d86 6743900: frequency based block layout
rasbold
parents: 308
diff changeset
1847 // Switch on branch type
72c5366e5d86 6743900: frequency based block layout
rasbold
parents: 308
diff changeset
1848 switch( op ) {
72c5366e5d86 6743900: frequency based block layout
rasbold
parents: 308
diff changeset
1849 case Op_CountedLoopEnd:
72c5366e5d86 6743900: frequency based block layout
rasbold
parents: 308
diff changeset
1850 case Op_If:
72c5366e5d86 6743900: frequency based block layout
rasbold
parents: 308
diff changeset
1851 case Op_Root:
72c5366e5d86 6743900: frequency based block layout
rasbold
parents: 308
diff changeset
1852 case Op_Goto:
72c5366e5d86 6743900: frequency based block layout
rasbold
parents: 308
diff changeset
1853 return true;
72c5366e5d86 6743900: frequency based block layout
rasbold
parents: 308
diff changeset
1854
72c5366e5d86 6743900: frequency based block layout
rasbold
parents: 308
diff changeset
1855 case Op_Catch: {
72c5366e5d86 6743900: frequency based block layout
rasbold
parents: 308
diff changeset
1856 const CatchProjNode *ci = _nodes[i + eidx + 1]->as_CatchProj();
72c5366e5d86 6743900: frequency based block layout
rasbold
parents: 308
diff changeset
1857 return ci->_con == CatchProjNode::fall_through_index;
72c5366e5d86 6743900: frequency based block layout
rasbold
parents: 308
diff changeset
1858 }
72c5366e5d86 6743900: frequency based block layout
rasbold
parents: 308
diff changeset
1859
72c5366e5d86 6743900: frequency based block layout
rasbold
parents: 308
diff changeset
1860 case Op_Jump:
72c5366e5d86 6743900: frequency based block layout
rasbold
parents: 308
diff changeset
1861 case Op_NeverBranch:
72c5366e5d86 6743900: frequency based block layout
rasbold
parents: 308
diff changeset
1862 case Op_TailCall:
72c5366e5d86 6743900: frequency based block layout
rasbold
parents: 308
diff changeset
1863 case Op_TailJump:
72c5366e5d86 6743900: frequency based block layout
rasbold
parents: 308
diff changeset
1864 case Op_Return:
72c5366e5d86 6743900: frequency based block layout
rasbold
parents: 308
diff changeset
1865 case Op_Halt:
72c5366e5d86 6743900: frequency based block layout
rasbold
parents: 308
diff changeset
1866 case Op_Rethrow:
72c5366e5d86 6743900: frequency based block layout
rasbold
parents: 308
diff changeset
1867 return false;
72c5366e5d86 6743900: frequency based block layout
rasbold
parents: 308
diff changeset
1868
72c5366e5d86 6743900: frequency based block layout
rasbold
parents: 308
diff changeset
1869 default:
72c5366e5d86 6743900: frequency based block layout
rasbold
parents: 308
diff changeset
1870 ShouldNotReachHere();
72c5366e5d86 6743900: frequency based block layout
rasbold
parents: 308
diff changeset
1871 }
72c5366e5d86 6743900: frequency based block layout
rasbold
parents: 308
diff changeset
1872
72c5366e5d86 6743900: frequency based block layout
rasbold
parents: 308
diff changeset
1873 return false;
72c5366e5d86 6743900: frequency based block layout
rasbold
parents: 308
diff changeset
1874 }
72c5366e5d86 6743900: frequency based block layout
rasbold
parents: 308
diff changeset
1875
72c5366e5d86 6743900: frequency based block layout
rasbold
parents: 308
diff changeset
1876 //------------------------------update_uncommon_branch------------------------
72c5366e5d86 6743900: frequency based block layout
rasbold
parents: 308
diff changeset
1877 // Update the probability of a two-branch to be uncommon
72c5366e5d86 6743900: frequency based block layout
rasbold
parents: 308
diff changeset
1878 void Block::update_uncommon_branch(Block* ub) {
72c5366e5d86 6743900: frequency based block layout
rasbold
parents: 308
diff changeset
1879 int eidx = end_idx();
72c5366e5d86 6743900: frequency based block layout
rasbold
parents: 308
diff changeset
1880 Node *n = _nodes[eidx]; // Get ending Node
72c5366e5d86 6743900: frequency based block layout
rasbold
parents: 308
diff changeset
1881
72c5366e5d86 6743900: frequency based block layout
rasbold
parents: 308
diff changeset
1882 int op = n->as_Mach()->ideal_Opcode();
72c5366e5d86 6743900: frequency based block layout
rasbold
parents: 308
diff changeset
1883
72c5366e5d86 6743900: frequency based block layout
rasbold
parents: 308
diff changeset
1884 assert(op == Op_CountedLoopEnd || op == Op_If, "must be a If");
72c5366e5d86 6743900: frequency based block layout
rasbold
parents: 308
diff changeset
1885 assert(num_fall_throughs() == 2, "must be a two way branch block");
72c5366e5d86 6743900: frequency based block layout
rasbold
parents: 308
diff changeset
1886
72c5366e5d86 6743900: frequency based block layout
rasbold
parents: 308
diff changeset
1887 // Which successor is ub?
72c5366e5d86 6743900: frequency based block layout
rasbold
parents: 308
diff changeset
1888 uint s;
72c5366e5d86 6743900: frequency based block layout
rasbold
parents: 308
diff changeset
1889 for (s = 0; s <_num_succs; s++) {
72c5366e5d86 6743900: frequency based block layout
rasbold
parents: 308
diff changeset
1890 if (_succs[s] == ub) break;
72c5366e5d86 6743900: frequency based block layout
rasbold
parents: 308
diff changeset
1891 }
72c5366e5d86 6743900: frequency based block layout
rasbold
parents: 308
diff changeset
1892 assert(s < 2, "uncommon successor must be found");
72c5366e5d86 6743900: frequency based block layout
rasbold
parents: 308
diff changeset
1893
72c5366e5d86 6743900: frequency based block layout
rasbold
parents: 308
diff changeset
1894 // If ub is the true path, make the proability small, else
72c5366e5d86 6743900: frequency based block layout
rasbold
parents: 308
diff changeset
1895 // ub is the false path, and make the probability large
72c5366e5d86 6743900: frequency based block layout
rasbold
parents: 308
diff changeset
1896 bool invert = (_nodes[s + eidx + 1]->Opcode() == Op_IfFalse);
72c5366e5d86 6743900: frequency based block layout
rasbold
parents: 308
diff changeset
1897
72c5366e5d86 6743900: frequency based block layout
rasbold
parents: 308
diff changeset
1898 // Get existing probability
72c5366e5d86 6743900: frequency based block layout
rasbold
parents: 308
diff changeset
1899 float p = n->as_MachIf()->_prob;
72c5366e5d86 6743900: frequency based block layout
rasbold
parents: 308
diff changeset
1900
72c5366e5d86 6743900: frequency based block layout
rasbold
parents: 308
diff changeset
1901 if (invert) p = 1.0 - p;
72c5366e5d86 6743900: frequency based block layout
rasbold
parents: 308
diff changeset
1902 if (p > PROB_MIN) {
72c5366e5d86 6743900: frequency based block layout
rasbold
parents: 308
diff changeset
1903 p = PROB_MIN;
72c5366e5d86 6743900: frequency based block layout
rasbold
parents: 308
diff changeset
1904 }
72c5366e5d86 6743900: frequency based block layout
rasbold
parents: 308
diff changeset
1905 if (invert) p = 1.0 - p;
72c5366e5d86 6743900: frequency based block layout
rasbold
parents: 308
diff changeset
1906
72c5366e5d86 6743900: frequency based block layout
rasbold
parents: 308
diff changeset
1907 n->as_MachIf()->_prob = p;
72c5366e5d86 6743900: frequency based block layout
rasbold
parents: 308
diff changeset
1908 }
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rasbold
parents: 308
diff changeset
1909
0
a61af66fc99e Initial load
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parents:
diff changeset
1910 //------------------------------update_succ_freq-------------------------------
605
98cb887364d3 6810672: Comment typos
twisti
parents: 601
diff changeset
1911 // Update the appropriate frequency associated with block 'b', a successor of
0
a61af66fc99e Initial load
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parents:
diff changeset
1912 // a block in this loop.
a61af66fc99e Initial load
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parents:
diff changeset
1913 void CFGLoop::update_succ_freq(Block* b, float freq) {
a61af66fc99e Initial load
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parents:
diff changeset
1914 if (b->_loop == this) {
a61af66fc99e Initial load
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parents:
diff changeset
1915 if (b == head()) {
a61af66fc99e Initial load
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parents:
diff changeset
1916 // back branch within the loop
a61af66fc99e Initial load
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parents:
diff changeset
1917 // Do nothing now, the loop carried frequency will be
a61af66fc99e Initial load
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parents:
diff changeset
1918 // adjust later in scale_freq().
a61af66fc99e Initial load
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parents:
diff changeset
1919 } else {
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parents:
diff changeset
1920 // simple branch within the loop
a61af66fc99e Initial load
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parents:
diff changeset
1921 b->_freq += freq;
a61af66fc99e Initial load
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parents:
diff changeset
1922 }
a61af66fc99e Initial load
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parents:
diff changeset
1923 } else if (!in_loop_nest(b)) {
a61af66fc99e Initial load
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parents:
diff changeset
1924 // branch is exit from this loop
a61af66fc99e Initial load
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parents:
diff changeset
1925 BlockProbPair bpp(b, freq);
a61af66fc99e Initial load
duke
parents:
diff changeset
1926 _exits.append(bpp);
a61af66fc99e Initial load
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parents:
diff changeset
1927 } else {
a61af66fc99e Initial load
duke
parents:
diff changeset
1928 // branch into nested loop
a61af66fc99e Initial load
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parents:
diff changeset
1929 CFGLoop* ch = b->_loop;
a61af66fc99e Initial load
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parents:
diff changeset
1930 ch->_freq += freq;
a61af66fc99e Initial load
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parents:
diff changeset
1931 }
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parents:
diff changeset
1932 }
a61af66fc99e Initial load
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parents:
diff changeset
1933
a61af66fc99e Initial load
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parents:
diff changeset
1934 //------------------------------in_loop_nest-----------------------------------
a61af66fc99e Initial load
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parents:
diff changeset
1935 // Determine if block b is in the receiver's loop nest.
a61af66fc99e Initial load
duke
parents:
diff changeset
1936 bool CFGLoop::in_loop_nest(Block* b) {
a61af66fc99e Initial load
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parents:
diff changeset
1937 int depth = _depth;
a61af66fc99e Initial load
duke
parents:
diff changeset
1938 CFGLoop* b_loop = b->_loop;
a61af66fc99e Initial load
duke
parents:
diff changeset
1939 int b_depth = b_loop->_depth;
a61af66fc99e Initial load
duke
parents:
diff changeset
1940 if (depth == b_depth) {
a61af66fc99e Initial load
duke
parents:
diff changeset
1941 return true;
a61af66fc99e Initial load
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parents:
diff changeset
1942 }
a61af66fc99e Initial load
duke
parents:
diff changeset
1943 while (b_depth > depth) {
a61af66fc99e Initial load
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parents:
diff changeset
1944 b_loop = b_loop->_parent;
a61af66fc99e Initial load
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parents:
diff changeset
1945 b_depth = b_loop->_depth;
a61af66fc99e Initial load
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parents:
diff changeset
1946 }
a61af66fc99e Initial load
duke
parents:
diff changeset
1947 return b_loop == this;
a61af66fc99e Initial load
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parents:
diff changeset
1948 }
a61af66fc99e Initial load
duke
parents:
diff changeset
1949
a61af66fc99e Initial load
duke
parents:
diff changeset
1950 //------------------------------scale_freq-------------------------------------
a61af66fc99e Initial load
duke
parents:
diff changeset
1951 // Scale frequency of loops and blocks by trip counts from outer loops
a61af66fc99e Initial load
duke
parents:
diff changeset
1952 // Do a top down traversal of loop tree (visit outer loops first.)
a61af66fc99e Initial load
duke
parents:
diff changeset
1953 void CFGLoop::scale_freq() {
a61af66fc99e Initial load
duke
parents:
diff changeset
1954 float loop_freq = _freq * trip_count();
673
fbc12e71c476 6810845: Performance regression in mpegaudio on x64
kvn
parents: 628
diff changeset
1955 _freq = loop_freq;
0
a61af66fc99e Initial load
duke
parents:
diff changeset
1956 for (int i = 0; i < _members.length(); i++) {
a61af66fc99e Initial load
duke
parents:
diff changeset
1957 CFGElement* s = _members.at(i);
552
011517bbcd7b 6784930: server jvm fails with assert(!n->is_SpillCopy(),"")
kvn
parents: 418
diff changeset
1958 float block_freq = s->_freq * loop_freq;
621
19f25e603e7b 6812721: Block's frequency should not be NaN
kvn
parents: 605
diff changeset
1959 if (g_isnan(block_freq) || block_freq < MIN_BLOCK_FREQUENCY)
19f25e603e7b 6812721: Block's frequency should not be NaN
kvn
parents: 605
diff changeset
1960 block_freq = MIN_BLOCK_FREQUENCY;
552
011517bbcd7b 6784930: server jvm fails with assert(!n->is_SpillCopy(),"")
kvn
parents: 418
diff changeset
1961 s->_freq = block_freq;
0
a61af66fc99e Initial load
duke
parents:
diff changeset
1962 }
a61af66fc99e Initial load
duke
parents:
diff changeset
1963 CFGLoop* ch = _child;
a61af66fc99e Initial load
duke
parents:
diff changeset
1964 while (ch != NULL) {
a61af66fc99e Initial load
duke
parents:
diff changeset
1965 ch->scale_freq();
a61af66fc99e Initial load
duke
parents:
diff changeset
1966 ch = ch->_sibling;
a61af66fc99e Initial load
duke
parents:
diff changeset
1967 }
a61af66fc99e Initial load
duke
parents:
diff changeset
1968 }
a61af66fc99e Initial load
duke
parents:
diff changeset
1969
673
fbc12e71c476 6810845: Performance regression in mpegaudio on x64
kvn
parents: 628
diff changeset
1970 // Frequency of outer loop
fbc12e71c476 6810845: Performance regression in mpegaudio on x64
kvn
parents: 628
diff changeset
1971 float CFGLoop::outer_loop_freq() const {
fbc12e71c476 6810845: Performance regression in mpegaudio on x64
kvn
parents: 628
diff changeset
1972 if (_child != NULL) {
fbc12e71c476 6810845: Performance regression in mpegaudio on x64
kvn
parents: 628
diff changeset
1973 return _child->_freq;
fbc12e71c476 6810845: Performance regression in mpegaudio on x64
kvn
parents: 628
diff changeset
1974 }
fbc12e71c476 6810845: Performance regression in mpegaudio on x64
kvn
parents: 628
diff changeset
1975 return _freq;
fbc12e71c476 6810845: Performance regression in mpegaudio on x64
kvn
parents: 628
diff changeset
1976 }
fbc12e71c476 6810845: Performance regression in mpegaudio on x64
kvn
parents: 628
diff changeset
1977
0
a61af66fc99e Initial load
duke
parents:
diff changeset
1978 #ifndef PRODUCT
a61af66fc99e Initial load
duke
parents:
diff changeset
1979 //------------------------------dump_tree--------------------------------------
a61af66fc99e Initial load
duke
parents:
diff changeset
1980 void CFGLoop::dump_tree() const {
a61af66fc99e Initial load
duke
parents:
diff changeset
1981 dump();
a61af66fc99e Initial load
duke
parents:
diff changeset
1982 if (_child != NULL) _child->dump_tree();
a61af66fc99e Initial load
duke
parents:
diff changeset
1983 if (_sibling != NULL) _sibling->dump_tree();
a61af66fc99e Initial load
duke
parents:
diff changeset
1984 }
a61af66fc99e Initial load
duke
parents:
diff changeset
1985
a61af66fc99e Initial load
duke
parents:
diff changeset
1986 //------------------------------dump-------------------------------------------
a61af66fc99e Initial load
duke
parents:
diff changeset
1987 void CFGLoop::dump() const {
a61af66fc99e Initial load
duke
parents:
diff changeset
1988 for (int i = 0; i < _depth; i++) tty->print(" ");
a61af66fc99e Initial load
duke
parents:
diff changeset
1989 tty->print("%s: %d trip_count: %6.0f freq: %6.0f\n",
a61af66fc99e Initial load
duke
parents:
diff changeset
1990 _depth == 0 ? "Method" : "Loop", _id, trip_count(), _freq);
a61af66fc99e Initial load
duke
parents:
diff changeset
1991 for (int i = 0; i < _depth; i++) tty->print(" ");
a61af66fc99e Initial load
duke
parents:
diff changeset
1992 tty->print(" members:", _id);
a61af66fc99e Initial load
duke
parents:
diff changeset
1993 int k = 0;
a61af66fc99e Initial load
duke
parents:
diff changeset
1994 for (int i = 0; i < _members.length(); i++) {
a61af66fc99e Initial load
duke
parents:
diff changeset
1995 if (k++ >= 6) {
a61af66fc99e Initial load
duke
parents:
diff changeset
1996 tty->print("\n ");
a61af66fc99e Initial load
duke
parents:
diff changeset
1997 for (int j = 0; j < _depth+1; j++) tty->print(" ");
a61af66fc99e Initial load
duke
parents:
diff changeset
1998 k = 0;
a61af66fc99e Initial load
duke
parents:
diff changeset
1999 }
a61af66fc99e Initial load
duke
parents:
diff changeset
2000 CFGElement *s = _members.at(i);
a61af66fc99e Initial load
duke
parents:
diff changeset
2001 if (s->is_block()) {
a61af66fc99e Initial load
duke
parents:
diff changeset
2002 Block *b = s->as_Block();
a61af66fc99e Initial load
duke
parents:
diff changeset
2003 tty->print(" B%d(%6.3f)", b->_pre_order, b->_freq);
a61af66fc99e Initial load
duke
parents:
diff changeset
2004 } else {
a61af66fc99e Initial load
duke
parents:
diff changeset
2005 CFGLoop* lp = s->as_CFGLoop();
a61af66fc99e Initial load
duke
parents:
diff changeset
2006 tty->print(" L%d(%6.3f)", lp->_id, lp->_freq);
a61af66fc99e Initial load
duke
parents:
diff changeset
2007 }
a61af66fc99e Initial load
duke
parents:
diff changeset
2008 }
a61af66fc99e Initial load
duke
parents:
diff changeset
2009 tty->print("\n");
a61af66fc99e Initial load
duke
parents:
diff changeset
2010 for (int i = 0; i < _depth; i++) tty->print(" ");
a61af66fc99e Initial load
duke
parents:
diff changeset
2011 tty->print(" exits: ");
a61af66fc99e Initial load
duke
parents:
diff changeset
2012 k = 0;
a61af66fc99e Initial load
duke
parents:
diff changeset
2013 for (int i = 0; i < _exits.length(); i++) {
a61af66fc99e Initial load
duke
parents:
diff changeset
2014 if (k++ >= 7) {
a61af66fc99e Initial load
duke
parents:
diff changeset
2015 tty->print("\n ");
a61af66fc99e Initial load
duke
parents:
diff changeset
2016 for (int j = 0; j < _depth+1; j++) tty->print(" ");
a61af66fc99e Initial load
duke
parents:
diff changeset
2017 k = 0;
a61af66fc99e Initial load
duke
parents:
diff changeset
2018 }
a61af66fc99e Initial load
duke
parents:
diff changeset
2019 Block *blk = _exits.at(i).get_target();
a61af66fc99e Initial load
duke
parents:
diff changeset
2020 float prob = _exits.at(i).get_prob();
a61af66fc99e Initial load
duke
parents:
diff changeset
2021 tty->print(" ->%d@%d%%", blk->_pre_order, (int)(prob*100));
a61af66fc99e Initial load
duke
parents:
diff changeset
2022 }
a61af66fc99e Initial load
duke
parents:
diff changeset
2023 tty->print("\n");
a61af66fc99e Initial load
duke
parents:
diff changeset
2024 }
a61af66fc99e Initial load
duke
parents:
diff changeset
2025 #endif