annotate src/cpu/x86/vm/c1_CodeStubs_x86.cpp @ 1783:d5d065957597

6953144: Tiered compilation Summary: Infrastructure for tiered compilation support (interpreter + c1 + c2) for 32 and 64 bit. Simple tiered policy implementation. Reviewed-by: kvn, never, phh, twisti
author iveresov
date Fri, 03 Sep 2010 17:51:07 -0700
parents c18cbe5936b8
children f02a8bbe6ed4
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1 /*
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2 * Copyright (c) 1999, 2010, Oracle and/or its affiliates. All rights reserved.
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3 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
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4 *
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5 * This code is free software; you can redistribute it and/or modify it
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6 * under the terms of the GNU General Public License version 2 only, as
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7 * published by the Free Software Foundation.
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8 *
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9 * This code is distributed in the hope that it will be useful, but WITHOUT
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10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
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12 * version 2 for more details (a copy is included in the LICENSE file that
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13 * accompanied this code).
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14 *
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15 * You should have received a copy of the GNU General Public License version
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16 * 2 along with this work; if not, write to the Free Software Foundation,
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17 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
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18 *
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19 * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
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20 * or visit www.oracle.com if you need additional information or have any
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21 * questions.
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22 *
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23 */
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24
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25 #include "incls/_precompiled.incl"
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26 #include "incls/_c1_CodeStubs_x86.cpp.incl"
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27
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28
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29 #define __ ce->masm()->
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30
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31 float ConversionStub::float_zero = 0.0;
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32 double ConversionStub::double_zero = 0.0;
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33
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34 void ConversionStub::emit_code(LIR_Assembler* ce) {
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35 __ bind(_entry);
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36 assert(bytecode() == Bytecodes::_f2i || bytecode() == Bytecodes::_d2i, "other conversions do not require stub");
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37
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38
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39 if (input()->is_single_xmm()) {
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40 __ comiss(input()->as_xmm_float_reg(),
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41 ExternalAddress((address)&float_zero));
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42 } else if (input()->is_double_xmm()) {
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43 __ comisd(input()->as_xmm_double_reg(),
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44 ExternalAddress((address)&double_zero));
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45 } else {
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46 LP64_ONLY(ShouldNotReachHere());
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47 __ push(rax);
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48 __ ftst();
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49 __ fnstsw_ax();
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50 __ sahf();
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51 __ pop(rax);
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52 }
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53
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54 Label NaN, do_return;
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55 __ jccb(Assembler::parity, NaN);
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56 __ jccb(Assembler::below, do_return);
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57
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58 // input is > 0 -> return maxInt
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59 // result register already contains 0x80000000, so subtracting 1 gives 0x7fffffff
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60 __ decrement(result()->as_register());
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61 __ jmpb(do_return);
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62
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63 // input is NaN -> return 0
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64 __ bind(NaN);
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65 __ xorptr(result()->as_register(), result()->as_register());
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66
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67 __ bind(do_return);
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68 __ jmp(_continuation);
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69 }
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70
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71 void CounterOverflowStub::emit_code(LIR_Assembler* ce) {
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72 __ bind(_entry);
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73 ce->store_parameter(_method->as_register(), 1);
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74 ce->store_parameter(_bci, 0);
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75 __ call(RuntimeAddress(Runtime1::entry_for(Runtime1::counter_overflow_id)));
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76 ce->add_call_info_here(_info);
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77 ce->verify_oop_map(_info);
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78 __ jmp(_continuation);
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79 }
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80
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81 RangeCheckStub::RangeCheckStub(CodeEmitInfo* info, LIR_Opr index,
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82 bool throw_index_out_of_bounds_exception)
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83 : _throw_index_out_of_bounds_exception(throw_index_out_of_bounds_exception)
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84 , _index(index)
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85 {
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86 _info = info == NULL ? NULL : new CodeEmitInfo(info);
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87 }
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88
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89
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90 void RangeCheckStub::emit_code(LIR_Assembler* ce) {
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91 __ bind(_entry);
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92 // pass the array index on stack because all registers must be preserved
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93 if (_index->is_cpu_register()) {
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94 ce->store_parameter(_index->as_register(), 0);
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95 } else {
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96 ce->store_parameter(_index->as_jint(), 0);
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97 }
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98 Runtime1::StubID stub_id;
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99 if (_throw_index_out_of_bounds_exception) {
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100 stub_id = Runtime1::throw_index_exception_id;
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101 } else {
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102 stub_id = Runtime1::throw_range_check_failed_id;
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103 }
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104 __ call(RuntimeAddress(Runtime1::entry_for(stub_id)));
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105 ce->add_call_info_here(_info);
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106 debug_only(__ should_not_reach_here());
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107 }
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108
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109
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110 void DivByZeroStub::emit_code(LIR_Assembler* ce) {
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111 if (_offset != -1) {
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112 ce->compilation()->implicit_exception_table()->append(_offset, __ offset());
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113 }
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114 __ bind(_entry);
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115 __ call(RuntimeAddress(Runtime1::entry_for(Runtime1::throw_div0_exception_id)));
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116 ce->add_call_info_here(_info);
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117 debug_only(__ should_not_reach_here());
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118 }
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119
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120
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121 // Implementation of NewInstanceStub
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122
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123 NewInstanceStub::NewInstanceStub(LIR_Opr klass_reg, LIR_Opr result, ciInstanceKlass* klass, CodeEmitInfo* info, Runtime1::StubID stub_id) {
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124 _result = result;
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125 _klass = klass;
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126 _klass_reg = klass_reg;
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127 _info = new CodeEmitInfo(info);
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128 assert(stub_id == Runtime1::new_instance_id ||
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129 stub_id == Runtime1::fast_new_instance_id ||
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130 stub_id == Runtime1::fast_new_instance_init_check_id,
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131 "need new_instance id");
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132 _stub_id = stub_id;
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133 }
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134
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135
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136 void NewInstanceStub::emit_code(LIR_Assembler* ce) {
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137 assert(__ rsp_offset() == 0, "frame size should be fixed");
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138 __ bind(_entry);
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139 __ movptr(rdx, _klass_reg->as_register());
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140 __ call(RuntimeAddress(Runtime1::entry_for(_stub_id)));
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141 ce->add_call_info_here(_info);
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142 ce->verify_oop_map(_info);
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143 assert(_result->as_register() == rax, "result must in rax,");
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144 __ jmp(_continuation);
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145 }
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146
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147
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148 // Implementation of NewTypeArrayStub
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149
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150 NewTypeArrayStub::NewTypeArrayStub(LIR_Opr klass_reg, LIR_Opr length, LIR_Opr result, CodeEmitInfo* info) {
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151 _klass_reg = klass_reg;
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152 _length = length;
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153 _result = result;
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154 _info = new CodeEmitInfo(info);
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155 }
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156
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157
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158 void NewTypeArrayStub::emit_code(LIR_Assembler* ce) {
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159 assert(__ rsp_offset() == 0, "frame size should be fixed");
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160 __ bind(_entry);
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161 assert(_length->as_register() == rbx, "length must in rbx,");
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162 assert(_klass_reg->as_register() == rdx, "klass_reg must in rdx");
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163 __ call(RuntimeAddress(Runtime1::entry_for(Runtime1::new_type_array_id)));
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164 ce->add_call_info_here(_info);
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165 ce->verify_oop_map(_info);
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166 assert(_result->as_register() == rax, "result must in rax,");
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167 __ jmp(_continuation);
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168 }
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169
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170
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171 // Implementation of NewObjectArrayStub
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172
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173 NewObjectArrayStub::NewObjectArrayStub(LIR_Opr klass_reg, LIR_Opr length, LIR_Opr result, CodeEmitInfo* info) {
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174 _klass_reg = klass_reg;
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175 _result = result;
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176 _length = length;
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177 _info = new CodeEmitInfo(info);
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178 }
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179
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180
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181 void NewObjectArrayStub::emit_code(LIR_Assembler* ce) {
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182 assert(__ rsp_offset() == 0, "frame size should be fixed");
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183 __ bind(_entry);
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184 assert(_length->as_register() == rbx, "length must in rbx,");
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185 assert(_klass_reg->as_register() == rdx, "klass_reg must in rdx");
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186 __ call(RuntimeAddress(Runtime1::entry_for(Runtime1::new_object_array_id)));
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187 ce->add_call_info_here(_info);
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188 ce->verify_oop_map(_info);
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189 assert(_result->as_register() == rax, "result must in rax,");
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190 __ jmp(_continuation);
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191 }
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192
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193
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194 // Implementation of MonitorAccessStubs
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195
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196 MonitorEnterStub::MonitorEnterStub(LIR_Opr obj_reg, LIR_Opr lock_reg, CodeEmitInfo* info)
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197 : MonitorAccessStub(obj_reg, lock_reg)
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198 {
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199 _info = new CodeEmitInfo(info);
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200 }
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201
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202
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203 void MonitorEnterStub::emit_code(LIR_Assembler* ce) {
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204 assert(__ rsp_offset() == 0, "frame size should be fixed");
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205 __ bind(_entry);
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206 ce->store_parameter(_obj_reg->as_register(), 1);
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207 ce->store_parameter(_lock_reg->as_register(), 0);
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208 Runtime1::StubID enter_id;
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209 if (ce->compilation()->has_fpu_code()) {
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210 enter_id = Runtime1::monitorenter_id;
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211 } else {
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212 enter_id = Runtime1::monitorenter_nofpu_id;
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213 }
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214 __ call(RuntimeAddress(Runtime1::entry_for(enter_id)));
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215 ce->add_call_info_here(_info);
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216 ce->verify_oop_map(_info);
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217 __ jmp(_continuation);
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218 }
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219
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220
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221 void MonitorExitStub::emit_code(LIR_Assembler* ce) {
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222 __ bind(_entry);
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223 if (_compute_lock) {
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224 // lock_reg was destroyed by fast unlocking attempt => recompute it
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225 ce->monitor_address(_monitor_ix, _lock_reg);
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226 }
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227 ce->store_parameter(_lock_reg->as_register(), 0);
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228 // note: non-blocking leaf routine => no call info needed
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229 Runtime1::StubID exit_id;
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230 if (ce->compilation()->has_fpu_code()) {
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231 exit_id = Runtime1::monitorexit_id;
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232 } else {
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233 exit_id = Runtime1::monitorexit_nofpu_id;
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234 }
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235 __ call(RuntimeAddress(Runtime1::entry_for(exit_id)));
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236 __ jmp(_continuation);
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237 }
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238
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239
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240 // Implementation of patching:
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241 // - Copy the code at given offset to an inlined buffer (first the bytes, then the number of bytes)
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242 // - Replace original code with a call to the stub
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243 // At Runtime:
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244 // - call to stub, jump to runtime
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245 // - in runtime: preserve all registers (rspecially objects, i.e., source and destination object)
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246 // - in runtime: after initializing class, restore original code, reexecute instruction
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247
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248 int PatchingStub::_patch_info_offset = -NativeGeneralJump::instruction_size;
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249
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250 void PatchingStub::align_patch_site(MacroAssembler* masm) {
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251 // We're patching a 5-7 byte instruction on intel and we need to
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252 // make sure that we don't see a piece of the instruction. It
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253 // appears mostly impossible on Intel to simply invalidate other
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254 // processors caches and since they may do aggressive prefetch it's
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255 // very hard to make a guess about what code might be in the icache.
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256 // Force the instruction to be double word aligned so that it
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257 // doesn't span a cache line.
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258 masm->align(round_to(NativeGeneralJump::instruction_size, wordSize));
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259 }
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260
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261 void PatchingStub::emit_code(LIR_Assembler* ce) {
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262 assert(NativeCall::instruction_size <= _bytes_to_copy && _bytes_to_copy <= 0xFF, "not enough room for call");
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263
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264 Label call_patch;
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265
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266 // static field accesses have special semantics while the class
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267 // initializer is being run so we emit a test which can be used to
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268 // check that this code is being executed by the initializing
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269 // thread.
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270 address being_initialized_entry = __ pc();
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271 if (CommentedAssembly) {
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272 __ block_comment(" patch template");
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273 }
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274 if (_id == load_klass_id) {
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275 // produce a copy of the load klass instruction for use by the being initialized case
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276 address start = __ pc();
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277 jobject o = NULL;
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278 __ movoop(_obj, o);
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279 #ifdef ASSERT
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280 for (int i = 0; i < _bytes_to_copy; i++) {
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281 address ptr = (address)(_pc_start + i);
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282 int a_byte = (*ptr) & 0xFF;
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283 assert(a_byte == *start++, "should be the same code");
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284 }
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285 #endif
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286 } else {
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287 // make a copy the code which is going to be patched.
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288 for ( int i = 0; i < _bytes_to_copy; i++) {
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289 address ptr = (address)(_pc_start + i);
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290 int a_byte = (*ptr) & 0xFF;
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291 __ a_byte (a_byte);
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292 *ptr = 0x90; // make the site look like a nop
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293 }
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294 }
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295
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296 address end_of_patch = __ pc();
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297 int bytes_to_skip = 0;
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298 if (_id == load_klass_id) {
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299 int offset = __ offset();
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300 if (CommentedAssembly) {
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301 __ block_comment(" being_initialized check");
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302 }
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303 assert(_obj != noreg, "must be a valid register");
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304 Register tmp = rax;
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305 if (_obj == tmp) tmp = rbx;
304
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306 __ push(tmp);
0
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307 __ get_thread(tmp);
304
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308 __ cmpptr(tmp, Address(_obj, instanceKlass::init_thread_offset_in_bytes() + sizeof(klassOopDesc)));
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309 __ pop(tmp);
0
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310 __ jcc(Assembler::notEqual, call_patch);
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311
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312 // access_field patches may execute the patched code before it's
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313 // copied back into place so we need to jump back into the main
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314 // code of the nmethod to continue execution.
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315 __ jmp(_patch_site_continuation);
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316
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317 // make sure this extra code gets skipped
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318 bytes_to_skip += __ offset() - offset;
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319 }
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320 if (CommentedAssembly) {
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321 __ block_comment("patch data encoded as movl");
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322 }
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323 // Now emit the patch record telling the runtime how to find the
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324 // pieces of the patch. We only need 3 bytes but for readability of
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325 // the disassembly we make the data look like a movl reg, imm32,
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326 // which requires 5 bytes
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327 int sizeof_patch_record = 5;
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328 bytes_to_skip += sizeof_patch_record;
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329
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330 // emit the offsets needed to find the code to patch
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331 int being_initialized_entry_offset = __ pc() - being_initialized_entry + sizeof_patch_record;
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332
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333 __ a_byte(0xB8);
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334 __ a_byte(0);
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335 __ a_byte(being_initialized_entry_offset);
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336 __ a_byte(bytes_to_skip);
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337 __ a_byte(_bytes_to_copy);
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338 address patch_info_pc = __ pc();
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339 assert(patch_info_pc - end_of_patch == bytes_to_skip, "incorrect patch info");
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340
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341 address entry = __ pc();
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342 NativeGeneralJump::insert_unconditional((address)_pc_start, entry);
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343 address target = NULL;
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344 switch (_id) {
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345 case access_field_id: target = Runtime1::entry_for(Runtime1::access_field_patching_id); break;
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346 case load_klass_id: target = Runtime1::entry_for(Runtime1::load_klass_patching_id); break;
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347 default: ShouldNotReachHere();
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348 }
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349 __ bind(call_patch);
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350
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351 if (CommentedAssembly) {
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352 __ block_comment("patch entry point");
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353 }
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354 __ call(RuntimeAddress(target));
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355 assert(_patch_info_offset == (patch_info_pc - __ pc()), "must not change");
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356 ce->add_call_info_here(_info);
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357 int jmp_off = __ offset();
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358 __ jmp(_patch_site_entry);
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359 // Add enough nops so deoptimization can overwrite the jmp above with a call
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360 // and not destroy the world.
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361 for (int j = __ offset() ; j < jmp_off + 5 ; j++ ) {
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362 __ nop();
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363 }
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364 if (_id == load_klass_id) {
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365 CodeSection* cs = __ code_section();
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366 RelocIterator iter(cs, (address)_pc_start, (address)(_pc_start + 1));
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367 relocInfo::change_reloc_info_for_address(&iter, (address) _pc_start, relocInfo::oop_type, relocInfo::none);
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368 }
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369 }
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370
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371
1295
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372 void DeoptimizeStub::emit_code(LIR_Assembler* ce) {
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373 __ bind(_entry);
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374 __ call(RuntimeAddress(SharedRuntime::deopt_blob()->unpack_with_reexecution()));
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375 ce->add_call_info_here(_info);
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376 debug_only(__ should_not_reach_here());
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377 }
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378
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379
0
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380 void ImplicitNullCheckStub::emit_code(LIR_Assembler* ce) {
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381 ce->compilation()->implicit_exception_table()->append(_offset, __ offset());
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382 __ bind(_entry);
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383 __ call(RuntimeAddress(Runtime1::entry_for(Runtime1::throw_null_pointer_exception_id)));
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384 ce->add_call_info_here(_info);
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385 debug_only(__ should_not_reach_here());
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386 }
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387
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388
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389 void SimpleExceptionStub::emit_code(LIR_Assembler* ce) {
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390 assert(__ rsp_offset() == 0, "frame size should be fixed");
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391
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392 __ bind(_entry);
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393 // pass the object on stack because all registers must be preserved
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394 if (_obj->is_cpu_register()) {
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395 ce->store_parameter(_obj->as_register(), 0);
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396 }
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397 __ call(RuntimeAddress(Runtime1::entry_for(_stub)));
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398 ce->add_call_info_here(_info);
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399 debug_only(__ should_not_reach_here());
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400 }
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401
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402
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403 ArrayStoreExceptionStub::ArrayStoreExceptionStub(CodeEmitInfo* info):
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404 _info(info) {
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405 }
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406
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407
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408 void ArrayStoreExceptionStub::emit_code(LIR_Assembler* ce) {
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409 assert(__ rsp_offset() == 0, "frame size should be fixed");
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410 __ bind(_entry);
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411 __ call(RuntimeAddress(Runtime1::entry_for(Runtime1::throw_array_store_exception_id)));
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412 ce->add_call_info_here(_info);
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413 debug_only(__ should_not_reach_here());
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414 }
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415
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416
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417 void ArrayCopyStub::emit_code(LIR_Assembler* ce) {
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418 //---------------slow case: call to native-----------------
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419 __ bind(_entry);
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420 // Figure out where the args should go
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421 // This should really convert the IntrinsicID to the methodOop and signature
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422 // but I don't know how to do that.
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423 //
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424 VMRegPair args[5];
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425 BasicType signature[5] = { T_OBJECT, T_INT, T_OBJECT, T_INT, T_INT};
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426 SharedRuntime::java_calling_convention(signature, args, 5, true);
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427
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428 // push parameters
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429 // (src, src_pos, dest, destPos, length)
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430 Register r[5];
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431 r[0] = src()->as_register();
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432 r[1] = src_pos()->as_register();
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433 r[2] = dst()->as_register();
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434 r[3] = dst_pos()->as_register();
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435 r[4] = length()->as_register();
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436
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437 // next registers will get stored on the stack
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438 for (int i = 0; i < 5 ; i++ ) {
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439 VMReg r_1 = args[i].first();
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440 if (r_1->is_stack()) {
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441 int st_off = r_1->reg2stack() * wordSize;
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442 __ movptr (Address(rsp, st_off), r[i]);
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443 } else {
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444 assert(r[i] == args[i].first()->as_Register(), "Wrong register for arg ");
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445 }
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446 }
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447
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448 ce->align_call(lir_static_call);
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449
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450 ce->emit_static_call_stub();
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451 AddressLiteral resolve(SharedRuntime::get_resolve_static_call_stub(),
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452 relocInfo::static_call_type);
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453 __ call(resolve);
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454 ce->add_call_info_here(info());
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455
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456 #ifndef PRODUCT
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457 __ incrementl(ExternalAddress((address)&Runtime1::_arraycopy_slowcase_cnt));
0
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458 #endif
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459
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460 __ jmp(_continuation);
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461 }
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462
342
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463 /////////////////////////////////////////////////////////////////////////////
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464 #ifndef SERIALGC
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465
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466 void G1PreBarrierStub::emit_code(LIR_Assembler* ce) {
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467
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468 // At this point we know that marking is in progress
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469
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470 __ bind(_entry);
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471 assert(pre_val()->is_register(), "Precondition.");
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472
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473 Register pre_val_reg = pre_val()->as_register();
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474
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475 ce->mem2reg(addr(), pre_val(), T_OBJECT, patch_code(), info(), false);
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476
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477 __ cmpptr(pre_val_reg, (int32_t) NULL_WORD);
342
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478 __ jcc(Assembler::equal, _continuation);
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479 ce->store_parameter(pre_val()->as_register(), 0);
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480 __ call(RuntimeAddress(Runtime1::entry_for(Runtime1::g1_pre_barrier_slow_id)));
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481 __ jmp(_continuation);
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482
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483 }
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484
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485 jbyte* G1PostBarrierStub::_byte_map_base = NULL;
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486
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487 jbyte* G1PostBarrierStub::byte_map_base_slow() {
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488 BarrierSet* bs = Universe::heap()->barrier_set();
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489 assert(bs->is_a(BarrierSet::G1SATBCTLogging),
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490 "Must be if we're using this.");
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491 return ((G1SATBCardTableModRefBS*)bs)->byte_map_base;
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492 }
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493
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494 void G1PostBarrierStub::emit_code(LIR_Assembler* ce) {
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495 __ bind(_entry);
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496 assert(addr()->is_register(), "Precondition.");
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497 assert(new_val()->is_register(), "Precondition.");
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498 Register new_val_reg = new_val()->as_register();
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499 __ cmpptr(new_val_reg, (int32_t) NULL_WORD);
342
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500 __ jcc(Assembler::equal, _continuation);
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501 ce->store_parameter(addr()->as_register(), 0);
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502 __ call(RuntimeAddress(Runtime1::entry_for(Runtime1::g1_post_barrier_slow_id)));
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503 __ jmp(_continuation);
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504 }
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505
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506 #endif // SERIALGC
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507 /////////////////////////////////////////////////////////////////////////////
0
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508
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509 #undef __