Mercurial > hg > graal-compiler
annotate src/share/vm/opto/postaloc.cpp @ 12877:d8a449d2f5b2
8011415: CTW on Sparc: assert(lrg.lo_degree()) failed:
Summary: Increased the LRG AllStack mask size since the previous size was not big enough when compiling huge methods (60k+ nodes)
Reviewed-by: kvn, roland, twisti
author | adlertz |
---|---|
date | Fri, 11 Oct 2013 13:10:22 +0200 |
parents | 650868c062a9 |
children | f01788f13696 |
rev | line source |
---|---|
0 | 1 /* |
6179
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4776
diff
changeset
|
2 * Copyright (c) 1998, 2012, Oracle and/or its affiliates. All rights reserved. |
0 | 3 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. |
4 * | |
5 * This code is free software; you can redistribute it and/or modify it | |
6 * under the terms of the GNU General Public License version 2 only, as | |
7 * published by the Free Software Foundation. | |
8 * | |
9 * This code is distributed in the hope that it will be useful, but WITHOUT | |
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or | |
11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License | |
12 * version 2 for more details (a copy is included in the LICENSE file that | |
13 * accompanied this code). | |
14 * | |
15 * You should have received a copy of the GNU General Public License version | |
16 * 2 along with this work; if not, write to the Free Software Foundation, | |
17 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA. | |
18 * | |
1552
c18cbe5936b8
6941466: Oracle rebranding changes for Hotspot repositories
trims
parents:
948
diff
changeset
|
19 * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA |
c18cbe5936b8
6941466: Oracle rebranding changes for Hotspot repositories
trims
parents:
948
diff
changeset
|
20 * or visit www.oracle.com if you need additional information or have any |
c18cbe5936b8
6941466: Oracle rebranding changes for Hotspot repositories
trims
parents:
948
diff
changeset
|
21 * questions. |
0 | 22 * |
23 */ | |
24 | |
1972 | 25 #include "precompiled.hpp" |
26 #include "memory/allocation.inline.hpp" | |
27 #include "opto/chaitin.hpp" | |
28 #include "opto/machnode.hpp" | |
0 | 29 |
6179
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4776
diff
changeset
|
30 // See if this register (or pairs, or vector) already contains the value. |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4776
diff
changeset
|
31 static bool register_contains_value(Node* val, OptoReg::Name reg, int n_regs, |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4776
diff
changeset
|
32 Node_List& value) { |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4776
diff
changeset
|
33 for (int i = 0; i < n_regs; i++) { |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4776
diff
changeset
|
34 OptoReg::Name nreg = OptoReg::add(reg,-i); |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4776
diff
changeset
|
35 if (value[nreg] != val) |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4776
diff
changeset
|
36 return false; |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4776
diff
changeset
|
37 } |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4776
diff
changeset
|
38 return true; |
0 | 39 } |
40 | |
400
cc80376deb0c
6667595: Set probability FAIR for pre-, post- loops and ALWAYS for main loop
kvn
parents:
196
diff
changeset
|
41 //---------------------------may_be_copy_of_callee----------------------------- |
0 | 42 // Check to see if we can possibly be a copy of a callee-save value. |
43 bool PhaseChaitin::may_be_copy_of_callee( Node *def ) const { | |
44 // Short circuit if there are no callee save registers | |
45 if (_matcher.number_of_saved_registers() == 0) return false; | |
46 | |
47 // Expect only a spill-down and reload on exit for callee-save spills. | |
48 // Chains of copies cannot be deep. | |
49 // 5008997 - This is wishful thinking. Register allocator seems to | |
50 // be splitting live ranges for callee save registers to such | |
51 // an extent that in large methods the chains can be very long | |
52 // (50+). The conservative answer is to return true if we don't | |
605 | 53 // know as this prevents optimizations from occurring. |
0 | 54 |
55 const int limit = 60; | |
56 int i; | |
57 for( i=0; i < limit; i++ ) { | |
58 if( def->is_Proj() && def->in(0)->is_Start() && | |
10111 | 59 _matcher.is_save_on_entry(lrgs(_lrg_map.live_range_id(def)).reg())) |
0 | 60 return true; // Direct use of callee-save proj |
61 if( def->is_Copy() ) // Copies carry value through | |
62 def = def->in(def->is_Copy()); | |
63 else if( def->is_Phi() ) // Phis can merge it from any direction | |
64 def = def->in(1); | |
65 else | |
66 break; | |
67 guarantee(def != NULL, "must not resurrect dead copy"); | |
68 } | |
69 // If we reached the end and didn't find a callee save proj | |
70 // then this may be a callee save proj so we return true | |
71 // as the conservative answer. If we didn't reach then end | |
72 // we must have discovered that it was not a callee save | |
73 // else we would have returned. | |
74 return i == limit; | |
75 } | |
76 | |
3934
8f47d8870d9a
7087453: PhaseChaitin::yank_if_dead() should handle MachTemp inputs
roland
parents:
2008
diff
changeset
|
77 //------------------------------yank----------------------------------- |
8f47d8870d9a
7087453: PhaseChaitin::yank_if_dead() should handle MachTemp inputs
roland
parents:
2008
diff
changeset
|
78 // Helper function for yank_if_dead |
8f47d8870d9a
7087453: PhaseChaitin::yank_if_dead() should handle MachTemp inputs
roland
parents:
2008
diff
changeset
|
79 int PhaseChaitin::yank( Node *old, Block *current_block, Node_List *value, Node_List *regnd ) { |
8f47d8870d9a
7087453: PhaseChaitin::yank_if_dead() should handle MachTemp inputs
roland
parents:
2008
diff
changeset
|
80 int blk_adjust=0; |
12023
d1034bd8cefc
8022284: Hide internal data structure in PhaseCFG
adlertz
parents:
10111
diff
changeset
|
81 Block *oldb = _cfg.get_block_for_node(old); |
3934
8f47d8870d9a
7087453: PhaseChaitin::yank_if_dead() should handle MachTemp inputs
roland
parents:
2008
diff
changeset
|
82 oldb->find_remove(old); |
8f47d8870d9a
7087453: PhaseChaitin::yank_if_dead() should handle MachTemp inputs
roland
parents:
2008
diff
changeset
|
83 // Count 1 if deleting an instruction from the current block |
12023
d1034bd8cefc
8022284: Hide internal data structure in PhaseCFG
adlertz
parents:
10111
diff
changeset
|
84 if (oldb == current_block) { |
d1034bd8cefc
8022284: Hide internal data structure in PhaseCFG
adlertz
parents:
10111
diff
changeset
|
85 blk_adjust++; |
d1034bd8cefc
8022284: Hide internal data structure in PhaseCFG
adlertz
parents:
10111
diff
changeset
|
86 } |
d1034bd8cefc
8022284: Hide internal data structure in PhaseCFG
adlertz
parents:
10111
diff
changeset
|
87 _cfg.unmap_node_from_block(old); |
10111 | 88 OptoReg::Name old_reg = lrgs(_lrg_map.live_range_id(old)).reg(); |
3934
8f47d8870d9a
7087453: PhaseChaitin::yank_if_dead() should handle MachTemp inputs
roland
parents:
2008
diff
changeset
|
89 if( regnd && (*regnd)[old_reg]==old ) { // Instruction is currently available? |
8f47d8870d9a
7087453: PhaseChaitin::yank_if_dead() should handle MachTemp inputs
roland
parents:
2008
diff
changeset
|
90 value->map(old_reg,NULL); // Yank from value/regnd maps |
8f47d8870d9a
7087453: PhaseChaitin::yank_if_dead() should handle MachTemp inputs
roland
parents:
2008
diff
changeset
|
91 regnd->map(old_reg,NULL); // This register's value is now unknown |
8f47d8870d9a
7087453: PhaseChaitin::yank_if_dead() should handle MachTemp inputs
roland
parents:
2008
diff
changeset
|
92 } |
8f47d8870d9a
7087453: PhaseChaitin::yank_if_dead() should handle MachTemp inputs
roland
parents:
2008
diff
changeset
|
93 return blk_adjust; |
8f47d8870d9a
7087453: PhaseChaitin::yank_if_dead() should handle MachTemp inputs
roland
parents:
2008
diff
changeset
|
94 } |
0 | 95 |
4776
5da7201222d5
7110824: ctw/jarfiles/GUI3rdParty_jar/ob_mask_DateField crashes VM
kvn
parents:
3941
diff
changeset
|
96 #ifdef ASSERT |
5da7201222d5
7110824: ctw/jarfiles/GUI3rdParty_jar/ob_mask_DateField crashes VM
kvn
parents:
3941
diff
changeset
|
97 static bool expected_yanked_node(Node *old, Node *orig_old) { |
5da7201222d5
7110824: ctw/jarfiles/GUI3rdParty_jar/ob_mask_DateField crashes VM
kvn
parents:
3941
diff
changeset
|
98 // This code is expected only next original nodes: |
5da7201222d5
7110824: ctw/jarfiles/GUI3rdParty_jar/ob_mask_DateField crashes VM
kvn
parents:
3941
diff
changeset
|
99 // - load from constant table node which may have next data input nodes: |
5da7201222d5
7110824: ctw/jarfiles/GUI3rdParty_jar/ob_mask_DateField crashes VM
kvn
parents:
3941
diff
changeset
|
100 // MachConstantBase, Phi, MachTemp, MachSpillCopy |
5da7201222d5
7110824: ctw/jarfiles/GUI3rdParty_jar/ob_mask_DateField crashes VM
kvn
parents:
3941
diff
changeset
|
101 // - load constant node which may have next data input nodes: |
5da7201222d5
7110824: ctw/jarfiles/GUI3rdParty_jar/ob_mask_DateField crashes VM
kvn
parents:
3941
diff
changeset
|
102 // MachTemp, MachSpillCopy |
5da7201222d5
7110824: ctw/jarfiles/GUI3rdParty_jar/ob_mask_DateField crashes VM
kvn
parents:
3941
diff
changeset
|
103 // - MachSpillCopy |
5da7201222d5
7110824: ctw/jarfiles/GUI3rdParty_jar/ob_mask_DateField crashes VM
kvn
parents:
3941
diff
changeset
|
104 // - MachProj and Copy dead nodes |
5da7201222d5
7110824: ctw/jarfiles/GUI3rdParty_jar/ob_mask_DateField crashes VM
kvn
parents:
3941
diff
changeset
|
105 if (old->is_MachSpillCopy()) { |
5da7201222d5
7110824: ctw/jarfiles/GUI3rdParty_jar/ob_mask_DateField crashes VM
kvn
parents:
3941
diff
changeset
|
106 return true; |
5da7201222d5
7110824: ctw/jarfiles/GUI3rdParty_jar/ob_mask_DateField crashes VM
kvn
parents:
3941
diff
changeset
|
107 } else if (old->is_Con()) { |
5da7201222d5
7110824: ctw/jarfiles/GUI3rdParty_jar/ob_mask_DateField crashes VM
kvn
parents:
3941
diff
changeset
|
108 return true; |
5da7201222d5
7110824: ctw/jarfiles/GUI3rdParty_jar/ob_mask_DateField crashes VM
kvn
parents:
3941
diff
changeset
|
109 } else if (old->is_MachProj()) { // Dead kills projection of Con node |
5da7201222d5
7110824: ctw/jarfiles/GUI3rdParty_jar/ob_mask_DateField crashes VM
kvn
parents:
3941
diff
changeset
|
110 return (old == orig_old); |
5da7201222d5
7110824: ctw/jarfiles/GUI3rdParty_jar/ob_mask_DateField crashes VM
kvn
parents:
3941
diff
changeset
|
111 } else if (old->is_Copy()) { // Dead copy of a callee-save value |
5da7201222d5
7110824: ctw/jarfiles/GUI3rdParty_jar/ob_mask_DateField crashes VM
kvn
parents:
3941
diff
changeset
|
112 return (old == orig_old); |
5da7201222d5
7110824: ctw/jarfiles/GUI3rdParty_jar/ob_mask_DateField crashes VM
kvn
parents:
3941
diff
changeset
|
113 } else if (old->is_MachTemp()) { |
5da7201222d5
7110824: ctw/jarfiles/GUI3rdParty_jar/ob_mask_DateField crashes VM
kvn
parents:
3941
diff
changeset
|
114 return orig_old->is_Con(); |
5da7201222d5
7110824: ctw/jarfiles/GUI3rdParty_jar/ob_mask_DateField crashes VM
kvn
parents:
3941
diff
changeset
|
115 } else if (old->is_Phi() || old->is_MachConstantBase()) { |
5da7201222d5
7110824: ctw/jarfiles/GUI3rdParty_jar/ob_mask_DateField crashes VM
kvn
parents:
3941
diff
changeset
|
116 return (orig_old->is_Con() && orig_old->is_MachConstant()); |
5da7201222d5
7110824: ctw/jarfiles/GUI3rdParty_jar/ob_mask_DateField crashes VM
kvn
parents:
3941
diff
changeset
|
117 } |
5da7201222d5
7110824: ctw/jarfiles/GUI3rdParty_jar/ob_mask_DateField crashes VM
kvn
parents:
3941
diff
changeset
|
118 return false; |
5da7201222d5
7110824: ctw/jarfiles/GUI3rdParty_jar/ob_mask_DateField crashes VM
kvn
parents:
3941
diff
changeset
|
119 } |
5da7201222d5
7110824: ctw/jarfiles/GUI3rdParty_jar/ob_mask_DateField crashes VM
kvn
parents:
3941
diff
changeset
|
120 #endif |
5da7201222d5
7110824: ctw/jarfiles/GUI3rdParty_jar/ob_mask_DateField crashes VM
kvn
parents:
3941
diff
changeset
|
121 |
0 | 122 //------------------------------yank_if_dead----------------------------------- |
4776
5da7201222d5
7110824: ctw/jarfiles/GUI3rdParty_jar/ob_mask_DateField crashes VM
kvn
parents:
3941
diff
changeset
|
123 // Removed edges from 'old'. Yank if dead. Return adjustment counts to |
0 | 124 // iterators in the current block. |
4776
5da7201222d5
7110824: ctw/jarfiles/GUI3rdParty_jar/ob_mask_DateField crashes VM
kvn
parents:
3941
diff
changeset
|
125 int PhaseChaitin::yank_if_dead_recurse(Node *old, Node *orig_old, Block *current_block, |
5da7201222d5
7110824: ctw/jarfiles/GUI3rdParty_jar/ob_mask_DateField crashes VM
kvn
parents:
3941
diff
changeset
|
126 Node_List *value, Node_List *regnd) { |
0 | 127 int blk_adjust=0; |
4776
5da7201222d5
7110824: ctw/jarfiles/GUI3rdParty_jar/ob_mask_DateField crashes VM
kvn
parents:
3941
diff
changeset
|
128 if (old->outcnt() == 0 && old != C->top()) { |
5da7201222d5
7110824: ctw/jarfiles/GUI3rdParty_jar/ob_mask_DateField crashes VM
kvn
parents:
3941
diff
changeset
|
129 #ifdef ASSERT |
5da7201222d5
7110824: ctw/jarfiles/GUI3rdParty_jar/ob_mask_DateField crashes VM
kvn
parents:
3941
diff
changeset
|
130 if (!expected_yanked_node(old, orig_old)) { |
5da7201222d5
7110824: ctw/jarfiles/GUI3rdParty_jar/ob_mask_DateField crashes VM
kvn
parents:
3941
diff
changeset
|
131 tty->print_cr("=============================================="); |
5da7201222d5
7110824: ctw/jarfiles/GUI3rdParty_jar/ob_mask_DateField crashes VM
kvn
parents:
3941
diff
changeset
|
132 tty->print_cr("orig_old:"); |
5da7201222d5
7110824: ctw/jarfiles/GUI3rdParty_jar/ob_mask_DateField crashes VM
kvn
parents:
3941
diff
changeset
|
133 orig_old->dump(); |
5da7201222d5
7110824: ctw/jarfiles/GUI3rdParty_jar/ob_mask_DateField crashes VM
kvn
parents:
3941
diff
changeset
|
134 tty->print_cr("old:"); |
5da7201222d5
7110824: ctw/jarfiles/GUI3rdParty_jar/ob_mask_DateField crashes VM
kvn
parents:
3941
diff
changeset
|
135 old->dump(); |
5da7201222d5
7110824: ctw/jarfiles/GUI3rdParty_jar/ob_mask_DateField crashes VM
kvn
parents:
3941
diff
changeset
|
136 assert(false, "unexpected yanked node"); |
5da7201222d5
7110824: ctw/jarfiles/GUI3rdParty_jar/ob_mask_DateField crashes VM
kvn
parents:
3941
diff
changeset
|
137 } |
5da7201222d5
7110824: ctw/jarfiles/GUI3rdParty_jar/ob_mask_DateField crashes VM
kvn
parents:
3941
diff
changeset
|
138 if (old->is_Con()) |
5da7201222d5
7110824: ctw/jarfiles/GUI3rdParty_jar/ob_mask_DateField crashes VM
kvn
parents:
3941
diff
changeset
|
139 orig_old = old; // Reset to satisfy expected nodes checks. |
5da7201222d5
7110824: ctw/jarfiles/GUI3rdParty_jar/ob_mask_DateField crashes VM
kvn
parents:
3941
diff
changeset
|
140 #endif |
3934
8f47d8870d9a
7087453: PhaseChaitin::yank_if_dead() should handle MachTemp inputs
roland
parents:
2008
diff
changeset
|
141 blk_adjust += yank(old, current_block, value, regnd); |
8f47d8870d9a
7087453: PhaseChaitin::yank_if_dead() should handle MachTemp inputs
roland
parents:
2008
diff
changeset
|
142 |
8f47d8870d9a
7087453: PhaseChaitin::yank_if_dead() should handle MachTemp inputs
roland
parents:
2008
diff
changeset
|
143 for (uint i = 1; i < old->req(); i++) { |
4776
5da7201222d5
7110824: ctw/jarfiles/GUI3rdParty_jar/ob_mask_DateField crashes VM
kvn
parents:
3941
diff
changeset
|
144 Node* n = old->in(i); |
5da7201222d5
7110824: ctw/jarfiles/GUI3rdParty_jar/ob_mask_DateField crashes VM
kvn
parents:
3941
diff
changeset
|
145 if (n != NULL) { |
5da7201222d5
7110824: ctw/jarfiles/GUI3rdParty_jar/ob_mask_DateField crashes VM
kvn
parents:
3941
diff
changeset
|
146 old->set_req(i, NULL); |
5da7201222d5
7110824: ctw/jarfiles/GUI3rdParty_jar/ob_mask_DateField crashes VM
kvn
parents:
3941
diff
changeset
|
147 blk_adjust += yank_if_dead_recurse(n, orig_old, current_block, value, regnd); |
3934
8f47d8870d9a
7087453: PhaseChaitin::yank_if_dead() should handle MachTemp inputs
roland
parents:
2008
diff
changeset
|
148 } |
0 | 149 } |
4776
5da7201222d5
7110824: ctw/jarfiles/GUI3rdParty_jar/ob_mask_DateField crashes VM
kvn
parents:
3941
diff
changeset
|
150 // Disconnect control and remove precedence edges if any exist |
7196
2aff40cb4703
7092905: C2: Keep track of the number of dead nodes
bharadwaj
parents:
6185
diff
changeset
|
151 old->disconnect_inputs(NULL, C); |
0 | 152 } |
153 return blk_adjust; | |
154 } | |
155 | |
156 //------------------------------use_prior_register----------------------------- | |
157 // Use the prior value instead of the current value, in an effort to make | |
158 // the current value go dead. Return block iterator adjustment, in case | |
159 // we yank some instructions from this block. | |
160 int PhaseChaitin::use_prior_register( Node *n, uint idx, Node *def, Block *current_block, Node_List &value, Node_List ®nd ) { | |
161 // No effect? | |
162 if( def == n->in(idx) ) return 0; | |
163 // Def is currently dead and can be removed? Do not resurrect | |
164 if( def->outcnt() == 0 ) return 0; | |
165 | |
166 // Not every pair of physical registers are assignment compatible, | |
167 // e.g. on sparc floating point registers are not assignable to integer | |
168 // registers. | |
10111 | 169 const LRG &def_lrg = lrgs(_lrg_map.live_range_id(def)); |
0 | 170 OptoReg::Name def_reg = def_lrg.reg(); |
171 const RegMask &use_mask = n->in_RegMask(idx); | |
172 bool can_use = ( RegMask::can_represent(def_reg) ? (use_mask.Member(def_reg) != 0) | |
173 : (use_mask.is_AllStack() != 0)); | |
6179
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4776
diff
changeset
|
174 if (!RegMask::is_vector(def->ideal_reg())) { |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4776
diff
changeset
|
175 // Check for a copy to or from a misaligned pair. |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4776
diff
changeset
|
176 // It is workaround for a sparc with misaligned pairs. |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4776
diff
changeset
|
177 can_use = can_use && !use_mask.is_misaligned_pair() && !def_lrg.mask().is_misaligned_pair(); |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4776
diff
changeset
|
178 } |
0 | 179 if (!can_use) |
180 return 0; | |
181 | |
182 // Capture the old def in case it goes dead... | |
183 Node *old = n->in(idx); | |
184 | |
185 // Save-on-call copies can only be elided if the entire copy chain can go | |
186 // away, lest we get the same callee-save value alive in 2 locations at | |
187 // once. We check for the obvious trivial case here. Although it can | |
188 // sometimes be elided with cooperation outside our scope, here we will just | |
189 // miss the opportunity. :-( | |
190 if( may_be_copy_of_callee(def) ) { | |
191 if( old->outcnt() > 1 ) return 0; // We're the not last user | |
192 int idx = old->is_Copy(); | |
193 assert( idx, "chain of copies being removed" ); | |
194 Node *old2 = old->in(idx); // Chain of copies | |
195 if( old2->outcnt() > 1 ) return 0; // old is not the last user | |
196 int idx2 = old2->is_Copy(); | |
197 if( !idx2 ) return 0; // Not a chain of 2 copies | |
198 if( def != old2->in(idx2) ) return 0; // Chain of exactly 2 copies | |
199 } | |
200 | |
201 // Use the new def | |
202 n->set_req(idx,def); | |
203 _post_alloc++; | |
204 | |
205 // Is old def now dead? We successfully yanked a copy? | |
206 return yank_if_dead(old,current_block,&value,®nd); | |
207 } | |
208 | |
209 | |
210 //------------------------------skip_copies------------------------------------ | |
211 // Skip through any number of copies (that don't mod oop-i-ness) | |
212 Node *PhaseChaitin::skip_copies( Node *c ) { | |
213 int idx = c->is_Copy(); | |
10111 | 214 uint is_oop = lrgs(_lrg_map.live_range_id(c))._is_oop; |
0 | 215 while (idx != 0) { |
216 guarantee(c->in(idx) != NULL, "must not resurrect dead copy"); | |
10111 | 217 if (lrgs(_lrg_map.live_range_id(c->in(idx)))._is_oop != is_oop) { |
0 | 218 break; // casting copy, not the same value |
10111 | 219 } |
0 | 220 c = c->in(idx); |
221 idx = c->is_Copy(); | |
222 } | |
223 return c; | |
224 } | |
225 | |
226 //------------------------------elide_copy------------------------------------- | |
227 // Remove (bypass) copies along Node n, edge k. | |
228 int PhaseChaitin::elide_copy( Node *n, int k, Block *current_block, Node_List &value, Node_List ®nd, bool can_change_regs ) { | |
229 int blk_adjust = 0; | |
230 | |
10111 | 231 uint nk_idx = _lrg_map.live_range_id(n->in(k)); |
232 OptoReg::Name nk_reg = lrgs(nk_idx).reg(); | |
0 | 233 |
234 // Remove obvious same-register copies | |
235 Node *x = n->in(k); | |
236 int idx; | |
237 while( (idx=x->is_Copy()) != 0 ) { | |
238 Node *copy = x->in(idx); | |
239 guarantee(copy != NULL, "must not resurrect dead copy"); | |
10111 | 240 if(lrgs(_lrg_map.live_range_id(copy)).reg() != nk_reg) { |
241 break; | |
242 } | |
0 | 243 blk_adjust += use_prior_register(n,k,copy,current_block,value,regnd); |
10111 | 244 if (n->in(k) != copy) { |
245 break; // Failed for some cutout? | |
246 } | |
0 | 247 x = copy; // Progress, try again |
248 } | |
249 | |
250 // Phis and 2-address instructions cannot change registers so easily - their | |
251 // outputs must match their input. | |
252 if( !can_change_regs ) | |
253 return blk_adjust; // Only check stupid copies! | |
254 | |
255 // Loop backedges won't have a value-mapping yet | |
256 if( &value == NULL ) return blk_adjust; | |
257 | |
258 // Skip through all copies to the _value_ being used. Do not change from | |
259 // int to pointer. This attempts to jump through a chain of copies, where | |
260 // intermediate copies might be illegal, i.e., value is stored down to stack | |
261 // then reloaded BUT survives in a register the whole way. | |
262 Node *val = skip_copies(n->in(k)); | |
263 | |
2008 | 264 if (val == x && nk_idx != 0 && |
265 regnd[nk_reg] != NULL && regnd[nk_reg] != x && | |
10111 | 266 _lrg_map.live_range_id(x) == _lrg_map.live_range_id(regnd[nk_reg])) { |
2008 | 267 // When rematerialzing nodes and stretching lifetimes, the |
268 // allocator will reuse the original def for multidef LRG instead | |
269 // of the current reaching def because it can't know it's safe to | |
270 // do so. After allocation completes if they are in the same LRG | |
271 // then it should use the current reaching def instead. | |
272 n->set_req(k, regnd[nk_reg]); | |
273 blk_adjust += yank_if_dead(val, current_block, &value, ®nd); | |
274 val = skip_copies(n->in(k)); | |
275 } | |
276 | |
6179
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4776
diff
changeset
|
277 if (val == x) return blk_adjust; // No progress? |
0 | 278 |
6179
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4776
diff
changeset
|
279 int n_regs = RegMask::num_registers(val->ideal_reg()); |
10111 | 280 uint val_idx = _lrg_map.live_range_id(val); |
0 | 281 OptoReg::Name val_reg = lrgs(val_idx).reg(); |
282 | |
283 // See if it happens to already be in the correct register! | |
284 // (either Phi's direct register, or the common case of the name | |
285 // never-clobbered original-def register) | |
6179
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4776
diff
changeset
|
286 if (register_contains_value(val, val_reg, n_regs, value)) { |
0 | 287 blk_adjust += use_prior_register(n,k,regnd[val_reg],current_block,value,regnd); |
288 if( n->in(k) == regnd[val_reg] ) // Success! Quit trying | |
289 return blk_adjust; | |
290 } | |
291 | |
292 // See if we can skip the copy by changing registers. Don't change from | |
293 // using a register to using the stack unless we know we can remove a | |
294 // copy-load. Otherwise we might end up making a pile of Intel cisc-spill | |
295 // ops reading from memory instead of just loading once and using the | |
296 // register. | |
297 | |
298 // Also handle duplicate copies here. | |
299 const Type *t = val->is_Con() ? val->bottom_type() : NULL; | |
300 | |
301 // Scan all registers to see if this value is around already | |
302 for( uint reg = 0; reg < (uint)_max_reg; reg++ ) { | |
400
cc80376deb0c
6667595: Set probability FAIR for pre-, post- loops and ALWAYS for main loop
kvn
parents:
196
diff
changeset
|
303 if (reg == (uint)nk_reg) { |
cc80376deb0c
6667595: Set probability FAIR for pre-, post- loops and ALWAYS for main loop
kvn
parents:
196
diff
changeset
|
304 // Found ourselves so check if there is only one user of this |
cc80376deb0c
6667595: Set probability FAIR for pre-, post- loops and ALWAYS for main loop
kvn
parents:
196
diff
changeset
|
305 // copy and keep on searching for a better copy if so. |
cc80376deb0c
6667595: Set probability FAIR for pre-, post- loops and ALWAYS for main loop
kvn
parents:
196
diff
changeset
|
306 bool ignore_self = true; |
cc80376deb0c
6667595: Set probability FAIR for pre-, post- loops and ALWAYS for main loop
kvn
parents:
196
diff
changeset
|
307 x = n->in(k); |
cc80376deb0c
6667595: Set probability FAIR for pre-, post- loops and ALWAYS for main loop
kvn
parents:
196
diff
changeset
|
308 DUIterator_Fast imax, i = x->fast_outs(imax); |
cc80376deb0c
6667595: Set probability FAIR for pre-, post- loops and ALWAYS for main loop
kvn
parents:
196
diff
changeset
|
309 Node* first = x->fast_out(i); i++; |
cc80376deb0c
6667595: Set probability FAIR for pre-, post- loops and ALWAYS for main loop
kvn
parents:
196
diff
changeset
|
310 while (i < imax && ignore_self) { |
cc80376deb0c
6667595: Set probability FAIR for pre-, post- loops and ALWAYS for main loop
kvn
parents:
196
diff
changeset
|
311 Node* use = x->fast_out(i); i++; |
cc80376deb0c
6667595: Set probability FAIR for pre-, post- loops and ALWAYS for main loop
kvn
parents:
196
diff
changeset
|
312 if (use != first) ignore_self = false; |
cc80376deb0c
6667595: Set probability FAIR for pre-, post- loops and ALWAYS for main loop
kvn
parents:
196
diff
changeset
|
313 } |
cc80376deb0c
6667595: Set probability FAIR for pre-, post- loops and ALWAYS for main loop
kvn
parents:
196
diff
changeset
|
314 if (ignore_self) continue; |
cc80376deb0c
6667595: Set probability FAIR for pre-, post- loops and ALWAYS for main loop
kvn
parents:
196
diff
changeset
|
315 } |
cc80376deb0c
6667595: Set probability FAIR for pre-, post- loops and ALWAYS for main loop
kvn
parents:
196
diff
changeset
|
316 |
0 | 317 Node *vv = value[reg]; |
6185 | 318 if (n_regs > 1) { // Doubles and vectors check for aligned-adjacent set |
319 uint last = (n_regs-1); // Looking for the last part of a set | |
320 if ((reg&last) != last) continue; // Wrong part of a set | |
321 if (!register_contains_value(vv, reg, n_regs, value)) continue; // Different value | |
0 | 322 } |
323 if( vv == val || // Got a direct hit? | |
324 (t && vv && vv->bottom_type() == t && vv->is_Mach() && | |
325 vv->as_Mach()->rule() == val->as_Mach()->rule()) ) { // Or same constant? | |
326 assert( !n->is_Phi(), "cannot change registers at a Phi so easily" ); | |
327 if( OptoReg::is_stack(nk_reg) || // CISC-loading from stack OR | |
328 OptoReg::is_reg(reg) || // turning into a register use OR | |
329 regnd[reg]->outcnt()==1 ) { // last use of a spill-load turns into a CISC use | |
330 blk_adjust += use_prior_register(n,k,regnd[reg],current_block,value,regnd); | |
331 if( n->in(k) == regnd[reg] ) // Success! Quit trying | |
332 return blk_adjust; | |
333 } // End of if not degrading to a stack | |
334 } // End of if found value in another register | |
335 } // End of scan all machine registers | |
336 return blk_adjust; | |
337 } | |
338 | |
339 | |
340 // | |
341 // Check if nreg already contains the constant value val. Normal copy | |
342 // elimination doesn't doesn't work on constants because multiple | |
343 // nodes can represent the same constant so the type and rule of the | |
344 // MachNode must be checked to ensure equivalence. | |
345 // | |
70
b683f557224b
6661247: Internal bug in 32-bit HotSpot optimizer while bit manipulations
never
parents:
0
diff
changeset
|
346 bool PhaseChaitin::eliminate_copy_of_constant(Node* val, Node* n, |
b683f557224b
6661247: Internal bug in 32-bit HotSpot optimizer while bit manipulations
never
parents:
0
diff
changeset
|
347 Block *current_block, |
0 | 348 Node_List& value, Node_List& regnd, |
349 OptoReg::Name nreg, OptoReg::Name nreg2) { | |
350 if (value[nreg] != val && val->is_Con() && | |
351 value[nreg] != NULL && value[nreg]->is_Con() && | |
352 (nreg2 == OptoReg::Bad || value[nreg] == value[nreg2]) && | |
353 value[nreg]->bottom_type() == val->bottom_type() && | |
354 value[nreg]->as_Mach()->rule() == val->as_Mach()->rule()) { | |
355 // This code assumes that two MachNodes representing constants | |
356 // which have the same rule and the same bottom type will produce | |
357 // identical effects into a register. This seems like it must be | |
358 // objectively true unless there are hidden inputs to the nodes | |
359 // but if that were to change this code would need to updated. | |
360 // Since they are equivalent the second one if redundant and can | |
361 // be removed. | |
362 // | |
70
b683f557224b
6661247: Internal bug in 32-bit HotSpot optimizer while bit manipulations
never
parents:
0
diff
changeset
|
363 // n will be replaced with the old value but n might have |
0 | 364 // kills projections associated with it so remove them now so that |
605 | 365 // yank_if_dead will be able to eliminate the copy once the uses |
0 | 366 // have been transferred to the old[value]. |
70
b683f557224b
6661247: Internal bug in 32-bit HotSpot optimizer while bit manipulations
never
parents:
0
diff
changeset
|
367 for (DUIterator_Fast imax, i = n->fast_outs(imax); i < imax; i++) { |
b683f557224b
6661247: Internal bug in 32-bit HotSpot optimizer while bit manipulations
never
parents:
0
diff
changeset
|
368 Node* use = n->fast_out(i); |
0 | 369 if (use->is_Proj() && use->outcnt() == 0) { |
370 // Kill projections have no users and one input | |
371 use->set_req(0, C->top()); | |
372 yank_if_dead(use, current_block, &value, ®nd); | |
373 --i; --imax; | |
374 } | |
375 } | |
376 _post_alloc++; | |
377 return true; | |
378 } | |
379 return false; | |
380 } | |
381 | |
382 | |
383 //------------------------------post_allocate_copy_removal--------------------- | |
384 // Post-Allocation peephole copy removal. We do this in 1 pass over the | |
385 // basic blocks. We maintain a mapping of registers to Nodes (an array of | |
386 // Nodes indexed by machine register or stack slot number). NULL means that a | |
387 // register is not mapped to any Node. We can (want to have!) have several | |
388 // registers map to the same Node. We walk forward over the instructions | |
389 // updating the mapping as we go. At merge points we force a NULL if we have | |
390 // to merge 2 different Nodes into the same register. Phi functions will give | |
391 // us a new Node if there is a proper value merging. Since the blocks are | |
392 // arranged in some RPO, we will visit all parent blocks before visiting any | |
393 // successor blocks (except at loops). | |
394 // | |
395 // If we find a Copy we look to see if the Copy's source register is a stack | |
396 // slot and that value has already been loaded into some machine register; if | |
397 // so we use machine register directly. This turns a Load into a reg-reg | |
398 // Move. We also look for reloads of identical constants. | |
399 // | |
400 // When we see a use from a reg-reg Copy, we will attempt to use the copy's | |
401 // source directly and make the copy go dead. | |
402 void PhaseChaitin::post_allocate_copy_removal() { | |
403 NOT_PRODUCT( Compile::TracePhase t3("postAllocCopyRemoval", &_t_postAllocCopyRemoval, TimeCompiler); ) | |
404 ResourceMark rm; | |
405 | |
406 // Need a mapping from basic block Node_Lists. We need a Node_List to | |
407 // map from register number to value-producing Node. | |
12071
adb9a7d94cb5
8023003: Cleanup the public interface to PhaseCFG
adlertz
parents:
12023
diff
changeset
|
408 Node_List **blk2value = NEW_RESOURCE_ARRAY( Node_List *, _cfg.number_of_blocks() + 1); |
adb9a7d94cb5
8023003: Cleanup the public interface to PhaseCFG
adlertz
parents:
12023
diff
changeset
|
409 memset(blk2value, 0, sizeof(Node_List*) * (_cfg.number_of_blocks() + 1)); |
0 | 410 // Need a mapping from basic block Node_Lists. We need a Node_List to |
411 // map from register number to register-defining Node. | |
12071
adb9a7d94cb5
8023003: Cleanup the public interface to PhaseCFG
adlertz
parents:
12023
diff
changeset
|
412 Node_List **blk2regnd = NEW_RESOURCE_ARRAY( Node_List *, _cfg.number_of_blocks() + 1); |
adb9a7d94cb5
8023003: Cleanup the public interface to PhaseCFG
adlertz
parents:
12023
diff
changeset
|
413 memset(blk2regnd, 0, sizeof(Node_List*) * (_cfg.number_of_blocks() + 1)); |
0 | 414 |
415 // We keep unused Node_Lists on a free_list to avoid wasting | |
416 // memory. | |
417 GrowableArray<Node_List*> free_list = GrowableArray<Node_List*>(16); | |
418 | |
419 // For all blocks | |
12071
adb9a7d94cb5
8023003: Cleanup the public interface to PhaseCFG
adlertz
parents:
12023
diff
changeset
|
420 for (uint i = 0; i < _cfg.number_of_blocks(); i++) { |
0 | 421 uint j; |
12071
adb9a7d94cb5
8023003: Cleanup the public interface to PhaseCFG
adlertz
parents:
12023
diff
changeset
|
422 Block* block = _cfg.get_block(i); |
0 | 423 |
424 // Count of Phis in block | |
425 uint phi_dex; | |
12167
650868c062a9
8023691: Create interface for nodes in class Block
adlertz
parents:
12071
diff
changeset
|
426 for (phi_dex = 1; phi_dex < block->number_of_nodes(); phi_dex++) { |
650868c062a9
8023691: Create interface for nodes in class Block
adlertz
parents:
12071
diff
changeset
|
427 Node* phi = block->get_node(phi_dex); |
12071
adb9a7d94cb5
8023003: Cleanup the public interface to PhaseCFG
adlertz
parents:
12023
diff
changeset
|
428 if (!phi->is_Phi()) { |
0 | 429 break; |
12071
adb9a7d94cb5
8023003: Cleanup the public interface to PhaseCFG
adlertz
parents:
12023
diff
changeset
|
430 } |
0 | 431 } |
432 | |
433 // If any predecessor has not been visited, we do not know the state | |
434 // of registers at the start. Check for this, while updating copies | |
435 // along Phi input edges | |
436 bool missing_some_inputs = false; | |
437 Block *freed = NULL; | |
12071
adb9a7d94cb5
8023003: Cleanup the public interface to PhaseCFG
adlertz
parents:
12023
diff
changeset
|
438 for (j = 1; j < block->num_preds(); j++) { |
adb9a7d94cb5
8023003: Cleanup the public interface to PhaseCFG
adlertz
parents:
12023
diff
changeset
|
439 Block* pb = _cfg.get_block_for_node(block->pred(j)); |
0 | 440 // Remove copies along phi edges |
12071
adb9a7d94cb5
8023003: Cleanup the public interface to PhaseCFG
adlertz
parents:
12023
diff
changeset
|
441 for (uint k = 1; k < phi_dex; k++) { |
12167
650868c062a9
8023691: Create interface for nodes in class Block
adlertz
parents:
12071
diff
changeset
|
442 elide_copy(block->get_node(k), j, block, *blk2value[pb->_pre_order], *blk2regnd[pb->_pre_order], false); |
12071
adb9a7d94cb5
8023003: Cleanup the public interface to PhaseCFG
adlertz
parents:
12023
diff
changeset
|
443 } |
adb9a7d94cb5
8023003: Cleanup the public interface to PhaseCFG
adlertz
parents:
12023
diff
changeset
|
444 if (blk2value[pb->_pre_order]) { // Have a mapping on this edge? |
0 | 445 // See if this predecessor's mappings have been used by everybody |
446 // who wants them. If so, free 'em. | |
447 uint k; | |
12071
adb9a7d94cb5
8023003: Cleanup the public interface to PhaseCFG
adlertz
parents:
12023
diff
changeset
|
448 for (k = 0; k < pb->_num_succs; k++) { |
adb9a7d94cb5
8023003: Cleanup the public interface to PhaseCFG
adlertz
parents:
12023
diff
changeset
|
449 Block* pbsucc = pb->_succs[k]; |
adb9a7d94cb5
8023003: Cleanup the public interface to PhaseCFG
adlertz
parents:
12023
diff
changeset
|
450 if (!blk2value[pbsucc->_pre_order] && pbsucc != block) { |
0 | 451 break; // Found a future user |
12071
adb9a7d94cb5
8023003: Cleanup the public interface to PhaseCFG
adlertz
parents:
12023
diff
changeset
|
452 } |
0 | 453 } |
12071
adb9a7d94cb5
8023003: Cleanup the public interface to PhaseCFG
adlertz
parents:
12023
diff
changeset
|
454 if (k >= pb->_num_succs) { // No more uses, free! |
0 | 455 freed = pb; // Record last block freed |
456 free_list.push(blk2value[pb->_pre_order]); | |
457 free_list.push(blk2regnd[pb->_pre_order]); | |
458 } | |
459 } else { // This block has unvisited (loopback) inputs | |
460 missing_some_inputs = true; | |
461 } | |
462 } | |
463 | |
464 | |
465 // Extract Node_List mappings. If 'freed' is non-zero, we just popped | |
466 // 'freed's blocks off the list | |
467 Node_List ®nd = *(free_list.is_empty() ? new Node_List() : free_list.pop()); | |
468 Node_List &value = *(free_list.is_empty() ? new Node_List() : free_list.pop()); | |
469 assert( !freed || blk2value[freed->_pre_order] == &value, "" ); | |
470 value.map(_max_reg,NULL); | |
471 regnd.map(_max_reg,NULL); | |
472 // Set mappings as OUR mappings | |
12071
adb9a7d94cb5
8023003: Cleanup the public interface to PhaseCFG
adlertz
parents:
12023
diff
changeset
|
473 blk2value[block->_pre_order] = &value; |
adb9a7d94cb5
8023003: Cleanup the public interface to PhaseCFG
adlertz
parents:
12023
diff
changeset
|
474 blk2regnd[block->_pre_order] = ®nd; |
0 | 475 |
476 // Initialize value & regnd for this block | |
12071
adb9a7d94cb5
8023003: Cleanup the public interface to PhaseCFG
adlertz
parents:
12023
diff
changeset
|
477 if (missing_some_inputs) { |
0 | 478 // Some predecessor has not yet been visited; zap map to empty |
12071
adb9a7d94cb5
8023003: Cleanup the public interface to PhaseCFG
adlertz
parents:
12023
diff
changeset
|
479 for (uint k = 0; k < (uint)_max_reg; k++) { |
0 | 480 value.map(k,NULL); |
481 regnd.map(k,NULL); | |
482 } | |
483 } else { | |
484 if( !freed ) { // Didn't get a freebie prior block | |
485 // Must clone some data | |
12071
adb9a7d94cb5
8023003: Cleanup the public interface to PhaseCFG
adlertz
parents:
12023
diff
changeset
|
486 freed = _cfg.get_block_for_node(block->pred(1)); |
0 | 487 Node_List &f_value = *blk2value[freed->_pre_order]; |
488 Node_List &f_regnd = *blk2regnd[freed->_pre_order]; | |
489 for( uint k = 0; k < (uint)_max_reg; k++ ) { | |
490 value.map(k,f_value[k]); | |
491 regnd.map(k,f_regnd[k]); | |
492 } | |
493 } | |
494 // Merge all inputs together, setting to NULL any conflicts. | |
12071
adb9a7d94cb5
8023003: Cleanup the public interface to PhaseCFG
adlertz
parents:
12023
diff
changeset
|
495 for (j = 1; j < block->num_preds(); j++) { |
adb9a7d94cb5
8023003: Cleanup the public interface to PhaseCFG
adlertz
parents:
12023
diff
changeset
|
496 Block* pb = _cfg.get_block_for_node(block->pred(j)); |
adb9a7d94cb5
8023003: Cleanup the public interface to PhaseCFG
adlertz
parents:
12023
diff
changeset
|
497 if (pb == freed) { |
adb9a7d94cb5
8023003: Cleanup the public interface to PhaseCFG
adlertz
parents:
12023
diff
changeset
|
498 continue; // Did self already via freelist |
adb9a7d94cb5
8023003: Cleanup the public interface to PhaseCFG
adlertz
parents:
12023
diff
changeset
|
499 } |
0 | 500 Node_List &p_regnd = *blk2regnd[pb->_pre_order]; |
501 for( uint k = 0; k < (uint)_max_reg; k++ ) { | |
502 if( regnd[k] != p_regnd[k] ) { // Conflict on reaching defs? | |
503 value.map(k,NULL); // Then no value handy | |
504 regnd.map(k,NULL); | |
505 } | |
506 } | |
507 } | |
508 } | |
509 | |
510 // For all Phi's | |
12071
adb9a7d94cb5
8023003: Cleanup the public interface to PhaseCFG
adlertz
parents:
12023
diff
changeset
|
511 for (j = 1; j < phi_dex; j++) { |
0 | 512 uint k; |
12167
650868c062a9
8023691: Create interface for nodes in class Block
adlertz
parents:
12071
diff
changeset
|
513 Node *phi = block->get_node(j); |
10111 | 514 uint pidx = _lrg_map.live_range_id(phi); |
515 OptoReg::Name preg = lrgs(_lrg_map.live_range_id(phi)).reg(); | |
0 | 516 |
517 // Remove copies remaining on edges. Check for junk phi. | |
518 Node *u = NULL; | |
10111 | 519 for (k = 1; k < phi->req(); k++) { |
0 | 520 Node *x = phi->in(k); |
521 if( phi != x && u != x ) // Found a different input | |
522 u = u ? NodeSentinel : x; // Capture unique input, or NodeSentinel for 2nd input | |
523 } | |
12071
adb9a7d94cb5
8023003: Cleanup the public interface to PhaseCFG
adlertz
parents:
12023
diff
changeset
|
524 if (u != NodeSentinel) { // Junk Phi. Remove |
12167
650868c062a9
8023691: Create interface for nodes in class Block
adlertz
parents:
12071
diff
changeset
|
525 block->remove_node(j--); |
12023
d1034bd8cefc
8022284: Hide internal data structure in PhaseCFG
adlertz
parents:
10111
diff
changeset
|
526 phi_dex--; |
d1034bd8cefc
8022284: Hide internal data structure in PhaseCFG
adlertz
parents:
10111
diff
changeset
|
527 _cfg.unmap_node_from_block(phi); |
0 | 528 phi->replace_by(u); |
7196
2aff40cb4703
7092905: C2: Keep track of the number of dead nodes
bharadwaj
parents:
6185
diff
changeset
|
529 phi->disconnect_inputs(NULL, C); |
0 | 530 continue; |
531 } | |
532 // Note that if value[pidx] exists, then we merged no new values here | |
533 // and the phi is useless. This can happen even with the above phi | |
534 // removal for complex flows. I cannot keep the better known value here | |
535 // because locally the phi appears to define a new merged value. If I | |
536 // keep the better value then a copy of the phi, being unable to use the | |
537 // global flow analysis, can't "peek through" the phi to the original | |
538 // reaching value and so will act like it's defining a new value. This | |
539 // can lead to situations where some uses are from the old and some from | |
540 // the new values. Not illegal by itself but throws the over-strong | |
541 // assert in scheduling. | |
542 if( pidx ) { | |
543 value.map(preg,phi); | |
544 regnd.map(preg,phi); | |
6179
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4776
diff
changeset
|
545 int n_regs = RegMask::num_registers(phi->ideal_reg()); |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4776
diff
changeset
|
546 for (int l = 1; l < n_regs; l++) { |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4776
diff
changeset
|
547 OptoReg::Name preg_lo = OptoReg::add(preg,-l); |
0 | 548 value.map(preg_lo,phi); |
549 regnd.map(preg_lo,phi); | |
550 } | |
551 } | |
552 } | |
553 | |
554 // For all remaining instructions | |
12167
650868c062a9
8023691: Create interface for nodes in class Block
adlertz
parents:
12071
diff
changeset
|
555 for (j = phi_dex; j < block->number_of_nodes(); j++) { |
650868c062a9
8023691: Create interface for nodes in class Block
adlertz
parents:
12071
diff
changeset
|
556 Node* n = block->get_node(j); |
0 | 557 |
12071
adb9a7d94cb5
8023003: Cleanup the public interface to PhaseCFG
adlertz
parents:
12023
diff
changeset
|
558 if(n->outcnt() == 0 && // Dead? |
adb9a7d94cb5
8023003: Cleanup the public interface to PhaseCFG
adlertz
parents:
12023
diff
changeset
|
559 n != C->top() && // (ignore TOP, it has no du info) |
adb9a7d94cb5
8023003: Cleanup the public interface to PhaseCFG
adlertz
parents:
12023
diff
changeset
|
560 !n->is_Proj() ) { // fat-proj kills |
adb9a7d94cb5
8023003: Cleanup the public interface to PhaseCFG
adlertz
parents:
12023
diff
changeset
|
561 j -= yank_if_dead(n, block, &value, ®nd); |
0 | 562 continue; |
563 } | |
564 | |
565 // Improve reaching-def info. Occasionally post-alloc's liveness gives | |
566 // up (at loop backedges, because we aren't doing a full flow pass). | |
567 // The presence of a live use essentially asserts that the use's def is | |
568 // alive and well at the use (or else the allocator fubar'd). Take | |
569 // advantage of this info to set a reaching def for the use-reg. | |
570 uint k; | |
10111 | 571 for (k = 1; k < n->req(); k++) { |
0 | 572 Node *def = n->in(k); // n->in(k) is a USE; def is the DEF for this USE |
573 guarantee(def != NULL, "no disconnected nodes at this point"); | |
10111 | 574 uint useidx = _lrg_map.live_range_id(def); // useidx is the live range index for this USE |
0 | 575 |
576 if( useidx ) { | |
577 OptoReg::Name ureg = lrgs(useidx).reg(); | |
578 if( !value[ureg] ) { | |
579 int idx; // Skip occasional useless copy | |
580 while( (idx=def->is_Copy()) != 0 && | |
581 def->in(idx) != NULL && // NULL should not happen | |
10111 | 582 ureg == lrgs(_lrg_map.live_range_id(def->in(idx))).reg()) |
0 | 583 def = def->in(idx); |
584 Node *valdef = skip_copies(def); // tighten up val through non-useless copies | |
585 value.map(ureg,valdef); // record improved reaching-def info | |
586 regnd.map(ureg, def); | |
587 // Record other half of doubles | |
6179
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4776
diff
changeset
|
588 uint def_ideal_reg = def->ideal_reg(); |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4776
diff
changeset
|
589 int n_regs = RegMask::num_registers(def_ideal_reg); |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4776
diff
changeset
|
590 for (int l = 1; l < n_regs; l++) { |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4776
diff
changeset
|
591 OptoReg::Name ureg_lo = OptoReg::add(ureg,-l); |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4776
diff
changeset
|
592 if (!value[ureg_lo] && |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4776
diff
changeset
|
593 (!RegMask::can_represent(ureg_lo) || |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4776
diff
changeset
|
594 lrgs(useidx).mask().Member(ureg_lo))) { // Nearly always adjacent |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4776
diff
changeset
|
595 value.map(ureg_lo,valdef); // record improved reaching-def info |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4776
diff
changeset
|
596 regnd.map(ureg_lo, def); |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4776
diff
changeset
|
597 } |
0 | 598 } |
599 } | |
600 } | |
601 } | |
602 | |
603 const uint two_adr = n->is_Mach() ? n->as_Mach()->two_adr() : 0; | |
604 | |
605 // Remove copies along input edges | |
12071
adb9a7d94cb5
8023003: Cleanup the public interface to PhaseCFG
adlertz
parents:
12023
diff
changeset
|
606 for (k = 1; k < n->req(); k++) { |
adb9a7d94cb5
8023003: Cleanup the public interface to PhaseCFG
adlertz
parents:
12023
diff
changeset
|
607 j -= elide_copy(n, k, block, value, regnd, two_adr != k); |
adb9a7d94cb5
8023003: Cleanup the public interface to PhaseCFG
adlertz
parents:
12023
diff
changeset
|
608 } |
0 | 609 |
610 // Unallocated Nodes define no registers | |
10111 | 611 uint lidx = _lrg_map.live_range_id(n); |
612 if (!lidx) { | |
613 continue; | |
614 } | |
0 | 615 |
616 // Update the register defined by this instruction | |
617 OptoReg::Name nreg = lrgs(lidx).reg(); | |
618 // Skip through all copies to the _value_ being defined. | |
619 // Do not change from int to pointer | |
620 Node *val = skip_copies(n); | |
621 | |
923 | 622 // Clear out a dead definition before starting so that the |
623 // elimination code doesn't have to guard against it. The | |
624 // definition could in fact be a kill projection with a count of | |
625 // 0 which is safe but since those are uninteresting for copy | |
626 // elimination just delete them as well. | |
627 if (regnd[nreg] != NULL && regnd[nreg]->outcnt() == 0) { | |
628 regnd.map(nreg, NULL); | |
629 value.map(nreg, NULL); | |
630 } | |
631 | |
0 | 632 uint n_ideal_reg = n->ideal_reg(); |
6179
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4776
diff
changeset
|
633 int n_regs = RegMask::num_registers(n_ideal_reg); |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4776
diff
changeset
|
634 if (n_regs == 1) { |
0 | 635 // If Node 'n' does not change the value mapped by the register, |
636 // then 'n' is a useless copy. Do not update the register->node | |
637 // mapping so 'n' will go dead. | |
638 if( value[nreg] != val ) { | |
12071
adb9a7d94cb5
8023003: Cleanup the public interface to PhaseCFG
adlertz
parents:
12023
diff
changeset
|
639 if (eliminate_copy_of_constant(val, n, block, value, regnd, nreg, OptoReg::Bad)) { |
adb9a7d94cb5
8023003: Cleanup the public interface to PhaseCFG
adlertz
parents:
12023
diff
changeset
|
640 j -= replace_and_yank_if_dead(n, nreg, block, value, regnd); |
0 | 641 } else { |
642 // Update the mapping: record new Node defined by the register | |
643 regnd.map(nreg,n); | |
644 // Update mapping for defined *value*, which is the defined | |
645 // Node after skipping all copies. | |
646 value.map(nreg,val); | |
647 } | |
923 | 648 } else if( !may_be_copy_of_callee(n) ) { |
12071
adb9a7d94cb5
8023003: Cleanup the public interface to PhaseCFG
adlertz
parents:
12023
diff
changeset
|
649 assert(n->is_Copy(), ""); |
adb9a7d94cb5
8023003: Cleanup the public interface to PhaseCFG
adlertz
parents:
12023
diff
changeset
|
650 j -= replace_and_yank_if_dead(n, nreg, block, value, regnd); |
0 | 651 } |
6179
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4776
diff
changeset
|
652 } else if (RegMask::is_vector(n_ideal_reg)) { |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4776
diff
changeset
|
653 // If Node 'n' does not change the value mapped by the register, |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4776
diff
changeset
|
654 // then 'n' is a useless copy. Do not update the register->node |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4776
diff
changeset
|
655 // mapping so 'n' will go dead. |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4776
diff
changeset
|
656 if (!register_contains_value(val, nreg, n_regs, value)) { |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4776
diff
changeset
|
657 // Update the mapping: record new Node defined by the register |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4776
diff
changeset
|
658 regnd.map(nreg,n); |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4776
diff
changeset
|
659 // Update mapping for defined *value*, which is the defined |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4776
diff
changeset
|
660 // Node after skipping all copies. |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4776
diff
changeset
|
661 value.map(nreg,val); |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4776
diff
changeset
|
662 for (int l = 1; l < n_regs; l++) { |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4776
diff
changeset
|
663 OptoReg::Name nreg_lo = OptoReg::add(nreg,-l); |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4776
diff
changeset
|
664 regnd.map(nreg_lo, n ); |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4776
diff
changeset
|
665 value.map(nreg_lo,val); |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4776
diff
changeset
|
666 } |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4776
diff
changeset
|
667 } else if (n->is_Copy()) { |
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4776
diff
changeset
|
668 // Note: vector can't be constant and can't be copy of calee. |
12071
adb9a7d94cb5
8023003: Cleanup the public interface to PhaseCFG
adlertz
parents:
12023
diff
changeset
|
669 j -= replace_and_yank_if_dead(n, nreg, block, value, regnd); |
6179
8c92982cbbc4
7119644: Increase superword's vector size up to 256 bits
kvn
parents:
4776
diff
changeset
|
670 } |
0 | 671 } else { |
672 // If the value occupies a register pair, record same info | |
673 // in both registers. | |
674 OptoReg::Name nreg_lo = OptoReg::add(nreg,-1); | |
675 if( RegMask::can_represent(nreg_lo) && // Either a spill slot, or | |
676 !lrgs(lidx).mask().Member(nreg_lo) ) { // Nearly always adjacent | |
677 // Sparc occasionally has non-adjacent pairs. | |
678 // Find the actual other value | |
679 RegMask tmp = lrgs(lidx).mask(); | |
680 tmp.Remove(nreg); | |
681 nreg_lo = tmp.find_first_elem(); | |
682 } | |
12071
adb9a7d94cb5
8023003: Cleanup the public interface to PhaseCFG
adlertz
parents:
12023
diff
changeset
|
683 if (value[nreg] != val || value[nreg_lo] != val) { |
adb9a7d94cb5
8023003: Cleanup the public interface to PhaseCFG
adlertz
parents:
12023
diff
changeset
|
684 if (eliminate_copy_of_constant(val, n, block, value, regnd, nreg, nreg_lo)) { |
adb9a7d94cb5
8023003: Cleanup the public interface to PhaseCFG
adlertz
parents:
12023
diff
changeset
|
685 j -= replace_and_yank_if_dead(n, nreg, block, value, regnd); |
0 | 686 } else { |
687 regnd.map(nreg , n ); | |
688 regnd.map(nreg_lo, n ); | |
689 value.map(nreg ,val); | |
690 value.map(nreg_lo,val); | |
691 } | |
12071
adb9a7d94cb5
8023003: Cleanup the public interface to PhaseCFG
adlertz
parents:
12023
diff
changeset
|
692 } else if (!may_be_copy_of_callee(n)) { |
adb9a7d94cb5
8023003: Cleanup the public interface to PhaseCFG
adlertz
parents:
12023
diff
changeset
|
693 assert(n->is_Copy(), ""); |
adb9a7d94cb5
8023003: Cleanup the public interface to PhaseCFG
adlertz
parents:
12023
diff
changeset
|
694 j -= replace_and_yank_if_dead(n, nreg, block, value, regnd); |
0 | 695 } |
696 } | |
697 | |
698 // Fat projections kill many registers | |
699 if( n_ideal_reg == MachProjNode::fat_proj ) { | |
700 RegMask rm = n->out_RegMask(); | |
701 // wow, what an expensive iterator... | |
702 nreg = rm.find_first_elem(); | |
703 while( OptoReg::is_valid(nreg)) { | |
704 rm.Remove(nreg); | |
705 value.map(nreg,n); | |
706 regnd.map(nreg,n); | |
707 nreg = rm.find_first_elem(); | |
708 } | |
709 } | |
710 | |
711 } // End of for all instructions in the block | |
712 | |
713 } // End for all blocks | |
714 } |