annotate graal/com.oracle.graal.lir.amd64/src/com/oracle/graal/lir/amd64/AMD64BinaryConsumer.java @ 21720:d915361cc3a1

moved asm, bytecode and asm.test code back to com.oracle.graal name space (JBS:GRAAL-53)
author Doug Simon <doug.simon@oracle.com>
date Thu, 04 Jun 2015 13:35:47 +0200
parents 6df25b1418be
children 0e095e2c24e2
Ignore whitespace changes - Everywhere: Within whitespace: At end of lines:
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19971
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1 /*
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2 * Copyright (c) 2015, 2015, Oracle and/or its affiliates. All rights reserved.
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3 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
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4 *
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5 * This code is free software; you can redistribute it and/or modify it
46dde3e92715 Restructure AMD64 LIR classes.
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6 * under the terms of the GNU General Public License version 2 only, as
46dde3e92715 Restructure AMD64 LIR classes.
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7 * published by the Free Software Foundation.
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8 *
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9 * This code is distributed in the hope that it will be useful, but WITHOUT
46dde3e92715 Restructure AMD64 LIR classes.
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10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
46dde3e92715 Restructure AMD64 LIR classes.
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11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
46dde3e92715 Restructure AMD64 LIR classes.
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12 * version 2 for more details (a copy is included in the LICENSE file that
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13 * accompanied this code).
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14 *
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15 * You should have received a copy of the GNU General Public License version
46dde3e92715 Restructure AMD64 LIR classes.
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16 * 2 along with this work; if not, write to the Free Software Foundation,
46dde3e92715 Restructure AMD64 LIR classes.
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17 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
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18 *
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19 * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
46dde3e92715 Restructure AMD64 LIR classes.
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20 * or visit www.oracle.com if you need additional information or have any
46dde3e92715 Restructure AMD64 LIR classes.
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21 * questions.
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22 */
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23 package com.oracle.graal.lir.amd64;
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24
21556
48c1ebd24120 renamed com.oracle.graal.api[meta|code] modules to com.oracle.jvmci.[meta|code] (JBS:GRAAL-53)
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25 import com.oracle.jvmci.meta.Constant;
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26 import com.oracle.jvmci.meta.AllocatableValue;
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27 import com.oracle.jvmci.meta.Value;
21708
6df25b1418be moved com.oracle.asm.** to jvmci-util.jar (JBS:GRAAL-53)
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28
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48c1ebd24120 renamed com.oracle.graal.api[meta|code] modules to com.oracle.jvmci.[meta|code] (JBS:GRAAL-53)
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29 import static com.oracle.jvmci.code.ValueUtil.*;
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30 import static com.oracle.graal.lir.LIRInstruction.OperandFlag.*;
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31
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32 import com.oracle.jvmci.code.CompilationResult.DataSectionReference;
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d915361cc3a1 moved asm, bytecode and asm.test code back to com.oracle.graal name space (JBS:GRAAL-53)
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33 import com.oracle.graal.asm.*;
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34 import com.oracle.graal.asm.amd64.*;
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35 import com.oracle.graal.asm.amd64.AMD64Assembler.*;
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36 import com.oracle.graal.lir.*;
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37 import com.oracle.graal.lir.StandardOp.ImplicitNullCheck;
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38 import com.oracle.graal.lir.asm.*;
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39
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40 /**
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41 * AMD64 LIR instructions that have two input operands, but no output operand.
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42 */
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43 public class AMD64BinaryConsumer {
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44
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45 /**
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46 * Instruction that has two {@link AllocatableValue} operands.
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47 */
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48 public static class Op extends AMD64LIRInstruction {
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49 public static final LIRInstructionClass<Op> TYPE = LIRInstructionClass.create(Op.class);
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50
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51 @Opcode private final AMD64RMOp opcode;
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52 private final OperandSize size;
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53
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54 @Use({REG}) protected AllocatableValue x;
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55 @Use({REG, STACK}) protected AllocatableValue y;
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56
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57 public Op(AMD64RMOp opcode, OperandSize size, AllocatableValue x, AllocatableValue y) {
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58 super(TYPE);
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59 this.opcode = opcode;
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60 this.size = size;
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61
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62 this.x = x;
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63 this.y = y;
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64 }
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65
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66 @Override
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67 public void emitCode(CompilationResultBuilder crb, AMD64MacroAssembler masm) {
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68 if (isRegister(y)) {
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69 opcode.emit(masm, size, asRegister(x), asRegister(y));
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70 } else {
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71 assert isStackSlot(y);
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72 opcode.emit(masm, size, asRegister(x), (AMD64Address) crb.asAddress(y));
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73 }
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74 }
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75 }
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76
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77 /**
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78 * Instruction that has one {@link AllocatableValue} operand and one 32-bit immediate operand.
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79 */
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80 public static class ConstOp extends AMD64LIRInstruction {
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81 public static final LIRInstructionClass<ConstOp> TYPE = LIRInstructionClass.create(ConstOp.class);
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82
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83 @Opcode private final AMD64MIOp opcode;
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84 private final OperandSize size;
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85
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86 @Use({REG, STACK}) protected AllocatableValue x;
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87 private final int y;
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88
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89 public ConstOp(AMD64BinaryArithmetic opcode, OperandSize size, AllocatableValue x, int y) {
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90 this(opcode.getMIOpcode(size, NumUtil.isByte(y)), size, x, y);
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91 }
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92
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93 public ConstOp(AMD64MIOp opcode, OperandSize size, AllocatableValue x, int y) {
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94 this(TYPE, opcode, size, x, y);
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95 }
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96
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97 protected ConstOp(LIRInstructionClass<? extends ConstOp> c, AMD64MIOp opcode, OperandSize size, AllocatableValue x, int y) {
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98 super(c);
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99 this.opcode = opcode;
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100 this.size = size;
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101
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102 this.x = x;
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103 this.y = y;
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104 }
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105
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106 @Override
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107 public void emitCode(CompilationResultBuilder crb, AMD64MacroAssembler masm) {
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108 if (isRegister(x)) {
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109 opcode.emit(masm, size, asRegister(x), y);
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110 } else {
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111 assert isStackSlot(x);
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112 opcode.emit(masm, size, (AMD64Address) crb.asAddress(x), y);
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113 }
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114 }
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115 }
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116
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117 /**
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118 * Instruction that has one {@link AllocatableValue} operand and one
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119 * {@link DataSectionReference} operand.
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120 */
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121 public static class DataOp extends AMD64LIRInstruction {
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122 public static final LIRInstructionClass<DataOp> TYPE = LIRInstructionClass.create(DataOp.class);
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123
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124 @Opcode private final AMD64RMOp opcode;
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125 private final OperandSize size;
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126
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127 @Use({REG}) protected AllocatableValue x;
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128 private final Constant y;
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129
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130 private final int alignment;
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131
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132 public DataOp(AMD64RMOp opcode, OperandSize size, AllocatableValue x, Constant y) {
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133 this(opcode, size, x, y, size.getBytes());
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134 }
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135
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136 public DataOp(AMD64RMOp opcode, OperandSize size, AllocatableValue x, Constant y, int alignment) {
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137 super(TYPE);
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138 this.opcode = opcode;
46dde3e92715 Restructure AMD64 LIR classes.
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parents:
diff changeset
139 this.size = size;
46dde3e92715 Restructure AMD64 LIR classes.
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parents:
diff changeset
140
46dde3e92715 Restructure AMD64 LIR classes.
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parents:
diff changeset
141 this.x = x;
46dde3e92715 Restructure AMD64 LIR classes.
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parents:
diff changeset
142 this.y = y;
46dde3e92715 Restructure AMD64 LIR classes.
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parents:
diff changeset
143
46dde3e92715 Restructure AMD64 LIR classes.
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parents:
diff changeset
144 this.alignment = alignment;
46dde3e92715 Restructure AMD64 LIR classes.
Roland Schatz <roland.schatz@oracle.com>
parents:
diff changeset
145 }
46dde3e92715 Restructure AMD64 LIR classes.
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parents:
diff changeset
146
46dde3e92715 Restructure AMD64 LIR classes.
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parents:
diff changeset
147 @Override
46dde3e92715 Restructure AMD64 LIR classes.
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148 public void emitCode(CompilationResultBuilder crb, AMD64MacroAssembler masm) {
46dde3e92715 Restructure AMD64 LIR classes.
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parents:
diff changeset
149 opcode.emit(masm, size, asRegister(x), (AMD64Address) crb.recordDataReferenceInCode(y, alignment));
46dde3e92715 Restructure AMD64 LIR classes.
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150 }
46dde3e92715 Restructure AMD64 LIR classes.
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parents:
diff changeset
151 }
46dde3e92715 Restructure AMD64 LIR classes.
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diff changeset
152
46dde3e92715 Restructure AMD64 LIR classes.
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parents:
diff changeset
153 /**
46dde3e92715 Restructure AMD64 LIR classes.
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154 * Instruction that has an {@link AllocatableValue} as first input and a
46dde3e92715 Restructure AMD64 LIR classes.
Roland Schatz <roland.schatz@oracle.com>
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155 * {@link AMD64AddressValue memory} operand as second input.
46dde3e92715 Restructure AMD64 LIR classes.
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parents:
diff changeset
156 */
46dde3e92715 Restructure AMD64 LIR classes.
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parents:
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157 public static class MemoryRMOp extends AMD64LIRInstruction implements ImplicitNullCheck {
46dde3e92715 Restructure AMD64 LIR classes.
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parents:
diff changeset
158 public static final LIRInstructionClass<MemoryRMOp> TYPE = LIRInstructionClass.create(MemoryRMOp.class);
46dde3e92715 Restructure AMD64 LIR classes.
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parents:
diff changeset
159
46dde3e92715 Restructure AMD64 LIR classes.
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diff changeset
160 @Opcode private final AMD64RMOp opcode;
46dde3e92715 Restructure AMD64 LIR classes.
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parents:
diff changeset
161 private final OperandSize size;
46dde3e92715 Restructure AMD64 LIR classes.
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parents:
diff changeset
162
46dde3e92715 Restructure AMD64 LIR classes.
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diff changeset
163 @Use({REG}) protected AllocatableValue x;
46dde3e92715 Restructure AMD64 LIR classes.
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diff changeset
164 @Use({COMPOSITE}) protected AMD64AddressValue y;
46dde3e92715 Restructure AMD64 LIR classes.
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diff changeset
165
46dde3e92715 Restructure AMD64 LIR classes.
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166 @State protected LIRFrameState state;
46dde3e92715 Restructure AMD64 LIR classes.
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167
46dde3e92715 Restructure AMD64 LIR classes.
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168 public MemoryRMOp(AMD64RMOp opcode, OperandSize size, AllocatableValue x, AMD64AddressValue y, LIRFrameState state) {
46dde3e92715 Restructure AMD64 LIR classes.
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diff changeset
169 super(TYPE);
46dde3e92715 Restructure AMD64 LIR classes.
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170 this.opcode = opcode;
46dde3e92715 Restructure AMD64 LIR classes.
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171 this.size = size;
46dde3e92715 Restructure AMD64 LIR classes.
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parents:
diff changeset
172
46dde3e92715 Restructure AMD64 LIR classes.
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173 this.x = x;
46dde3e92715 Restructure AMD64 LIR classes.
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174 this.y = y;
46dde3e92715 Restructure AMD64 LIR classes.
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diff changeset
175
46dde3e92715 Restructure AMD64 LIR classes.
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176 this.state = state;
46dde3e92715 Restructure AMD64 LIR classes.
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177 }
46dde3e92715 Restructure AMD64 LIR classes.
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178
46dde3e92715 Restructure AMD64 LIR classes.
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diff changeset
179 @Override
46dde3e92715 Restructure AMD64 LIR classes.
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180 public void emitCode(CompilationResultBuilder crb, AMD64MacroAssembler masm) {
46dde3e92715 Restructure AMD64 LIR classes.
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parents:
diff changeset
181 if (state != null) {
46dde3e92715 Restructure AMD64 LIR classes.
Roland Schatz <roland.schatz@oracle.com>
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diff changeset
182 crb.recordImplicitException(masm.position(), state);
46dde3e92715 Restructure AMD64 LIR classes.
Roland Schatz <roland.schatz@oracle.com>
parents:
diff changeset
183 }
46dde3e92715 Restructure AMD64 LIR classes.
Roland Schatz <roland.schatz@oracle.com>
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diff changeset
184 opcode.emit(masm, size, asRegister(x), y.toAddress());
46dde3e92715 Restructure AMD64 LIR classes.
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185 }
46dde3e92715 Restructure AMD64 LIR classes.
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diff changeset
186
46dde3e92715 Restructure AMD64 LIR classes.
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parents:
diff changeset
187 @Override
46dde3e92715 Restructure AMD64 LIR classes.
Roland Schatz <roland.schatz@oracle.com>
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diff changeset
188 public boolean makeNullCheckFor(Value value, LIRFrameState nullCheckState, int implicitNullCheckLimit) {
46dde3e92715 Restructure AMD64 LIR classes.
Roland Schatz <roland.schatz@oracle.com>
parents:
diff changeset
189 if (state == null && y.isValidImplicitNullCheckFor(value, implicitNullCheckLimit)) {
46dde3e92715 Restructure AMD64 LIR classes.
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diff changeset
190 state = nullCheckState;
46dde3e92715 Restructure AMD64 LIR classes.
Roland Schatz <roland.schatz@oracle.com>
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diff changeset
191 return true;
46dde3e92715 Restructure AMD64 LIR classes.
Roland Schatz <roland.schatz@oracle.com>
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diff changeset
192 }
46dde3e92715 Restructure AMD64 LIR classes.
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193 return false;
46dde3e92715 Restructure AMD64 LIR classes.
Roland Schatz <roland.schatz@oracle.com>
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194 }
46dde3e92715 Restructure AMD64 LIR classes.
Roland Schatz <roland.schatz@oracle.com>
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diff changeset
195 }
46dde3e92715 Restructure AMD64 LIR classes.
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diff changeset
196
46dde3e92715 Restructure AMD64 LIR classes.
Roland Schatz <roland.schatz@oracle.com>
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197 /**
46dde3e92715 Restructure AMD64 LIR classes.
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198 * Instruction that has a {@link AMD64AddressValue memory} operand as first input and an
46dde3e92715 Restructure AMD64 LIR classes.
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diff changeset
199 * {@link AllocatableValue} as second input.
46dde3e92715 Restructure AMD64 LIR classes.
Roland Schatz <roland.schatz@oracle.com>
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diff changeset
200 */
46dde3e92715 Restructure AMD64 LIR classes.
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diff changeset
201 public static class MemoryMROp extends AMD64LIRInstruction implements ImplicitNullCheck {
46dde3e92715 Restructure AMD64 LIR classes.
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parents:
diff changeset
202 public static final LIRInstructionClass<MemoryMROp> TYPE = LIRInstructionClass.create(MemoryMROp.class);
46dde3e92715 Restructure AMD64 LIR classes.
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diff changeset
203
46dde3e92715 Restructure AMD64 LIR classes.
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diff changeset
204 @Opcode private final AMD64MROp opcode;
46dde3e92715 Restructure AMD64 LIR classes.
Roland Schatz <roland.schatz@oracle.com>
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diff changeset
205 private final OperandSize size;
46dde3e92715 Restructure AMD64 LIR classes.
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diff changeset
206
46dde3e92715 Restructure AMD64 LIR classes.
Roland Schatz <roland.schatz@oracle.com>
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diff changeset
207 @Use({COMPOSITE}) protected AMD64AddressValue x;
46dde3e92715 Restructure AMD64 LIR classes.
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diff changeset
208 @Use({REG}) protected AllocatableValue y;
46dde3e92715 Restructure AMD64 LIR classes.
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diff changeset
209
46dde3e92715 Restructure AMD64 LIR classes.
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diff changeset
210 @State protected LIRFrameState state;
46dde3e92715 Restructure AMD64 LIR classes.
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diff changeset
211
46dde3e92715 Restructure AMD64 LIR classes.
Roland Schatz <roland.schatz@oracle.com>
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diff changeset
212 public MemoryMROp(AMD64MROp opcode, OperandSize size, AMD64AddressValue x, AllocatableValue y, LIRFrameState state) {
46dde3e92715 Restructure AMD64 LIR classes.
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parents:
diff changeset
213 super(TYPE);
46dde3e92715 Restructure AMD64 LIR classes.
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diff changeset
214 this.opcode = opcode;
46dde3e92715 Restructure AMD64 LIR classes.
Roland Schatz <roland.schatz@oracle.com>
parents:
diff changeset
215 this.size = size;
46dde3e92715 Restructure AMD64 LIR classes.
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parents:
diff changeset
216
46dde3e92715 Restructure AMD64 LIR classes.
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diff changeset
217 this.x = x;
46dde3e92715 Restructure AMD64 LIR classes.
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diff changeset
218 this.y = y;
46dde3e92715 Restructure AMD64 LIR classes.
Roland Schatz <roland.schatz@oracle.com>
parents:
diff changeset
219
46dde3e92715 Restructure AMD64 LIR classes.
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diff changeset
220 this.state = state;
46dde3e92715 Restructure AMD64 LIR classes.
Roland Schatz <roland.schatz@oracle.com>
parents:
diff changeset
221 }
46dde3e92715 Restructure AMD64 LIR classes.
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parents:
diff changeset
222
46dde3e92715 Restructure AMD64 LIR classes.
Roland Schatz <roland.schatz@oracle.com>
parents:
diff changeset
223 @Override
46dde3e92715 Restructure AMD64 LIR classes.
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parents:
diff changeset
224 public void emitCode(CompilationResultBuilder crb, AMD64MacroAssembler masm) {
46dde3e92715 Restructure AMD64 LIR classes.
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parents:
diff changeset
225 if (state != null) {
46dde3e92715 Restructure AMD64 LIR classes.
Roland Schatz <roland.schatz@oracle.com>
parents:
diff changeset
226 crb.recordImplicitException(masm.position(), state);
46dde3e92715 Restructure AMD64 LIR classes.
Roland Schatz <roland.schatz@oracle.com>
parents:
diff changeset
227 }
46dde3e92715 Restructure AMD64 LIR classes.
Roland Schatz <roland.schatz@oracle.com>
parents:
diff changeset
228 opcode.emit(masm, size, x.toAddress(), asRegister(y));
46dde3e92715 Restructure AMD64 LIR classes.
Roland Schatz <roland.schatz@oracle.com>
parents:
diff changeset
229 }
46dde3e92715 Restructure AMD64 LIR classes.
Roland Schatz <roland.schatz@oracle.com>
parents:
diff changeset
230
46dde3e92715 Restructure AMD64 LIR classes.
Roland Schatz <roland.schatz@oracle.com>
parents:
diff changeset
231 @Override
46dde3e92715 Restructure AMD64 LIR classes.
Roland Schatz <roland.schatz@oracle.com>
parents:
diff changeset
232 public boolean makeNullCheckFor(Value value, LIRFrameState nullCheckState, int implicitNullCheckLimit) {
46dde3e92715 Restructure AMD64 LIR classes.
Roland Schatz <roland.schatz@oracle.com>
parents:
diff changeset
233 if (state == null && x.isValidImplicitNullCheckFor(value, implicitNullCheckLimit)) {
46dde3e92715 Restructure AMD64 LIR classes.
Roland Schatz <roland.schatz@oracle.com>
parents:
diff changeset
234 state = nullCheckState;
46dde3e92715 Restructure AMD64 LIR classes.
Roland Schatz <roland.schatz@oracle.com>
parents:
diff changeset
235 return true;
46dde3e92715 Restructure AMD64 LIR classes.
Roland Schatz <roland.schatz@oracle.com>
parents:
diff changeset
236 }
46dde3e92715 Restructure AMD64 LIR classes.
Roland Schatz <roland.schatz@oracle.com>
parents:
diff changeset
237 return false;
46dde3e92715 Restructure AMD64 LIR classes.
Roland Schatz <roland.schatz@oracle.com>
parents:
diff changeset
238 }
46dde3e92715 Restructure AMD64 LIR classes.
Roland Schatz <roland.schatz@oracle.com>
parents:
diff changeset
239 }
46dde3e92715 Restructure AMD64 LIR classes.
Roland Schatz <roland.schatz@oracle.com>
parents:
diff changeset
240
46dde3e92715 Restructure AMD64 LIR classes.
Roland Schatz <roland.schatz@oracle.com>
parents:
diff changeset
241 /**
46dde3e92715 Restructure AMD64 LIR classes.
Roland Schatz <roland.schatz@oracle.com>
parents:
diff changeset
242 * Instruction that has one {@link AMD64AddressValue memory} operand and one 32-bit immediate
46dde3e92715 Restructure AMD64 LIR classes.
Roland Schatz <roland.schatz@oracle.com>
parents:
diff changeset
243 * operand.
46dde3e92715 Restructure AMD64 LIR classes.
Roland Schatz <roland.schatz@oracle.com>
parents:
diff changeset
244 */
46dde3e92715 Restructure AMD64 LIR classes.
Roland Schatz <roland.schatz@oracle.com>
parents:
diff changeset
245 public static class MemoryConstOp extends AMD64LIRInstruction implements ImplicitNullCheck {
46dde3e92715 Restructure AMD64 LIR classes.
Roland Schatz <roland.schatz@oracle.com>
parents:
diff changeset
246 public static final LIRInstructionClass<MemoryConstOp> TYPE = LIRInstructionClass.create(MemoryConstOp.class);
46dde3e92715 Restructure AMD64 LIR classes.
Roland Schatz <roland.schatz@oracle.com>
parents:
diff changeset
247
46dde3e92715 Restructure AMD64 LIR classes.
Roland Schatz <roland.schatz@oracle.com>
parents:
diff changeset
248 @Opcode private final AMD64MIOp opcode;
46dde3e92715 Restructure AMD64 LIR classes.
Roland Schatz <roland.schatz@oracle.com>
parents:
diff changeset
249 private final OperandSize size;
46dde3e92715 Restructure AMD64 LIR classes.
Roland Schatz <roland.schatz@oracle.com>
parents:
diff changeset
250
46dde3e92715 Restructure AMD64 LIR classes.
Roland Schatz <roland.schatz@oracle.com>
parents:
diff changeset
251 @Use({COMPOSITE}) protected AMD64AddressValue x;
46dde3e92715 Restructure AMD64 LIR classes.
Roland Schatz <roland.schatz@oracle.com>
parents:
diff changeset
252 private final int y;
46dde3e92715 Restructure AMD64 LIR classes.
Roland Schatz <roland.schatz@oracle.com>
parents:
diff changeset
253
46dde3e92715 Restructure AMD64 LIR classes.
Roland Schatz <roland.schatz@oracle.com>
parents:
diff changeset
254 @State protected LIRFrameState state;
46dde3e92715 Restructure AMD64 LIR classes.
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parents:
diff changeset
255
46dde3e92715 Restructure AMD64 LIR classes.
Roland Schatz <roland.schatz@oracle.com>
parents:
diff changeset
256 public MemoryConstOp(AMD64BinaryArithmetic opcode, OperandSize size, AMD64AddressValue x, int y, LIRFrameState state) {
46dde3e92715 Restructure AMD64 LIR classes.
Roland Schatz <roland.schatz@oracle.com>
parents:
diff changeset
257 this(opcode.getMIOpcode(size, NumUtil.isByte(y)), size, x, y, state);
46dde3e92715 Restructure AMD64 LIR classes.
Roland Schatz <roland.schatz@oracle.com>
parents:
diff changeset
258 }
46dde3e92715 Restructure AMD64 LIR classes.
Roland Schatz <roland.schatz@oracle.com>
parents:
diff changeset
259
46dde3e92715 Restructure AMD64 LIR classes.
Roland Schatz <roland.schatz@oracle.com>
parents:
diff changeset
260 public MemoryConstOp(AMD64MIOp opcode, OperandSize size, AMD64AddressValue x, int y, LIRFrameState state) {
46dde3e92715 Restructure AMD64 LIR classes.
Roland Schatz <roland.schatz@oracle.com>
parents:
diff changeset
261 this(TYPE, opcode, size, x, y, state);
46dde3e92715 Restructure AMD64 LIR classes.
Roland Schatz <roland.schatz@oracle.com>
parents:
diff changeset
262 }
46dde3e92715 Restructure AMD64 LIR classes.
Roland Schatz <roland.schatz@oracle.com>
parents:
diff changeset
263
46dde3e92715 Restructure AMD64 LIR classes.
Roland Schatz <roland.schatz@oracle.com>
parents:
diff changeset
264 protected MemoryConstOp(LIRInstructionClass<? extends MemoryConstOp> c, AMD64MIOp opcode, OperandSize size, AMD64AddressValue x, int y, LIRFrameState state) {
46dde3e92715 Restructure AMD64 LIR classes.
Roland Schatz <roland.schatz@oracle.com>
parents:
diff changeset
265 super(c);
46dde3e92715 Restructure AMD64 LIR classes.
Roland Schatz <roland.schatz@oracle.com>
parents:
diff changeset
266 this.opcode = opcode;
46dde3e92715 Restructure AMD64 LIR classes.
Roland Schatz <roland.schatz@oracle.com>
parents:
diff changeset
267 this.size = size;
46dde3e92715 Restructure AMD64 LIR classes.
Roland Schatz <roland.schatz@oracle.com>
parents:
diff changeset
268
46dde3e92715 Restructure AMD64 LIR classes.
Roland Schatz <roland.schatz@oracle.com>
parents:
diff changeset
269 this.x = x;
46dde3e92715 Restructure AMD64 LIR classes.
Roland Schatz <roland.schatz@oracle.com>
parents:
diff changeset
270 this.y = y;
46dde3e92715 Restructure AMD64 LIR classes.
Roland Schatz <roland.schatz@oracle.com>
parents:
diff changeset
271
46dde3e92715 Restructure AMD64 LIR classes.
Roland Schatz <roland.schatz@oracle.com>
parents:
diff changeset
272 this.state = state;
46dde3e92715 Restructure AMD64 LIR classes.
Roland Schatz <roland.schatz@oracle.com>
parents:
diff changeset
273 }
46dde3e92715 Restructure AMD64 LIR classes.
Roland Schatz <roland.schatz@oracle.com>
parents:
diff changeset
274
46dde3e92715 Restructure AMD64 LIR classes.
Roland Schatz <roland.schatz@oracle.com>
parents:
diff changeset
275 @Override
46dde3e92715 Restructure AMD64 LIR classes.
Roland Schatz <roland.schatz@oracle.com>
parents:
diff changeset
276 public void emitCode(CompilationResultBuilder crb, AMD64MacroAssembler masm) {
46dde3e92715 Restructure AMD64 LIR classes.
Roland Schatz <roland.schatz@oracle.com>
parents:
diff changeset
277 if (state != null) {
46dde3e92715 Restructure AMD64 LIR classes.
Roland Schatz <roland.schatz@oracle.com>
parents:
diff changeset
278 crb.recordImplicitException(masm.position(), state);
46dde3e92715 Restructure AMD64 LIR classes.
Roland Schatz <roland.schatz@oracle.com>
parents:
diff changeset
279 }
46dde3e92715 Restructure AMD64 LIR classes.
Roland Schatz <roland.schatz@oracle.com>
parents:
diff changeset
280 opcode.emit(masm, size, x.toAddress(), y);
46dde3e92715 Restructure AMD64 LIR classes.
Roland Schatz <roland.schatz@oracle.com>
parents:
diff changeset
281 }
46dde3e92715 Restructure AMD64 LIR classes.
Roland Schatz <roland.schatz@oracle.com>
parents:
diff changeset
282
46dde3e92715 Restructure AMD64 LIR classes.
Roland Schatz <roland.schatz@oracle.com>
parents:
diff changeset
283 @Override
46dde3e92715 Restructure AMD64 LIR classes.
Roland Schatz <roland.schatz@oracle.com>
parents:
diff changeset
284 public boolean makeNullCheckFor(Value value, LIRFrameState nullCheckState, int implicitNullCheckLimit) {
46dde3e92715 Restructure AMD64 LIR classes.
Roland Schatz <roland.schatz@oracle.com>
parents:
diff changeset
285 if (state == null && x.isValidImplicitNullCheckFor(value, implicitNullCheckLimit)) {
46dde3e92715 Restructure AMD64 LIR classes.
Roland Schatz <roland.schatz@oracle.com>
parents:
diff changeset
286 state = nullCheckState;
46dde3e92715 Restructure AMD64 LIR classes.
Roland Schatz <roland.schatz@oracle.com>
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287 return true;
46dde3e92715 Restructure AMD64 LIR classes.
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288 }
46dde3e92715 Restructure AMD64 LIR classes.
Roland Schatz <roland.schatz@oracle.com>
parents:
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289 return false;
46dde3e92715 Restructure AMD64 LIR classes.
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parents:
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290 }
46dde3e92715 Restructure AMD64 LIR classes.
Roland Schatz <roland.schatz@oracle.com>
parents:
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291 }
46dde3e92715 Restructure AMD64 LIR classes.
Roland Schatz <roland.schatz@oracle.com>
parents:
diff changeset
292 }