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comparison src/cpu/x86/vm/x86_64.ad @ 10169:e10e43e58e92

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Merge
author dlong
date Wed, 24 Apr 2013 21:11:02 -0400
parents a6e09d6dd8e5 886d1fd67dc3
children 78603aa58b1e
comparison
equal deleted inserted replaced
10168:a6e09d6dd8e5 10169:e10e43e58e92
1 // 1 //
2 // Copyright (c) 2003, 2012, Oracle and/or its affiliates. All rights reserved. 2 // Copyright (c) 2003, 2013, Oracle and/or its affiliates. All rights reserved.
3 // DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. 3 // DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
4 // 4 //
5 // This code is free software; you can redistribute it and/or modify it 5 // This code is free software; you can redistribute it and/or modify it
6 // under the terms of the GNU General Public License version 2 only, as 6 // under the terms of the GNU General Public License version 2 only, as
7 // published by the Free Software Foundation. 7 // published by the Free Software Foundation.
1649 1649
1650 const RegMask Matcher::method_handle_invoke_SP_save_mask() { 1650 const RegMask Matcher::method_handle_invoke_SP_save_mask() {
1651 return PTR_RBP_REG_mask(); 1651 return PTR_RBP_REG_mask();
1652 } 1652 }
1653 1653
1654 static Address build_address(int b, int i, int s, int d) {
1655 Register index = as_Register(i);
1656 Address::ScaleFactor scale = (Address::ScaleFactor)s;
1657 if (index == rsp) {
1658 index = noreg;
1659 scale = Address::no_scale;
1660 }
1661 Address addr(as_Register(b), index, scale, d);
1662 return addr;
1663 }
1664
1665 %} 1654 %}
1666 1655
1667 //----------ENCODING BLOCK----------------------------------------------------- 1656 //----------ENCODING BLOCK-----------------------------------------------------
1668 // This block specifies the encoding classes used by the compiler to 1657 // This block specifies the encoding classes used by the compiler to
1669 // output byte streams. Encoding classes are parameterized macros 1658 // output byte streams. Encoding classes are parameterized macros
9401 instruct cmpLTMask(rRegI dst, rRegI p, rRegI q, rFlagsReg cr) 9390 instruct cmpLTMask(rRegI dst, rRegI p, rRegI q, rFlagsReg cr)
9402 %{ 9391 %{
9403 match(Set dst (CmpLTMask p q)); 9392 match(Set dst (CmpLTMask p q));
9404 effect(KILL cr); 9393 effect(KILL cr);
9405 9394
9406 ins_cost(400); // XXX 9395 ins_cost(400);
9407 format %{ "cmpl $p, $q\t# cmpLTMask\n\t" 9396 format %{ "cmpl $p, $q\t# cmpLTMask\n\t"
9408 "setlt $dst\n\t" 9397 "setlt $dst\n\t"
9409 "movzbl $dst, $dst\n\t" 9398 "movzbl $dst, $dst\n\t"
9410 "negl $dst" %} 9399 "negl $dst" %}
9411 ins_encode(REX_reg_reg(p, q), opc_reg_reg(0x3B, p, q), // cmpl 9400 ins_encode(REX_reg_reg(p, q), opc_reg_reg(0x3B, p, q), // cmpl
9419 instruct cmpLTMask0(rRegI dst, immI0 zero, rFlagsReg cr) 9408 instruct cmpLTMask0(rRegI dst, immI0 zero, rFlagsReg cr)
9420 %{ 9409 %{
9421 match(Set dst (CmpLTMask dst zero)); 9410 match(Set dst (CmpLTMask dst zero));
9422 effect(KILL cr); 9411 effect(KILL cr);
9423 9412
9424 ins_cost(100); // XXX 9413 ins_cost(100);
9425 format %{ "sarl $dst, #31\t# cmpLTMask0" %} 9414 format %{ "sarl $dst, #31\t# cmpLTMask0" %}
9426 opcode(0xC1, 0x7); /* C1 /7 ib */ 9415 ins_encode %{
9427 ins_encode(reg_opc_imm(dst, 0x1F)); 9416 __ sarl($dst$$Register, 31);
9417 %}
9428 ins_pipe(ialu_reg); 9418 ins_pipe(ialu_reg);
9429 %} 9419 %}
9430 9420
9431 9421 /* Better to save a register than avoid a branch */
9432 instruct cadd_cmpLTMask(rRegI p, rRegI q, rRegI y, rRegI tmp, rFlagsReg cr) 9422 instruct cadd_cmpLTMask(rRegI p, rRegI q, rRegI y, rFlagsReg cr)
9433 %{ 9423 %{
9434 match(Set p (AddI (AndI (CmpLTMask p q) y) (SubI p q))); 9424 match(Set p (AddI (AndI (CmpLTMask p q) y) (SubI p q)));
9435 effect(TEMP tmp, KILL cr); 9425 effect(KILL cr);
9436 9426 ins_cost(300);
9437 ins_cost(400); // XXX 9427 format %{ "subl $p,$q\t# cadd_cmpLTMask\n\t"
9438 format %{ "subl $p, $q\t# cadd_cmpLTMask1\n\t" 9428 "jge done\n\t"
9439 "sbbl $tmp, $tmp\n\t" 9429 "addl $p,$y\n"
9440 "andl $tmp, $y\n\t" 9430 "done: " %}
9441 "addl $p, $tmp" %}
9442 ins_encode %{ 9431 ins_encode %{
9443 Register Rp = $p$$Register; 9432 Register Rp = $p$$Register;
9444 Register Rq = $q$$Register; 9433 Register Rq = $q$$Register;
9445 Register Ry = $y$$Register; 9434 Register Ry = $y$$Register;
9446 Register Rt = $tmp$$Register; 9435 Label done;
9447 __ subl(Rp, Rq); 9436 __ subl(Rp, Rq);
9448 __ sbbl(Rt, Rt); 9437 __ jccb(Assembler::greaterEqual, done);
9449 __ andl(Rt, Ry); 9438 __ addl(Rp, Ry);
9450 __ addl(Rp, Rt); 9439 __ bind(done);
9451 %} 9440 %}
9452 ins_pipe(pipe_cmplt); 9441 ins_pipe(pipe_cmplt);
9453 %} 9442 %}
9443
9444 /* Better to save a register than avoid a branch */
9445 instruct and_cmpLTMask(rRegI p, rRegI q, rRegI y, rFlagsReg cr)
9446 %{
9447 match(Set y (AndI (CmpLTMask p q) y));
9448 effect(KILL cr);
9449
9450 ins_cost(300);
9451
9452 format %{ "cmpl $p, $q\t# and_cmpLTMask\n\t"
9453 "jlt done\n\t"
9454 "xorl $y, $y\n"
9455 "done: " %}
9456 ins_encode %{
9457 Register Rp = $p$$Register;
9458 Register Rq = $q$$Register;
9459 Register Ry = $y$$Register;
9460 Label done;
9461 __ cmpl(Rp, Rq);
9462 __ jccb(Assembler::less, done);
9463 __ xorl(Ry, Ry);
9464 __ bind(done);
9465 %}
9466 ins_pipe(pipe_cmplt);
9467 %}
9468
9454 9469
9455 //---------- FP Instructions------------------------------------------------ 9470 //---------- FP Instructions------------------------------------------------
9456 9471
9457 instruct cmpF_cc_reg(rFlagsRegU cr, regF src1, regF src2) 9472 instruct cmpF_cc_reg(rFlagsRegU cr, regF src1, regF src2)
9458 %{ 9473 %{