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diff src/share/vm/runtime/globals.hpp @ 219:ab65a4c9b2e8

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6708714: Optimize long LShift on 32-bits x86 Summary: For small (1-3 bits) left long shifts in 32-bits VM use sets of add+addc instructions instead of shld+shl on new AMD cpus. Reviewed-by: never Contributed-by: shrinivas.joshi@amd.com
author kvn
date Mon, 23 Jun 2008 14:11:12 -0700
parents 6d13fcb3663f
children 9c2ecc2ffb12 12eea04c8b06 fab5f738c515
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--- a/src/share/vm/runtime/globals.hpp	Sat Jun 21 10:03:31 2008 -0700
+++ b/src/share/vm/runtime/globals.hpp	Mon Jun 23 14:11:12 2008 -0700
@@ -946,6 +946,9 @@
   diagnostic(bool, UseIncDec, true,                                         \
           "Use INC, DEC instructions on x86")                               \
                                                                             \
+  product(bool, UseNewLongLShift, false,                                    \
+          "Use optimized bitwise shift left")                               \
+                                                                            \
   product(bool, UseStoreImmI16, true,                                       \
           "Use store immediate 16-bits value instruction on x86")           \
                                                                             \