Mercurial > hg > graal-compiler

diff src/cpu/sparc/vm/c1_LIRAssembler_sparc.hpp @ 1783:d5d065957597

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6953144: Tiered compilation Summary: Infrastructure for tiered compilation support (interpreter + c1 + c2) for 32 and 64 bit. Simple tiered policy implementation. Reviewed-by: kvn, never, phh, twisti
author iveresov
date Fri, 03 Sep 2010 17:51:07 -0700
parents c18cbe5936b8
children 3a294e483abc
line wrap: on
line diff
--- a/src/cpu/sparc/vm/c1_LIRAssembler_sparc.hpp	Thu Sep 02 11:40:02 2010 -0700
+++ b/src/cpu/sparc/vm/c1_LIRAssembler_sparc.hpp	Fri Sep 03 17:51:07 2010 -0700
@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2000, 2006, Oracle and/or its affiliates. All rights reserved.
+ * Copyright (c) 2000, 2010, Oracle and/or its affiliates. All rights reserved.
  * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
  *
  * This code is free software; you can redistribute it and/or modify it
@@ -71,9 +71,13 @@
 
   static bool is_single_instruction(LIR_Op* op);
 
+  // Record the type of the receiver in ReceiverTypeData
+  void type_profile_helper(Register mdo, int mdo_offset_bias,
+                           ciMethodData *md, ciProfileData *data,
+                           Register recv, Register tmp1, Label* update_done);
  public:
-  void pack64( Register rs, Register rd );
-  void unpack64( Register rd );
+  void   pack64(LIR_Opr src, LIR_Opr dst);
+  void unpack64(LIR_Opr src, LIR_Opr dst);
 
 enum {
 #ifdef _LP64