Mercurial > hg > graal-compiler
changeset 9816:4e9854086532
Initial SPARC compilation test
| author | Morris Meyer <morris.meyer@oracle.com> |
|---|---|
| date | Fri, 24 May 2013 22:51:36 -0400 |
| parents | 138798dfe8dc |
| children | 26960d32552c 8aea948c522b |
| files | graal/com.oracle.graal.asm.sparc/src/com/oracle/graal/asm/sparc/SPARCAssembler.java graal/com.oracle.graal.compiler.sparc/src/com/oracle/graal/compiler/sparc/SPARCLIRGenerator.java graal/com.oracle.graal.hotspot.sparc/src/com/oracle/graal/hotspot/sparc/SPARCHotSpotGraalRuntime.java graal/com.oracle.graal.lir.sparc/src/com/oracle/graal/lir/sparc/SPARCArithmetic.java graal/com.oracle.graal.lir.sparc/src/com/oracle/graal/lir/sparc/SPARCControlFlow.java graal/com.oracle.graal.sparc/src/com/oracle/graal/sparc/SPARC.java mx/projects |
| diffstat | 7 files changed, 461 insertions(+), 307 deletions(-) [+] |
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--- a/graal/com.oracle.graal.asm.sparc/src/com/oracle/graal/asm/sparc/SPARCAssembler.java Fri May 24 15:38:15 2013 -0700 +++ b/graal/com.oracle.graal.asm.sparc/src/com/oracle/graal/asm/sparc/SPARCAssembler.java Fri May 24 22:51:36 2013 -0400 @@ -33,6 +33,8 @@ */ public class SPARCAssembler extends AbstractSPARCAssembler { + // @formatter:off + public static class Fmt1 { public Fmt1(SPARCAssembler masm, int op, int disp30) { assert op == 1; @@ -99,13 +101,34 @@ } public static class Fmt3b { - public Fmt3b(SPARCAssembler masm, int op, int rd, int op3, int rs1, int simm13) { + public Fmt3b(SPARCAssembler masm, int op, int op3, int rs1, int regOrImmediate, int rd) { assert op == 2 || op == 3; assert op3 >= 0 && op3 < 0x40; assert rs1 >= 0 && rs1 < 0x20; assert rd >= 0 && rd < 0x20; - masm.emitInt(op << 30 | rd << 25 | op3 << 19 | rs1 << 14 | (simm13 & 0x1fff)); + masm.emitInt(op << 30 | rd << 25 | op3 << 19 | rs1 << 14 | (regOrImmediate & 0x1fff)); + } + } + + public static class Fmt3c { + public Fmt3c(SPARCAssembler masm, int op, int op3, int rs1, int rs2) { + assert op == 2; + assert op3 >= 0 && op3 < 0x40; + assert rs1 >= 0 && rs1 < 0x20; + assert rs2 >= 0 && rs2 < 0x20; + + masm.emitInt(op << 30 | op3 << 19 | rs1 << 14 | rs2); + } + } + + public static class Fmt3d { + public Fmt3d(SPARCAssembler masm, int op, int op3, int rs1, int simm13) { + assert op == 2; + assert op3 >= 0 && op3 < 0x40; + assert rs1 >= 0 && rs1 < 0x20; + + masm.emitInt(op << 30 | op3 << 19 | rs1 << 14 | ImmedTrue | simm13); } } @@ -129,7 +152,7 @@ assert rs1 >= 0 && rs1 < 0x20; assert rd >= 0 && rd < 0x20; - masm.emitInt(op << 30 | rd << 25 | op3 << 19 | rs1 << 14 | rcond << 10 | (simm10 & 0x000003ff)); + masm.emitInt(op << 30 | rd << 25 | op3 << 19 | ImmedTrue | rs1 << 14 | rcond << 10 | (simm10 & 0x000003ff)); } } @@ -178,17 +201,17 @@ assert cond >= 0 && cond < 0x10; assert rd >= 0 && rd < 0x20; - masm.emitInt(op << 30 | rd << 25 | op3 << 19 | ((cc << 15) & 0x00040000) | cond << 14 | ((cc << 11) & 0x3) | simm11 & 0x00004000); + masm.emitInt(op << 30 | rd << 25 | op3 << 19 | ImmedTrue | ((cc << 15) & 0x00040000) | cond << 14 | ((cc << 11) & 0x3) | simm11 & 0x00004000); } } public static final int ImmedTrue = 0x00002000; public enum Ops { - CallOp(0x40000000), - BranchOp(0x00000000), - ArithOp(0x80000000), - LdstOp(0xC0000000); + CallOp(1), + BranchOp(0), + ArithOp(2), + LdstOp(3); private final int value; @@ -202,75 +225,75 @@ } public enum Op3s { - Add((0x00 << 19) & 0x01F80000, "add"), - And((0x01 << 19) & 0x01F80000, "and"), - Or((0x02 << 19) & 0x01F80000, "or"), - Xor((0x03 << 19) & 0x01F80000, "xor"), - Sub((0x04 << 19) & 0x01F80000, "sub"), - Andn((0x05 << 19) & 0x01F80000, "andn"), - Orn((0x06 << 19) & 0x01F80000, "orn"), - Xnor((0x07 << 19) & 0x01F80000, "xnor"), - Addc((0x08 << 19) & 0x01F80000, "addc"), - Mulx((0x09 << 19) & 0x01F80000, "mulx"), - Umul((0x0A << 19) & 0x01F80000, "umul"), - Smul((0x0B << 19) & 0x01F80000, "smul"), - Subc((0x0C << 19) & 0x01F80000, "subc"), - Udivx((0x0D << 19) & 0x01F80000, "udivx"), - Udiv((0x0E << 19) & 0x01F80000, "udiv"), - Sdiv((0x0F << 19) & 0x01F80000, "sdiv"), + Add(0x00, "add"), + And(0x01, "and"), + Or(0x02, "or"), + Xor(0x03, "xor"), + Sub(0x04, "sub"), + Andn(0x05, "andn"), + Orn(0x06, "orn"), + Xnor(0x07, "xnor"), + Addc(0x08, "addc"), + Mulx(0x09, "mulx"), + Umul(0x0A, "umul"), + Smul(0x0B, "smul"), + Subc(0x0C, "subc"), + Udivx(0x0D, "udivx"), + Udiv(0x0E, "udiv"), + Sdiv(0x0F, "sdiv"), - Addcc((0x10 << 19) & 0x01F80000, "addcc"), - Andcc((0x11 << 19) & 0x01F80000, "andcc"), - Orcc((0x12 << 19) & 0x01F80000, "orcc"), - Xorcc((0x13 << 19) & 0x01F80000, "xorcc"), - Subcc((0x14 << 19) & 0x01F80000, "subcc"), - Andncc((0x15 << 19) & 0x01F80000, "andncc"), - Orncc((0x16 << 19) & 0x01F80000, "orncc"), - Xnorcc((0x17 << 19) & 0x01F80000, "xnorcc"), - Addccc((0x18 << 19) & 0x01F80000, "addccc"), - Mulxcc((0x19 << 19) & 0x01F80000, "mulxcc"), - Umulcc((0x1A << 19) & 0x01F80000, "umulcc"), - Smulcc((0x1B << 19) & 0x01F80000, "smulcc"), - Subccc((0x1C << 19) & 0x01F80000, "subccc"), - Udivcc((0x1E << 19) & 0x01F80000, "udivcc"), - Sdivcc((0x1F << 19) & 0x01F80000, "sdivcc"), + Addcc(0x10, "addcc"), + Andcc(0x11, "andcc"), + Orcc(0x12, "orcc"), + Xorcc(0x13, "xorcc"), + Subcc(0x14, "subcc"), + Andncc(0x15, "andncc"), + Orncc(0x16, "orncc"), + Xnorcc(0x17, "xnorcc"), + Addccc(0x18, "addccc"), + Mulxcc(0x19, "mulxcc"), + Umulcc(0x1A, "umulcc"), + Smulcc(0x1B, "smulcc"), + Subccc(0x1C0, "subccc"), + Udivcc(0x1E, "udivcc"), + Sdivcc(0x1F, "sdivcc"), - Taddcc((0x20 << 19) & 0x01F80000, "taddcc"), - Tsubcc((0x21 << 19) & 0x01F80000, "tsubcc"), - Taddcctv((0x22 << 19) & 0x01F80000, "taddcctv"), - Tsubcctv((0x23 << 19) & 0x01F80000, "tsubcctv"), - Mulscc((0x23 << 19) & 0x01F80000, "mulscc"), - Sll((0x25 << 19) & 0x01F80000, "sll"), - Sllx((0x25 << 19) & 0x01F80000, "sllx"), - Srl((0x26 << 19) & 0x01F80000, "srl"), - Srlx((0x26 << 19) & 0x01F80000, "srlx"), - Sra((0x27 << 19) & 0x01F80000, "srax"), - Srax((0x27 << 19) & 0x01F80000, "srax"), - Rdreg((0x28 << 19) & 0x01F80000, "rdreg"), - Membar((0x28 << 19) & 0x01F80000, "membar"), + Taddcc(0x20, "taddcc"), + Tsubcc(0x21, "tsubcc"), + Taddcctv(0x22, "taddcctv"), + Tsubcctv(0x23, "tsubcctv"), + Mulscc(0x24, "mulscc"), + Sll(0x25, "sll"), + Sllx(0x25, "sllx"), + Srl(0x26, "srl"), + Srlx(0x26, "srlx"), + Sra(0x27, "srax"), + Srax(0x27, "srax"), + Rdreg(0x28, "rdreg"), + Membar(0x28, "membar"), - Flushw((0x2B << 19) & 0x01F80000, "flushw"), - Movcc((0x2C << 19) & 0x01F80000, "movcc"), - Sdivx((0x2D << 19) & 0x01F80000, "sdivx"), - Popc((0x2E << 19) & 0x01F80000, "popc"), - Movr((0x2F << 19) & 0x01F80000, "movr"), + Flushw(0x2B, "flushw"), + Movcc(0x2C, "movcc"), + Sdivx(0x2D, "sdivx"), + Popc(0x2E, "popc"), + Movr(0x2F, "movr"), - Sir((0x30 << 19) & 0x01F80000, "sir"), - Wrreg((0x30 << 19) & 0x01F80000, "wrreg"), - Saved((0x31 << 19) & 0x01F80000, "saved"), + Sir(0x30, "sir"), + Wrreg(0x30, "wrreg"), + Saved(0x31, "saved"), - Fpop1((0x34 << 19) & 0x01F80000, "fpop1"), - Fpop2((0x35 << 19) & 0x01F80000, "fpop2"), - Impdep1((0x36 << 19) & 0x01F80000, "impdep1"), - Impdep2((0x37 << 19) & 0x01F80000, "impdep2"), - Jmpl((0x38 << 19) & 0x01F80000, "jmpl"), - Rett((0x39 << 19) & 0x01F80000, "rett"), - Trap((0x3a << 19) & 0x01F80000, "trap"), - Flush((0x3b << 19) & 0x01F80000, "flush"), - Save((0x3c << 19) & 0x01F80000, "save"), - Restore((0x3d << 19) & 0x01F80000, "restore"), - Done((0x3e << 19) & 0x01F80000, "done"), - Retry((0x3e << 19) & 0x01F80000, "retry"); + Fpop1(0x34, "fpop1"), + Fpop2(0x35, "fpop2"), + Impdep1(0x36, "impdep1"), + Impdep2(0x37, "impdep2"), + Jmpl(0x38, "jmpl"), + Rett(0x39, "rett"), + Trap(0x3a, "trap"), + Flush(0x3b, "flush"), + Save(0x3c, "save"), + Restore(0x3d, "restore"), + Done(0x3e, "done"), + Retry(0x3e, "retry"); private final int value; private final String operator; @@ -487,74 +510,74 @@ } public static class Add extends Fmt3b { - public Add(SPARCAssembler masm, int simm13, Register src2, Register dst) { - super(masm, Ops.ArithOp.getValue(), dst.encoding(), Op3s.Add.getValue(), src2.encoding(), simm13); + public Add(SPARCAssembler masm, Register src1, int simm13, Register dst) { + super(masm, Ops.ArithOp.getValue(), Op3s.Add.getValue(), src1.encoding(), simm13, dst.encoding()); } public Add(SPARCAssembler masm, Register src1, Register src2, Register dst) { - super(masm, Ops.ArithOp.getValue(), dst.encoding(), Op3s.Add.getValue(), src2.encoding(), src1.encoding()); + super(masm, Ops.ArithOp.getValue(), Op3s.Add.getValue(), src1.encoding(), src2.encoding(), dst.encoding()); } } public static class Addc extends Fmt3b { - public Addc(SPARCAssembler masm, int simm13, Register src2, Register dst) { - super(masm, Ops.ArithOp.getValue(), dst.encoding(), Op3s.Addc.getValue(), src2.encoding(), simm13); + public Addc(SPARCAssembler masm, Register src1, int simm13, Register dst) { + super(masm, Ops.ArithOp.getValue(), Op3s.Addc.getValue(), src1.encoding(), simm13, dst.encoding()); } public Addc(SPARCAssembler masm, Register src1, Register src2, Register dst) { - super(masm, Ops.ArithOp.getValue(), dst.encoding(), Op3s.Addc.getValue(), src2.encoding(), src1.encoding()); + super(masm, Ops.ArithOp.getValue(), Op3s.Addc.getValue(), src1.encoding(), src2.encoding(), dst.encoding()); } } public static class Addcc extends Fmt3b { - public Addcc(SPARCAssembler masm, int simm13, Register src2, Register dst) { - super(masm, Ops.ArithOp.getValue(), dst.encoding(), Op3s.Addcc.getValue(), src2.encoding(), simm13); + public Addcc(SPARCAssembler masm, Register src1, int simm13, Register dst) { + super(masm, Ops.ArithOp.getValue(), Op3s.Addcc.getValue(), src1.encoding(), simm13, dst.encoding()); } public Addcc(SPARCAssembler masm, Register src1, Register src2, Register dst) { - super(masm, Ops.ArithOp.getValue(), dst.encoding(), Op3s.Addcc.getValue(), src2.encoding(), src1.encoding()); + super(masm, Ops.ArithOp.getValue(), Op3s.Addcc.getValue(), src1.encoding(), src2.encoding(), dst.encoding()); } } public static class Addccc extends Fmt3b { - public Addccc(SPARCAssembler masm, int simm13, Register src2, Register dst) { - super(masm, Ops.ArithOp.getValue(), dst.encoding(), Op3s.Addccc.getValue(), src2.encoding(), simm13); + public Addccc(SPARCAssembler masm, Register src1, int simm13, Register dst) { + super(masm, Ops.ArithOp.getValue(), Op3s.Addccc.getValue(), src1.encoding(), simm13, dst.encoding()); } public Addccc(SPARCAssembler masm, Register src1, Register src2, Register dst) { - super(masm, Ops.ArithOp.getValue(), dst.encoding(), Op3s.Addccc.getValue(), src2.encoding(), src1.encoding()); + super(masm, Ops.ArithOp.getValue(), Op3s.Addccc.getValue(), src1.encoding(), src2.encoding(), dst.encoding()); } } public static class And extends Fmt3b { - public And(SPARCAssembler masm, int simm13, Register src2, Register dst) { - super(masm, Ops.ArithOp.getValue(), dst.encoding(), Op3s.And.getValue(), src2.encoding(), simm13); + public And(SPARCAssembler masm, Register src1, int simm13, Register dst) { + super(masm, Ops.ArithOp.getValue(), Op3s.And.getValue(), src1.encoding(), simm13, dst.encoding()); } public And(SPARCAssembler masm, Register src1, Register src2, Register dst) { - super(masm, Ops.ArithOp.getValue(), dst.encoding(), Op3s.And.getValue(), src2.encoding(), src1.encoding()); + super(masm, Ops.ArithOp.getValue(), Op3s.And.getValue(), src1.encoding(), src2.encoding(), dst.encoding()); } } public static class Andcc extends Fmt3b { - public Andcc(SPARCAssembler masm, int simm13, Register src2, Register dst) { - super(masm, Ops.ArithOp.getValue(), dst.encoding(), Op3s.Andcc.getValue(), src2.encoding(), simm13); + public Andcc(SPARCAssembler masm, Register src1, int simm13, Register dst) { + super(masm, Ops.ArithOp.getValue(), Op3s.Andcc.getValue(), src1.encoding(), simm13, dst.encoding()); } public Andcc(SPARCAssembler masm, Register src1, Register src2, Register dst) { - super(masm, Ops.ArithOp.getValue(), dst.encoding(), Op3s.Andcc.getValue(), src2.encoding(), src1.encoding()); + super(masm, Ops.ArithOp.getValue(), Op3s.Andcc.getValue(), src1.encoding(), src2.encoding(), dst.encoding()); } } public static class Andn extends Fmt3b { - public Andn(SPARCAssembler masm, int simm13, Register src2, Register dst) { - super(masm, Ops.ArithOp.getValue(), dst.encoding(), Op3s.Andn.getValue(), src2.encoding(), simm13); + public Andn(SPARCAssembler masm, Register src1, int simm13, Register dst) { + super(masm, Ops.ArithOp.getValue(), Op3s.Andn.getValue(), src1.encoding(), simm13, dst.encoding()); } public Andn(SPARCAssembler masm, Register src1, Register src2, Register dst) { - super(masm, Ops.ArithOp.getValue(), dst.encoding(), Op3s.Andn.getValue(), src2.encoding(), src1.encoding()); + super(masm, Ops.ArithOp.getValue(), Op3s.Andn.getValue(), src1.encoding(), src2.encoding(), dst.encoding()); } } public static class Andncc extends Fmt3b { - public Andncc(SPARCAssembler masm, int simm13, Register src2, Register dst) { - super(masm, Ops.ArithOp.getValue(), dst.encoding(), Op3s.Andncc.getValue(), src2.encoding(), simm13); + public Andncc(SPARCAssembler masm, Register src1, int simm13, Register dst) { + super(masm, Ops.ArithOp.getValue(), Op3s.Andncc.getValue(), src1.encoding(), simm13, dst.encoding()); } public Andncc(SPARCAssembler masm, Register src1, Register src2, Register dst) { - super(masm, Ops.ArithOp.getValue(), dst.encoding(), Op3s.Andncc.getValue(), src2.encoding(), src1.encoding()); + super(masm, Ops.ArithOp.getValue(), Op3s.Andncc.getValue(), src1.encoding(), src2.encoding(), dst.encoding()); } } @@ -635,66 +658,66 @@ @Deprecated public static class Mulscc extends Fmt3b { @Deprecated - public Mulscc(SPARCAssembler masm, int simm13, Register src2, Register dst) { - super(masm, Ops.ArithOp.getValue(), dst.encoding(), Op3s.Mulscc.getValue(), src2.encoding(), simm13); + public Mulscc(SPARCAssembler masm, Register src1, int simm13, Register dst) { + super(masm, Ops.ArithOp.getValue(), Op3s.Mulscc.getValue(), src1.encoding(), simm13, dst.encoding()); } @Deprecated public Mulscc(SPARCAssembler masm, Register src1, Register src2, Register dst) { - super(masm, Ops.ArithOp.getValue(), dst.encoding(), Op3s.Mulscc.getValue(), src2.encoding(), src1.encoding()); + super(masm, Ops.ArithOp.getValue(), Op3s.Mulscc.getValue(), src1.encoding(), src2.encoding(), dst.encoding()); } } public static class Mulx extends Fmt3b { - public Mulx(SPARCAssembler masm, int simm13, Register src2, Register dst) { - super(masm, Ops.ArithOp.getValue(), dst.encoding(), Op3s.Mulx.getValue(), src2.encoding(), simm13); + public Mulx(SPARCAssembler masm, Register src1, int simm13, Register dst) { + super(masm, Ops.ArithOp.getValue(), Op3s.Mulx.getValue(), src1.encoding(), simm13, dst.encoding()); } public Mulx(SPARCAssembler masm, Register src1, Register src2, Register dst) { - super(masm, Ops.ArithOp.getValue(), dst.encoding(), Op3s.Mulx.getValue(), src2.encoding(), src1.encoding()); + super(masm, Ops.ArithOp.getValue(), Op3s.Mulx.getValue(), src1.encoding(), src2.encoding(), dst.encoding()); } } public static class Or extends Fmt3b { - public Or(SPARCAssembler masm, int simm13, Register src2, Register dst) { - super(masm, Ops.ArithOp.getValue(), dst.encoding(), Op3s.Or.getValue(), src2.encoding(), simm13); + public Or(SPARCAssembler masm, Register src1, int simm13, Register dst) { + super(masm, Ops.ArithOp.getValue(), Op3s.Or.getValue(), src1.encoding(), simm13, dst.encoding()); } public Or(SPARCAssembler masm, Register src1, Register src2, Register dst) { - super(masm, Ops.ArithOp.getValue(), dst.encoding(), Op3s.Or.getValue(), src2.encoding(), src1.encoding()); + super(masm, Ops.ArithOp.getValue(), Op3s.Or.getValue(), src1.encoding(), src2.encoding(), dst.encoding()); } } public static class Orcc extends Fmt3b { - public Orcc(SPARCAssembler masm, int simm13, Register src2, Register dst) { - super(masm, Ops.ArithOp.getValue(), dst.encoding(), Op3s.Orcc.getValue(), src2.encoding(), simm13); + public Orcc(SPARCAssembler masm, Register src1, int simm13, Register dst) { + super(masm, Ops.ArithOp.getValue(), Op3s.Orcc.getValue(), src1.encoding(), simm13, dst.encoding()); } public Orcc(SPARCAssembler masm, Register src1, Register src2, Register dst) { - super(masm, Ops.ArithOp.getValue(), dst.encoding(), Op3s.Orcc.getValue(), src2.encoding(), src1.encoding()); + super(masm, Ops.ArithOp.getValue(), Op3s.Orcc.getValue(), src1.encoding(), src2.encoding(), dst.encoding()); } } public static class Orn extends Fmt3b { - public Orn(SPARCAssembler masm, int simm13, Register src2, Register dst) { - super(masm, Ops.ArithOp.getValue(), dst.encoding(), Op3s.Orn.getValue(), src2.encoding(), simm13); + public Orn(SPARCAssembler masm, Register src1, int simm13, Register dst) { + super(masm, Ops.ArithOp.getValue(), Op3s.Orn.getValue(), src1.encoding(), simm13, dst.encoding()); } public Orn(SPARCAssembler masm, Register src1, Register src2, Register dst) { - super(masm, Ops.ArithOp.getValue(), dst.encoding(), Op3s.Orn.getValue(), src2.encoding(), src1.encoding()); + super(masm, Ops.ArithOp.getValue(), Op3s.Orn.getValue(), src1.encoding(), src2.encoding(), dst.encoding()); } } public static class Orncc extends Fmt3b { - public Orncc(SPARCAssembler masm, int simm13, Register src2, Register dst) { - super(masm, Ops.ArithOp.getValue(), dst.encoding(), Op3s.Orncc.getValue(), src2.encoding(), simm13); + public Orncc(SPARCAssembler masm, Register src1, int simm13, Register dst) { + super(masm, Ops.ArithOp.getValue(), Op3s.Orncc.getValue(), src1.encoding(), simm13, dst.encoding()); } public Orncc(SPARCAssembler masm, Register src1, Register src2, Register dst) { - super(masm, Ops.ArithOp.getValue(), dst.encoding(), Op3s.Orncc.getValue(), src2.encoding(), src1.encoding()); + super(masm, Ops.ArithOp.getValue(), Op3s.Orncc.getValue(), src1.encoding(), src2.encoding(), dst.encoding()); } } public static class Popc extends Fmt3b { public Popc(SPARCAssembler masm, int simm13, Register dst) { - super(masm, Ops.ArithOp.getValue(), dst.encoding(), Op3s.Popc.getValue(), 0, simm13); + super(masm, Ops.ArithOp.getValue(), Op3s.Popc.getValue(), 0, simm13, dst.encoding()); } public Popc(SPARCAssembler masm, Register src2, Register dst) { - super(masm, Ops.ArithOp.getValue(), dst.encoding(), Op3s.Popc.getValue(), 0, src2.encoding()); + super(masm, Ops.ArithOp.getValue(), Op3s.Popc.getValue(), 0, src2.encoding(), dst.encoding()); } } @@ -737,6 +760,15 @@ } } + public static class Return extends Fmt3d { + public Return(SPARCAssembler masm, Register src1, int simm13) { + super(masm, Ops.ArithOp.getValue(), Op3s.Rett.getValue(), src1.encoding(), simm13); + } + public Return(SPARCAssembler masm, Register src1, Register src2) { + super(masm, Ops.ArithOp.getValue(), Op3s.Rett.getValue(), src1.encoding(), src2.encoding()); + } + } + public final void restored() { emitInt(Ops.ArithOp.getValue() | Op3s.Saved.getValue() | fcn(1)); } @@ -748,33 +780,33 @@ @Deprecated public static class Sdiv extends Fmt3b { @Deprecated - public Sdiv(SPARCAssembler masm, int simm13, Register src2, Register dst) { - super(masm, Ops.ArithOp.getValue(), dst.encoding(), Op3s.Sdiv.getValue(), src2.encoding(), simm13); + public Sdiv(SPARCAssembler masm, Register src1, int simm13, Register dst) { + super(masm, Ops.ArithOp.getValue(), Op3s.Sdiv.getValue(), src1.encoding(), simm13, dst.encoding()); } @Deprecated public Sdiv(SPARCAssembler masm, Register src1, Register src2, Register dst) { - super(masm, Ops.ArithOp.getValue(), dst.encoding(), Op3s.Sdiv.getValue(), src2.encoding(), src1.encoding()); + super(masm, Ops.ArithOp.getValue(), Op3s.Sdiv.getValue(), src1.encoding(), src2.encoding(), dst.encoding()); } } @Deprecated public static class Sdivcc extends Fmt3b { @Deprecated - public Sdivcc(SPARCAssembler masm, int simm13, Register src2, Register dst) { - super(masm, Ops.ArithOp.getValue(), dst.encoding(), Op3s.Sdivcc.getValue(), src2.encoding(), simm13); + public Sdivcc(SPARCAssembler masm, Register src1, int simm13, Register dst) { + super(masm, Ops.ArithOp.getValue(), Op3s.Sdivcc.getValue(), src1.encoding(), simm13, dst.encoding()); } @Deprecated public Sdivcc(SPARCAssembler masm, Register src1, Register src2, Register dst) { - super(masm, Ops.ArithOp.getValue(), dst.encoding(), Op3s.Sdivcc.getValue(), src2.encoding(), src1.encoding()); + super(masm, Ops.ArithOp.getValue(), Op3s.Sdivcc.getValue(), src1.encoding(), src2.encoding(), dst.encoding()); } } public static class Sdivx extends Fmt3b { - public Sdivx(SPARCAssembler masm, int simm13, Register src2, Register dst) { - super(masm, Ops.ArithOp.getValue(), dst.encoding(), Op3s.Sdivx.getValue(), src2.encoding(), simm13); + public Sdivx(SPARCAssembler masm, Register src1, int simm13, Register dst) { + super(masm, Ops.ArithOp.getValue(), Op3s.Sdivx.getValue(), src1.encoding(), simm13, dst.encoding()); } public Sdivx(SPARCAssembler masm, Register src1, Register src2, Register dst) { - super(masm, Ops.ArithOp.getValue(), dst.encoding(), Op3s.Sdivx.getValue(), src2.encoding(), src1.encoding()); + super(masm, Ops.ArithOp.getValue(), Op3s.Sdivx.getValue(), src1.encoding(), src2.encoding(), dst.encoding()); } } @@ -783,75 +815,75 @@ } public static class Sll extends Fmt3b { - public Sll(SPARCAssembler masm, int simm13, Register src2, Register dst) { - super(masm, Ops.ArithOp.getValue(), dst.encoding(), Op3s.Sll.getValue(), src2.encoding(), simm13); + public Sll(SPARCAssembler masm, Register src1, int simm13, Register dst) { + super(masm, Ops.ArithOp.getValue(), Op3s.Sll.getValue(), src1.encoding(), simm13, dst.encoding()); } public Sll(SPARCAssembler masm, Register src1, Register src2, Register dst) { - super(masm, Ops.ArithOp.getValue(), dst.encoding(), Op3s.Sll.getValue(), src2.encoding(), src1.encoding()); + super(masm, Ops.ArithOp.getValue(), Op3s.Sll.getValue(), src1.encoding(), src2.encoding(), dst.encoding()); } } public static class Sllx extends Fmt3b { - public Sllx(SPARCAssembler masm, int simm13, Register src2, Register dst) { - super(masm, Ops.ArithOp.getValue(), dst.encoding(), Op3s.Sllx.getValue(), src2.encoding(), simm13); + public Sllx(SPARCAssembler masm, Register src1, int simm13, Register dst) { + super(masm, Ops.ArithOp.getValue(), Op3s.Sllx.getValue(), src1.encoding(), simm13, dst.encoding()); } public Sllx(SPARCAssembler masm, Register src1, Register src2, Register dst) { - super(masm, Ops.ArithOp.getValue(), dst.encoding(), Op3s.Sllx.getValue(), src2.encoding(), src1.encoding()); + super(masm, Ops.ArithOp.getValue(), Op3s.Sllx.getValue(), src1.encoding(), src2.encoding(), dst.encoding()); } } public static class Smul extends Fmt3b { - public Smul(SPARCAssembler masm, int simm13, Register src2, Register dst) { - super(masm, Ops.ArithOp.getValue(), dst.encoding(), Op3s.Smul.getValue(), src2.encoding(), simm13); + public Smul(SPARCAssembler masm, Register src1, int simm13, Register dst) { + super(masm, Ops.ArithOp.getValue(), Op3s.Smul.getValue(), src1.encoding(), simm13, dst.encoding()); } public Smul(SPARCAssembler masm, Register src1, Register src2, Register dst) { - super(masm, Ops.ArithOp.getValue(), dst.encoding(), Op3s.Smul.getValue(), src2.encoding(), src1.encoding()); + super(masm, Ops.ArithOp.getValue(), Op3s.Smul.getValue(), src1.encoding(), src2.encoding(), dst.encoding()); } } @Deprecated public static class Smulcc extends Fmt3b { - public Smulcc(SPARCAssembler masm, int simm13, Register src2, Register dst) { - super(masm, Ops.ArithOp.getValue(), dst.encoding(), Op3s.Smulcc.getValue(), src2.encoding(), simm13); + public Smulcc(SPARCAssembler masm, Register src1, int simm13, Register dst) { + super(masm, Ops.ArithOp.getValue(), Op3s.Smulcc.getValue(), src1.encoding(), simm13, dst.encoding()); } public Smulcc(SPARCAssembler masm, Register src1, Register src2, Register dst) { - super(masm, Ops.ArithOp.getValue(), dst.encoding(), Op3s.Smulcc.getValue(), src2.encoding(), src1.encoding()); + super(masm, Ops.ArithOp.getValue(), Op3s.Smulcc.getValue(), src1.encoding(), src2.encoding(), dst.encoding()); } } public static class Sra extends Fmt3b { - public Sra(SPARCAssembler masm, int simm13, Register src2, Register dst) { - super(masm, Ops.ArithOp.getValue(), dst.encoding(), Op3s.Sra.getValue(), src2.encoding(), simm13); + public Sra(SPARCAssembler masm, Register src1, int simm13, Register dst) { + super(masm, Ops.ArithOp.getValue(), Op3s.Sra.getValue(), src1.encoding(), simm13, dst.encoding()); } public Sra(SPARCAssembler masm, Register src1, Register src2, Register dst) { - super(masm, Ops.ArithOp.getValue(), dst.encoding(), Op3s.Sra.getValue(), src2.encoding(), src1.encoding()); + super(masm, Ops.ArithOp.getValue(), Op3s.Sra.getValue(), src1.encoding(), src2.encoding(), dst.encoding()); } } public static class Srax extends Fmt3b { - public Srax(SPARCAssembler masm, int simm13, Register src2, Register dst) { - super(masm, Ops.ArithOp.getValue(), dst.encoding(), Op3s.Srax.getValue(), src2.encoding(), simm13); + public Srax(SPARCAssembler masm, Register src1, int simm13, Register dst) { + super(masm, Ops.ArithOp.getValue(), Op3s.Srax.getValue(), src1.encoding(), simm13, dst.encoding()); } public Srax(SPARCAssembler masm, Register src1, Register src2, Register dst) { - super(masm, Ops.ArithOp.getValue(), dst.encoding(), Op3s.Srax.getValue(), src2.encoding(), src1.encoding()); + super(masm, Ops.ArithOp.getValue(), Op3s.Srax.getValue(), src1.encoding(), src2.encoding(), dst.encoding()); } } public static class Srl extends Fmt3b { - public Srl(SPARCAssembler masm, int simm13, Register src2, Register dst) { - super(masm, Ops.ArithOp.getValue(), dst.encoding(), Op3s.Srl.getValue(), src2.encoding(), simm13); + public Srl(SPARCAssembler masm, Register src1, int simm13, Register dst) { + super(masm, Ops.ArithOp.getValue(), Op3s.Srl.getValue(), src1.encoding(), simm13, dst.encoding()); } public Srl(SPARCAssembler masm, Register src1, Register src2, Register dst) { - super(masm, Ops.ArithOp.getValue(), dst.encoding(), Op3s.Srl.getValue(), src2.encoding(), src1.encoding()); + super(masm, Ops.ArithOp.getValue(), Op3s.Srl.getValue(), src1.encoding(), src2.encoding(), dst.encoding()); } } public static class Srlx extends Fmt3b { - public Srlx(SPARCAssembler masm, int simm13, Register src2, Register dst) { - super(masm, Ops.ArithOp.getValue(), dst.encoding(), Op3s.Srlx.getValue(), src2.encoding(), simm13); + public Srlx(SPARCAssembler masm, Register src1, int simm13, Register dst) { + super(masm, Ops.ArithOp.getValue(), Op3s.Srlx.getValue(), src1.encoding(), simm13, dst.encoding()); } public Srlx(SPARCAssembler masm, Register src1, Register src2, Register dst) { - super(masm, Ops.ArithOp.getValue(), dst.encoding(), Op3s.Srlx.getValue(), src2.encoding(), src1.encoding()); + super(masm, Ops.ArithOp.getValue(), Op3s.Srlx.getValue(), src1.encoding(), src2.encoding(), dst.encoding()); } } @@ -861,55 +893,55 @@ } public static class Sub extends Fmt3b { - public Sub(SPARCAssembler masm, int simm13, Register src2, Register dst) { - super(masm, Ops.ArithOp.getValue(), dst.encoding(), Op3s.Sub.getValue(), src2.encoding(), simm13); + public Sub(SPARCAssembler masm, Register src1, int simm13, Register dst) { + super(masm, Ops.ArithOp.getValue(), Op3s.Sub.getValue(), src1.encoding(), simm13, dst.encoding()); } public Sub(SPARCAssembler masm, Register src1, Register src2, Register dst) { - super(masm, Ops.ArithOp.getValue(), dst.encoding(), Op3s.Sub.getValue(), src2.encoding(), src1.encoding()); + super(masm, Ops.ArithOp.getValue(), Op3s.Sub.getValue(), src1.encoding(), src2.encoding(), dst.encoding()); } } public static class Subc extends Fmt3b { - public Subc(SPARCAssembler masm, int simm13, Register src2, Register dst) { - super(masm, Ops.ArithOp.getValue(), dst.encoding(), Op3s.Subc.getValue(), src2.encoding(), simm13); + public Subc(SPARCAssembler masm, Register src1, int simm13, Register dst) { + super(masm, Ops.ArithOp.getValue(), Op3s.Subc.getValue(), src1.encoding(), simm13, dst.encoding()); } public Subc(SPARCAssembler masm, Register src1, Register src2, Register dst) { - super(masm, Ops.ArithOp.getValue(), dst.encoding(), Op3s.Subc.getValue(), src2.encoding(), src1.encoding()); + super(masm, Ops.ArithOp.getValue(), Op3s.Subc.getValue(), src1.encoding(), src2.encoding(), dst.encoding()); } } public static class Subcc extends Fmt3b { - public Subcc(SPARCAssembler masm, int simm13, Register src2, Register dst) { - super(masm, Ops.ArithOp.getValue(), dst.encoding(), Op3s.Subcc.getValue(), src2.encoding(), simm13); + public Subcc(SPARCAssembler masm, Register src1, int simm13, Register dst) { + super(masm, Ops.ArithOp.getValue(), Op3s.Subcc.getValue(), src1.encoding(), simm13, dst.encoding()); } public Subcc(SPARCAssembler masm, Register src1, Register src2, Register dst) { - super(masm, Ops.ArithOp.getValue(), dst.encoding(), Op3s.Subcc.getValue(), src2.encoding(), src1.encoding()); + super(masm, Ops.ArithOp.getValue(), Op3s.Subcc.getValue(), src1.encoding(), src2.encoding(), dst.encoding()); } } public static class Subccc extends Fmt3b { - public Subccc(SPARCAssembler masm, int simm13, Register src2, Register dst) { - super(masm, Ops.ArithOp.getValue(), dst.encoding(), Op3s.Subccc.getValue(), src2.encoding(), simm13); + public Subccc(SPARCAssembler masm, Register src1, int simm13, Register dst) { + super(masm, Ops.ArithOp.getValue(), Op3s.Subccc.getValue(), src1.encoding(), simm13, dst.encoding()); } public Subccc(SPARCAssembler masm, Register src1, Register src2, Register dst) { - super(masm, Ops.ArithOp.getValue(), dst.encoding(), Op3s.Subccc.getValue(), src2.encoding(), src1.encoding()); + super(masm, Ops.ArithOp.getValue(), Op3s.Subccc.getValue(), src1.encoding(), src2.encoding(), dst.encoding()); } } public static class Taddcc extends Fmt3b { - public Taddcc(SPARCAssembler masm, int simm13, Register src2, Register dst) { - super(masm, Ops.ArithOp.getValue(), dst.encoding(), Op3s.Taddcc.getValue(), src2.encoding(), simm13); + public Taddcc(SPARCAssembler masm, Register src1, int simm13, Register dst) { + super(masm, Ops.ArithOp.getValue(), Op3s.Taddcc.getValue(), src1.encoding(), simm13, dst.encoding()); } public Taddcc(SPARCAssembler masm, Register src1, Register src2, Register dst) { - super(masm, Ops.ArithOp.getValue(), dst.encoding(), Op3s.Taddcc.getValue(), src2.encoding(), src1.encoding()); + super(masm, Ops.ArithOp.getValue(), Op3s.Taddcc.getValue(), src1.encoding(), src2.encoding(), dst.encoding()); } } @Deprecated public static class Taddcctv extends Fmt3b { @Deprecated - public Taddcctv(SPARCAssembler masm, int simm13, Register src2, Register dst) { - super(masm, Ops.ArithOp.getValue(), dst.encoding(), Op3s.Taddcctv.getValue(), src2.encoding(), simm13); + public Taddcctv(SPARCAssembler masm, Register src1, int simm13, Register dst) { + super(masm, Ops.ArithOp.getValue(), Op3s.Taddcctv.getValue(), src1.encoding(), simm13, dst.encoding()); } @Deprecated public Taddcctv(SPARCAssembler masm, Register src1, Register src2, Register dst) { @@ -918,71 +950,71 @@ } public static class Tsubcc extends Fmt3b { - public Tsubcc(SPARCAssembler masm, int simm13, Register src2, Register dst) { - super(masm, Ops.ArithOp.getValue(), dst.encoding(), Op3s.Tsubcc.getValue(), src2.encoding(), simm13); + public Tsubcc(SPARCAssembler masm, Register src1, int simm13, Register dst) { + super(masm, Ops.ArithOp.getValue(), Op3s.Tsubcc.getValue(), src1.encoding(), simm13, dst.encoding()); } public Tsubcc(SPARCAssembler masm, Register src1, Register src2, Register dst) { - super(masm, Ops.ArithOp.getValue(), dst.encoding(), Op3s.Tsubcc.getValue(), src2.encoding(), src1.encoding()); + super(masm, Ops.ArithOp.getValue(), Op3s.Tsubcc.getValue(), src1.encoding(), src2.encoding(), dst.encoding()); } } @Deprecated public static class Tsubcctv extends Fmt3b { @Deprecated - public Tsubcctv(SPARCAssembler masm, int simm13, Register src2, Register dst) { - super(masm, Ops.ArithOp.getValue(), dst.encoding(), Op3s.Tsubcctv.getValue(), src2.encoding(), simm13); + public Tsubcctv(SPARCAssembler masm, Register src1, int simm13, Register dst) { + super(masm, Ops.ArithOp.getValue(), Op3s.Tsubcctv.getValue(), src1.encoding(), simm13, dst.encoding()); } @Deprecated public Tsubcctv(SPARCAssembler masm, Register src1, Register src2, Register dst) { - super(masm, Ops.ArithOp.getValue(), dst.encoding(), Op3s.Tsubcctv.getValue(), src2.encoding(), src1.encoding()); + super(masm, Ops.ArithOp.getValue(), Op3s.Tsubcctv.getValue(), src1.encoding(), src2.encoding(), dst.encoding()); } } @Deprecated public static class Udiv extends Fmt3b { @Deprecated - public Udiv(SPARCAssembler masm, int simm13, Register src2, Register dst) { - super(masm, Ops.ArithOp.getValue(), dst.encoding(), Op3s.Udiv.getValue(), src2.encoding(), simm13); + public Udiv(SPARCAssembler masm, Register src1, int simm13, Register dst) { + super(masm, Ops.ArithOp.getValue(), Op3s.Udiv.getValue(), src1.encoding(), simm13, dst.encoding()); } @Deprecated public Udiv(SPARCAssembler masm, Register src1, Register src2, Register dst) { - super(masm, Ops.ArithOp.getValue(), dst.encoding(), Op3s.Udiv.getValue(), src2.encoding(), src1.encoding()); + super(masm, Ops.ArithOp.getValue(), Op3s.Udiv.getValue(), src1.encoding(), src2.encoding(), dst.encoding()); } } public static class Udivcc extends Fmt3b { - public Udivcc(SPARCAssembler masm, int simm13, Register src2, Register dst) { - super(masm, Ops.ArithOp.getValue(), dst.encoding(), Op3s.Udivcc.getValue(), src2.encoding(), simm13); + public Udivcc(SPARCAssembler masm, Register src1, int simm13, Register dst) { + super(masm, Ops.ArithOp.getValue(), Op3s.Udivcc.getValue(), src1.encoding(), simm13, dst.encoding()); } public Udivcc(SPARCAssembler masm, Register src1, Register src2, Register dst) { - super(masm, Ops.ArithOp.getValue(), dst.encoding(), Op3s.Udivcc.getValue(), src2.encoding(), src1.encoding()); + super(masm, Ops.ArithOp.getValue(), Op3s.Udivcc.getValue(), src1.encoding(), src2.encoding(), dst.encoding()); } } public static class Udivx extends Fmt3b { - public Udivx(SPARCAssembler masm, int simm13, Register src2, Register dst) { - super(masm, Ops.ArithOp.getValue(), dst.encoding(), Op3s.Udivx.getValue(), src2.encoding(), simm13); + public Udivx(SPARCAssembler masm, Register src1, int simm13, Register dst) { + super(masm, Ops.ArithOp.getValue(), Op3s.Udivx.getValue(), src1.encoding(), simm13, dst.encoding()); } public Udivx(SPARCAssembler masm, Register src1, Register src2, Register dst) { - super(masm, Ops.ArithOp.getValue(), dst.encoding(), Op3s.Udivx.getValue(), src2.encoding(), src1.encoding()); + super(masm, Ops.ArithOp.getValue(), Op3s.Udivx.getValue(), dst.encoding(), src2.encoding(), src1.encoding()); } } public static class Umul extends Fmt3b { - public Umul(SPARCAssembler masm, int simm13, Register src2, Register dst) { - super(masm, Ops.ArithOp.getValue(), dst.encoding(), Op3s.Umul.getValue(), src2.encoding(), simm13); + public Umul(SPARCAssembler masm, Register src1, int simm13, Register dst) { + super(masm, Ops.ArithOp.getValue(), Op3s.Umul.getValue(), src1.encoding(), simm13, dst.encoding()); } public Umul(SPARCAssembler masm, Register src1, Register src2, Register dst) { - super(masm, Ops.ArithOp.getValue(), dst.encoding(), Op3s.Umul.getValue(), src2.encoding(), src1.encoding()); + super(masm, Ops.ArithOp.getValue(), Op3s.Umul.getValue(), src1.encoding(), src2.encoding(), dst.encoding()); } } public static class Umulcc extends Fmt3b { - public Umulcc(SPARCAssembler masm, int simm13, Register src2, Register dst) { - super(masm, Ops.ArithOp.getValue(), dst.encoding(), Op3s.Umulcc.getValue(), src2.encoding(), simm13); + public Umulcc(SPARCAssembler masm, Register src1, int simm13, Register dst) { + super(masm, Ops.ArithOp.getValue(), Op3s.Umulcc.getValue(), src1.encoding(), simm13, dst.encoding()); } public Umulcc(SPARCAssembler masm, Register src1, Register src2, Register dst) { - super(masm, Ops.ArithOp.getValue(), dst.encoding(), Op3s.Umulcc.getValue(), src2.encoding(), src1.encoding()); + super(masm, Ops.ArithOp.getValue(), Op3s.Umulcc.getValue(), src1.encoding(), src2.encoding(), dst.encoding()); } } @@ -990,74 +1022,74 @@ public static class Wry extends Fmt3b { @Deprecated public Wry(SPARCAssembler masm, int simm13, Register src2) { - super(masm, Ops.ArithOp.getValue(), 0, Op3s.Wrreg.getValue(), src2.encoding(), simm13); + super(masm, Ops.ArithOp.getValue(), Op3s.Wrreg.getValue(), 0, src2.encoding(), simm13); } @Deprecated public Wry(SPARCAssembler masm, Register src1, Register src2) { - super(masm, Ops.ArithOp.getValue(), 0, Op3s.Wrreg.getValue(), src2.encoding(), src1.encoding()); + super(masm, Ops.ArithOp.getValue(), Op3s.Wrreg.getValue(), 0, src2.encoding(), src1.encoding()); } } public static class Wrccr extends Fmt3b { public Wrccr(SPARCAssembler masm, int simm13, Register src2) { - super(masm, Ops.ArithOp.getValue(), 2, Op3s.Wrreg.getValue(), src2.encoding(), simm13); + super(masm, Ops.ArithOp.getValue(), Op3s.Wrreg.getValue(), 2, src2.encoding(), simm13); } public Wrccr(SPARCAssembler masm, Register src1, Register src2) { - super(masm, Ops.ArithOp.getValue(), 2, Op3s.Wrreg.getValue(), src2.encoding(), src1.encoding()); + super(masm, Ops.ArithOp.getValue(), Op3s.Wrreg.getValue(), 2, src2.encoding(), src1.encoding()); } } public static class Wrasi extends Fmt3b { public Wrasi(SPARCAssembler masm, int simm13, Register src2) { - super(masm, Ops.ArithOp.getValue(), 3, Op3s.Wrreg.getValue(), src2.encoding(), simm13); + super(masm, Ops.ArithOp.getValue(), Op3s.Wrreg.getValue(), 3, src2.encoding(), simm13); } public Wrasi(SPARCAssembler masm, Register src1, Register src2) { - super(masm, Ops.ArithOp.getValue(), 3, Op3s.Wrreg.getValue(), src2.encoding(), src1.encoding()); + super(masm, Ops.ArithOp.getValue(), Op3s.Wrreg.getValue(), 3, src2.encoding(), src1.encoding()); } } public static class Wrfprs extends Fmt3b { public Wrfprs(SPARCAssembler masm, int simm13, Register src2) { - super(masm, Ops.ArithOp.getValue(), 6, Op3s.Wrreg.getValue(), src2.encoding(), simm13); + super(masm, Ops.ArithOp.getValue(), Op3s.Wrreg.getValue(), 6, src2.encoding(), simm13); } public Wrfprs(SPARCAssembler masm, Register src1, Register src2) { - super(masm, Ops.ArithOp.getValue(), 6, Op3s.Wrreg.getValue(), src2.encoding(), src1.encoding()); + super(masm, Ops.ArithOp.getValue(), Op3s.Wrreg.getValue(), 6, src2.encoding(), src1.encoding()); } } public static class Xor extends Fmt3b { - public Xor(SPARCAssembler masm, int simm13, Register src2, Register dst) { - super(masm, Ops.ArithOp.getValue(), dst.encoding(), Op3s.Xor.getValue(), src2.encoding(), simm13); + public Xor(SPARCAssembler masm, Register src1, int simm13, Register dst) { + super(masm, Ops.ArithOp.getValue(), Op3s.Xor.getValue(), src1.encoding(), simm13, dst.encoding()); } public Xor(SPARCAssembler masm, Register src1, Register src2, Register dst) { - super(masm, Ops.ArithOp.getValue(), dst.encoding(), Op3s.Xor.getValue(), src2.encoding(), src1.encoding()); + super(masm, Ops.ArithOp.getValue(), Op3s.Xor.getValue(), src1.encoding(), src2.encoding(), dst.encoding()); } } public static class Xorcc extends Fmt3b { - public Xorcc(SPARCAssembler masm, int simm13, Register src2, Register dst) { - super(masm, Ops.ArithOp.getValue(), dst.encoding(), Op3s.Xorcc.getValue(), src2.encoding(), simm13); + public Xorcc(SPARCAssembler masm, Register src1, int simm13, Register dst) { + super(masm, Ops.ArithOp.getValue(), Op3s.Xorcc.getValue(), src1.encoding(), simm13, dst.encoding()); } public Xorcc(SPARCAssembler masm, Register src1, Register src2, Register dst) { - super(masm, Ops.ArithOp.getValue(), dst.encoding(), Op3s.Xorcc.getValue(), src2.encoding(), src1.encoding()); + super(masm, Ops.ArithOp.getValue(), Op3s.Xorcc.getValue(), src1.encoding(), src2.encoding(), dst.encoding()); } } public static class Xnor extends Fmt3b { - public Xnor(SPARCAssembler masm, int simm13, Register src2, Register dst) { - super(masm, Ops.ArithOp.getValue(), dst.encoding(), Op3s.Xnor.getValue(), src2.encoding(), simm13); + public Xnor(SPARCAssembler masm, Register src1, int simm13, Register dst) { + super(masm, Ops.ArithOp.getValue(), Op3s.Xnor.getValue(), src1.encoding(), simm13, dst.encoding()); } public Xnor(SPARCAssembler masm, Register src1, Register src2, Register dst) { - super(masm, Ops.ArithOp.getValue(), dst.encoding(), Op3s.Xnor.getValue(), src2.encoding(), src1.encoding()); + super(masm, Ops.ArithOp.getValue(), Op3s.Xnor.getValue(), src1.encoding(), src2.encoding(), dst.encoding()); } } public static class Xnorcc extends Fmt3b { - public Xnorcc(SPARCAssembler masm, int simm13, Register src2, Register dst) { - super(masm, Ops.ArithOp.getValue(), dst.encoding(), Op3s.Xnorcc.getValue(), src2.encoding(), simm13); + public Xnorcc(SPARCAssembler masm, Register src1, int simm13, Register dst) { + super(masm, Ops.ArithOp.getValue(), Op3s.Xnorcc.getValue(), src1.encoding(), simm13, dst.encoding()); } public Xnorcc(SPARCAssembler masm, Register src1, Register src2, Register dst) { - super(masm, Ops.ArithOp.getValue(), dst.encoding(), Op3s.Xnorcc.getValue(), src2.encoding(), src1.encoding()); + super(masm, Ops.ArithOp.getValue(), Op3s.Xnorcc.getValue(), src1.encoding(), src2.encoding(), dst.encoding()); } } }
--- a/graal/com.oracle.graal.compiler.sparc/src/com/oracle/graal/compiler/sparc/SPARCLIRGenerator.java Fri May 24 15:38:15 2013 -0700 +++ b/graal/com.oracle.graal.compiler.sparc/src/com/oracle/graal/compiler/sparc/SPARCLIRGenerator.java Fri May 24 22:51:36 2013 -0400 @@ -40,6 +40,7 @@ import com.oracle.graal.api.meta.Constant; import com.oracle.graal.api.meta.Kind; import com.oracle.graal.api.meta.Value; +import com.oracle.graal.asm.*; import com.oracle.graal.compiler.gen.LIRGenerator; import com.oracle.graal.compiler.target.LIRGenLowerable; import com.oracle.graal.graph.GraalInternalError; @@ -49,6 +50,7 @@ import com.oracle.graal.lir.LIRInstruction; import com.oracle.graal.lir.LabelRef; import com.oracle.graal.lir.Variable; +import com.oracle.graal.lir.sparc.SPARCControlFlow.ReturnOp; import com.oracle.graal.lir.sparc.SPARCMove.MoveFromRegOp; import com.oracle.graal.lir.sparc.SPARCMove.MoveToRegOp; import com.oracle.graal.lir.sparc.SPARCArithmetic.Op2Stack; @@ -109,172 +111,165 @@ @Override protected boolean peephole(ValueNode valueNode) { - // SPARC: Auto-generated method stub + // No peephole optimizations for now return false; } @Override protected void emitReturn(Value input) { - // SPARC: Auto-generated method stub - + append(new ReturnOp(input)); } @Override public void emitJump(LabelRef label) { - // SPARC: Auto-generated method stub - + throw new InternalError("NYI"); } @Override public void emitCompareBranch(Value left, Value right, Condition cond, boolean unorderedIsTrue, LabelRef label) { - // SPARC: Auto-generated method stub + throw new InternalError("NYI"); } @Override public void emitOverflowCheckBranch(LabelRef label, boolean negated) { - // SPARC: Auto-generated method stub + throw new InternalError("NYI"); } @Override public void emitIntegerTestBranch(Value left, Value right, boolean negated, LabelRef label) { - // SPARC: Auto-generated method stub + throw new InternalError("NYI"); } @Override public Variable emitConditionalMove(Value leftVal, Value right, Condition cond, boolean unorderedIsTrue, Value trueValue, Value falseValue) { - // SPARC: Auto-generated method stub - return null; + throw new InternalError("NYI"); } @Override public Variable emitIntegerTestMove(Value leftVal, Value right, Value trueValue, Value falseValue) { - // SPARC: Auto-generated method stub - return null; + throw new InternalError("NYI"); } @Override protected void emitDirectCall(DirectCallTargetNode callTarget, Value result, Value[] parameters, Value[] temps, LIRFrameState callState) { - // SPARC: Auto-generated method stub + throw new InternalError("NYI"); } @Override protected void emitIndirectCall(IndirectCallTargetNode callTarget, Value result, Value[] parameters, Value[] temps, LIRFrameState callState) { - // SPARC: Auto-generated method stub + throw new InternalError("NYI"); } @Override protected void emitForeignCall(ForeignCallLinkage linkage, Value result, Value[] arguments, Value[] temps, LIRFrameState info) { - // SPARC: Auto-generated method stub + throw new InternalError("NYI"); } @Override protected void emitSequentialSwitch(Constant[] keyConstants, LabelRef[] keyTargets, LabelRef defaultTarget, Value key) { - // SPARC: Auto-generated method stub + throw new InternalError("NYI"); } @Override protected void emitSwitchRanges(int[] lowKeys, int[] highKeys, LabelRef[] targets, LabelRef defaultTarget, Value key) { - // SPARC: Auto-generated method stub + throw new InternalError("NYI"); } @Override protected void emitTableSwitch(int lowKey, LabelRef defaultTarget, LabelRef[] targets, Value key) { - // SPARC: Auto-generated method stub + throw new InternalError("NYI"); } @Override public void emitBitCount(Variable result, Value operand) { - // SPARC: Auto-generated method stub - + throw new InternalError("NYI"); } @Override public void emitBitScanForward(Variable result, Value operand) { - // SPARC: Auto-generated method stub - + throw new InternalError("NYI"); } @Override public void emitBitScanReverse(Variable result, Value operand) { - // SPARC: Auto-generated method stub + throw new InternalError("NYI"); } @Override public void emitMathAbs(Variable result, Variable input) { - // SPARC: Auto-generated method stub + throw new InternalError("NYI"); } @Override public void emitMathSqrt(Variable result, Variable input) { - // SPARC: Auto-generated method stub - + throw new InternalError("NYI"); } @Override public void emitMathLog(Variable result, Variable input, boolean base10) { - // SPARC: Auto-generated method stub + throw new InternalError("NYI"); } @Override public void emitMathCos(Variable result, Variable input) { - // SPARC: Auto-generated method stub + throw new InternalError("NYI"); } @Override public void emitMathSin(Variable result, Variable input) { - // SPARC: Auto-generated method stub + throw new InternalError("NYI"); } @Override public void emitMathTan(Variable result, Variable input) { - // SPARC: Auto-generated method stub + throw new InternalError("NYI"); } @Override public void emitByteSwap(Variable result, Value operand) { - // SPARC: Auto-generated method stub + throw new InternalError("NYI"); } @Override public boolean canInlineConstant(Constant c) { - // SPARC: Auto-generated method stub - return false; + switch (c.getKind()) { + case Long: + return NumUtil.isInt(c.asLong()) && !runtime.needsDataPatch(c); + case Object: + return c.isNull(); + default: + return true; + } } @Override public boolean canStoreConstant(Constant c) { - // SPARC: Auto-generated method stub - return false; + throw new InternalError("NYI"); } @Override public Value emitAddress(Value base, long displacement, Value index, int scale) { - // SPARC: Auto-generated method stub - return null; + throw new InternalError("NYI"); } @Override public Value emitLoad(Kind kind, Value address, DeoptimizingNode canTrap) { - // SPARC: Auto-generated method stub - return null; + throw new InternalError("NYI"); } @Override public void emitStore(Kind kind, Value address, Value input, DeoptimizingNode canTrap) { - // SPARC: Auto-generated method stub - + throw new InternalError("NYI"); } @Override public Value emitAddress(StackSlot address) { - // SPARC: Auto-generated method stub - return null; + throw new InternalError("NYI"); } @Override public Value emitNegate(Value input) { - // SPARC: Auto-generated method stub - return null; + throw new InternalError("NYI"); } @Override @@ -301,14 +296,12 @@ @Override public Value emitSub(Value a, Value b) { - // SPARC: Auto-generated method stub - return null; + throw new InternalError("NYI"); } @Override public Value emitMul(Value a, Value b) { - // SPARC: Auto-generated method stub - return null; + throw new InternalError("NYI"); } @Override @@ -319,101 +312,91 @@ @Override public Value emitRem(Value a, Value b, DeoptimizingNode deopting) { - // SPARC: Auto-generated method stub - return null; + throw new InternalError("NYI"); } @Override public Value emitUDiv(Value a, Value b, DeoptimizingNode deopting) { - // SPARC: Auto-generated method stub - return null; + throw new InternalError("NYI"); } @Override public Value emitURem(Value a, Value b, DeoptimizingNode deopting) { - // SPARC: Auto-generated method stub - return null; + throw new InternalError("NYI"); } @Override public Value emitAnd(Value a, Value b) { - // SPARC: Auto-generated method stub - return null; + throw new InternalError("NYI"); } @Override public Value emitOr(Value a, Value b) { - // SPARC: Auto-generated method stub - return null; + throw new InternalError("NYI"); } @Override public Value emitXor(Value a, Value b) { - // SPARC: Auto-generated method stub - return null; + throw new InternalError("NYI"); } @Override public Value emitShl(Value a, Value b) { - // SPARC: Auto-generated method stub - return null; + throw new InternalError("NYI"); } @Override public Value emitShr(Value a, Value b) { - // SPARC: Auto-generated method stub - return null; + throw new InternalError("NYI"); } @Override public Value emitUShr(Value a, Value b) { - // SPARC: Auto-generated method stub - return null; + throw new InternalError("NYI"); } @Override public Value emitConvert(Op opcode, Value inputVal) { - // SPARC: Auto-generated method stub - return null; + throw new InternalError("NYI"); } @Override public void emitMembar(int barriers) { - // SPARC: Auto-generated method stub + throw new InternalError("NYI"); } @Override public void emitDeoptimize(DeoptimizationAction action, DeoptimizingNode deopting) { - // SPARC: Auto-generated method stub + throw new InternalError("NYI"); } @Override public void visitCompareAndSwap(CompareAndSwapNode i) { - // SPARC: Auto-generated method stub + throw new InternalError("NYI"); } @Override public void visitSafepointNode(SafepointNode i) { - // SPARC: Auto-generated method stub + throw new InternalError("NYI"); } @Override public void visitBreakpointNode(BreakpointNode i) { - // SPARC: Auto-generated method stub + throw new InternalError("NYI"); } @Override public void emitUnwind(Value operand) { - // SPARC: Auto-generated method stub + throw new InternalError("NYI"); } @Override public void emitNullCheck(ValueNode v, DeoptimizingNode deopting) { - // SPARC: Auto-generated method stub + throw new InternalError("NYI"); } @Override public void visitInfopointNode(InfopointNode i) { - // SPARC: Auto-generated method stub + throw new InternalError("NYI"); } }
--- a/graal/com.oracle.graal.hotspot.sparc/src/com/oracle/graal/hotspot/sparc/SPARCHotSpotGraalRuntime.java Fri May 24 15:38:15 2013 -0700 +++ b/graal/com.oracle.graal.hotspot.sparc/src/com/oracle/graal/hotspot/sparc/SPARCHotSpotGraalRuntime.java Fri May 24 22:51:36 2013 -0400 @@ -47,7 +47,7 @@ @Override protected TargetDescription createTarget() { // SPARC: Create target description. - return null; + throw new InternalError("NYI"); } @Override
--- a/graal/com.oracle.graal.lir.sparc/src/com/oracle/graal/lir/sparc/SPARCArithmetic.java Fri May 24 15:38:15 2013 -0700 +++ b/graal/com.oracle.graal.lir.sparc/src/com/oracle/graal/lir/sparc/SPARCArithmetic.java Fri May 24 22:51:36 2013 -0400 @@ -104,25 +104,37 @@ throw GraalInternalError.shouldNotReachHere(); } } else if (isConstant(src2)) { - switch (opcode) { - case IADD: throw new InternalError("NYI"); - case ISUB: throw new InternalError("NYI"); - case IMUL: throw new InternalError("NYI"); - case IAND: throw new InternalError("NYI"); - case ISHL: throw new InternalError("NYI"); - case ISHR: throw new InternalError("NYI"); - case IUSHR: throw new InternalError("NYI"); - case IXOR: throw new InternalError("NYI"); - case LXOR: throw new InternalError("NYI"); - case LUSHR: throw new InternalError("NYI"); - case FADD: throw new InternalError("NYI"); - case FMUL: throw new InternalError("NYI"); - case FDIV: throw new InternalError("NYI"); - case DADD: throw new InternalError("NYI"); - case DMUL: throw new InternalError("NYI"); - case DDIV: throw new InternalError("NYI"); - default: - throw GraalInternalError.shouldNotReachHere(); + if (is_simm13(tasm.asIntConst(src2))) { + switch (opcode) { + case IADD: + new Add(masm, asIntReg(src1), tasm.asIntConst(src2), asIntReg(dst)); + break; + case ISUB: + new Sub(masm, asIntReg(src1), tasm.asIntConst(src2), asIntReg(dst)); + break; + case IMUL: + new Mulx(masm, asIntReg(src1), tasm.asIntConst(src2), asIntReg(dst)); + break; + case IAND: + new And(masm, asIntReg(src1), tasm.asIntConst(src2), asIntReg(dst)); + break; + case ISHL: throw new InternalError("NYI"); + case ISHR: throw new InternalError("NYI"); + case IUSHR: throw new InternalError("NYI"); + case IXOR: throw new InternalError("NYI"); + case LXOR: throw new InternalError("NYI"); + case LUSHR: throw new InternalError("NYI"); + case FADD: throw new InternalError("NYI"); + case FMUL: throw new InternalError("NYI"); + case FDIV: throw new InternalError("NYI"); + case DADD: throw new InternalError("NYI"); + case DMUL: throw new InternalError("NYI"); + case DDIV: throw new InternalError("NYI"); + default: + throw GraalInternalError.shouldNotReachHere(); + } + } else { + throw new InternalError("NYI"); } } else { switch (opcode) { @@ -213,6 +225,13 @@ } } + private static final int max13 = ((1 << 12) - 1); + private static final int min13 = -(1 << 12); + + private static boolean is_simm13(int src) { + return min13 <= src && src <= max13; + } + private static void verifyKind(SPARCArithmetic opcode, Value result, Value x, Value y) { if (((opcode.name().startsWith("I") && result.getKind() == Kind.Int && x.getKind().getStackKind() == Kind.Int && y.getKind().getStackKind() == Kind.Int) || (opcode.name().startsWith("L") && result.getKind() == Kind.Long && x.getKind() == Kind.Long && y.getKind() == Kind.Long)
--- /dev/null Thu Jan 01 00:00:00 1970 +0000 +++ b/graal/com.oracle.graal.lir.sparc/src/com/oracle/graal/lir/sparc/SPARCControlFlow.java Fri May 24 22:51:36 2013 -0400 @@ -0,0 +1,49 @@ +/* + * Copyright (c) 2013, Oracle and/or its affiliates. All rights reserved. + * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. + * + * This code is free software; you can redistribute it and/or modify it + * under the terms of the GNU General Public License version 2 only, as + * published by the Free Software Foundation. + * + * This code is distributed in the hope that it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License + * version 2 for more details (a copy is included in the LICENSE file that + * accompanied this code). + * + * You should have received a copy of the GNU General Public License version + * 2 along with this work; if not, write to the Free Software Foundation, + * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA. + * + * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA + * or visit www.oracle.com if you need additional information or have any + * questions. + */ +package com.oracle.graal.lir.sparc; + +import static com.oracle.graal.lir.LIRInstruction.OperandFlag.*; + +import com.oracle.graal.api.meta.*; +import com.oracle.graal.asm.sparc.*; +import com.oracle.graal.lir.asm.*; + +public class SPARCControlFlow { + + public static class ReturnOp extends SPARCLIRInstruction { + + @Use({REG, ILLEGAL}) protected Value x; + + public ReturnOp(Value x) { + this.x = x; + } + + @Override + public void emitCode(TargetMethodAssembler tasm, SPARCAssembler masm) { + if (tasm.frameContext != null) { + tasm.frameContext.leave(tasm); + } + // masm.return(); + } + } +}
--- a/graal/com.oracle.graal.sparc/src/com/oracle/graal/sparc/SPARC.java Fri May 24 15:38:15 2013 -0700 +++ b/graal/com.oracle.graal.sparc/src/com/oracle/graal/sparc/SPARC.java Fri May 24 22:51:36 2013 -0400 @@ -1,5 +1,5 @@ /* - * Copyright (c) 2009, 2011, Oracle and/or its affiliates. All rights reserved. + * Copyright (c) 2009, 2013, Oracle and/or its affiliates. All rights reserved. * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. * * This code is free software; you can redistribute it and/or modify it @@ -35,10 +35,74 @@ */ public class SPARC extends Architecture { - // SPARC: Define registers. + // @formatter:off + + public static final RegisterCategory CPU = new RegisterCategory("CPU"); + public static final RegisterCategory FPU = new RegisterCategory("FPU"); + + // General purpose registers + public static final Register r0 = new Register(0, 0, "r0", CPU); + public static final Register r1 = new Register(1, 1, "r1", CPU); + public static final Register r2 = new Register(2, 2, "r2", CPU); + public static final Register r3 = new Register(3, 3, "r3", CPU); + public static final Register r4 = new Register(4, 4, "r4", CPU); + public static final Register r5 = new Register(5, 5, "r5", CPU); + public static final Register r6 = new Register(6, 6, "r6", CPU); + public static final Register r7 = new Register(7, 7, "r7", CPU); + public static final Register r8 = new Register(8, 8, "r8", CPU); + public static final Register r9 = new Register(9, 9, "r9", CPU); + public static final Register r10 = new Register(10, 10, "r10", CPU); + public static final Register r11 = new Register(11, 11, "r11", CPU); + public static final Register r12 = new Register(12, 12, "r12", CPU); + public static final Register r13 = new Register(13, 13, "r13", CPU); + public static final Register r14 = new Register(14, 14, "r14", CPU); + public static final Register r15 = new Register(15, 15, "r15", CPU); + public static final Register r16 = new Register(16, 16, "r16", CPU); + public static final Register r17 = new Register(17, 17, "r17", CPU); + public static final Register r18 = new Register(18, 18, "r18", CPU); + public static final Register r19 = new Register(19, 19, "r19", CPU); + public static final Register r20 = new Register(20, 20, "r20", CPU); + public static final Register r21 = new Register(21, 21, "r21", CPU); + public static final Register r22 = new Register(22, 22, "r22", CPU); + public static final Register r23 = new Register(23, 23, "r23", CPU); + public static final Register r24 = new Register(24, 24, "r24", CPU); + public static final Register r25 = new Register(25, 25, "r25", CPU); + public static final Register r26 = new Register(26, 26, "r26", CPU); + public static final Register r27 = new Register(27, 27, "r27", CPU); + public static final Register r28 = new Register(28, 28, "r28", CPU); + public static final Register r29 = new Register(29, 29, "r29", CPU); + public static final Register r30 = new Register(30, 30, "r30", CPU); + public static final Register r31 = new Register(31, 31, "r31", CPU); + + public static final Register[] gprRegisters = { + r0, r1, r2, r3, r4, r5, r6, r7, + r8, r9, r10, r11, r12, r13, r14, r15, + r16, r17, r18, r19, r20, r21, r22, r23, + r24, r25, r26, r27, r28, r29, r30, r31 + }; + + // Floating point registers + public static final Register f0 = new Register(32, 0, "f0", FPU); + public static final Register f1 = new Register(33, 1, "f1", FPU); + public static final Register f2 = new Register(34, 2, "f2", FPU); + public static final Register f3 = new Register(35, 3, "f3", FPU); + public static final Register f4 = new Register(36, 4, "f4", FPU); + public static final Register f5 = new Register(37, 5, "f5", FPU); + public static final Register f6 = new Register(38, 6, "f6", FPU); + public static final Register f7 = new Register(39, 7, "f7", FPU); + + public static final Register[] allRegisters = { + // GPR + r0, r1, r2, r3, r4, r5, r6, r7, + r8, r9, r10, r11, r12, r13, r14, r15, + r16, r17, r18, r19, r20, r21, r22, r23, + r24, r25, r26, r27, r28, r29, r30, r31, + // FPU + f0, f1, f2, f3, f4, f5, f6, f7, + }; public SPARC() { - super("SPARC", 8, ByteOrder.LITTLE_ENDIAN, null, LOAD_STORE | STORE_STORE, 1, 0, 8); + super("SPARC", 8, ByteOrder.LITTLE_ENDIAN, allRegisters, LOAD_STORE | STORE_STORE, 1, 0, 8); // SPARC: Fix architecture parameters. }
--- a/mx/projects Fri May 24 15:38:15 2013 -0700 +++ b/mx/projects Fri May 24 22:51:36 2013 -0400 @@ -313,6 +313,13 @@ project@com.oracle.graal.compiler.sparc@checkstyle=com.oracle.graal.graph project@com.oracle.graal.compiler.sparc@javaCompliance=1.7 +# graal.compiler.sparc.test +project@com.oracle.graal.compiler.sparc.test@subDir=graal +project@com.oracle.graal.compiler.sparc.test@sourceDirs=src +project@com.oracle.graal.compiler.sparc.test@dependencies=com.oracle.graal.compiler.sparc,com.oracle.graal.compiler.test,com.oracle.graal.sparc +project@com.oracle.graal.compiler.sparc.test@checkstyle=com.oracle.graal.graph +project@com.oracle.graal.compiler.sparc.test@javaCompliance=1.7 + # graal.bytecode project@com.oracle.graal.bytecode@subDir=graal project@com.oracle.graal.bytecode@sourceDirs=src