Mercurial > hg > graal-jvmci-8
annotate src/cpu/x86/vm/c1_Runtime1_x86.cpp @ 4977:532be189cf09
Reducing diff to hsx24
author | Thomas Wuerthinger <thomas.wuerthinger@oracle.com> |
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date | Mon, 27 Feb 2012 17:06:18 +0100 |
parents | 8f01f899bccd |
children | 2f2c6347fce4 |
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0 | 1 /* |
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2 * Copyright (c) 1999, 2011, Oracle and/or its affiliates. All rights reserved. |
0 | 3 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. |
4 * | |
5 * This code is free software; you can redistribute it and/or modify it | |
6 * under the terms of the GNU General Public License version 2 only, as | |
7 * published by the Free Software Foundation. | |
8 * | |
9 * This code is distributed in the hope that it will be useful, but WITHOUT | |
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or | |
11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License | |
12 * version 2 for more details (a copy is included in the LICENSE file that | |
13 * accompanied this code). | |
14 * | |
15 * You should have received a copy of the GNU General Public License version | |
16 * 2 along with this work; if not, write to the Free Software Foundation, | |
17 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA. | |
18 * | |
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19 * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA |
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20 * or visit www.oracle.com if you need additional information or have any |
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21 * questions. |
0 | 22 * |
23 */ | |
24 | |
1972 | 25 #include "precompiled.hpp" |
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26 #include "asm/assembler.hpp" |
1972 | 27 #include "c1/c1_Defs.hpp" |
28 #include "c1/c1_MacroAssembler.hpp" | |
29 #include "c1/c1_Runtime1.hpp" | |
30 #include "interpreter/interpreter.hpp" | |
31 #include "nativeInst_x86.hpp" | |
32 #include "oops/compiledICHolderOop.hpp" | |
33 #include "oops/oop.inline.hpp" | |
34 #include "prims/jvmtiExport.hpp" | |
35 #include "register_x86.hpp" | |
36 #include "runtime/sharedRuntime.hpp" | |
37 #include "runtime/signature.hpp" | |
38 #include "runtime/vframeArray.hpp" | |
39 #include "vmreg_x86.inline.hpp" | |
0 | 40 |
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41 static void restore_live_registers(StubAssembler* sasm, bool restore_fpu_registers = true); |
0 | 42 |
43 // Implementation of StubAssembler | |
44 | |
45 int StubAssembler::call_RT(Register oop_result1, Register oop_result2, address entry, int args_size) { | |
46 // setup registers | |
304 | 47 const Register thread = NOT_LP64(rdi) LP64_ONLY(r15_thread); // is callee-saved register (Visual C++ calling conventions) |
0 | 48 assert(!(oop_result1->is_valid() || oop_result2->is_valid()) || oop_result1 != oop_result2, "registers must be different"); |
49 assert(oop_result1 != thread && oop_result2 != thread, "registers must be different"); | |
50 assert(args_size >= 0, "illegal args_size"); | |
51 | |
304 | 52 #ifdef _LP64 |
53 mov(c_rarg0, thread); | |
54 set_num_rt_args(0); // Nothing on stack | |
55 #else | |
0 | 56 set_num_rt_args(1 + args_size); |
57 | |
58 // push java thread (becomes first argument of C function) | |
59 get_thread(thread); | |
304 | 60 push(thread); |
61 #endif // _LP64 | |
0 | 62 |
63 set_last_Java_frame(thread, noreg, rbp, NULL); | |
304 | 64 |
0 | 65 // do the call |
66 call(RuntimeAddress(entry)); | |
67 int call_offset = offset(); | |
68 // verify callee-saved register | |
69 #ifdef ASSERT | |
70 guarantee(thread != rax, "change this code"); | |
304 | 71 push(rax); |
0 | 72 { Label L; |
73 get_thread(rax); | |
304 | 74 cmpptr(thread, rax); |
0 | 75 jcc(Assembler::equal, L); |
76 int3(); | |
77 stop("StubAssembler::call_RT: rdi not callee saved?"); | |
78 bind(L); | |
79 } | |
304 | 80 pop(rax); |
0 | 81 #endif |
82 reset_last_Java_frame(thread, true, false); | |
83 | |
84 // discard thread and arguments | |
304 | 85 NOT_LP64(addptr(rsp, num_rt_args()*BytesPerWord)); |
0 | 86 |
87 // check for pending exceptions | |
88 { Label L; | |
304 | 89 cmpptr(Address(thread, Thread::pending_exception_offset()), (int32_t)NULL_WORD); |
0 | 90 jcc(Assembler::equal, L); |
91 // exception pending => remove activation and forward to exception handler | |
304 | 92 movptr(rax, Address(thread, Thread::pending_exception_offset())); |
0 | 93 // make sure that the vm_results are cleared |
94 if (oop_result1->is_valid()) { | |
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95 movptr(Address(thread, JavaThread::vm_result_offset()), NULL_WORD); |
0 | 96 } |
97 if (oop_result2->is_valid()) { | |
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98 movptr(Address(thread, JavaThread::vm_result_2_offset()), NULL_WORD); |
0 | 99 } |
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100 // (tw) Deoptimize in case of an exception. |
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101 restore_live_registers(this, false); |
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102 movptr(Address(thread, Thread::pending_exception_offset()), NULL_WORD); |
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103 leave(); |
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104 movl(rscratch1, 2); // InvalidateRecompile |
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105 jump(RuntimeAddress(SharedRuntime::deopt_blob()->uncommon_trap())); |
0 | 106 bind(L); |
107 } | |
108 // get oop results if there are any and reset the values in the thread | |
109 if (oop_result1->is_valid()) { | |
304 | 110 movptr(oop_result1, Address(thread, JavaThread::vm_result_offset())); |
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111 movptr(Address(thread, JavaThread::vm_result_offset()), NULL_WORD); |
0 | 112 verify_oop(oop_result1); |
113 } | |
114 if (oop_result2->is_valid()) { | |
304 | 115 movptr(oop_result2, Address(thread, JavaThread::vm_result_2_offset())); |
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116 movptr(Address(thread, JavaThread::vm_result_2_offset()), NULL_WORD); |
0 | 117 verify_oop(oop_result2); |
118 } | |
119 return call_offset; | |
120 } | |
121 | |
122 | |
123 int StubAssembler::call_RT(Register oop_result1, Register oop_result2, address entry, Register arg1) { | |
304 | 124 #ifdef _LP64 |
125 mov(c_rarg1, arg1); | |
126 #else | |
127 push(arg1); | |
128 #endif // _LP64 | |
0 | 129 return call_RT(oop_result1, oop_result2, entry, 1); |
130 } | |
131 | |
132 | |
133 int StubAssembler::call_RT(Register oop_result1, Register oop_result2, address entry, Register arg1, Register arg2) { | |
304 | 134 #ifdef _LP64 |
135 if (c_rarg1 == arg2) { | |
136 if (c_rarg2 == arg1) { | |
137 xchgq(arg1, arg2); | |
138 } else { | |
139 mov(c_rarg2, arg2); | |
140 mov(c_rarg1, arg1); | |
141 } | |
142 } else { | |
143 mov(c_rarg1, arg1); | |
144 mov(c_rarg2, arg2); | |
145 } | |
146 #else | |
147 push(arg2); | |
148 push(arg1); | |
149 #endif // _LP64 | |
0 | 150 return call_RT(oop_result1, oop_result2, entry, 2); |
151 } | |
152 | |
153 | |
154 int StubAssembler::call_RT(Register oop_result1, Register oop_result2, address entry, Register arg1, Register arg2, Register arg3) { | |
304 | 155 #ifdef _LP64 |
156 // if there is any conflict use the stack | |
157 if (arg1 == c_rarg2 || arg1 == c_rarg3 || | |
158 arg2 == c_rarg1 || arg1 == c_rarg3 || | |
159 arg3 == c_rarg1 || arg1 == c_rarg2) { | |
160 push(arg3); | |
161 push(arg2); | |
162 push(arg1); | |
163 pop(c_rarg1); | |
164 pop(c_rarg2); | |
165 pop(c_rarg3); | |
166 } else { | |
167 mov(c_rarg1, arg1); | |
168 mov(c_rarg2, arg2); | |
169 mov(c_rarg3, arg3); | |
170 } | |
171 #else | |
172 push(arg3); | |
173 push(arg2); | |
174 push(arg1); | |
175 #endif // _LP64 | |
0 | 176 return call_RT(oop_result1, oop_result2, entry, 3); |
177 } | |
178 | |
179 | |
180 // Implementation of StubFrame | |
181 | |
182 class StubFrame: public StackObj { | |
183 private: | |
184 StubAssembler* _sasm; | |
185 | |
186 public: | |
187 StubFrame(StubAssembler* sasm, const char* name, bool must_gc_arguments); | |
188 void load_argument(int offset_in_words, Register reg); | |
189 | |
190 ~StubFrame(); | |
191 }; | |
192 | |
193 | |
194 #define __ _sasm-> | |
195 | |
196 StubFrame::StubFrame(StubAssembler* sasm, const char* name, bool must_gc_arguments) { | |
197 _sasm = sasm; | |
198 __ set_info(name, must_gc_arguments); | |
199 __ enter(); | |
200 } | |
201 | |
202 // load parameters that were stored with LIR_Assembler::store_parameter | |
203 // Note: offsets for store_parameter and load_argument must match | |
204 void StubFrame::load_argument(int offset_in_words, Register reg) { | |
205 // rbp, + 0: link | |
206 // + 1: return address | |
207 // + 2: argument with offset 0 | |
208 // + 3: argument with offset 1 | |
209 // + 4: ... | |
210 | |
304 | 211 __ movptr(reg, Address(rbp, (offset_in_words + 2) * BytesPerWord)); |
0 | 212 } |
213 | |
214 | |
215 StubFrame::~StubFrame() { | |
216 __ leave(); | |
217 __ ret(0); | |
218 } | |
219 | |
220 #undef __ | |
221 | |
222 | |
223 // Implementation of Runtime1 | |
224 | |
225 #define __ sasm-> | |
226 | |
304 | 227 const int float_regs_as_doubles_size_in_slots = pd_nof_fpu_regs_frame_map * 2; |
228 const int xmm_regs_as_doubles_size_in_slots = FrameMap::nof_xmm_regs * 2; | |
0 | 229 |
230 // Stack layout for saving/restoring all the registers needed during a runtime | |
231 // call (this includes deoptimization) | |
232 // Note: note that users of this frame may well have arguments to some runtime | |
233 // while these values are on the stack. These positions neglect those arguments | |
234 // but the code in save_live_registers will take the argument count into | |
235 // account. | |
236 // | |
304 | 237 #ifdef _LP64 |
238 #define SLOT2(x) x, | |
239 #define SLOT_PER_WORD 2 | |
240 #else | |
241 #define SLOT2(x) | |
242 #define SLOT_PER_WORD 1 | |
243 #endif // _LP64 | |
244 | |
0 | 245 enum reg_save_layout { |
304 | 246 // 64bit needs to keep stack 16 byte aligned. So we add some alignment dummies to make that |
247 // happen and will assert if the stack size we create is misaligned | |
248 #ifdef _LP64 | |
249 align_dummy_0, align_dummy_1, | |
250 #endif // _LP64 | |
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251 #ifdef _WIN64 |
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252 // Windows always allocates space for it's argument registers (see |
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253 // frame::arg_reg_save_area_bytes). |
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254 arg_reg_save_1, arg_reg_save_1H, // 0, 4 |
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255 arg_reg_save_2, arg_reg_save_2H, // 8, 12 |
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256 arg_reg_save_3, arg_reg_save_3H, // 16, 20 |
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257 arg_reg_save_4, arg_reg_save_4H, // 24, 28 |
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258 #endif // _WIN64 |
304 | 259 xmm_regs_as_doubles_off, // 32 |
260 float_regs_as_doubles_off = xmm_regs_as_doubles_off + xmm_regs_as_doubles_size_in_slots, // 160 | |
261 fpu_state_off = float_regs_as_doubles_off + float_regs_as_doubles_size_in_slots, // 224 | |
262 // fpu_state_end_off is exclusive | |
263 fpu_state_end_off = fpu_state_off + (FPUStateSizeInWords / SLOT_PER_WORD), // 352 | |
264 marker = fpu_state_end_off, SLOT2(markerH) // 352, 356 | |
265 extra_space_offset, // 360 | |
266 #ifdef _LP64 | |
267 r15_off = extra_space_offset, r15H_off, // 360, 364 | |
268 r14_off, r14H_off, // 368, 372 | |
269 r13_off, r13H_off, // 376, 380 | |
270 r12_off, r12H_off, // 384, 388 | |
271 r11_off, r11H_off, // 392, 396 | |
272 r10_off, r10H_off, // 400, 404 | |
273 r9_off, r9H_off, // 408, 412 | |
274 r8_off, r8H_off, // 416, 420 | |
275 rdi_off, rdiH_off, // 424, 428 | |
276 #else | |
0 | 277 rdi_off = extra_space_offset, |
304 | 278 #endif // _LP64 |
279 rsi_off, SLOT2(rsiH_off) // 432, 436 | |
280 rbp_off, SLOT2(rbpH_off) // 440, 444 | |
281 rsp_off, SLOT2(rspH_off) // 448, 452 | |
282 rbx_off, SLOT2(rbxH_off) // 456, 460 | |
283 rdx_off, SLOT2(rdxH_off) // 464, 468 | |
284 rcx_off, SLOT2(rcxH_off) // 472, 476 | |
285 rax_off, SLOT2(raxH_off) // 480, 484 | |
286 saved_rbp_off, SLOT2(saved_rbpH_off) // 488, 492 | |
287 return_off, SLOT2(returnH_off) // 496, 500 | |
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288 reg_save_frame_size // As noted: neglects any parameters to runtime // 504 |
0 | 289 }; |
290 | |
291 | |
292 | |
293 // Save off registers which might be killed by calls into the runtime. | |
294 // Tries to smart of about FP registers. In particular we separate | |
295 // saving and describing the FPU registers for deoptimization since we | |
296 // have to save the FPU registers twice if we describe them and on P4 | |
297 // saving FPU registers which don't contain anything appears | |
298 // expensive. The deopt blob is the only thing which needs to | |
299 // describe FPU registers. In all other cases it should be sufficient | |
300 // to simply save their current value. | |
301 | |
302 static OopMap* generate_oop_map(StubAssembler* sasm, int num_rt_args, | |
303 bool save_fpu_registers = true) { | |
304 | 304 |
305 // In 64bit all the args are in regs so there are no additional stack slots | |
306 LP64_ONLY(num_rt_args = 0); | |
307 LP64_ONLY(assert((reg_save_frame_size * VMRegImpl::stack_slot_size) % 16 == 0, "must be 16 byte aligned");) | |
308 int frame_size_in_slots = reg_save_frame_size + num_rt_args; // args + thread | |
309 sasm->set_frame_size(frame_size_in_slots / VMRegImpl::slots_per_word ); | |
0 | 310 |
311 // record saved value locations in an OopMap | |
312 // locations are offsets from sp after runtime call; num_rt_args is number of arguments in call, including thread | |
304 | 313 OopMap* map = new OopMap(frame_size_in_slots, 0); |
0 | 314 map->set_callee_saved(VMRegImpl::stack2reg(rax_off + num_rt_args), rax->as_VMReg()); |
315 map->set_callee_saved(VMRegImpl::stack2reg(rcx_off + num_rt_args), rcx->as_VMReg()); | |
316 map->set_callee_saved(VMRegImpl::stack2reg(rdx_off + num_rt_args), rdx->as_VMReg()); | |
317 map->set_callee_saved(VMRegImpl::stack2reg(rbx_off + num_rt_args), rbx->as_VMReg()); | |
318 map->set_callee_saved(VMRegImpl::stack2reg(rsi_off + num_rt_args), rsi->as_VMReg()); | |
319 map->set_callee_saved(VMRegImpl::stack2reg(rdi_off + num_rt_args), rdi->as_VMReg()); | |
304 | 320 #ifdef _LP64 |
321 map->set_callee_saved(VMRegImpl::stack2reg(r8_off + num_rt_args), r8->as_VMReg()); | |
322 map->set_callee_saved(VMRegImpl::stack2reg(r9_off + num_rt_args), r9->as_VMReg()); | |
323 map->set_callee_saved(VMRegImpl::stack2reg(r10_off + num_rt_args), r10->as_VMReg()); | |
324 map->set_callee_saved(VMRegImpl::stack2reg(r11_off + num_rt_args), r11->as_VMReg()); | |
325 map->set_callee_saved(VMRegImpl::stack2reg(r12_off + num_rt_args), r12->as_VMReg()); | |
326 map->set_callee_saved(VMRegImpl::stack2reg(r13_off + num_rt_args), r13->as_VMReg()); | |
327 map->set_callee_saved(VMRegImpl::stack2reg(r14_off + num_rt_args), r14->as_VMReg()); | |
328 map->set_callee_saved(VMRegImpl::stack2reg(r15_off + num_rt_args), r15->as_VMReg()); | |
329 | |
330 // This is stupid but needed. | |
331 map->set_callee_saved(VMRegImpl::stack2reg(raxH_off + num_rt_args), rax->as_VMReg()->next()); | |
332 map->set_callee_saved(VMRegImpl::stack2reg(rcxH_off + num_rt_args), rcx->as_VMReg()->next()); | |
333 map->set_callee_saved(VMRegImpl::stack2reg(rdxH_off + num_rt_args), rdx->as_VMReg()->next()); | |
334 map->set_callee_saved(VMRegImpl::stack2reg(rbxH_off + num_rt_args), rbx->as_VMReg()->next()); | |
335 map->set_callee_saved(VMRegImpl::stack2reg(rsiH_off + num_rt_args), rsi->as_VMReg()->next()); | |
336 map->set_callee_saved(VMRegImpl::stack2reg(rdiH_off + num_rt_args), rdi->as_VMReg()->next()); | |
337 | |
338 map->set_callee_saved(VMRegImpl::stack2reg(r8H_off + num_rt_args), r8->as_VMReg()->next()); | |
339 map->set_callee_saved(VMRegImpl::stack2reg(r9H_off + num_rt_args), r9->as_VMReg()->next()); | |
340 map->set_callee_saved(VMRegImpl::stack2reg(r10H_off + num_rt_args), r10->as_VMReg()->next()); | |
341 map->set_callee_saved(VMRegImpl::stack2reg(r11H_off + num_rt_args), r11->as_VMReg()->next()); | |
342 map->set_callee_saved(VMRegImpl::stack2reg(r12H_off + num_rt_args), r12->as_VMReg()->next()); | |
343 map->set_callee_saved(VMRegImpl::stack2reg(r13H_off + num_rt_args), r13->as_VMReg()->next()); | |
344 map->set_callee_saved(VMRegImpl::stack2reg(r14H_off + num_rt_args), r14->as_VMReg()->next()); | |
345 map->set_callee_saved(VMRegImpl::stack2reg(r15H_off + num_rt_args), r15->as_VMReg()->next()); | |
346 #endif // _LP64 | |
0 | 347 |
348 if (save_fpu_registers) { | |
349 if (UseSSE < 2) { | |
350 int fpu_off = float_regs_as_doubles_off; | |
351 for (int n = 0; n < FrameMap::nof_fpu_regs; n++) { | |
352 VMReg fpu_name_0 = FrameMap::fpu_regname(n); | |
353 map->set_callee_saved(VMRegImpl::stack2reg(fpu_off + num_rt_args), fpu_name_0); | |
354 // %%% This is really a waste but we'll keep things as they were for now | |
355 if (true) { | |
356 map->set_callee_saved(VMRegImpl::stack2reg(fpu_off + 1 + num_rt_args), fpu_name_0->next()); | |
357 } | |
358 fpu_off += 2; | |
359 } | |
360 assert(fpu_off == fpu_state_off, "incorrect number of fpu stack slots"); | |
361 } | |
362 | |
363 if (UseSSE >= 2) { | |
364 int xmm_off = xmm_regs_as_doubles_off; | |
365 for (int n = 0; n < FrameMap::nof_xmm_regs; n++) { | |
366 VMReg xmm_name_0 = as_XMMRegister(n)->as_VMReg(); | |
367 map->set_callee_saved(VMRegImpl::stack2reg(xmm_off + num_rt_args), xmm_name_0); | |
368 // %%% This is really a waste but we'll keep things as they were for now | |
369 if (true) { | |
370 map->set_callee_saved(VMRegImpl::stack2reg(xmm_off + 1 + num_rt_args), xmm_name_0->next()); | |
371 } | |
372 xmm_off += 2; | |
373 } | |
374 assert(xmm_off == float_regs_as_doubles_off, "incorrect number of xmm registers"); | |
375 | |
376 } else if (UseSSE == 1) { | |
377 int xmm_off = xmm_regs_as_doubles_off; | |
378 for (int n = 0; n < FrameMap::nof_xmm_regs; n++) { | |
379 VMReg xmm_name_0 = as_XMMRegister(n)->as_VMReg(); | |
380 map->set_callee_saved(VMRegImpl::stack2reg(xmm_off + num_rt_args), xmm_name_0); | |
381 xmm_off += 2; | |
382 } | |
383 assert(xmm_off == float_regs_as_doubles_off, "incorrect number of xmm registers"); | |
384 } | |
385 } | |
386 | |
387 return map; | |
388 } | |
389 | |
390 static OopMap* save_live_registers(StubAssembler* sasm, int num_rt_args, | |
391 bool save_fpu_registers = true) { | |
392 __ block_comment("save_live_registers"); | |
393 | |
304 | 394 __ pusha(); // integer registers |
0 | 395 |
396 // assert(float_regs_as_doubles_off % 2 == 0, "misaligned offset"); | |
397 // assert(xmm_regs_as_doubles_off % 2 == 0, "misaligned offset"); | |
398 | |
304 | 399 __ subptr(rsp, extra_space_offset * VMRegImpl::stack_slot_size); |
0 | 400 |
401 #ifdef ASSERT | |
304 | 402 __ movptr(Address(rsp, marker * VMRegImpl::stack_slot_size), (int32_t)0xfeedbeef); |
0 | 403 #endif |
404 | |
405 if (save_fpu_registers) { | |
406 if (UseSSE < 2) { | |
407 // save FPU stack | |
304 | 408 __ fnsave(Address(rsp, fpu_state_off * VMRegImpl::stack_slot_size)); |
0 | 409 __ fwait(); |
410 | |
411 #ifdef ASSERT | |
412 Label ok; | |
304 | 413 __ cmpw(Address(rsp, fpu_state_off * VMRegImpl::stack_slot_size), StubRoutines::fpu_cntrl_wrd_std()); |
0 | 414 __ jccb(Assembler::equal, ok); |
415 __ stop("corrupted control word detected"); | |
416 __ bind(ok); | |
417 #endif | |
418 | |
419 // Reset the control word to guard against exceptions being unmasked | |
420 // since fstp_d can cause FPU stack underflow exceptions. Write it | |
421 // into the on stack copy and then reload that to make sure that the | |
422 // current and future values are correct. | |
304 | 423 __ movw(Address(rsp, fpu_state_off * VMRegImpl::stack_slot_size), StubRoutines::fpu_cntrl_wrd_std()); |
424 __ frstor(Address(rsp, fpu_state_off * VMRegImpl::stack_slot_size)); | |
0 | 425 |
426 // Save the FPU registers in de-opt-able form | |
304 | 427 __ fstp_d(Address(rsp, float_regs_as_doubles_off * VMRegImpl::stack_slot_size + 0)); |
428 __ fstp_d(Address(rsp, float_regs_as_doubles_off * VMRegImpl::stack_slot_size + 8)); | |
429 __ fstp_d(Address(rsp, float_regs_as_doubles_off * VMRegImpl::stack_slot_size + 16)); | |
430 __ fstp_d(Address(rsp, float_regs_as_doubles_off * VMRegImpl::stack_slot_size + 24)); | |
431 __ fstp_d(Address(rsp, float_regs_as_doubles_off * VMRegImpl::stack_slot_size + 32)); | |
432 __ fstp_d(Address(rsp, float_regs_as_doubles_off * VMRegImpl::stack_slot_size + 40)); | |
433 __ fstp_d(Address(rsp, float_regs_as_doubles_off * VMRegImpl::stack_slot_size + 48)); | |
434 __ fstp_d(Address(rsp, float_regs_as_doubles_off * VMRegImpl::stack_slot_size + 56)); | |
0 | 435 } |
436 | |
437 if (UseSSE >= 2) { | |
438 // save XMM registers | |
439 // XMM registers can contain float or double values, but this is not known here, | |
440 // so always save them as doubles. | |
441 // note that float values are _not_ converted automatically, so for float values | |
442 // the second word contains only garbage data. | |
304 | 443 __ movdbl(Address(rsp, xmm_regs_as_doubles_off * VMRegImpl::stack_slot_size + 0), xmm0); |
444 __ movdbl(Address(rsp, xmm_regs_as_doubles_off * VMRegImpl::stack_slot_size + 8), xmm1); | |
445 __ movdbl(Address(rsp, xmm_regs_as_doubles_off * VMRegImpl::stack_slot_size + 16), xmm2); | |
446 __ movdbl(Address(rsp, xmm_regs_as_doubles_off * VMRegImpl::stack_slot_size + 24), xmm3); | |
447 __ movdbl(Address(rsp, xmm_regs_as_doubles_off * VMRegImpl::stack_slot_size + 32), xmm4); | |
448 __ movdbl(Address(rsp, xmm_regs_as_doubles_off * VMRegImpl::stack_slot_size + 40), xmm5); | |
449 __ movdbl(Address(rsp, xmm_regs_as_doubles_off * VMRegImpl::stack_slot_size + 48), xmm6); | |
450 __ movdbl(Address(rsp, xmm_regs_as_doubles_off * VMRegImpl::stack_slot_size + 56), xmm7); | |
451 #ifdef _LP64 | |
452 __ movdbl(Address(rsp, xmm_regs_as_doubles_off * VMRegImpl::stack_slot_size + 64), xmm8); | |
453 __ movdbl(Address(rsp, xmm_regs_as_doubles_off * VMRegImpl::stack_slot_size + 72), xmm9); | |
454 __ movdbl(Address(rsp, xmm_regs_as_doubles_off * VMRegImpl::stack_slot_size + 80), xmm10); | |
455 __ movdbl(Address(rsp, xmm_regs_as_doubles_off * VMRegImpl::stack_slot_size + 88), xmm11); | |
456 __ movdbl(Address(rsp, xmm_regs_as_doubles_off * VMRegImpl::stack_slot_size + 96), xmm12); | |
457 __ movdbl(Address(rsp, xmm_regs_as_doubles_off * VMRegImpl::stack_slot_size + 104), xmm13); | |
458 __ movdbl(Address(rsp, xmm_regs_as_doubles_off * VMRegImpl::stack_slot_size + 112), xmm14); | |
459 __ movdbl(Address(rsp, xmm_regs_as_doubles_off * VMRegImpl::stack_slot_size + 120), xmm15); | |
460 #endif // _LP64 | |
0 | 461 } else if (UseSSE == 1) { |
462 // save XMM registers as float because double not supported without SSE2 | |
304 | 463 __ movflt(Address(rsp, xmm_regs_as_doubles_off * VMRegImpl::stack_slot_size + 0), xmm0); |
464 __ movflt(Address(rsp, xmm_regs_as_doubles_off * VMRegImpl::stack_slot_size + 8), xmm1); | |
465 __ movflt(Address(rsp, xmm_regs_as_doubles_off * VMRegImpl::stack_slot_size + 16), xmm2); | |
466 __ movflt(Address(rsp, xmm_regs_as_doubles_off * VMRegImpl::stack_slot_size + 24), xmm3); | |
467 __ movflt(Address(rsp, xmm_regs_as_doubles_off * VMRegImpl::stack_slot_size + 32), xmm4); | |
468 __ movflt(Address(rsp, xmm_regs_as_doubles_off * VMRegImpl::stack_slot_size + 40), xmm5); | |
469 __ movflt(Address(rsp, xmm_regs_as_doubles_off * VMRegImpl::stack_slot_size + 48), xmm6); | |
470 __ movflt(Address(rsp, xmm_regs_as_doubles_off * VMRegImpl::stack_slot_size + 56), xmm7); | |
0 | 471 } |
472 } | |
473 | |
474 // FPU stack must be empty now | |
475 __ verify_FPU(0, "save_live_registers"); | |
476 | |
477 return generate_oop_map(sasm, num_rt_args, save_fpu_registers); | |
478 } | |
479 | |
480 | |
481 static void restore_fpu(StubAssembler* sasm, bool restore_fpu_registers = true) { | |
482 if (restore_fpu_registers) { | |
483 if (UseSSE >= 2) { | |
484 // restore XMM registers | |
304 | 485 __ movdbl(xmm0, Address(rsp, xmm_regs_as_doubles_off * VMRegImpl::stack_slot_size + 0)); |
486 __ movdbl(xmm1, Address(rsp, xmm_regs_as_doubles_off * VMRegImpl::stack_slot_size + 8)); | |
487 __ movdbl(xmm2, Address(rsp, xmm_regs_as_doubles_off * VMRegImpl::stack_slot_size + 16)); | |
488 __ movdbl(xmm3, Address(rsp, xmm_regs_as_doubles_off * VMRegImpl::stack_slot_size + 24)); | |
489 __ movdbl(xmm4, Address(rsp, xmm_regs_as_doubles_off * VMRegImpl::stack_slot_size + 32)); | |
490 __ movdbl(xmm5, Address(rsp, xmm_regs_as_doubles_off * VMRegImpl::stack_slot_size + 40)); | |
491 __ movdbl(xmm6, Address(rsp, xmm_regs_as_doubles_off * VMRegImpl::stack_slot_size + 48)); | |
492 __ movdbl(xmm7, Address(rsp, xmm_regs_as_doubles_off * VMRegImpl::stack_slot_size + 56)); | |
493 #ifdef _LP64 | |
494 __ movdbl(xmm8, Address(rsp, xmm_regs_as_doubles_off * VMRegImpl::stack_slot_size + 64)); | |
495 __ movdbl(xmm9, Address(rsp, xmm_regs_as_doubles_off * VMRegImpl::stack_slot_size + 72)); | |
496 __ movdbl(xmm10, Address(rsp, xmm_regs_as_doubles_off * VMRegImpl::stack_slot_size + 80)); | |
497 __ movdbl(xmm11, Address(rsp, xmm_regs_as_doubles_off * VMRegImpl::stack_slot_size + 88)); | |
498 __ movdbl(xmm12, Address(rsp, xmm_regs_as_doubles_off * VMRegImpl::stack_slot_size + 96)); | |
499 __ movdbl(xmm13, Address(rsp, xmm_regs_as_doubles_off * VMRegImpl::stack_slot_size + 104)); | |
500 __ movdbl(xmm14, Address(rsp, xmm_regs_as_doubles_off * VMRegImpl::stack_slot_size + 112)); | |
501 __ movdbl(xmm15, Address(rsp, xmm_regs_as_doubles_off * VMRegImpl::stack_slot_size + 120)); | |
502 #endif // _LP64 | |
0 | 503 } else if (UseSSE == 1) { |
504 // restore XMM registers | |
304 | 505 __ movflt(xmm0, Address(rsp, xmm_regs_as_doubles_off * VMRegImpl::stack_slot_size + 0)); |
506 __ movflt(xmm1, Address(rsp, xmm_regs_as_doubles_off * VMRegImpl::stack_slot_size + 8)); | |
507 __ movflt(xmm2, Address(rsp, xmm_regs_as_doubles_off * VMRegImpl::stack_slot_size + 16)); | |
508 __ movflt(xmm3, Address(rsp, xmm_regs_as_doubles_off * VMRegImpl::stack_slot_size + 24)); | |
509 __ movflt(xmm4, Address(rsp, xmm_regs_as_doubles_off * VMRegImpl::stack_slot_size + 32)); | |
510 __ movflt(xmm5, Address(rsp, xmm_regs_as_doubles_off * VMRegImpl::stack_slot_size + 40)); | |
511 __ movflt(xmm6, Address(rsp, xmm_regs_as_doubles_off * VMRegImpl::stack_slot_size + 48)); | |
512 __ movflt(xmm7, Address(rsp, xmm_regs_as_doubles_off * VMRegImpl::stack_slot_size + 56)); | |
0 | 513 } |
514 | |
515 if (UseSSE < 2) { | |
304 | 516 __ frstor(Address(rsp, fpu_state_off * VMRegImpl::stack_slot_size)); |
0 | 517 } else { |
518 // check that FPU stack is really empty | |
519 __ verify_FPU(0, "restore_live_registers"); | |
520 } | |
521 | |
522 } else { | |
523 // check that FPU stack is really empty | |
524 __ verify_FPU(0, "restore_live_registers"); | |
525 } | |
526 | |
527 #ifdef ASSERT | |
528 { | |
529 Label ok; | |
304 | 530 __ cmpptr(Address(rsp, marker * VMRegImpl::stack_slot_size), (int32_t)0xfeedbeef); |
0 | 531 __ jcc(Assembler::equal, ok); |
532 __ stop("bad offsets in frame"); | |
533 __ bind(ok); | |
534 } | |
304 | 535 #endif // ASSERT |
0 | 536 |
304 | 537 __ addptr(rsp, extra_space_offset * VMRegImpl::stack_slot_size); |
0 | 538 } |
539 | |
540 | |
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541 static void restore_live_registers(StubAssembler* sasm, bool restore_fpu_registers/* = true*/) { |
0 | 542 __ block_comment("restore_live_registers"); |
543 | |
544 restore_fpu(sasm, restore_fpu_registers); | |
304 | 545 __ popa(); |
0 | 546 } |
547 | |
548 | |
549 static void restore_live_registers_except_rax(StubAssembler* sasm, bool restore_fpu_registers = true) { | |
550 __ block_comment("restore_live_registers_except_rax"); | |
551 | |
552 restore_fpu(sasm, restore_fpu_registers); | |
553 | |
304 | 554 #ifdef _LP64 |
555 __ movptr(r15, Address(rsp, 0)); | |
556 __ movptr(r14, Address(rsp, wordSize)); | |
557 __ movptr(r13, Address(rsp, 2 * wordSize)); | |
558 __ movptr(r12, Address(rsp, 3 * wordSize)); | |
559 __ movptr(r11, Address(rsp, 4 * wordSize)); | |
560 __ movptr(r10, Address(rsp, 5 * wordSize)); | |
561 __ movptr(r9, Address(rsp, 6 * wordSize)); | |
562 __ movptr(r8, Address(rsp, 7 * wordSize)); | |
563 __ movptr(rdi, Address(rsp, 8 * wordSize)); | |
564 __ movptr(rsi, Address(rsp, 9 * wordSize)); | |
565 __ movptr(rbp, Address(rsp, 10 * wordSize)); | |
566 // skip rsp | |
567 __ movptr(rbx, Address(rsp, 12 * wordSize)); | |
568 __ movptr(rdx, Address(rsp, 13 * wordSize)); | |
569 __ movptr(rcx, Address(rsp, 14 * wordSize)); | |
570 | |
571 __ addptr(rsp, 16 * wordSize); | |
572 #else | |
573 | |
574 __ pop(rdi); | |
575 __ pop(rsi); | |
576 __ pop(rbp); | |
577 __ pop(rbx); // skip this value | |
578 __ pop(rbx); | |
579 __ pop(rdx); | |
580 __ pop(rcx); | |
581 __ addptr(rsp, BytesPerWord); | |
582 #endif // _LP64 | |
0 | 583 } |
584 | |
585 | |
586 void Runtime1::initialize_pd() { | |
587 // nothing to do | |
588 } | |
589 | |
590 | |
591 // target: the entry point of the method that creates and posts the exception oop | |
592 // has_argument: true if the exception needs an argument (passed on stack because registers must be preserved) | |
593 | |
594 OopMapSet* Runtime1::generate_exception_throw(StubAssembler* sasm, address target, bool has_argument) { | |
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595 OopMapSet* oop_maps = new OopMapSet(); |
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596 #ifdef GRAAL |
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597 OopMap* oop_map = save_live_registers(sasm, 1); |
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598 |
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599 // now all registers are saved and can be used freely |
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600 // verify that no old value is used accidentally |
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601 __ invalidate_registers(true, true, true, true, true, true); |
0 | 602 |
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603 // registers used by this stub |
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604 const Register temp_reg = rbx; |
0 | 605 |
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606 // load argument for exception that is passed as an argument into the stub |
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607 if (has_argument) { |
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608 __ movptr(c_rarg1, r10); |
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609 } |
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610 int call_offset = __ call_RT(noreg, noreg, target, has_argument ? 1 : 0); |
0 | 611 |
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612 oop_maps->add_gc_map(call_offset, oop_map); |
304 | 613 #else |
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614 // preserve all registers |
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615 int num_rt_args = has_argument ? 2 : 1; |
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616 OopMap* oop_map = save_live_registers(sasm, num_rt_args); |
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617 |
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618 // now all registers are saved and can be used freely |
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619 // verify that no old value is used accidentally |
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620 __ invalidate_registers(true, true, true, true, true, true); |
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621 |
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622 // registers used by this stub |
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623 const Register temp_reg = rbx; |
0 | 624 |
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625 // load argument for exception that is passed as an argument into the stub |
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626 if (has_argument) { |
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627 #ifdef _LP64 |
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628 __ movptr(c_rarg1, Address(rbp, 2*BytesPerWord)); |
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629 #else |
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630 __ movptr(temp_reg, Address(rbp, 2*BytesPerWord)); |
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631 __ push(temp_reg); |
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632 #endif // _LP64 |
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633 } |
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634 int call_offset = __ call_RT(noreg, noreg, target, num_rt_args - 1); |
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635 |
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636 oop_maps->add_gc_map(call_offset, oop_map); |
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637 #endif |
0 | 638 |
639 __ stop("should not reach here"); | |
640 | |
641 return oop_maps; | |
642 } | |
643 | |
644 | |
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645 OopMapSet* Runtime1::generate_handle_exception(StubID id, StubAssembler *sasm) { |
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646 __ block_comment("generate_handle_exception"); |
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647 |
0 | 648 // incoming parameters |
649 const Register exception_oop = rax; | |
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650 const Register exception_pc = rdx; |
0 | 651 // other registers used in this stub |
304 | 652 const Register thread = NOT_LP64(rdi) LP64_ONLY(r15_thread); |
0 | 653 |
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654 // Save registers, if required. |
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655 OopMapSet* oop_maps = new OopMapSet(); |
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656 OopMap* oop_map = NULL; |
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657 switch (id) { |
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658 case forward_exception_id: |
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659 // We're handling an exception in the context of a compiled frame. |
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660 // The registers have been saved in the standard places. Perform |
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661 // an exception lookup in the caller and dispatch to the handler |
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662 // if found. Otherwise unwind and dispatch to the callers |
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663 // exception handler. |
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664 oop_map = generate_oop_map(sasm, 1 /*thread*/); |
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665 |
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666 // load and clear pending exception oop into RAX |
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667 __ movptr(exception_oop, Address(thread, Thread::pending_exception_offset())); |
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668 __ movptr(Address(thread, Thread::pending_exception_offset()), NULL_WORD); |
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669 |
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670 // load issuing PC (the return address for this stub) into rdx |
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671 __ movptr(exception_pc, Address(rbp, 1*BytesPerWord)); |
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672 |
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673 // make sure that the vm_results are cleared (may be unnecessary) |
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674 __ movptr(Address(thread, JavaThread::vm_result_offset()), NULL_WORD); |
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675 __ movptr(Address(thread, JavaThread::vm_result_2_offset()), NULL_WORD); |
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676 break; |
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677 case handle_exception_nofpu_id: |
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678 case handle_exception_id: |
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679 // At this point all registers MAY be live. |
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680 oop_map = save_live_registers(sasm, 1 /*thread*/, id == handle_exception_nofpu_id); |
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681 break; |
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682 case handle_exception_from_callee_id: { |
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683 // At this point all registers except exception oop (RAX) and |
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684 // exception pc (RDX) are dead. |
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685 const int frame_size = 2 /*BP, return address*/ NOT_LP64(+ 1 /*thread*/) WIN64_ONLY(+ frame::arg_reg_save_area_bytes / BytesPerWord); |
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686 oop_map = new OopMap(frame_size * VMRegImpl::slots_per_word, 0); |
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687 sasm->set_frame_size(frame_size); |
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688 WIN64_ONLY(__ subq(rsp, frame::arg_reg_save_area_bytes)); |
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689 break; |
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690 } |
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691 default: ShouldNotReachHere(); |
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692 } |
0 | 693 |
694 #ifdef TIERED | |
695 // C2 can leave the fpu stack dirty | |
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696 if (UseSSE < 2) { |
0 | 697 __ empty_FPU_stack(); |
698 } | |
699 #endif // TIERED | |
700 | |
701 // verify that only rax, and rdx is valid at this time | |
702 __ invalidate_registers(false, true, true, false, true, true); | |
703 // verify that rax, contains a valid exception | |
704 __ verify_not_null_oop(exception_oop); | |
705 | |
706 // load address of JavaThread object for thread-local data | |
304 | 707 NOT_LP64(__ get_thread(thread);) |
0 | 708 |
709 #ifdef ASSERT | |
710 // check that fields in JavaThread for exception oop and issuing pc are | |
711 // empty before writing to them | |
712 Label oop_empty; | |
304 | 713 __ cmpptr(Address(thread, JavaThread::exception_oop_offset()), (int32_t) NULL_WORD); |
0 | 714 __ jcc(Assembler::equal, oop_empty); |
715 __ stop("exception oop already set"); | |
716 __ bind(oop_empty); | |
717 | |
718 Label pc_empty; | |
304 | 719 __ cmpptr(Address(thread, JavaThread::exception_pc_offset()), 0); |
0 | 720 __ jcc(Assembler::equal, pc_empty); |
721 __ stop("exception pc already set"); | |
722 __ bind(pc_empty); | |
723 #endif | |
724 | |
725 // save exception oop and issuing pc into JavaThread | |
726 // (exception handler will load it from here) | |
304 | 727 __ movptr(Address(thread, JavaThread::exception_oop_offset()), exception_oop); |
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728 __ movptr(Address(thread, JavaThread::exception_pc_offset()), exception_pc); |
0 | 729 |
730 // patch throwing pc into return address (has bci & oop map) | |
304 | 731 __ movptr(Address(rbp, 1*BytesPerWord), exception_pc); |
0 | 732 |
733 // compute the exception handler. | |
734 // the exception oop and the throwing pc are read from the fields in JavaThread | |
735 int call_offset = __ call_RT(noreg, noreg, CAST_FROM_FN_PTR(address, exception_handler_for_pc)); | |
736 oop_maps->add_gc_map(call_offset, oop_map); | |
737 | |
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738 // rax: handler address |
0 | 739 // will be the deopt blob if nmethod was deoptimized while we looked up |
740 // handler regardless of whether handler existed in the nmethod. | |
741 | |
742 // only rax, is valid at this time, all other registers have been destroyed by the runtime call | |
743 __ invalidate_registers(false, true, true, true, true, true); | |
744 | |
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745 // patch the return address, this stub will directly return to the exception handler |
304 | 746 __ movptr(Address(rbp, 1*BytesPerWord), rax); |
0 | 747 |
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748 switch (id) { |
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749 case forward_exception_id: |
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750 case handle_exception_nofpu_id: |
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751 case handle_exception_id: |
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752 // Restore the registers that were saved at the beginning. |
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753 restore_live_registers(sasm, id == handle_exception_nofpu_id); |
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754 break; |
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755 case handle_exception_from_callee_id: |
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756 // WIN64_ONLY: No need to add frame::arg_reg_save_area_bytes to SP |
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757 // since we do a leave anyway. |
0 | 758 |
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759 // Pop the return address since we are possibly changing SP (restoring from BP). |
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760 __ leave(); |
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761 __ pop(rcx); |
0 | 762 |
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763 // Restore SP from BP if the exception PC is a method handle call site. |
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764 NOT_LP64(__ get_thread(thread);) |
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765 __ cmpl(Address(thread, JavaThread::is_method_handle_return_offset()), 0); |
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766 __ cmovptr(Assembler::notEqual, rsp, rbp_mh_SP_save); |
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767 __ jmp(rcx); // jump to exception handler |
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768 break; |
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769 default: ShouldNotReachHere(); |
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770 } |
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771 |
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772 return oop_maps; |
0 | 773 } |
774 | |
775 | |
776 void Runtime1::generate_unwind_exception(StubAssembler *sasm) { | |
777 // incoming parameters | |
778 const Register exception_oop = rax; | |
1295 | 779 // callee-saved copy of exception_oop during runtime call |
780 const Register exception_oop_callee_saved = NOT_LP64(rsi) LP64_ONLY(r14); | |
0 | 781 // other registers used in this stub |
782 const Register exception_pc = rdx; | |
783 const Register handler_addr = rbx; | |
304 | 784 const Register thread = NOT_LP64(rdi) LP64_ONLY(r15_thread); |
0 | 785 |
786 // verify that only rax, is valid at this time | |
787 __ invalidate_registers(false, true, true, true, true, true); | |
788 | |
789 #ifdef ASSERT | |
790 // check that fields in JavaThread for exception oop and issuing pc are empty | |
304 | 791 NOT_LP64(__ get_thread(thread);) |
0 | 792 Label oop_empty; |
304 | 793 __ cmpptr(Address(thread, JavaThread::exception_oop_offset()), 0); |
0 | 794 __ jcc(Assembler::equal, oop_empty); |
795 __ stop("exception oop must be empty"); | |
796 __ bind(oop_empty); | |
797 | |
798 Label pc_empty; | |
304 | 799 __ cmpptr(Address(thread, JavaThread::exception_pc_offset()), 0); |
0 | 800 __ jcc(Assembler::equal, pc_empty); |
801 __ stop("exception pc must be empty"); | |
802 __ bind(pc_empty); | |
803 #endif | |
804 | |
805 // clear the FPU stack in case any FPU results are left behind | |
806 __ empty_FPU_stack(); | |
807 | |
1295 | 808 // save exception_oop in callee-saved register to preserve it during runtime calls |
809 __ verify_not_null_oop(exception_oop); | |
810 __ movptr(exception_oop_callee_saved, exception_oop); | |
811 | |
812 NOT_LP64(__ get_thread(thread);) | |
813 // Get return address (is on top of stack after leave). | |
304 | 814 __ movptr(exception_pc, Address(rsp, 0)); |
0 | 815 |
1295 | 816 // search the exception handler address of the caller (using the return address) |
817 __ call_VM_leaf(CAST_FROM_FN_PTR(address, SharedRuntime::exception_handler_for_return_address), thread, exception_pc); | |
818 // rax: exception handler address of the caller | |
0 | 819 |
1295 | 820 // Only RAX and RSI are valid at this time, all other registers have been destroyed by the call. |
821 __ invalidate_registers(false, true, true, true, false, true); | |
0 | 822 |
823 // move result of call into correct register | |
304 | 824 __ movptr(handler_addr, rax); |
0 | 825 |
1295 | 826 // Restore exception oop to RAX (required convention of exception handler). |
827 __ movptr(exception_oop, exception_oop_callee_saved); | |
0 | 828 |
1295 | 829 // verify that there is really a valid exception in rax |
830 __ verify_not_null_oop(exception_oop); | |
0 | 831 |
832 // get throwing pc (= return address). | |
833 // rdx has been destroyed by the call, so it must be set again | |
834 // the pop is also necessary to simulate the effect of a ret(0) | |
304 | 835 __ pop(exception_pc); |
0 | 836 |
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837 // Restore SP from BP if the exception PC is a method handle call site. |
1295 | 838 NOT_LP64(__ get_thread(thread);) |
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839 __ cmpl(Address(thread, JavaThread::is_method_handle_return_offset()), 0); |
1564 | 840 __ cmovptr(Assembler::notEqual, rsp, rbp_mh_SP_save); |
0 | 841 |
842 // continue at exception handler (return address removed) | |
843 // note: do *not* remove arguments when unwinding the | |
844 // activation since the caller assumes having | |
845 // all arguments on the stack when entering the | |
846 // runtime to determine the exception handler | |
847 // (GC happens at call site with arguments!) | |
1295 | 848 // rax: exception oop |
0 | 849 // rdx: throwing pc |
1295 | 850 // rbx: exception handler |
0 | 851 __ jmp(handler_addr); |
852 } | |
853 | |
854 | |
855 OopMapSet* Runtime1::generate_patching(StubAssembler* sasm, address target) { | |
856 // use the maximum number of runtime-arguments here because it is difficult to | |
857 // distinguish each RT-Call. | |
858 // Note: This number affects also the RT-Call in generate_handle_exception because | |
859 // the oop-map is shared for all calls. | |
860 const int num_rt_args = 2; // thread + dummy | |
861 | |
862 DeoptimizationBlob* deopt_blob = SharedRuntime::deopt_blob(); | |
863 assert(deopt_blob != NULL, "deoptimization blob must have been created"); | |
864 | |
865 OopMap* oop_map = save_live_registers(sasm, num_rt_args); | |
866 | |
304 | 867 #ifdef _LP64 |
868 const Register thread = r15_thread; | |
869 // No need to worry about dummy | |
870 __ mov(c_rarg0, thread); | |
871 #else | |
872 __ push(rax); // push dummy | |
0 | 873 |
874 const Register thread = rdi; // is callee-saved register (Visual C++ calling conventions) | |
875 // push java thread (becomes first argument of C function) | |
876 __ get_thread(thread); | |
304 | 877 __ push(thread); |
878 #endif // _LP64 | |
0 | 879 __ set_last_Java_frame(thread, noreg, rbp, NULL); |
880 // do the call | |
881 __ call(RuntimeAddress(target)); | |
882 OopMapSet* oop_maps = new OopMapSet(); | |
883 oop_maps->add_gc_map(__ offset(), oop_map); | |
884 // verify callee-saved register | |
885 #ifdef ASSERT | |
886 guarantee(thread != rax, "change this code"); | |
304 | 887 __ push(rax); |
0 | 888 { Label L; |
889 __ get_thread(rax); | |
304 | 890 __ cmpptr(thread, rax); |
0 | 891 __ jcc(Assembler::equal, L); |
304 | 892 __ stop("StubAssembler::call_RT: rdi/r15 not callee saved?"); |
0 | 893 __ bind(L); |
894 } | |
304 | 895 __ pop(rax); |
0 | 896 #endif |
897 __ reset_last_Java_frame(thread, true, false); | |
304 | 898 #ifndef _LP64 |
899 __ pop(rcx); // discard thread arg | |
900 __ pop(rcx); // discard dummy | |
901 #endif // _LP64 | |
0 | 902 |
903 // check for pending exceptions | |
904 { Label L; | |
304 | 905 __ cmpptr(Address(thread, Thread::pending_exception_offset()), (int32_t)NULL_WORD); |
0 | 906 __ jcc(Assembler::equal, L); |
907 // exception pending => remove activation and forward to exception handler | |
908 | |
304 | 909 __ testptr(rax, rax); // have we deoptimized? |
0 | 910 __ jump_cc(Assembler::equal, |
911 RuntimeAddress(Runtime1::entry_for(Runtime1::forward_exception_id))); | |
912 | |
913 // the deopt blob expects exceptions in the special fields of | |
914 // JavaThread, so copy and clear pending exception. | |
915 | |
916 // load and clear pending exception | |
304 | 917 __ movptr(rax, Address(thread, Thread::pending_exception_offset())); |
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918 __ movptr(Address(thread, Thread::pending_exception_offset()), NULL_WORD); |
0 | 919 |
920 // check that there is really a valid exception | |
921 __ verify_not_null_oop(rax); | |
922 | |
923 // load throwing pc: this is the return address of the stub | |
304 | 924 __ movptr(rdx, Address(rsp, return_off * VMRegImpl::stack_slot_size)); |
0 | 925 |
926 #ifdef ASSERT | |
927 // check that fields in JavaThread for exception oop and issuing pc are empty | |
928 Label oop_empty; | |
304 | 929 __ cmpptr(Address(thread, JavaThread::exception_oop_offset()), (int32_t)NULL_WORD); |
0 | 930 __ jcc(Assembler::equal, oop_empty); |
931 __ stop("exception oop must be empty"); | |
932 __ bind(oop_empty); | |
933 | |
934 Label pc_empty; | |
304 | 935 __ cmpptr(Address(thread, JavaThread::exception_pc_offset()), (int32_t)NULL_WORD); |
0 | 936 __ jcc(Assembler::equal, pc_empty); |
937 __ stop("exception pc must be empty"); | |
938 __ bind(pc_empty); | |
939 #endif | |
940 | |
941 // store exception oop and throwing pc to JavaThread | |
304 | 942 __ movptr(Address(thread, JavaThread::exception_oop_offset()), rax); |
943 __ movptr(Address(thread, JavaThread::exception_pc_offset()), rdx); | |
0 | 944 |
945 restore_live_registers(sasm); | |
946 | |
947 __ leave(); | |
304 | 948 __ addptr(rsp, BytesPerWord); // remove return address from stack |
0 | 949 |
950 // Forward the exception directly to deopt blob. We can blow no | |
951 // registers and must leave throwing pc on the stack. A patch may | |
952 // have values live in registers so the entry point with the | |
953 // exception in tls. | |
954 __ jump(RuntimeAddress(deopt_blob->unpack_with_exception_in_tls())); | |
955 | |
956 __ bind(L); | |
957 } | |
958 | |
959 | |
960 // Runtime will return true if the nmethod has been deoptimized during | |
961 // the patching process. In that case we must do a deopt reexecute instead. | |
962 | |
963 Label reexecuteEntry, cont; | |
964 | |
304 | 965 __ testptr(rax, rax); // have we deoptimized? |
0 | 966 __ jcc(Assembler::equal, cont); // no |
967 | |
968 // Will reexecute. Proper return address is already on the stack we just restore | |
969 // registers, pop all of our frame but the return address and jump to the deopt blob | |
970 restore_live_registers(sasm); | |
971 __ leave(); | |
972 __ jump(RuntimeAddress(deopt_blob->unpack_with_reexecution())); | |
973 | |
974 __ bind(cont); | |
975 restore_live_registers(sasm); | |
976 __ leave(); | |
977 __ ret(0); | |
978 | |
979 return oop_maps; | |
980 } | |
981 | |
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982 #ifdef GRAAL |
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983 JRT_ENTRY(void, graal_create_null_exception(JavaThread* thread)) |
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984 thread->set_vm_result(Exceptions::new_exception(thread, vmSymbols::java_lang_NullPointerException(), NULL)()); |
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985 JRT_END |
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986 |
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987 JRT_ENTRY(void, graal_create_out_of_bounds_exception(JavaThread* thread, jint index)) |
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988 char message[jintAsStringSize]; |
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989 sprintf(message, "%d", index); |
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990 thread->set_vm_result(Exceptions::new_exception(thread, vmSymbols::java_lang_ArrayIndexOutOfBoundsException(), message)()); |
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991 JRT_END |
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992 |
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993 JRT_ENTRY(void, graal_generic_callback(JavaThread* thread, oop _callback, oop _argument)) |
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994 HandleMark hm; |
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995 Handle callback(_callback); |
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996 Handle argument(_argument); |
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997 |
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998 KlassHandle klass = SystemDictionary::resolve_or_null(vmSymbols::com_oracle_max_cri_ci_CiGenericCallback(), SystemDictionary::java_system_loader(), NULL, thread); |
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999 if (klass.is_null()) { |
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1000 tty->print_cr("couldn't resolve com_oracle_max_cri_ci_CiGenericCallback"); |
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1001 } |
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1002 |
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1003 JavaValue result(T_OBJECT); |
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1004 JavaCallArguments args; |
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1005 args.push_oop(Handle(callback)); |
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1006 args.push_oop(Handle(argument)); |
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1007 JavaCalls::call_virtual(&result, klass, vmSymbols::callbackInternal_name(), vmSymbols::callback_signature(), &args, thread); |
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1008 |
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1009 thread->set_vm_result((oop) result.get_jobject()); |
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1010 JRT_END |
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1011 #endif |
0 | 1012 |
1013 OopMapSet* Runtime1::generate_code_for(StubID id, StubAssembler* sasm) { | |
1014 | |
1015 // for better readability | |
1016 const bool must_gc_arguments = true; | |
1017 const bool dont_gc_arguments = false; | |
1018 | |
1019 // default value; overwritten for some optimized stubs that are called from methods that do not use the fpu | |
1020 bool save_fpu_registers = true; | |
1021 | |
1022 // stub code & info for the different stubs | |
1023 OopMapSet* oop_maps = NULL; | |
1024 switch (id) { | |
1025 case forward_exception_id: | |
1026 { | |
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1027 oop_maps = generate_handle_exception(id, sasm); |
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1028 __ leave(); |
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1029 __ ret(0); |
0 | 1030 } |
1031 break; | |
1032 | |
1033 case new_instance_id: | |
1034 case fast_new_instance_id: | |
1035 case fast_new_instance_init_check_id: | |
1036 { | |
1037 Register klass = rdx; // Incoming | |
1038 Register obj = rax; // Result | |
1039 | |
1040 if (id == new_instance_id) { | |
1041 __ set_info("new_instance", dont_gc_arguments); | |
1042 } else if (id == fast_new_instance_id) { | |
1043 __ set_info("fast new_instance", dont_gc_arguments); | |
1044 } else { | |
1045 assert(id == fast_new_instance_init_check_id, "bad StubID"); | |
1046 __ set_info("fast new_instance init check", dont_gc_arguments); | |
1047 } | |
1048 | |
1049 if ((id == fast_new_instance_id || id == fast_new_instance_init_check_id) && | |
1050 UseTLAB && FastTLABRefill) { | |
1051 Label slow_path; | |
1052 Register obj_size = rcx; | |
1053 Register t1 = rbx; | |
1054 Register t2 = rsi; | |
1055 assert_different_registers(klass, obj, obj_size, t1, t2); | |
1056 | |
304 | 1057 __ push(rdi); |
1058 __ push(rbx); | |
0 | 1059 |
1060 if (id == fast_new_instance_init_check_id) { | |
1061 // make sure the klass is initialized | |
4771 | 1062 __ cmpb(Address(klass, instanceKlass::init_state_offset()), instanceKlass::fully_initialized); |
0 | 1063 __ jcc(Assembler::notEqual, slow_path); |
1064 } | |
1065 | |
1066 #ifdef ASSERT | |
1067 // assert object can be fast path allocated | |
1068 { | |
1069 Label ok, not_ok; | |
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1070 __ movl(obj_size, Address(klass, Klass::layout_helper_offset())); |
0 | 1071 __ cmpl(obj_size, 0); // make sure it's an instance (LH > 0) |
1072 __ jcc(Assembler::lessEqual, not_ok); | |
1073 __ testl(obj_size, Klass::_lh_instance_slow_path_bit); | |
1074 __ jcc(Assembler::zero, ok); | |
1075 __ bind(not_ok); | |
1076 __ stop("assert(can be fast path allocated)"); | |
1077 __ should_not_reach_here(); | |
1078 __ bind(ok); | |
1079 } | |
1080 #endif // ASSERT | |
1081 | |
1082 // if we got here then the TLAB allocation failed, so try | |
1083 // refilling the TLAB or allocating directly from eden. | |
1084 Label retry_tlab, try_eden; | |
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1085 const Register thread = |
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1086 __ tlab_refill(retry_tlab, try_eden, slow_path); // does not destroy rdx (klass), returns rdi |
0 | 1087 |
1088 __ bind(retry_tlab); | |
1089 | |
304 | 1090 // get the instance size (size is postive so movl is fine for 64bit) |
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1091 __ movl(obj_size, Address(klass, Klass::layout_helper_offset())); |
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1092 |
0 | 1093 __ tlab_allocate(obj, obj_size, 0, t1, t2, slow_path); |
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1094 |
0 | 1095 __ initialize_object(obj, klass, obj_size, 0, t1, t2); |
1096 __ verify_oop(obj); | |
304 | 1097 __ pop(rbx); |
1098 __ pop(rdi); | |
0 | 1099 __ ret(0); |
1100 | |
1101 __ bind(try_eden); | |
304 | 1102 // get the instance size (size is postive so movl is fine for 64bit) |
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1103 __ movl(obj_size, Address(klass, Klass::layout_helper_offset())); |
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1104 |
0 | 1105 __ eden_allocate(obj, obj_size, 0, t1, slow_path); |
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1106 __ incr_allocated_bytes(thread, obj_size, 0); |
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1107 |
0 | 1108 __ initialize_object(obj, klass, obj_size, 0, t1, t2); |
1109 __ verify_oop(obj); | |
304 | 1110 __ pop(rbx); |
1111 __ pop(rdi); | |
0 | 1112 __ ret(0); |
1113 | |
1114 __ bind(slow_path); | |
304 | 1115 __ pop(rbx); |
1116 __ pop(rdi); | |
0 | 1117 } |
1118 | |
1119 __ enter(); | |
1120 OopMap* map = save_live_registers(sasm, 2); | |
1121 int call_offset = __ call_RT(obj, noreg, CAST_FROM_FN_PTR(address, new_instance), klass); | |
1122 oop_maps = new OopMapSet(); | |
1123 oop_maps->add_gc_map(call_offset, map); | |
1124 restore_live_registers_except_rax(sasm); | |
1125 __ verify_oop(obj); | |
1126 __ leave(); | |
1127 __ ret(0); | |
1128 | |
1129 // rax,: new instance | |
1130 } | |
1131 | |
1132 break; | |
1133 | |
1134 case counter_overflow_id: | |
1135 { | |
1783 | 1136 Register bci = rax, method = rbx; |
0 | 1137 __ enter(); |
1783 | 1138 OopMap* map = save_live_registers(sasm, 3); |
0 | 1139 // Retrieve bci |
1140 __ movl(bci, Address(rbp, 2*BytesPerWord)); | |
1783 | 1141 // And a pointer to the methodOop |
1142 __ movptr(method, Address(rbp, 3*BytesPerWord)); | |
1143 int call_offset = __ call_RT(noreg, noreg, CAST_FROM_FN_PTR(address, counter_overflow), bci, method); | |
0 | 1144 oop_maps = new OopMapSet(); |
1145 oop_maps->add_gc_map(call_offset, map); | |
1146 restore_live_registers(sasm); | |
1147 __ leave(); | |
1148 __ ret(0); | |
1149 } | |
1150 break; | |
1151 | |
1152 case new_type_array_id: | |
1153 case new_object_array_id: | |
1154 { | |
1155 Register length = rbx; // Incoming | |
1156 Register klass = rdx; // Incoming | |
1157 Register obj = rax; // Result | |
1158 | |
1159 if (id == new_type_array_id) { | |
1160 __ set_info("new_type_array", dont_gc_arguments); | |
1161 } else { | |
1162 __ set_info("new_object_array", dont_gc_arguments); | |
1163 } | |
1164 | |
1165 #ifdef ASSERT | |
1166 // assert object type is really an array of the proper kind | |
1167 { | |
1168 Label ok; | |
1169 Register t0 = obj; | |
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1170 __ movl(t0, Address(klass, Klass::layout_helper_offset())); |
0 | 1171 __ sarl(t0, Klass::_lh_array_tag_shift); |
1172 int tag = ((id == new_type_array_id) | |
1173 ? Klass::_lh_array_tag_type_value | |
1174 : Klass::_lh_array_tag_obj_value); | |
1175 __ cmpl(t0, tag); | |
1176 __ jcc(Assembler::equal, ok); | |
1177 __ stop("assert(is an array klass)"); | |
1178 __ should_not_reach_here(); | |
1179 __ bind(ok); | |
1180 } | |
1181 #endif // ASSERT | |
1182 | |
1183 if (UseTLAB && FastTLABRefill) { | |
1184 Register arr_size = rsi; | |
1185 Register t1 = rcx; // must be rcx for use as shift count | |
1186 Register t2 = rdi; | |
1187 Label slow_path; | |
1188 assert_different_registers(length, klass, obj, arr_size, t1, t2); | |
1189 | |
1190 // check that array length is small enough for fast path. | |
1191 __ cmpl(length, C1_MacroAssembler::max_array_allocation_length); | |
1192 __ jcc(Assembler::above, slow_path); | |
1193 | |
1194 // if we got here then the TLAB allocation failed, so try | |
1195 // refilling the TLAB or allocating directly from eden. | |
1196 Label retry_tlab, try_eden; | |
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1197 const Register thread = |
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1198 __ tlab_refill(retry_tlab, try_eden, slow_path); // preserves rbx & rdx, returns rdi |
0 | 1199 |
1200 __ bind(retry_tlab); | |
1201 | |
1202 // get the allocation size: round_up(hdr + length << (layout_helper & 0x1F)) | |
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1203 // since size is positive movl does right thing on 64bit |
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1204 __ movl(t1, Address(klass, Klass::layout_helper_offset())); |
304 | 1205 // since size is postive movl does right thing on 64bit |
0 | 1206 __ movl(arr_size, length); |
1207 assert(t1 == rcx, "fixed register usage"); | |
304 | 1208 __ shlptr(arr_size /* by t1=rcx, mod 32 */); |
1209 __ shrptr(t1, Klass::_lh_header_size_shift); | |
1210 __ andptr(t1, Klass::_lh_header_size_mask); | |
1211 __ addptr(arr_size, t1); | |
1212 __ addptr(arr_size, MinObjAlignmentInBytesMask); // align up | |
1213 __ andptr(arr_size, ~MinObjAlignmentInBytesMask); | |
0 | 1214 |
1215 __ tlab_allocate(obj, arr_size, 0, t1, t2, slow_path); // preserves arr_size | |
1216 | |
1217 __ initialize_header(obj, klass, length, t1, t2); | |
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1218 __ movb(t1, Address(klass, in_bytes(Klass::layout_helper_offset()) + (Klass::_lh_header_size_shift / BitsPerByte))); |
0 | 1219 assert(Klass::_lh_header_size_shift % BitsPerByte == 0, "bytewise"); |
1220 assert(Klass::_lh_header_size_mask <= 0xFF, "bytewise"); | |
304 | 1221 __ andptr(t1, Klass::_lh_header_size_mask); |
1222 __ subptr(arr_size, t1); // body length | |
1223 __ addptr(t1, obj); // body start | |
0 | 1224 __ initialize_body(t1, arr_size, 0, t2); |
1225 __ verify_oop(obj); | |
1226 __ ret(0); | |
1227 | |
1228 __ bind(try_eden); | |
1229 // get the allocation size: round_up(hdr + length << (layout_helper & 0x1F)) | |
2100
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1230 // since size is positive movl does right thing on 64bit |
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1231 __ movl(t1, Address(klass, Klass::layout_helper_offset())); |
304 | 1232 // since size is postive movl does right thing on 64bit |
0 | 1233 __ movl(arr_size, length); |
1234 assert(t1 == rcx, "fixed register usage"); | |
304 | 1235 __ shlptr(arr_size /* by t1=rcx, mod 32 */); |
1236 __ shrptr(t1, Klass::_lh_header_size_shift); | |
1237 __ andptr(t1, Klass::_lh_header_size_mask); | |
1238 __ addptr(arr_size, t1); | |
1239 __ addptr(arr_size, MinObjAlignmentInBytesMask); // align up | |
1240 __ andptr(arr_size, ~MinObjAlignmentInBytesMask); | |
0 | 1241 |
1242 __ eden_allocate(obj, arr_size, 0, t1, slow_path); // preserves arr_size | |
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1243 __ incr_allocated_bytes(thread, arr_size, 0); |
0 | 1244 |
1245 __ initialize_header(obj, klass, length, t1, t2); | |
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1246 __ movb(t1, Address(klass, in_bytes(Klass::layout_helper_offset()) + (Klass::_lh_header_size_shift / BitsPerByte))); |
0 | 1247 assert(Klass::_lh_header_size_shift % BitsPerByte == 0, "bytewise"); |
1248 assert(Klass::_lh_header_size_mask <= 0xFF, "bytewise"); | |
304 | 1249 __ andptr(t1, Klass::_lh_header_size_mask); |
1250 __ subptr(arr_size, t1); // body length | |
1251 __ addptr(t1, obj); // body start | |
0 | 1252 __ initialize_body(t1, arr_size, 0, t2); |
1253 __ verify_oop(obj); | |
1254 __ ret(0); | |
1255 | |
1256 __ bind(slow_path); | |
1257 } | |
1258 | |
1259 __ enter(); | |
1260 OopMap* map = save_live_registers(sasm, 3); | |
1261 int call_offset; | |
1262 if (id == new_type_array_id) { | |
1263 call_offset = __ call_RT(obj, noreg, CAST_FROM_FN_PTR(address, new_type_array), klass, length); | |
1264 } else { | |
1265 call_offset = __ call_RT(obj, noreg, CAST_FROM_FN_PTR(address, new_object_array), klass, length); | |
1266 } | |
1267 | |
1268 oop_maps = new OopMapSet(); | |
1269 oop_maps->add_gc_map(call_offset, map); | |
1270 restore_live_registers_except_rax(sasm); | |
1271 | |
1272 __ verify_oop(obj); | |
1273 __ leave(); | |
1274 __ ret(0); | |
1275 | |
1276 // rax,: new array | |
1277 } | |
1278 break; | |
1279 | |
1280 case new_multi_array_id: | |
1281 { StubFrame f(sasm, "new_multi_array", dont_gc_arguments); | |
1282 // rax,: klass | |
1283 // rbx,: rank | |
1284 // rcx: address of 1st dimension | |
1285 OopMap* map = save_live_registers(sasm, 4); | |
1286 int call_offset = __ call_RT(rax, noreg, CAST_FROM_FN_PTR(address, new_multi_array), rax, rbx, rcx); | |
1287 | |
1288 oop_maps = new OopMapSet(); | |
1289 oop_maps->add_gc_map(call_offset, map); | |
1290 restore_live_registers_except_rax(sasm); | |
1291 | |
1292 // rax,: new multi array | |
1293 __ verify_oop(rax); | |
1294 } | |
1295 break; | |
1296 | |
1297 case register_finalizer_id: | |
1298 { | |
1299 __ set_info("register_finalizer", dont_gc_arguments); | |
1300 | |
304 | 1301 // This is called via call_runtime so the arguments |
1302 // will be place in C abi locations | |
1303 | |
1304 #ifdef _LP64 | |
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1305 #ifdef GRAAL |
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1306 __ verify_oop(j_rarg0); |
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1307 __ mov(rax, j_rarg0); |
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1308 #else |
304 | 1309 __ verify_oop(c_rarg0); |
1310 __ mov(rax, c_rarg0); | |
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1311 #endif |
304 | 1312 #else |
0 | 1313 // The object is passed on the stack and we haven't pushed a |
1314 // frame yet so it's one work away from top of stack. | |
304 | 1315 __ movptr(rax, Address(rsp, 1 * BytesPerWord)); |
0 | 1316 __ verify_oop(rax); |
304 | 1317 #endif // _LP64 |
0 | 1318 |
1319 // load the klass and check the has finalizer flag | |
1320 Label register_finalizer; | |
1321 Register t = rsi; | |
2002 | 1322 __ load_klass(t, rax); |
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1323 __ movl(t, Address(t, Klass::access_flags_offset())); |
0 | 1324 __ testl(t, JVM_ACC_HAS_FINALIZER); |
1325 __ jcc(Assembler::notZero, register_finalizer); | |
1326 __ ret(0); | |
1327 | |
1328 __ bind(register_finalizer); | |
1329 __ enter(); | |
1330 OopMap* oop_map = save_live_registers(sasm, 2 /*num_rt_args */); | |
1331 int call_offset = __ call_RT(noreg, noreg, | |
1332 CAST_FROM_FN_PTR(address, SharedRuntime::register_finalizer), rax); | |
1333 oop_maps = new OopMapSet(); | |
1334 oop_maps->add_gc_map(call_offset, oop_map); | |
1335 | |
1336 // Now restore all the live registers | |
1337 restore_live_registers(sasm); | |
1338 | |
1339 __ leave(); | |
1340 __ ret(0); | |
1341 } | |
1342 break; | |
1343 | |
1344 case throw_range_check_failed_id: | |
1345 { StubFrame f(sasm, "range_check_failed", dont_gc_arguments); | |
1346 oop_maps = generate_exception_throw(sasm, CAST_FROM_FN_PTR(address, throw_range_check_exception), true); | |
1347 } | |
1348 break; | |
1349 | |
1350 case throw_index_exception_id: | |
1351 { StubFrame f(sasm, "index_range_check_failed", dont_gc_arguments); | |
1352 oop_maps = generate_exception_throw(sasm, CAST_FROM_FN_PTR(address, throw_index_exception), true); | |
1353 } | |
1354 break; | |
1355 | |
1356 case throw_div0_exception_id: | |
1357 { StubFrame f(sasm, "throw_div0_exception", dont_gc_arguments); | |
1358 oop_maps = generate_exception_throw(sasm, CAST_FROM_FN_PTR(address, throw_div0_exception), false); | |
1359 } | |
1360 break; | |
1361 | |
1362 case throw_null_pointer_exception_id: | |
1363 { StubFrame f(sasm, "throw_null_pointer_exception", dont_gc_arguments); | |
1364 oop_maps = generate_exception_throw(sasm, CAST_FROM_FN_PTR(address, throw_null_pointer_exception), false); | |
1365 } | |
1366 break; | |
1367 | |
1368 case handle_exception_nofpu_id: | |
1369 case handle_exception_id: | |
1370 { StubFrame f(sasm, "handle_exception", dont_gc_arguments); | |
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1371 oop_maps = generate_handle_exception(id, sasm); |
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1372 } |
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1373 break; |
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1374 |
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1375 case handle_exception_from_callee_id: |
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1376 { StubFrame f(sasm, "handle_exception_from_callee", dont_gc_arguments); |
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1377 oop_maps = generate_handle_exception(id, sasm); |
0 | 1378 } |
1379 break; | |
1380 | |
1381 case unwind_exception_id: | |
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1382 { __ set_info("unwind_exception", dont_gc_arguments); |
0 | 1383 // note: no stubframe since we are about to leave the current |
1384 // activation and we are calling a leaf VM function only. | |
1385 generate_unwind_exception(sasm); | |
1386 } | |
1387 break; | |
1388 | |
1389 case throw_array_store_exception_id: | |
1390 { StubFrame f(sasm, "throw_array_store_exception", dont_gc_arguments); | |
1391 // tos + 0: link | |
1392 // + 1: return address | |
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1393 oop_maps = generate_exception_throw(sasm, CAST_FROM_FN_PTR(address, throw_array_store_exception), true); |
0 | 1394 } |
1395 break; | |
1396 | |
1397 case throw_class_cast_exception_id: | |
1398 { StubFrame f(sasm, "throw_class_cast_exception", dont_gc_arguments); | |
1399 oop_maps = generate_exception_throw(sasm, CAST_FROM_FN_PTR(address, throw_class_cast_exception), true); | |
1400 } | |
1401 break; | |
1402 | |
1403 case throw_incompatible_class_change_error_id: | |
1404 { StubFrame f(sasm, "throw_incompatible_class_cast_exception", dont_gc_arguments); | |
1405 oop_maps = generate_exception_throw(sasm, CAST_FROM_FN_PTR(address, throw_incompatible_class_change_error), false); | |
1406 } | |
1407 break; | |
1408 | |
1409 case slow_subtype_check_id: | |
1410 { | |
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1411 // Typical calling sequence: |
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1412 // __ push(klass_RInfo); // object klass or other subclass |
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1413 // __ push(sup_k_RInfo); // array element klass or other superclass |
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1414 // __ call(slow_subtype_check); |
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1415 // Note that the subclass is pushed first, and is therefore deepest. |
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1416 // Previous versions of this code reversed the names 'sub' and 'super'. |
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1417 // This was operationally harmless but made the code unreadable. |
0 | 1418 enum layout { |
304 | 1419 rax_off, SLOT2(raxH_off) |
1420 rcx_off, SLOT2(rcxH_off) | |
1421 rsi_off, SLOT2(rsiH_off) | |
1422 rdi_off, SLOT2(rdiH_off) | |
1423 // saved_rbp_off, SLOT2(saved_rbpH_off) | |
1424 return_off, SLOT2(returnH_off) | |
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1425 sup_k_off, SLOT2(sup_kH_off) |
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1426 klass_off, SLOT2(superH_off) |
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1427 framesize, |
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1428 result_off = klass_off // deepest argument is also the return value |
0 | 1429 }; |
1430 | |
1431 __ set_info("slow_subtype_check", dont_gc_arguments); | |
304 | 1432 __ push(rdi); |
1433 __ push(rsi); | |
1434 __ push(rcx); | |
1435 __ push(rax); | |
0 | 1436 |
304 | 1437 // This is called by pushing args and not with C abi |
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1438 __ movptr(rsi, Address(rsp, (klass_off) * VMRegImpl::stack_slot_size)); // subclass |
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1439 __ movptr(rax, Address(rsp, (sup_k_off) * VMRegImpl::stack_slot_size)); // superclass |
0 | 1440 |
1441 Label miss; | |
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1442 #ifdef GRAAL |
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1443 Label success; |
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1444 __ check_klass_subtype_fast_path(rsi, rax, rcx, &success, &miss, NULL); |
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1445 #endif |
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1446 |
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1447 __ check_klass_subtype_slow_path(rsi, rax, rcx, rdi, NULL, &miss); |
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1448 |
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1449 // fallthrough on success: |
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1450 #ifdef GRAAL |
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1451 __ bind(success); |
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1452 #endif |
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1453 __ movptr(Address(rsp, (result_off) * VMRegImpl::stack_slot_size), 1); // result |
304 | 1454 __ pop(rax); |
1455 __ pop(rcx); | |
1456 __ pop(rsi); | |
1457 __ pop(rdi); | |
0 | 1458 __ ret(0); |
1459 | |
1460 __ bind(miss); | |
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1461 __ movptr(Address(rsp, (result_off) * VMRegImpl::stack_slot_size), NULL_WORD); // result |
304 | 1462 __ pop(rax); |
1463 __ pop(rcx); | |
1464 __ pop(rsi); | |
1465 __ pop(rdi); | |
0 | 1466 __ ret(0); |
1467 } | |
1468 break; | |
1469 | |
1470 case monitorenter_nofpu_id: | |
1471 save_fpu_registers = false; | |
1472 // fall through | |
1473 case monitorenter_id: | |
1474 { | |
1475 StubFrame f(sasm, "monitorenter", dont_gc_arguments); | |
1476 OopMap* map = save_live_registers(sasm, 3, save_fpu_registers); | |
1477 | |
304 | 1478 // Called with store_parameter and not C abi |
1479 | |
0 | 1480 f.load_argument(1, rax); // rax,: object |
1481 f.load_argument(0, rbx); // rbx,: lock address | |
1482 | |
1483 int call_offset = __ call_RT(noreg, noreg, CAST_FROM_FN_PTR(address, monitorenter), rax, rbx); | |
1484 | |
1485 oop_maps = new OopMapSet(); | |
1486 oop_maps->add_gc_map(call_offset, map); | |
1487 restore_live_registers(sasm, save_fpu_registers); | |
1488 } | |
1489 break; | |
1490 | |
1491 case monitorexit_nofpu_id: | |
1492 save_fpu_registers = false; | |
1493 // fall through | |
1494 case monitorexit_id: | |
1495 { | |
1496 StubFrame f(sasm, "monitorexit", dont_gc_arguments); | |
1497 OopMap* map = save_live_registers(sasm, 2, save_fpu_registers); | |
1498 | |
304 | 1499 // Called with store_parameter and not C abi |
1500 | |
0 | 1501 f.load_argument(0, rax); // rax,: lock address |
1502 | |
1503 // note: really a leaf routine but must setup last java sp | |
1504 // => use call_RT for now (speed can be improved by | |
1505 // doing last java sp setup manually) | |
1506 int call_offset = __ call_RT(noreg, noreg, CAST_FROM_FN_PTR(address, monitorexit), rax); | |
1507 | |
1508 oop_maps = new OopMapSet(); | |
1509 oop_maps->add_gc_map(call_offset, map); | |
1510 restore_live_registers(sasm, save_fpu_registers); | |
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|
1511 } |
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|
1512 break; |
0 | 1513 |
4048
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1514 case deoptimize_id: |
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|
1515 { |
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|
1516 StubFrame f(sasm, "deoptimize", dont_gc_arguments); |
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|
1517 const int num_rt_args = 1; // thread |
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1518 OopMap* oop_map = save_live_registers(sasm, num_rt_args); |
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1519 int call_offset = __ call_RT(noreg, noreg, CAST_FROM_FN_PTR(address, deoptimize)); |
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1520 oop_maps = new OopMapSet(); |
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1521 oop_maps->add_gc_map(call_offset, oop_map); |
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1522 restore_live_registers(sasm); |
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1523 DeoptimizationBlob* deopt_blob = SharedRuntime::deopt_blob(); |
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1524 assert(deopt_blob != NULL, "deoptimization blob must have been created"); |
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1525 __ leave(); |
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1526 __ jump(RuntimeAddress(deopt_blob->unpack_with_reexecution())); |
0 | 1527 } |
1528 break; | |
1529 | |
1530 case access_field_patching_id: | |
1531 { StubFrame f(sasm, "access_field_patching", dont_gc_arguments); | |
1532 // we should set up register map | |
1533 oop_maps = generate_patching(sasm, CAST_FROM_FN_PTR(address, access_field_patching)); | |
1534 } | |
1535 break; | |
1536 | |
1537 case load_klass_patching_id: | |
1538 { StubFrame f(sasm, "load_klass_patching", dont_gc_arguments); | |
1539 // we should set up register map | |
1540 oop_maps = generate_patching(sasm, CAST_FROM_FN_PTR(address, move_klass_patching)); | |
1541 } | |
1542 break; | |
1543 | |
1544 case dtrace_object_alloc_id: | |
1545 { // rax,: object | |
1546 StubFrame f(sasm, "dtrace_object_alloc", dont_gc_arguments); | |
1547 // we can't gc here so skip the oopmap but make sure that all | |
1548 // the live registers get saved. | |
1549 save_live_registers(sasm, 1); | |
1550 | |
304 | 1551 __ NOT_LP64(push(rax)) LP64_ONLY(mov(c_rarg0, rax)); |
0 | 1552 __ call(RuntimeAddress(CAST_FROM_FN_PTR(address, SharedRuntime::dtrace_object_alloc))); |
304 | 1553 NOT_LP64(__ pop(rax)); |
0 | 1554 |
1555 restore_live_registers(sasm); | |
1556 } | |
1557 break; | |
1558 | |
1559 case fpu2long_stub_id: | |
1560 { | |
1561 // rax, and rdx are destroyed, but should be free since the result is returned there | |
1562 // preserve rsi,ecx | |
304 | 1563 __ push(rsi); |
1564 __ push(rcx); | |
1565 LP64_ONLY(__ push(rdx);) | |
0 | 1566 |
1567 // check for NaN | |
1568 Label return0, do_return, return_min_jlong, do_convert; | |
1569 | |
304 | 1570 Address value_high_word(rsp, wordSize + 4); |
1571 Address value_low_word(rsp, wordSize); | |
1572 Address result_high_word(rsp, 3*wordSize + 4); | |
1573 Address result_low_word(rsp, 3*wordSize); | |
0 | 1574 |
304 | 1575 __ subptr(rsp, 32); // more than enough on 32bit |
0 | 1576 __ fst_d(value_low_word); |
1577 __ movl(rax, value_high_word); | |
1578 __ andl(rax, 0x7ff00000); | |
1579 __ cmpl(rax, 0x7ff00000); | |
1580 __ jcc(Assembler::notEqual, do_convert); | |
1581 __ movl(rax, value_high_word); | |
1582 __ andl(rax, 0xfffff); | |
1583 __ orl(rax, value_low_word); | |
1584 __ jcc(Assembler::notZero, return0); | |
1585 | |
1586 __ bind(do_convert); | |
1587 __ fnstcw(Address(rsp, 0)); | |
304 | 1588 __ movzwl(rax, Address(rsp, 0)); |
0 | 1589 __ orl(rax, 0xc00); |
1590 __ movw(Address(rsp, 2), rax); | |
1591 __ fldcw(Address(rsp, 2)); | |
1592 __ fwait(); | |
1593 __ fistp_d(result_low_word); | |
1594 __ fldcw(Address(rsp, 0)); | |
1595 __ fwait(); | |
304 | 1596 // This gets the entire long in rax on 64bit |
1597 __ movptr(rax, result_low_word); | |
1598 // testing of high bits | |
0 | 1599 __ movl(rdx, result_high_word); |
304 | 1600 __ mov(rcx, rax); |
0 | 1601 // What the heck is the point of the next instruction??? |
1602 __ xorl(rcx, 0x0); | |
1603 __ movl(rsi, 0x80000000); | |
1604 __ xorl(rsi, rdx); | |
1605 __ orl(rcx, rsi); | |
1606 __ jcc(Assembler::notEqual, do_return); | |
1607 __ fldz(); | |
1608 __ fcomp_d(value_low_word); | |
1609 __ fnstsw_ax(); | |
304 | 1610 #ifdef _LP64 |
1611 __ testl(rax, 0x4100); // ZF & CF == 0 | |
1612 __ jcc(Assembler::equal, return_min_jlong); | |
1613 #else | |
0 | 1614 __ sahf(); |
1615 __ jcc(Assembler::above, return_min_jlong); | |
304 | 1616 #endif // _LP64 |
0 | 1617 // return max_jlong |
304 | 1618 #ifndef _LP64 |
0 | 1619 __ movl(rdx, 0x7fffffff); |
1620 __ movl(rax, 0xffffffff); | |
304 | 1621 #else |
1622 __ mov64(rax, CONST64(0x7fffffffffffffff)); | |
1623 #endif // _LP64 | |
0 | 1624 __ jmp(do_return); |
1625 | |
1626 __ bind(return_min_jlong); | |
304 | 1627 #ifndef _LP64 |
0 | 1628 __ movl(rdx, 0x80000000); |
1629 __ xorl(rax, rax); | |
304 | 1630 #else |
1631 __ mov64(rax, CONST64(0x8000000000000000)); | |
1632 #endif // _LP64 | |
0 | 1633 __ jmp(do_return); |
1634 | |
1635 __ bind(return0); | |
1636 __ fpop(); | |
304 | 1637 #ifndef _LP64 |
1638 __ xorptr(rdx,rdx); | |
1639 __ xorptr(rax,rax); | |
1640 #else | |
1641 __ xorptr(rax, rax); | |
1642 #endif // _LP64 | |
0 | 1643 |
1644 __ bind(do_return); | |
304 | 1645 __ addptr(rsp, 32); |
1646 LP64_ONLY(__ pop(rdx);) | |
1647 __ pop(rcx); | |
1648 __ pop(rsi); | |
0 | 1649 __ ret(0); |
1650 } | |
1651 break; | |
1652 | |
342 | 1653 #ifndef SERIALGC |
1654 case g1_pre_barrier_slow_id: | |
1655 { | |
1656 StubFrame f(sasm, "g1_pre_barrier", dont_gc_arguments); | |
1657 // arg0 : previous value of memory | |
1658 | |
1659 BarrierSet* bs = Universe::heap()->barrier_set(); | |
1660 if (bs->kind() != BarrierSet::G1SATBCTLogging) { | |
362 | 1661 __ movptr(rax, (int)id); |
342 | 1662 __ call_RT(noreg, noreg, CAST_FROM_FN_PTR(address, unimplemented_entry), rax); |
1663 __ should_not_reach_here(); | |
1664 break; | |
1665 } | |
362 | 1666 __ push(rax); |
1667 __ push(rdx); | |
342 | 1668 |
1669 const Register pre_val = rax; | |
362 | 1670 const Register thread = NOT_LP64(rax) LP64_ONLY(r15_thread); |
342 | 1671 const Register tmp = rdx; |
1672 | |
362 | 1673 NOT_LP64(__ get_thread(thread);) |
342 | 1674 |
1675 Address in_progress(thread, in_bytes(JavaThread::satb_mark_queue_offset() + | |
1676 PtrQueue::byte_offset_of_active())); | |
1677 | |
1678 Address queue_index(thread, in_bytes(JavaThread::satb_mark_queue_offset() + | |
1679 PtrQueue::byte_offset_of_index())); | |
1680 Address buffer(thread, in_bytes(JavaThread::satb_mark_queue_offset() + | |
1681 PtrQueue::byte_offset_of_buf())); | |
1682 | |
1683 | |
1684 Label done; | |
1685 Label runtime; | |
1686 | |
1687 // Can we store original value in the thread's buffer? | |
1688 | |
362 | 1689 #ifdef _LP64 |
1572 | 1690 __ movslq(tmp, queue_index); |
362 | 1691 __ cmpq(tmp, 0); |
1692 #else | |
342 | 1693 __ cmpl(queue_index, 0); |
362 | 1694 #endif |
342 | 1695 __ jcc(Assembler::equal, runtime); |
362 | 1696 #ifdef _LP64 |
1697 __ subq(tmp, wordSize); | |
1698 __ movl(queue_index, tmp); | |
1699 __ addq(tmp, buffer); | |
1700 #else | |
342 | 1701 __ subl(queue_index, wordSize); |
1702 __ movl(tmp, buffer); | |
1703 __ addl(tmp, queue_index); | |
362 | 1704 #endif |
1705 | |
342 | 1706 // prev_val (rax) |
1707 f.load_argument(0, pre_val); | |
362 | 1708 __ movptr(Address(tmp, 0), pre_val); |
342 | 1709 __ jmp(done); |
1710 | |
1711 __ bind(runtime); | |
1572 | 1712 __ push(rcx); |
1713 #ifdef _LP64 | |
1714 __ push(r8); | |
1715 __ push(r9); | |
1716 __ push(r10); | |
1717 __ push(r11); | |
1718 # ifndef _WIN64 | |
1719 __ push(rdi); | |
1720 __ push(rsi); | |
1721 # endif | |
1722 #endif | |
342 | 1723 // load the pre-value |
1724 f.load_argument(0, rcx); | |
1725 __ call_VM_leaf(CAST_FROM_FN_PTR(address, SharedRuntime::g1_wb_pre), rcx, thread); | |
1572 | 1726 #ifdef _LP64 |
1727 # ifndef _WIN64 | |
1728 __ pop(rsi); | |
1729 __ pop(rdi); | |
1730 # endif | |
1731 __ pop(r11); | |
1732 __ pop(r10); | |
1733 __ pop(r9); | |
1734 __ pop(r8); | |
1735 #endif | |
362 | 1736 __ pop(rcx); |
1572 | 1737 __ bind(done); |
342 | 1738 |
362 | 1739 __ pop(rdx); |
1740 __ pop(rax); | |
342 | 1741 } |
1742 break; | |
1743 | |
1744 case g1_post_barrier_slow_id: | |
1745 { | |
1746 StubFrame f(sasm, "g1_post_barrier", dont_gc_arguments); | |
1747 | |
1748 | |
1749 // arg0: store_address | |
1750 Address store_addr(rbp, 2*BytesPerWord); | |
1751 | |
1752 BarrierSet* bs = Universe::heap()->barrier_set(); | |
1753 CardTableModRefBS* ct = (CardTableModRefBS*)bs; | |
1754 Label done; | |
1755 Label runtime; | |
1756 | |
1757 // At this point we know new_value is non-NULL and the new_value crosses regsion. | |
1758 // Must check to see if card is already dirty | |
1759 | |
362 | 1760 const Register thread = NOT_LP64(rax) LP64_ONLY(r15_thread); |
342 | 1761 |
1762 Address queue_index(thread, in_bytes(JavaThread::dirty_card_queue_offset() + | |
1763 PtrQueue::byte_offset_of_index())); | |
1764 Address buffer(thread, in_bytes(JavaThread::dirty_card_queue_offset() + | |
1765 PtrQueue::byte_offset_of_buf())); | |
1766 | |
362 | 1767 __ push(rax); |
1572 | 1768 __ push(rcx); |
342 | 1769 |
362 | 1770 NOT_LP64(__ get_thread(thread);) |
1771 ExternalAddress cardtable((address)ct->byte_map_base); | |
342 | 1772 assert(sizeof(*ct->byte_map_base) == sizeof(jbyte), "adjust this code"); |
1773 | |
1572 | 1774 const Register card_addr = rcx; |
362 | 1775 #ifdef _LP64 |
1776 const Register tmp = rscratch1; | |
1777 f.load_argument(0, card_addr); | |
1778 __ shrq(card_addr, CardTableModRefBS::card_shift); | |
1779 __ lea(tmp, cardtable); | |
1780 // get the address of the card | |
1781 __ addq(card_addr, tmp); | |
1782 #else | |
1572 | 1783 const Register card_index = rcx; |
362 | 1784 f.load_argument(0, card_index); |
1785 __ shrl(card_index, CardTableModRefBS::card_shift); | |
1786 | |
342 | 1787 Address index(noreg, card_index, Address::times_1); |
1788 __ leal(card_addr, __ as_Address(ArrayAddress(cardtable, index))); | |
362 | 1789 #endif |
1790 | |
342 | 1791 __ cmpb(Address(card_addr, 0), 0); |
1792 __ jcc(Assembler::equal, done); | |
1793 | |
1794 // storing region crossing non-NULL, card is clean. | |
1795 // dirty card and log. | |
1796 | |
1797 __ movb(Address(card_addr, 0), 0); | |
1798 | |
1799 __ cmpl(queue_index, 0); | |
1800 __ jcc(Assembler::equal, runtime); | |
1801 __ subl(queue_index, wordSize); | |
1802 | |
1803 const Register buffer_addr = rbx; | |
362 | 1804 __ push(rbx); |
1805 | |
1806 __ movptr(buffer_addr, buffer); | |
342 | 1807 |
362 | 1808 #ifdef _LP64 |
1809 __ movslq(rscratch1, queue_index); | |
1810 __ addptr(buffer_addr, rscratch1); | |
1811 #else | |
1812 __ addptr(buffer_addr, queue_index); | |
1813 #endif | |
1814 __ movptr(Address(buffer_addr, 0), card_addr); | |
1815 | |
1816 __ pop(rbx); | |
342 | 1817 __ jmp(done); |
1818 | |
1819 __ bind(runtime); | |
1572 | 1820 __ push(rdx); |
1821 #ifdef _LP64 | |
1822 __ push(r8); | |
1823 __ push(r9); | |
1824 __ push(r10); | |
1825 __ push(r11); | |
1826 # ifndef _WIN64 | |
1827 __ push(rdi); | |
1828 __ push(rsi); | |
1829 # endif | |
1830 #endif | |
342 | 1831 __ call_VM_leaf(CAST_FROM_FN_PTR(address, SharedRuntime::g1_wb_post), card_addr, thread); |
1572 | 1832 #ifdef _LP64 |
1833 # ifndef _WIN64 | |
1834 __ pop(rsi); | |
1835 __ pop(rdi); | |
1836 # endif | |
1837 __ pop(r11); | |
1838 __ pop(r10); | |
1839 __ pop(r9); | |
1840 __ pop(r8); | |
1841 #endif | |
1842 __ pop(rdx); | |
1843 __ bind(done); | |
342 | 1844 |
1572 | 1845 __ pop(rcx); |
362 | 1846 __ pop(rax); |
342 | 1847 |
1848 } | |
1849 break; | |
1850 #endif // !SERIALGC | |
4976
8f01f899bccd
More GRAAL #ifdef; ignore graal directory on windows for client/server configuration.
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1851 #ifdef GRAAL |
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1852 case graal_unwind_exception_call_id: { |
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1853 // remove the frame from the stack |
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1854 __ movptr(rsp, rbp); |
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1855 __ pop(rbp); |
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1856 // exception_oop is passed using ordinary java calling conventions |
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1857 __ movptr(rax, j_rarg0); |
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1858 |
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1859 Label nonNullExceptionOop; |
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1860 __ testptr(rax, rax); |
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1861 __ jcc(Assembler::notZero, nonNullExceptionOop); |
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1862 { |
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1863 __ enter(); |
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1864 oop_maps = new OopMapSet(); |
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1865 OopMap* oop_map = save_live_registers(sasm, 0); |
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1866 int call_offset = __ call_RT(rax, noreg, (address)graal_create_null_exception, 0); |
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1867 oop_maps->add_gc_map(call_offset, oop_map); |
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1868 __ leave(); |
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1869 } |
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1870 __ bind(nonNullExceptionOop); |
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1871 |
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1872 __ set_info("unwind_exception", dont_gc_arguments); |
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1873 // note: no stubframe since we are about to leave the current |
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1874 // activation and we are calling a leaf VM function only. |
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1875 generate_unwind_exception(sasm); |
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1876 __ should_not_reach_here(); |
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1877 break; |
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diff
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1878 } |
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1879 |
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bc95d122df79
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|
1880 case graal_set_deopt_info_id: { |
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added runtime call to supply info upon deoptimization
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1881 __ movptr(Address(r15_thread, JavaThread::graal_deopt_info_offset()), rscratch1); |
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1882 __ ret(0); |
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1883 break; |
bc95d122df79
added runtime call to supply info upon deoptimization
Lukas Stadler <lukas.stadler@jku.at>
parents:
3538
diff
changeset
|
1884 } |
bc95d122df79
added runtime call to supply info upon deoptimization
Lukas Stadler <lukas.stadler@jku.at>
parents:
3538
diff
changeset
|
1885 |
3538
e4616e3d207b
support for new CiRuntimeCalls CreateNullPointerException and CreateOutOfBoundsException
Lukas Stadler <lukas.stadler@jku.at>
parents:
3509
diff
changeset
|
1886 case graal_create_null_pointer_exception_id: { |
e4616e3d207b
support for new CiRuntimeCalls CreateNullPointerException and CreateOutOfBoundsException
Lukas Stadler <lukas.stadler@jku.at>
parents:
3509
diff
changeset
|
1887 __ enter(); |
e4616e3d207b
support for new CiRuntimeCalls CreateNullPointerException and CreateOutOfBoundsException
Lukas Stadler <lukas.stadler@jku.at>
parents:
3509
diff
changeset
|
1888 oop_maps = new OopMapSet(); |
e4616e3d207b
support for new CiRuntimeCalls CreateNullPointerException and CreateOutOfBoundsException
Lukas Stadler <lukas.stadler@jku.at>
parents:
3509
diff
changeset
|
1889 OopMap* oop_map = save_live_registers(sasm, 0); |
e4616e3d207b
support for new CiRuntimeCalls CreateNullPointerException and CreateOutOfBoundsException
Lukas Stadler <lukas.stadler@jku.at>
parents:
3509
diff
changeset
|
1890 int call_offset = __ call_RT(rax, noreg, (address)graal_create_null_exception, 0); |
e4616e3d207b
support for new CiRuntimeCalls CreateNullPointerException and CreateOutOfBoundsException
Lukas Stadler <lukas.stadler@jku.at>
parents:
3509
diff
changeset
|
1891 oop_maps->add_gc_map(call_offset, oop_map); |
e4616e3d207b
support for new CiRuntimeCalls CreateNullPointerException and CreateOutOfBoundsException
Lukas Stadler <lukas.stadler@jku.at>
parents:
3509
diff
changeset
|
1892 __ leave(); |
e4616e3d207b
support for new CiRuntimeCalls CreateNullPointerException and CreateOutOfBoundsException
Lukas Stadler <lukas.stadler@jku.at>
parents:
3509
diff
changeset
|
1893 __ ret(0); |
e4616e3d207b
support for new CiRuntimeCalls CreateNullPointerException and CreateOutOfBoundsException
Lukas Stadler <lukas.stadler@jku.at>
parents:
3509
diff
changeset
|
1894 break; |
e4616e3d207b
support for new CiRuntimeCalls CreateNullPointerException and CreateOutOfBoundsException
Lukas Stadler <lukas.stadler@jku.at>
parents:
3509
diff
changeset
|
1895 } |
e4616e3d207b
support for new CiRuntimeCalls CreateNullPointerException and CreateOutOfBoundsException
Lukas Stadler <lukas.stadler@jku.at>
parents:
3509
diff
changeset
|
1896 |
e4616e3d207b
support for new CiRuntimeCalls CreateNullPointerException and CreateOutOfBoundsException
Lukas Stadler <lukas.stadler@jku.at>
parents:
3509
diff
changeset
|
1897 case graal_create_out_of_bounds_exception_id: { |
e4616e3d207b
support for new CiRuntimeCalls CreateNullPointerException and CreateOutOfBoundsException
Lukas Stadler <lukas.stadler@jku.at>
parents:
3509
diff
changeset
|
1898 __ enter(); |
e4616e3d207b
support for new CiRuntimeCalls CreateNullPointerException and CreateOutOfBoundsException
Lukas Stadler <lukas.stadler@jku.at>
parents:
3509
diff
changeset
|
1899 oop_maps = new OopMapSet(); |
e4616e3d207b
support for new CiRuntimeCalls CreateNullPointerException and CreateOutOfBoundsException
Lukas Stadler <lukas.stadler@jku.at>
parents:
3509
diff
changeset
|
1900 OopMap* oop_map = save_live_registers(sasm, 0); |
e4616e3d207b
support for new CiRuntimeCalls CreateNullPointerException and CreateOutOfBoundsException
Lukas Stadler <lukas.stadler@jku.at>
parents:
3509
diff
changeset
|
1901 int call_offset = __ call_RT(rax, noreg, (address)graal_create_out_of_bounds_exception, c_rarg0); |
e4616e3d207b
support for new CiRuntimeCalls CreateNullPointerException and CreateOutOfBoundsException
Lukas Stadler <lukas.stadler@jku.at>
parents:
3509
diff
changeset
|
1902 oop_maps->add_gc_map(call_offset, oop_map); |
e4616e3d207b
support for new CiRuntimeCalls CreateNullPointerException and CreateOutOfBoundsException
Lukas Stadler <lukas.stadler@jku.at>
parents:
3509
diff
changeset
|
1903 __ leave(); |
e4616e3d207b
support for new CiRuntimeCalls CreateNullPointerException and CreateOutOfBoundsException
Lukas Stadler <lukas.stadler@jku.at>
parents:
3509
diff
changeset
|
1904 __ ret(0); |
e4616e3d207b
support for new CiRuntimeCalls CreateNullPointerException and CreateOutOfBoundsException
Lukas Stadler <lukas.stadler@jku.at>
parents:
3509
diff
changeset
|
1905 break; |
e4616e3d207b
support for new CiRuntimeCalls CreateNullPointerException and CreateOutOfBoundsException
Lukas Stadler <lukas.stadler@jku.at>
parents:
3509
diff
changeset
|
1906 } |
e4616e3d207b
support for new CiRuntimeCalls CreateNullPointerException and CreateOutOfBoundsException
Lukas Stadler <lukas.stadler@jku.at>
parents:
3509
diff
changeset
|
1907 |
3682
6c04a4f268e5
implement generic callback mechanism (CiGenericCallback)
Lukas Stadler <lukas.stadler@jku.at>
parents:
3558
diff
changeset
|
1908 case graal_generic_callback_id: { |
6c04a4f268e5
implement generic callback mechanism (CiGenericCallback)
Lukas Stadler <lukas.stadler@jku.at>
parents:
3558
diff
changeset
|
1909 __ enter(); |
6c04a4f268e5
implement generic callback mechanism (CiGenericCallback)
Lukas Stadler <lukas.stadler@jku.at>
parents:
3558
diff
changeset
|
1910 oop_maps = new OopMapSet(); |
6c04a4f268e5
implement generic callback mechanism (CiGenericCallback)
Lukas Stadler <lukas.stadler@jku.at>
parents:
3558
diff
changeset
|
1911 OopMap* oop_map = save_live_registers(sasm, 0); |
6c04a4f268e5
implement generic callback mechanism (CiGenericCallback)
Lukas Stadler <lukas.stadler@jku.at>
parents:
3558
diff
changeset
|
1912 int call_offset = __ call_RT(rax, noreg, (address)graal_generic_callback, j_rarg0, j_rarg1); |
6c04a4f268e5
implement generic callback mechanism (CiGenericCallback)
Lukas Stadler <lukas.stadler@jku.at>
parents:
3558
diff
changeset
|
1913 oop_maps->add_gc_map(call_offset, oop_map); |
6c04a4f268e5
implement generic callback mechanism (CiGenericCallback)
Lukas Stadler <lukas.stadler@jku.at>
parents:
3558
diff
changeset
|
1914 __ leave(); |
6c04a4f268e5
implement generic callback mechanism (CiGenericCallback)
Lukas Stadler <lukas.stadler@jku.at>
parents:
3558
diff
changeset
|
1915 __ ret(0); |
6c04a4f268e5
implement generic callback mechanism (CiGenericCallback)
Lukas Stadler <lukas.stadler@jku.at>
parents:
3558
diff
changeset
|
1916 break; |
6c04a4f268e5
implement generic callback mechanism (CiGenericCallback)
Lukas Stadler <lukas.stadler@jku.at>
parents:
3558
diff
changeset
|
1917 } |
6c04a4f268e5
implement generic callback mechanism (CiGenericCallback)
Lukas Stadler <lukas.stadler@jku.at>
parents:
3558
diff
changeset
|
1918 |
2891
75a99b4f1c98
Rebranded C++ part from C1X to Graal.
Thomas Wuerthinger <thomas@wuerthinger.net>
parents:
2662
diff
changeset
|
1919 case graal_slow_subtype_check_id: { |
1434
72cfb36c6bb2
* enabled all jtt tests
Lukas Stadler <lukas.stadler@oracle.com>
parents:
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diff
changeset
|
1920 Label success; |
72cfb36c6bb2
* enabled all jtt tests
Lukas Stadler <lukas.stadler@oracle.com>
parents:
1429
diff
changeset
|
1921 Label miss; |
72cfb36c6bb2
* enabled all jtt tests
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parents:
1429
diff
changeset
|
1922 |
72cfb36c6bb2
* enabled all jtt tests
Lukas Stadler <lukas.stadler@oracle.com>
parents:
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diff
changeset
|
1923 // TODO this should really be within the XirSnippets |
72cfb36c6bb2
* enabled all jtt tests
Lukas Stadler <lukas.stadler@oracle.com>
parents:
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diff
changeset
|
1924 __ check_klass_subtype_fast_path(j_rarg0, j_rarg1, j_rarg2, &success, &miss, NULL); |
72cfb36c6bb2
* enabled all jtt tests
Lukas Stadler <lukas.stadler@oracle.com>
parents:
1429
diff
changeset
|
1925 __ check_klass_subtype_slow_path(j_rarg0, j_rarg1, j_rarg2, j_rarg3, NULL, &miss); |
72cfb36c6bb2
* enabled all jtt tests
Lukas Stadler <lukas.stadler@oracle.com>
parents:
1429
diff
changeset
|
1926 |
72cfb36c6bb2
* enabled all jtt tests
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parents:
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diff
changeset
|
1927 // fallthrough on success: |
72cfb36c6bb2
* enabled all jtt tests
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parents:
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diff
changeset
|
1928 __ bind(success); |
72cfb36c6bb2
* enabled all jtt tests
Lukas Stadler <lukas.stadler@oracle.com>
parents:
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diff
changeset
|
1929 __ movptr(rax, 1); |
72cfb36c6bb2
* enabled all jtt tests
Lukas Stadler <lukas.stadler@oracle.com>
parents:
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changeset
|
1930 __ ret(0); |
72cfb36c6bb2
* enabled all jtt tests
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parents:
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diff
changeset
|
1931 |
72cfb36c6bb2
* enabled all jtt tests
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parents:
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changeset
|
1932 __ bind(miss); |
72cfb36c6bb2
* enabled all jtt tests
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parents:
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changeset
|
1933 __ movptr(rax, NULL_WORD); |
72cfb36c6bb2
* enabled all jtt tests
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parents:
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diff
changeset
|
1934 __ ret(0); |
72cfb36c6bb2
* enabled all jtt tests
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parents:
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diff
changeset
|
1935 break; |
72cfb36c6bb2
* enabled all jtt tests
Lukas Stadler <lukas.stadler@oracle.com>
parents:
1429
diff
changeset
|
1936 } |
1429
abc670a709dc
* -XX:TraceC1X=0...5 controls the native c1x tracing
Lukas Stadler <lukas.stadler@oracle.com>
parents:
1423
diff
changeset
|
1937 |
2891
75a99b4f1c98
Rebranded C++ part from C1X to Graal.
Thomas Wuerthinger <thomas@wuerthinger.net>
parents:
2662
diff
changeset
|
1938 case graal_verify_pointer_id: { |
75a99b4f1c98
Rebranded C++ part from C1X to Graal.
Thomas Wuerthinger <thomas@wuerthinger.net>
parents:
2662
diff
changeset
|
1939 __ verify_oop(r13, "graal verify pointer"); |
1449
8cfe3537a0d3
Pointer verification stub. Two loose oop fixes in C1X C++ part. Logging which methods have been compiled.
Thomas Wuerthinger <wuerthinger@ssw.jku.at>
parents:
1434
diff
changeset
|
1940 __ ret(0); |
8cfe3537a0d3
Pointer verification stub. Two loose oop fixes in C1X C++ part. Logging which methods have been compiled.
Thomas Wuerthinger <wuerthinger@ssw.jku.at>
parents:
1434
diff
changeset
|
1941 break; |
8cfe3537a0d3
Pointer verification stub. Two loose oop fixes in C1X C++ part. Logging which methods have been compiled.
Thomas Wuerthinger <wuerthinger@ssw.jku.at>
parents:
1434
diff
changeset
|
1942 } |
8cfe3537a0d3
Pointer verification stub. Two loose oop fixes in C1X C++ part. Logging which methods have been compiled.
Thomas Wuerthinger <wuerthinger@ssw.jku.at>
parents:
1434
diff
changeset
|
1943 |
2891
75a99b4f1c98
Rebranded C++ part from C1X to Graal.
Thomas Wuerthinger <thomas@wuerthinger.net>
parents:
2662
diff
changeset
|
1944 case graal_arithmetic_frem_id: { |
1434
72cfb36c6bb2
* enabled all jtt tests
Lukas Stadler <lukas.stadler@oracle.com>
parents:
1429
diff
changeset
|
1945 __ subptr(rsp, 8); |
72cfb36c6bb2
* enabled all jtt tests
Lukas Stadler <lukas.stadler@oracle.com>
parents:
1429
diff
changeset
|
1946 __ movflt(Address(rsp, 0), xmm1); |
72cfb36c6bb2
* enabled all jtt tests
Lukas Stadler <lukas.stadler@oracle.com>
parents:
1429
diff
changeset
|
1947 __ fld_s(Address(rsp, 0)); |
72cfb36c6bb2
* enabled all jtt tests
Lukas Stadler <lukas.stadler@oracle.com>
parents:
1429
diff
changeset
|
1948 __ movflt(Address(rsp, 0), xmm0); |
72cfb36c6bb2
* enabled all jtt tests
Lukas Stadler <lukas.stadler@oracle.com>
parents:
1429
diff
changeset
|
1949 __ fld_s(Address(rsp, 0)); |
72cfb36c6bb2
* enabled all jtt tests
Lukas Stadler <lukas.stadler@oracle.com>
parents:
1429
diff
changeset
|
1950 Label L; |
72cfb36c6bb2
* enabled all jtt tests
Lukas Stadler <lukas.stadler@oracle.com>
parents:
1429
diff
changeset
|
1951 __ bind(L); |
72cfb36c6bb2
* enabled all jtt tests
Lukas Stadler <lukas.stadler@oracle.com>
parents:
1429
diff
changeset
|
1952 __ fprem(); |
72cfb36c6bb2
* enabled all jtt tests
Lukas Stadler <lukas.stadler@oracle.com>
parents:
1429
diff
changeset
|
1953 __ fwait(); |
72cfb36c6bb2
* enabled all jtt tests
Lukas Stadler <lukas.stadler@oracle.com>
parents:
1429
diff
changeset
|
1954 __ fnstsw_ax(); |
72cfb36c6bb2
* enabled all jtt tests
Lukas Stadler <lukas.stadler@oracle.com>
parents:
1429
diff
changeset
|
1955 __ testl(rax, 0x400); |
72cfb36c6bb2
* enabled all jtt tests
Lukas Stadler <lukas.stadler@oracle.com>
parents:
1429
diff
changeset
|
1956 __ jcc(Assembler::notZero, L); |
72cfb36c6bb2
* enabled all jtt tests
Lukas Stadler <lukas.stadler@oracle.com>
parents:
1429
diff
changeset
|
1957 __ fxch(1); |
72cfb36c6bb2
* enabled all jtt tests
Lukas Stadler <lukas.stadler@oracle.com>
parents:
1429
diff
changeset
|
1958 __ fpop(); |
72cfb36c6bb2
* enabled all jtt tests
Lukas Stadler <lukas.stadler@oracle.com>
parents:
1429
diff
changeset
|
1959 __ fstp_s(Address(rsp, 0)); |
72cfb36c6bb2
* enabled all jtt tests
Lukas Stadler <lukas.stadler@oracle.com>
parents:
1429
diff
changeset
|
1960 __ movflt(xmm0, Address(rsp, 0)); |
72cfb36c6bb2
* enabled all jtt tests
Lukas Stadler <lukas.stadler@oracle.com>
parents:
1429
diff
changeset
|
1961 __ addptr(rsp, 8); |
72cfb36c6bb2
* enabled all jtt tests
Lukas Stadler <lukas.stadler@oracle.com>
parents:
1429
diff
changeset
|
1962 __ ret(0); |
72cfb36c6bb2
* enabled all jtt tests
Lukas Stadler <lukas.stadler@oracle.com>
parents:
1429
diff
changeset
|
1963 break; |
72cfb36c6bb2
* enabled all jtt tests
Lukas Stadler <lukas.stadler@oracle.com>
parents:
1429
diff
changeset
|
1964 } |
2891
75a99b4f1c98
Rebranded C++ part from C1X to Graal.
Thomas Wuerthinger <thomas@wuerthinger.net>
parents:
2662
diff
changeset
|
1965 case graal_arithmetic_drem_id: { |
1434
72cfb36c6bb2
* enabled all jtt tests
Lukas Stadler <lukas.stadler@oracle.com>
parents:
1429
diff
changeset
|
1966 __ subptr(rsp, 8); |
72cfb36c6bb2
* enabled all jtt tests
Lukas Stadler <lukas.stadler@oracle.com>
parents:
1429
diff
changeset
|
1967 __ movdbl(Address(rsp, 0), xmm1); |
72cfb36c6bb2
* enabled all jtt tests
Lukas Stadler <lukas.stadler@oracle.com>
parents:
1429
diff
changeset
|
1968 __ fld_d(Address(rsp, 0)); |
72cfb36c6bb2
* enabled all jtt tests
Lukas Stadler <lukas.stadler@oracle.com>
parents:
1429
diff
changeset
|
1969 __ movdbl(Address(rsp, 0), xmm0); |
72cfb36c6bb2
* enabled all jtt tests
Lukas Stadler <lukas.stadler@oracle.com>
parents:
1429
diff
changeset
|
1970 __ fld_d(Address(rsp, 0)); |
72cfb36c6bb2
* enabled all jtt tests
Lukas Stadler <lukas.stadler@oracle.com>
parents:
1429
diff
changeset
|
1971 Label L; |
72cfb36c6bb2
* enabled all jtt tests
Lukas Stadler <lukas.stadler@oracle.com>
parents:
1429
diff
changeset
|
1972 __ bind(L); |
72cfb36c6bb2
* enabled all jtt tests
Lukas Stadler <lukas.stadler@oracle.com>
parents:
1429
diff
changeset
|
1973 __ fprem(); |
72cfb36c6bb2
* enabled all jtt tests
Lukas Stadler <lukas.stadler@oracle.com>
parents:
1429
diff
changeset
|
1974 __ fwait(); |
72cfb36c6bb2
* enabled all jtt tests
Lukas Stadler <lukas.stadler@oracle.com>
parents:
1429
diff
changeset
|
1975 __ fnstsw_ax(); |
72cfb36c6bb2
* enabled all jtt tests
Lukas Stadler <lukas.stadler@oracle.com>
parents:
1429
diff
changeset
|
1976 __ testl(rax, 0x400); |
72cfb36c6bb2
* enabled all jtt tests
Lukas Stadler <lukas.stadler@oracle.com>
parents:
1429
diff
changeset
|
1977 __ jcc(Assembler::notZero, L); |
72cfb36c6bb2
* enabled all jtt tests
Lukas Stadler <lukas.stadler@oracle.com>
parents:
1429
diff
changeset
|
1978 __ fxch(1); |
72cfb36c6bb2
* enabled all jtt tests
Lukas Stadler <lukas.stadler@oracle.com>
parents:
1429
diff
changeset
|
1979 __ fpop(); |
72cfb36c6bb2
* enabled all jtt tests
Lukas Stadler <lukas.stadler@oracle.com>
parents:
1429
diff
changeset
|
1980 __ fstp_d(Address(rsp, 0)); |
72cfb36c6bb2
* enabled all jtt tests
Lukas Stadler <lukas.stadler@oracle.com>
parents:
1429
diff
changeset
|
1981 __ movdbl(xmm0, Address(rsp, 0)); |
72cfb36c6bb2
* enabled all jtt tests
Lukas Stadler <lukas.stadler@oracle.com>
parents:
1429
diff
changeset
|
1982 __ addptr(rsp, 8); |
72cfb36c6bb2
* enabled all jtt tests
Lukas Stadler <lukas.stadler@oracle.com>
parents:
1429
diff
changeset
|
1983 __ ret(0); |
72cfb36c6bb2
* enabled all jtt tests
Lukas Stadler <lukas.stadler@oracle.com>
parents:
1429
diff
changeset
|
1984 break; |
72cfb36c6bb2
* enabled all jtt tests
Lukas Stadler <lukas.stadler@oracle.com>
parents:
1429
diff
changeset
|
1985 } |
2891
75a99b4f1c98
Rebranded C++ part from C1X to Graal.
Thomas Wuerthinger <thomas@wuerthinger.net>
parents:
2662
diff
changeset
|
1986 case graal_monitorenter_id: { |
1434
72cfb36c6bb2
* enabled all jtt tests
Lukas Stadler <lukas.stadler@oracle.com>
parents:
1429
diff
changeset
|
1987 Label slow_case; |
72cfb36c6bb2
* enabled all jtt tests
Lukas Stadler <lukas.stadler@oracle.com>
parents:
1429
diff
changeset
|
1988 |
72cfb36c6bb2
* enabled all jtt tests
Lukas Stadler <lukas.stadler@oracle.com>
parents:
1429
diff
changeset
|
1989 Register obj = j_rarg0; |
72cfb36c6bb2
* enabled all jtt tests
Lukas Stadler <lukas.stadler@oracle.com>
parents:
1429
diff
changeset
|
1990 Register lock = j_rarg1; |
72cfb36c6bb2
* enabled all jtt tests
Lukas Stadler <lukas.stadler@oracle.com>
parents:
1429
diff
changeset
|
1991 |
72cfb36c6bb2
* enabled all jtt tests
Lukas Stadler <lukas.stadler@oracle.com>
parents:
1429
diff
changeset
|
1992 Register scratch1 = rax; |
72cfb36c6bb2
* enabled all jtt tests
Lukas Stadler <lukas.stadler@oracle.com>
parents:
1429
diff
changeset
|
1993 Register scratch2 = rbx; |
1942
00bc9eaf0e24
Support for -XX:+UseFastLocking flag. Fixed monitor enter XIR template for correct debug info at the runtime call.
Thomas Wuerthinger <wuerthinger@ssw.jku.at>
parents:
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1994 assert_different_registers(obj, lock, scratch1, scratch2); |
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1995 |
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1996 // copied from LIR_Assembler::emit_lock |
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1997 if (UseFastLocking) { |
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1998 assert(BasicLock::displaced_header_offset_in_bytes() == 0, "lock_reg must point to the displaced header"); |
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1999 __ lock_object(scratch1, obj, lock, scratch2, slow_case, false); |
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2000 __ ret(0); |
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2001 } |
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2002 |
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2003 __ bind(slow_case); |
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2004 { |
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Rebranded C++ part from C1X to Graal.
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2005 StubFrame f(sasm, "graal_monitorenter", dont_gc_arguments); |
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2006 OopMap* map = save_live_registers(sasm, 2, save_fpu_registers); |
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2007 |
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2008 // Called with store_parameter and not C abi |
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2009 int call_offset = __ call_RT(noreg, noreg, CAST_FROM_FN_PTR(address, graal_monitorenter), obj, lock); |
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2010 |
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2011 oop_maps = new OopMapSet(); |
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2012 oop_maps->add_gc_map(call_offset, map); |
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2013 restore_live_registers(sasm, save_fpu_registers); |
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2014 } |
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2015 __ ret(0); |
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2016 break; |
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2017 } |
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2018 case graal_monitorexit_id: { |
1434
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2019 Label slow_case; |
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2020 |
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2021 Register obj = j_rarg0; |
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2022 Register lock = j_rarg1; |
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2023 |
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2024 // needed in rax later on... |
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2025 Register lock2 = rax; |
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2026 __ mov(lock2, lock); |
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2027 Register scratch1 = rbx; |
1942
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Support for -XX:+UseFastLocking flag. Fixed monitor enter XIR template for correct debug info at the runtime call.
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2028 assert_different_registers(obj, lock, scratch1, lock2); |
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2029 |
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2030 // copied from LIR_Assembler::emit_lock |
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2031 if (UseFastLocking) { |
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2032 assert(BasicLock::displaced_header_offset_in_bytes() == 0, "lock_reg must point to the displaced header"); |
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2033 __ unlock_object(scratch1, obj, lock2, slow_case, false); |
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2034 __ ret(0); |
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2035 } |
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2036 |
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2037 __ bind(slow_case); |
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2038 { |
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2039 StubFrame f(sasm, "graal_monitorexit", dont_gc_arguments); |
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2040 OopMap* map = save_live_registers(sasm, 2, save_fpu_registers); |
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2041 |
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|
2042 // note: really a leaf routine but must setup last java sp |
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2043 // => use call_RT for now (speed can be improved by |
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|
2044 // doing last java sp setup manually) |
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Change Graal monitor enter and exit from BasicObjectLock to BasicLock
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|
2045 int call_offset = __ call_RT(noreg, noreg, CAST_FROM_FN_PTR(address, graal_monitorexit), obj, lock); |
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2046 |
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2047 oop_maps = new OopMapSet(); |
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2048 oop_maps->add_gc_map(call_offset, map); |
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2049 restore_live_registers(sasm, save_fpu_registers); |
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|
2050 } |
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2051 __ ret(0); |
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2052 break; |
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2053 } |
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More GRAAL #ifdef; ignore graal directory on windows for client/server configuration.
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2054 #endif |
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2055 |
0 | 2056 default: |
2057 { StubFrame f(sasm, "unimplemented entry", dont_gc_arguments); | |
304 | 2058 __ movptr(rax, (int)id); |
0 | 2059 __ call_RT(noreg, noreg, CAST_FROM_FN_PTR(address, unimplemented_entry), rax); |
2060 __ should_not_reach_here(); | |
2061 } | |
2062 break; | |
2063 } | |
2064 return oop_maps; | |
2065 } | |
2066 | |
2067 #undef __ | |
1681
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2068 |
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|
2069 const char *Runtime1::pd_name_for_address(address entry) { |
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|
2070 return "<unknown function>"; |
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|
2071 } |