Mercurial > hg > graal-jvmci-8
annotate src/cpu/x86/vm/sharedRuntime_x86_64.cpp @ 23886:5601e440e5e7
8130150: Implement BigInteger.montgomeryMultiply intrinsic
Reviewed-by: kvn, mdoerr
author | vkempik |
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date | Fri, 04 Mar 2016 16:15:48 +0300 |
parents | e8260b6328fb |
children | f13e777eb255 |
rev | line source |
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0 | 1 /* |
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2 * Copyright (c) 2003, 2013, Oracle and/or its affiliates. All rights reserved. |
0 | 3 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. |
4 * | |
5 * This code is free software; you can redistribute it and/or modify it | |
6 * under the terms of the GNU General Public License version 2 only, as | |
7 * published by the Free Software Foundation. | |
8 * | |
9 * This code is distributed in the hope that it will be useful, but WITHOUT | |
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or | |
11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License | |
12 * version 2 for more details (a copy is included in the LICENSE file that | |
13 * accompanied this code). | |
14 * | |
15 * You should have received a copy of the GNU General Public License version | |
16 * 2 along with this work; if not, write to the Free Software Foundation, | |
17 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA. | |
18 * | |
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19 * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA |
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20 * or visit www.oracle.com if you need additional information or have any |
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21 * questions. |
0 | 22 * |
23 */ | |
24 | |
1972 | 25 #include "precompiled.hpp" |
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26 #ifndef _WINDOWS |
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27 #include "alloca.h" |
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28 #endif |
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29 #include "asm/macroAssembler.hpp" |
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30 #include "asm/macroAssembler.inline.hpp" |
1972 | 31 #include "code/debugInfoRec.hpp" |
32 #include "code/icBuffer.hpp" | |
33 #include "code/vtableStubs.hpp" | |
34 #include "interpreter/interpreter.hpp" | |
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35 #include "oops/compiledICHolder.hpp" |
1972 | 36 #include "prims/jvmtiRedefineClassesTrace.hpp" |
37 #include "runtime/sharedRuntime.hpp" | |
38 #include "runtime/vframeArray.hpp" | |
39 #include "vmreg_x86.inline.hpp" | |
40 #ifdef COMPILER1 | |
41 #include "c1/c1_Runtime1.hpp" | |
42 #endif | |
43 #ifdef COMPILER2 | |
44 #include "opto/runtime.hpp" | |
45 #endif | |
0 | 46 |
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47 #define __ masm-> |
0 | 48 |
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49 const int StackAlignmentInSlots = StackAlignmentInBytes / VMRegImpl::stack_slot_size; |
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50 |
0 | 51 class SimpleRuntimeFrame { |
52 | |
53 public: | |
54 | |
55 // Most of the runtime stubs have this simple frame layout. | |
56 // This class exists to make the layout shared in one place. | |
57 // Offsets are for compiler stack slots, which are jints. | |
58 enum layout { | |
59 // The frame sender code expects that rbp will be in the "natural" place and | |
60 // will override any oopMap setting for it. We must therefore force the layout | |
61 // so that it agrees with the frame sender code. | |
62 rbp_off = frame::arg_reg_save_area_bytes/BytesPerInt, | |
63 rbp_off2, | |
64 return_off, return_off2, | |
65 framesize | |
66 }; | |
67 }; | |
68 | |
69 class RegisterSaver { | |
70 // Capture info about frame layout. Layout offsets are in jint | |
71 // units because compiler frame slots are jints. | |
72 #define DEF_XMM_OFFS(regnum) xmm ## regnum ## _off = xmm_off + (regnum)*16/BytesPerInt, xmm ## regnum ## H_off | |
73 enum layout { | |
74 fpu_state_off = frame::arg_reg_save_area_bytes/BytesPerInt, // fxsave save area | |
75 xmm_off = fpu_state_off + 160/BytesPerInt, // offset in fxsave save area | |
76 DEF_XMM_OFFS(0), | |
77 DEF_XMM_OFFS(1), | |
78 DEF_XMM_OFFS(2), | |
79 DEF_XMM_OFFS(3), | |
80 DEF_XMM_OFFS(4), | |
81 DEF_XMM_OFFS(5), | |
82 DEF_XMM_OFFS(6), | |
83 DEF_XMM_OFFS(7), | |
84 DEF_XMM_OFFS(8), | |
85 DEF_XMM_OFFS(9), | |
86 DEF_XMM_OFFS(10), | |
87 DEF_XMM_OFFS(11), | |
88 DEF_XMM_OFFS(12), | |
89 DEF_XMM_OFFS(13), | |
90 DEF_XMM_OFFS(14), | |
91 DEF_XMM_OFFS(15), | |
92 fpu_state_end = fpu_state_off + ((FPUStateSizeInWords-1)*wordSize / BytesPerInt), | |
93 fpu_stateH_end, | |
94 r15_off, r15H_off, | |
95 r14_off, r14H_off, | |
96 r13_off, r13H_off, | |
97 r12_off, r12H_off, | |
98 r11_off, r11H_off, | |
99 r10_off, r10H_off, | |
100 r9_off, r9H_off, | |
101 r8_off, r8H_off, | |
102 rdi_off, rdiH_off, | |
103 rsi_off, rsiH_off, | |
104 ignore_off, ignoreH_off, // extra copy of rbp | |
105 rsp_off, rspH_off, | |
106 rbx_off, rbxH_off, | |
107 rdx_off, rdxH_off, | |
108 rcx_off, rcxH_off, | |
109 rax_off, raxH_off, | |
110 // 16-byte stack alignment fill word: see MacroAssembler::push/pop_IU_state | |
111 align_off, alignH_off, | |
112 flags_off, flagsH_off, | |
113 // The frame sender code expects that rbp will be in the "natural" place and | |
114 // will override any oopMap setting for it. We must therefore force the layout | |
115 // so that it agrees with the frame sender code. | |
116 rbp_off, rbpH_off, // copy of rbp we will restore | |
117 return_off, returnH_off, // slot for return address | |
118 reg_save_size // size in compiler stack slots | |
119 }; | |
120 | |
121 public: | |
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122 static OopMap* save_live_registers(MacroAssembler* masm, int additional_frame_words, int* total_frame_words, bool save_vectors = false); |
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123 static void restore_live_registers(MacroAssembler* masm, bool restore_vectors = false); |
0 | 124 |
125 // Offsets into the register save area | |
126 // Used by deoptimization when it is managing result register | |
127 // values on its own | |
128 | |
129 static int rax_offset_in_bytes(void) { return BytesPerInt * rax_off; } | |
304 | 130 static int rdx_offset_in_bytes(void) { return BytesPerInt * rdx_off; } |
0 | 131 static int rbx_offset_in_bytes(void) { return BytesPerInt * rbx_off; } |
132 static int xmm0_offset_in_bytes(void) { return BytesPerInt * xmm0_off; } | |
133 static int return_offset_in_bytes(void) { return BytesPerInt * return_off; } | |
134 | |
135 // During deoptimization only the result registers need to be restored, | |
136 // all the other values have already been extracted. | |
137 static void restore_result_registers(MacroAssembler* masm); | |
138 }; | |
139 | |
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140 OopMap* RegisterSaver::save_live_registers(MacroAssembler* masm, int additional_frame_words, int* total_frame_words, bool save_vectors) { |
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141 int vect_words = 0; |
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142 #ifdef COMPILER2 |
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143 if (save_vectors) { |
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144 assert(UseAVX > 0, "256bit vectors are supported only with AVX"); |
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145 assert(MaxVectorSize == 32, "only 256bit vectors are supported now"); |
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146 // Save upper half of YMM registes |
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147 vect_words = 16 * 16 / wordSize; |
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148 additional_frame_words += vect_words; |
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149 } |
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150 #else |
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151 assert(!save_vectors, "vectors are generated only by C2"); |
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152 #endif |
0 | 153 |
154 // Always make the frame size 16-byte aligned | |
155 int frame_size_in_bytes = round_to(additional_frame_words*wordSize + | |
156 reg_save_size*BytesPerInt, 16); | |
157 // OopMap frame size is in compiler stack slots (jint's) not bytes or words | |
158 int frame_size_in_slots = frame_size_in_bytes / BytesPerInt; | |
159 // The caller will allocate additional_frame_words | |
160 int additional_frame_slots = additional_frame_words*wordSize / BytesPerInt; | |
161 // CodeBlob frame size is in words. | |
162 int frame_size_in_words = frame_size_in_bytes / wordSize; | |
163 *total_frame_words = frame_size_in_words; | |
164 | |
165 // Save registers, fpu state, and flags. | |
166 // We assume caller has already pushed the return address onto the | |
167 // stack, so rsp is 8-byte aligned here. | |
168 // We push rpb twice in this sequence because we want the real rbp | |
169 // to be under the return like a normal enter. | |
170 | |
171 __ enter(); // rsp becomes 16-byte aligned here | |
172 __ push_CPU_state(); // Push a multiple of 16 bytes | |
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173 |
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174 if (vect_words > 0) { |
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175 assert(vect_words*wordSize == 256, ""); |
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176 __ subptr(rsp, 256); // Save upper half of YMM registes |
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177 __ vextractf128h(Address(rsp, 0),xmm0); |
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178 __ vextractf128h(Address(rsp, 16),xmm1); |
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179 __ vextractf128h(Address(rsp, 32),xmm2); |
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180 __ vextractf128h(Address(rsp, 48),xmm3); |
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181 __ vextractf128h(Address(rsp, 64),xmm4); |
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182 __ vextractf128h(Address(rsp, 80),xmm5); |
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183 __ vextractf128h(Address(rsp, 96),xmm6); |
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184 __ vextractf128h(Address(rsp,112),xmm7); |
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185 __ vextractf128h(Address(rsp,128),xmm8); |
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186 __ vextractf128h(Address(rsp,144),xmm9); |
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187 __ vextractf128h(Address(rsp,160),xmm10); |
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188 __ vextractf128h(Address(rsp,176),xmm11); |
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189 __ vextractf128h(Address(rsp,192),xmm12); |
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190 __ vextractf128h(Address(rsp,208),xmm13); |
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191 __ vextractf128h(Address(rsp,224),xmm14); |
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192 __ vextractf128h(Address(rsp,240),xmm15); |
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193 } |
0 | 194 if (frame::arg_reg_save_area_bytes != 0) { |
195 // Allocate argument register save area | |
304 | 196 __ subptr(rsp, frame::arg_reg_save_area_bytes); |
0 | 197 } |
198 | |
199 // Set an oopmap for the call site. This oopmap will map all | |
200 // oop-registers and debug-info registers as callee-saved. This | |
201 // will allow deoptimization at this safepoint to find all possible | |
202 // debug-info recordings, as well as let GC find all oops. | |
203 | |
204 OopMapSet *oop_maps = new OopMapSet(); | |
205 OopMap* map = new OopMap(frame_size_in_slots, 0); | |
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206 |
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207 #define STACK_OFFSET(x) VMRegImpl::stack2reg((x) + additional_frame_slots) |
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208 |
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209 map->set_callee_saved(STACK_OFFSET( rax_off ), rax->as_VMReg()); |
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210 map->set_callee_saved(STACK_OFFSET( rcx_off ), rcx->as_VMReg()); |
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211 map->set_callee_saved(STACK_OFFSET( rdx_off ), rdx->as_VMReg()); |
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212 map->set_callee_saved(STACK_OFFSET( rbx_off ), rbx->as_VMReg()); |
0 | 213 // rbp location is known implicitly by the frame sender code, needs no oopmap |
214 // and the location where rbp was saved by is ignored | |
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215 map->set_callee_saved(STACK_OFFSET( rsi_off ), rsi->as_VMReg()); |
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216 map->set_callee_saved(STACK_OFFSET( rdi_off ), rdi->as_VMReg()); |
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217 map->set_callee_saved(STACK_OFFSET( r8_off ), r8->as_VMReg()); |
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218 map->set_callee_saved(STACK_OFFSET( r9_off ), r9->as_VMReg()); |
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219 map->set_callee_saved(STACK_OFFSET( r10_off ), r10->as_VMReg()); |
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220 map->set_callee_saved(STACK_OFFSET( r11_off ), r11->as_VMReg()); |
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221 map->set_callee_saved(STACK_OFFSET( r12_off ), r12->as_VMReg()); |
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222 map->set_callee_saved(STACK_OFFSET( r13_off ), r13->as_VMReg()); |
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223 map->set_callee_saved(STACK_OFFSET( r14_off ), r14->as_VMReg()); |
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224 map->set_callee_saved(STACK_OFFSET( r15_off ), r15->as_VMReg()); |
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225 map->set_callee_saved(STACK_OFFSET(xmm0_off ), xmm0->as_VMReg()); |
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226 map->set_callee_saved(STACK_OFFSET(xmm1_off ), xmm1->as_VMReg()); |
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227 map->set_callee_saved(STACK_OFFSET(xmm2_off ), xmm2->as_VMReg()); |
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228 map->set_callee_saved(STACK_OFFSET(xmm3_off ), xmm3->as_VMReg()); |
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229 map->set_callee_saved(STACK_OFFSET(xmm4_off ), xmm4->as_VMReg()); |
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230 map->set_callee_saved(STACK_OFFSET(xmm5_off ), xmm5->as_VMReg()); |
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231 map->set_callee_saved(STACK_OFFSET(xmm6_off ), xmm6->as_VMReg()); |
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232 map->set_callee_saved(STACK_OFFSET(xmm7_off ), xmm7->as_VMReg()); |
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233 map->set_callee_saved(STACK_OFFSET(xmm8_off ), xmm8->as_VMReg()); |
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234 map->set_callee_saved(STACK_OFFSET(xmm9_off ), xmm9->as_VMReg()); |
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235 map->set_callee_saved(STACK_OFFSET(xmm10_off), xmm10->as_VMReg()); |
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236 map->set_callee_saved(STACK_OFFSET(xmm11_off), xmm11->as_VMReg()); |
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237 map->set_callee_saved(STACK_OFFSET(xmm12_off), xmm12->as_VMReg()); |
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238 map->set_callee_saved(STACK_OFFSET(xmm13_off), xmm13->as_VMReg()); |
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239 map->set_callee_saved(STACK_OFFSET(xmm14_off), xmm14->as_VMReg()); |
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240 map->set_callee_saved(STACK_OFFSET(xmm15_off), xmm15->as_VMReg()); |
0 | 241 |
242 // %%% These should all be a waste but we'll keep things as they were for now | |
243 if (true) { | |
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244 map->set_callee_saved(STACK_OFFSET( raxH_off ), rax->as_VMReg()->next()); |
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245 map->set_callee_saved(STACK_OFFSET( rcxH_off ), rcx->as_VMReg()->next()); |
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246 map->set_callee_saved(STACK_OFFSET( rdxH_off ), rdx->as_VMReg()->next()); |
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247 map->set_callee_saved(STACK_OFFSET( rbxH_off ), rbx->as_VMReg()->next()); |
0 | 248 // rbp location is known implicitly by the frame sender code, needs no oopmap |
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249 map->set_callee_saved(STACK_OFFSET( rsiH_off ), rsi->as_VMReg()->next()); |
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250 map->set_callee_saved(STACK_OFFSET( rdiH_off ), rdi->as_VMReg()->next()); |
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251 map->set_callee_saved(STACK_OFFSET( r8H_off ), r8->as_VMReg()->next()); |
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252 map->set_callee_saved(STACK_OFFSET( r9H_off ), r9->as_VMReg()->next()); |
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253 map->set_callee_saved(STACK_OFFSET( r10H_off ), r10->as_VMReg()->next()); |
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254 map->set_callee_saved(STACK_OFFSET( r11H_off ), r11->as_VMReg()->next()); |
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255 map->set_callee_saved(STACK_OFFSET( r12H_off ), r12->as_VMReg()->next()); |
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256 map->set_callee_saved(STACK_OFFSET( r13H_off ), r13->as_VMReg()->next()); |
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257 map->set_callee_saved(STACK_OFFSET( r14H_off ), r14->as_VMReg()->next()); |
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258 map->set_callee_saved(STACK_OFFSET( r15H_off ), r15->as_VMReg()->next()); |
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259 map->set_callee_saved(STACK_OFFSET(xmm0H_off ), xmm0->as_VMReg()->next()); |
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260 map->set_callee_saved(STACK_OFFSET(xmm1H_off ), xmm1->as_VMReg()->next()); |
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261 map->set_callee_saved(STACK_OFFSET(xmm2H_off ), xmm2->as_VMReg()->next()); |
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262 map->set_callee_saved(STACK_OFFSET(xmm3H_off ), xmm3->as_VMReg()->next()); |
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263 map->set_callee_saved(STACK_OFFSET(xmm4H_off ), xmm4->as_VMReg()->next()); |
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264 map->set_callee_saved(STACK_OFFSET(xmm5H_off ), xmm5->as_VMReg()->next()); |
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265 map->set_callee_saved(STACK_OFFSET(xmm6H_off ), xmm6->as_VMReg()->next()); |
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266 map->set_callee_saved(STACK_OFFSET(xmm7H_off ), xmm7->as_VMReg()->next()); |
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267 map->set_callee_saved(STACK_OFFSET(xmm8H_off ), xmm8->as_VMReg()->next()); |
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268 map->set_callee_saved(STACK_OFFSET(xmm9H_off ), xmm9->as_VMReg()->next()); |
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269 map->set_callee_saved(STACK_OFFSET(xmm10H_off), xmm10->as_VMReg()->next()); |
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270 map->set_callee_saved(STACK_OFFSET(xmm11H_off), xmm11->as_VMReg()->next()); |
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271 map->set_callee_saved(STACK_OFFSET(xmm12H_off), xmm12->as_VMReg()->next()); |
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272 map->set_callee_saved(STACK_OFFSET(xmm13H_off), xmm13->as_VMReg()->next()); |
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273 map->set_callee_saved(STACK_OFFSET(xmm14H_off), xmm14->as_VMReg()->next()); |
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274 map->set_callee_saved(STACK_OFFSET(xmm15H_off), xmm15->as_VMReg()->next()); |
0 | 275 } |
276 | |
277 return map; | |
278 } | |
279 | |
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280 void RegisterSaver::restore_live_registers(MacroAssembler* masm, bool restore_vectors) { |
0 | 281 if (frame::arg_reg_save_area_bytes != 0) { |
282 // Pop arg register save area | |
304 | 283 __ addptr(rsp, frame::arg_reg_save_area_bytes); |
0 | 284 } |
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285 #ifdef COMPILER2 |
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286 if (restore_vectors) { |
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287 // Restore upper half of YMM registes. |
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288 assert(UseAVX > 0, "256bit vectors are supported only with AVX"); |
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289 assert(MaxVectorSize == 32, "only 256bit vectors are supported now"); |
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290 __ vinsertf128h(xmm0, Address(rsp, 0)); |
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291 __ vinsertf128h(xmm1, Address(rsp, 16)); |
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292 __ vinsertf128h(xmm2, Address(rsp, 32)); |
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293 __ vinsertf128h(xmm3, Address(rsp, 48)); |
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294 __ vinsertf128h(xmm4, Address(rsp, 64)); |
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295 __ vinsertf128h(xmm5, Address(rsp, 80)); |
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296 __ vinsertf128h(xmm6, Address(rsp, 96)); |
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297 __ vinsertf128h(xmm7, Address(rsp,112)); |
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298 __ vinsertf128h(xmm8, Address(rsp,128)); |
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299 __ vinsertf128h(xmm9, Address(rsp,144)); |
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300 __ vinsertf128h(xmm10, Address(rsp,160)); |
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301 __ vinsertf128h(xmm11, Address(rsp,176)); |
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302 __ vinsertf128h(xmm12, Address(rsp,192)); |
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303 __ vinsertf128h(xmm13, Address(rsp,208)); |
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304 __ vinsertf128h(xmm14, Address(rsp,224)); |
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305 __ vinsertf128h(xmm15, Address(rsp,240)); |
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306 __ addptr(rsp, 256); |
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307 } |
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308 #else |
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309 assert(!restore_vectors, "vectors are generated only by C2"); |
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310 #endif |
0 | 311 // Recover CPU state |
312 __ pop_CPU_state(); | |
313 // Get the rbp described implicitly by the calling convention (no oopMap) | |
304 | 314 __ pop(rbp); |
0 | 315 } |
316 | |
317 void RegisterSaver::restore_result_registers(MacroAssembler* masm) { | |
318 | |
319 // Just restore result register. Only used by deoptimization. By | |
320 // now any callee save register that needs to be restored to a c2 | |
321 // caller of the deoptee has been extracted into the vframeArray | |
322 // and will be stuffed into the c2i adapter we create for later | |
323 // restoration so only result registers need to be restored here. | |
324 | |
325 // Restore fp result register | |
326 __ movdbl(xmm0, Address(rsp, xmm0_offset_in_bytes())); | |
327 // Restore integer result register | |
304 | 328 __ movptr(rax, Address(rsp, rax_offset_in_bytes())); |
329 __ movptr(rdx, Address(rsp, rdx_offset_in_bytes())); | |
330 | |
0 | 331 // Pop all of the register save are off the stack except the return address |
304 | 332 __ addptr(rsp, return_offset_in_bytes()); |
0 | 333 } |
334 | |
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335 // Is vector's size (in bytes) bigger than a size saved by default? |
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336 // 16 bytes XMM registers are saved by default using fxsave/fxrstor instructions. |
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337 bool SharedRuntime::is_wide_vector(int size) { |
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338 return size > 16; |
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339 } |
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340 |
0 | 341 // The java_calling_convention describes stack locations as ideal slots on |
342 // a frame with no abi restrictions. Since we must observe abi restrictions | |
343 // (like the placement of the register window) the slots must be biased by | |
344 // the following value. | |
345 static int reg2offset_in(VMReg r) { | |
346 // Account for saved rbp and return address | |
347 // This should really be in_preserve_stack_slots | |
348 return (r->reg2stack() + 4) * VMRegImpl::stack_slot_size; | |
349 } | |
350 | |
351 static int reg2offset_out(VMReg r) { | |
352 return (r->reg2stack() + SharedRuntime::out_preserve_stack_slots()) * VMRegImpl::stack_slot_size; | |
353 } | |
354 | |
355 // --------------------------------------------------------------------------- | |
356 // Read the array of BasicTypes from a signature, and compute where the | |
357 // arguments should go. Values in the VMRegPair regs array refer to 4-byte | |
358 // quantities. Values less than VMRegImpl::stack0 are registers, those above | |
359 // refer to 4-byte stack slots. All stack slots are based off of the stack pointer | |
360 // as framesizes are fixed. | |
361 // VMRegImpl::stack0 refers to the first slot 0(sp). | |
362 // and VMRegImpl::stack0+1 refers to the memory word 4-byes higher. Register | |
363 // up to RegisterImpl::number_of_registers) are the 64-bit | |
364 // integer registers. | |
365 | |
366 // Note: the INPUTS in sig_bt are in units of Java argument words, which are | |
367 // either 32-bit or 64-bit depending on the build. The OUTPUTS are in 32-bit | |
368 // units regardless of build. Of course for i486 there is no 64 bit build | |
369 | |
370 // The Java calling convention is a "shifted" version of the C ABI. | |
371 // By skipping the first C ABI register we can call non-static jni methods | |
372 // with small numbers of arguments without having to shuffle the arguments | |
373 // at all. Since we control the java ABI we ought to at least get some | |
374 // advantage out of it. | |
375 | |
376 int SharedRuntime::java_calling_convention(const BasicType *sig_bt, | |
377 VMRegPair *regs, | |
378 int total_args_passed, | |
379 int is_outgoing) { | |
380 | |
381 // Create the mapping between argument positions and | |
382 // registers. | |
383 static const Register INT_ArgReg[Argument::n_int_register_parameters_j] = { | |
384 j_rarg0, j_rarg1, j_rarg2, j_rarg3, j_rarg4, j_rarg5 | |
385 }; | |
386 static const XMMRegister FP_ArgReg[Argument::n_float_register_parameters_j] = { | |
387 j_farg0, j_farg1, j_farg2, j_farg3, | |
388 j_farg4, j_farg5, j_farg6, j_farg7 | |
389 }; | |
390 | |
391 | |
392 uint int_args = 0; | |
393 uint fp_args = 0; | |
394 uint stk_args = 0; // inc by 2 each time | |
395 | |
396 for (int i = 0; i < total_args_passed; i++) { | |
397 switch (sig_bt[i]) { | |
398 case T_BOOLEAN: | |
399 case T_CHAR: | |
400 case T_BYTE: | |
401 case T_SHORT: | |
402 case T_INT: | |
403 if (int_args < Argument::n_int_register_parameters_j) { | |
404 regs[i].set1(INT_ArgReg[int_args++]->as_VMReg()); | |
405 } else { | |
406 regs[i].set1(VMRegImpl::stack2reg(stk_args)); | |
407 stk_args += 2; | |
408 } | |
409 break; | |
410 case T_VOID: | |
411 // halves of T_LONG or T_DOUBLE | |
412 assert(i != 0 && (sig_bt[i - 1] == T_LONG || sig_bt[i - 1] == T_DOUBLE), "expecting half"); | |
413 regs[i].set_bad(); | |
414 break; | |
415 case T_LONG: | |
416 assert(sig_bt[i + 1] == T_VOID, "expecting half"); | |
417 // fall through | |
418 case T_OBJECT: | |
419 case T_ARRAY: | |
420 case T_ADDRESS: | |
421 if (int_args < Argument::n_int_register_parameters_j) { | |
422 regs[i].set2(INT_ArgReg[int_args++]->as_VMReg()); | |
423 } else { | |
424 regs[i].set2(VMRegImpl::stack2reg(stk_args)); | |
425 stk_args += 2; | |
426 } | |
427 break; | |
428 case T_FLOAT: | |
429 if (fp_args < Argument::n_float_register_parameters_j) { | |
430 regs[i].set1(FP_ArgReg[fp_args++]->as_VMReg()); | |
431 } else { | |
432 regs[i].set1(VMRegImpl::stack2reg(stk_args)); | |
433 stk_args += 2; | |
434 } | |
435 break; | |
436 case T_DOUBLE: | |
437 assert(sig_bt[i + 1] == T_VOID, "expecting half"); | |
438 if (fp_args < Argument::n_float_register_parameters_j) { | |
439 regs[i].set2(FP_ArgReg[fp_args++]->as_VMReg()); | |
440 } else { | |
441 regs[i].set2(VMRegImpl::stack2reg(stk_args)); | |
442 stk_args += 2; | |
443 } | |
444 break; | |
445 default: | |
446 ShouldNotReachHere(); | |
447 break; | |
448 } | |
449 } | |
450 | |
451 return round_to(stk_args, 2); | |
452 } | |
453 | |
454 // Patch the callers callsite with entry to compiled code if it exists. | |
455 static void patch_callers_callsite(MacroAssembler *masm) { | |
456 Label L; | |
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457 __ cmpptr(Address(rbx, in_bytes(Method::code_offset())), (int32_t)NULL_WORD); |
0 | 458 __ jcc(Assembler::equal, L); |
459 | |
460 // Save the current stack pointer | |
304 | 461 __ mov(r13, rsp); |
0 | 462 // Schedule the branch target address early. |
463 // Call into the VM to patch the caller, then jump to compiled callee | |
464 // rax isn't live so capture return address while we easily can | |
304 | 465 __ movptr(rax, Address(rsp, 0)); |
0 | 466 |
467 // align stack so push_CPU_state doesn't fault | |
304 | 468 __ andptr(rsp, -(StackAlignmentInBytes)); |
0 | 469 __ push_CPU_state(); |
470 | |
471 // VM needs caller's callsite | |
472 // VM needs target method | |
473 // This needs to be a long call since we will relocate this adapter to | |
474 // the codeBuffer and it may not reach | |
475 | |
476 // Allocate argument register save area | |
477 if (frame::arg_reg_save_area_bytes != 0) { | |
304 | 478 __ subptr(rsp, frame::arg_reg_save_area_bytes); |
0 | 479 } |
304 | 480 __ mov(c_rarg0, rbx); |
481 __ mov(c_rarg1, rax); | |
0 | 482 __ call(RuntimeAddress(CAST_FROM_FN_PTR(address, SharedRuntime::fixup_callers_callsite))); |
483 | |
484 // De-allocate argument register save area | |
485 if (frame::arg_reg_save_area_bytes != 0) { | |
304 | 486 __ addptr(rsp, frame::arg_reg_save_area_bytes); |
0 | 487 } |
488 | |
489 __ pop_CPU_state(); | |
490 // restore sp | |
304 | 491 __ mov(rsp, r13); |
0 | 492 __ bind(L); |
493 } | |
494 | |
495 | |
496 static void gen_c2i_adapter(MacroAssembler *masm, | |
497 int total_args_passed, | |
498 int comp_args_on_stack, | |
499 const BasicType *sig_bt, | |
500 const VMRegPair *regs, | |
501 Label& skip_fixup) { | |
502 // Before we get into the guts of the C2I adapter, see if we should be here | |
503 // at all. We've come from compiled code and are attempting to jump to the | |
504 // interpreter, which means the caller made a static call to get here | |
505 // (vcalls always get a compiled target if there is one). Check for a | |
506 // compiled target. If there is one, we need to patch the caller's call. | |
507 patch_callers_callsite(masm); | |
508 | |
509 __ bind(skip_fixup); | |
510 | |
511 // Since all args are passed on the stack, total_args_passed * | |
512 // Interpreter::stackElementSize is the space we need. Plus 1 because | |
513 // we also account for the return address location since | |
514 // we store it first rather than hold it in rax across all the shuffling | |
515 | |
1506 | 516 int extraspace = (total_args_passed * Interpreter::stackElementSize) + wordSize; |
0 | 517 |
518 // stack is aligned, keep it that way | |
519 extraspace = round_to(extraspace, 2*wordSize); | |
520 | |
521 // Get return address | |
304 | 522 __ pop(rax); |
0 | 523 |
524 // set senderSP value | |
304 | 525 __ mov(r13, rsp); |
526 | |
527 __ subptr(rsp, extraspace); | |
0 | 528 |
529 // Store the return address in the expected location | |
304 | 530 __ movptr(Address(rsp, 0), rax); |
0 | 531 |
532 // Now write the args into the outgoing interpreter space | |
533 for (int i = 0; i < total_args_passed; i++) { | |
534 if (sig_bt[i] == T_VOID) { | |
535 assert(i > 0 && (sig_bt[i-1] == T_LONG || sig_bt[i-1] == T_DOUBLE), "missing half"); | |
536 continue; | |
537 } | |
538 | |
539 // offset to start parameters | |
1506 | 540 int st_off = (total_args_passed - i) * Interpreter::stackElementSize; |
541 int next_off = st_off - Interpreter::stackElementSize; | |
0 | 542 |
543 // Say 4 args: | |
544 // i st_off | |
545 // 0 32 T_LONG | |
546 // 1 24 T_VOID | |
547 // 2 16 T_OBJECT | |
548 // 3 8 T_BOOL | |
549 // - 0 return address | |
550 // | |
551 // However to make thing extra confusing. Because we can fit a long/double in | |
552 // a single slot on a 64 bt vm and it would be silly to break them up, the interpreter | |
553 // leaves one slot empty and only stores to a single slot. In this case the | |
554 // slot that is occupied is the T_VOID slot. See I said it was confusing. | |
555 | |
556 VMReg r_1 = regs[i].first(); | |
557 VMReg r_2 = regs[i].second(); | |
558 if (!r_1->is_valid()) { | |
559 assert(!r_2->is_valid(), ""); | |
560 continue; | |
561 } | |
562 if (r_1->is_stack()) { | |
563 // memory to memory use rax | |
564 int ld_off = r_1->reg2stack() * VMRegImpl::stack_slot_size + extraspace; | |
565 if (!r_2->is_valid()) { | |
566 // sign extend?? | |
567 __ movl(rax, Address(rsp, ld_off)); | |
304 | 568 __ movptr(Address(rsp, st_off), rax); |
0 | 569 |
570 } else { | |
571 | |
572 __ movq(rax, Address(rsp, ld_off)); | |
573 | |
574 // Two VMREgs|OptoRegs can be T_OBJECT, T_ADDRESS, T_DOUBLE, T_LONG | |
575 // T_DOUBLE and T_LONG use two slots in the interpreter | |
576 if ( sig_bt[i] == T_LONG || sig_bt[i] == T_DOUBLE) { | |
577 // ld_off == LSW, ld_off+wordSize == MSW | |
578 // st_off == MSW, next_off == LSW | |
579 __ movq(Address(rsp, next_off), rax); | |
580 #ifdef ASSERT | |
581 // Overwrite the unused slot with known junk | |
582 __ mov64(rax, CONST64(0xdeadffffdeadaaaa)); | |
304 | 583 __ movptr(Address(rsp, st_off), rax); |
0 | 584 #endif /* ASSERT */ |
585 } else { | |
586 __ movq(Address(rsp, st_off), rax); | |
587 } | |
588 } | |
589 } else if (r_1->is_Register()) { | |
590 Register r = r_1->as_Register(); | |
591 if (!r_2->is_valid()) { | |
592 // must be only an int (or less ) so move only 32bits to slot | |
593 // why not sign extend?? | |
594 __ movl(Address(rsp, st_off), r); | |
595 } else { | |
596 // Two VMREgs|OptoRegs can be T_OBJECT, T_ADDRESS, T_DOUBLE, T_LONG | |
597 // T_DOUBLE and T_LONG use two slots in the interpreter | |
598 if ( sig_bt[i] == T_LONG || sig_bt[i] == T_DOUBLE) { | |
599 // long/double in gpr | |
600 #ifdef ASSERT | |
601 // Overwrite the unused slot with known junk | |
602 __ mov64(rax, CONST64(0xdeadffffdeadaaab)); | |
304 | 603 __ movptr(Address(rsp, st_off), rax); |
0 | 604 #endif /* ASSERT */ |
605 __ movq(Address(rsp, next_off), r); | |
606 } else { | |
304 | 607 __ movptr(Address(rsp, st_off), r); |
0 | 608 } |
609 } | |
610 } else { | |
611 assert(r_1->is_XMMRegister(), ""); | |
612 if (!r_2->is_valid()) { | |
613 // only a float use just part of the slot | |
614 __ movflt(Address(rsp, st_off), r_1->as_XMMRegister()); | |
615 } else { | |
616 #ifdef ASSERT | |
617 // Overwrite the unused slot with known junk | |
618 __ mov64(rax, CONST64(0xdeadffffdeadaaac)); | |
304 | 619 __ movptr(Address(rsp, st_off), rax); |
0 | 620 #endif /* ASSERT */ |
621 __ movdbl(Address(rsp, next_off), r_1->as_XMMRegister()); | |
622 } | |
623 } | |
624 } | |
625 | |
626 // Schedule the branch target address early. | |
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627 __ movptr(rcx, Address(rbx, in_bytes(Method::interpreter_entry_offset()))); |
0 | 628 __ jmp(rcx); |
629 } | |
630 | |
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631 static void range_check(MacroAssembler* masm, Register pc_reg, Register temp_reg, |
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632 address code_start, address code_end, |
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633 Label& L_ok) { |
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634 Label L_fail; |
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635 __ lea(temp_reg, ExternalAddress(code_start)); |
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636 __ cmpptr(pc_reg, temp_reg); |
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637 __ jcc(Assembler::belowEqual, L_fail); |
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638 __ lea(temp_reg, ExternalAddress(code_end)); |
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639 __ cmpptr(pc_reg, temp_reg); |
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640 __ jcc(Assembler::below, L_ok); |
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641 __ bind(L_fail); |
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642 } |
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643 |
0 | 644 static void gen_i2c_adapter(MacroAssembler *masm, |
645 int total_args_passed, | |
646 int comp_args_on_stack, | |
647 const BasicType *sig_bt, | |
648 const VMRegPair *regs) { | |
649 | |
650 // Note: r13 contains the senderSP on entry. We must preserve it since | |
651 // we may do a i2c -> c2i transition if we lose a race where compiled | |
652 // code goes non-entrant while we get args ready. | |
653 // In addition we use r13 to locate all the interpreter args as | |
654 // we must align the stack to 16 bytes on an i2c entry else we | |
655 // lose alignment we expect in all compiled code and register | |
656 // save code can segv when fxsave instructions find improperly | |
657 // aligned stack pointer. | |
658 | |
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659 // Adapters can be frameless because they do not require the caller |
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660 // to perform additional cleanup work, such as correcting the stack pointer. |
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661 // An i2c adapter is frameless because the *caller* frame, which is interpreted, |
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662 // routinely repairs its own stack pointer (from interpreter_frame_last_sp), |
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663 // even if a callee has modified the stack pointer. |
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664 // A c2i adapter is frameless because the *callee* frame, which is interpreted, |
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665 // routinely repairs its caller's stack pointer (from sender_sp, which is set |
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666 // up via the senderSP register). |
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667 // In other words, if *either* the caller or callee is interpreted, we can |
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668 // get the stack pointer repaired after a call. |
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669 // This is why c2i and i2c adapters cannot be indefinitely composed. |
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670 // In particular, if a c2i adapter were to somehow call an i2c adapter, |
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671 // both caller and callee would be compiled methods, and neither would |
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672 // clean up the stack pointer changes performed by the two adapters. |
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673 // If this happens, control eventually transfers back to the compiled |
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674 // caller, but with an uncorrected stack, causing delayed havoc. |
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675 |
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676 // Pick up the return address |
304 | 677 __ movptr(rax, Address(rsp, 0)); |
0 | 678 |
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679 if (VerifyAdapterCalls && |
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680 (Interpreter::code() != NULL || StubRoutines::code1() != NULL)) { |
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681 // So, let's test for cascading c2i/i2c adapters right now. |
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682 // assert(Interpreter::contains($return_addr) || |
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683 // StubRoutines::contains($return_addr), |
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684 // "i2c adapter must return to an interpreter frame"); |
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685 __ block_comment("verify_i2c { "); |
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686 Label L_ok; |
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687 if (Interpreter::code() != NULL) |
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688 range_check(masm, rax, r11, |
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689 Interpreter::code()->code_start(), Interpreter::code()->code_end(), |
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690 L_ok); |
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691 if (StubRoutines::code1() != NULL) |
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692 range_check(masm, rax, r11, |
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693 StubRoutines::code1()->code_begin(), StubRoutines::code1()->code_end(), |
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694 L_ok); |
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695 if (StubRoutines::code2() != NULL) |
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696 range_check(masm, rax, r11, |
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697 StubRoutines::code2()->code_begin(), StubRoutines::code2()->code_end(), |
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698 L_ok); |
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699 const char* msg = "i2c adapter must return to an interpreter frame"; |
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700 __ block_comment(msg); |
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701 __ stop(msg); |
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702 __ bind(L_ok); |
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703 __ block_comment("} verify_i2ce "); |
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704 } |
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705 |
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706 // Must preserve original SP for loading incoming arguments because |
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707 // we need to align the outgoing SP for compiled code. |
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708 __ movptr(r11, rsp); |
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709 |
0 | 710 // Cut-out for having no stack args. Since up to 2 int/oop args are passed |
711 // in registers, we will occasionally have no stack args. | |
712 int comp_words_on_stack = 0; | |
713 if (comp_args_on_stack) { | |
714 // Sig words on the stack are greater-than VMRegImpl::stack0. Those in | |
715 // registers are below. By subtracting stack0, we either get a negative | |
716 // number (all values in registers) or the maximum stack slot accessed. | |
717 | |
718 // Convert 4-byte c2 stack slots to words. | |
719 comp_words_on_stack = round_to(comp_args_on_stack*VMRegImpl::stack_slot_size, wordSize)>>LogBytesPerWord; | |
720 // Round up to miminum stack alignment, in wordSize | |
721 comp_words_on_stack = round_to(comp_words_on_stack, 2); | |
304 | 722 __ subptr(rsp, comp_words_on_stack * wordSize); |
0 | 723 } |
724 | |
725 | |
726 // Ensure compiled code always sees stack at proper alignment | |
304 | 727 __ andptr(rsp, -16); |
0 | 728 |
729 // push the return address and misalign the stack that youngest frame always sees | |
730 // as far as the placement of the call instruction | |
304 | 731 __ push(rax); |
0 | 732 |
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733 // Put saved SP in another register |
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734 const Register saved_sp = rax; |
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735 __ movptr(saved_sp, r11); |
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736 |
0 | 737 // Will jump to the compiled code just as if compiled code was doing it. |
738 // Pre-load the register-jump target early, to schedule it better. | |
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739 __ movptr(r11, Address(rbx, in_bytes(Method::from_compiled_offset()))); |
0 | 740 |
741 // Now generate the shuffle code. Pick up all register args and move the | |
742 // rest through the floating point stack top. | |
743 for (int i = 0; i < total_args_passed; i++) { | |
744 if (sig_bt[i] == T_VOID) { | |
745 // Longs and doubles are passed in native word order, but misaligned | |
746 // in the 32-bit build. | |
747 assert(i > 0 && (sig_bt[i-1] == T_LONG || sig_bt[i-1] == T_DOUBLE), "missing half"); | |
748 continue; | |
749 } | |
750 | |
751 // Pick up 0, 1 or 2 words from SP+offset. | |
752 | |
753 assert(!regs[i].second()->is_valid() || regs[i].first()->next() == regs[i].second(), | |
754 "scrambled load targets?"); | |
755 // Load in argument order going down. | |
1506 | 756 int ld_off = (total_args_passed - i)*Interpreter::stackElementSize; |
0 | 757 // Point to interpreter value (vs. tag) |
1506 | 758 int next_off = ld_off - Interpreter::stackElementSize; |
0 | 759 // |
760 // | |
761 // | |
762 VMReg r_1 = regs[i].first(); | |
763 VMReg r_2 = regs[i].second(); | |
764 if (!r_1->is_valid()) { | |
765 assert(!r_2->is_valid(), ""); | |
766 continue; | |
767 } | |
768 if (r_1->is_stack()) { | |
769 // Convert stack slot to an SP offset (+ wordSize to account for return address ) | |
770 int st_off = regs[i].first()->reg2stack()*VMRegImpl::stack_slot_size + wordSize; | |
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771 |
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772 // We can use r13 as a temp here because compiled code doesn't need r13 as an input |
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773 // and if we end up going thru a c2i because of a miss a reasonable value of r13 |
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774 // will be generated. |
0 | 775 if (!r_2->is_valid()) { |
776 // sign extend??? | |
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777 __ movl(r13, Address(saved_sp, ld_off)); |
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778 __ movptr(Address(rsp, st_off), r13); |
0 | 779 } else { |
780 // | |
781 // We are using two optoregs. This can be either T_OBJECT, T_ADDRESS, T_LONG, or T_DOUBLE | |
782 // the interpreter allocates two slots but only uses one for thr T_LONG or T_DOUBLE case | |
783 // So we must adjust where to pick up the data to match the interpreter. | |
784 // | |
785 // Interpreter local[n] == MSW, local[n+1] == LSW however locals | |
786 // are accessed as negative so LSW is at LOW address | |
787 | |
788 // ld_off is MSW so get LSW | |
789 const int offset = (sig_bt[i]==T_LONG||sig_bt[i]==T_DOUBLE)? | |
790 next_off : ld_off; | |
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791 __ movq(r13, Address(saved_sp, offset)); |
0 | 792 // st_off is LSW (i.e. reg.first()) |
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793 __ movq(Address(rsp, st_off), r13); |
0 | 794 } |
795 } else if (r_1->is_Register()) { // Register argument | |
796 Register r = r_1->as_Register(); | |
797 assert(r != rax, "must be different"); | |
798 if (r_2->is_valid()) { | |
799 // | |
800 // We are using two VMRegs. This can be either T_OBJECT, T_ADDRESS, T_LONG, or T_DOUBLE | |
801 // the interpreter allocates two slots but only uses one for thr T_LONG or T_DOUBLE case | |
802 // So we must adjust where to pick up the data to match the interpreter. | |
803 | |
804 const int offset = (sig_bt[i]==T_LONG||sig_bt[i]==T_DOUBLE)? | |
805 next_off : ld_off; | |
806 | |
807 // this can be a misaligned move | |
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808 __ movq(r, Address(saved_sp, offset)); |
0 | 809 } else { |
810 // sign extend and use a full word? | |
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811 __ movl(r, Address(saved_sp, ld_off)); |
0 | 812 } |
813 } else { | |
814 if (!r_2->is_valid()) { | |
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815 __ movflt(r_1->as_XMMRegister(), Address(saved_sp, ld_off)); |
0 | 816 } else { |
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817 __ movdbl(r_1->as_XMMRegister(), Address(saved_sp, next_off)); |
0 | 818 } |
819 } | |
820 } | |
821 | |
822 // 6243940 We might end up in handle_wrong_method if | |
823 // the callee is deoptimized as we race thru here. If that | |
824 // happens we don't want to take a safepoint because the | |
825 // caller frame will look interpreted and arguments are now | |
826 // "compiled" so it is much better to make this transition | |
827 // invisible to the stack walking code. Unfortunately if | |
828 // we try and find the callee by normal means a safepoint | |
829 // is possible. So we stash the desired callee in the thread | |
830 // and the vm will find there should this case occur. | |
831 | |
304 | 832 __ movptr(Address(r15_thread, JavaThread::callee_target_offset()), rbx); |
0 | 833 |
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834 // put Method* where a c2i would expect should we end up there |
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835 // only needed becaus eof c2 resolve stubs return Method* as a result in |
0 | 836 // rax |
304 | 837 __ mov(rax, rbx); |
0 | 838 __ jmp(r11); |
839 } | |
840 | |
841 // --------------------------------------------------------------- | |
842 AdapterHandlerEntry* SharedRuntime::generate_i2c2i_adapters(MacroAssembler *masm, | |
843 int total_args_passed, | |
844 int comp_args_on_stack, | |
845 const BasicType *sig_bt, | |
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846 const VMRegPair *regs, |
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847 AdapterFingerPrint* fingerprint) { |
0 | 848 address i2c_entry = __ pc(); |
849 | |
850 gen_i2c_adapter(masm, total_args_passed, comp_args_on_stack, sig_bt, regs); | |
851 | |
852 // ------------------------------------------------------------------------- | |
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853 // Generate a C2I adapter. On entry we know rbx holds the Method* during calls |
0 | 854 // to the interpreter. The args start out packed in the compiled layout. They |
855 // need to be unpacked into the interpreter layout. This will almost always | |
856 // require some stack space. We grow the current (compiled) stack, then repack | |
857 // the args. We finally end in a jump to the generic interpreter entry point. | |
858 // On exit from the interpreter, the interpreter will restore our SP (lest the | |
859 // compiled code, which relys solely on SP and not RBP, get sick). | |
860 | |
861 address c2i_unverified_entry = __ pc(); | |
862 Label skip_fixup; | |
863 Label ok; | |
864 | |
865 Register holder = rax; | |
866 Register receiver = j_rarg0; | |
867 Register temp = rbx; | |
868 | |
869 { | |
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870 __ load_klass(temp, receiver); |
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871 __ cmpptr(temp, Address(holder, CompiledICHolder::holder_klass_offset())); |
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872 __ movptr(rbx, Address(holder, CompiledICHolder::holder_method_offset())); |
0 | 873 __ jcc(Assembler::equal, ok); |
874 __ jump(RuntimeAddress(SharedRuntime::get_ic_miss_stub())); | |
875 | |
876 __ bind(ok); | |
877 // Method might have been compiled since the call site was patched to | |
878 // interpreted if that is the case treat it as a miss so we can get | |
879 // the call site corrected. | |
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880 __ cmpptr(Address(rbx, in_bytes(Method::code_offset())), (int32_t)NULL_WORD); |
0 | 881 __ jcc(Assembler::equal, skip_fixup); |
882 __ jump(RuntimeAddress(SharedRuntime::get_ic_miss_stub())); | |
883 } | |
884 | |
885 address c2i_entry = __ pc(); | |
886 | |
887 gen_c2i_adapter(masm, total_args_passed, comp_args_on_stack, sig_bt, regs, skip_fixup); | |
888 | |
889 __ flush(); | |
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890 return AdapterHandlerLibrary::new_entry(fingerprint, i2c_entry, c2i_entry, c2i_unverified_entry); |
0 | 891 } |
892 | |
893 int SharedRuntime::c_calling_convention(const BasicType *sig_bt, | |
894 VMRegPair *regs, | |
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895 VMRegPair *regs2, |
0 | 896 int total_args_passed) { |
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897 assert(regs2 == NULL, "not needed on x86"); |
0 | 898 // We return the amount of VMRegImpl stack slots we need to reserve for all |
899 // the arguments NOT counting out_preserve_stack_slots. | |
900 | |
901 // NOTE: These arrays will have to change when c1 is ported | |
902 #ifdef _WIN64 | |
903 static const Register INT_ArgReg[Argument::n_int_register_parameters_c] = { | |
904 c_rarg0, c_rarg1, c_rarg2, c_rarg3 | |
905 }; | |
906 static const XMMRegister FP_ArgReg[Argument::n_float_register_parameters_c] = { | |
907 c_farg0, c_farg1, c_farg2, c_farg3 | |
908 }; | |
909 #else | |
910 static const Register INT_ArgReg[Argument::n_int_register_parameters_c] = { | |
911 c_rarg0, c_rarg1, c_rarg2, c_rarg3, c_rarg4, c_rarg5 | |
912 }; | |
913 static const XMMRegister FP_ArgReg[Argument::n_float_register_parameters_c] = { | |
914 c_farg0, c_farg1, c_farg2, c_farg3, | |
915 c_farg4, c_farg5, c_farg6, c_farg7 | |
916 }; | |
917 #endif // _WIN64 | |
918 | |
919 | |
920 uint int_args = 0; | |
921 uint fp_args = 0; | |
922 uint stk_args = 0; // inc by 2 each time | |
923 | |
924 for (int i = 0; i < total_args_passed; i++) { | |
925 switch (sig_bt[i]) { | |
926 case T_BOOLEAN: | |
927 case T_CHAR: | |
928 case T_BYTE: | |
929 case T_SHORT: | |
930 case T_INT: | |
931 if (int_args < Argument::n_int_register_parameters_c) { | |
932 regs[i].set1(INT_ArgReg[int_args++]->as_VMReg()); | |
933 #ifdef _WIN64 | |
934 fp_args++; | |
935 // Allocate slots for callee to stuff register args the stack. | |
936 stk_args += 2; | |
937 #endif | |
938 } else { | |
939 regs[i].set1(VMRegImpl::stack2reg(stk_args)); | |
940 stk_args += 2; | |
941 } | |
942 break; | |
943 case T_LONG: | |
944 assert(sig_bt[i + 1] == T_VOID, "expecting half"); | |
945 // fall through | |
946 case T_OBJECT: | |
947 case T_ARRAY: | |
948 case T_ADDRESS: | |
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949 case T_METADATA: |
0 | 950 if (int_args < Argument::n_int_register_parameters_c) { |
951 regs[i].set2(INT_ArgReg[int_args++]->as_VMReg()); | |
952 #ifdef _WIN64 | |
953 fp_args++; | |
954 stk_args += 2; | |
955 #endif | |
956 } else { | |
957 regs[i].set2(VMRegImpl::stack2reg(stk_args)); | |
958 stk_args += 2; | |
959 } | |
960 break; | |
961 case T_FLOAT: | |
962 if (fp_args < Argument::n_float_register_parameters_c) { | |
963 regs[i].set1(FP_ArgReg[fp_args++]->as_VMReg()); | |
964 #ifdef _WIN64 | |
965 int_args++; | |
966 // Allocate slots for callee to stuff register args the stack. | |
967 stk_args += 2; | |
968 #endif | |
969 } else { | |
970 regs[i].set1(VMRegImpl::stack2reg(stk_args)); | |
971 stk_args += 2; | |
972 } | |
973 break; | |
974 case T_DOUBLE: | |
975 assert(sig_bt[i + 1] == T_VOID, "expecting half"); | |
976 if (fp_args < Argument::n_float_register_parameters_c) { | |
977 regs[i].set2(FP_ArgReg[fp_args++]->as_VMReg()); | |
978 #ifdef _WIN64 | |
979 int_args++; | |
980 // Allocate slots for callee to stuff register args the stack. | |
981 stk_args += 2; | |
982 #endif | |
983 } else { | |
984 regs[i].set2(VMRegImpl::stack2reg(stk_args)); | |
985 stk_args += 2; | |
986 } | |
987 break; | |
988 case T_VOID: // Halves of longs and doubles | |
989 assert(i != 0 && (sig_bt[i - 1] == T_LONG || sig_bt[i - 1] == T_DOUBLE), "expecting half"); | |
990 regs[i].set_bad(); | |
991 break; | |
992 default: | |
993 ShouldNotReachHere(); | |
994 break; | |
995 } | |
996 } | |
997 #ifdef _WIN64 | |
998 // windows abi requires that we always allocate enough stack space | |
999 // for 4 64bit registers to be stored down. | |
1000 if (stk_args < 8) { | |
1001 stk_args = 8; | |
1002 } | |
1003 #endif // _WIN64 | |
1004 | |
1005 return stk_args; | |
1006 } | |
1007 | |
1008 // On 64 bit we will store integer like items to the stack as | |
1009 // 64 bits items (sparc abi) even though java would only store | |
1010 // 32bits for a parameter. On 32bit it will simply be 32 bits | |
1011 // So this routine will do 32->32 on 32bit and 32->64 on 64bit | |
1012 static void move32_64(MacroAssembler* masm, VMRegPair src, VMRegPair dst) { | |
1013 if (src.first()->is_stack()) { | |
1014 if (dst.first()->is_stack()) { | |
1015 // stack to stack | |
1016 __ movslq(rax, Address(rbp, reg2offset_in(src.first()))); | |
1017 __ movq(Address(rsp, reg2offset_out(dst.first())), rax); | |
1018 } else { | |
1019 // stack to reg | |
1020 __ movslq(dst.first()->as_Register(), Address(rbp, reg2offset_in(src.first()))); | |
1021 } | |
1022 } else if (dst.first()->is_stack()) { | |
1023 // reg to stack | |
1024 // Do we really have to sign extend??? | |
1025 // __ movslq(src.first()->as_Register(), src.first()->as_Register()); | |
1026 __ movq(Address(rsp, reg2offset_out(dst.first())), src.first()->as_Register()); | |
1027 } else { | |
1028 // Do we really have to sign extend??? | |
1029 // __ movslq(dst.first()->as_Register(), src.first()->as_Register()); | |
1030 if (dst.first() != src.first()) { | |
1031 __ movq(dst.first()->as_Register(), src.first()->as_Register()); | |
1032 } | |
1033 } | |
1034 } | |
1035 | |
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1036 static void move_ptr(MacroAssembler* masm, VMRegPair src, VMRegPair dst) { |
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1037 if (src.first()->is_stack()) { |
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1038 if (dst.first()->is_stack()) { |
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1039 // stack to stack |
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1040 __ movq(rax, Address(rbp, reg2offset_in(src.first()))); |
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1041 __ movq(Address(rsp, reg2offset_out(dst.first())), rax); |
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1042 } else { |
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1043 // stack to reg |
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1044 __ movq(dst.first()->as_Register(), Address(rbp, reg2offset_in(src.first()))); |
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1045 } |
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1046 } else if (dst.first()->is_stack()) { |
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1047 // reg to stack |
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1048 __ movq(Address(rsp, reg2offset_out(dst.first())), src.first()->as_Register()); |
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1049 } else { |
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1050 if (dst.first() != src.first()) { |
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1051 __ movq(dst.first()->as_Register(), src.first()->as_Register()); |
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1052 } |
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1053 } |
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1054 } |
0 | 1055 |
1056 // An oop arg. Must pass a handle not the oop itself | |
1057 static void object_move(MacroAssembler* masm, | |
1058 OopMap* map, | |
1059 int oop_handle_offset, | |
1060 int framesize_in_slots, | |
1061 VMRegPair src, | |
1062 VMRegPair dst, | |
1063 bool is_receiver, | |
1064 int* receiver_offset) { | |
1065 | |
1066 // must pass a handle. First figure out the location we use as a handle | |
1067 | |
1068 Register rHandle = dst.first()->is_stack() ? rax : dst.first()->as_Register(); | |
1069 | |
1070 // See if oop is NULL if it is we need no handle | |
1071 | |
1072 if (src.first()->is_stack()) { | |
1073 | |
1074 // Oop is already on the stack as an argument | |
1075 int offset_in_older_frame = src.first()->reg2stack() + SharedRuntime::out_preserve_stack_slots(); | |
1076 map->set_oop(VMRegImpl::stack2reg(offset_in_older_frame + framesize_in_slots)); | |
1077 if (is_receiver) { | |
1078 *receiver_offset = (offset_in_older_frame + framesize_in_slots) * VMRegImpl::stack_slot_size; | |
1079 } | |
1080 | |
304 | 1081 __ cmpptr(Address(rbp, reg2offset_in(src.first())), (int32_t)NULL_WORD); |
1082 __ lea(rHandle, Address(rbp, reg2offset_in(src.first()))); | |
0 | 1083 // conditionally move a NULL |
304 | 1084 __ cmovptr(Assembler::equal, rHandle, Address(rbp, reg2offset_in(src.first()))); |
0 | 1085 } else { |
1086 | |
1087 // Oop is in an a register we must store it to the space we reserve | |
1088 // on the stack for oop_handles and pass a handle if oop is non-NULL | |
1089 | |
1090 const Register rOop = src.first()->as_Register(); | |
1091 int oop_slot; | |
1092 if (rOop == j_rarg0) | |
1093 oop_slot = 0; | |
1094 else if (rOop == j_rarg1) | |
1095 oop_slot = 1; | |
1096 else if (rOop == j_rarg2) | |
1097 oop_slot = 2; | |
1098 else if (rOop == j_rarg3) | |
1099 oop_slot = 3; | |
1100 else if (rOop == j_rarg4) | |
1101 oop_slot = 4; | |
1102 else { | |
1103 assert(rOop == j_rarg5, "wrong register"); | |
1104 oop_slot = 5; | |
1105 } | |
1106 | |
1107 oop_slot = oop_slot * VMRegImpl::slots_per_word + oop_handle_offset; | |
1108 int offset = oop_slot*VMRegImpl::stack_slot_size; | |
1109 | |
1110 map->set_oop(VMRegImpl::stack2reg(oop_slot)); | |
1111 // Store oop in handle area, may be NULL | |
304 | 1112 __ movptr(Address(rsp, offset), rOop); |
0 | 1113 if (is_receiver) { |
1114 *receiver_offset = offset; | |
1115 } | |
1116 | |
304 | 1117 __ cmpptr(rOop, (int32_t)NULL_WORD); |
1118 __ lea(rHandle, Address(rsp, offset)); | |
0 | 1119 // conditionally move a NULL from the handle area where it was just stored |
304 | 1120 __ cmovptr(Assembler::equal, rHandle, Address(rsp, offset)); |
0 | 1121 } |
1122 | |
1123 // If arg is on the stack then place it otherwise it is already in correct reg. | |
1124 if (dst.first()->is_stack()) { | |
304 | 1125 __ movptr(Address(rsp, reg2offset_out(dst.first())), rHandle); |
0 | 1126 } |
1127 } | |
1128 | |
1129 // A float arg may have to do float reg int reg conversion | |
1130 static void float_move(MacroAssembler* masm, VMRegPair src, VMRegPair dst) { | |
1131 assert(!src.second()->is_valid() && !dst.second()->is_valid(), "bad float_move"); | |
1132 | |
1133 // The calling conventions assures us that each VMregpair is either | |
1134 // all really one physical register or adjacent stack slots. | |
1135 // This greatly simplifies the cases here compared to sparc. | |
1136 | |
1137 if (src.first()->is_stack()) { | |
1138 if (dst.first()->is_stack()) { | |
1139 __ movl(rax, Address(rbp, reg2offset_in(src.first()))); | |
304 | 1140 __ movptr(Address(rsp, reg2offset_out(dst.first())), rax); |
0 | 1141 } else { |
1142 // stack to reg | |
1143 assert(dst.first()->is_XMMRegister(), "only expect xmm registers as parameters"); | |
1144 __ movflt(dst.first()->as_XMMRegister(), Address(rbp, reg2offset_in(src.first()))); | |
1145 } | |
1146 } else if (dst.first()->is_stack()) { | |
1147 // reg to stack | |
1148 assert(src.first()->is_XMMRegister(), "only expect xmm registers as parameters"); | |
1149 __ movflt(Address(rsp, reg2offset_out(dst.first())), src.first()->as_XMMRegister()); | |
1150 } else { | |
1151 // reg to reg | |
1152 // In theory these overlap but the ordering is such that this is likely a nop | |
1153 if ( src.first() != dst.first()) { | |
1154 __ movdbl(dst.first()->as_XMMRegister(), src.first()->as_XMMRegister()); | |
1155 } | |
1156 } | |
1157 } | |
1158 | |
1159 // A long move | |
1160 static void long_move(MacroAssembler* masm, VMRegPair src, VMRegPair dst) { | |
1161 | |
1162 // The calling conventions assures us that each VMregpair is either | |
1163 // all really one physical register or adjacent stack slots. | |
1164 // This greatly simplifies the cases here compared to sparc. | |
1165 | |
1166 if (src.is_single_phys_reg() ) { | |
1167 if (dst.is_single_phys_reg()) { | |
1168 if (dst.first() != src.first()) { | |
304 | 1169 __ mov(dst.first()->as_Register(), src.first()->as_Register()); |
0 | 1170 } |
1171 } else { | |
1172 assert(dst.is_single_reg(), "not a stack pair"); | |
1173 __ movq(Address(rsp, reg2offset_out(dst.first())), src.first()->as_Register()); | |
1174 } | |
1175 } else if (dst.is_single_phys_reg()) { | |
1176 assert(src.is_single_reg(), "not a stack pair"); | |
1177 __ movq(dst.first()->as_Register(), Address(rbp, reg2offset_out(src.first()))); | |
1178 } else { | |
1179 assert(src.is_single_reg() && dst.is_single_reg(), "not stack pairs"); | |
1180 __ movq(rax, Address(rbp, reg2offset_in(src.first()))); | |
1181 __ movq(Address(rsp, reg2offset_out(dst.first())), rax); | |
1182 } | |
1183 } | |
1184 | |
1185 // A double move | |
1186 static void double_move(MacroAssembler* masm, VMRegPair src, VMRegPair dst) { | |
1187 | |
1188 // The calling conventions assures us that each VMregpair is either | |
1189 // all really one physical register or adjacent stack slots. | |
1190 // This greatly simplifies the cases here compared to sparc. | |
1191 | |
1192 if (src.is_single_phys_reg() ) { | |
1193 if (dst.is_single_phys_reg()) { | |
1194 // In theory these overlap but the ordering is such that this is likely a nop | |
1195 if ( src.first() != dst.first()) { | |
1196 __ movdbl(dst.first()->as_XMMRegister(), src.first()->as_XMMRegister()); | |
1197 } | |
1198 } else { | |
1199 assert(dst.is_single_reg(), "not a stack pair"); | |
1200 __ movdbl(Address(rsp, reg2offset_out(dst.first())), src.first()->as_XMMRegister()); | |
1201 } | |
1202 } else if (dst.is_single_phys_reg()) { | |
1203 assert(src.is_single_reg(), "not a stack pair"); | |
1204 __ movdbl(dst.first()->as_XMMRegister(), Address(rbp, reg2offset_out(src.first()))); | |
1205 } else { | |
1206 assert(src.is_single_reg() && dst.is_single_reg(), "not stack pairs"); | |
1207 __ movq(rax, Address(rbp, reg2offset_in(src.first()))); | |
1208 __ movq(Address(rsp, reg2offset_out(dst.first())), rax); | |
1209 } | |
1210 } | |
1211 | |
1212 | |
1213 void SharedRuntime::save_native_result(MacroAssembler *masm, BasicType ret_type, int frame_slots) { | |
1214 // We always ignore the frame_slots arg and just use the space just below frame pointer | |
1215 // which by this time is free to use | |
1216 switch (ret_type) { | |
1217 case T_FLOAT: | |
1218 __ movflt(Address(rbp, -wordSize), xmm0); | |
1219 break; | |
1220 case T_DOUBLE: | |
1221 __ movdbl(Address(rbp, -wordSize), xmm0); | |
1222 break; | |
1223 case T_VOID: break; | |
1224 default: { | |
304 | 1225 __ movptr(Address(rbp, -wordSize), rax); |
0 | 1226 } |
1227 } | |
1228 } | |
1229 | |
1230 void SharedRuntime::restore_native_result(MacroAssembler *masm, BasicType ret_type, int frame_slots) { | |
1231 // We always ignore the frame_slots arg and just use the space just below frame pointer | |
1232 // which by this time is free to use | |
1233 switch (ret_type) { | |
1234 case T_FLOAT: | |
1235 __ movflt(xmm0, Address(rbp, -wordSize)); | |
1236 break; | |
1237 case T_DOUBLE: | |
1238 __ movdbl(xmm0, Address(rbp, -wordSize)); | |
1239 break; | |
1240 case T_VOID: break; | |
1241 default: { | |
304 | 1242 __ movptr(rax, Address(rbp, -wordSize)); |
0 | 1243 } |
1244 } | |
1245 } | |
1246 | |
1247 static void save_args(MacroAssembler *masm, int arg_count, int first_arg, VMRegPair *args) { | |
1248 for ( int i = first_arg ; i < arg_count ; i++ ) { | |
1249 if (args[i].first()->is_Register()) { | |
304 | 1250 __ push(args[i].first()->as_Register()); |
0 | 1251 } else if (args[i].first()->is_XMMRegister()) { |
304 | 1252 __ subptr(rsp, 2*wordSize); |
0 | 1253 __ movdbl(Address(rsp, 0), args[i].first()->as_XMMRegister()); |
1254 } | |
1255 } | |
1256 } | |
1257 | |
1258 static void restore_args(MacroAssembler *masm, int arg_count, int first_arg, VMRegPair *args) { | |
1259 for ( int i = arg_count - 1 ; i >= first_arg ; i-- ) { | |
1260 if (args[i].first()->is_Register()) { | |
304 | 1261 __ pop(args[i].first()->as_Register()); |
0 | 1262 } else if (args[i].first()->is_XMMRegister()) { |
1263 __ movdbl(args[i].first()->as_XMMRegister(), Address(rsp, 0)); | |
304 | 1264 __ addptr(rsp, 2*wordSize); |
0 | 1265 } |
1266 } | |
1267 } | |
1268 | |
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1269 |
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1270 static void save_or_restore_arguments(MacroAssembler* masm, |
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1271 const int stack_slots, |
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1272 const int total_in_args, |
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1273 const int arg_save_area, |
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1274 OopMap* map, |
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1275 VMRegPair* in_regs, |
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1276 BasicType* in_sig_bt) { |
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1277 // if map is non-NULL then the code should store the values, |
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1278 // otherwise it should load them. |
5905 | 1279 int slot = arg_save_area; |
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1280 // Save down double word first |
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1281 for ( int i = 0; i < total_in_args; i++) { |
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1282 if (in_regs[i].first()->is_XMMRegister() && in_sig_bt[i] == T_DOUBLE) { |
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1283 int offset = slot * VMRegImpl::stack_slot_size; |
5905 | 1284 slot += VMRegImpl::slots_per_word; |
1285 assert(slot <= stack_slots, "overflow"); | |
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1286 if (map != NULL) { |
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1287 __ movdbl(Address(rsp, offset), in_regs[i].first()->as_XMMRegister()); |
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1288 } else { |
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1289 __ movdbl(in_regs[i].first()->as_XMMRegister(), Address(rsp, offset)); |
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1290 } |
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1291 } |
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1292 if (in_regs[i].first()->is_Register() && |
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1293 (in_sig_bt[i] == T_LONG || in_sig_bt[i] == T_ARRAY)) { |
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1294 int offset = slot * VMRegImpl::stack_slot_size; |
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1295 if (map != NULL) { |
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1296 __ movq(Address(rsp, offset), in_regs[i].first()->as_Register()); |
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1297 if (in_sig_bt[i] == T_ARRAY) { |
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1298 map->set_oop(VMRegImpl::stack2reg(slot));; |
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1299 } |
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1300 } else { |
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1301 __ movq(in_regs[i].first()->as_Register(), Address(rsp, offset)); |
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1302 } |
5907 | 1303 slot += VMRegImpl::slots_per_word; |
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1304 } |
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1305 } |
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1306 // Save or restore single word registers |
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1307 for ( int i = 0; i < total_in_args; i++) { |
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1308 if (in_regs[i].first()->is_Register()) { |
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1309 int offset = slot * VMRegImpl::stack_slot_size; |
5905 | 1310 slot++; |
1311 assert(slot <= stack_slots, "overflow"); | |
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1312 |
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1313 // Value is in an input register pass we must flush it to the stack |
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1314 const Register reg = in_regs[i].first()->as_Register(); |
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1315 switch (in_sig_bt[i]) { |
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1316 case T_BOOLEAN: |
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1317 case T_CHAR: |
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1318 case T_BYTE: |
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1319 case T_SHORT: |
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1320 case T_INT: |
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1321 if (map != NULL) { |
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1322 __ movl(Address(rsp, offset), reg); |
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1323 } else { |
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1324 __ movl(reg, Address(rsp, offset)); |
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1325 } |
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1326 break; |
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1327 case T_ARRAY: |
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1328 case T_LONG: |
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1329 // handled above |
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1330 break; |
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1331 case T_OBJECT: |
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1332 default: ShouldNotReachHere(); |
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1333 } |
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1334 } else if (in_regs[i].first()->is_XMMRegister()) { |
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1335 if (in_sig_bt[i] == T_FLOAT) { |
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1336 int offset = slot * VMRegImpl::stack_slot_size; |
5905 | 1337 slot++; |
1338 assert(slot <= stack_slots, "overflow"); | |
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1339 if (map != NULL) { |
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1340 __ movflt(Address(rsp, offset), in_regs[i].first()->as_XMMRegister()); |
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1341 } else { |
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1342 __ movflt(in_regs[i].first()->as_XMMRegister(), Address(rsp, offset)); |
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1343 } |
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1344 } |
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1345 } else if (in_regs[i].first()->is_stack()) { |
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1346 if (in_sig_bt[i] == T_ARRAY && map != NULL) { |
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1347 int offset_in_older_frame = in_regs[i].first()->reg2stack() + SharedRuntime::out_preserve_stack_slots(); |
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1348 map->set_oop(VMRegImpl::stack2reg(offset_in_older_frame + stack_slots)); |
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1349 } |
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1350 } |
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1351 } |
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1352 } |
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1353 |
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1354 |
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1355 // Check GC_locker::needs_gc and enter the runtime if it's true. This |
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1356 // keeps a new JNI critical region from starting until a GC has been |
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1357 // forced. Save down any oops in registers and describe them in an |
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1358 // OopMap. |
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1359 static void check_needs_gc_for_critical_native(MacroAssembler* masm, |
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1360 int stack_slots, |
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1361 int total_c_args, |
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1362 int total_in_args, |
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1363 int arg_save_area, |
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1364 OopMapSet* oop_maps, |
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1365 VMRegPair* in_regs, |
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1366 BasicType* in_sig_bt) { |
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1367 __ block_comment("check GC_locker::needs_gc"); |
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1368 Label cont; |
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1369 __ cmp8(ExternalAddress((address)GC_locker::needs_gc_address()), false); |
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1370 __ jcc(Assembler::equal, cont); |
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1371 |
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1372 // Save down any incoming oops and call into the runtime to halt for a GC |
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1373 |
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1374 OopMap* map = new OopMap(stack_slots * 2, 0 /* arg_slots*/); |
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1375 save_or_restore_arguments(masm, stack_slots, total_in_args, |
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1376 arg_save_area, map, in_regs, in_sig_bt); |
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1377 |
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1378 address the_pc = __ pc(); |
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1379 oop_maps->add_gc_map( __ offset(), map); |
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1380 __ set_last_Java_frame(rsp, noreg, the_pc); |
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1381 |
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1382 __ block_comment("block_for_jni_critical"); |
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1383 __ movptr(c_rarg0, r15_thread); |
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1384 __ mov(r12, rsp); // remember sp |
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1385 __ subptr(rsp, frame::arg_reg_save_area_bytes); // windows |
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1386 __ andptr(rsp, -16); // align stack as required by ABI |
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1387 __ call(RuntimeAddress(CAST_FROM_FN_PTR(address, SharedRuntime::block_for_jni_critical))); |
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1388 __ mov(rsp, r12); // restore sp |
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1389 __ reinit_heapbase(); |
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1390 |
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1391 __ reset_last_Java_frame(false, true); |
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1392 |
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1393 save_or_restore_arguments(masm, stack_slots, total_in_args, |
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1394 arg_save_area, NULL, in_regs, in_sig_bt); |
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1395 |
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1396 __ bind(cont); |
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1397 #ifdef ASSERT |
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1398 if (StressCriticalJNINatives) { |
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1399 // Stress register saving |
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1400 OopMap* map = new OopMap(stack_slots * 2, 0 /* arg_slots*/); |
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1401 save_or_restore_arguments(masm, stack_slots, total_in_args, |
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1402 arg_save_area, map, in_regs, in_sig_bt); |
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1403 // Destroy argument registers |
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1404 for (int i = 0; i < total_in_args - 1; i++) { |
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1405 if (in_regs[i].first()->is_Register()) { |
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1406 const Register reg = in_regs[i].first()->as_Register(); |
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1407 __ xorptr(reg, reg); |
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1408 } else if (in_regs[i].first()->is_XMMRegister()) { |
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1409 __ xorpd(in_regs[i].first()->as_XMMRegister(), in_regs[i].first()->as_XMMRegister()); |
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1410 } else if (in_regs[i].first()->is_FloatRegister()) { |
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1411 ShouldNotReachHere(); |
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1412 } else if (in_regs[i].first()->is_stack()) { |
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1413 // Nothing to do |
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1414 } else { |
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1415 ShouldNotReachHere(); |
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1416 } |
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1417 if (in_sig_bt[i] == T_LONG || in_sig_bt[i] == T_DOUBLE) { |
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1418 i++; |
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1419 } |
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1420 } |
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1421 |
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1422 save_or_restore_arguments(masm, stack_slots, total_in_args, |
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1423 arg_save_area, NULL, in_regs, in_sig_bt); |
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1424 } |
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1425 #endif |
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1426 } |
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1427 |
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1428 // Unpack an array argument into a pointer to the body and the length |
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1429 // if the array is non-null, otherwise pass 0 for both. |
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1430 static void unpack_array_argument(MacroAssembler* masm, VMRegPair reg, BasicType in_elem_type, VMRegPair body_arg, VMRegPair length_arg) { |
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1431 Register tmp_reg = rax; |
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1432 assert(!body_arg.first()->is_Register() || body_arg.first()->as_Register() != tmp_reg, |
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1433 "possible collision"); |
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1434 assert(!length_arg.first()->is_Register() || length_arg.first()->as_Register() != tmp_reg, |
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1435 "possible collision"); |
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1436 |
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1437 __ block_comment("unpack_array_argument {"); |
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1438 |
4873
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1439 // Pass the length, ptr pair |
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1440 Label is_null, done; |
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1441 VMRegPair tmp; |
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1442 tmp.set_ptr(tmp_reg->as_VMReg()); |
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1443 if (reg.first()->is_stack()) { |
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1444 // Load the arg up from the stack |
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1445 move_ptr(masm, reg, tmp); |
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1446 reg = tmp; |
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1447 } |
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1448 __ testptr(reg.first()->as_Register(), reg.first()->as_Register()); |
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1449 __ jccb(Assembler::equal, is_null); |
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1450 __ lea(tmp_reg, Address(reg.first()->as_Register(), arrayOopDesc::base_offset_in_bytes(in_elem_type))); |
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1451 move_ptr(masm, tmp, body_arg); |
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1452 // load the length relative to the body. |
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1453 __ movl(tmp_reg, Address(tmp_reg, arrayOopDesc::length_offset_in_bytes() - |
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1454 arrayOopDesc::base_offset_in_bytes(in_elem_type))); |
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1455 move32_64(masm, tmp, length_arg); |
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1456 __ jmpb(done); |
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1457 __ bind(is_null); |
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1458 // Pass zeros |
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1459 __ xorptr(tmp_reg, tmp_reg); |
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1460 move_ptr(masm, tmp, body_arg); |
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1461 move32_64(masm, tmp, length_arg); |
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1462 __ bind(done); |
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1463 |
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1464 __ block_comment("} unpack_array_argument"); |
4873
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1465 } |
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1466 |
5905 | 1467 |
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1468 // Different signatures may require very different orders for the move |
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1469 // to avoid clobbering other arguments. There's no simple way to |
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1470 // order them safely. Compute a safe order for issuing stores and |
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1471 // break any cycles in those stores. This code is fairly general but |
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1472 // it's not necessary on the other platforms so we keep it in the |
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1473 // platform dependent code instead of moving it into a shared file. |
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1474 // (See bugs 7013347 & 7145024.) |
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1475 // Note that this code is specific to LP64. |
5905 | 1476 class ComputeMoveOrder: public StackObj { |
1477 class MoveOperation: public ResourceObj { | |
1478 friend class ComputeMoveOrder; | |
1479 private: | |
1480 VMRegPair _src; | |
1481 VMRegPair _dst; | |
1482 int _src_index; | |
1483 int _dst_index; | |
1484 bool _processed; | |
1485 MoveOperation* _next; | |
1486 MoveOperation* _prev; | |
1487 | |
1488 static int get_id(VMRegPair r) { | |
1489 return r.first()->value(); | |
1490 } | |
1491 | |
1492 public: | |
1493 MoveOperation(int src_index, VMRegPair src, int dst_index, VMRegPair dst): | |
1494 _src(src) | |
1495 , _src_index(src_index) | |
1496 , _dst(dst) | |
1497 , _dst_index(dst_index) | |
1498 , _next(NULL) | |
1499 , _prev(NULL) | |
1500 , _processed(false) { | |
1501 } | |
1502 | |
1503 VMRegPair src() const { return _src; } | |
1504 int src_id() const { return get_id(src()); } | |
1505 int src_index() const { return _src_index; } | |
1506 VMRegPair dst() const { return _dst; } | |
1507 void set_dst(int i, VMRegPair dst) { _dst_index = i, _dst = dst; } | |
1508 int dst_index() const { return _dst_index; } | |
1509 int dst_id() const { return get_id(dst()); } | |
1510 MoveOperation* next() const { return _next; } | |
1511 MoveOperation* prev() const { return _prev; } | |
1512 void set_processed() { _processed = true; } | |
1513 bool is_processed() const { return _processed; } | |
1514 | |
1515 // insert | |
1516 void break_cycle(VMRegPair temp_register) { | |
1517 // create a new store following the last store | |
1518 // to move from the temp_register to the original | |
1519 MoveOperation* new_store = new MoveOperation(-1, temp_register, dst_index(), dst()); | |
1520 | |
1521 // break the cycle of links and insert new_store at the end | |
1522 // break the reverse link. | |
1523 MoveOperation* p = prev(); | |
1524 assert(p->next() == this, "must be"); | |
1525 _prev = NULL; | |
1526 p->_next = new_store; | |
1527 new_store->_prev = p; | |
1528 | |
1529 // change the original store to save it's value in the temp. | |
1530 set_dst(-1, temp_register); | |
1531 } | |
1532 | |
1533 void link(GrowableArray<MoveOperation*>& killer) { | |
1534 // link this store in front the store that it depends on | |
1535 MoveOperation* n = killer.at_grow(src_id(), NULL); | |
1536 if (n != NULL) { | |
1537 assert(_next == NULL && n->_prev == NULL, "shouldn't have been set yet"); | |
1538 _next = n; | |
1539 n->_prev = this; | |
1540 } | |
1541 } | |
1542 }; | |
1543 | |
1544 private: | |
1545 GrowableArray<MoveOperation*> edges; | |
1546 | |
1547 public: | |
1548 ComputeMoveOrder(int total_in_args, VMRegPair* in_regs, int total_c_args, VMRegPair* out_regs, | |
1549 BasicType* in_sig_bt, GrowableArray<int>& arg_order, VMRegPair tmp_vmreg) { | |
1550 // Move operations where the dest is the stack can all be | |
1551 // scheduled first since they can't interfere with the other moves. | |
1552 for (int i = total_in_args - 1, c_arg = total_c_args - 1; i >= 0; i--, c_arg--) { | |
1553 if (in_sig_bt[i] == T_ARRAY) { | |
1554 c_arg--; | |
1555 if (out_regs[c_arg].first()->is_stack() && | |
1556 out_regs[c_arg + 1].first()->is_stack()) { | |
1557 arg_order.push(i); | |
1558 arg_order.push(c_arg); | |
1559 } else { | |
1560 if (out_regs[c_arg].first()->is_stack() || | |
1561 in_regs[i].first() == out_regs[c_arg].first()) { | |
1562 add_edge(i, in_regs[i].first(), c_arg, out_regs[c_arg + 1]); | |
1563 } else { | |
1564 add_edge(i, in_regs[i].first(), c_arg, out_regs[c_arg]); | |
1565 } | |
1566 } | |
1567 } else if (in_sig_bt[i] == T_VOID) { | |
1568 arg_order.push(i); | |
1569 arg_order.push(c_arg); | |
1570 } else { | |
1571 if (out_regs[c_arg].first()->is_stack() || | |
1572 in_regs[i].first() == out_regs[c_arg].first()) { | |
1573 arg_order.push(i); | |
1574 arg_order.push(c_arg); | |
1575 } else { | |
1576 add_edge(i, in_regs[i].first(), c_arg, out_regs[c_arg]); | |
1577 } | |
1578 } | |
1579 } | |
1580 // Break any cycles in the register moves and emit the in the | |
1581 // proper order. | |
1582 GrowableArray<MoveOperation*>* stores = get_store_order(tmp_vmreg); | |
1583 for (int i = 0; i < stores->length(); i++) { | |
1584 arg_order.push(stores->at(i)->src_index()); | |
1585 arg_order.push(stores->at(i)->dst_index()); | |
1586 } | |
1587 } | |
1588 | |
1589 // Collected all the move operations | |
1590 void add_edge(int src_index, VMRegPair src, int dst_index, VMRegPair dst) { | |
1591 if (src.first() == dst.first()) return; | |
1592 edges.append(new MoveOperation(src_index, src, dst_index, dst)); | |
1593 } | |
1594 | |
1595 // Walk the edges breaking cycles between moves. The result list | |
1596 // can be walked in order to produce the proper set of loads | |
1597 GrowableArray<MoveOperation*>* get_store_order(VMRegPair temp_register) { | |
1598 // Record which moves kill which values | |
1599 GrowableArray<MoveOperation*> killer; | |
1600 for (int i = 0; i < edges.length(); i++) { | |
1601 MoveOperation* s = edges.at(i); | |
1602 assert(killer.at_grow(s->dst_id(), NULL) == NULL, "only one killer"); | |
1603 killer.at_put_grow(s->dst_id(), s, NULL); | |
1604 } | |
1605 assert(killer.at_grow(MoveOperation::get_id(temp_register), NULL) == NULL, | |
1606 "make sure temp isn't in the registers that are killed"); | |
1607 | |
1608 // create links between loads and stores | |
1609 for (int i = 0; i < edges.length(); i++) { | |
1610 edges.at(i)->link(killer); | |
1611 } | |
1612 | |
1613 // at this point, all the move operations are chained together | |
1614 // in a doubly linked list. Processing it backwards finds | |
1615 // the beginning of the chain, forwards finds the end. If there's | |
1616 // a cycle it can be broken at any point, so pick an edge and walk | |
1617 // backward until the list ends or we end where we started. | |
1618 GrowableArray<MoveOperation*>* stores = new GrowableArray<MoveOperation*>(); | |
1619 for (int e = 0; e < edges.length(); e++) { | |
1620 MoveOperation* s = edges.at(e); | |
1621 if (!s->is_processed()) { | |
1622 MoveOperation* start = s; | |
1623 // search for the beginning of the chain or cycle | |
1624 while (start->prev() != NULL && start->prev() != s) { | |
1625 start = start->prev(); | |
1626 } | |
1627 if (start->prev() == s) { | |
1628 start->break_cycle(temp_register); | |
1629 } | |
1630 // walk the chain forward inserting to store list | |
1631 while (start != NULL) { | |
1632 stores->append(start); | |
1633 start->set_processed(); | |
1634 start = start->next(); | |
1635 } | |
1636 } | |
1637 } | |
1638 return stores; | |
1639 } | |
1640 }; | |
1641 | |
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1642 static void verify_oop_args(MacroAssembler* masm, |
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1643 methodHandle method, |
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1644 const BasicType* sig_bt, |
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1645 const VMRegPair* regs) { |
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1646 Register temp_reg = rbx; // not part of any compiled calling seq |
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1647 if (VerifyOops) { |
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1648 for (int i = 0; i < method->size_of_parameters(); i++) { |
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1649 if (sig_bt[i] == T_OBJECT || |
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1650 sig_bt[i] == T_ARRAY) { |
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1651 VMReg r = regs[i].first(); |
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1652 assert(r->is_valid(), "bad oop arg"); |
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1653 if (r->is_stack()) { |
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1654 __ movptr(temp_reg, Address(rsp, r->reg2stack() * VMRegImpl::stack_slot_size + wordSize)); |
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1655 __ verify_oop(temp_reg); |
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1656 } else { |
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1657 __ verify_oop(r->as_Register()); |
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1658 } |
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1659 } |
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1660 } |
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1661 } |
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1662 } |
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1663 |
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1664 static void gen_special_dispatch(MacroAssembler* masm, |
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1665 methodHandle method, |
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1666 const BasicType* sig_bt, |
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1667 const VMRegPair* regs) { |
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1668 verify_oop_args(masm, method, sig_bt, regs); |
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1669 vmIntrinsics::ID iid = method->intrinsic_id(); |
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1670 |
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1671 // Now write the args into the outgoing interpreter space |
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1672 bool has_receiver = false; |
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1673 Register receiver_reg = noreg; |
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1674 int member_arg_pos = -1; |
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1675 Register member_reg = noreg; |
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1676 int ref_kind = MethodHandles::signature_polymorphic_intrinsic_ref_kind(iid); |
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1677 if (ref_kind != 0) { |
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1678 member_arg_pos = method->size_of_parameters() - 1; // trailing MemberName argument |
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1679 member_reg = rbx; // known to be free at this point |
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1680 has_receiver = MethodHandles::ref_kind_has_receiver(ref_kind); |
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1681 } else if (iid == vmIntrinsics::_invokeBasic) { |
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1682 has_receiver = true; |
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1683 } else { |
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1684 fatal(err_msg_res("unexpected intrinsic id %d", iid)); |
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1685 } |
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1686 |
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1687 if (member_reg != noreg) { |
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1688 // Load the member_arg into register, if necessary. |
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1689 SharedRuntime::check_member_name_argument_is_last_argument(method, sig_bt, regs); |
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1690 VMReg r = regs[member_arg_pos].first(); |
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1691 if (r->is_stack()) { |
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1692 __ movptr(member_reg, Address(rsp, r->reg2stack() * VMRegImpl::stack_slot_size + wordSize)); |
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1693 } else { |
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1694 // no data motion is needed |
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1695 member_reg = r->as_Register(); |
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1696 } |
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1697 } |
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1698 |
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1699 if (has_receiver) { |
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1700 // Make sure the receiver is loaded into a register. |
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1701 assert(method->size_of_parameters() > 0, "oob"); |
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1702 assert(sig_bt[0] == T_OBJECT, "receiver argument must be an object"); |
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1703 VMReg r = regs[0].first(); |
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1704 assert(r->is_valid(), "bad receiver arg"); |
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1705 if (r->is_stack()) { |
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1706 // Porting note: This assumes that compiled calling conventions always |
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1707 // pass the receiver oop in a register. If this is not true on some |
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1708 // platform, pick a temp and load the receiver from stack. |
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1709 fatal("receiver always in a register"); |
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1710 receiver_reg = j_rarg0; // known to be free at this point |
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1711 __ movptr(receiver_reg, Address(rsp, r->reg2stack() * VMRegImpl::stack_slot_size + wordSize)); |
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1712 } else { |
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1713 // no data motion is needed |
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1714 receiver_reg = r->as_Register(); |
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1715 } |
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1716 } |
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1717 |
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1718 // Figure out which address we are really jumping to: |
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1719 MethodHandles::generate_method_handle_dispatch(masm, iid, |
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1720 receiver_reg, member_reg, /*for_compiler_entry:*/ true); |
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1721 } |
5905 | 1722 |
0 | 1723 // --------------------------------------------------------------------------- |
1724 // Generate a native wrapper for a given method. The method takes arguments | |
1725 // in the Java compiled code convention, marshals them to the native | |
1726 // convention (handlizes oops, etc), transitions to native, makes the call, | |
1727 // returns to java state (possibly blocking), unhandlizes any result and | |
1728 // returns. | |
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1729 // |
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1730 // Critical native functions are a shorthand for the use of |
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1731 // GetPrimtiveArrayCritical and disallow the use of any other JNI |
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1732 // functions. The wrapper is expected to unpack the arguments before |
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1733 // passing them to the callee and perform checks before and after the |
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1734 // native call to ensure that they GC_locker |
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1735 // lock_critical/unlock_critical semantics are followed. Some other |
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1736 // parts of JNI setup are skipped like the tear down of the JNI handle |
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1737 // block and the check for pending exceptions it's impossible for them |
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1738 // to be thrown. |
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1739 // |
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1740 // They are roughly structured like this: |
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1741 // if (GC_locker::needs_gc()) |
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1742 // SharedRuntime::block_for_jni_critical(); |
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1743 // tranistion to thread_in_native |
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1744 // unpack arrray arguments and call native entry point |
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1745 // check for safepoint in progress |
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1746 // check if any thread suspend flags are set |
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1747 // call into JVM and possible unlock the JNI critical |
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1748 // if a GC was suppressed while in the critical native. |
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1749 // transition back to thread_in_Java |
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1750 // return to caller |
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1751 // |
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1752 nmethod* SharedRuntime::generate_native_wrapper(MacroAssembler* masm, |
0 | 1753 methodHandle method, |
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1754 int compile_id, |
6266
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1755 BasicType* in_sig_bt, |
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1756 VMRegPair* in_regs, |
0 | 1757 BasicType ret_type) { |
6266
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1758 if (method->is_method_handle_intrinsic()) { |
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1759 vmIntrinsics::ID iid = method->intrinsic_id(); |
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1760 intptr_t start = (intptr_t)__ pc(); |
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1761 int vep_offset = ((intptr_t)__ pc()) - start; |
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1762 gen_special_dispatch(masm, |
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1763 method, |
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1764 in_sig_bt, |
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1765 in_regs); |
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1766 int frame_complete = ((intptr_t)__ pc()) - start; // not complete, period |
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1767 __ flush(); |
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1768 int stack_slots = SharedRuntime::out_preserve_stack_slots(); // no out slots at all, actually |
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1769 return nmethod::new_native_nmethod(method, |
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1770 compile_id, |
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1771 masm->code(), |
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1772 vep_offset, |
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1773 frame_complete, |
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1774 stack_slots / VMRegImpl::slots_per_word, |
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1775 in_ByteSize(-1), |
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1776 in_ByteSize(-1), |
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1777 (OopMapSet*)NULL); |
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1778 } |
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1779 bool is_critical_native = true; |
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1780 address native_func = method->critical_native_function(); |
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1781 if (native_func == NULL) { |
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1782 native_func = method->native_function(); |
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1783 is_critical_native = false; |
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1784 } |
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1785 assert(native_func != NULL, "must have function"); |
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1786 |
0 | 1787 // An OopMap for lock (and class if static) |
1788 OopMapSet *oop_maps = new OopMapSet(); | |
1789 intptr_t start = (intptr_t)__ pc(); | |
1790 | |
1791 // We have received a description of where all the java arg are located | |
1792 // on entry to the wrapper. We need to convert these args to where | |
1793 // the jni function will expect them. To figure out where they go | |
1794 // we convert the java signature to a C signature by inserting | |
1795 // the hidden arguments as arg[0] and possibly arg[1] (static method) | |
1796 | |
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1797 const int total_in_args = method->size_of_parameters(); |
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1798 int total_c_args = total_in_args; |
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1799 if (!is_critical_native) { |
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1800 total_c_args += 1; |
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1801 if (method->is_static()) { |
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1802 total_c_args++; |
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1803 } |
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1804 } else { |
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1805 for (int i = 0; i < total_in_args; i++) { |
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1806 if (in_sig_bt[i] == T_ARRAY) { |
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1807 total_c_args++; |
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1808 } |
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1809 } |
0 | 1810 } |
1811 | |
1812 BasicType* out_sig_bt = NEW_RESOURCE_ARRAY(BasicType, total_c_args); | |
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1813 VMRegPair* out_regs = NEW_RESOURCE_ARRAY(VMRegPair, total_c_args); |
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1814 BasicType* in_elem_bt = NULL; |
0 | 1815 |
1816 int argc = 0; | |
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1817 if (!is_critical_native) { |
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1818 out_sig_bt[argc++] = T_ADDRESS; |
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1819 if (method->is_static()) { |
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1820 out_sig_bt[argc++] = T_OBJECT; |
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1821 } |
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1822 |
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1823 for (int i = 0; i < total_in_args ; i++ ) { |
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1824 out_sig_bt[argc++] = in_sig_bt[i]; |
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1825 } |
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1826 } else { |
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1827 Thread* THREAD = Thread::current(); |
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1828 in_elem_bt = NEW_RESOURCE_ARRAY(BasicType, total_in_args); |
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1829 SignatureStream ss(method->signature()); |
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1830 for (int i = 0; i < total_in_args ; i++ ) { |
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1831 if (in_sig_bt[i] == T_ARRAY) { |
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1832 // Arrays are passed as int, elem* pair |
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1833 out_sig_bt[argc++] = T_INT; |
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1834 out_sig_bt[argc++] = T_ADDRESS; |
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1835 Symbol* atype = ss.as_symbol(CHECK_NULL); |
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1836 const char* at = atype->as_C_string(); |
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1837 if (strlen(at) == 2) { |
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1838 assert(at[0] == '[', "must be"); |
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1839 switch (at[1]) { |
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1840 case 'B': in_elem_bt[i] = T_BYTE; break; |
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1841 case 'C': in_elem_bt[i] = T_CHAR; break; |
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1842 case 'D': in_elem_bt[i] = T_DOUBLE; break; |
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1843 case 'F': in_elem_bt[i] = T_FLOAT; break; |
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1844 case 'I': in_elem_bt[i] = T_INT; break; |
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1845 case 'J': in_elem_bt[i] = T_LONG; break; |
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1846 case 'S': in_elem_bt[i] = T_SHORT; break; |
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1847 case 'Z': in_elem_bt[i] = T_BOOLEAN; break; |
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1848 default: ShouldNotReachHere(); |
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1849 } |
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1850 } |
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1851 } else { |
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1852 out_sig_bt[argc++] = in_sig_bt[i]; |
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1853 in_elem_bt[i] = T_VOID; |
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1854 } |
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1855 if (in_sig_bt[i] != T_VOID) { |
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1856 assert(in_sig_bt[i] == ss.type(), "must match"); |
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1857 ss.next(); |
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1858 } |
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1859 } |
0 | 1860 } |
1861 | |
1862 // Now figure out where the args must be stored and how much stack space | |
1863 // they require. | |
1864 int out_arg_slots; | |
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1865 out_arg_slots = c_calling_convention(out_sig_bt, out_regs, NULL, total_c_args); |
0 | 1866 |
1867 // Compute framesize for the wrapper. We need to handlize all oops in | |
1868 // incoming registers | |
1869 | |
1870 // Calculate the total number of stack slots we will need. | |
1871 | |
1872 // First count the abi requirement plus all of the outgoing args | |
1873 int stack_slots = SharedRuntime::out_preserve_stack_slots() + out_arg_slots; | |
1874 | |
1875 // Now the space for the inbound oop handle area | |
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1876 int total_save_slots = 6 * VMRegImpl::slots_per_word; // 6 arguments passed in registers |
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1877 if (is_critical_native) { |
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1878 // Critical natives may have to call out so they need a save area |
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1879 // for register arguments. |
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1880 int double_slots = 0; |
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1881 int single_slots = 0; |
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1882 for ( int i = 0; i < total_in_args; i++) { |
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1883 if (in_regs[i].first()->is_Register()) { |
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1884 const Register reg = in_regs[i].first()->as_Register(); |
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1885 switch (in_sig_bt[i]) { |
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1886 case T_BOOLEAN: |
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1887 case T_BYTE: |
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1888 case T_SHORT: |
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1889 case T_CHAR: |
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1890 case T_INT: single_slots++; break; |
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1891 case T_ARRAY: // specific to LP64 (7145024) |
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1892 case T_LONG: double_slots++; break; |
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1893 default: ShouldNotReachHere(); |
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1894 } |
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1895 } else if (in_regs[i].first()->is_XMMRegister()) { |
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1896 switch (in_sig_bt[i]) { |
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1897 case T_FLOAT: single_slots++; break; |
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1898 case T_DOUBLE: double_slots++; break; |
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1899 default: ShouldNotReachHere(); |
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1900 } |
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1901 } else if (in_regs[i].first()->is_FloatRegister()) { |
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1902 ShouldNotReachHere(); |
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1903 } |
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1904 } |
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1905 total_save_slots = double_slots * 2 + single_slots; |
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1906 // align the save area |
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1907 if (double_slots != 0) { |
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1908 stack_slots = round_to(stack_slots, 2); |
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1909 } |
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1910 } |
0 | 1911 |
1912 int oop_handle_offset = stack_slots; | |
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1913 stack_slots += total_save_slots; |
0 | 1914 |
1915 // Now any space we need for handlizing a klass if static method | |
1916 | |
1917 int klass_slot_offset = 0; | |
1918 int klass_offset = -1; | |
1919 int lock_slot_offset = 0; | |
1920 bool is_static = false; | |
1921 | |
1922 if (method->is_static()) { | |
1923 klass_slot_offset = stack_slots; | |
1924 stack_slots += VMRegImpl::slots_per_word; | |
1925 klass_offset = klass_slot_offset * VMRegImpl::stack_slot_size; | |
1926 is_static = true; | |
1927 } | |
1928 | |
1929 // Plus a lock if needed | |
1930 | |
1931 if (method->is_synchronized()) { | |
1932 lock_slot_offset = stack_slots; | |
1933 stack_slots += VMRegImpl::slots_per_word; | |
1934 } | |
1935 | |
1936 // Now a place (+2) to save return values or temp during shuffling | |
1937 // + 4 for return address (which we own) and saved rbp | |
1938 stack_slots += 6; | |
1939 | |
1940 // Ok The space we have allocated will look like: | |
1941 // | |
1942 // | |
1943 // FP-> | | | |
1944 // |---------------------| | |
1945 // | 2 slots for moves | | |
1946 // |---------------------| | |
1947 // | lock box (if sync) | | |
1948 // |---------------------| <- lock_slot_offset | |
1949 // | klass (if static) | | |
1950 // |---------------------| <- klass_slot_offset | |
1951 // | oopHandle area | | |
1952 // |---------------------| <- oop_handle_offset (6 java arg registers) | |
1953 // | outbound memory | | |
1954 // | based arguments | | |
1955 // | | | |
1956 // |---------------------| | |
1957 // | | | |
1958 // SP-> | out_preserved_slots | | |
1959 // | |
1960 // | |
1961 | |
1962 | |
1963 // Now compute actual number of stack words we need rounding to make | |
1964 // stack properly aligned. | |
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1965 stack_slots = round_to(stack_slots, StackAlignmentInSlots); |
0 | 1966 |
1967 int stack_size = stack_slots * VMRegImpl::stack_slot_size; | |
1968 | |
1969 // First thing make an ic check to see if we should even be here | |
1970 | |
1971 // We are free to use all registers as temps without saving them and | |
1972 // restoring them except rbp. rbp is the only callee save register | |
1973 // as far as the interpreter and the compiler(s) are concerned. | |
1974 | |
1975 | |
1976 const Register ic_reg = rax; | |
1977 const Register receiver = j_rarg0; | |
1978 | |
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1979 Label hit; |
0 | 1980 Label exception_pending; |
1981 | |
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1982 assert_different_registers(ic_reg, receiver, rscratch1); |
0 | 1983 __ verify_oop(receiver); |
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1984 __ load_klass(rscratch1, receiver); |
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1985 __ cmpq(ic_reg, rscratch1); |
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1986 __ jcc(Assembler::equal, hit); |
0 | 1987 |
1988 __ jump(RuntimeAddress(SharedRuntime::get_ic_miss_stub())); | |
1989 | |
1990 // Verified entry point must be aligned | |
1991 __ align(8); | |
1992 | |
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1993 __ bind(hit); |
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1994 |
0 | 1995 int vep_offset = ((intptr_t)__ pc()) - start; |
1996 | |
1997 // The instruction at the verified entry point must be 5 bytes or longer | |
1998 // because it can be patched on the fly by make_non_entrant. The stack bang | |
1999 // instruction fits that requirement. | |
2000 | |
2001 // Generate stack overflow check | |
2002 | |
2003 if (UseStackBanging) { | |
2004 __ bang_stack_with_offset(StackShadowPages*os::vm_page_size()); | |
2005 } else { | |
2006 // need a 5 byte instruction to allow MT safe patching to non-entrant | |
2007 __ fat_nop(); | |
2008 } | |
2009 | |
2010 // Generate a new frame for the wrapper. | |
2011 __ enter(); | |
2012 // -2 because return address is already present and so is saved rbp | |
304 | 2013 __ subptr(rsp, stack_size - 2*wordSize); |
0 | 2014 |
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2015 // Frame is now completed as far as size and linkage. |
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2016 int frame_complete = ((intptr_t)__ pc()) - start; |
0 | 2017 |
17780 | 2018 if (UseRTMLocking) { |
2019 // Abort RTM transaction before calling JNI | |
2020 // because critical section will be large and will be | |
2021 // aborted anyway. Also nmethod could be deoptimized. | |
2022 __ xabort(0); | |
2023 } | |
2024 | |
0 | 2025 #ifdef ASSERT |
2026 { | |
2027 Label L; | |
304 | 2028 __ mov(rax, rsp); |
605 | 2029 __ andptr(rax, -16); // must be 16 byte boundary (see amd64 ABI) |
304 | 2030 __ cmpptr(rax, rsp); |
0 | 2031 __ jcc(Assembler::equal, L); |
2032 __ stop("improperly aligned stack"); | |
2033 __ bind(L); | |
2034 } | |
2035 #endif /* ASSERT */ | |
2036 | |
2037 | |
2038 // We use r14 as the oop handle for the receiver/klass | |
2039 // It is callee save so it survives the call to native | |
2040 | |
2041 const Register oop_handle_reg = r14; | |
2042 | |
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2043 if (is_critical_native) { |
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2044 check_needs_gc_for_critical_native(masm, stack_slots, total_c_args, total_in_args, |
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2045 oop_handle_offset, oop_maps, in_regs, in_sig_bt); |
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2046 } |
0 | 2047 |
2048 // | |
2049 // We immediately shuffle the arguments so that any vm call we have to | |
2050 // make from here on out (sync slow path, jvmti, etc.) we will have | |
2051 // captured the oops from our caller and have a valid oopMap for | |
2052 // them. | |
2053 | |
2054 // ----------------- | |
2055 // The Grand Shuffle | |
2056 | |
2057 // The Java calling convention is either equal (linux) or denser (win64) than the | |
2058 // c calling convention. However the because of the jni_env argument the c calling | |
2059 // convention always has at least one more (and two for static) arguments than Java. | |
2060 // Therefore if we move the args from java -> c backwards then we will never have | |
2061 // a register->register conflict and we don't have to build a dependency graph | |
2062 // and figure out how to break any cycles. | |
2063 // | |
2064 | |
2065 // Record esp-based slot for receiver on stack for non-static methods | |
2066 int receiver_offset = -1; | |
2067 | |
2068 // This is a trick. We double the stack slots so we can claim | |
2069 // the oops in the caller's frame. Since we are sure to have | |
2070 // more args than the caller doubling is enough to make | |
2071 // sure we can capture all the incoming oop args from the | |
2072 // caller. | |
2073 // | |
2074 OopMap* map = new OopMap(stack_slots * 2, 0 /* arg_slots*/); | |
2075 | |
2076 // Mark location of rbp (someday) | |
2077 // map->set_callee_saved(VMRegImpl::stack2reg( stack_slots - 2), stack_slots * 2, 0, vmreg(rbp)); | |
2078 | |
2079 // Use eax, ebx as temporaries during any memory-memory moves we have to do | |
2080 // All inbound args are referenced based on rbp and all outbound args via rsp. | |
2081 | |
2082 | |
2083 #ifdef ASSERT | |
2084 bool reg_destroyed[RegisterImpl::number_of_registers]; | |
2085 bool freg_destroyed[XMMRegisterImpl::number_of_registers]; | |
2086 for ( int r = 0 ; r < RegisterImpl::number_of_registers ; r++ ) { | |
2087 reg_destroyed[r] = false; | |
2088 } | |
2089 for ( int f = 0 ; f < XMMRegisterImpl::number_of_registers ; f++ ) { | |
2090 freg_destroyed[f] = false; | |
2091 } | |
2092 | |
2093 #endif /* ASSERT */ | |
2094 | |
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2095 // This may iterate in two different directions depending on the |
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2096 // kind of native it is. The reason is that for regular JNI natives |
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2097 // the incoming and outgoing registers are offset upwards and for |
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2098 // critical natives they are offset down. |
5905 | 2099 GrowableArray<int> arg_order(2 * total_in_args); |
2100 VMRegPair tmp_vmreg; | |
2101 tmp_vmreg.set1(rbx->as_VMReg()); | |
2102 | |
2103 if (!is_critical_native) { | |
2104 for (int i = total_in_args - 1, c_arg = total_c_args - 1; i >= 0; i--, c_arg--) { | |
2105 arg_order.push(i); | |
2106 arg_order.push(c_arg); | |
2107 } | |
2108 } else { | |
2109 // Compute a valid move order, using tmp_vmreg to break any cycles | |
2110 ComputeMoveOrder cmo(total_in_args, in_regs, total_c_args, out_regs, in_sig_bt, arg_order, tmp_vmreg); | |
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2111 } |
5905 | 2112 |
2113 int temploc = -1; | |
2114 for (int ai = 0; ai < arg_order.length(); ai += 2) { | |
2115 int i = arg_order.at(ai); | |
2116 int c_arg = arg_order.at(ai + 1); | |
2117 __ block_comment(err_msg("move %d -> %d", i, c_arg)); | |
2118 if (c_arg == -1) { | |
2119 assert(is_critical_native, "should only be required for critical natives"); | |
2120 // This arg needs to be moved to a temporary | |
2121 __ mov(tmp_vmreg.first()->as_Register(), in_regs[i].first()->as_Register()); | |
2122 in_regs[i] = tmp_vmreg; | |
2123 temploc = i; | |
2124 continue; | |
2125 } else if (i == -1) { | |
2126 assert(is_critical_native, "should only be required for critical natives"); | |
2127 // Read from the temporary location | |
2128 assert(temploc != -1, "must be valid"); | |
2129 i = temploc; | |
2130 temploc = -1; | |
2131 } | |
0 | 2132 #ifdef ASSERT |
2133 if (in_regs[i].first()->is_Register()) { | |
2134 assert(!reg_destroyed[in_regs[i].first()->as_Register()->encoding()], "destroyed reg!"); | |
2135 } else if (in_regs[i].first()->is_XMMRegister()) { | |
2136 assert(!freg_destroyed[in_regs[i].first()->as_XMMRegister()->encoding()], "destroyed reg!"); | |
2137 } | |
2138 if (out_regs[c_arg].first()->is_Register()) { | |
2139 reg_destroyed[out_regs[c_arg].first()->as_Register()->encoding()] = true; | |
2140 } else if (out_regs[c_arg].first()->is_XMMRegister()) { | |
2141 freg_destroyed[out_regs[c_arg].first()->as_XMMRegister()->encoding()] = true; | |
2142 } | |
2143 #endif /* ASSERT */ | |
2144 switch (in_sig_bt[i]) { | |
2145 case T_ARRAY: | |
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2146 if (is_critical_native) { |
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2147 unpack_array_argument(masm, in_regs[i], in_elem_bt[i], out_regs[c_arg + 1], out_regs[c_arg]); |
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2148 c_arg++; |
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2149 #ifdef ASSERT |
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2150 if (out_regs[c_arg].first()->is_Register()) { |
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2151 reg_destroyed[out_regs[c_arg].first()->as_Register()->encoding()] = true; |
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2152 } else if (out_regs[c_arg].first()->is_XMMRegister()) { |
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2153 freg_destroyed[out_regs[c_arg].first()->as_XMMRegister()->encoding()] = true; |
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2154 } |
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2155 #endif |
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2156 break; |
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2157 } |
0 | 2158 case T_OBJECT: |
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2159 assert(!is_critical_native, "no oop arguments"); |
0 | 2160 object_move(masm, map, oop_handle_offset, stack_slots, in_regs[i], out_regs[c_arg], |
2161 ((i == 0) && (!is_static)), | |
2162 &receiver_offset); | |
2163 break; | |
2164 case T_VOID: | |
2165 break; | |
2166 | |
2167 case T_FLOAT: | |
2168 float_move(masm, in_regs[i], out_regs[c_arg]); | |
2169 break; | |
2170 | |
2171 case T_DOUBLE: | |
2172 assert( i + 1 < total_in_args && | |
2173 in_sig_bt[i + 1] == T_VOID && | |
2174 out_sig_bt[c_arg+1] == T_VOID, "bad arg list"); | |
2175 double_move(masm, in_regs[i], out_regs[c_arg]); | |
2176 break; | |
2177 | |
2178 case T_LONG : | |
2179 long_move(masm, in_regs[i], out_regs[c_arg]); | |
2180 break; | |
2181 | |
2182 case T_ADDRESS: assert(false, "found T_ADDRESS in java args"); | |
2183 | |
2184 default: | |
2185 move32_64(masm, in_regs[i], out_regs[c_arg]); | |
2186 } | |
2187 } | |
2188 | |
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2189 int c_arg; |
0 | 2190 |
2191 // Pre-load a static method's oop into r14. Used both by locking code and | |
2192 // the normal JNI call code. | |
10998
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2193 if (!is_critical_native) { |
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2194 // point c_arg at the first arg that is already loaded in case we |
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2195 // need to spill before we call out |
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2196 c_arg = total_c_args - total_in_args; |
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2197 |
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2198 if (method->is_static()) { |
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2199 |
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2200 // load oop into a register |
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2201 __ movoop(oop_handle_reg, JNIHandles::make_local(method->method_holder()->java_mirror())); |
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2202 |
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2203 // Now handlize the static class mirror it's known not-null. |
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2204 __ movptr(Address(rsp, klass_offset), oop_handle_reg); |
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2205 map->set_oop(VMRegImpl::stack2reg(klass_slot_offset)); |
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2206 |
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2207 // Now get the handle |
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2208 __ lea(oop_handle_reg, Address(rsp, klass_offset)); |
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2209 // store the klass handle as second argument |
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2210 __ movptr(c_rarg1, oop_handle_reg); |
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2211 // and protect the arg if we must spill |
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2212 c_arg--; |
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2213 } |
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2214 } else { |
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2215 // For JNI critical methods we need to save all registers in save_args. |
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2216 c_arg = 0; |
0 | 2217 } |
2218 | |
2219 // Change state to native (we save the return address in the thread, since it might not | |
2220 // be pushed on the stack when we do a a stack traversal). It is enough that the pc() | |
2221 // points into the right code segment. It does not have to be the correct return pc. | |
2222 // We use the same pc/oopMap repeatedly when we call out | |
2223 | |
2224 intptr_t the_pc = (intptr_t) __ pc(); | |
2225 oop_maps->add_gc_map(the_pc - start, map); | |
2226 | |
2227 __ set_last_Java_frame(rsp, noreg, (address)the_pc); | |
2228 | |
2229 | |
2230 // We have all of the arguments setup at this point. We must not touch any register | |
2231 // argument registers at this point (what if we save/restore them there are no oop? | |
2232 | |
2233 { | |
2234 SkipIfEqual skip(masm, &DTraceMethodProbes, false); | |
2235 // protect the args we've loaded | |
2236 save_args(masm, total_c_args, c_arg, out_regs); | |
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2237 __ mov_metadata(c_rarg1, method()); |
0 | 2238 __ call_VM_leaf( |
2239 CAST_FROM_FN_PTR(address, SharedRuntime::dtrace_method_entry), | |
2240 r15_thread, c_rarg1); | |
2241 restore_args(masm, total_c_args, c_arg, out_regs); | |
2242 } | |
2243 | |
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2244 // RedefineClasses() tracing support for obsolete method entry |
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2245 if (RC_TRACE_IN_RANGE(0x00001000, 0x00002000)) { |
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2246 // protect the args we've loaded |
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2247 save_args(masm, total_c_args, c_arg, out_regs); |
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2248 __ mov_metadata(c_rarg1, method()); |
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2249 __ call_VM_leaf( |
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2250 CAST_FROM_FN_PTR(address, SharedRuntime::rc_trace_method_entry), |
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2251 r15_thread, c_rarg1); |
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2252 restore_args(masm, total_c_args, c_arg, out_regs); |
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2253 } |
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2254 |
0 | 2255 // Lock a synchronized method |
2256 | |
2257 // Register definitions used by locking and unlocking | |
2258 | |
2259 const Register swap_reg = rax; // Must use rax for cmpxchg instruction | |
2260 const Register obj_reg = rbx; // Will contain the oop | |
2261 const Register lock_reg = r13; // Address of compiler lock object (BasicLock) | |
2262 const Register old_hdr = r13; // value of old header at unlock time | |
2263 | |
2264 Label slow_path_lock; | |
2265 Label lock_done; | |
2266 | |
2267 if (method->is_synchronized()) { | |
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2268 assert(!is_critical_native, "unhandled"); |
0 | 2269 |
2270 | |
2271 const int mark_word_offset = BasicLock::displaced_header_offset_in_bytes(); | |
2272 | |
2273 // Get the handle (the 2nd argument) | |
304 | 2274 __ mov(oop_handle_reg, c_rarg1); |
0 | 2275 |
2276 // Get address of the box | |
2277 | |
304 | 2278 __ lea(lock_reg, Address(rsp, lock_slot_offset * VMRegImpl::stack_slot_size)); |
0 | 2279 |
2280 // Load the oop from the handle | |
304 | 2281 __ movptr(obj_reg, Address(oop_handle_reg, 0)); |
0 | 2282 |
2283 if (UseBiasedLocking) { | |
2284 __ biased_locking_enter(lock_reg, obj_reg, swap_reg, rscratch1, false, lock_done, &slow_path_lock); | |
2285 } | |
2286 | |
2287 // Load immediate 1 into swap_reg %rax | |
2288 __ movl(swap_reg, 1); | |
2289 | |
2290 // Load (object->mark() | 1) into swap_reg %rax | |
304 | 2291 __ orptr(swap_reg, Address(obj_reg, 0)); |
0 | 2292 |
2293 // Save (object->mark() | 1) into BasicLock's displaced header | |
304 | 2294 __ movptr(Address(lock_reg, mark_word_offset), swap_reg); |
0 | 2295 |
2296 if (os::is_MP()) { | |
2297 __ lock(); | |
2298 } | |
2299 | |
2300 // src -> dest iff dest == rax else rax <- dest | |
304 | 2301 __ cmpxchgptr(lock_reg, Address(obj_reg, 0)); |
0 | 2302 __ jcc(Assembler::equal, lock_done); |
2303 | |
2304 // Hmm should this move to the slow path code area??? | |
2305 | |
2306 // Test if the oopMark is an obvious stack pointer, i.e., | |
2307 // 1) (mark & 3) == 0, and | |
2308 // 2) rsp <= mark < mark + os::pagesize() | |
2309 // These 3 tests can be done by evaluating the following | |
2310 // expression: ((mark - rsp) & (3 - os::vm_page_size())), | |
2311 // assuming both stack pointer and pagesize have their | |
2312 // least significant 2 bits clear. | |
2313 // NOTE: the oopMark is in swap_reg %rax as the result of cmpxchg | |
2314 | |
304 | 2315 __ subptr(swap_reg, rsp); |
2316 __ andptr(swap_reg, 3 - os::vm_page_size()); | |
0 | 2317 |
2318 // Save the test result, for recursive case, the result is zero | |
304 | 2319 __ movptr(Address(lock_reg, mark_word_offset), swap_reg); |
0 | 2320 __ jcc(Assembler::notEqual, slow_path_lock); |
2321 | |
2322 // Slow path will re-enter here | |
2323 | |
2324 __ bind(lock_done); | |
2325 } | |
2326 | |
2327 | |
2328 // Finally just about ready to make the JNI call | |
2329 | |
2330 | |
2331 // get JNIEnv* which is first argument to native | |
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2332 if (!is_critical_native) { |
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2333 __ lea(c_rarg0, Address(r15_thread, in_bytes(JavaThread::jni_environment_offset()))); |
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2334 } |
0 | 2335 |
2336 // Now set thread in native | |
304 | 2337 __ movl(Address(r15_thread, JavaThread::thread_state_offset()), _thread_in_native); |
0 | 2338 |
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2339 __ call(RuntimeAddress(native_func)); |
0 | 2340 |
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2341 // Verify or restore cpu control state after JNI call |
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2342 __ restore_cpu_control_state_after_jni(); |
0 | 2343 |
2344 // Unpack native results. | |
2345 switch (ret_type) { | |
2346 case T_BOOLEAN: __ c2bool(rax); break; | |
2347 case T_CHAR : __ movzwl(rax, rax); break; | |
2348 case T_BYTE : __ sign_extend_byte (rax); break; | |
2349 case T_SHORT : __ sign_extend_short(rax); break; | |
2350 case T_INT : /* nothing to do */ break; | |
2351 case T_DOUBLE : | |
2352 case T_FLOAT : | |
2353 // Result is in xmm0 we'll save as needed | |
2354 break; | |
2355 case T_ARRAY: // Really a handle | |
2356 case T_OBJECT: // Really a handle | |
2357 break; // can't de-handlize until after safepoint check | |
2358 case T_VOID: break; | |
2359 case T_LONG: break; | |
2360 default : ShouldNotReachHere(); | |
2361 } | |
2362 | |
2363 // Switch thread to "native transition" state before reading the synchronization state. | |
2364 // This additional state is necessary because reading and testing the synchronization | |
2365 // state is not atomic w.r.t. GC, as this scenario demonstrates: | |
2366 // Java thread A, in _thread_in_native state, loads _not_synchronized and is preempted. | |
2367 // VM thread changes sync state to synchronizing and suspends threads for GC. | |
2368 // Thread A is resumed to finish this native method, but doesn't block here since it | |
2369 // didn't see any synchronization is progress, and escapes. | |
304 | 2370 __ movl(Address(r15_thread, JavaThread::thread_state_offset()), _thread_in_native_trans); |
0 | 2371 |
2372 if(os::is_MP()) { | |
2373 if (UseMembar) { | |
2374 // Force this write out before the read below | |
2375 __ membar(Assembler::Membar_mask_bits( | |
2376 Assembler::LoadLoad | Assembler::LoadStore | | |
2377 Assembler::StoreLoad | Assembler::StoreStore)); | |
2378 } else { | |
2379 // Write serialization page so VM thread can do a pseudo remote membar. | |
2380 // We use the current thread pointer to calculate a thread specific | |
2381 // offset to write to within the page. This minimizes bus traffic | |
2382 // due to cache line collision. | |
2383 __ serialize_memory(r15_thread, rcx); | |
2384 } | |
2385 } | |
2386 | |
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2387 Label after_transition; |
0 | 2388 |
2389 // check for safepoint operation in progress and/or pending suspend requests | |
2390 { | |
2391 Label Continue; | |
2392 | |
2393 __ cmp32(ExternalAddress((address)SafepointSynchronize::address_of_state()), | |
2394 SafepointSynchronize::_not_synchronized); | |
2395 | |
2396 Label L; | |
2397 __ jcc(Assembler::notEqual, L); | |
2398 __ cmpl(Address(r15_thread, JavaThread::suspend_flags_offset()), 0); | |
2399 __ jcc(Assembler::equal, Continue); | |
2400 __ bind(L); | |
2401 | |
2402 // Don't use call_VM as it will see a possible pending exception and forward it | |
2403 // and never return here preventing us from clearing _last_native_pc down below. | |
2404 // Also can't use call_VM_leaf either as it will check to see if rsi & rdi are | |
2405 // preserved and correspond to the bcp/locals pointers. So we do a runtime call | |
2406 // by hand. | |
2407 // | |
2408 save_native_result(masm, ret_type, stack_slots); | |
304 | 2409 __ mov(c_rarg0, r15_thread); |
2410 __ mov(r12, rsp); // remember sp | |
2411 __ subptr(rsp, frame::arg_reg_save_area_bytes); // windows | |
2412 __ andptr(rsp, -16); // align stack as required by ABI | |
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2413 if (!is_critical_native) { |
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2414 __ call(RuntimeAddress(CAST_FROM_FN_PTR(address, JavaThread::check_special_condition_for_native_trans))); |
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2415 } else { |
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2416 __ call(RuntimeAddress(CAST_FROM_FN_PTR(address, JavaThread::check_special_condition_for_native_trans_and_transition))); |
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2417 } |
304 | 2418 __ mov(rsp, r12); // restore sp |
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2419 __ reinit_heapbase(); |
0 | 2420 // Restore any method result value |
2421 restore_native_result(masm, ret_type, stack_slots); | |
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2422 |
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2423 if (is_critical_native) { |
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2424 // The call above performed the transition to thread_in_Java so |
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2425 // skip the transition logic below. |
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2426 __ jmpb(after_transition); |
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2427 } |
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2428 |
0 | 2429 __ bind(Continue); |
2430 } | |
2431 | |
2432 // change thread state | |
2433 __ movl(Address(r15_thread, JavaThread::thread_state_offset()), _thread_in_Java); | |
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2434 __ bind(after_transition); |
0 | 2435 |
2436 Label reguard; | |
2437 Label reguard_done; | |
2438 __ cmpl(Address(r15_thread, JavaThread::stack_guard_state_offset()), JavaThread::stack_guard_yellow_disabled); | |
2439 __ jcc(Assembler::equal, reguard); | |
2440 __ bind(reguard_done); | |
2441 | |
2442 // native result if any is live | |
2443 | |
2444 // Unlock | |
2445 Label unlock_done; | |
2446 Label slow_path_unlock; | |
2447 if (method->is_synchronized()) { | |
2448 | |
2449 // Get locked oop from the handle we passed to jni | |
304 | 2450 __ movptr(obj_reg, Address(oop_handle_reg, 0)); |
0 | 2451 |
2452 Label done; | |
2453 | |
2454 if (UseBiasedLocking) { | |
2455 __ biased_locking_exit(obj_reg, old_hdr, done); | |
2456 } | |
2457 | |
2458 // Simple recursive lock? | |
2459 | |
304 | 2460 __ cmpptr(Address(rsp, lock_slot_offset * VMRegImpl::stack_slot_size), (int32_t)NULL_WORD); |
0 | 2461 __ jcc(Assembler::equal, done); |
2462 | |
2463 // Must save rax if if it is live now because cmpxchg must use it | |
2464 if (ret_type != T_FLOAT && ret_type != T_DOUBLE && ret_type != T_VOID) { | |
2465 save_native_result(masm, ret_type, stack_slots); | |
2466 } | |
2467 | |
2468 | |
2469 // get address of the stack lock | |
304 | 2470 __ lea(rax, Address(rsp, lock_slot_offset * VMRegImpl::stack_slot_size)); |
0 | 2471 // get old displaced header |
304 | 2472 __ movptr(old_hdr, Address(rax, 0)); |
0 | 2473 |
2474 // Atomic swap old header if oop still contains the stack lock | |
2475 if (os::is_MP()) { | |
2476 __ lock(); | |
2477 } | |
304 | 2478 __ cmpxchgptr(old_hdr, Address(obj_reg, 0)); |
0 | 2479 __ jcc(Assembler::notEqual, slow_path_unlock); |
2480 | |
2481 // slow path re-enters here | |
2482 __ bind(unlock_done); | |
2483 if (ret_type != T_FLOAT && ret_type != T_DOUBLE && ret_type != T_VOID) { | |
2484 restore_native_result(masm, ret_type, stack_slots); | |
2485 } | |
2486 | |
2487 __ bind(done); | |
2488 | |
2489 } | |
2490 { | |
2491 SkipIfEqual skip(masm, &DTraceMethodProbes, false); | |
2492 save_native_result(masm, ret_type, stack_slots); | |
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2493 __ mov_metadata(c_rarg1, method()); |
0 | 2494 __ call_VM_leaf( |
2495 CAST_FROM_FN_PTR(address, SharedRuntime::dtrace_method_exit), | |
2496 r15_thread, c_rarg1); | |
2497 restore_native_result(masm, ret_type, stack_slots); | |
2498 } | |
2499 | |
2500 __ reset_last_Java_frame(false, true); | |
2501 | |
2502 // Unpack oop result | |
2503 if (ret_type == T_OBJECT || ret_type == T_ARRAY) { | |
2504 Label L; | |
304 | 2505 __ testptr(rax, rax); |
0 | 2506 __ jcc(Assembler::zero, L); |
304 | 2507 __ movptr(rax, Address(rax, 0)); |
0 | 2508 __ bind(L); |
2509 __ verify_oop(rax); | |
2510 } | |
2511 | |
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2512 if (!is_critical_native) { |
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2513 // reset handle block |
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2514 __ movptr(rcx, Address(r15_thread, JavaThread::active_handles_offset())); |
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2515 __ movl(Address(rcx, JNIHandleBlock::top_offset_in_bytes()), (int32_t)NULL_WORD); |
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2516 } |
0 | 2517 |
2518 // pop our frame | |
2519 | |
2520 __ leave(); | |
2521 | |
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2522 if (!is_critical_native) { |
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2523 // Any exception pending? |
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2524 __ cmpptr(Address(r15_thread, in_bytes(Thread::pending_exception_offset())), (int32_t)NULL_WORD); |
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2525 __ jcc(Assembler::notEqual, exception_pending); |
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2526 } |
0 | 2527 |
2528 // Return | |
2529 | |
2530 __ ret(0); | |
2531 | |
2532 // Unexpected paths are out of line and go here | |
2533 | |
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2534 if (!is_critical_native) { |
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2535 // forward the exception |
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2536 __ bind(exception_pending); |
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2537 |
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2538 // and forward the exception |
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2539 __ jump(RuntimeAddress(StubRoutines::forward_exception_entry())); |
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2540 } |
0 | 2541 |
2542 // Slow path locking & unlocking | |
2543 if (method->is_synchronized()) { | |
2544 | |
2545 // BEGIN Slow path lock | |
2546 __ bind(slow_path_lock); | |
2547 | |
2548 // has last_Java_frame setup. No exceptions so do vanilla call not call_VM | |
2549 // args are (oop obj, BasicLock* lock, JavaThread* thread) | |
2550 | |
2551 // protect the args we've loaded | |
2552 save_args(masm, total_c_args, c_arg, out_regs); | |
2553 | |
304 | 2554 __ mov(c_rarg0, obj_reg); |
2555 __ mov(c_rarg1, lock_reg); | |
2556 __ mov(c_rarg2, r15_thread); | |
0 | 2557 |
2558 // Not a leaf but we have last_Java_frame setup as we want | |
2559 __ call_VM_leaf(CAST_FROM_FN_PTR(address, SharedRuntime::complete_monitor_locking_C), 3); | |
2560 restore_args(masm, total_c_args, c_arg, out_regs); | |
2561 | |
2562 #ifdef ASSERT | |
2563 { Label L; | |
304 | 2564 __ cmpptr(Address(r15_thread, in_bytes(Thread::pending_exception_offset())), (int32_t)NULL_WORD); |
0 | 2565 __ jcc(Assembler::equal, L); |
2566 __ stop("no pending exception allowed on exit from monitorenter"); | |
2567 __ bind(L); | |
2568 } | |
2569 #endif | |
2570 __ jmp(lock_done); | |
2571 | |
2572 // END Slow path lock | |
2573 | |
2574 // BEGIN Slow path unlock | |
2575 __ bind(slow_path_unlock); | |
2576 | |
2577 // If we haven't already saved the native result we must save it now as xmm registers | |
2578 // are still exposed. | |
2579 | |
2580 if (ret_type == T_FLOAT || ret_type == T_DOUBLE ) { | |
2581 save_native_result(masm, ret_type, stack_slots); | |
2582 } | |
2583 | |
304 | 2584 __ lea(c_rarg1, Address(rsp, lock_slot_offset * VMRegImpl::stack_slot_size)); |
2585 | |
2586 __ mov(c_rarg0, obj_reg); | |
2587 __ mov(r12, rsp); // remember sp | |
2588 __ subptr(rsp, frame::arg_reg_save_area_bytes); // windows | |
2589 __ andptr(rsp, -16); // align stack as required by ABI | |
0 | 2590 |
2591 // Save pending exception around call to VM (which contains an EXCEPTION_MARK) | |
2592 // NOTE that obj_reg == rbx currently | |
304 | 2593 __ movptr(rbx, Address(r15_thread, in_bytes(Thread::pending_exception_offset()))); |
2594 __ movptr(Address(r15_thread, in_bytes(Thread::pending_exception_offset())), (int32_t)NULL_WORD); | |
0 | 2595 |
2596 __ call(RuntimeAddress(CAST_FROM_FN_PTR(address, SharedRuntime::complete_monitor_unlocking_C))); | |
304 | 2597 __ mov(rsp, r12); // restore sp |
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2598 __ reinit_heapbase(); |
0 | 2599 #ifdef ASSERT |
2600 { | |
2601 Label L; | |
304 | 2602 __ cmpptr(Address(r15_thread, in_bytes(Thread::pending_exception_offset())), (int)NULL_WORD); |
0 | 2603 __ jcc(Assembler::equal, L); |
2604 __ stop("no pending exception allowed on exit complete_monitor_unlocking_C"); | |
2605 __ bind(L); | |
2606 } | |
2607 #endif /* ASSERT */ | |
2608 | |
304 | 2609 __ movptr(Address(r15_thread, in_bytes(Thread::pending_exception_offset())), rbx); |
0 | 2610 |
2611 if (ret_type == T_FLOAT || ret_type == T_DOUBLE ) { | |
2612 restore_native_result(masm, ret_type, stack_slots); | |
2613 } | |
2614 __ jmp(unlock_done); | |
2615 | |
2616 // END Slow path unlock | |
2617 | |
2618 } // synchronized | |
2619 | |
2620 // SLOW PATH Reguard the stack if needed | |
2621 | |
2622 __ bind(reguard); | |
2623 save_native_result(masm, ret_type, stack_slots); | |
304 | 2624 __ mov(r12, rsp); // remember sp |
2625 __ subptr(rsp, frame::arg_reg_save_area_bytes); // windows | |
2626 __ andptr(rsp, -16); // align stack as required by ABI | |
0 | 2627 __ call(RuntimeAddress(CAST_FROM_FN_PTR(address, SharedRuntime::reguard_yellow_pages))); |
304 | 2628 __ mov(rsp, r12); // restore sp |
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2629 __ reinit_heapbase(); |
0 | 2630 restore_native_result(masm, ret_type, stack_slots); |
2631 // and continue | |
2632 __ jmp(reguard_done); | |
2633 | |
2634 | |
2635 | |
2636 __ flush(); | |
2637 | |
2638 nmethod *nm = nmethod::new_native_nmethod(method, | |
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2639 compile_id, |
0 | 2640 masm->code(), |
2641 vep_offset, | |
2642 frame_complete, | |
2643 stack_slots / VMRegImpl::slots_per_word, | |
2644 (is_static ? in_ByteSize(klass_offset) : in_ByteSize(receiver_offset)), | |
2645 in_ByteSize(lock_slot_offset*VMRegImpl::stack_slot_size), | |
2646 oop_maps); | |
4873
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2647 |
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2648 if (is_critical_native) { |
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2649 nm->set_lazy_critical_native(true); |
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2650 } |
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2651 |
0 | 2652 return nm; |
2653 | |
2654 } | |
2655 | |
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2656 #ifdef HAVE_DTRACE_H |
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2657 // --------------------------------------------------------------------------- |
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2658 // Generate a dtrace nmethod for a given signature. The method takes arguments |
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2659 // in the Java compiled code convention, marshals them to the native |
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2660 // abi and then leaves nops at the position you would expect to call a native |
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2661 // function. When the probe is enabled the nops are replaced with a trap |
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2662 // instruction that dtrace inserts and the trace will cause a notification |
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2663 // to dtrace. |
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2664 // |
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2665 // The probes are only able to take primitive types and java/lang/String as |
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2666 // arguments. No other java types are allowed. Strings are converted to utf8 |
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2667 // strings so that from dtrace point of view java strings are converted to C |
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2668 // strings. There is an arbitrary fixed limit on the total space that a method |
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2669 // can use for converting the strings. (256 chars per string in the signature). |
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2670 // So any java string larger then this is truncated. |
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2671 |
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2672 static int fp_offset[ConcreteRegisterImpl::number_of_registers] = { 0 }; |
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2673 static bool offsets_initialized = false; |
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2674 |
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2675 |
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2676 nmethod *SharedRuntime::generate_dtrace_nmethod(MacroAssembler *masm, |
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2677 methodHandle method) { |
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2678 |
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2679 |
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2680 // generate_dtrace_nmethod is guarded by a mutex so we are sure to |
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2681 // be single threaded in this method. |
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2682 assert(AdapterHandlerLibrary_lock->owned_by_self(), "must be"); |
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2683 |
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2684 if (!offsets_initialized) { |
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2685 fp_offset[c_rarg0->as_VMReg()->value()] = -1 * wordSize; |
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2686 fp_offset[c_rarg1->as_VMReg()->value()] = -2 * wordSize; |
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2687 fp_offset[c_rarg2->as_VMReg()->value()] = -3 * wordSize; |
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2688 fp_offset[c_rarg3->as_VMReg()->value()] = -4 * wordSize; |
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2689 fp_offset[c_rarg4->as_VMReg()->value()] = -5 * wordSize; |
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2690 fp_offset[c_rarg5->as_VMReg()->value()] = -6 * wordSize; |
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2691 |
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2692 fp_offset[c_farg0->as_VMReg()->value()] = -7 * wordSize; |
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2693 fp_offset[c_farg1->as_VMReg()->value()] = -8 * wordSize; |
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2694 fp_offset[c_farg2->as_VMReg()->value()] = -9 * wordSize; |
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2695 fp_offset[c_farg3->as_VMReg()->value()] = -10 * wordSize; |
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2696 fp_offset[c_farg4->as_VMReg()->value()] = -11 * wordSize; |
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2697 fp_offset[c_farg5->as_VMReg()->value()] = -12 * wordSize; |
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2698 fp_offset[c_farg6->as_VMReg()->value()] = -13 * wordSize; |
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2699 fp_offset[c_farg7->as_VMReg()->value()] = -14 * wordSize; |
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2700 |
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2701 offsets_initialized = true; |
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2702 } |
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2703 // Fill in the signature array, for the calling-convention call. |
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2704 int total_args_passed = method->size_of_parameters(); |
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2705 |
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2706 BasicType* in_sig_bt = NEW_RESOURCE_ARRAY(BasicType, total_args_passed); |
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2707 VMRegPair *in_regs = NEW_RESOURCE_ARRAY(VMRegPair, total_args_passed); |
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2708 |
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2709 // The signature we are going to use for the trap that dtrace will see |
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2710 // java/lang/String is converted. We drop "this" and any other object |
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2711 // is converted to NULL. (A one-slot java/lang/Long object reference |
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2712 // is converted to a two-slot long, which is why we double the allocation). |
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2713 BasicType* out_sig_bt = NEW_RESOURCE_ARRAY(BasicType, total_args_passed * 2); |
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2714 VMRegPair* out_regs = NEW_RESOURCE_ARRAY(VMRegPair, total_args_passed * 2); |
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2715 |
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2716 int i=0; |
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2717 int total_strings = 0; |
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2718 int first_arg_to_pass = 0; |
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2719 int total_c_args = 0; |
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2720 |
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2721 // Skip the receiver as dtrace doesn't want to see it |
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2722 if( !method->is_static() ) { |
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2723 in_sig_bt[i++] = T_OBJECT; |
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2724 first_arg_to_pass = 1; |
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2725 } |
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2726 |
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2727 // We need to convert the java args to where a native (non-jni) function |
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2728 // would expect them. To figure out where they go we convert the java |
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2729 // signature to a C signature. |
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2730 |
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2731 SignatureStream ss(method->signature()); |
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2732 for ( ; !ss.at_return_type(); ss.next()) { |
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2733 BasicType bt = ss.type(); |
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2734 in_sig_bt[i++] = bt; // Collect remaining bits of signature |
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2735 out_sig_bt[total_c_args++] = bt; |
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2736 if( bt == T_OBJECT) { |
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2737 Symbol* s = ss.as_symbol_or_null(); // symbol is created |
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2738 if (s == vmSymbols::java_lang_String()) { |
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2739 total_strings++; |
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2740 out_sig_bt[total_c_args-1] = T_ADDRESS; |
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2741 } else if (s == vmSymbols::java_lang_Boolean() || |
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2742 s == vmSymbols::java_lang_Character() || |
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2743 s == vmSymbols::java_lang_Byte() || |
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2744 s == vmSymbols::java_lang_Short() || |
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2745 s == vmSymbols::java_lang_Integer() || |
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2746 s == vmSymbols::java_lang_Float()) { |
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2747 out_sig_bt[total_c_args-1] = T_INT; |
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2748 } else if (s == vmSymbols::java_lang_Long() || |
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2749 s == vmSymbols::java_lang_Double()) { |
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2750 out_sig_bt[total_c_args-1] = T_LONG; |
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2751 out_sig_bt[total_c_args++] = T_VOID; |
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2752 } |
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2753 } else if ( bt == T_LONG || bt == T_DOUBLE ) { |
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2754 in_sig_bt[i++] = T_VOID; // Longs & doubles take 2 Java slots |
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2755 // We convert double to long |
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2756 out_sig_bt[total_c_args-1] = T_LONG; |
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2757 out_sig_bt[total_c_args++] = T_VOID; |
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2758 } else if ( bt == T_FLOAT) { |
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2759 // We convert float to int |
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2760 out_sig_bt[total_c_args-1] = T_INT; |
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2761 } |
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2762 } |
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2763 |
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2764 assert(i==total_args_passed, "validly parsed signature"); |
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2765 |
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2766 // Now get the compiled-Java layout as input arguments |
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2767 int comp_args_on_stack; |
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2768 comp_args_on_stack = SharedRuntime::java_calling_convention( |
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2769 in_sig_bt, in_regs, total_args_passed, false); |
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2770 |
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2771 // Now figure out where the args must be stored and how much stack space |
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2772 // they require (neglecting out_preserve_stack_slots but space for storing |
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2773 // the 1st six register arguments). It's weird see int_stk_helper. |
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2774 |
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2775 int out_arg_slots; |
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2776 out_arg_slots = c_calling_convention(out_sig_bt, out_regs, NULL, total_c_args); |
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2777 |
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2778 // Calculate the total number of stack slots we will need. |
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2779 |
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2780 // First count the abi requirement plus all of the outgoing args |
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2781 int stack_slots = SharedRuntime::out_preserve_stack_slots() + out_arg_slots; |
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2782 |
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2783 // Now space for the string(s) we must convert |
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2784 int* string_locs = NEW_RESOURCE_ARRAY(int, total_strings + 1); |
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2785 for (i = 0; i < total_strings ; i++) { |
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2786 string_locs[i] = stack_slots; |
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2787 stack_slots += max_dtrace_string_size / VMRegImpl::stack_slot_size; |
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2788 } |
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2789 |
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2790 // Plus the temps we might need to juggle register args |
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2791 // regs take two slots each |
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2792 stack_slots += (Argument::n_int_register_parameters_c + |
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2793 Argument::n_float_register_parameters_c) * 2; |
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2794 |
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2795 |
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2796 // + 4 for return address (which we own) and saved rbp, |
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2797 |
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2798 stack_slots += 4; |
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2799 |
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2800 // Ok The space we have allocated will look like: |
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2801 // |
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2802 // |
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2803 // FP-> | | |
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2804 // |---------------------| |
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2805 // | string[n] | |
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2806 // |---------------------| <- string_locs[n] |
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2807 // | string[n-1] | |
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2808 // |---------------------| <- string_locs[n-1] |
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2809 // | ... | |
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2810 // | ... | |
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2811 // |---------------------| <- string_locs[1] |
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2812 // | string[0] | |
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2813 // |---------------------| <- string_locs[0] |
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2814 // | outbound memory | |
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2815 // | based arguments | |
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2816 // | | |
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2817 // |---------------------| |
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2818 // | | |
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2819 // SP-> | out_preserved_slots | |
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2820 // |
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2821 // |
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2822 |
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2823 // Now compute actual number of stack words we need rounding to make |
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2824 // stack properly aligned. |
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2825 stack_slots = round_to(stack_slots, 4 * VMRegImpl::slots_per_word); |
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2826 |
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2827 int stack_size = stack_slots * VMRegImpl::stack_slot_size; |
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2828 |
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2829 intptr_t start = (intptr_t)__ pc(); |
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2830 |
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2831 // First thing make an ic check to see if we should even be here |
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2832 |
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2833 // We are free to use all registers as temps without saving them and |
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2834 // restoring them except rbp. rbp, is the only callee save register |
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2835 // as far as the interpreter and the compiler(s) are concerned. |
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2836 |
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2837 const Register ic_reg = rax; |
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2838 const Register receiver = rcx; |
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2839 Label hit; |
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2840 Label exception_pending; |
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2841 |
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2842 |
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2843 __ verify_oop(receiver); |
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2844 __ cmpl(ic_reg, Address(receiver, oopDesc::klass_offset_in_bytes())); |
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2845 __ jcc(Assembler::equal, hit); |
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2846 |
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2847 __ jump(RuntimeAddress(SharedRuntime::get_ic_miss_stub())); |
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2848 |
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2849 // verified entry must be aligned for code patching. |
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2850 // and the first 5 bytes must be in the same cache line |
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2851 // if we align at 8 then we will be sure 5 bytes are in the same line |
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2852 __ align(8); |
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2853 |
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2854 __ bind(hit); |
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2855 |
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2856 int vep_offset = ((intptr_t)__ pc()) - start; |
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2857 |
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2858 |
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2859 // The instruction at the verified entry point must be 5 bytes or longer |
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2860 // because it can be patched on the fly by make_non_entrant. The stack bang |
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2861 // instruction fits that requirement. |
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2862 |
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2863 // Generate stack overflow check |
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2864 |
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2865 if (UseStackBanging) { |
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2866 if (stack_size <= StackShadowPages*os::vm_page_size()) { |
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2867 __ bang_stack_with_offset(StackShadowPages*os::vm_page_size()); |
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2868 } else { |
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2869 __ movl(rax, stack_size); |
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2870 __ bang_stack_size(rax, rbx); |
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2871 } |
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2872 } else { |
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2873 // need a 5 byte instruction to allow MT safe patching to non-entrant |
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2874 __ fat_nop(); |
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2875 } |
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2876 |
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2877 assert(((uintptr_t)__ pc() - start - vep_offset) >= 5, |
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2878 "valid size for make_non_entrant"); |
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2879 |
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2880 // Generate a new frame for the wrapper. |
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2881 __ enter(); |
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2882 |
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2883 // -4 because return address is already present and so is saved rbp, |
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2884 if (stack_size - 2*wordSize != 0) { |
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2885 __ subq(rsp, stack_size - 2*wordSize); |
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2886 } |
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2887 |
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2888 // Frame is now completed as far a size and linkage. |
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2889 |
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2890 int frame_complete = ((intptr_t)__ pc()) - start; |
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2891 |
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2892 int c_arg, j_arg; |
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2893 |
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2894 // State of input register args |
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2895 |
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2896 bool live[ConcreteRegisterImpl::number_of_registers]; |
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2897 |
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2898 live[j_rarg0->as_VMReg()->value()] = false; |
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2899 live[j_rarg1->as_VMReg()->value()] = false; |
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2900 live[j_rarg2->as_VMReg()->value()] = false; |
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2901 live[j_rarg3->as_VMReg()->value()] = false; |
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2902 live[j_rarg4->as_VMReg()->value()] = false; |
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2903 live[j_rarg5->as_VMReg()->value()] = false; |
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2904 |
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2905 live[j_farg0->as_VMReg()->value()] = false; |
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2906 live[j_farg1->as_VMReg()->value()] = false; |
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2907 live[j_farg2->as_VMReg()->value()] = false; |
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2908 live[j_farg3->as_VMReg()->value()] = false; |
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2909 live[j_farg4->as_VMReg()->value()] = false; |
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2910 live[j_farg5->as_VMReg()->value()] = false; |
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2911 live[j_farg6->as_VMReg()->value()] = false; |
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2912 live[j_farg7->as_VMReg()->value()] = false; |
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2913 |
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2914 |
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2915 bool rax_is_zero = false; |
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2916 |
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2917 // All args (except strings) destined for the stack are moved first |
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2918 for (j_arg = first_arg_to_pass, c_arg = 0 ; |
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2919 j_arg < total_args_passed ; j_arg++, c_arg++ ) { |
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2920 VMRegPair src = in_regs[j_arg]; |
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2921 VMRegPair dst = out_regs[c_arg]; |
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2922 |
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2923 // Get the real reg value or a dummy (rsp) |
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2924 |
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2925 int src_reg = src.first()->is_reg() ? |
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2926 src.first()->value() : |
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2927 rsp->as_VMReg()->value(); |
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2928 |
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2929 bool useless = in_sig_bt[j_arg] == T_ARRAY || |
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2930 (in_sig_bt[j_arg] == T_OBJECT && |
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2931 out_sig_bt[c_arg] != T_INT && |
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2932 out_sig_bt[c_arg] != T_ADDRESS && |
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2933 out_sig_bt[c_arg] != T_LONG); |
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2934 |
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2935 live[src_reg] = !useless; |
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2936 |
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2937 if (dst.first()->is_stack()) { |
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2938 |
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2939 // Even though a string arg in a register is still live after this loop |
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2940 // after the string conversion loop (next) it will be dead so we take |
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2941 // advantage of that now for simpler code to manage live. |
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2942 |
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2943 live[src_reg] = false; |
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2944 switch (in_sig_bt[j_arg]) { |
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2945 |
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2946 case T_ARRAY: |
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2947 case T_OBJECT: |
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2948 { |
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2949 Address stack_dst(rsp, reg2offset_out(dst.first())); |
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2950 |
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2951 if (out_sig_bt[c_arg] == T_INT || out_sig_bt[c_arg] == T_LONG) { |
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2952 // need to unbox a one-word value |
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2953 Register in_reg = rax; |
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2954 if ( src.first()->is_reg() ) { |
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2955 in_reg = src.first()->as_Register(); |
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2956 } else { |
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2957 __ movq(rax, Address(rbp, reg2offset_in(src.first()))); |
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2958 rax_is_zero = false; |
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2959 } |
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2960 Label skipUnbox; |
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2961 __ movptr(Address(rsp, reg2offset_out(dst.first())), |
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2962 (int32_t)NULL_WORD); |
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2963 __ testq(in_reg, in_reg); |
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2964 __ jcc(Assembler::zero, skipUnbox); |
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2965 |
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2966 BasicType bt = out_sig_bt[c_arg]; |
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2967 int box_offset = java_lang_boxing_object::value_offset_in_bytes(bt); |
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2968 Address src1(in_reg, box_offset); |
165
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2969 if ( bt == T_LONG ) { |
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|
2970 __ movq(in_reg, src1); |
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2971 __ movq(stack_dst, in_reg); |
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2972 assert(out_sig_bt[c_arg+1] == T_VOID, "must be"); |
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2973 ++c_arg; // skip over T_VOID to keep the loop indices in sync |
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|
2974 } else { |
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|
2975 __ movl(in_reg, src1); |
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|
2976 __ movl(stack_dst, in_reg); |
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113
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|
2977 } |
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113
diff
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|
2978 |
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|
2979 __ bind(skipUnbox); |
018d5b58dd4f
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|
2980 } else if (out_sig_bt[c_arg] != T_ADDRESS) { |
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2981 // Convert the arg to NULL |
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2982 if (!rax_is_zero) { |
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2983 __ xorq(rax, rax); |
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2984 rax_is_zero = true; |
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|
2985 } |
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|
2986 __ movq(stack_dst, rax); |
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|
2987 } |
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113
diff
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|
2988 } |
018d5b58dd4f
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113
diff
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|
2989 break; |
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kamg
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113
diff
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|
2990 |
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|
2991 case T_VOID: |
018d5b58dd4f
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kamg
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|
2992 break; |
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113
diff
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|
2993 |
018d5b58dd4f
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113
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|
2994 case T_FLOAT: |
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|
2995 // This does the right thing since we know it is destined for the |
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2996 // stack |
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|
2997 float_move(masm, src, dst); |
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|
2998 break; |
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kamg
parents:
113
diff
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|
2999 |
018d5b58dd4f
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|
3000 case T_DOUBLE: |
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|
3001 // This does the right thing since we know it is destined for the |
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|
3002 // stack |
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|
3003 double_move(masm, src, dst); |
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6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
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113
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|
3004 break; |
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kamg
parents:
113
diff
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|
3005 |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
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113
diff
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|
3006 case T_LONG : |
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|
3007 long_move(masm, src, dst); |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
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|
3008 break; |
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6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
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parents:
113
diff
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|
3009 |
018d5b58dd4f
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113
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|
3010 case T_ADDRESS: assert(false, "found T_ADDRESS in java args"); |
018d5b58dd4f
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kamg
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113
diff
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|
3011 |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
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113
diff
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|
3012 default: |
018d5b58dd4f
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113
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|
3013 move32_64(masm, src, dst); |
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kamg
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113
diff
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|
3014 } |
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113
diff
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|
3015 } |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3016 |
018d5b58dd4f
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kamg
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113
diff
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|
3017 } |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3018 |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
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113
diff
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|
3019 // If we have any strings we must store any register based arg to the stack |
018d5b58dd4f
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113
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|
3020 // This includes any still live xmm registers too. |
018d5b58dd4f
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kamg
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113
diff
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|
3021 |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
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113
diff
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|
3022 int sid = 0; |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3023 |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
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113
diff
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|
3024 if (total_strings > 0 ) { |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
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|
3025 for (j_arg = first_arg_to_pass, c_arg = 0 ; |
018d5b58dd4f
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kamg
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113
diff
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|
3026 j_arg < total_args_passed ; j_arg++, c_arg++ ) { |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
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113
diff
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|
3027 VMRegPair src = in_regs[j_arg]; |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
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113
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|
3028 VMRegPair dst = out_regs[c_arg]; |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3029 |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
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113
diff
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|
3030 if (src.first()->is_reg()) { |
018d5b58dd4f
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113
diff
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|
3031 Address src_tmp(rbp, fp_offset[src.first()->value()]); |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3032 |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
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|
3033 // string oops were left untouched by the previous loop even if the |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
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113
diff
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|
3034 // eventual (converted) arg is destined for the stack so park them |
018d5b58dd4f
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113
diff
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|
3035 // away now (except for first) |
018d5b58dd4f
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kamg
parents:
113
diff
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|
3036 |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
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|
3037 if (out_sig_bt[c_arg] == T_ADDRESS) { |
018d5b58dd4f
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kamg
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113
diff
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|
3038 Address utf8_addr = Address( |
018d5b58dd4f
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113
diff
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|
3039 rsp, string_locs[sid++] * VMRegImpl::stack_slot_size); |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
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113
diff
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|
3040 if (sid != 1) { |
018d5b58dd4f
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kamg
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113
diff
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|
3041 // The first string arg won't be killed until after the utf8 |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
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|
3042 // conversion |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
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113
diff
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|
3043 __ movq(utf8_addr, src.first()->as_Register()); |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
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113
diff
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|
3044 } |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
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113
diff
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|
3045 } else if (dst.first()->is_reg()) { |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
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113
diff
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|
3046 if (in_sig_bt[j_arg] == T_FLOAT || in_sig_bt[j_arg] == T_DOUBLE) { |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3047 |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
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113
diff
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|
3048 // Convert the xmm register to an int and store it in the reserved |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
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113
diff
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|
3049 // location for the eventual c register arg |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
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113
diff
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|
3050 XMMRegister f = src.first()->as_XMMRegister(); |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
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113
diff
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|
3051 if (in_sig_bt[j_arg] == T_FLOAT) { |
018d5b58dd4f
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kamg
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113
diff
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|
3052 __ movflt(src_tmp, f); |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
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113
diff
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|
3053 } else { |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
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113
diff
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|
3054 __ movdbl(src_tmp, f); |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
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|
3055 } |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
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|
3056 } else { |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
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113
diff
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|
3057 // If the arg is an oop type we don't support don't bother to store |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
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113
diff
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|
3058 // it remember string was handled above. |
018d5b58dd4f
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kamg
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113
diff
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|
3059 bool useless = in_sig_bt[j_arg] == T_ARRAY || |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
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113
diff
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|
3060 (in_sig_bt[j_arg] == T_OBJECT && |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
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113
diff
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|
3061 out_sig_bt[c_arg] != T_INT && |
018d5b58dd4f
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113
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|
3062 out_sig_bt[c_arg] != T_LONG); |
018d5b58dd4f
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kamg
parents:
113
diff
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|
3063 |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
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113
diff
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|
3064 if (!useless) { |
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113
diff
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|
3065 __ movq(src_tmp, src.first()->as_Register()); |
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kamg
parents:
113
diff
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|
3066 } |
018d5b58dd4f
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kamg
parents:
113
diff
changeset
|
3067 } |
018d5b58dd4f
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kamg
parents:
113
diff
changeset
|
3068 } |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3069 } |
018d5b58dd4f
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kamg
parents:
113
diff
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|
3070 if (in_sig_bt[j_arg] == T_OBJECT && out_sig_bt[c_arg] == T_LONG) { |
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113
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|
3071 assert(out_sig_bt[c_arg+1] == T_VOID, "must be"); |
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|
3072 ++c_arg; // skip over T_VOID to keep the loop indices in sync |
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kamg
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113
diff
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|
3073 } |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3074 } |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3075 |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
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113
diff
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|
3076 // Now that the volatile registers are safe, convert all the strings |
018d5b58dd4f
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kamg
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113
diff
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|
3077 sid = 0; |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
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113
diff
changeset
|
3078 |
018d5b58dd4f
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113
diff
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|
3079 for (j_arg = first_arg_to_pass, c_arg = 0 ; |
018d5b58dd4f
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113
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|
3080 j_arg < total_args_passed ; j_arg++, c_arg++ ) { |
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113
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|
3081 if (out_sig_bt[c_arg] == T_ADDRESS) { |
018d5b58dd4f
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kamg
parents:
113
diff
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|
3082 // It's a string |
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
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113
diff
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|
3083 Address utf8_addr = Address( |
018d5b58dd4f
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113
diff
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|
3084 rsp, string_locs[sid++] * VMRegImpl::stack_slot_size); |
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113
diff
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|
3085 // The first string we find might still be in the original java arg |
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113
diff
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|
3086 // register |
018d5b58dd4f
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kamg
parents:
113
diff
changeset
|
3087 |
018d5b58dd4f
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113
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|
3088 VMReg src = in_regs[j_arg].first(); |
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113
diff
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|
3089 |
018d5b58dd4f
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113
diff
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|
3090 // We will need to eventually save the final argument to the trap |
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|
3091 // in the von-volatile location dedicated to src. This is the offset |
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3092 // from fp we will use. |
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3093 int src_off = src->is_reg() ? |
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3094 fp_offset[src->value()] : reg2offset_in(src); |
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3095 |
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3096 // This is where the argument will eventually reside |
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3097 VMRegPair dst = out_regs[c_arg]; |
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3098 |
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3099 if (src->is_reg()) { |
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3100 if (sid == 1) { |
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3101 __ movq(c_rarg0, src->as_Register()); |
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3102 } else { |
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3103 __ movq(c_rarg0, utf8_addr); |
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3104 } |
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3105 } else { |
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3106 // arg is still in the original location |
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3107 __ movq(c_rarg0, Address(rbp, reg2offset_in(src))); |
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3108 } |
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|
3109 Label done, convert; |
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3110 |
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3111 // see if the oop is NULL |
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3112 __ testq(c_rarg0, c_rarg0); |
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3113 __ jcc(Assembler::notEqual, convert); |
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3114 |
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3115 if (dst.first()->is_reg()) { |
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3116 // Save the ptr to utf string in the origina src loc or the tmp |
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3117 // dedicated to it |
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3118 __ movq(Address(rbp, src_off), c_rarg0); |
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3119 } else { |
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3120 __ movq(Address(rsp, reg2offset_out(dst.first())), c_rarg0); |
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3121 } |
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3122 __ jmp(done); |
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3123 |
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3124 __ bind(convert); |
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|
3125 |
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3126 __ lea(c_rarg1, utf8_addr); |
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3127 if (dst.first()->is_reg()) { |
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3128 __ movq(Address(rbp, src_off), c_rarg1); |
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3129 } else { |
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3130 __ movq(Address(rsp, reg2offset_out(dst.first())), c_rarg1); |
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|
3131 } |
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3132 // And do the conversion |
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3133 __ call(RuntimeAddress( |
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3134 CAST_FROM_FN_PTR(address, SharedRuntime::get_utf))); |
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|
3135 |
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|
3136 __ bind(done); |
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|
3137 } |
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3138 if (in_sig_bt[j_arg] == T_OBJECT && out_sig_bt[c_arg] == T_LONG) { |
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3139 assert(out_sig_bt[c_arg+1] == T_VOID, "must be"); |
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3140 ++c_arg; // skip over T_VOID to keep the loop indices in sync |
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3141 } |
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|
3142 } |
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|
3143 // The get_utf call killed all the c_arg registers |
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3144 live[c_rarg0->as_VMReg()->value()] = false; |
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3145 live[c_rarg1->as_VMReg()->value()] = false; |
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3146 live[c_rarg2->as_VMReg()->value()] = false; |
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3147 live[c_rarg3->as_VMReg()->value()] = false; |
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3148 live[c_rarg4->as_VMReg()->value()] = false; |
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3149 live[c_rarg5->as_VMReg()->value()] = false; |
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|
3150 |
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|
3151 live[c_farg0->as_VMReg()->value()] = false; |
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3152 live[c_farg1->as_VMReg()->value()] = false; |
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3153 live[c_farg2->as_VMReg()->value()] = false; |
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3154 live[c_farg3->as_VMReg()->value()] = false; |
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3155 live[c_farg4->as_VMReg()->value()] = false; |
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3156 live[c_farg5->as_VMReg()->value()] = false; |
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3157 live[c_farg6->as_VMReg()->value()] = false; |
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3158 live[c_farg7->as_VMReg()->value()] = false; |
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|
3159 } |
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|
3160 |
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3161 // Now we can finally move the register args to their desired locations |
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|
3162 |
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|
3163 rax_is_zero = false; |
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|
3164 |
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|
3165 for (j_arg = first_arg_to_pass, c_arg = 0 ; |
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3166 j_arg < total_args_passed ; j_arg++, c_arg++ ) { |
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|
3167 |
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|
3168 VMRegPair src = in_regs[j_arg]; |
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3169 VMRegPair dst = out_regs[c_arg]; |
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|
3170 |
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|
3171 // Only need to look for args destined for the interger registers (since we |
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3172 // convert float/double args to look like int/long outbound) |
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3173 if (dst.first()->is_reg()) { |
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3174 Register r = dst.first()->as_Register(); |
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|
3175 |
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|
3176 // Check if the java arg is unsupported and thereofre useless |
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3177 bool useless = in_sig_bt[j_arg] == T_ARRAY || |
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3178 (in_sig_bt[j_arg] == T_OBJECT && |
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|
3179 out_sig_bt[c_arg] != T_INT && |
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3180 out_sig_bt[c_arg] != T_ADDRESS && |
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|
3181 out_sig_bt[c_arg] != T_LONG); |
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|
3182 |
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|
3183 |
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|
3184 // If we're going to kill an existing arg save it first |
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3185 if (live[dst.first()->value()]) { |
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3186 // you can't kill yourself |
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3187 if (src.first() != dst.first()) { |
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3188 __ movq(Address(rbp, fp_offset[dst.first()->value()]), r); |
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|
3189 } |
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|
3190 } |
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|
3191 if (src.first()->is_reg()) { |
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3192 if (live[src.first()->value()] ) { |
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3193 if (in_sig_bt[j_arg] == T_FLOAT) { |
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3194 __ movdl(r, src.first()->as_XMMRegister()); |
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3195 } else if (in_sig_bt[j_arg] == T_DOUBLE) { |
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3196 __ movdq(r, src.first()->as_XMMRegister()); |
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3197 } else if (r != src.first()->as_Register()) { |
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3198 if (!useless) { |
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3199 __ movq(r, src.first()->as_Register()); |
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3200 } |
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|
3201 } |
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|
3202 } else { |
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3203 // If the arg is an oop type we don't support don't bother to store |
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|
3204 // it |
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|
3205 if (!useless) { |
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3206 if (in_sig_bt[j_arg] == T_DOUBLE || |
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3207 in_sig_bt[j_arg] == T_LONG || |
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|
3208 in_sig_bt[j_arg] == T_OBJECT ) { |
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3209 __ movq(r, Address(rbp, fp_offset[src.first()->value()])); |
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3210 } else { |
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3211 __ movl(r, Address(rbp, fp_offset[src.first()->value()])); |
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3212 } |
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3213 } |
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3214 } |
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3215 live[src.first()->value()] = false; |
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3216 } else if (!useless) { |
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3217 // full sized move even for int should be ok |
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3218 __ movq(r, Address(rbp, reg2offset_in(src.first()))); |
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3219 } |
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3220 |
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3221 // At this point r has the original java arg in the final location |
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3222 // (assuming it wasn't useless). If the java arg was an oop |
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3223 // we have a bit more to do |
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3224 |
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3225 if (in_sig_bt[j_arg] == T_ARRAY || in_sig_bt[j_arg] == T_OBJECT ) { |
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3226 if (out_sig_bt[c_arg] == T_INT || out_sig_bt[c_arg] == T_LONG) { |
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3227 // need to unbox a one-word value |
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3228 Label skip; |
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3229 __ testq(r, r); |
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3230 __ jcc(Assembler::equal, skip); |
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3231 BasicType bt = out_sig_bt[c_arg]; |
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3232 int box_offset = java_lang_boxing_object::value_offset_in_bytes(bt); |
116
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3233 Address src1(r, box_offset); |
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3234 if ( bt == T_LONG ) { |
116
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3235 __ movq(r, src1); |
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3236 } else { |
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3237 __ movl(r, src1); |
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3238 } |
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3239 __ bind(skip); |
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3240 |
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3241 } else if (out_sig_bt[c_arg] != T_ADDRESS) { |
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3242 // Convert the arg to NULL |
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3243 __ xorq(r, r); |
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3244 } |
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3245 } |
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3246 |
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3247 // dst can longer be holding an input value |
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3248 live[dst.first()->value()] = false; |
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3249 } |
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3250 if (in_sig_bt[j_arg] == T_OBJECT && out_sig_bt[c_arg] == T_LONG) { |
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3251 assert(out_sig_bt[c_arg+1] == T_VOID, "must be"); |
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3252 ++c_arg; // skip over T_VOID to keep the loop indices in sync |
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3253 } |
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3254 } |
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3255 |
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3256 |
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3257 // Ok now we are done. Need to place the nop that dtrace wants in order to |
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3258 // patch in the trap |
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3259 int patch_offset = ((intptr_t)__ pc()) - start; |
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3260 |
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3261 __ nop(); |
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3262 |
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3263 |
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3264 // Return |
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3265 |
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3266 __ leave(); |
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3267 __ ret(0); |
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3268 |
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3269 __ flush(); |
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3270 |
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3271 nmethod *nm = nmethod::new_dtrace_nmethod( |
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3272 method, masm->code(), vep_offset, patch_offset, frame_complete, |
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3273 stack_slots / VMRegImpl::slots_per_word); |
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3274 return nm; |
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3275 |
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3276 } |
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3277 |
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3278 #endif // HAVE_DTRACE_H |
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3279 |
0 | 3280 // this function returns the adjust size (in number of words) to a c2i adapter |
3281 // activation for use during deoptimization | |
3282 int Deoptimization::last_frame_adjust(int callee_parameters, int callee_locals ) { | |
1506 | 3283 return (callee_locals - callee_parameters) * Interpreter::stackElementWords; |
0 | 3284 } |
3285 | |
3286 | |
3287 uint SharedRuntime::out_preserve_stack_slots() { | |
3288 return 0; | |
3289 } | |
3290 | |
3291 //------------------------------generate_deopt_blob---------------------------- | |
3292 void SharedRuntime::generate_deopt_blob() { | |
3293 // Allocate space for the code | |
3294 ResourceMark rm; | |
3295 // Setup code generation tools | |
3296 CodeBuffer buffer("deopt_blob", 2048, 1024); | |
3297 MacroAssembler* masm = new MacroAssembler(&buffer); | |
3298 int frame_size_in_words; | |
3299 OopMap* map = NULL; | |
3300 OopMapSet *oop_maps = new OopMapSet(); | |
3301 | |
3302 // ------------- | |
3303 // This code enters when returning to a de-optimized nmethod. A return | |
3304 // address has been pushed on the the stack, and return values are in | |
3305 // registers. | |
3306 // If we are doing a normal deopt then we were called from the patched | |
3307 // nmethod from the point we returned to the nmethod. So the return | |
3308 // address on the stack is wrong by NativeCall::instruction_size | |
3309 // We will adjust the value so it looks like we have the original return | |
3310 // address on the stack (like when we eagerly deoptimized). | |
3311 // In the case of an exception pending when deoptimizing, we enter | |
3312 // with a return address on the stack that points after the call we patched | |
3313 // into the exception handler. We have the following register state from, | |
3314 // e.g., the forward exception stub (see stubGenerator_x86_64.cpp). | |
3315 // rax: exception oop | |
3316 // rbx: exception handler | |
3317 // rdx: throwing pc | |
3318 // So in this case we simply jam rdx into the useless return address and | |
3319 // the stack looks just like we want. | |
3320 // | |
3321 // At this point we need to de-opt. We save the argument return | |
3322 // registers. We call the first C routine, fetch_unroll_info(). This | |
3323 // routine captures the return values and returns a structure which | |
3324 // describes the current frame size and the sizes of all replacement frames. | |
3325 // The current frame is compiled code and may contain many inlined | |
3326 // functions, each with their own JVM state. We pop the current frame, then | |
3327 // push all the new frames. Then we call the C routine unpack_frames() to | |
3328 // populate these frames. Finally unpack_frames() returns us the new target | |
3329 // address. Notice that callee-save registers are BLOWN here; they have | |
3330 // already been captured in the vframeArray at the time the return PC was | |
3331 // patched. | |
3332 address start = __ pc(); | |
3333 Label cont; | |
3334 | |
3335 // Prolog for non exception case! | |
3336 | |
3337 // Save everything in sight. | |
3338 map = RegisterSaver::save_live_registers(masm, 0, &frame_size_in_words); | |
3339 | |
3340 // Normal deoptimization. Save exec mode for unpack_frames. | |
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3341 __ movl(r14, Deoptimization::Unpack_deopt); // callee-saved |
0 | 3342 __ jmp(cont); |
304 | 3343 |
3344 int reexecute_offset = __ pc() - start; | |
3345 | |
3346 // Reexecute case | |
3347 // return address is the pc describes what bci to do re-execute at | |
3348 | |
3349 // No need to update map as each call to save_live_registers will produce identical oopmap | |
3350 (void) RegisterSaver::save_live_registers(masm, 0, &frame_size_in_words); | |
3351 | |
3352 __ movl(r14, Deoptimization::Unpack_reexecute); // callee-saved | |
3353 __ jmp(cont); | |
3354 | |
0 | 3355 int exception_offset = __ pc() - start; |
3356 | |
3357 // Prolog for exception case | |
3358 | |
304 | 3359 // all registers are dead at this entry point, except for rax, and |
3360 // rdx which contain the exception oop and exception pc | |
3361 // respectively. Set them in TLS and fall thru to the | |
3362 // unpack_with_exception_in_tls entry point. | |
3363 | |
3364 __ movptr(Address(r15_thread, JavaThread::exception_pc_offset()), rdx); | |
3365 __ movptr(Address(r15_thread, JavaThread::exception_oop_offset()), rax); | |
3366 | |
3367 int exception_in_tls_offset = __ pc() - start; | |
3368 | |
3369 // new implementation because exception oop is now passed in JavaThread | |
3370 | |
3371 // Prolog for exception case | |
3372 // All registers must be preserved because they might be used by LinearScan | |
3373 // Exceptiop oop and throwing PC are passed in JavaThread | |
3374 // tos: stack at point of call to method that threw the exception (i.e. only | |
3375 // args are on the stack, no return address) | |
3376 | |
3377 // make room on stack for the return address | |
3378 // It will be patched later with the throwing pc. The correct value is not | |
3379 // available now because loading it from memory would destroy registers. | |
3380 __ push(0); | |
0 | 3381 |
3382 // Save everything in sight. | |
3383 map = RegisterSaver::save_live_registers(masm, 0, &frame_size_in_words); | |
3384 | |
304 | 3385 // Now it is safe to overwrite any register |
3386 | |
0 | 3387 // Deopt during an exception. Save exec mode for unpack_frames. |
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3388 __ movl(r14, Deoptimization::Unpack_exception); // callee-saved |
0 | 3389 |
304 | 3390 // load throwing pc from JavaThread and patch it as the return address |
3391 // of the current frame. Then clear the field in JavaThread | |
3392 | |
3393 __ movptr(rdx, Address(r15_thread, JavaThread::exception_pc_offset())); | |
3394 __ movptr(Address(rbp, wordSize), rdx); | |
3395 __ movptr(Address(r15_thread, JavaThread::exception_pc_offset()), (int32_t)NULL_WORD); | |
3396 | |
3397 #ifdef ASSERT | |
3398 // verify that there is really an exception oop in JavaThread | |
3399 __ movptr(rax, Address(r15_thread, JavaThread::exception_oop_offset())); | |
3400 __ verify_oop(rax); | |
3401 | |
3402 // verify that there is no pending exception | |
3403 Label no_pending_exception; | |
3404 __ movptr(rax, Address(r15_thread, Thread::pending_exception_offset())); | |
3405 __ testptr(rax, rax); | |
3406 __ jcc(Assembler::zero, no_pending_exception); | |
3407 __ stop("must not have pending exception here"); | |
3408 __ bind(no_pending_exception); | |
3409 #endif | |
3410 | |
0 | 3411 __ bind(cont); |
3412 | |
3413 // Call C code. Need thread and this frame, but NOT official VM entry | |
3414 // crud. We cannot block on this call, no GC can happen. | |
3415 // | |
3416 // UnrollBlock* fetch_unroll_info(JavaThread* thread) | |
3417 | |
3418 // fetch_unroll_info needs to call last_java_frame(). | |
3419 | |
3420 __ set_last_Java_frame(noreg, noreg, NULL); | |
3421 #ifdef ASSERT | |
3422 { Label L; | |
304 | 3423 __ cmpptr(Address(r15_thread, |
0 | 3424 JavaThread::last_Java_fp_offset()), |
304 | 3425 (int32_t)0); |
0 | 3426 __ jcc(Assembler::equal, L); |
3427 __ stop("SharedRuntime::generate_deopt_blob: last_Java_fp not cleared"); | |
3428 __ bind(L); | |
3429 } | |
3430 #endif // ASSERT | |
304 | 3431 __ mov(c_rarg0, r15_thread); |
0 | 3432 __ call(RuntimeAddress(CAST_FROM_FN_PTR(address, Deoptimization::fetch_unroll_info))); |
3433 | |
3434 // Need to have an oopmap that tells fetch_unroll_info where to | |
3435 // find any register it might need. | |
3436 oop_maps->add_gc_map(__ pc() - start, map); | |
3437 | |
3438 __ reset_last_Java_frame(false, false); | |
3439 | |
3440 // Load UnrollBlock* into rdi | |
304 | 3441 __ mov(rdi, rax); |
3442 | |
3443 Label noException; | |
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3444 __ cmpl(r14, Deoptimization::Unpack_exception); // Was exception pending? |
304 | 3445 __ jcc(Assembler::notEqual, noException); |
3446 __ movptr(rax, Address(r15_thread, JavaThread::exception_oop_offset())); | |
3447 // QQQ this is useless it was NULL above | |
3448 __ movptr(rdx, Address(r15_thread, JavaThread::exception_pc_offset())); | |
3449 __ movptr(Address(r15_thread, JavaThread::exception_oop_offset()), (int32_t)NULL_WORD); | |
3450 __ movptr(Address(r15_thread, JavaThread::exception_pc_offset()), (int32_t)NULL_WORD); | |
3451 | |
3452 __ verify_oop(rax); | |
3453 | |
3454 // Overwrite the result registers with the exception results. | |
3455 __ movptr(Address(rsp, RegisterSaver::rax_offset_in_bytes()), rax); | |
3456 // I think this is useless | |
3457 __ movptr(Address(rsp, RegisterSaver::rdx_offset_in_bytes()), rdx); | |
3458 | |
3459 __ bind(noException); | |
0 | 3460 |
3461 // Only register save data is on the stack. | |
3462 // Now restore the result registers. Everything else is either dead | |
3463 // or captured in the vframeArray. | |
3464 RegisterSaver::restore_result_registers(masm); | |
3465 | |
3466 // All of the register save area has been popped of the stack. Only the | |
3467 // return address remains. | |
3468 | |
3469 // Pop all the frames we must move/replace. | |
3470 // | |
3471 // Frame picture (youngest to oldest) | |
3472 // 1: self-frame (no frame link) | |
3473 // 2: deopting frame (no frame link) | |
3474 // 3: caller of deopting frame (could be compiled/interpreted). | |
3475 // | |
3476 // Note: by leaving the return address of self-frame on the stack | |
3477 // and using the size of frame 2 to adjust the stack | |
3478 // when we are done the return to frame 3 will still be on the stack. | |
3479 | |
3480 // Pop deoptimized frame | |
3481 __ movl(rcx, Address(rdi, Deoptimization::UnrollBlock::size_of_deoptimized_frame_offset_in_bytes())); | |
304 | 3482 __ addptr(rsp, rcx); |
0 | 3483 |
3484 // rsp should be pointing at the return address to the caller (3) | |
3485 | |
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3486 // Pick up the initial fp we should save |
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3487 // restore rbp before stack bang because if stack overflow is thrown it needs to be pushed (and preserved) |
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3488 __ movptr(rbp, Address(rdi, Deoptimization::UnrollBlock::initial_info_offset_in_bytes())); |
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3489 |
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3490 #ifdef ASSERT |
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3491 // Compilers generate code that bang the stack by as much as the |
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|
3492 // interpreter would need. So this stack banging should never |
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|
3493 // trigger a fault. Verify that it does not on non product builds. |
0 | 3494 if (UseStackBanging) { |
3495 __ movl(rbx, Address(rdi, Deoptimization::UnrollBlock::total_frame_sizes_offset_in_bytes())); | |
3496 __ bang_stack_size(rbx, rcx); | |
3497 } | |
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|
3498 #endif |
0 | 3499 |
3500 // Load address of array of frame pcs into rcx | |
304 | 3501 __ movptr(rcx, Address(rdi, Deoptimization::UnrollBlock::frame_pcs_offset_in_bytes())); |
0 | 3502 |
3503 // Trash the old pc | |
304 | 3504 __ addptr(rsp, wordSize); |
0 | 3505 |
3506 // Load address of array of frame sizes into rsi | |
304 | 3507 __ movptr(rsi, Address(rdi, Deoptimization::UnrollBlock::frame_sizes_offset_in_bytes())); |
0 | 3508 |
3509 // Load counter into rdx | |
3510 __ movl(rdx, Address(rdi, Deoptimization::UnrollBlock::number_of_frames_offset_in_bytes())); | |
3511 | |
3512 // Now adjust the caller's stack to make up for the extra locals | |
3513 // but record the original sp so that we can save it in the skeletal interpreter | |
3514 // frame and the stack walking of interpreter_sender will get the unextended sp | |
3515 // value and not the "real" sp value. | |
3516 | |
3517 const Register sender_sp = r8; | |
3518 | |
304 | 3519 __ mov(sender_sp, rsp); |
0 | 3520 __ movl(rbx, Address(rdi, |
3521 Deoptimization::UnrollBlock:: | |
3522 caller_adjustment_offset_in_bytes())); | |
304 | 3523 __ subptr(rsp, rbx); |
0 | 3524 |
3525 // Push interpreter frames in a loop | |
3526 Label loop; | |
3527 __ bind(loop); | |
304 | 3528 __ movptr(rbx, Address(rsi, 0)); // Load frame size |
3529 #ifdef CC_INTERP | |
3530 __ subptr(rbx, 4*wordSize); // we'll push pc and ebp by hand and | |
3531 #ifdef ASSERT | |
3532 __ push(0xDEADDEAD); // Make a recognizable pattern | |
3533 __ push(0xDEADDEAD); | |
3534 #else /* ASSERT */ | |
3535 __ subptr(rsp, 2*wordSize); // skip the "static long no_param" | |
3536 #endif /* ASSERT */ | |
3537 #else | |
3538 __ subptr(rbx, 2*wordSize); // We'll push pc and ebp by hand | |
3539 #endif // CC_INTERP | |
3540 __ pushptr(Address(rcx, 0)); // Save return address | |
0 | 3541 __ enter(); // Save old & set new ebp |
304 | 3542 __ subptr(rsp, rbx); // Prolog |
3543 #ifdef CC_INTERP | |
3544 __ movptr(Address(rbp, | |
3545 -(sizeof(BytecodeInterpreter)) + in_bytes(byte_offset_of(BytecodeInterpreter, _sender_sp))), | |
3546 sender_sp); // Make it walkable | |
3547 #else /* CC_INTERP */ | |
0 | 3548 // This value is corrected by layout_activation_impl |
304 | 3549 __ movptr(Address(rbp, frame::interpreter_frame_last_sp_offset * wordSize), (int32_t)NULL_WORD ); |
3550 __ movptr(Address(rbp, frame::interpreter_frame_sender_sp_offset * wordSize), sender_sp); // Make it walkable | |
3551 #endif /* CC_INTERP */ | |
3552 __ mov(sender_sp, rsp); // Pass sender_sp to next frame | |
3553 __ addptr(rsi, wordSize); // Bump array pointer (sizes) | |
3554 __ addptr(rcx, wordSize); // Bump array pointer (pcs) | |
0 | 3555 __ decrementl(rdx); // Decrement counter |
3556 __ jcc(Assembler::notZero, loop); | |
304 | 3557 __ pushptr(Address(rcx, 0)); // Save final return address |
0 | 3558 |
3559 // Re-push self-frame | |
3560 __ enter(); // Save old & set new ebp | |
3561 | |
3562 // Allocate a full sized register save area. | |
3563 // Return address and rbp are in place, so we allocate two less words. | |
304 | 3564 __ subptr(rsp, (frame_size_in_words - 2) * wordSize); |
0 | 3565 |
3566 // Restore frame locals after moving the frame | |
3567 __ movdbl(Address(rsp, RegisterSaver::xmm0_offset_in_bytes()), xmm0); | |
304 | 3568 __ movptr(Address(rsp, RegisterSaver::rax_offset_in_bytes()), rax); |
0 | 3569 |
3570 // Call C code. Need thread but NOT official VM entry | |
3571 // crud. We cannot block on this call, no GC can happen. Call should | |
3572 // restore return values to their stack-slots with the new SP. | |
3573 // | |
3574 // void Deoptimization::unpack_frames(JavaThread* thread, int exec_mode) | |
3575 | |
3576 // Use rbp because the frames look interpreted now | |
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3577 // Save "the_pc" since it cannot easily be retrieved using the last_java_SP after we aligned SP. |
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3578 // Don't need the precise return PC here, just precise enough to point into this code blob. |
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|
3579 address the_pc = __ pc(); |
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|
3580 __ set_last_Java_frame(noreg, rbp, the_pc); |
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|
3581 |
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|
3582 __ andptr(rsp, -(StackAlignmentInBytes)); // Fix stack alignment as required by ABI |
304 | 3583 __ mov(c_rarg0, r15_thread); |
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3584 __ movl(c_rarg1, r14); // second arg: exec_mode |
0 | 3585 __ call(RuntimeAddress(CAST_FROM_FN_PTR(address, Deoptimization::unpack_frames))); |
4057
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3586 // Revert SP alignment after call since we're going to do some SP relative addressing below |
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|
3587 __ movptr(rsp, Address(r15_thread, JavaThread::last_Java_sp_offset())); |
0 | 3588 |
3589 // Set an oopmap for the call site | |
4057
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|
3590 // Use the same PC we used for the last java frame |
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|
3591 oop_maps->add_gc_map(the_pc - start, |
0 | 3592 new OopMap( frame_size_in_words, 0 )); |
3593 | |
4057
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|
3594 // Clear fp AND pc |
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|
3595 __ reset_last_Java_frame(true, true); |
0 | 3596 |
3597 // Collect return values | |
3598 __ movdbl(xmm0, Address(rsp, RegisterSaver::xmm0_offset_in_bytes())); | |
304 | 3599 __ movptr(rax, Address(rsp, RegisterSaver::rax_offset_in_bytes())); |
3600 // I think this is useless (throwing pc?) | |
3601 __ movptr(rdx, Address(rsp, RegisterSaver::rdx_offset_in_bytes())); | |
0 | 3602 |
3603 // Pop self-frame. | |
3604 __ leave(); // Epilog | |
3605 | |
3606 // Jump to interpreter | |
3607 __ ret(0); | |
3608 | |
3609 // Make sure all code is generated | |
3610 masm->flush(); | |
3611 | |
304 | 3612 _deopt_blob = DeoptimizationBlob::create(&buffer, oop_maps, 0, exception_offset, reexecute_offset, frame_size_in_words); |
3613 _deopt_blob->set_unpack_with_exception_in_tls_offset(exception_in_tls_offset); | |
0 | 3614 } |
3615 | |
3616 #ifdef COMPILER2 | |
3617 //------------------------------generate_uncommon_trap_blob-------------------- | |
3618 void SharedRuntime::generate_uncommon_trap_blob() { | |
3619 // Allocate space for the code | |
3620 ResourceMark rm; | |
3621 // Setup code generation tools | |
3622 CodeBuffer buffer("uncommon_trap_blob", 2048, 1024); | |
3623 MacroAssembler* masm = new MacroAssembler(&buffer); | |
3624 | |
3625 assert(SimpleRuntimeFrame::framesize % 4 == 0, "sp not 16-byte aligned"); | |
3626 | |
3627 address start = __ pc(); | |
3628 | |
17780 | 3629 if (UseRTMLocking) { |
3630 // Abort RTM transaction before possible nmethod deoptimization. | |
3631 __ xabort(0); | |
3632 } | |
3633 | |
0 | 3634 // Push self-frame. We get here with a return address on the |
3635 // stack, so rsp is 8-byte aligned until we allocate our frame. | |
304 | 3636 __ subptr(rsp, SimpleRuntimeFrame::return_off << LogBytesPerInt); // Epilog! |
0 | 3637 |
3638 // No callee saved registers. rbp is assumed implicitly saved | |
304 | 3639 __ movptr(Address(rsp, SimpleRuntimeFrame::rbp_off << LogBytesPerInt), rbp); |
0 | 3640 |
3641 // compiler left unloaded_class_index in j_rarg0 move to where the | |
3642 // runtime expects it. | |
3643 __ movl(c_rarg1, j_rarg0); | |
3644 | |
3645 __ set_last_Java_frame(noreg, noreg, NULL); | |
3646 | |
3647 // Call C code. Need thread but NOT official VM entry | |
3648 // crud. We cannot block on this call, no GC can happen. Call should | |
3649 // capture callee-saved registers as well as return values. | |
3650 // Thread is in rdi already. | |
3651 // | |
3652 // UnrollBlock* uncommon_trap(JavaThread* thread, jint unloaded_class_index); | |
3653 | |
304 | 3654 __ mov(c_rarg0, r15_thread); |
0 | 3655 __ call(RuntimeAddress(CAST_FROM_FN_PTR(address, Deoptimization::uncommon_trap))); |
3656 | |
3657 // Set an oopmap for the call site | |
3658 OopMapSet* oop_maps = new OopMapSet(); | |
3659 OopMap* map = new OopMap(SimpleRuntimeFrame::framesize, 0); | |
3660 | |
3661 // location of rbp is known implicitly by the frame sender code | |
3662 | |
3663 oop_maps->add_gc_map(__ pc() - start, map); | |
3664 | |
3665 __ reset_last_Java_frame(false, false); | |
3666 | |
3667 // Load UnrollBlock* into rdi | |
304 | 3668 __ mov(rdi, rax); |
0 | 3669 |
3670 // Pop all the frames we must move/replace. | |
3671 // | |
3672 // Frame picture (youngest to oldest) | |
3673 // 1: self-frame (no frame link) | |
3674 // 2: deopting frame (no frame link) | |
3675 // 3: caller of deopting frame (could be compiled/interpreted). | |
3676 | |
3677 // Pop self-frame. We have no frame, and must rely only on rax and rsp. | |
304 | 3678 __ addptr(rsp, (SimpleRuntimeFrame::framesize - 2) << LogBytesPerInt); // Epilog! |
0 | 3679 |
3680 // Pop deoptimized frame (int) | |
3681 __ movl(rcx, Address(rdi, | |
3682 Deoptimization::UnrollBlock:: | |
3683 size_of_deoptimized_frame_offset_in_bytes())); | |
304 | 3684 __ addptr(rsp, rcx); |
0 | 3685 |
3686 // rsp should be pointing at the return address to the caller (3) | |
3687 | |
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3688 // Pick up the initial fp we should save |
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3689 // restore rbp before stack bang because if stack overflow is thrown it needs to be pushed (and preserved) |
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|
3690 __ movptr(rbp, Address(rdi, Deoptimization::UnrollBlock::initial_info_offset_in_bytes())); |
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|
3691 |
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|
3692 #ifdef ASSERT |
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|
3693 // Compilers generate code that bang the stack by as much as the |
0bf37f737702
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|
3694 // interpreter would need. So this stack banging should never |
0bf37f737702
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|
3695 // trigger a fault. Verify that it does not on non product builds. |
0 | 3696 if (UseStackBanging) { |
3697 __ movl(rbx, Address(rdi ,Deoptimization::UnrollBlock::total_frame_sizes_offset_in_bytes())); | |
3698 __ bang_stack_size(rbx, rcx); | |
3699 } | |
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|
3700 #endif |
0 | 3701 |
3702 // Load address of array of frame pcs into rcx (address*) | |
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|
3703 __ movptr(rcx, Address(rdi, Deoptimization::UnrollBlock::frame_pcs_offset_in_bytes())); |
0 | 3704 |
3705 // Trash the return pc | |
304 | 3706 __ addptr(rsp, wordSize); |
0 | 3707 |
3708 // Load address of array of frame sizes into rsi (intptr_t*) | |
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|
3709 __ movptr(rsi, Address(rdi, Deoptimization::UnrollBlock:: frame_sizes_offset_in_bytes())); |
0 | 3710 |
3711 // Counter | |
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|
3712 __ movl(rdx, Address(rdi, Deoptimization::UnrollBlock:: number_of_frames_offset_in_bytes())); // (int) |
0 | 3713 |
3714 // Now adjust the caller's stack to make up for the extra locals but | |
3715 // record the original sp so that we can save it in the skeletal | |
3716 // interpreter frame and the stack walking of interpreter_sender | |
3717 // will get the unextended sp value and not the "real" sp value. | |
3718 | |
3719 const Register sender_sp = r8; | |
3720 | |
304 | 3721 __ mov(sender_sp, rsp); |
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|
3722 __ movl(rbx, Address(rdi, Deoptimization::UnrollBlock:: caller_adjustment_offset_in_bytes())); // (int) |
304 | 3723 __ subptr(rsp, rbx); |
0 | 3724 |
3725 // Push interpreter frames in a loop | |
3726 Label loop; | |
3727 __ bind(loop); | |
304 | 3728 __ movptr(rbx, Address(rsi, 0)); // Load frame size |
3729 __ subptr(rbx, 2 * wordSize); // We'll push pc and rbp by hand | |
3730 __ pushptr(Address(rcx, 0)); // Save return address | |
3731 __ enter(); // Save old & set new rbp | |
3732 __ subptr(rsp, rbx); // Prolog | |
520
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|
3733 #ifdef CC_INTERP |
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3734 __ movptr(Address(rbp, |
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3735 -(sizeof(BytecodeInterpreter)) + in_bytes(byte_offset_of(BytecodeInterpreter, _sender_sp))), |
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diff
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3736 sender_sp); // Make it walkable |
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diff
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|
3737 #else // CC_INTERP |
304 | 3738 __ movptr(Address(rbp, frame::interpreter_frame_sender_sp_offset * wordSize), |
3739 sender_sp); // Make it walkable | |
0 | 3740 // This value is corrected by layout_activation_impl |
304 | 3741 __ movptr(Address(rbp, frame::interpreter_frame_last_sp_offset * wordSize), (int32_t)NULL_WORD ); |
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|
3742 #endif // CC_INTERP |
304 | 3743 __ mov(sender_sp, rsp); // Pass sender_sp to next frame |
3744 __ addptr(rsi, wordSize); // Bump array pointer (sizes) | |
3745 __ addptr(rcx, wordSize); // Bump array pointer (pcs) | |
3746 __ decrementl(rdx); // Decrement counter | |
0 | 3747 __ jcc(Assembler::notZero, loop); |
304 | 3748 __ pushptr(Address(rcx, 0)); // Save final return address |
0 | 3749 |
3750 // Re-push self-frame | |
3751 __ enter(); // Save old & set new rbp | |
304 | 3752 __ subptr(rsp, (SimpleRuntimeFrame::framesize - 4) << LogBytesPerInt); |
0 | 3753 // Prolog |
3754 | |
3755 // Use rbp because the frames look interpreted now | |
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|
3756 // Save "the_pc" since it cannot easily be retrieved using the last_java_SP after we aligned SP. |
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|
3757 // Don't need the precise return PC here, just precise enough to point into this code blob. |
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|
3758 address the_pc = __ pc(); |
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|
3759 __ set_last_Java_frame(noreg, rbp, the_pc); |
0 | 3760 |
3761 // Call C code. Need thread but NOT official VM entry | |
3762 // crud. We cannot block on this call, no GC can happen. Call should | |
3763 // restore return values to their stack-slots with the new SP. | |
3764 // Thread is in rdi already. | |
3765 // | |
3766 // BasicType unpack_frames(JavaThread* thread, int exec_mode); | |
3767 | |
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|
3768 __ andptr(rsp, -(StackAlignmentInBytes)); // Align SP as required by ABI |
304 | 3769 __ mov(c_rarg0, r15_thread); |
0 | 3770 __ movl(c_rarg1, Deoptimization::Unpack_uncommon_trap); |
3771 __ call(RuntimeAddress(CAST_FROM_FN_PTR(address, Deoptimization::unpack_frames))); | |
3772 | |
3773 // Set an oopmap for the call site | |
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|
3774 // Use the same PC we used for the last java frame |
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|
3775 oop_maps->add_gc_map(the_pc - start, new OopMap(SimpleRuntimeFrame::framesize, 0)); |
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|
3776 |
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|
3777 // Clear fp AND pc |
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|
3778 __ reset_last_Java_frame(true, true); |
0 | 3779 |
3780 // Pop self-frame. | |
3781 __ leave(); // Epilog | |
3782 | |
3783 // Jump to interpreter | |
3784 __ ret(0); | |
3785 | |
3786 // Make sure all code is generated | |
3787 masm->flush(); | |
3788 | |
3789 _uncommon_trap_blob = UncommonTrapBlob::create(&buffer, oop_maps, | |
3790 SimpleRuntimeFrame::framesize >> 1); | |
3791 } | |
3792 #endif // COMPILER2 | |
3793 | |
3794 | |
3795 //------------------------------generate_handler_blob------ | |
3796 // | |
3797 // Generate a special Compile2Runtime blob that saves all registers, | |
3798 // and setup oopmap. | |
3799 // | |
6792
137868b7aa6f
7196199: java/text/Bidi/Bug6665028.java failed: Bidi run count incorrect
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parents:
6790
diff
changeset
|
3800 SafepointBlob* SharedRuntime::generate_handler_blob(address call_ptr, int poll_type) { |
0 | 3801 assert(StubRoutines::forward_exception_entry() != NULL, |
3802 "must be generated before"); | |
3803 | |
3804 ResourceMark rm; | |
3805 OopMapSet *oop_maps = new OopMapSet(); | |
3806 OopMap* map; | |
3807 | |
3808 // Allocate space for the code. Setup code generation tools. | |
3809 CodeBuffer buffer("handler_blob", 2048, 1024); | |
3810 MacroAssembler* masm = new MacroAssembler(&buffer); | |
3811 | |
3812 address start = __ pc(); | |
3813 address call_pc = NULL; | |
3814 int frame_size_in_words; | |
6792
137868b7aa6f
7196199: java/text/Bidi/Bug6665028.java failed: Bidi run count incorrect
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parents:
6790
diff
changeset
|
3815 bool cause_return = (poll_type == POLL_AT_RETURN); |
137868b7aa6f
7196199: java/text/Bidi/Bug6665028.java failed: Bidi run count incorrect
kvn
parents:
6790
diff
changeset
|
3816 bool save_vectors = (poll_type == POLL_AT_VECTOR_LOOP); |
0 | 3817 |
17780 | 3818 if (UseRTMLocking) { |
3819 // Abort RTM transaction before calling runtime | |
3820 // because critical section will be large and will be | |
3821 // aborted anyway. Also nmethod could be deoptimized. | |
3822 __ xabort(0); | |
3823 } | |
3824 | |
0 | 3825 // Make room for return address (or push it again) |
3826 if (!cause_return) { | |
304 | 3827 __ push(rbx); |
0 | 3828 } |
3829 | |
3830 // Save registers, fpu state, and flags | |
6792
137868b7aa6f
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kvn
parents:
6790
diff
changeset
|
3831 map = RegisterSaver::save_live_registers(masm, 0, &frame_size_in_words, save_vectors); |
0 | 3832 |
3833 // The following is basically a call_VM. However, we need the precise | |
3834 // address of the call in order to generate an oopmap. Hence, we do all the | |
3835 // work outselves. | |
3836 | |
3837 __ set_last_Java_frame(noreg, noreg, NULL); | |
3838 | |
3839 // The return address must always be correct so that frame constructor never | |
3840 // sees an invalid pc. | |
3841 | |
3842 if (!cause_return) { | |
3843 // overwrite the dummy value we pushed on entry | |
304 | 3844 __ movptr(c_rarg0, Address(r15_thread, JavaThread::saved_exception_pc_offset())); |
3845 __ movptr(Address(rbp, wordSize), c_rarg0); | |
0 | 3846 } |
3847 | |
3848 // Do the call | |
304 | 3849 __ mov(c_rarg0, r15_thread); |
0 | 3850 __ call(RuntimeAddress(call_ptr)); |
3851 | |
3852 // Set an oopmap for the call site. This oopmap will map all | |
3853 // oop-registers and debug-info registers as callee-saved. This | |
3854 // will allow deoptimization at this safepoint to find all possible | |
3855 // debug-info recordings, as well as let GC find all oops. | |
3856 | |
3857 oop_maps->add_gc_map( __ pc() - start, map); | |
3858 | |
3859 Label noException; | |
3860 | |
3861 __ reset_last_Java_frame(false, false); | |
3862 | |
304 | 3863 __ cmpptr(Address(r15_thread, Thread::pending_exception_offset()), (int32_t)NULL_WORD); |
0 | 3864 __ jcc(Assembler::equal, noException); |
3865 | |
3866 // Exception pending | |
3867 | |
6792
137868b7aa6f
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diff
changeset
|
3868 RegisterSaver::restore_live_registers(masm, save_vectors); |
0 | 3869 |
3870 __ jump(RuntimeAddress(StubRoutines::forward_exception_entry())); | |
3871 | |
3872 // No exception case | |
3873 __ bind(noException); | |
3874 | |
3875 // Normal exit, restore registers and exit. | |
6792
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parents:
6790
diff
changeset
|
3876 RegisterSaver::restore_live_registers(masm, save_vectors); |
0 | 3877 |
3878 __ ret(0); | |
3879 | |
3880 // Make sure all code is generated | |
3881 masm->flush(); | |
3882 | |
3883 // Fill-out other meta info | |
3884 return SafepointBlob::create(&buffer, oop_maps, frame_size_in_words); | |
3885 } | |
3886 | |
3887 // | |
3888 // generate_resolve_blob - call resolution (static/virtual/opt-virtual/ic-miss | |
3889 // | |
3890 // Generate a stub that calls into vm to find out the proper destination | |
3891 // of a java call. All the argument registers are live at this point | |
3892 // but since this is generic code we don't know what they are and the caller | |
3893 // must do any gc of the args. | |
3894 // | |
3753
cba7b5c2d53f
7045514: SPARC assembly code for JSR 292 ricochet frames
never
parents:
3363
diff
changeset
|
3895 RuntimeStub* SharedRuntime::generate_resolve_blob(address destination, const char* name) { |
0 | 3896 assert (StubRoutines::forward_exception_entry() != NULL, "must be generated before"); |
3897 | |
3898 // allocate space for the code | |
3899 ResourceMark rm; | |
3900 | |
3901 CodeBuffer buffer(name, 1000, 512); | |
3902 MacroAssembler* masm = new MacroAssembler(&buffer); | |
3903 | |
3904 int frame_size_in_words; | |
3905 | |
3906 OopMapSet *oop_maps = new OopMapSet(); | |
3907 OopMap* map = NULL; | |
3908 | |
3909 int start = __ offset(); | |
3910 | |
3911 map = RegisterSaver::save_live_registers(masm, 0, &frame_size_in_words); | |
3912 | |
3913 int frame_complete = __ offset(); | |
3914 | |
3915 __ set_last_Java_frame(noreg, noreg, NULL); | |
3916 | |
304 | 3917 __ mov(c_rarg0, r15_thread); |
0 | 3918 |
3919 __ call(RuntimeAddress(destination)); | |
3920 | |
3921 | |
3922 // Set an oopmap for the call site. | |
3923 // We need this not only for callee-saved registers, but also for volatile | |
3924 // registers that the compiler might be keeping live across a safepoint. | |
3925 | |
3926 oop_maps->add_gc_map( __ offset() - start, map); | |
3927 | |
3928 // rax contains the address we are going to jump to assuming no exception got installed | |
3929 | |
3930 // clear last_Java_sp | |
3931 __ reset_last_Java_frame(false, false); | |
3932 // check for pending exceptions | |
3933 Label pending; | |
304 | 3934 __ cmpptr(Address(r15_thread, Thread::pending_exception_offset()), (int32_t)NULL_WORD); |
0 | 3935 __ jcc(Assembler::notEqual, pending); |
3936 | |
6725
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|
3937 // get the returned Method* |
da91efe96a93
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|
3938 __ get_vm_result_2(rbx, r15_thread); |
304 | 3939 __ movptr(Address(rsp, RegisterSaver::rbx_offset_in_bytes()), rbx); |
3940 | |
3941 __ movptr(Address(rsp, RegisterSaver::rax_offset_in_bytes()), rax); | |
0 | 3942 |
3943 RegisterSaver::restore_live_registers(masm); | |
3944 | |
3945 // We are back the the original state on entry and ready to go. | |
3946 | |
3947 __ jmp(rax); | |
3948 | |
3949 // Pending exception after the safepoint | |
3950 | |
3951 __ bind(pending); | |
3952 | |
3953 RegisterSaver::restore_live_registers(masm); | |
3954 | |
3955 // exception pending => remove activation and forward to exception handler | |
3956 | |
3957 __ movptr(Address(r15_thread, JavaThread::vm_result_offset()), (int)NULL_WORD); | |
3958 | |
304 | 3959 __ movptr(rax, Address(r15_thread, Thread::pending_exception_offset())); |
0 | 3960 __ jump(RuntimeAddress(StubRoutines::forward_exception_entry())); |
3961 | |
3962 // ------------- | |
3963 // make sure all code is generated | |
3964 masm->flush(); | |
3965 | |
3966 // return the blob | |
3967 // frame_size_words or bytes?? | |
3968 return RuntimeStub::new_runtime_stub(name, &buffer, frame_complete, frame_size_in_words, oop_maps, true); | |
3969 } | |
3970 | |
3971 | |
23886
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8130150: Implement BigInteger.montgomeryMultiply intrinsic
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23050
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|
3972 //------------------------------Montgomery multiplication------------------------ |
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8130150: Implement BigInteger.montgomeryMultiply intrinsic
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changeset
|
3973 // |
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8130150: Implement BigInteger.montgomeryMultiply intrinsic
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|
3974 |
5601e440e5e7
8130150: Implement BigInteger.montgomeryMultiply intrinsic
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|
3975 #ifndef _WINDOWS |
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8130150: Implement BigInteger.montgomeryMultiply intrinsic
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|
3976 |
5601e440e5e7
8130150: Implement BigInteger.montgomeryMultiply intrinsic
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changeset
|
3977 #define ASM_SUBTRACT |
5601e440e5e7
8130150: Implement BigInteger.montgomeryMultiply intrinsic
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|
3978 |
5601e440e5e7
8130150: Implement BigInteger.montgomeryMultiply intrinsic
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changeset
|
3979 #ifdef ASM_SUBTRACT |
5601e440e5e7
8130150: Implement BigInteger.montgomeryMultiply intrinsic
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changeset
|
3980 // Subtract 0:b from carry:a. Return carry. |
5601e440e5e7
8130150: Implement BigInteger.montgomeryMultiply intrinsic
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diff
changeset
|
3981 static unsigned long |
5601e440e5e7
8130150: Implement BigInteger.montgomeryMultiply intrinsic
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parents:
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|
3982 sub(unsigned long a[], unsigned long b[], unsigned long carry, long len) { |
5601e440e5e7
8130150: Implement BigInteger.montgomeryMultiply intrinsic
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parents:
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diff
changeset
|
3983 long i = 0, cnt = len; |
5601e440e5e7
8130150: Implement BigInteger.montgomeryMultiply intrinsic
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changeset
|
3984 unsigned long tmp; |
5601e440e5e7
8130150: Implement BigInteger.montgomeryMultiply intrinsic
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diff
changeset
|
3985 asm volatile("clc; " |
5601e440e5e7
8130150: Implement BigInteger.montgomeryMultiply intrinsic
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parents:
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diff
changeset
|
3986 "0: ; " |
5601e440e5e7
8130150: Implement BigInteger.montgomeryMultiply intrinsic
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parents:
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diff
changeset
|
3987 "mov (%[b], %[i], 8), %[tmp]; " |
5601e440e5e7
8130150: Implement BigInteger.montgomeryMultiply intrinsic
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parents:
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diff
changeset
|
3988 "sbb %[tmp], (%[a], %[i], 8); " |
5601e440e5e7
8130150: Implement BigInteger.montgomeryMultiply intrinsic
vkempik
parents:
23050
diff
changeset
|
3989 "inc %[i]; dec %[cnt]; " |
5601e440e5e7
8130150: Implement BigInteger.montgomeryMultiply intrinsic
vkempik
parents:
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diff
changeset
|
3990 "jne 0b; " |
5601e440e5e7
8130150: Implement BigInteger.montgomeryMultiply intrinsic
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diff
changeset
|
3991 "mov %[carry], %[tmp]; sbb $0, %[tmp]; " |
5601e440e5e7
8130150: Implement BigInteger.montgomeryMultiply intrinsic
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parents:
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diff
changeset
|
3992 : [i]"+r"(i), [cnt]"+r"(cnt), [tmp]"=&r"(tmp) |
5601e440e5e7
8130150: Implement BigInteger.montgomeryMultiply intrinsic
vkempik
parents:
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diff
changeset
|
3993 : [a]"r"(a), [b]"r"(b), [carry]"r"(carry) |
5601e440e5e7
8130150: Implement BigInteger.montgomeryMultiply intrinsic
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parents:
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diff
changeset
|
3994 : "memory"); |
5601e440e5e7
8130150: Implement BigInteger.montgomeryMultiply intrinsic
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parents:
23050
diff
changeset
|
3995 return tmp; |
5601e440e5e7
8130150: Implement BigInteger.montgomeryMultiply intrinsic
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parents:
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diff
changeset
|
3996 } |
5601e440e5e7
8130150: Implement BigInteger.montgomeryMultiply intrinsic
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parents:
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diff
changeset
|
3997 #else // ASM_SUBTRACT |
5601e440e5e7
8130150: Implement BigInteger.montgomeryMultiply intrinsic
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parents:
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changeset
|
3998 typedef int __attribute__((mode(TI))) int128; |
5601e440e5e7
8130150: Implement BigInteger.montgomeryMultiply intrinsic
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parents:
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diff
changeset
|
3999 |
5601e440e5e7
8130150: Implement BigInteger.montgomeryMultiply intrinsic
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parents:
23050
diff
changeset
|
4000 // Subtract 0:b from carry:a. Return carry. |
5601e440e5e7
8130150: Implement BigInteger.montgomeryMultiply intrinsic
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parents:
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diff
changeset
|
4001 static unsigned long |
5601e440e5e7
8130150: Implement BigInteger.montgomeryMultiply intrinsic
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diff
changeset
|
4002 sub(unsigned long a[], unsigned long b[], unsigned long carry, int len) { |
5601e440e5e7
8130150: Implement BigInteger.montgomeryMultiply intrinsic
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parents:
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diff
changeset
|
4003 int128 tmp = 0; |
5601e440e5e7
8130150: Implement BigInteger.montgomeryMultiply intrinsic
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parents:
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changeset
|
4004 int i; |
5601e440e5e7
8130150: Implement BigInteger.montgomeryMultiply intrinsic
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parents:
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diff
changeset
|
4005 for (i = 0; i < len; i++) { |
5601e440e5e7
8130150: Implement BigInteger.montgomeryMultiply intrinsic
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parents:
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diff
changeset
|
4006 tmp += a[i]; |
5601e440e5e7
8130150: Implement BigInteger.montgomeryMultiply intrinsic
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parents:
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diff
changeset
|
4007 tmp -= b[i]; |
5601e440e5e7
8130150: Implement BigInteger.montgomeryMultiply intrinsic
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diff
changeset
|
4008 a[i] = tmp; |
5601e440e5e7
8130150: Implement BigInteger.montgomeryMultiply intrinsic
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parents:
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diff
changeset
|
4009 tmp >>= 64; |
5601e440e5e7
8130150: Implement BigInteger.montgomeryMultiply intrinsic
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parents:
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diff
changeset
|
4010 assert(-1 <= tmp && tmp <= 0, "invariant"); |
5601e440e5e7
8130150: Implement BigInteger.montgomeryMultiply intrinsic
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parents:
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diff
changeset
|
4011 } |
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8130150: Implement BigInteger.montgomeryMultiply intrinsic
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parents:
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diff
changeset
|
4012 return tmp + carry; |
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8130150: Implement BigInteger.montgomeryMultiply intrinsic
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parents:
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diff
changeset
|
4013 } |
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diff
changeset
|
4014 #endif // ! ASM_SUBTRACT |
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|
4015 |
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8130150: Implement BigInteger.montgomeryMultiply intrinsic
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changeset
|
4016 // Multiply (unsigned) Long A by Long B, accumulating the double- |
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changeset
|
4017 // length result into the accumulator formed of T0, T1, and T2. |
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|
4018 #define MACC(A, B, T0, T1, T2) \ |
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|
4019 do { \ |
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|
4020 unsigned long hi, lo; \ |
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|
4021 asm volatile("mul %5; add %%rax, %2; adc %%rdx, %3; adc $0, %4" \ |
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|
4022 : "=&d"(hi), "=a"(lo), "+r"(T0), "+r"(T1), "+g"(T2) \ |
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|
4023 : "r"(A), "a"(B) : "cc"); \ |
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|
4024 } while(0) |
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|
4025 |
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|
4026 // As above, but add twice the double-length result into the |
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diff
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|
4027 // accumulator. |
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|
4028 #define MACC2(A, B, T0, T1, T2) \ |
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|
4029 do { \ |
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changeset
|
4030 unsigned long hi, lo; \ |
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|
4031 asm volatile("mul %5; add %%rax, %2; adc %%rdx, %3; adc $0, %4;" \ |
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|
4032 "add %%rax, %2; adc %%rdx, %3; adc $0, %4" \ |
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|
4033 : "=&d"(hi), "=a"(lo), "+r"(T0), "+r"(T1), "+g"(T2) \ |
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|
4034 : "r"(A), "a"(B) : "cc"); \ |
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|
4035 } while(0) |
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|
4036 |
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|
4037 // Fast Montgomery multiplication. The derivation of the algorithm is |
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changeset
|
4038 // in A Cryptographic Library for the Motorola DSP56000, |
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|
4039 // Dusse and Kaliski, Proc. EUROCRYPT 90, pp. 230-237. |
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|
4040 |
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changeset
|
4041 static void __attribute__((noinline)) |
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|
4042 montgomery_multiply(unsigned long a[], unsigned long b[], unsigned long n[], |
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|
4043 unsigned long m[], unsigned long inv, int len) { |
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|
4044 unsigned long t0 = 0, t1 = 0, t2 = 0; // Triple-precision accumulator |
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|
4045 int i; |
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|
4046 |
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|
4047 assert(inv * n[0] == -1UL, "broken inverse in Montgomery multiply"); |
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|
4048 |
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|
4049 for (i = 0; i < len; i++) { |
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|
4050 int j; |
5601e440e5e7
8130150: Implement BigInteger.montgomeryMultiply intrinsic
vkempik
parents:
23050
diff
changeset
|
4051 for (j = 0; j < i; j++) { |
5601e440e5e7
8130150: Implement BigInteger.montgomeryMultiply intrinsic
vkempik
parents:
23050
diff
changeset
|
4052 MACC(a[j], b[i-j], t0, t1, t2); |
5601e440e5e7
8130150: Implement BigInteger.montgomeryMultiply intrinsic
vkempik
parents:
23050
diff
changeset
|
4053 MACC(m[j], n[i-j], t0, t1, t2); |
5601e440e5e7
8130150: Implement BigInteger.montgomeryMultiply intrinsic
vkempik
parents:
23050
diff
changeset
|
4054 } |
5601e440e5e7
8130150: Implement BigInteger.montgomeryMultiply intrinsic
vkempik
parents:
23050
diff
changeset
|
4055 MACC(a[i], b[0], t0, t1, t2); |
5601e440e5e7
8130150: Implement BigInteger.montgomeryMultiply intrinsic
vkempik
parents:
23050
diff
changeset
|
4056 m[i] = t0 * inv; |
5601e440e5e7
8130150: Implement BigInteger.montgomeryMultiply intrinsic
vkempik
parents:
23050
diff
changeset
|
4057 MACC(m[i], n[0], t0, t1, t2); |
5601e440e5e7
8130150: Implement BigInteger.montgomeryMultiply intrinsic
vkempik
parents:
23050
diff
changeset
|
4058 |
5601e440e5e7
8130150: Implement BigInteger.montgomeryMultiply intrinsic
vkempik
parents:
23050
diff
changeset
|
4059 assert(t0 == 0, "broken Montgomery multiply"); |
5601e440e5e7
8130150: Implement BigInteger.montgomeryMultiply intrinsic
vkempik
parents:
23050
diff
changeset
|
4060 |
5601e440e5e7
8130150: Implement BigInteger.montgomeryMultiply intrinsic
vkempik
parents:
23050
diff
changeset
|
4061 t0 = t1; t1 = t2; t2 = 0; |
5601e440e5e7
8130150: Implement BigInteger.montgomeryMultiply intrinsic
vkempik
parents:
23050
diff
changeset
|
4062 } |
5601e440e5e7
8130150: Implement BigInteger.montgomeryMultiply intrinsic
vkempik
parents:
23050
diff
changeset
|
4063 |
5601e440e5e7
8130150: Implement BigInteger.montgomeryMultiply intrinsic
vkempik
parents:
23050
diff
changeset
|
4064 for (i = len; i < 2*len; i++) { |
5601e440e5e7
8130150: Implement BigInteger.montgomeryMultiply intrinsic
vkempik
parents:
23050
diff
changeset
|
4065 int j; |
5601e440e5e7
8130150: Implement BigInteger.montgomeryMultiply intrinsic
vkempik
parents:
23050
diff
changeset
|
4066 for (j = i-len+1; j < len; j++) { |
5601e440e5e7
8130150: Implement BigInteger.montgomeryMultiply intrinsic
vkempik
parents:
23050
diff
changeset
|
4067 MACC(a[j], b[i-j], t0, t1, t2); |
5601e440e5e7
8130150: Implement BigInteger.montgomeryMultiply intrinsic
vkempik
parents:
23050
diff
changeset
|
4068 MACC(m[j], n[i-j], t0, t1, t2); |
5601e440e5e7
8130150: Implement BigInteger.montgomeryMultiply intrinsic
vkempik
parents:
23050
diff
changeset
|
4069 } |
5601e440e5e7
8130150: Implement BigInteger.montgomeryMultiply intrinsic
vkempik
parents:
23050
diff
changeset
|
4070 m[i-len] = t0; |
5601e440e5e7
8130150: Implement BigInteger.montgomeryMultiply intrinsic
vkempik
parents:
23050
diff
changeset
|
4071 t0 = t1; t1 = t2; t2 = 0; |
5601e440e5e7
8130150: Implement BigInteger.montgomeryMultiply intrinsic
vkempik
parents:
23050
diff
changeset
|
4072 } |
5601e440e5e7
8130150: Implement BigInteger.montgomeryMultiply intrinsic
vkempik
parents:
23050
diff
changeset
|
4073 |
5601e440e5e7
8130150: Implement BigInteger.montgomeryMultiply intrinsic
vkempik
parents:
23050
diff
changeset
|
4074 while (t0) |
5601e440e5e7
8130150: Implement BigInteger.montgomeryMultiply intrinsic
vkempik
parents:
23050
diff
changeset
|
4075 t0 = sub(m, n, t0, len); |
5601e440e5e7
8130150: Implement BigInteger.montgomeryMultiply intrinsic
vkempik
parents:
23050
diff
changeset
|
4076 } |
5601e440e5e7
8130150: Implement BigInteger.montgomeryMultiply intrinsic
vkempik
parents:
23050
diff
changeset
|
4077 |
5601e440e5e7
8130150: Implement BigInteger.montgomeryMultiply intrinsic
vkempik
parents:
23050
diff
changeset
|
4078 // Fast Montgomery squaring. This uses asymptotically 25% fewer |
5601e440e5e7
8130150: Implement BigInteger.montgomeryMultiply intrinsic
vkempik
parents:
23050
diff
changeset
|
4079 // multiplies so it should be up to 25% faster than Montgomery |
5601e440e5e7
8130150: Implement BigInteger.montgomeryMultiply intrinsic
vkempik
parents:
23050
diff
changeset
|
4080 // multiplication. However, its loop control is more complex and it |
5601e440e5e7
8130150: Implement BigInteger.montgomeryMultiply intrinsic
vkempik
parents:
23050
diff
changeset
|
4081 // may actually run slower on some machines. |
5601e440e5e7
8130150: Implement BigInteger.montgomeryMultiply intrinsic
vkempik
parents:
23050
diff
changeset
|
4082 |
5601e440e5e7
8130150: Implement BigInteger.montgomeryMultiply intrinsic
vkempik
parents:
23050
diff
changeset
|
4083 static void __attribute__((noinline)) |
5601e440e5e7
8130150: Implement BigInteger.montgomeryMultiply intrinsic
vkempik
parents:
23050
diff
changeset
|
4084 montgomery_square(unsigned long a[], unsigned long n[], |
5601e440e5e7
8130150: Implement BigInteger.montgomeryMultiply intrinsic
vkempik
parents:
23050
diff
changeset
|
4085 unsigned long m[], unsigned long inv, int len) { |
5601e440e5e7
8130150: Implement BigInteger.montgomeryMultiply intrinsic
vkempik
parents:
23050
diff
changeset
|
4086 unsigned long t0 = 0, t1 = 0, t2 = 0; // Triple-precision accumulator |
5601e440e5e7
8130150: Implement BigInteger.montgomeryMultiply intrinsic
vkempik
parents:
23050
diff
changeset
|
4087 int i; |
5601e440e5e7
8130150: Implement BigInteger.montgomeryMultiply intrinsic
vkempik
parents:
23050
diff
changeset
|
4088 |
5601e440e5e7
8130150: Implement BigInteger.montgomeryMultiply intrinsic
vkempik
parents:
23050
diff
changeset
|
4089 assert(inv * n[0] == -1UL, "broken inverse in Montgomery multiply"); |
5601e440e5e7
8130150: Implement BigInteger.montgomeryMultiply intrinsic
vkempik
parents:
23050
diff
changeset
|
4090 |
5601e440e5e7
8130150: Implement BigInteger.montgomeryMultiply intrinsic
vkempik
parents:
23050
diff
changeset
|
4091 for (i = 0; i < len; i++) { |
5601e440e5e7
8130150: Implement BigInteger.montgomeryMultiply intrinsic
vkempik
parents:
23050
diff
changeset
|
4092 int j; |
5601e440e5e7
8130150: Implement BigInteger.montgomeryMultiply intrinsic
vkempik
parents:
23050
diff
changeset
|
4093 int end = (i+1)/2; |
5601e440e5e7
8130150: Implement BigInteger.montgomeryMultiply intrinsic
vkempik
parents:
23050
diff
changeset
|
4094 for (j = 0; j < end; j++) { |
5601e440e5e7
8130150: Implement BigInteger.montgomeryMultiply intrinsic
vkempik
parents:
23050
diff
changeset
|
4095 MACC2(a[j], a[i-j], t0, t1, t2); |
5601e440e5e7
8130150: Implement BigInteger.montgomeryMultiply intrinsic
vkempik
parents:
23050
diff
changeset
|
4096 MACC(m[j], n[i-j], t0, t1, t2); |
5601e440e5e7
8130150: Implement BigInteger.montgomeryMultiply intrinsic
vkempik
parents:
23050
diff
changeset
|
4097 } |
5601e440e5e7
8130150: Implement BigInteger.montgomeryMultiply intrinsic
vkempik
parents:
23050
diff
changeset
|
4098 if ((i & 1) == 0) { |
5601e440e5e7
8130150: Implement BigInteger.montgomeryMultiply intrinsic
vkempik
parents:
23050
diff
changeset
|
4099 MACC(a[j], a[j], t0, t1, t2); |
5601e440e5e7
8130150: Implement BigInteger.montgomeryMultiply intrinsic
vkempik
parents:
23050
diff
changeset
|
4100 } |
5601e440e5e7
8130150: Implement BigInteger.montgomeryMultiply intrinsic
vkempik
parents:
23050
diff
changeset
|
4101 for (; j < i; j++) { |
5601e440e5e7
8130150: Implement BigInteger.montgomeryMultiply intrinsic
vkempik
parents:
23050
diff
changeset
|
4102 MACC(m[j], n[i-j], t0, t1, t2); |
5601e440e5e7
8130150: Implement BigInteger.montgomeryMultiply intrinsic
vkempik
parents:
23050
diff
changeset
|
4103 } |
5601e440e5e7
8130150: Implement BigInteger.montgomeryMultiply intrinsic
vkempik
parents:
23050
diff
changeset
|
4104 m[i] = t0 * inv; |
5601e440e5e7
8130150: Implement BigInteger.montgomeryMultiply intrinsic
vkempik
parents:
23050
diff
changeset
|
4105 MACC(m[i], n[0], t0, t1, t2); |
5601e440e5e7
8130150: Implement BigInteger.montgomeryMultiply intrinsic
vkempik
parents:
23050
diff
changeset
|
4106 |
5601e440e5e7
8130150: Implement BigInteger.montgomeryMultiply intrinsic
vkempik
parents:
23050
diff
changeset
|
4107 assert(t0 == 0, "broken Montgomery square"); |
5601e440e5e7
8130150: Implement BigInteger.montgomeryMultiply intrinsic
vkempik
parents:
23050
diff
changeset
|
4108 |
5601e440e5e7
8130150: Implement BigInteger.montgomeryMultiply intrinsic
vkempik
parents:
23050
diff
changeset
|
4109 t0 = t1; t1 = t2; t2 = 0; |
5601e440e5e7
8130150: Implement BigInteger.montgomeryMultiply intrinsic
vkempik
parents:
23050
diff
changeset
|
4110 } |
5601e440e5e7
8130150: Implement BigInteger.montgomeryMultiply intrinsic
vkempik
parents:
23050
diff
changeset
|
4111 |
5601e440e5e7
8130150: Implement BigInteger.montgomeryMultiply intrinsic
vkempik
parents:
23050
diff
changeset
|
4112 for (i = len; i < 2*len; i++) { |
5601e440e5e7
8130150: Implement BigInteger.montgomeryMultiply intrinsic
vkempik
parents:
23050
diff
changeset
|
4113 int start = i-len+1; |
5601e440e5e7
8130150: Implement BigInteger.montgomeryMultiply intrinsic
vkempik
parents:
23050
diff
changeset
|
4114 int end = start + (len - start)/2; |
5601e440e5e7
8130150: Implement BigInteger.montgomeryMultiply intrinsic
vkempik
parents:
23050
diff
changeset
|
4115 int j; |
5601e440e5e7
8130150: Implement BigInteger.montgomeryMultiply intrinsic
vkempik
parents:
23050
diff
changeset
|
4116 for (j = start; j < end; j++) { |
5601e440e5e7
8130150: Implement BigInteger.montgomeryMultiply intrinsic
vkempik
parents:
23050
diff
changeset
|
4117 MACC2(a[j], a[i-j], t0, t1, t2); |
5601e440e5e7
8130150: Implement BigInteger.montgomeryMultiply intrinsic
vkempik
parents:
23050
diff
changeset
|
4118 MACC(m[j], n[i-j], t0, t1, t2); |
5601e440e5e7
8130150: Implement BigInteger.montgomeryMultiply intrinsic
vkempik
parents:
23050
diff
changeset
|
4119 } |
5601e440e5e7
8130150: Implement BigInteger.montgomeryMultiply intrinsic
vkempik
parents:
23050
diff
changeset
|
4120 if ((i & 1) == 0) { |
5601e440e5e7
8130150: Implement BigInteger.montgomeryMultiply intrinsic
vkempik
parents:
23050
diff
changeset
|
4121 MACC(a[j], a[j], t0, t1, t2); |
5601e440e5e7
8130150: Implement BigInteger.montgomeryMultiply intrinsic
vkempik
parents:
23050
diff
changeset
|
4122 } |
5601e440e5e7
8130150: Implement BigInteger.montgomeryMultiply intrinsic
vkempik
parents:
23050
diff
changeset
|
4123 for (; j < len; j++) { |
5601e440e5e7
8130150: Implement BigInteger.montgomeryMultiply intrinsic
vkempik
parents:
23050
diff
changeset
|
4124 MACC(m[j], n[i-j], t0, t1, t2); |
5601e440e5e7
8130150: Implement BigInteger.montgomeryMultiply intrinsic
vkempik
parents:
23050
diff
changeset
|
4125 } |
5601e440e5e7
8130150: Implement BigInteger.montgomeryMultiply intrinsic
vkempik
parents:
23050
diff
changeset
|
4126 m[i-len] = t0; |
5601e440e5e7
8130150: Implement BigInteger.montgomeryMultiply intrinsic
vkempik
parents:
23050
diff
changeset
|
4127 t0 = t1; t1 = t2; t2 = 0; |
5601e440e5e7
8130150: Implement BigInteger.montgomeryMultiply intrinsic
vkempik
parents:
23050
diff
changeset
|
4128 } |
5601e440e5e7
8130150: Implement BigInteger.montgomeryMultiply intrinsic
vkempik
parents:
23050
diff
changeset
|
4129 |
5601e440e5e7
8130150: Implement BigInteger.montgomeryMultiply intrinsic
vkempik
parents:
23050
diff
changeset
|
4130 while (t0) |
5601e440e5e7
8130150: Implement BigInteger.montgomeryMultiply intrinsic
vkempik
parents:
23050
diff
changeset
|
4131 t0 = sub(m, n, t0, len); |
5601e440e5e7
8130150: Implement BigInteger.montgomeryMultiply intrinsic
vkempik
parents:
23050
diff
changeset
|
4132 } |
5601e440e5e7
8130150: Implement BigInteger.montgomeryMultiply intrinsic
vkempik
parents:
23050
diff
changeset
|
4133 |
5601e440e5e7
8130150: Implement BigInteger.montgomeryMultiply intrinsic
vkempik
parents:
23050
diff
changeset
|
4134 // Swap words in a longword. |
5601e440e5e7
8130150: Implement BigInteger.montgomeryMultiply intrinsic
vkempik
parents:
23050
diff
changeset
|
4135 static unsigned long swap(unsigned long x) { |
5601e440e5e7
8130150: Implement BigInteger.montgomeryMultiply intrinsic
vkempik
parents:
23050
diff
changeset
|
4136 return (x << 32) | (x >> 32); |
5601e440e5e7
8130150: Implement BigInteger.montgomeryMultiply intrinsic
vkempik
parents:
23050
diff
changeset
|
4137 } |
5601e440e5e7
8130150: Implement BigInteger.montgomeryMultiply intrinsic
vkempik
parents:
23050
diff
changeset
|
4138 |
5601e440e5e7
8130150: Implement BigInteger.montgomeryMultiply intrinsic
vkempik
parents:
23050
diff
changeset
|
4139 // Copy len longwords from s to d, word-swapping as we go. The |
5601e440e5e7
8130150: Implement BigInteger.montgomeryMultiply intrinsic
vkempik
parents:
23050
diff
changeset
|
4140 // destination array is reversed. |
5601e440e5e7
8130150: Implement BigInteger.montgomeryMultiply intrinsic
vkempik
parents:
23050
diff
changeset
|
4141 static void reverse_words(unsigned long *s, unsigned long *d, int len) { |
5601e440e5e7
8130150: Implement BigInteger.montgomeryMultiply intrinsic
vkempik
parents:
23050
diff
changeset
|
4142 d += len; |
5601e440e5e7
8130150: Implement BigInteger.montgomeryMultiply intrinsic
vkempik
parents:
23050
diff
changeset
|
4143 while(len-- > 0) { |
5601e440e5e7
8130150: Implement BigInteger.montgomeryMultiply intrinsic
vkempik
parents:
23050
diff
changeset
|
4144 d--; |
5601e440e5e7
8130150: Implement BigInteger.montgomeryMultiply intrinsic
vkempik
parents:
23050
diff
changeset
|
4145 *d = swap(*s); |
5601e440e5e7
8130150: Implement BigInteger.montgomeryMultiply intrinsic
vkempik
parents:
23050
diff
changeset
|
4146 s++; |
5601e440e5e7
8130150: Implement BigInteger.montgomeryMultiply intrinsic
vkempik
parents:
23050
diff
changeset
|
4147 } |
5601e440e5e7
8130150: Implement BigInteger.montgomeryMultiply intrinsic
vkempik
parents:
23050
diff
changeset
|
4148 } |
5601e440e5e7
8130150: Implement BigInteger.montgomeryMultiply intrinsic
vkempik
parents:
23050
diff
changeset
|
4149 |
5601e440e5e7
8130150: Implement BigInteger.montgomeryMultiply intrinsic
vkempik
parents:
23050
diff
changeset
|
4150 // The threshold at which squaring is advantageous was determined |
5601e440e5e7
8130150: Implement BigInteger.montgomeryMultiply intrinsic
vkempik
parents:
23050
diff
changeset
|
4151 // experimentally on an i7-3930K (Ivy Bridge) CPU @ 3.5GHz. |
5601e440e5e7
8130150: Implement BigInteger.montgomeryMultiply intrinsic
vkempik
parents:
23050
diff
changeset
|
4152 #define MONTGOMERY_SQUARING_THRESHOLD 64 |
5601e440e5e7
8130150: Implement BigInteger.montgomeryMultiply intrinsic
vkempik
parents:
23050
diff
changeset
|
4153 |
5601e440e5e7
8130150: Implement BigInteger.montgomeryMultiply intrinsic
vkempik
parents:
23050
diff
changeset
|
4154 void SharedRuntime::montgomery_multiply(jint *a_ints, jint *b_ints, jint *n_ints, |
5601e440e5e7
8130150: Implement BigInteger.montgomeryMultiply intrinsic
vkempik
parents:
23050
diff
changeset
|
4155 jint len, jlong inv, |
5601e440e5e7
8130150: Implement BigInteger.montgomeryMultiply intrinsic
vkempik
parents:
23050
diff
changeset
|
4156 jint *m_ints) { |
5601e440e5e7
8130150: Implement BigInteger.montgomeryMultiply intrinsic
vkempik
parents:
23050
diff
changeset
|
4157 assert(len % 2 == 0, "array length in montgomery_multiply must be even"); |
5601e440e5e7
8130150: Implement BigInteger.montgomeryMultiply intrinsic
vkempik
parents:
23050
diff
changeset
|
4158 int longwords = len/2; |
5601e440e5e7
8130150: Implement BigInteger.montgomeryMultiply intrinsic
vkempik
parents:
23050
diff
changeset
|
4159 |
5601e440e5e7
8130150: Implement BigInteger.montgomeryMultiply intrinsic
vkempik
parents:
23050
diff
changeset
|
4160 // Make very sure we don't use so much space that the stack might |
5601e440e5e7
8130150: Implement BigInteger.montgomeryMultiply intrinsic
vkempik
parents:
23050
diff
changeset
|
4161 // overflow. 512 jints corresponds to an 16384-bit integer and |
5601e440e5e7
8130150: Implement BigInteger.montgomeryMultiply intrinsic
vkempik
parents:
23050
diff
changeset
|
4162 // will use here a total of 8k bytes of stack space. |
5601e440e5e7
8130150: Implement BigInteger.montgomeryMultiply intrinsic
vkempik
parents:
23050
diff
changeset
|
4163 int total_allocation = longwords * sizeof (unsigned long) * 4; |
5601e440e5e7
8130150: Implement BigInteger.montgomeryMultiply intrinsic
vkempik
parents:
23050
diff
changeset
|
4164 guarantee(total_allocation <= 8192, "must be"); |
5601e440e5e7
8130150: Implement BigInteger.montgomeryMultiply intrinsic
vkempik
parents:
23050
diff
changeset
|
4165 unsigned long *scratch = (unsigned long *)alloca(total_allocation); |
5601e440e5e7
8130150: Implement BigInteger.montgomeryMultiply intrinsic
vkempik
parents:
23050
diff
changeset
|
4166 |
5601e440e5e7
8130150: Implement BigInteger.montgomeryMultiply intrinsic
vkempik
parents:
23050
diff
changeset
|
4167 // Local scratch arrays |
5601e440e5e7
8130150: Implement BigInteger.montgomeryMultiply intrinsic
vkempik
parents:
23050
diff
changeset
|
4168 unsigned long |
5601e440e5e7
8130150: Implement BigInteger.montgomeryMultiply intrinsic
vkempik
parents:
23050
diff
changeset
|
4169 *a = scratch + 0 * longwords, |
5601e440e5e7
8130150: Implement BigInteger.montgomeryMultiply intrinsic
vkempik
parents:
23050
diff
changeset
|
4170 *b = scratch + 1 * longwords, |
5601e440e5e7
8130150: Implement BigInteger.montgomeryMultiply intrinsic
vkempik
parents:
23050
diff
changeset
|
4171 *n = scratch + 2 * longwords, |
5601e440e5e7
8130150: Implement BigInteger.montgomeryMultiply intrinsic
vkempik
parents:
23050
diff
changeset
|
4172 *m = scratch + 3 * longwords; |
5601e440e5e7
8130150: Implement BigInteger.montgomeryMultiply intrinsic
vkempik
parents:
23050
diff
changeset
|
4173 |
5601e440e5e7
8130150: Implement BigInteger.montgomeryMultiply intrinsic
vkempik
parents:
23050
diff
changeset
|
4174 reverse_words((unsigned long *)a_ints, a, longwords); |
5601e440e5e7
8130150: Implement BigInteger.montgomeryMultiply intrinsic
vkempik
parents:
23050
diff
changeset
|
4175 reverse_words((unsigned long *)b_ints, b, longwords); |
5601e440e5e7
8130150: Implement BigInteger.montgomeryMultiply intrinsic
vkempik
parents:
23050
diff
changeset
|
4176 reverse_words((unsigned long *)n_ints, n, longwords); |
5601e440e5e7
8130150: Implement BigInteger.montgomeryMultiply intrinsic
vkempik
parents:
23050
diff
changeset
|
4177 |
5601e440e5e7
8130150: Implement BigInteger.montgomeryMultiply intrinsic
vkempik
parents:
23050
diff
changeset
|
4178 ::montgomery_multiply(a, b, n, m, (unsigned long)inv, longwords); |
5601e440e5e7
8130150: Implement BigInteger.montgomeryMultiply intrinsic
vkempik
parents:
23050
diff
changeset
|
4179 |
5601e440e5e7
8130150: Implement BigInteger.montgomeryMultiply intrinsic
vkempik
parents:
23050
diff
changeset
|
4180 reverse_words(m, (unsigned long *)m_ints, longwords); |
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4181 } |
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4182 |
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4183 void SharedRuntime::montgomery_square(jint *a_ints, jint *n_ints, |
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4184 jint len, jlong inv, |
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4185 jint *m_ints) { |
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4186 assert(len % 2 == 0, "array length in montgomery_square must be even"); |
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4187 int longwords = len/2; |
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4188 |
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4189 // Make very sure we don't use so much space that the stack might |
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4190 // overflow. 512 jints corresponds to an 16384-bit integer and |
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4191 // will use here a total of 6k bytes of stack space. |
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4192 int total_allocation = longwords * sizeof (unsigned long) * 3; |
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4193 guarantee(total_allocation <= 8192, "must be"); |
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4194 unsigned long *scratch = (unsigned long *)alloca(total_allocation); |
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4195 |
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4196 // Local scratch arrays |
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4197 unsigned long |
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4198 *a = scratch + 0 * longwords, |
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4199 *n = scratch + 1 * longwords, |
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4200 *m = scratch + 2 * longwords; |
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4201 |
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4202 reverse_words((unsigned long *)a_ints, a, longwords); |
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4203 reverse_words((unsigned long *)n_ints, n, longwords); |
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4204 |
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4205 //montgomery_square fails to pass BigIntegerTest on solaris amd64 |
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4206 //on jdk7 and jdk8. |
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4207 #ifndef SOLARIS |
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4208 if (len >= MONTGOMERY_SQUARING_THRESHOLD) { |
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4209 #else |
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4210 if (0) { |
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4211 #endif |
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4212 ::montgomery_square(a, n, m, (unsigned long)inv, longwords); |
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4213 } else { |
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4214 ::montgomery_multiply(a, a, n, m, (unsigned long)inv, longwords); |
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4215 } |
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4216 |
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4217 reverse_words(m, (unsigned long *)m_ints, longwords); |
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4218 } |
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4219 |
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4220 #endif // WINDOWS |
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4221 |
0 | 4222 #ifdef COMPILER2 |
4223 // This is here instead of runtime_x86_64.cpp because it uses SimpleRuntimeFrame | |
4224 // | |
4225 //------------------------------generate_exception_blob--------------------------- | |
4226 // creates exception blob at the end | |
4227 // Using exception blob, this code is jumped from a compiled method. | |
4228 // (see emit_exception_handler in x86_64.ad file) | |
4229 // | |
4230 // Given an exception pc at a call we call into the runtime for the | |
4231 // handler in this method. This handler might merely restore state | |
4232 // (i.e. callee save registers) unwind the frame and jump to the | |
4233 // exception handler for the nmethod if there is no Java level handler | |
4234 // for the nmethod. | |
4235 // | |
4236 // This code is entered with a jmp. | |
4237 // | |
4238 // Arguments: | |
4239 // rax: exception oop | |
4240 // rdx: exception pc | |
4241 // | |
4242 // Results: | |
4243 // rax: exception oop | |
4244 // rdx: exception pc in caller or ??? | |
4245 // destination: exception handler of caller | |
4246 // | |
4247 // Note: the exception pc MUST be at a call (precise debug information) | |
4248 // Registers rax, rdx, rcx, rsi, rdi, r8-r11 are not callee saved. | |
4249 // | |
4250 | |
4251 void OptoRuntime::generate_exception_blob() { | |
4252 assert(!OptoRuntime::is_callee_saved_register(RDX_num), ""); | |
4253 assert(!OptoRuntime::is_callee_saved_register(RAX_num), ""); | |
4254 assert(!OptoRuntime::is_callee_saved_register(RCX_num), ""); | |
4255 | |
4256 assert(SimpleRuntimeFrame::framesize % 4 == 0, "sp not 16-byte aligned"); | |
4257 | |
4258 // Allocate space for the code | |
4259 ResourceMark rm; | |
4260 // Setup code generation tools | |
4261 CodeBuffer buffer("exception_blob", 2048, 1024); | |
4262 MacroAssembler* masm = new MacroAssembler(&buffer); | |
4263 | |
4264 | |
4265 address start = __ pc(); | |
4266 | |
4267 // Exception pc is 'return address' for stack walker | |
304 | 4268 __ push(rdx); |
4269 __ subptr(rsp, SimpleRuntimeFrame::return_off << LogBytesPerInt); // Prolog | |
0 | 4270 |
4271 // Save callee-saved registers. See x86_64.ad. | |
4272 | |
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4273 // rbp is an implicitly saved callee saved register (i.e., the calling |
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4274 // convention will save/restore it in the prolog/epilog). Other than that |
0 | 4275 // there are no callee save registers now that adapter frames are gone. |
4276 | |
304 | 4277 __ movptr(Address(rsp, SimpleRuntimeFrame::rbp_off << LogBytesPerInt), rbp); |
0 | 4278 |
4279 // Store exception in Thread object. We cannot pass any arguments to the | |
4280 // handle_exception call, since we do not want to make any assumption | |
4281 // about the size of the frame where the exception happened in. | |
4282 // c_rarg0 is either rdi (Linux) or rcx (Windows). | |
304 | 4283 __ movptr(Address(r15_thread, JavaThread::exception_oop_offset()),rax); |
4284 __ movptr(Address(r15_thread, JavaThread::exception_pc_offset()), rdx); | |
0 | 4285 |
4286 // This call does all the hard work. It checks if an exception handler | |
4287 // exists in the method. | |
4288 // If so, it returns the handler address. | |
4289 // If not, it prepares for stack-unwinding, restoring the callee-save | |
4290 // registers of the frame being removed. | |
4291 // | |
4292 // address OptoRuntime::handle_exception_C(JavaThread* thread) | |
4293 | |
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4294 // At a method handle call, the stack may not be properly aligned |
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4295 // when returning with an exception. |
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4296 address the_pc = __ pc(); |
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4297 __ set_last_Java_frame(noreg, noreg, the_pc); |
304 | 4298 __ mov(c_rarg0, r15_thread); |
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4299 __ andptr(rsp, -(StackAlignmentInBytes)); // Align stack |
0 | 4300 __ call(RuntimeAddress(CAST_FROM_FN_PTR(address, OptoRuntime::handle_exception_C))); |
4301 | |
4302 // Set an oopmap for the call site. This oopmap will only be used if we | |
4303 // are unwinding the stack. Hence, all locations will be dead. | |
4304 // Callee-saved registers will be the same as the frame above (i.e., | |
4305 // handle_exception_stub), since they were restored when we got the | |
4306 // exception. | |
4307 | |
4308 OopMapSet* oop_maps = new OopMapSet(); | |
4309 | |
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4310 oop_maps->add_gc_map(the_pc - start, new OopMap(SimpleRuntimeFrame::framesize, 0)); |
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4311 |
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4312 __ reset_last_Java_frame(false, true); |
0 | 4313 |
4314 // Restore callee-saved registers | |
4315 | |
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4316 // rbp is an implicitly saved callee-saved register (i.e., the calling |
0 | 4317 // convention will save restore it in prolog/epilog) Other than that |
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4318 // there are no callee save registers now that adapter frames are gone. |
0 | 4319 |
304 | 4320 __ movptr(rbp, Address(rsp, SimpleRuntimeFrame::rbp_off << LogBytesPerInt)); |
4321 | |
4322 __ addptr(rsp, SimpleRuntimeFrame::return_off << LogBytesPerInt); // Epilog | |
4323 __ pop(rdx); // No need for exception pc anymore | |
0 | 4324 |
4325 // rax: exception handler | |
4326 | |
4327 // We have a handler in rax (could be deopt blob). | |
304 | 4328 __ mov(r8, rax); |
0 | 4329 |
4330 // Get the exception oop | |
304 | 4331 __ movptr(rax, Address(r15_thread, JavaThread::exception_oop_offset())); |
0 | 4332 // Get the exception pc in case we are deoptimized |
304 | 4333 __ movptr(rdx, Address(r15_thread, JavaThread::exception_pc_offset())); |
0 | 4334 #ifdef ASSERT |
4335 __ movptr(Address(r15_thread, JavaThread::exception_handler_pc_offset()), (int)NULL_WORD); | |
4336 __ movptr(Address(r15_thread, JavaThread::exception_pc_offset()), (int)NULL_WORD); | |
4337 #endif | |
4338 // Clear the exception oop so GC no longer processes it as a root. | |
4339 __ movptr(Address(r15_thread, JavaThread::exception_oop_offset()), (int)NULL_WORD); | |
4340 | |
4341 // rax: exception oop | |
4342 // r8: exception handler | |
4343 // rdx: exception pc | |
4344 // Jump to handler | |
4345 | |
4346 __ jmp(r8); | |
4347 | |
4348 // Make sure all code is generated | |
4349 masm->flush(); | |
4350 | |
4351 // Set exception blob | |
4352 _exception_blob = ExceptionBlob::create(&buffer, oop_maps, SimpleRuntimeFrame::framesize >> 1); | |
4353 } | |
4354 #endif // COMPILER2 |