Mercurial > hg > graal-jvmci-8
annotate src/cpu/x86/vm/sharedRuntime_x86_32.cpp @ 22639:5d6bb2cb3b9d
Add new flags to jdk.internal.jvmci.amd64.AMD64.CPUFeature
| author | twisti |
|---|---|
| date | Wed, 30 Sep 2015 11:29:19 +0200 |
| parents | c2c971a9776f |
| children | ba7846fcb814 |
| rev | line source |
|---|---|
| 0 | 1 /* |
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2 * Copyright (c) 2003, 2013, Oracle and/or its affiliates. All rights reserved. |
| 0 | 3 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. |
| 4 * | |
| 5 * This code is free software; you can redistribute it and/or modify it | |
| 6 * under the terms of the GNU General Public License version 2 only, as | |
| 7 * published by the Free Software Foundation. | |
| 8 * | |
| 9 * This code is distributed in the hope that it will be useful, but WITHOUT | |
| 10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or | |
| 11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License | |
| 12 * version 2 for more details (a copy is included in the LICENSE file that | |
| 13 * accompanied this code). | |
| 14 * | |
| 15 * You should have received a copy of the GNU General Public License version | |
| 16 * 2 along with this work; if not, write to the Free Software Foundation, | |
| 17 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA. | |
| 18 * | |
|
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19 * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA |
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20 * or visit www.oracle.com if you need additional information or have any |
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21 * questions. |
| 0 | 22 * |
| 23 */ | |
| 24 | |
| 1972 | 25 #include "precompiled.hpp" |
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26 #include "asm/macroAssembler.hpp" |
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27 #include "asm/macroAssembler.inline.hpp" |
| 1972 | 28 #include "code/debugInfoRec.hpp" |
| 29 #include "code/icBuffer.hpp" | |
| 30 #include "code/vtableStubs.hpp" | |
| 31 #include "interpreter/interpreter.hpp" | |
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32 #include "oops/compiledICHolder.hpp" |
| 1972 | 33 #include "prims/jvmtiRedefineClassesTrace.hpp" |
| 34 #include "runtime/sharedRuntime.hpp" | |
| 35 #include "runtime/vframeArray.hpp" | |
| 36 #include "vmreg_x86.inline.hpp" | |
| 37 #ifdef COMPILER1 | |
| 38 #include "c1/c1_Runtime1.hpp" | |
| 39 #endif | |
| 40 #ifdef COMPILER2 | |
| 41 #include "opto/runtime.hpp" | |
| 42 #endif | |
| 0 | 43 |
| 44 #define __ masm-> | |
| 45 | |
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46 const int StackAlignmentInSlots = StackAlignmentInBytes / VMRegImpl::stack_slot_size; |
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47 |
| 0 | 48 class RegisterSaver { |
| 49 // Capture info about frame layout | |
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50 #define DEF_XMM_OFFS(regnum) xmm ## regnum ## _off = xmm_off + (regnum)*16/BytesPerInt, xmm ## regnum ## H_off |
| 0 | 51 enum layout { |
| 52 fpu_state_off = 0, | |
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53 fpu_state_end = fpu_state_off+FPUStateSizeInWords, |
| 0 | 54 st0_off, st0H_off, |
| 55 st1_off, st1H_off, | |
| 56 st2_off, st2H_off, | |
| 57 st3_off, st3H_off, | |
| 58 st4_off, st4H_off, | |
| 59 st5_off, st5H_off, | |
| 60 st6_off, st6H_off, | |
| 61 st7_off, st7H_off, | |
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62 xmm_off, |
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63 DEF_XMM_OFFS(0), |
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64 DEF_XMM_OFFS(1), |
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65 DEF_XMM_OFFS(2), |
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66 DEF_XMM_OFFS(3), |
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67 DEF_XMM_OFFS(4), |
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68 DEF_XMM_OFFS(5), |
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69 DEF_XMM_OFFS(6), |
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70 DEF_XMM_OFFS(7), |
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71 flags_off = xmm7_off + 16/BytesPerInt + 1, // 16-byte stack alignment fill word |
| 0 | 72 rdi_off, |
| 73 rsi_off, | |
| 74 ignore_off, // extra copy of rbp, | |
| 75 rsp_off, | |
| 76 rbx_off, | |
| 77 rdx_off, | |
| 78 rcx_off, | |
| 79 rax_off, | |
| 80 // The frame sender code expects that rbp will be in the "natural" place and | |
| 81 // will override any oopMap setting for it. We must therefore force the layout | |
| 82 // so that it agrees with the frame sender code. | |
| 83 rbp_off, | |
| 84 return_off, // slot for return address | |
| 85 reg_save_size }; | |
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86 enum { FPU_regs_live = flags_off - fpu_state_end }; |
| 0 | 87 |
| 88 public: | |
| 89 | |
| 90 static OopMap* save_live_registers(MacroAssembler* masm, int additional_frame_words, | |
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91 int* total_frame_words, bool verify_fpu = true, bool save_vectors = false); |
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92 static void restore_live_registers(MacroAssembler* masm, bool restore_vectors = false); |
| 0 | 93 |
| 94 static int rax_offset() { return rax_off; } | |
| 95 static int rbx_offset() { return rbx_off; } | |
| 96 | |
| 97 // Offsets into the register save area | |
| 98 // Used by deoptimization when it is managing result register | |
| 99 // values on its own | |
| 100 | |
| 101 static int raxOffset(void) { return rax_off; } | |
| 102 static int rdxOffset(void) { return rdx_off; } | |
| 103 static int rbxOffset(void) { return rbx_off; } | |
| 104 static int xmm0Offset(void) { return xmm0_off; } | |
| 105 // This really returns a slot in the fp save area, which one is not important | |
| 106 static int fpResultOffset(void) { return st0_off; } | |
| 107 | |
| 108 // During deoptimization only the result register need to be restored | |
| 109 // all the other values have already been extracted. | |
| 110 | |
| 111 static void restore_result_registers(MacroAssembler* masm); | |
| 112 | |
| 113 }; | |
| 114 | |
| 115 OopMap* RegisterSaver::save_live_registers(MacroAssembler* masm, int additional_frame_words, | |
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116 int* total_frame_words, bool verify_fpu, bool save_vectors) { |
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117 int vect_words = 0; |
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118 #ifdef COMPILER2 |
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119 if (save_vectors) { |
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120 assert(UseAVX > 0, "256bit vectors are supported only with AVX"); |
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121 assert(MaxVectorSize == 32, "only 256bit vectors are supported now"); |
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122 // Save upper half of YMM registes |
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123 vect_words = 8 * 16 / wordSize; |
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124 additional_frame_words += vect_words; |
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125 } |
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126 #else |
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127 assert(!save_vectors, "vectors are generated only by C2"); |
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128 #endif |
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129 int frame_size_in_bytes = (reg_save_size + additional_frame_words) * wordSize; |
| 0 | 130 int frame_words = frame_size_in_bytes / wordSize; |
| 131 *total_frame_words = frame_words; | |
| 132 | |
| 133 assert(FPUStateSizeInWords == 27, "update stack layout"); | |
| 134 | |
| 135 // save registers, fpu state, and flags | |
| 136 // We assume caller has already has return address slot on the stack | |
| 137 // We push epb twice in this sequence because we want the real rbp, | |
| 304 | 138 // to be under the return like a normal enter and we want to use pusha |
| 0 | 139 // We push by hand instead of pusing push |
| 140 __ enter(); | |
| 304 | 141 __ pusha(); |
| 142 __ pushf(); | |
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143 __ subptr(rsp,FPU_regs_live*wordSize); // Push FPU registers space |
| 0 | 144 __ push_FPU_state(); // Save FPU state & init |
| 145 | |
| 146 if (verify_fpu) { | |
| 147 // Some stubs may have non standard FPU control word settings so | |
| 148 // only check and reset the value when it required to be the | |
| 149 // standard value. The safepoint blob in particular can be used | |
| 150 // in methods which are using the 24 bit control word for | |
| 151 // optimized float math. | |
| 152 | |
| 153 #ifdef ASSERT | |
| 154 // Make sure the control word has the expected value | |
| 155 Label ok; | |
| 156 __ cmpw(Address(rsp, 0), StubRoutines::fpu_cntrl_wrd_std()); | |
| 157 __ jccb(Assembler::equal, ok); | |
| 158 __ stop("corrupted control word detected"); | |
| 159 __ bind(ok); | |
| 160 #endif | |
| 161 | |
| 162 // Reset the control word to guard against exceptions being unmasked | |
| 163 // since fstp_d can cause FPU stack underflow exceptions. Write it | |
| 164 // into the on stack copy and then reload that to make sure that the | |
| 165 // current and future values are correct. | |
| 166 __ movw(Address(rsp, 0), StubRoutines::fpu_cntrl_wrd_std()); | |
| 167 } | |
| 168 | |
| 169 __ frstor(Address(rsp, 0)); | |
| 170 if (!verify_fpu) { | |
| 171 // Set the control word so that exceptions are masked for the | |
| 172 // following code. | |
| 173 __ fldcw(ExternalAddress(StubRoutines::addr_fpu_cntrl_wrd_std())); | |
| 174 } | |
| 175 | |
| 176 // Save the FPU registers in de-opt-able form | |
| 177 | |
| 178 __ fstp_d(Address(rsp, st0_off*wordSize)); // st(0) | |
| 179 __ fstp_d(Address(rsp, st1_off*wordSize)); // st(1) | |
| 180 __ fstp_d(Address(rsp, st2_off*wordSize)); // st(2) | |
| 181 __ fstp_d(Address(rsp, st3_off*wordSize)); // st(3) | |
| 182 __ fstp_d(Address(rsp, st4_off*wordSize)); // st(4) | |
| 183 __ fstp_d(Address(rsp, st5_off*wordSize)); // st(5) | |
| 184 __ fstp_d(Address(rsp, st6_off*wordSize)); // st(6) | |
| 185 __ fstp_d(Address(rsp, st7_off*wordSize)); // st(7) | |
| 186 | |
| 187 if( UseSSE == 1 ) { // Save the XMM state | |
| 188 __ movflt(Address(rsp,xmm0_off*wordSize),xmm0); | |
| 189 __ movflt(Address(rsp,xmm1_off*wordSize),xmm1); | |
| 190 __ movflt(Address(rsp,xmm2_off*wordSize),xmm2); | |
| 191 __ movflt(Address(rsp,xmm3_off*wordSize),xmm3); | |
| 192 __ movflt(Address(rsp,xmm4_off*wordSize),xmm4); | |
| 193 __ movflt(Address(rsp,xmm5_off*wordSize),xmm5); | |
| 194 __ movflt(Address(rsp,xmm6_off*wordSize),xmm6); | |
| 195 __ movflt(Address(rsp,xmm7_off*wordSize),xmm7); | |
| 196 } else if( UseSSE >= 2 ) { | |
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197 // Save whole 128bit (16 bytes) XMM regiters |
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198 __ movdqu(Address(rsp,xmm0_off*wordSize),xmm0); |
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199 __ movdqu(Address(rsp,xmm1_off*wordSize),xmm1); |
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200 __ movdqu(Address(rsp,xmm2_off*wordSize),xmm2); |
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201 __ movdqu(Address(rsp,xmm3_off*wordSize),xmm3); |
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202 __ movdqu(Address(rsp,xmm4_off*wordSize),xmm4); |
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203 __ movdqu(Address(rsp,xmm5_off*wordSize),xmm5); |
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204 __ movdqu(Address(rsp,xmm6_off*wordSize),xmm6); |
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205 __ movdqu(Address(rsp,xmm7_off*wordSize),xmm7); |
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206 } |
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207 |
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208 if (vect_words > 0) { |
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209 assert(vect_words*wordSize == 128, ""); |
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210 __ subptr(rsp, 128); // Save upper half of YMM registes |
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211 __ vextractf128h(Address(rsp, 0),xmm0); |
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212 __ vextractf128h(Address(rsp, 16),xmm1); |
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213 __ vextractf128h(Address(rsp, 32),xmm2); |
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214 __ vextractf128h(Address(rsp, 48),xmm3); |
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215 __ vextractf128h(Address(rsp, 64),xmm4); |
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216 __ vextractf128h(Address(rsp, 80),xmm5); |
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217 __ vextractf128h(Address(rsp, 96),xmm6); |
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218 __ vextractf128h(Address(rsp,112),xmm7); |
| 0 | 219 } |
| 220 | |
| 221 // Set an oopmap for the call site. This oopmap will map all | |
| 222 // oop-registers and debug-info registers as callee-saved. This | |
| 223 // will allow deoptimization at this safepoint to find all possible | |
| 224 // debug-info recordings, as well as let GC find all oops. | |
| 225 | |
| 226 OopMapSet *oop_maps = new OopMapSet(); | |
| 227 OopMap* map = new OopMap( frame_words, 0 ); | |
| 228 | |
| 229 #define STACK_OFFSET(x) VMRegImpl::stack2reg((x) + additional_frame_words) | |
| 230 | |
| 231 map->set_callee_saved(STACK_OFFSET( rax_off), rax->as_VMReg()); | |
| 232 map->set_callee_saved(STACK_OFFSET( rcx_off), rcx->as_VMReg()); | |
| 233 map->set_callee_saved(STACK_OFFSET( rdx_off), rdx->as_VMReg()); | |
| 234 map->set_callee_saved(STACK_OFFSET( rbx_off), rbx->as_VMReg()); | |
| 235 // rbp, location is known implicitly, no oopMap | |
| 236 map->set_callee_saved(STACK_OFFSET( rsi_off), rsi->as_VMReg()); | |
| 237 map->set_callee_saved(STACK_OFFSET( rdi_off), rdi->as_VMReg()); | |
| 238 map->set_callee_saved(STACK_OFFSET(st0_off), as_FloatRegister(0)->as_VMReg()); | |
| 239 map->set_callee_saved(STACK_OFFSET(st1_off), as_FloatRegister(1)->as_VMReg()); | |
| 240 map->set_callee_saved(STACK_OFFSET(st2_off), as_FloatRegister(2)->as_VMReg()); | |
| 241 map->set_callee_saved(STACK_OFFSET(st3_off), as_FloatRegister(3)->as_VMReg()); | |
| 242 map->set_callee_saved(STACK_OFFSET(st4_off), as_FloatRegister(4)->as_VMReg()); | |
| 243 map->set_callee_saved(STACK_OFFSET(st5_off), as_FloatRegister(5)->as_VMReg()); | |
| 244 map->set_callee_saved(STACK_OFFSET(st6_off), as_FloatRegister(6)->as_VMReg()); | |
| 245 map->set_callee_saved(STACK_OFFSET(st7_off), as_FloatRegister(7)->as_VMReg()); | |
| 246 map->set_callee_saved(STACK_OFFSET(xmm0_off), xmm0->as_VMReg()); | |
| 247 map->set_callee_saved(STACK_OFFSET(xmm1_off), xmm1->as_VMReg()); | |
| 248 map->set_callee_saved(STACK_OFFSET(xmm2_off), xmm2->as_VMReg()); | |
| 249 map->set_callee_saved(STACK_OFFSET(xmm3_off), xmm3->as_VMReg()); | |
| 250 map->set_callee_saved(STACK_OFFSET(xmm4_off), xmm4->as_VMReg()); | |
| 251 map->set_callee_saved(STACK_OFFSET(xmm5_off), xmm5->as_VMReg()); | |
| 252 map->set_callee_saved(STACK_OFFSET(xmm6_off), xmm6->as_VMReg()); | |
| 253 map->set_callee_saved(STACK_OFFSET(xmm7_off), xmm7->as_VMReg()); | |
| 254 // %%% This is really a waste but we'll keep things as they were for now | |
| 255 if (true) { | |
| 256 #define NEXTREG(x) (x)->as_VMReg()->next() | |
| 257 map->set_callee_saved(STACK_OFFSET(st0H_off), NEXTREG(as_FloatRegister(0))); | |
| 258 map->set_callee_saved(STACK_OFFSET(st1H_off), NEXTREG(as_FloatRegister(1))); | |
| 259 map->set_callee_saved(STACK_OFFSET(st2H_off), NEXTREG(as_FloatRegister(2))); | |
| 260 map->set_callee_saved(STACK_OFFSET(st3H_off), NEXTREG(as_FloatRegister(3))); | |
| 261 map->set_callee_saved(STACK_OFFSET(st4H_off), NEXTREG(as_FloatRegister(4))); | |
| 262 map->set_callee_saved(STACK_OFFSET(st5H_off), NEXTREG(as_FloatRegister(5))); | |
| 263 map->set_callee_saved(STACK_OFFSET(st6H_off), NEXTREG(as_FloatRegister(6))); | |
| 264 map->set_callee_saved(STACK_OFFSET(st7H_off), NEXTREG(as_FloatRegister(7))); | |
| 265 map->set_callee_saved(STACK_OFFSET(xmm0H_off), NEXTREG(xmm0)); | |
| 266 map->set_callee_saved(STACK_OFFSET(xmm1H_off), NEXTREG(xmm1)); | |
| 267 map->set_callee_saved(STACK_OFFSET(xmm2H_off), NEXTREG(xmm2)); | |
| 268 map->set_callee_saved(STACK_OFFSET(xmm3H_off), NEXTREG(xmm3)); | |
| 269 map->set_callee_saved(STACK_OFFSET(xmm4H_off), NEXTREG(xmm4)); | |
| 270 map->set_callee_saved(STACK_OFFSET(xmm5H_off), NEXTREG(xmm5)); | |
| 271 map->set_callee_saved(STACK_OFFSET(xmm6H_off), NEXTREG(xmm6)); | |
| 272 map->set_callee_saved(STACK_OFFSET(xmm7H_off), NEXTREG(xmm7)); | |
| 273 #undef NEXTREG | |
| 274 #undef STACK_OFFSET | |
| 275 } | |
| 276 | |
| 277 return map; | |
| 278 | |
| 279 } | |
| 280 | |
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281 void RegisterSaver::restore_live_registers(MacroAssembler* masm, bool restore_vectors) { |
| 0 | 282 // Recover XMM & FPU state |
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283 int additional_frame_bytes = 0; |
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284 #ifdef COMPILER2 |
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285 if (restore_vectors) { |
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286 assert(UseAVX > 0, "256bit vectors are supported only with AVX"); |
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287 assert(MaxVectorSize == 32, "only 256bit vectors are supported now"); |
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288 additional_frame_bytes = 128; |
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289 } |
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290 #else |
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291 assert(!restore_vectors, "vectors are generated only by C2"); |
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292 #endif |
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293 if (UseSSE == 1) { |
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294 assert(additional_frame_bytes == 0, ""); |
| 0 | 295 __ movflt(xmm0,Address(rsp,xmm0_off*wordSize)); |
| 296 __ movflt(xmm1,Address(rsp,xmm1_off*wordSize)); | |
| 297 __ movflt(xmm2,Address(rsp,xmm2_off*wordSize)); | |
| 298 __ movflt(xmm3,Address(rsp,xmm3_off*wordSize)); | |
| 299 __ movflt(xmm4,Address(rsp,xmm4_off*wordSize)); | |
| 300 __ movflt(xmm5,Address(rsp,xmm5_off*wordSize)); | |
| 301 __ movflt(xmm6,Address(rsp,xmm6_off*wordSize)); | |
| 302 __ movflt(xmm7,Address(rsp,xmm7_off*wordSize)); | |
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303 } else if (UseSSE >= 2) { |
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304 #define STACK_ADDRESS(x) Address(rsp,(x)*wordSize + additional_frame_bytes) |
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305 __ movdqu(xmm0,STACK_ADDRESS(xmm0_off)); |
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306 __ movdqu(xmm1,STACK_ADDRESS(xmm1_off)); |
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307 __ movdqu(xmm2,STACK_ADDRESS(xmm2_off)); |
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308 __ movdqu(xmm3,STACK_ADDRESS(xmm3_off)); |
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309 __ movdqu(xmm4,STACK_ADDRESS(xmm4_off)); |
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310 __ movdqu(xmm5,STACK_ADDRESS(xmm5_off)); |
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311 __ movdqu(xmm6,STACK_ADDRESS(xmm6_off)); |
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312 __ movdqu(xmm7,STACK_ADDRESS(xmm7_off)); |
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313 #undef STACK_ADDRESS |
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314 } |
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315 if (restore_vectors) { |
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316 // Restore upper half of YMM registes. |
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317 assert(additional_frame_bytes == 128, ""); |
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318 __ vinsertf128h(xmm0, Address(rsp, 0)); |
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319 __ vinsertf128h(xmm1, Address(rsp, 16)); |
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320 __ vinsertf128h(xmm2, Address(rsp, 32)); |
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321 __ vinsertf128h(xmm3, Address(rsp, 48)); |
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322 __ vinsertf128h(xmm4, Address(rsp, 64)); |
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323 __ vinsertf128h(xmm5, Address(rsp, 80)); |
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324 __ vinsertf128h(xmm6, Address(rsp, 96)); |
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325 __ vinsertf128h(xmm7, Address(rsp,112)); |
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326 __ addptr(rsp, additional_frame_bytes); |
| 0 | 327 } |
| 328 __ pop_FPU_state(); | |
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329 __ addptr(rsp, FPU_regs_live*wordSize); // Pop FPU registers |
| 304 | 330 |
| 331 __ popf(); | |
| 332 __ popa(); | |
| 0 | 333 // Get the rbp, described implicitly by the frame sender code (no oopMap) |
| 304 | 334 __ pop(rbp); |
| 0 | 335 |
| 336 } | |
| 337 | |
| 338 void RegisterSaver::restore_result_registers(MacroAssembler* masm) { | |
| 339 | |
| 340 // Just restore result register. Only used by deoptimization. By | |
| 341 // now any callee save register that needs to be restore to a c2 | |
| 342 // caller of the deoptee has been extracted into the vframeArray | |
| 343 // and will be stuffed into the c2i adapter we create for later | |
| 344 // restoration so only result registers need to be restored here. | |
| 345 // | |
| 346 | |
| 347 __ frstor(Address(rsp, 0)); // Restore fpu state | |
| 348 | |
| 349 // Recover XMM & FPU state | |
| 350 if( UseSSE == 1 ) { | |
| 351 __ movflt(xmm0, Address(rsp, xmm0_off*wordSize)); | |
| 352 } else if( UseSSE >= 2 ) { | |
| 353 __ movdbl(xmm0, Address(rsp, xmm0_off*wordSize)); | |
| 354 } | |
| 304 | 355 __ movptr(rax, Address(rsp, rax_off*wordSize)); |
| 356 __ movptr(rdx, Address(rsp, rdx_off*wordSize)); | |
| 0 | 357 // Pop all of the register save are off the stack except the return address |
| 304 | 358 __ addptr(rsp, return_off * wordSize); |
| 0 | 359 } |
| 360 | |
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361 // Is vector's size (in bytes) bigger than a size saved by default? |
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362 // 16 bytes XMM registers are saved by default using SSE2 movdqu instructions. |
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363 // Note, MaxVectorSize == 0 with UseSSE < 2 and vectors are not generated. |
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364 bool SharedRuntime::is_wide_vector(int size) { |
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365 return size > 16; |
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366 } |
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367 |
| 0 | 368 // The java_calling_convention describes stack locations as ideal slots on |
| 369 // a frame with no abi restrictions. Since we must observe abi restrictions | |
| 370 // (like the placement of the register window) the slots must be biased by | |
| 371 // the following value. | |
| 372 static int reg2offset_in(VMReg r) { | |
| 373 // Account for saved rbp, and return address | |
| 374 // This should really be in_preserve_stack_slots | |
| 375 return (r->reg2stack() + 2) * VMRegImpl::stack_slot_size; | |
| 376 } | |
| 377 | |
| 378 static int reg2offset_out(VMReg r) { | |
| 379 return (r->reg2stack() + SharedRuntime::out_preserve_stack_slots()) * VMRegImpl::stack_slot_size; | |
| 380 } | |
| 381 | |
| 382 // --------------------------------------------------------------------------- | |
| 383 // Read the array of BasicTypes from a signature, and compute where the | |
| 384 // arguments should go. Values in the VMRegPair regs array refer to 4-byte | |
| 385 // quantities. Values less than SharedInfo::stack0 are registers, those above | |
| 386 // refer to 4-byte stack slots. All stack slots are based off of the stack pointer | |
| 387 // as framesizes are fixed. | |
| 388 // VMRegImpl::stack0 refers to the first slot 0(sp). | |
| 389 // and VMRegImpl::stack0+1 refers to the memory word 4-byes higher. Register | |
| 390 // up to RegisterImpl::number_of_registers) are the 32-bit | |
| 391 // integer registers. | |
| 392 | |
| 393 // Pass first two oop/int args in registers ECX and EDX. | |
| 394 // Pass first two float/double args in registers XMM0 and XMM1. | |
| 395 // Doubles have precedence, so if you pass a mix of floats and doubles | |
| 396 // the doubles will grab the registers before the floats will. | |
| 397 | |
| 398 // Note: the INPUTS in sig_bt are in units of Java argument words, which are | |
| 399 // either 32-bit or 64-bit depending on the build. The OUTPUTS are in 32-bit | |
| 400 // units regardless of build. Of course for i486 there is no 64 bit build | |
| 401 | |
| 402 | |
| 403 // --------------------------------------------------------------------------- | |
| 404 // The compiled Java calling convention. | |
| 405 // Pass first two oop/int args in registers ECX and EDX. | |
| 406 // Pass first two float/double args in registers XMM0 and XMM1. | |
| 407 // Doubles have precedence, so if you pass a mix of floats and doubles | |
| 408 // the doubles will grab the registers before the floats will. | |
| 409 int SharedRuntime::java_calling_convention(const BasicType *sig_bt, | |
| 410 VMRegPair *regs, | |
| 411 int total_args_passed, | |
| 412 int is_outgoing) { | |
| 413 uint stack = 0; // Starting stack position for args on stack | |
| 414 | |
| 415 | |
| 416 // Pass first two oop/int args in registers ECX and EDX. | |
| 417 uint reg_arg0 = 9999; | |
| 418 uint reg_arg1 = 9999; | |
| 419 | |
| 420 // Pass first two float/double args in registers XMM0 and XMM1. | |
| 421 // Doubles have precedence, so if you pass a mix of floats and doubles | |
| 422 // the doubles will grab the registers before the floats will. | |
| 423 // CNC - TURNED OFF FOR non-SSE. | |
| 424 // On Intel we have to round all doubles (and most floats) at | |
| 425 // call sites by storing to the stack in any case. | |
| 426 // UseSSE=0 ==> Don't Use ==> 9999+0 | |
| 427 // UseSSE=1 ==> Floats only ==> 9999+1 | |
| 428 // UseSSE>=2 ==> Floats or doubles ==> 9999+2 | |
| 429 enum { fltarg_dontuse = 9999+0, fltarg_float_only = 9999+1, fltarg_flt_dbl = 9999+2 }; | |
| 430 uint fargs = (UseSSE>=2) ? 2 : UseSSE; | |
| 431 uint freg_arg0 = 9999+fargs; | |
| 432 uint freg_arg1 = 9999+fargs; | |
| 433 | |
| 434 // Pass doubles & longs aligned on the stack. First count stack slots for doubles | |
| 435 int i; | |
| 436 for( i = 0; i < total_args_passed; i++) { | |
| 437 if( sig_bt[i] == T_DOUBLE ) { | |
| 438 // first 2 doubles go in registers | |
| 439 if( freg_arg0 == fltarg_flt_dbl ) freg_arg0 = i; | |
| 440 else if( freg_arg1 == fltarg_flt_dbl ) freg_arg1 = i; | |
| 441 else // Else double is passed low on the stack to be aligned. | |
| 442 stack += 2; | |
| 443 } else if( sig_bt[i] == T_LONG ) { | |
| 444 stack += 2; | |
| 445 } | |
| 446 } | |
| 447 int dstack = 0; // Separate counter for placing doubles | |
| 448 | |
| 449 // Now pick where all else goes. | |
| 450 for( i = 0; i < total_args_passed; i++) { | |
| 451 // From the type and the argument number (count) compute the location | |
| 452 switch( sig_bt[i] ) { | |
| 453 case T_SHORT: | |
| 454 case T_CHAR: | |
| 455 case T_BYTE: | |
| 456 case T_BOOLEAN: | |
| 457 case T_INT: | |
| 458 case T_ARRAY: | |
| 459 case T_OBJECT: | |
| 460 case T_ADDRESS: | |
| 461 if( reg_arg0 == 9999 ) { | |
| 462 reg_arg0 = i; | |
| 463 regs[i].set1(rcx->as_VMReg()); | |
| 464 } else if( reg_arg1 == 9999 ) { | |
| 465 reg_arg1 = i; | |
| 466 regs[i].set1(rdx->as_VMReg()); | |
| 467 } else { | |
| 468 regs[i].set1(VMRegImpl::stack2reg(stack++)); | |
| 469 } | |
| 470 break; | |
| 471 case T_FLOAT: | |
| 472 if( freg_arg0 == fltarg_flt_dbl || freg_arg0 == fltarg_float_only ) { | |
| 473 freg_arg0 = i; | |
| 474 regs[i].set1(xmm0->as_VMReg()); | |
| 475 } else if( freg_arg1 == fltarg_flt_dbl || freg_arg1 == fltarg_float_only ) { | |
| 476 freg_arg1 = i; | |
| 477 regs[i].set1(xmm1->as_VMReg()); | |
| 478 } else { | |
| 479 regs[i].set1(VMRegImpl::stack2reg(stack++)); | |
| 480 } | |
| 481 break; | |
| 482 case T_LONG: | |
| 483 assert(sig_bt[i+1] == T_VOID, "missing Half" ); | |
| 484 regs[i].set2(VMRegImpl::stack2reg(dstack)); | |
| 485 dstack += 2; | |
| 486 break; | |
| 487 case T_DOUBLE: | |
| 488 assert(sig_bt[i+1] == T_VOID, "missing Half" ); | |
| 489 if( freg_arg0 == (uint)i ) { | |
| 490 regs[i].set2(xmm0->as_VMReg()); | |
| 491 } else if( freg_arg1 == (uint)i ) { | |
| 492 regs[i].set2(xmm1->as_VMReg()); | |
| 493 } else { | |
| 494 regs[i].set2(VMRegImpl::stack2reg(dstack)); | |
| 495 dstack += 2; | |
| 496 } | |
| 497 break; | |
| 498 case T_VOID: regs[i].set_bad(); break; | |
| 499 break; | |
| 500 default: | |
| 501 ShouldNotReachHere(); | |
| 502 break; | |
| 503 } | |
| 504 } | |
| 505 | |
| 506 // return value can be odd number of VMRegImpl stack slots make multiple of 2 | |
| 507 return round_to(stack, 2); | |
| 508 } | |
| 509 | |
| 510 // Patch the callers callsite with entry to compiled code if it exists. | |
| 511 static void patch_callers_callsite(MacroAssembler *masm) { | |
| 512 Label L; | |
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513 __ cmpptr(Address(rbx, in_bytes(Method::code_offset())), (int32_t)NULL_WORD); |
| 0 | 514 __ jcc(Assembler::equal, L); |
| 515 // Schedule the branch target address early. | |
| 516 // Call into the VM to patch the caller, then jump to compiled callee | |
| 517 // rax, isn't live so capture return address while we easily can | |
| 304 | 518 __ movptr(rax, Address(rsp, 0)); |
| 519 __ pusha(); | |
| 520 __ pushf(); | |
| 0 | 521 |
| 522 if (UseSSE == 1) { | |
| 304 | 523 __ subptr(rsp, 2*wordSize); |
| 0 | 524 __ movflt(Address(rsp, 0), xmm0); |
| 525 __ movflt(Address(rsp, wordSize), xmm1); | |
| 526 } | |
| 527 if (UseSSE >= 2) { | |
| 304 | 528 __ subptr(rsp, 4*wordSize); |
| 0 | 529 __ movdbl(Address(rsp, 0), xmm0); |
| 530 __ movdbl(Address(rsp, 2*wordSize), xmm1); | |
| 531 } | |
| 532 #ifdef COMPILER2 | |
| 533 // C2 may leave the stack dirty if not in SSE2+ mode | |
| 534 if (UseSSE >= 2) { | |
| 535 __ verify_FPU(0, "c2i transition should have clean FPU stack"); | |
| 536 } else { | |
| 537 __ empty_FPU_stack(); | |
| 538 } | |
| 539 #endif /* COMPILER2 */ | |
| 540 | |
| 541 // VM needs caller's callsite | |
| 304 | 542 __ push(rax); |
| 0 | 543 // VM needs target method |
| 304 | 544 __ push(rbx); |
| 0 | 545 __ call(RuntimeAddress(CAST_FROM_FN_PTR(address, SharedRuntime::fixup_callers_callsite))); |
| 304 | 546 __ addptr(rsp, 2*wordSize); |
| 0 | 547 |
| 548 if (UseSSE == 1) { | |
| 549 __ movflt(xmm0, Address(rsp, 0)); | |
| 550 __ movflt(xmm1, Address(rsp, wordSize)); | |
| 304 | 551 __ addptr(rsp, 2*wordSize); |
| 0 | 552 } |
| 553 if (UseSSE >= 2) { | |
| 554 __ movdbl(xmm0, Address(rsp, 0)); | |
| 555 __ movdbl(xmm1, Address(rsp, 2*wordSize)); | |
| 304 | 556 __ addptr(rsp, 4*wordSize); |
| 0 | 557 } |
| 558 | |
| 304 | 559 __ popf(); |
| 560 __ popa(); | |
| 0 | 561 __ bind(L); |
| 562 } | |
| 563 | |
| 564 | |
| 565 static void move_c2i_double(MacroAssembler *masm, XMMRegister r, int st_off) { | |
| 1506 | 566 int next_off = st_off - Interpreter::stackElementSize; |
| 567 __ movdbl(Address(rsp, next_off), r); | |
| 0 | 568 } |
| 569 | |
| 570 static void gen_c2i_adapter(MacroAssembler *masm, | |
| 571 int total_args_passed, | |
| 572 int comp_args_on_stack, | |
| 573 const BasicType *sig_bt, | |
| 574 const VMRegPair *regs, | |
| 575 Label& skip_fixup) { | |
| 576 // Before we get into the guts of the C2I adapter, see if we should be here | |
| 577 // at all. We've come from compiled code and are attempting to jump to the | |
| 578 // interpreter, which means the caller made a static call to get here | |
| 579 // (vcalls always get a compiled target if there is one). Check for a | |
| 580 // compiled target. If there is one, we need to patch the caller's call. | |
| 581 patch_callers_callsite(masm); | |
| 582 | |
| 583 __ bind(skip_fixup); | |
| 584 | |
| 585 #ifdef COMPILER2 | |
| 586 // C2 may leave the stack dirty if not in SSE2+ mode | |
| 587 if (UseSSE >= 2) { | |
| 588 __ verify_FPU(0, "c2i transition should have clean FPU stack"); | |
| 589 } else { | |
| 590 __ empty_FPU_stack(); | |
| 591 } | |
| 592 #endif /* COMPILER2 */ | |
| 593 | |
| 594 // Since all args are passed on the stack, total_args_passed * interpreter_ | |
| 595 // stack_element_size is the | |
| 596 // space we need. | |
| 1506 | 597 int extraspace = total_args_passed * Interpreter::stackElementSize; |
| 0 | 598 |
| 599 // Get return address | |
| 304 | 600 __ pop(rax); |
| 0 | 601 |
| 602 // set senderSP value | |
| 304 | 603 __ movptr(rsi, rsp); |
| 604 | |
| 605 __ subptr(rsp, extraspace); | |
| 0 | 606 |
| 607 // Now write the args into the outgoing interpreter space | |
| 608 for (int i = 0; i < total_args_passed; i++) { | |
| 609 if (sig_bt[i] == T_VOID) { | |
| 610 assert(i > 0 && (sig_bt[i-1] == T_LONG || sig_bt[i-1] == T_DOUBLE), "missing half"); | |
| 611 continue; | |
| 612 } | |
| 613 | |
| 614 // st_off points to lowest address on stack. | |
| 1506 | 615 int st_off = ((total_args_passed - 1) - i) * Interpreter::stackElementSize; |
| 616 int next_off = st_off - Interpreter::stackElementSize; | |
| 304 | 617 |
| 0 | 618 // Say 4 args: |
| 619 // i st_off | |
| 620 // 0 12 T_LONG | |
| 621 // 1 8 T_VOID | |
| 622 // 2 4 T_OBJECT | |
| 623 // 3 0 T_BOOL | |
| 624 VMReg r_1 = regs[i].first(); | |
| 625 VMReg r_2 = regs[i].second(); | |
| 626 if (!r_1->is_valid()) { | |
| 627 assert(!r_2->is_valid(), ""); | |
| 628 continue; | |
| 629 } | |
| 630 | |
| 631 if (r_1->is_stack()) { | |
| 632 // memory to memory use fpu stack top | |
| 633 int ld_off = r_1->reg2stack() * VMRegImpl::stack_slot_size + extraspace; | |
| 634 | |
| 635 if (!r_2->is_valid()) { | |
| 636 __ movl(rdi, Address(rsp, ld_off)); | |
| 304 | 637 __ movptr(Address(rsp, st_off), rdi); |
| 0 | 638 } else { |
| 639 | |
| 640 // ld_off == LSW, ld_off+VMRegImpl::stack_slot_size == MSW | |
| 641 // st_off == MSW, st_off-wordSize == LSW | |
| 642 | |
| 304 | 643 __ movptr(rdi, Address(rsp, ld_off)); |
| 644 __ movptr(Address(rsp, next_off), rdi); | |
| 645 #ifndef _LP64 | |
| 646 __ movptr(rdi, Address(rsp, ld_off + wordSize)); | |
| 647 __ movptr(Address(rsp, st_off), rdi); | |
| 648 #else | |
| 649 #ifdef ASSERT | |
| 650 // Overwrite the unused slot with known junk | |
| 651 __ mov64(rax, CONST64(0xdeadffffdeadaaaa)); | |
| 652 __ movptr(Address(rsp, st_off), rax); | |
| 653 #endif /* ASSERT */ | |
| 654 #endif // _LP64 | |
| 0 | 655 } |
| 656 } else if (r_1->is_Register()) { | |
| 657 Register r = r_1->as_Register(); | |
| 658 if (!r_2->is_valid()) { | |
| 659 __ movl(Address(rsp, st_off), r); | |
| 660 } else { | |
| 661 // long/double in gpr | |
| 304 | 662 NOT_LP64(ShouldNotReachHere()); |
| 663 // Two VMRegs can be T_OBJECT, T_ADDRESS, T_DOUBLE, T_LONG | |
| 664 // T_DOUBLE and T_LONG use two slots in the interpreter | |
| 665 if ( sig_bt[i] == T_LONG || sig_bt[i] == T_DOUBLE) { | |
| 666 // long/double in gpr | |
| 667 #ifdef ASSERT | |
| 668 // Overwrite the unused slot with known junk | |
| 669 LP64_ONLY(__ mov64(rax, CONST64(0xdeadffffdeadaaab))); | |
| 670 __ movptr(Address(rsp, st_off), rax); | |
| 671 #endif /* ASSERT */ | |
| 672 __ movptr(Address(rsp, next_off), r); | |
| 673 } else { | |
| 674 __ movptr(Address(rsp, st_off), r); | |
| 675 } | |
| 0 | 676 } |
| 677 } else { | |
| 678 assert(r_1->is_XMMRegister(), ""); | |
| 679 if (!r_2->is_valid()) { | |
| 680 __ movflt(Address(rsp, st_off), r_1->as_XMMRegister()); | |
| 681 } else { | |
| 682 assert(sig_bt[i] == T_DOUBLE || sig_bt[i] == T_LONG, "wrong type"); | |
| 683 move_c2i_double(masm, r_1->as_XMMRegister(), st_off); | |
| 684 } | |
| 685 } | |
| 686 } | |
| 687 | |
| 688 // Schedule the branch target address early. | |
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689 __ movptr(rcx, Address(rbx, in_bytes(Method::interpreter_entry_offset()))); |
| 0 | 690 // And repush original return address |
| 304 | 691 __ push(rax); |
| 0 | 692 __ jmp(rcx); |
| 693 } | |
| 694 | |
| 695 | |
| 696 static void move_i2c_double(MacroAssembler *masm, XMMRegister r, Register saved_sp, int ld_off) { | |
| 1506 | 697 int next_val_off = ld_off - Interpreter::stackElementSize; |
| 698 __ movdbl(r, Address(saved_sp, next_val_off)); | |
| 0 | 699 } |
| 700 | |
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701 static void range_check(MacroAssembler* masm, Register pc_reg, Register temp_reg, |
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702 address code_start, address code_end, |
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703 Label& L_ok) { |
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704 Label L_fail; |
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705 __ lea(temp_reg, ExternalAddress(code_start)); |
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706 __ cmpptr(pc_reg, temp_reg); |
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707 __ jcc(Assembler::belowEqual, L_fail); |
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708 __ lea(temp_reg, ExternalAddress(code_end)); |
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709 __ cmpptr(pc_reg, temp_reg); |
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710 __ jcc(Assembler::below, L_ok); |
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711 __ bind(L_fail); |
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712 } |
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713 |
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714 void SharedRuntime::gen_i2c_adapter(MacroAssembler *masm, |
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715 int total_args_passed, |
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716 int comp_args_on_stack, |
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717 const BasicType *sig_bt, |
|
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718 const VMRegPair *regs) { |
| 0 | 719 // Note: rsi contains the senderSP on entry. We must preserve it since |
| 720 // we may do a i2c -> c2i transition if we lose a race where compiled | |
| 721 // code goes non-entrant while we get args ready. | |
| 722 | |
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723 // Adapters can be frameless because they do not require the caller |
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724 // to perform additional cleanup work, such as correcting the stack pointer. |
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725 // An i2c adapter is frameless because the *caller* frame, which is interpreted, |
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726 // routinely repairs its own stack pointer (from interpreter_frame_last_sp), |
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727 // even if a callee has modified the stack pointer. |
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728 // A c2i adapter is frameless because the *callee* frame, which is interpreted, |
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729 // routinely repairs its caller's stack pointer (from sender_sp, which is set |
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730 // up via the senderSP register). |
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731 // In other words, if *either* the caller or callee is interpreted, we can |
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732 // get the stack pointer repaired after a call. |
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733 // This is why c2i and i2c adapters cannot be indefinitely composed. |
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734 // In particular, if a c2i adapter were to somehow call an i2c adapter, |
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735 // both caller and callee would be compiled methods, and neither would |
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736 // clean up the stack pointer changes performed by the two adapters. |
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737 // If this happens, control eventually transfers back to the compiled |
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738 // caller, but with an uncorrected stack, causing delayed havoc. |
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739 |
| 0 | 740 // Pick up the return address |
| 304 | 741 __ movptr(rax, Address(rsp, 0)); |
| 0 | 742 |
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743 if (VerifyAdapterCalls && |
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744 (Interpreter::code() != NULL || StubRoutines::code1() != NULL)) { |
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745 // So, let's test for cascading c2i/i2c adapters right now. |
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746 // assert(Interpreter::contains($return_addr) || |
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747 // StubRoutines::contains($return_addr), |
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748 // "i2c adapter must return to an interpreter frame"); |
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749 __ block_comment("verify_i2c { "); |
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750 Label L_ok; |
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751 if (Interpreter::code() != NULL) |
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752 range_check(masm, rax, rdi, |
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753 Interpreter::code()->code_start(), Interpreter::code()->code_end(), |
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754 L_ok); |
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755 if (StubRoutines::code1() != NULL) |
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756 range_check(masm, rax, rdi, |
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757 StubRoutines::code1()->code_begin(), StubRoutines::code1()->code_end(), |
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758 L_ok); |
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759 if (StubRoutines::code2() != NULL) |
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760 range_check(masm, rax, rdi, |
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761 StubRoutines::code2()->code_begin(), StubRoutines::code2()->code_end(), |
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762 L_ok); |
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763 const char* msg = "i2c adapter must return to an interpreter frame"; |
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764 __ block_comment(msg); |
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765 __ stop(msg); |
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766 __ bind(L_ok); |
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767 __ block_comment("} verify_i2ce "); |
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768 } |
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769 |
| 0 | 770 // Must preserve original SP for loading incoming arguments because |
| 771 // we need to align the outgoing SP for compiled code. | |
| 304 | 772 __ movptr(rdi, rsp); |
| 0 | 773 |
| 774 // Cut-out for having no stack args. Since up to 2 int/oop args are passed | |
| 775 // in registers, we will occasionally have no stack args. | |
| 776 int comp_words_on_stack = 0; | |
| 777 if (comp_args_on_stack) { | |
| 778 // Sig words on the stack are greater-than VMRegImpl::stack0. Those in | |
| 779 // registers are below. By subtracting stack0, we either get a negative | |
| 780 // number (all values in registers) or the maximum stack slot accessed. | |
| 781 // int comp_args_on_stack = VMRegImpl::reg2stack(max_arg); | |
| 782 // Convert 4-byte stack slots to words. | |
| 783 comp_words_on_stack = round_to(comp_args_on_stack*4, wordSize)>>LogBytesPerWord; | |
| 784 // Round up to miminum stack alignment, in wordSize | |
| 785 comp_words_on_stack = round_to(comp_words_on_stack, 2); | |
| 304 | 786 __ subptr(rsp, comp_words_on_stack * wordSize); |
| 0 | 787 } |
| 788 | |
| 789 // Align the outgoing SP | |
| 304 | 790 __ andptr(rsp, -(StackAlignmentInBytes)); |
| 0 | 791 |
| 792 // push the return address on the stack (note that pushing, rather | |
| 793 // than storing it, yields the correct frame alignment for the callee) | |
| 304 | 794 __ push(rax); |
| 0 | 795 |
| 796 // Put saved SP in another register | |
| 797 const Register saved_sp = rax; | |
| 304 | 798 __ movptr(saved_sp, rdi); |
| 0 | 799 |
| 800 | |
| 801 // Will jump to the compiled code just as if compiled code was doing it. | |
| 802 // Pre-load the register-jump target early, to schedule it better. | |
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803 __ movptr(rdi, Address(rbx, in_bytes(Method::from_compiled_offset()))); |
| 0 | 804 |
| 805 // Now generate the shuffle code. Pick up all register args and move the | |
| 806 // rest through the floating point stack top. | |
| 807 for (int i = 0; i < total_args_passed; i++) { | |
| 808 if (sig_bt[i] == T_VOID) { | |
| 809 // Longs and doubles are passed in native word order, but misaligned | |
| 810 // in the 32-bit build. | |
| 811 assert(i > 0 && (sig_bt[i-1] == T_LONG || sig_bt[i-1] == T_DOUBLE), "missing half"); | |
| 812 continue; | |
| 813 } | |
| 814 | |
| 815 // Pick up 0, 1 or 2 words from SP+offset. | |
| 816 | |
| 817 assert(!regs[i].second()->is_valid() || regs[i].first()->next() == regs[i].second(), | |
| 818 "scrambled load targets?"); | |
| 819 // Load in argument order going down. | |
| 1506 | 820 int ld_off = (total_args_passed - i) * Interpreter::stackElementSize; |
| 0 | 821 // Point to interpreter value (vs. tag) |
| 1506 | 822 int next_off = ld_off - Interpreter::stackElementSize; |
| 0 | 823 // |
| 824 // | |
| 825 // | |
| 826 VMReg r_1 = regs[i].first(); | |
| 827 VMReg r_2 = regs[i].second(); | |
| 828 if (!r_1->is_valid()) { | |
| 829 assert(!r_2->is_valid(), ""); | |
| 830 continue; | |
| 831 } | |
| 832 if (r_1->is_stack()) { | |
| 833 // Convert stack slot to an SP offset (+ wordSize to account for return address ) | |
| 834 int st_off = regs[i].first()->reg2stack()*VMRegImpl::stack_slot_size + wordSize; | |
| 835 | |
| 836 // We can use rsi as a temp here because compiled code doesn't need rsi as an input | |
| 837 // and if we end up going thru a c2i because of a miss a reasonable value of rsi | |
| 838 // we be generated. | |
| 839 if (!r_2->is_valid()) { | |
| 840 // __ fld_s(Address(saved_sp, ld_off)); | |
| 841 // __ fstp_s(Address(rsp, st_off)); | |
| 842 __ movl(rsi, Address(saved_sp, ld_off)); | |
| 304 | 843 __ movptr(Address(rsp, st_off), rsi); |
| 0 | 844 } else { |
| 845 // Interpreter local[n] == MSW, local[n+1] == LSW however locals | |
| 846 // are accessed as negative so LSW is at LOW address | |
| 847 | |
| 848 // ld_off is MSW so get LSW | |
| 849 // st_off is LSW (i.e. reg.first()) | |
| 850 // __ fld_d(Address(saved_sp, next_off)); | |
| 851 // __ fstp_d(Address(rsp, st_off)); | |
| 304 | 852 // |
| 853 // We are using two VMRegs. This can be either T_OBJECT, T_ADDRESS, T_LONG, or T_DOUBLE | |
| 854 // the interpreter allocates two slots but only uses one for thr T_LONG or T_DOUBLE case | |
| 855 // So we must adjust where to pick up the data to match the interpreter. | |
| 856 // | |
| 857 // Interpreter local[n] == MSW, local[n+1] == LSW however locals | |
| 858 // are accessed as negative so LSW is at LOW address | |
| 859 | |
| 860 // ld_off is MSW so get LSW | |
| 861 const int offset = (NOT_LP64(true ||) sig_bt[i]==T_LONG||sig_bt[i]==T_DOUBLE)? | |
| 862 next_off : ld_off; | |
| 863 __ movptr(rsi, Address(saved_sp, offset)); | |
| 864 __ movptr(Address(rsp, st_off), rsi); | |
| 865 #ifndef _LP64 | |
| 866 __ movptr(rsi, Address(saved_sp, ld_off)); | |
| 867 __ movptr(Address(rsp, st_off + wordSize), rsi); | |
| 868 #endif // _LP64 | |
| 0 | 869 } |
| 870 } else if (r_1->is_Register()) { // Register argument | |
| 871 Register r = r_1->as_Register(); | |
| 872 assert(r != rax, "must be different"); | |
| 873 if (r_2->is_valid()) { | |
| 304 | 874 // |
| 875 // We are using two VMRegs. This can be either T_OBJECT, T_ADDRESS, T_LONG, or T_DOUBLE | |
| 876 // the interpreter allocates two slots but only uses one for thr T_LONG or T_DOUBLE case | |
| 877 // So we must adjust where to pick up the data to match the interpreter. | |
| 878 | |
| 879 const int offset = (NOT_LP64(true ||) sig_bt[i]==T_LONG||sig_bt[i]==T_DOUBLE)? | |
| 880 next_off : ld_off; | |
| 881 | |
| 882 // this can be a misaligned move | |
| 883 __ movptr(r, Address(saved_sp, offset)); | |
| 884 #ifndef _LP64 | |
| 0 | 885 assert(r_2->as_Register() != rax, "need another temporary register"); |
| 886 // Remember r_1 is low address (and LSB on x86) | |
| 887 // So r_2 gets loaded from high address regardless of the platform | |
| 304 | 888 __ movptr(r_2->as_Register(), Address(saved_sp, ld_off)); |
| 889 #endif // _LP64 | |
| 0 | 890 } else { |
| 891 __ movl(r, Address(saved_sp, ld_off)); | |
| 892 } | |
| 893 } else { | |
| 894 assert(r_1->is_XMMRegister(), ""); | |
| 895 if (!r_2->is_valid()) { | |
| 896 __ movflt(r_1->as_XMMRegister(), Address(saved_sp, ld_off)); | |
| 897 } else { | |
| 898 move_i2c_double(masm, r_1->as_XMMRegister(), saved_sp, ld_off); | |
| 899 } | |
| 900 } | |
| 901 } | |
| 902 | |
| 903 // 6243940 We might end up in handle_wrong_method if | |
| 904 // the callee is deoptimized as we race thru here. If that | |
| 905 // happens we don't want to take a safepoint because the | |
| 906 // caller frame will look interpreted and arguments are now | |
| 907 // "compiled" so it is much better to make this transition | |
| 908 // invisible to the stack walking code. Unfortunately if | |
| 909 // we try and find the callee by normal means a safepoint | |
| 910 // is possible. So we stash the desired callee in the thread | |
| 911 // and the vm will find there should this case occur. | |
| 912 | |
| 913 __ get_thread(rax); | |
| 304 | 914 __ movptr(Address(rax, JavaThread::callee_target_offset()), rbx); |
| 0 | 915 |
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916 // move Method* to rax, in case we end up in an c2i adapter. |
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917 // the c2i adapters expect Method* in rax, (c2) because c2's |
| 0 | 918 // resolve stubs return the result (the method) in rax,. |
| 919 // I'd love to fix this. | |
| 304 | 920 __ mov(rax, rbx); |
| 0 | 921 |
| 922 __ jmp(rdi); | |
| 923 } | |
| 924 | |
| 925 // --------------------------------------------------------------- | |
| 926 AdapterHandlerEntry* SharedRuntime::generate_i2c2i_adapters(MacroAssembler *masm, | |
| 927 int total_args_passed, | |
| 928 int comp_args_on_stack, | |
| 929 const BasicType *sig_bt, | |
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930 const VMRegPair *regs, |
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931 AdapterFingerPrint* fingerprint) { |
| 0 | 932 address i2c_entry = __ pc(); |
| 933 | |
| 934 gen_i2c_adapter(masm, total_args_passed, comp_args_on_stack, sig_bt, regs); | |
| 935 | |
| 936 // ------------------------------------------------------------------------- | |
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937 // Generate a C2I adapter. On entry we know rbx, holds the Method* during calls |
| 0 | 938 // to the interpreter. The args start out packed in the compiled layout. They |
| 939 // need to be unpacked into the interpreter layout. This will almost always | |
| 940 // require some stack space. We grow the current (compiled) stack, then repack | |
| 941 // the args. We finally end in a jump to the generic interpreter entry point. | |
| 942 // On exit from the interpreter, the interpreter will restore our SP (lest the | |
| 943 // compiled code, which relys solely on SP and not EBP, get sick). | |
| 944 | |
| 945 address c2i_unverified_entry = __ pc(); | |
| 946 Label skip_fixup; | |
| 947 | |
| 948 Register holder = rax; | |
| 949 Register receiver = rcx; | |
| 950 Register temp = rbx; | |
| 951 | |
| 952 { | |
| 953 | |
| 954 Label missed; | |
| 304 | 955 __ movptr(temp, Address(receiver, oopDesc::klass_offset_in_bytes())); |
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956 __ cmpptr(temp, Address(holder, CompiledICHolder::holder_klass_offset())); |
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957 __ movptr(rbx, Address(holder, CompiledICHolder::holder_method_offset())); |
| 0 | 958 __ jcc(Assembler::notEqual, missed); |
| 959 // Method might have been compiled since the call site was patched to | |
| 960 // interpreted if that is the case treat it as a miss so we can get | |
| 961 // the call site corrected. | |
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962 __ cmpptr(Address(rbx, in_bytes(Method::code_offset())), (int32_t)NULL_WORD); |
| 0 | 963 __ jcc(Assembler::equal, skip_fixup); |
| 964 | |
| 965 __ bind(missed); | |
| 966 __ jump(RuntimeAddress(SharedRuntime::get_ic_miss_stub())); | |
| 967 } | |
| 968 | |
| 969 address c2i_entry = __ pc(); | |
| 970 | |
| 971 gen_c2i_adapter(masm, total_args_passed, comp_args_on_stack, sig_bt, regs, skip_fixup); | |
| 972 | |
| 973 __ flush(); | |
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974 return AdapterHandlerLibrary::new_entry(fingerprint, i2c_entry, c2i_entry, c2i_unverified_entry); |
| 0 | 975 } |
| 976 | |
| 977 int SharedRuntime::c_calling_convention(const BasicType *sig_bt, | |
| 978 VMRegPair *regs, | |
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979 VMRegPair *regs2, |
| 0 | 980 int total_args_passed) { |
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981 assert(regs2 == NULL, "not needed on x86"); |
| 0 | 982 // We return the amount of VMRegImpl stack slots we need to reserve for all |
| 983 // the arguments NOT counting out_preserve_stack_slots. | |
| 984 | |
| 985 uint stack = 0; // All arguments on stack | |
| 986 | |
| 987 for( int i = 0; i < total_args_passed; i++) { | |
| 988 // From the type and the argument number (count) compute the location | |
| 989 switch( sig_bt[i] ) { | |
| 990 case T_BOOLEAN: | |
| 991 case T_CHAR: | |
| 992 case T_FLOAT: | |
| 993 case T_BYTE: | |
| 994 case T_SHORT: | |
| 995 case T_INT: | |
| 996 case T_OBJECT: | |
| 997 case T_ARRAY: | |
| 998 case T_ADDRESS: | |
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999 case T_METADATA: |
| 0 | 1000 regs[i].set1(VMRegImpl::stack2reg(stack++)); |
| 1001 break; | |
| 1002 case T_LONG: | |
| 1003 case T_DOUBLE: // The stack numbering is reversed from Java | |
| 1004 // Since C arguments do not get reversed, the ordering for | |
| 1005 // doubles on the stack must be opposite the Java convention | |
| 1006 assert(sig_bt[i+1] == T_VOID, "missing Half" ); | |
| 1007 regs[i].set2(VMRegImpl::stack2reg(stack)); | |
| 1008 stack += 2; | |
| 1009 break; | |
| 1010 case T_VOID: regs[i].set_bad(); break; | |
| 1011 default: | |
| 1012 ShouldNotReachHere(); | |
| 1013 break; | |
| 1014 } | |
| 1015 } | |
| 1016 return stack; | |
| 1017 } | |
| 1018 | |
| 1019 // A simple move of integer like type | |
| 1020 static void simple_move32(MacroAssembler* masm, VMRegPair src, VMRegPair dst) { | |
| 1021 if (src.first()->is_stack()) { | |
| 1022 if (dst.first()->is_stack()) { | |
| 1023 // stack to stack | |
| 1024 // __ ld(FP, reg2offset(src.first()) + STACK_BIAS, L5); | |
| 1025 // __ st(L5, SP, reg2offset(dst.first()) + STACK_BIAS); | |
| 304 | 1026 __ movl2ptr(rax, Address(rbp, reg2offset_in(src.first()))); |
| 1027 __ movptr(Address(rsp, reg2offset_out(dst.first())), rax); | |
| 0 | 1028 } else { |
| 1029 // stack to reg | |
| 304 | 1030 __ movl2ptr(dst.first()->as_Register(), Address(rbp, reg2offset_in(src.first()))); |
| 0 | 1031 } |
| 1032 } else if (dst.first()->is_stack()) { | |
| 1033 // reg to stack | |
| 304 | 1034 // no need to sign extend on 64bit |
| 1035 __ movptr(Address(rsp, reg2offset_out(dst.first())), src.first()->as_Register()); | |
| 0 | 1036 } else { |
| 304 | 1037 if (dst.first() != src.first()) { |
| 1038 __ mov(dst.first()->as_Register(), src.first()->as_Register()); | |
| 1039 } | |
| 0 | 1040 } |
| 1041 } | |
| 1042 | |
| 1043 // An oop arg. Must pass a handle not the oop itself | |
| 1044 static void object_move(MacroAssembler* masm, | |
| 1045 OopMap* map, | |
| 1046 int oop_handle_offset, | |
| 1047 int framesize_in_slots, | |
| 1048 VMRegPair src, | |
| 1049 VMRegPair dst, | |
| 1050 bool is_receiver, | |
| 1051 int* receiver_offset) { | |
| 1052 | |
| 1053 // Because of the calling conventions we know that src can be a | |
| 1054 // register or a stack location. dst can only be a stack location. | |
| 1055 | |
| 1056 assert(dst.first()->is_stack(), "must be stack"); | |
| 1057 // must pass a handle. First figure out the location we use as a handle | |
| 1058 | |
| 1059 if (src.first()->is_stack()) { | |
| 1060 // Oop is already on the stack as an argument | |
| 1061 Register rHandle = rax; | |
| 1062 Label nil; | |
| 304 | 1063 __ xorptr(rHandle, rHandle); |
| 1064 __ cmpptr(Address(rbp, reg2offset_in(src.first())), (int32_t)NULL_WORD); | |
| 0 | 1065 __ jcc(Assembler::equal, nil); |
| 304 | 1066 __ lea(rHandle, Address(rbp, reg2offset_in(src.first()))); |
| 0 | 1067 __ bind(nil); |
| 304 | 1068 __ movptr(Address(rsp, reg2offset_out(dst.first())), rHandle); |
| 0 | 1069 |
| 1070 int offset_in_older_frame = src.first()->reg2stack() + SharedRuntime::out_preserve_stack_slots(); | |
| 1071 map->set_oop(VMRegImpl::stack2reg(offset_in_older_frame + framesize_in_slots)); | |
| 1072 if (is_receiver) { | |
| 1073 *receiver_offset = (offset_in_older_frame + framesize_in_slots) * VMRegImpl::stack_slot_size; | |
| 1074 } | |
| 1075 } else { | |
| 1076 // Oop is in an a register we must store it to the space we reserve | |
| 1077 // on the stack for oop_handles | |
| 1078 const Register rOop = src.first()->as_Register(); | |
| 1079 const Register rHandle = rax; | |
| 1080 int oop_slot = (rOop == rcx ? 0 : 1) * VMRegImpl::slots_per_word + oop_handle_offset; | |
| 1081 int offset = oop_slot*VMRegImpl::stack_slot_size; | |
| 1082 Label skip; | |
| 304 | 1083 __ movptr(Address(rsp, offset), rOop); |
| 0 | 1084 map->set_oop(VMRegImpl::stack2reg(oop_slot)); |
| 304 | 1085 __ xorptr(rHandle, rHandle); |
| 1086 __ cmpptr(rOop, (int32_t)NULL_WORD); | |
| 0 | 1087 __ jcc(Assembler::equal, skip); |
| 304 | 1088 __ lea(rHandle, Address(rsp, offset)); |
| 0 | 1089 __ bind(skip); |
| 1090 // Store the handle parameter | |
| 304 | 1091 __ movptr(Address(rsp, reg2offset_out(dst.first())), rHandle); |
| 0 | 1092 if (is_receiver) { |
| 1093 *receiver_offset = offset; | |
| 1094 } | |
| 1095 } | |
| 1096 } | |
| 1097 | |
| 1098 // A float arg may have to do float reg int reg conversion | |
| 1099 static void float_move(MacroAssembler* masm, VMRegPair src, VMRegPair dst) { | |
| 1100 assert(!src.second()->is_valid() && !dst.second()->is_valid(), "bad float_move"); | |
| 1101 | |
| 1102 // Because of the calling convention we know that src is either a stack location | |
| 1103 // or an xmm register. dst can only be a stack location. | |
| 1104 | |
| 1105 assert(dst.first()->is_stack() && ( src.first()->is_stack() || src.first()->is_XMMRegister()), "bad parameters"); | |
| 1106 | |
| 1107 if (src.first()->is_stack()) { | |
| 1108 __ movl(rax, Address(rbp, reg2offset_in(src.first()))); | |
| 304 | 1109 __ movptr(Address(rsp, reg2offset_out(dst.first())), rax); |
| 0 | 1110 } else { |
| 1111 // reg to stack | |
| 1112 __ movflt(Address(rsp, reg2offset_out(dst.first())), src.first()->as_XMMRegister()); | |
| 1113 } | |
| 1114 } | |
| 1115 | |
| 1116 // A long move | |
| 1117 static void long_move(MacroAssembler* masm, VMRegPair src, VMRegPair dst) { | |
| 1118 | |
| 1119 // The only legal possibility for a long_move VMRegPair is: | |
| 1120 // 1: two stack slots (possibly unaligned) | |
| 1121 // as neither the java or C calling convention will use registers | |
| 1122 // for longs. | |
| 1123 | |
| 1124 if (src.first()->is_stack() && dst.first()->is_stack()) { | |
| 1125 assert(src.second()->is_stack() && dst.second()->is_stack(), "must be all stack"); | |
| 304 | 1126 __ movptr(rax, Address(rbp, reg2offset_in(src.first()))); |
| 1127 NOT_LP64(__ movptr(rbx, Address(rbp, reg2offset_in(src.second())))); | |
| 1128 __ movptr(Address(rsp, reg2offset_out(dst.first())), rax); | |
| 1129 NOT_LP64(__ movptr(Address(rsp, reg2offset_out(dst.second())), rbx)); | |
| 0 | 1130 } else { |
| 1131 ShouldNotReachHere(); | |
| 1132 } | |
| 1133 } | |
| 1134 | |
| 1135 // A double move | |
| 1136 static void double_move(MacroAssembler* masm, VMRegPair src, VMRegPair dst) { | |
| 1137 | |
| 1138 // The only legal possibilities for a double_move VMRegPair are: | |
| 1139 // The painful thing here is that like long_move a VMRegPair might be | |
| 1140 | |
| 1141 // Because of the calling convention we know that src is either | |
| 1142 // 1: a single physical register (xmm registers only) | |
| 1143 // 2: two stack slots (possibly unaligned) | |
| 1144 // dst can only be a pair of stack slots. | |
| 1145 | |
| 1146 assert(dst.first()->is_stack() && (src.first()->is_XMMRegister() || src.first()->is_stack()), "bad args"); | |
| 1147 | |
| 1148 if (src.first()->is_stack()) { | |
| 1149 // source is all stack | |
| 304 | 1150 __ movptr(rax, Address(rbp, reg2offset_in(src.first()))); |
| 1151 NOT_LP64(__ movptr(rbx, Address(rbp, reg2offset_in(src.second())))); | |
| 1152 __ movptr(Address(rsp, reg2offset_out(dst.first())), rax); | |
| 1153 NOT_LP64(__ movptr(Address(rsp, reg2offset_out(dst.second())), rbx)); | |
| 0 | 1154 } else { |
| 1155 // reg to stack | |
| 1156 // No worries about stack alignment | |
| 1157 __ movdbl(Address(rsp, reg2offset_out(dst.first())), src.first()->as_XMMRegister()); | |
| 1158 } | |
| 1159 } | |
| 1160 | |
| 1161 | |
| 1162 void SharedRuntime::save_native_result(MacroAssembler *masm, BasicType ret_type, int frame_slots) { | |
| 1163 // We always ignore the frame_slots arg and just use the space just below frame pointer | |
| 1164 // which by this time is free to use | |
| 1165 switch (ret_type) { | |
| 1166 case T_FLOAT: | |
| 1167 __ fstp_s(Address(rbp, -wordSize)); | |
| 1168 break; | |
| 1169 case T_DOUBLE: | |
| 1170 __ fstp_d(Address(rbp, -2*wordSize)); | |
| 1171 break; | |
| 1172 case T_VOID: break; | |
| 1173 case T_LONG: | |
| 304 | 1174 __ movptr(Address(rbp, -wordSize), rax); |
| 1175 NOT_LP64(__ movptr(Address(rbp, -2*wordSize), rdx)); | |
| 0 | 1176 break; |
| 1177 default: { | |
| 304 | 1178 __ movptr(Address(rbp, -wordSize), rax); |
| 0 | 1179 } |
| 1180 } | |
| 1181 } | |
| 1182 | |
| 1183 void SharedRuntime::restore_native_result(MacroAssembler *masm, BasicType ret_type, int frame_slots) { | |
| 1184 // We always ignore the frame_slots arg and just use the space just below frame pointer | |
| 1185 // which by this time is free to use | |
| 1186 switch (ret_type) { | |
| 1187 case T_FLOAT: | |
| 1188 __ fld_s(Address(rbp, -wordSize)); | |
| 1189 break; | |
| 1190 case T_DOUBLE: | |
| 1191 __ fld_d(Address(rbp, -2*wordSize)); | |
| 1192 break; | |
| 1193 case T_LONG: | |
| 304 | 1194 __ movptr(rax, Address(rbp, -wordSize)); |
| 1195 NOT_LP64(__ movptr(rdx, Address(rbp, -2*wordSize))); | |
| 0 | 1196 break; |
| 1197 case T_VOID: break; | |
| 1198 default: { | |
| 304 | 1199 __ movptr(rax, Address(rbp, -wordSize)); |
| 0 | 1200 } |
| 1201 } | |
| 1202 } | |
| 1203 | |
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1205 static void save_or_restore_arguments(MacroAssembler* masm, |
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1206 const int stack_slots, |
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1207 const int total_in_args, |
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1208 const int arg_save_area, |
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1209 OopMap* map, |
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1210 VMRegPair* in_regs, |
|
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1211 BasicType* in_sig_bt) { |
|
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1212 // if map is non-NULL then the code should store the values, |
|
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1213 // otherwise it should load them. |
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1214 int handle_index = 0; |
|
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1215 // Save down double word first |
|
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1216 for ( int i = 0; i < total_in_args; i++) { |
|
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1217 if (in_regs[i].first()->is_XMMRegister() && in_sig_bt[i] == T_DOUBLE) { |
|
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1218 int slot = handle_index * VMRegImpl::slots_per_word + arg_save_area; |
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1219 int offset = slot * VMRegImpl::stack_slot_size; |
|
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1220 handle_index += 2; |
|
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1221 assert(handle_index <= stack_slots, "overflow"); |
|
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1222 if (map != NULL) { |
|
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1223 __ movdbl(Address(rsp, offset), in_regs[i].first()->as_XMMRegister()); |
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1224 } else { |
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1225 __ movdbl(in_regs[i].first()->as_XMMRegister(), Address(rsp, offset)); |
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1226 } |
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1227 } |
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1228 if (in_regs[i].first()->is_Register() && in_sig_bt[i] == T_LONG) { |
|
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1229 int slot = handle_index * VMRegImpl::slots_per_word + arg_save_area; |
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1230 int offset = slot * VMRegImpl::stack_slot_size; |
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1231 handle_index += 2; |
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1232 assert(handle_index <= stack_slots, "overflow"); |
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1233 if (map != NULL) { |
|
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1234 __ movl(Address(rsp, offset), in_regs[i].first()->as_Register()); |
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1235 if (in_regs[i].second()->is_Register()) { |
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1236 __ movl(Address(rsp, offset + 4), in_regs[i].second()->as_Register()); |
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1237 } |
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1238 } else { |
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1239 __ movl(in_regs[i].first()->as_Register(), Address(rsp, offset)); |
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1240 if (in_regs[i].second()->is_Register()) { |
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1241 __ movl(in_regs[i].second()->as_Register(), Address(rsp, offset + 4)); |
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1242 } |
|
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1243 } |
|
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1244 } |
|
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1245 } |
|
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|
1246 // Save or restore single word registers |
|
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1247 for ( int i = 0; i < total_in_args; i++) { |
|
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1248 if (in_regs[i].first()->is_Register()) { |
|
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1249 int slot = handle_index++ * VMRegImpl::slots_per_word + arg_save_area; |
|
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1250 int offset = slot * VMRegImpl::stack_slot_size; |
|
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|
1251 assert(handle_index <= stack_slots, "overflow"); |
|
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1252 if (in_sig_bt[i] == T_ARRAY && map != NULL) { |
|
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|
1253 map->set_oop(VMRegImpl::stack2reg(slot));; |
|
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1254 } |
|
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|
1255 |
|
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1256 // Value is in an input register pass we must flush it to the stack |
|
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1257 const Register reg = in_regs[i].first()->as_Register(); |
|
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|
1258 switch (in_sig_bt[i]) { |
|
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1259 case T_ARRAY: |
|
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1260 if (map != NULL) { |
|
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|
1261 __ movptr(Address(rsp, offset), reg); |
|
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|
1262 } else { |
|
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|
1263 __ movptr(reg, Address(rsp, offset)); |
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|
1264 } |
|
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|
1265 break; |
|
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|
1266 case T_BOOLEAN: |
|
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|
1267 case T_CHAR: |
|
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|
1268 case T_BYTE: |
|
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|
1269 case T_SHORT: |
|
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|
1270 case T_INT: |
|
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|
1271 if (map != NULL) { |
|
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|
1272 __ movl(Address(rsp, offset), reg); |
|
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|
1273 } else { |
|
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|
1274 __ movl(reg, Address(rsp, offset)); |
|
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|
1275 } |
|
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|
1276 break; |
|
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|
1277 case T_OBJECT: |
|
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|
1278 default: ShouldNotReachHere(); |
|
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|
1279 } |
|
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|
1280 } else if (in_regs[i].first()->is_XMMRegister()) { |
|
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|
1281 if (in_sig_bt[i] == T_FLOAT) { |
|
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|
1282 int slot = handle_index++ * VMRegImpl::slots_per_word + arg_save_area; |
|
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|
1283 int offset = slot * VMRegImpl::stack_slot_size; |
|
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|
1284 assert(handle_index <= stack_slots, "overflow"); |
|
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|
1285 if (map != NULL) { |
|
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|
1286 __ movflt(Address(rsp, offset), in_regs[i].first()->as_XMMRegister()); |
|
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|
1287 } else { |
|
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|
1288 __ movflt(in_regs[i].first()->as_XMMRegister(), Address(rsp, offset)); |
|
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|
1289 } |
|
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|
1290 } |
|
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|
1291 } else if (in_regs[i].first()->is_stack()) { |
|
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1292 if (in_sig_bt[i] == T_ARRAY && map != NULL) { |
|
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|
1293 int offset_in_older_frame = in_regs[i].first()->reg2stack() + SharedRuntime::out_preserve_stack_slots(); |
|
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|
1294 map->set_oop(VMRegImpl::stack2reg(offset_in_older_frame + stack_slots)); |
|
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|
1295 } |
|
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|
1296 } |
|
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|
1297 } |
|
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|
1298 } |
|
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|
1299 |
|
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|
1300 // Check GC_locker::needs_gc and enter the runtime if it's true. This |
|
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|
1301 // keeps a new JNI critical region from starting until a GC has been |
|
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|
1302 // forced. Save down any oops in registers and describe them in an |
|
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|
1303 // OopMap. |
|
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|
1304 static void check_needs_gc_for_critical_native(MacroAssembler* masm, |
|
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|
1305 Register thread, |
|
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|
1306 int stack_slots, |
|
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|
1307 int total_c_args, |
|
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|
1308 int total_in_args, |
|
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|
1309 int arg_save_area, |
|
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|
1310 OopMapSet* oop_maps, |
|
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|
1311 VMRegPair* in_regs, |
|
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|
1312 BasicType* in_sig_bt) { |
|
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|
1313 __ block_comment("check GC_locker::needs_gc"); |
|
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|
1314 Label cont; |
|
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|
1315 __ cmp8(ExternalAddress((address)GC_locker::needs_gc_address()), false); |
|
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|
1316 __ jcc(Assembler::equal, cont); |
|
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|
1317 |
|
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|
1318 // Save down any incoming oops and call into the runtime to halt for a GC |
|
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|
1319 |
|
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|
1320 OopMap* map = new OopMap(stack_slots * 2, 0 /* arg_slots*/); |
|
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|
1321 |
|
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|
1322 save_or_restore_arguments(masm, stack_slots, total_in_args, |
|
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|
1323 arg_save_area, map, in_regs, in_sig_bt); |
|
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|
1324 |
|
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|
1325 address the_pc = __ pc(); |
|
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|
1326 oop_maps->add_gc_map( __ offset(), map); |
|
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|
1327 __ set_last_Java_frame(thread, rsp, noreg, the_pc); |
|
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|
1328 |
|
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|
1329 __ block_comment("block_for_jni_critical"); |
|
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|
1330 __ push(thread); |
|
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|
1331 __ call(RuntimeAddress(CAST_FROM_FN_PTR(address, SharedRuntime::block_for_jni_critical))); |
|
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|
1332 __ increment(rsp, wordSize); |
|
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1333 |
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1334 __ get_thread(thread); |
|
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1335 __ reset_last_Java_frame(thread, false, true); |
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1336 |
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1337 save_or_restore_arguments(masm, stack_slots, total_in_args, |
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1338 arg_save_area, NULL, in_regs, in_sig_bt); |
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1339 |
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1340 __ bind(cont); |
|
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1341 #ifdef ASSERT |
|
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1342 if (StressCriticalJNINatives) { |
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1343 // Stress register saving |
|
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1344 OopMap* map = new OopMap(stack_slots * 2, 0 /* arg_slots*/); |
|
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1345 save_or_restore_arguments(masm, stack_slots, total_in_args, |
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1346 arg_save_area, map, in_regs, in_sig_bt); |
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1347 // Destroy argument registers |
|
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1348 for (int i = 0; i < total_in_args - 1; i++) { |
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1349 if (in_regs[i].first()->is_Register()) { |
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1350 const Register reg = in_regs[i].first()->as_Register(); |
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1351 __ xorptr(reg, reg); |
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1352 } else if (in_regs[i].first()->is_XMMRegister()) { |
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1353 __ xorpd(in_regs[i].first()->as_XMMRegister(), in_regs[i].first()->as_XMMRegister()); |
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1354 } else if (in_regs[i].first()->is_FloatRegister()) { |
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1355 ShouldNotReachHere(); |
|
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1356 } else if (in_regs[i].first()->is_stack()) { |
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1357 // Nothing to do |
|
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1358 } else { |
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1359 ShouldNotReachHere(); |
|
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1360 } |
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1361 if (in_sig_bt[i] == T_LONG || in_sig_bt[i] == T_DOUBLE) { |
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1362 i++; |
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1363 } |
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1364 } |
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|
1365 |
|
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1366 save_or_restore_arguments(masm, stack_slots, total_in_args, |
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1367 arg_save_area, NULL, in_regs, in_sig_bt); |
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1368 } |
|
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1369 #endif |
|
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1370 } |
|
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|
1371 |
|
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1372 // Unpack an array argument into a pointer to the body and the length |
|
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1373 // if the array is non-null, otherwise pass 0 for both. |
|
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|
1374 static void unpack_array_argument(MacroAssembler* masm, VMRegPair reg, BasicType in_elem_type, VMRegPair body_arg, VMRegPair length_arg) { |
|
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1375 Register tmp_reg = rax; |
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|
1376 assert(!body_arg.first()->is_Register() || body_arg.first()->as_Register() != tmp_reg, |
|
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|
1377 "possible collision"); |
|
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1378 assert(!length_arg.first()->is_Register() || length_arg.first()->as_Register() != tmp_reg, |
|
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|
1379 "possible collision"); |
|
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|
1380 |
|
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1381 // Pass the length, ptr pair |
|
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|
1382 Label is_null, done; |
|
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|
1383 VMRegPair tmp(tmp_reg->as_VMReg()); |
|
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1384 if (reg.first()->is_stack()) { |
|
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1385 // Load the arg up from the stack |
|
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|
1386 simple_move32(masm, reg, tmp); |
|
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|
1387 reg = tmp; |
|
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1388 } |
|
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1389 __ testptr(reg.first()->as_Register(), reg.first()->as_Register()); |
|
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1390 __ jccb(Assembler::equal, is_null); |
|
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1391 __ lea(tmp_reg, Address(reg.first()->as_Register(), arrayOopDesc::base_offset_in_bytes(in_elem_type))); |
|
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|
1392 simple_move32(masm, tmp, body_arg); |
|
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1393 // load the length relative to the body. |
|
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|
1394 __ movl(tmp_reg, Address(tmp_reg, arrayOopDesc::length_offset_in_bytes() - |
|
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1395 arrayOopDesc::base_offset_in_bytes(in_elem_type))); |
|
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|
1396 simple_move32(masm, tmp, length_arg); |
|
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|
1397 __ jmpb(done); |
|
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|
1398 __ bind(is_null); |
|
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|
1399 // Pass zeros |
|
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|
1400 __ xorptr(tmp_reg, tmp_reg); |
|
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|
1401 simple_move32(masm, tmp, body_arg); |
|
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|
1402 simple_move32(masm, tmp, length_arg); |
|
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1403 __ bind(done); |
|
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|
1404 } |
|
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|
1405 |
|
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|
1406 static void verify_oop_args(MacroAssembler* masm, |
|
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1407 methodHandle method, |
|
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1408 const BasicType* sig_bt, |
|
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1409 const VMRegPair* regs) { |
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1410 Register temp_reg = rbx; // not part of any compiled calling seq |
|
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1411 if (VerifyOops) { |
|
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1412 for (int i = 0; i < method->size_of_parameters(); i++) { |
|
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1413 if (sig_bt[i] == T_OBJECT || |
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1414 sig_bt[i] == T_ARRAY) { |
|
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1415 VMReg r = regs[i].first(); |
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1416 assert(r->is_valid(), "bad oop arg"); |
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1417 if (r->is_stack()) { |
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1418 __ movptr(temp_reg, Address(rsp, r->reg2stack() * VMRegImpl::stack_slot_size + wordSize)); |
|
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1419 __ verify_oop(temp_reg); |
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1420 } else { |
|
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1421 __ verify_oop(r->as_Register()); |
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1422 } |
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1423 } |
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1424 } |
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1425 } |
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1426 } |
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1427 |
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1428 static void gen_special_dispatch(MacroAssembler* masm, |
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1429 methodHandle method, |
|
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1430 const BasicType* sig_bt, |
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1431 const VMRegPair* regs) { |
|
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|
1432 verify_oop_args(masm, method, sig_bt, regs); |
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|
1433 vmIntrinsics::ID iid = method->intrinsic_id(); |
|
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1434 |
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1435 // Now write the args into the outgoing interpreter space |
|
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|
1436 bool has_receiver = false; |
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1437 Register receiver_reg = noreg; |
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1438 int member_arg_pos = -1; |
|
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1439 Register member_reg = noreg; |
|
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|
1440 int ref_kind = MethodHandles::signature_polymorphic_intrinsic_ref_kind(iid); |
|
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1441 if (ref_kind != 0) { |
|
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|
1442 member_arg_pos = method->size_of_parameters() - 1; // trailing MemberName argument |
|
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|
1443 member_reg = rbx; // known to be free at this point |
|
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|
1444 has_receiver = MethodHandles::ref_kind_has_receiver(ref_kind); |
|
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|
1445 } else if (iid == vmIntrinsics::_invokeBasic) { |
|
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|
1446 has_receiver = true; |
|
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1447 } else { |
|
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|
1448 fatal(err_msg_res("unexpected intrinsic id %d", iid)); |
|
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|
1449 } |
|
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|
1450 |
|
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1451 if (member_reg != noreg) { |
|
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|
1452 // Load the member_arg into register, if necessary. |
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1453 SharedRuntime::check_member_name_argument_is_last_argument(method, sig_bt, regs); |
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1454 VMReg r = regs[member_arg_pos].first(); |
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1455 if (r->is_stack()) { |
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1456 __ movptr(member_reg, Address(rsp, r->reg2stack() * VMRegImpl::stack_slot_size + wordSize)); |
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1457 } else { |
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1458 // no data motion is needed |
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1459 member_reg = r->as_Register(); |
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1460 } |
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1461 } |
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1462 |
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1463 if (has_receiver) { |
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1464 // Make sure the receiver is loaded into a register. |
|
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1465 assert(method->size_of_parameters() > 0, "oob"); |
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1466 assert(sig_bt[0] == T_OBJECT, "receiver argument must be an object"); |
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1467 VMReg r = regs[0].first(); |
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1468 assert(r->is_valid(), "bad receiver arg"); |
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1469 if (r->is_stack()) { |
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1470 // Porting note: This assumes that compiled calling conventions always |
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1471 // pass the receiver oop in a register. If this is not true on some |
|
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1472 // platform, pick a temp and load the receiver from stack. |
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1473 fatal("receiver always in a register"); |
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1474 receiver_reg = rcx; // known to be free at this point |
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1475 __ movptr(receiver_reg, Address(rsp, r->reg2stack() * VMRegImpl::stack_slot_size + wordSize)); |
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1476 } else { |
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1477 // no data motion is needed |
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1478 receiver_reg = r->as_Register(); |
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1479 } |
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1480 } |
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1481 |
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1482 // Figure out which address we are really jumping to: |
|
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1483 MethodHandles::generate_method_handle_dispatch(masm, iid, |
|
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1484 receiver_reg, member_reg, /*for_compiler_entry:*/ true); |
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1485 } |
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1486 |
| 0 | 1487 // --------------------------------------------------------------------------- |
| 1488 // Generate a native wrapper for a given method. The method takes arguments | |
| 1489 // in the Java compiled code convention, marshals them to the native | |
| 1490 // convention (handlizes oops, etc), transitions to native, makes the call, | |
| 1491 // returns to java state (possibly blocking), unhandlizes any result and | |
| 1492 // returns. | |
|
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1493 // |
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1494 // Critical native functions are a shorthand for the use of |
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1495 // GetPrimtiveArrayCritical and disallow the use of any other JNI |
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1496 // functions. The wrapper is expected to unpack the arguments before |
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1497 // passing them to the callee and perform checks before and after the |
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1498 // native call to ensure that they GC_locker |
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1499 // lock_critical/unlock_critical semantics are followed. Some other |
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1500 // parts of JNI setup are skipped like the tear down of the JNI handle |
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1501 // block and the check for pending exceptions it's impossible for them |
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1502 // to be thrown. |
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1503 // |
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1504 // They are roughly structured like this: |
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1505 // if (GC_locker::needs_gc()) |
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1506 // SharedRuntime::block_for_jni_critical(); |
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1507 // tranistion to thread_in_native |
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1508 // unpack arrray arguments and call native entry point |
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1509 // check for safepoint in progress |
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1510 // check if any thread suspend flags are set |
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1511 // call into JVM and possible unlock the JNI critical |
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1512 // if a GC was suppressed while in the critical native. |
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1513 // transition back to thread_in_Java |
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1514 // return to caller |
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1515 // |
|
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1516 nmethod* SharedRuntime::generate_native_wrapper(MacroAssembler* masm, |
| 0 | 1517 methodHandle method, |
|
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|
1518 int compile_id, |
|
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1519 BasicType* in_sig_bt, |
|
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|
1520 VMRegPair* in_regs, |
| 0 | 1521 BasicType ret_type) { |
|
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1522 if (method->is_method_handle_intrinsic()) { |
|
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1523 vmIntrinsics::ID iid = method->intrinsic_id(); |
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|
1524 intptr_t start = (intptr_t)__ pc(); |
|
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1525 int vep_offset = ((intptr_t)__ pc()) - start; |
|
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|
1526 gen_special_dispatch(masm, |
|
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|
1527 method, |
|
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|
1528 in_sig_bt, |
|
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|
1529 in_regs); |
|
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|
1530 int frame_complete = ((intptr_t)__ pc()) - start; // not complete, period |
|
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|
1531 __ flush(); |
|
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|
1532 int stack_slots = SharedRuntime::out_preserve_stack_slots(); // no out slots at all, actually |
|
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|
1533 return nmethod::new_native_nmethod(method, |
|
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|
1534 compile_id, |
|
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|
1535 masm->code(), |
|
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|
1536 vep_offset, |
|
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|
1537 frame_complete, |
|
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|
1538 stack_slots / VMRegImpl::slots_per_word, |
|
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|
1539 in_ByteSize(-1), |
|
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|
1540 in_ByteSize(-1), |
|
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|
1541 (OopMapSet*)NULL); |
|
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|
1542 } |
|
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|
1543 bool is_critical_native = true; |
|
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|
1544 address native_func = method->critical_native_function(); |
|
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|
1545 if (native_func == NULL) { |
|
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|
1546 native_func = method->native_function(); |
|
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|
1547 is_critical_native = false; |
|
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|
1548 } |
|
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|
1549 assert(native_func != NULL, "must have function"); |
| 0 | 1550 |
| 1551 // An OopMap for lock (and class if static) | |
| 1552 OopMapSet *oop_maps = new OopMapSet(); | |
| 1553 | |
| 1554 // We have received a description of where all the java arg are located | |
| 1555 // on entry to the wrapper. We need to convert these args to where | |
| 1556 // the jni function will expect them. To figure out where they go | |
| 1557 // we convert the java signature to a C signature by inserting | |
| 1558 // the hidden arguments as arg[0] and possibly arg[1] (static method) | |
| 1559 | |
|
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|
1560 const int total_in_args = method->size_of_parameters(); |
|
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|
1561 int total_c_args = total_in_args; |
|
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|
1562 if (!is_critical_native) { |
|
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|
1563 total_c_args += 1; |
|
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|
1564 if (method->is_static()) { |
|
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|
1565 total_c_args++; |
|
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|
1566 } |
|
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|
1567 } else { |
|
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|
1568 for (int i = 0; i < total_in_args; i++) { |
|
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|
1569 if (in_sig_bt[i] == T_ARRAY) { |
|
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|
1570 total_c_args++; |
|
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|
1571 } |
|
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|
1572 } |
| 0 | 1573 } |
| 1574 | |
| 1575 BasicType* out_sig_bt = NEW_RESOURCE_ARRAY(BasicType, total_c_args); | |
|
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|
1576 VMRegPair* out_regs = NEW_RESOURCE_ARRAY(VMRegPair, total_c_args); |
|
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|
1577 BasicType* in_elem_bt = NULL; |
| 0 | 1578 |
| 1579 int argc = 0; | |
|
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|
1580 if (!is_critical_native) { |
|
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|
1581 out_sig_bt[argc++] = T_ADDRESS; |
|
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|
1582 if (method->is_static()) { |
|
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|
1583 out_sig_bt[argc++] = T_OBJECT; |
|
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|
1584 } |
|
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|
1585 |
|
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|
1586 for (int i = 0; i < total_in_args ; i++ ) { |
|
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|
1587 out_sig_bt[argc++] = in_sig_bt[i]; |
|
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|
1588 } |
|
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1589 } else { |
|
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|
1590 Thread* THREAD = Thread::current(); |
|
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1591 in_elem_bt = NEW_RESOURCE_ARRAY(BasicType, total_in_args); |
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1592 SignatureStream ss(method->signature()); |
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1593 for (int i = 0; i < total_in_args ; i++ ) { |
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1594 if (in_sig_bt[i] == T_ARRAY) { |
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1595 // Arrays are passed as int, elem* pair |
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1596 out_sig_bt[argc++] = T_INT; |
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1597 out_sig_bt[argc++] = T_ADDRESS; |
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1598 Symbol* atype = ss.as_symbol(CHECK_NULL); |
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1599 const char* at = atype->as_C_string(); |
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1600 if (strlen(at) == 2) { |
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1601 assert(at[0] == '[', "must be"); |
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1602 switch (at[1]) { |
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1603 case 'B': in_elem_bt[i] = T_BYTE; break; |
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1604 case 'C': in_elem_bt[i] = T_CHAR; break; |
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1605 case 'D': in_elem_bt[i] = T_DOUBLE; break; |
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1606 case 'F': in_elem_bt[i] = T_FLOAT; break; |
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1607 case 'I': in_elem_bt[i] = T_INT; break; |
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1608 case 'J': in_elem_bt[i] = T_LONG; break; |
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1609 case 'S': in_elem_bt[i] = T_SHORT; break; |
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1610 case 'Z': in_elem_bt[i] = T_BOOLEAN; break; |
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1611 default: ShouldNotReachHere(); |
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1612 } |
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1613 } |
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1614 } else { |
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1615 out_sig_bt[argc++] = in_sig_bt[i]; |
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1616 in_elem_bt[i] = T_VOID; |
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1617 } |
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1618 if (in_sig_bt[i] != T_VOID) { |
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1619 assert(in_sig_bt[i] == ss.type(), "must match"); |
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1620 ss.next(); |
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1621 } |
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1622 } |
| 0 | 1623 } |
| 1624 | |
| 1625 // Now figure out where the args must be stored and how much stack space | |
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1626 // they require. |
| 0 | 1627 int out_arg_slots; |
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1628 out_arg_slots = c_calling_convention(out_sig_bt, out_regs, NULL, total_c_args); |
| 0 | 1629 |
| 1630 // Compute framesize for the wrapper. We need to handlize all oops in | |
| 1631 // registers a max of 2 on x86. | |
| 1632 | |
| 1633 // Calculate the total number of stack slots we will need. | |
| 1634 | |
| 1635 // First count the abi requirement plus all of the outgoing args | |
| 1636 int stack_slots = SharedRuntime::out_preserve_stack_slots() + out_arg_slots; | |
| 1637 | |
| 1638 // Now the space for the inbound oop handle area | |
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1639 int total_save_slots = 2 * VMRegImpl::slots_per_word; // 2 arguments passed in registers |
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1640 if (is_critical_native) { |
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1641 // Critical natives may have to call out so they need a save area |
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1642 // for register arguments. |
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1643 int double_slots = 0; |
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1644 int single_slots = 0; |
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1645 for ( int i = 0; i < total_in_args; i++) { |
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1646 if (in_regs[i].first()->is_Register()) { |
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1647 const Register reg = in_regs[i].first()->as_Register(); |
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1648 switch (in_sig_bt[i]) { |
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1649 case T_ARRAY: // critical array (uses 2 slots on LP64) |
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1650 case T_BOOLEAN: |
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1651 case T_BYTE: |
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1652 case T_SHORT: |
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1653 case T_CHAR: |
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1654 case T_INT: single_slots++; break; |
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1655 case T_LONG: double_slots++; break; |
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1656 default: ShouldNotReachHere(); |
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1657 } |
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1658 } else if (in_regs[i].first()->is_XMMRegister()) { |
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1659 switch (in_sig_bt[i]) { |
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1660 case T_FLOAT: single_slots++; break; |
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1661 case T_DOUBLE: double_slots++; break; |
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1662 default: ShouldNotReachHere(); |
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1663 } |
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1664 } else if (in_regs[i].first()->is_FloatRegister()) { |
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1665 ShouldNotReachHere(); |
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1666 } |
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1667 } |
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1668 total_save_slots = double_slots * 2 + single_slots; |
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1669 // align the save area |
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1670 if (double_slots != 0) { |
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1671 stack_slots = round_to(stack_slots, 2); |
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1672 } |
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1673 } |
| 0 | 1674 |
| 1675 int oop_handle_offset = stack_slots; | |
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1676 stack_slots += total_save_slots; |
| 0 | 1677 |
| 1678 // Now any space we need for handlizing a klass if static method | |
| 1679 | |
| 1680 int klass_slot_offset = 0; | |
| 1681 int klass_offset = -1; | |
| 1682 int lock_slot_offset = 0; | |
| 1683 bool is_static = false; | |
| 1684 | |
| 1685 if (method->is_static()) { | |
| 1686 klass_slot_offset = stack_slots; | |
| 1687 stack_slots += VMRegImpl::slots_per_word; | |
| 1688 klass_offset = klass_slot_offset * VMRegImpl::stack_slot_size; | |
| 1689 is_static = true; | |
| 1690 } | |
| 1691 | |
| 1692 // Plus a lock if needed | |
| 1693 | |
| 1694 if (method->is_synchronized()) { | |
| 1695 lock_slot_offset = stack_slots; | |
| 1696 stack_slots += VMRegImpl::slots_per_word; | |
| 1697 } | |
| 1698 | |
| 1699 // Now a place (+2) to save return values or temp during shuffling | |
| 1700 // + 2 for return address (which we own) and saved rbp, | |
| 1701 stack_slots += 4; | |
| 1702 | |
| 1703 // Ok The space we have allocated will look like: | |
| 1704 // | |
| 1705 // | |
| 1706 // FP-> | | | |
| 1707 // |---------------------| | |
| 1708 // | 2 slots for moves | | |
| 1709 // |---------------------| | |
| 1710 // | lock box (if sync) | | |
| 1711 // |---------------------| <- lock_slot_offset (-lock_slot_rbp_offset) | |
| 1712 // | klass (if static) | | |
| 1713 // |---------------------| <- klass_slot_offset | |
| 1714 // | oopHandle area | | |
| 1715 // |---------------------| <- oop_handle_offset (a max of 2 registers) | |
| 1716 // | outbound memory | | |
| 1717 // | based arguments | | |
| 1718 // | | | |
| 1719 // |---------------------| | |
| 1720 // | | | |
| 1721 // SP-> | out_preserved_slots | | |
| 1722 // | |
| 1723 // | |
| 1724 // **************************************************************************** | |
| 1725 // WARNING - on Windows Java Natives use pascal calling convention and pop the | |
| 1726 // arguments off of the stack after the jni call. Before the call we can use | |
| 1727 // instructions that are SP relative. After the jni call we switch to FP | |
| 1728 // relative instructions instead of re-adjusting the stack on windows. | |
| 1729 // **************************************************************************** | |
| 1730 | |
| 1731 | |
| 1732 // Now compute actual number of stack words we need rounding to make | |
| 1733 // stack properly aligned. | |
|
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1734 stack_slots = round_to(stack_slots, StackAlignmentInSlots); |
| 0 | 1735 |
| 1736 int stack_size = stack_slots * VMRegImpl::stack_slot_size; | |
| 1737 | |
| 1738 intptr_t start = (intptr_t)__ pc(); | |
| 1739 | |
| 1740 // First thing make an ic check to see if we should even be here | |
| 1741 | |
| 1742 // We are free to use all registers as temps without saving them and | |
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1743 // restoring them except rbp. rbp is the only callee save register |
| 0 | 1744 // as far as the interpreter and the compiler(s) are concerned. |
| 1745 | |
| 1746 | |
| 1747 const Register ic_reg = rax; | |
| 1748 const Register receiver = rcx; | |
| 1749 Label hit; | |
| 1750 Label exception_pending; | |
| 1751 | |
| 1752 __ verify_oop(receiver); | |
| 304 | 1753 __ cmpptr(ic_reg, Address(receiver, oopDesc::klass_offset_in_bytes())); |
| 0 | 1754 __ jcc(Assembler::equal, hit); |
| 1755 | |
| 1756 __ jump(RuntimeAddress(SharedRuntime::get_ic_miss_stub())); | |
| 1757 | |
| 1758 // verified entry must be aligned for code patching. | |
| 1759 // and the first 5 bytes must be in the same cache line | |
| 1760 // if we align at 8 then we will be sure 5 bytes are in the same line | |
| 1761 __ align(8); | |
| 1762 | |
| 1763 __ bind(hit); | |
| 1764 | |
| 1765 int vep_offset = ((intptr_t)__ pc()) - start; | |
| 1766 | |
| 1767 #ifdef COMPILER1 | |
| 1768 if (InlineObjectHash && method->intrinsic_id() == vmIntrinsics::_hashCode) { | |
| 1769 // Object.hashCode can pull the hashCode from the header word | |
| 1770 // instead of doing a full VM transition once it's been computed. | |
| 1771 // Since hashCode is usually polymorphic at call sites we can't do | |
| 1772 // this optimization at the call site without a lot of work. | |
| 1773 Label slowCase; | |
| 1774 Register receiver = rcx; | |
| 1775 Register result = rax; | |
| 304 | 1776 __ movptr(result, Address(receiver, oopDesc::mark_offset_in_bytes())); |
| 0 | 1777 |
| 1778 // check if locked | |
| 304 | 1779 __ testptr(result, markOopDesc::unlocked_value); |
| 0 | 1780 __ jcc (Assembler::zero, slowCase); |
| 1781 | |
| 1782 if (UseBiasedLocking) { | |
| 1783 // Check if biased and fall through to runtime if so | |
| 304 | 1784 __ testptr(result, markOopDesc::biased_lock_bit_in_place); |
| 0 | 1785 __ jcc (Assembler::notZero, slowCase); |
| 1786 } | |
| 1787 | |
| 1788 // get hash | |
| 304 | 1789 __ andptr(result, markOopDesc::hash_mask_in_place); |
| 0 | 1790 // test if hashCode exists |
| 1791 __ jcc (Assembler::zero, slowCase); | |
| 304 | 1792 __ shrptr(result, markOopDesc::hash_shift); |
| 0 | 1793 __ ret(0); |
| 1794 __ bind (slowCase); | |
| 1795 } | |
| 1796 #endif // COMPILER1 | |
| 1797 | |
| 1798 // The instruction at the verified entry point must be 5 bytes or longer | |
| 1799 // because it can be patched on the fly by make_non_entrant. The stack bang | |
| 1800 // instruction fits that requirement. | |
| 1801 | |
| 1802 // Generate stack overflow check | |
| 1803 | |
| 1804 if (UseStackBanging) { | |
| 1805 __ bang_stack_with_offset(StackShadowPages*os::vm_page_size()); | |
| 1806 } else { | |
| 1807 // need a 5 byte instruction to allow MT safe patching to non-entrant | |
| 1808 __ fat_nop(); | |
| 1809 } | |
| 1810 | |
| 1811 // Generate a new frame for the wrapper. | |
| 1812 __ enter(); | |
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1813 // -2 because return address is already present and so is saved rbp |
| 304 | 1814 __ subptr(rsp, stack_size - 2*wordSize); |
| 0 | 1815 |
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1816 // Frame is now completed as far as size and linkage. |
| 0 | 1817 int frame_complete = ((intptr_t)__ pc()) - start; |
| 1818 | |
| 17780 | 1819 if (UseRTMLocking) { |
| 1820 // Abort RTM transaction before calling JNI | |
| 1821 // because critical section will be large and will be | |
| 1822 // aborted anyway. Also nmethod could be deoptimized. | |
| 1823 __ xabort(0); | |
| 1824 } | |
| 1825 | |
| 0 | 1826 // Calculate the difference between rsp and rbp,. We need to know it |
| 1827 // after the native call because on windows Java Natives will pop | |
| 1828 // the arguments and it is painful to do rsp relative addressing | |
| 1829 // in a platform independent way. So after the call we switch to | |
| 1830 // rbp, relative addressing. | |
| 1831 | |
| 1832 int fp_adjustment = stack_size - 2*wordSize; | |
| 1833 | |
| 1834 #ifdef COMPILER2 | |
| 1835 // C2 may leave the stack dirty if not in SSE2+ mode | |
| 1836 if (UseSSE >= 2) { | |
| 1837 __ verify_FPU(0, "c2i transition should have clean FPU stack"); | |
| 1838 } else { | |
| 1839 __ empty_FPU_stack(); | |
| 1840 } | |
| 1841 #endif /* COMPILER2 */ | |
| 1842 | |
| 1843 // Compute the rbp, offset for any slots used after the jni call | |
| 1844 | |
| 1845 int lock_slot_rbp_offset = (lock_slot_offset*VMRegImpl::stack_slot_size) - fp_adjustment; | |
| 1846 | |
| 1847 // We use rdi as a thread pointer because it is callee save and | |
| 1848 // if we load it once it is usable thru the entire wrapper | |
| 1849 const Register thread = rdi; | |
| 1850 | |
| 1851 // We use rsi as the oop handle for the receiver/klass | |
| 1852 // It is callee save so it survives the call to native | |
| 1853 | |
| 1854 const Register oop_handle_reg = rsi; | |
| 1855 | |
| 1856 __ get_thread(thread); | |
| 1857 | |
|
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1858 if (is_critical_native) { |
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1859 check_needs_gc_for_critical_native(masm, thread, stack_slots, total_c_args, total_in_args, |
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1860 oop_handle_offset, oop_maps, in_regs, in_sig_bt); |
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1861 } |
| 0 | 1862 |
| 1863 // | |
| 1864 // We immediately shuffle the arguments so that any vm call we have to | |
| 1865 // make from here on out (sync slow path, jvmti, etc.) we will have | |
| 1866 // captured the oops from our caller and have a valid oopMap for | |
| 1867 // them. | |
| 1868 | |
| 1869 // ----------------- | |
| 1870 // The Grand Shuffle | |
| 1871 // | |
| 1872 // Natives require 1 or 2 extra arguments over the normal ones: the JNIEnv* | |
| 1873 // and, if static, the class mirror instead of a receiver. This pretty much | |
| 1874 // guarantees that register layout will not match (and x86 doesn't use reg | |
| 1875 // parms though amd does). Since the native abi doesn't use register args | |
| 1876 // and the java conventions does we don't have to worry about collisions. | |
| 1877 // All of our moved are reg->stack or stack->stack. | |
| 1878 // We ignore the extra arguments during the shuffle and handle them at the | |
| 1879 // last moment. The shuffle is described by the two calling convention | |
| 1880 // vectors we have in our possession. We simply walk the java vector to | |
| 1881 // get the source locations and the c vector to get the destinations. | |
| 1882 | |
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1883 int c_arg = is_critical_native ? 0 : (method->is_static() ? 2 : 1 ); |
| 0 | 1884 |
| 1885 // Record rsp-based slot for receiver on stack for non-static methods | |
| 1886 int receiver_offset = -1; | |
| 1887 | |
| 1888 // This is a trick. We double the stack slots so we can claim | |
| 1889 // the oops in the caller's frame. Since we are sure to have | |
| 1890 // more args than the caller doubling is enough to make | |
| 1891 // sure we can capture all the incoming oop args from the | |
| 1892 // caller. | |
| 1893 // | |
| 1894 OopMap* map = new OopMap(stack_slots * 2, 0 /* arg_slots*/); | |
| 1895 | |
| 1896 // Mark location of rbp, | |
| 1897 // map->set_callee_saved(VMRegImpl::stack2reg( stack_slots - 2), stack_slots * 2, 0, rbp->as_VMReg()); | |
| 1898 | |
| 1899 // We know that we only have args in at most two integer registers (rcx, rdx). So rax, rbx | |
| 1900 // Are free to temporaries if we have to do stack to steck moves. | |
| 1901 // All inbound args are referenced based on rbp, and all outbound args via rsp. | |
| 1902 | |
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1903 for (int i = 0; i < total_in_args ; i++, c_arg++ ) { |
| 0 | 1904 switch (in_sig_bt[i]) { |
| 1905 case T_ARRAY: | |
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1906 if (is_critical_native) { |
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1907 unpack_array_argument(masm, in_regs[i], in_elem_bt[i], out_regs[c_arg + 1], out_regs[c_arg]); |
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1908 c_arg++; |
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1909 break; |
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1910 } |
| 0 | 1911 case T_OBJECT: |
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1912 assert(!is_critical_native, "no oop arguments"); |
| 0 | 1913 object_move(masm, map, oop_handle_offset, stack_slots, in_regs[i], out_regs[c_arg], |
| 1914 ((i == 0) && (!is_static)), | |
| 1915 &receiver_offset); | |
| 1916 break; | |
| 1917 case T_VOID: | |
| 1918 break; | |
| 1919 | |
| 1920 case T_FLOAT: | |
| 1921 float_move(masm, in_regs[i], out_regs[c_arg]); | |
| 1922 break; | |
| 1923 | |
| 1924 case T_DOUBLE: | |
| 1925 assert( i + 1 < total_in_args && | |
| 1926 in_sig_bt[i + 1] == T_VOID && | |
| 1927 out_sig_bt[c_arg+1] == T_VOID, "bad arg list"); | |
| 1928 double_move(masm, in_regs[i], out_regs[c_arg]); | |
| 1929 break; | |
| 1930 | |
| 1931 case T_LONG : | |
| 1932 long_move(masm, in_regs[i], out_regs[c_arg]); | |
| 1933 break; | |
| 1934 | |
| 1935 case T_ADDRESS: assert(false, "found T_ADDRESS in java args"); | |
| 1936 | |
| 1937 default: | |
| 1938 simple_move32(masm, in_regs[i], out_regs[c_arg]); | |
| 1939 } | |
| 1940 } | |
| 1941 | |
| 1942 // Pre-load a static method's oop into rsi. Used both by locking code and | |
| 1943 // the normal JNI call code. | |
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1944 if (method->is_static() && !is_critical_native) { |
| 0 | 1945 |
| 1946 // load opp into a register | |
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1947 __ movoop(oop_handle_reg, JNIHandles::make_local(method->method_holder()->java_mirror())); |
| 0 | 1948 |
| 1949 // Now handlize the static class mirror it's known not-null. | |
| 304 | 1950 __ movptr(Address(rsp, klass_offset), oop_handle_reg); |
| 0 | 1951 map->set_oop(VMRegImpl::stack2reg(klass_slot_offset)); |
| 1952 | |
| 1953 // Now get the handle | |
| 304 | 1954 __ lea(oop_handle_reg, Address(rsp, klass_offset)); |
| 0 | 1955 // store the klass handle as second argument |
| 304 | 1956 __ movptr(Address(rsp, wordSize), oop_handle_reg); |
| 0 | 1957 } |
| 1958 | |
| 1959 // Change state to native (we save the return address in the thread, since it might not | |
| 1960 // be pushed on the stack when we do a a stack traversal). It is enough that the pc() | |
| 1961 // points into the right code segment. It does not have to be the correct return pc. | |
| 1962 // We use the same pc/oopMap repeatedly when we call out | |
| 1963 | |
| 1964 intptr_t the_pc = (intptr_t) __ pc(); | |
| 1965 oop_maps->add_gc_map(the_pc - start, map); | |
| 1966 | |
| 1967 __ set_last_Java_frame(thread, rsp, noreg, (address)the_pc); | |
| 1968 | |
| 1969 | |
| 1970 // We have all of the arguments setup at this point. We must not touch any register | |
| 1971 // argument registers at this point (what if we save/restore them there are no oop? | |
| 1972 | |
| 1973 { | |
| 1974 SkipIfEqual skip_if(masm, &DTraceMethodProbes, 0); | |
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1975 __ mov_metadata(rax, method()); |
| 0 | 1976 __ call_VM_leaf( |
| 1977 CAST_FROM_FN_PTR(address, SharedRuntime::dtrace_method_entry), | |
| 1978 thread, rax); | |
| 1979 } | |
| 1980 | |
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1981 // RedefineClasses() tracing support for obsolete method entry |
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1982 if (RC_TRACE_IN_RANGE(0x00001000, 0x00002000)) { |
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1983 __ mov_metadata(rax, method()); |
|
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1984 __ call_VM_leaf( |
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1985 CAST_FROM_FN_PTR(address, SharedRuntime::rc_trace_method_entry), |
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1986 thread, rax); |
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1987 } |
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1988 |
| 0 | 1989 // These are register definitions we need for locking/unlocking |
| 1990 const Register swap_reg = rax; // Must use rax, for cmpxchg instruction | |
| 1991 const Register obj_reg = rcx; // Will contain the oop | |
| 1992 const Register lock_reg = rdx; // Address of compiler lock object (BasicLock) | |
| 1993 | |
| 1994 Label slow_path_lock; | |
| 1995 Label lock_done; | |
| 1996 | |
| 1997 // Lock a synchronized method | |
| 1998 if (method->is_synchronized()) { | |
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1999 assert(!is_critical_native, "unhandled"); |
| 0 | 2000 |
| 2001 | |
| 2002 const int mark_word_offset = BasicLock::displaced_header_offset_in_bytes(); | |
| 2003 | |
| 2004 // Get the handle (the 2nd argument) | |
| 304 | 2005 __ movptr(oop_handle_reg, Address(rsp, wordSize)); |
| 0 | 2006 |
| 2007 // Get address of the box | |
| 2008 | |
| 304 | 2009 __ lea(lock_reg, Address(rbp, lock_slot_rbp_offset)); |
| 0 | 2010 |
| 2011 // Load the oop from the handle | |
| 304 | 2012 __ movptr(obj_reg, Address(oop_handle_reg, 0)); |
| 0 | 2013 |
| 2014 if (UseBiasedLocking) { | |
| 2015 // Note that oop_handle_reg is trashed during this call | |
| 2016 __ biased_locking_enter(lock_reg, obj_reg, swap_reg, oop_handle_reg, false, lock_done, &slow_path_lock); | |
| 2017 } | |
| 2018 | |
| 2019 // Load immediate 1 into swap_reg %rax, | |
| 304 | 2020 __ movptr(swap_reg, 1); |
| 0 | 2021 |
| 2022 // Load (object->mark() | 1) into swap_reg %rax, | |
| 304 | 2023 __ orptr(swap_reg, Address(obj_reg, 0)); |
| 0 | 2024 |
| 2025 // Save (object->mark() | 1) into BasicLock's displaced header | |
| 304 | 2026 __ movptr(Address(lock_reg, mark_word_offset), swap_reg); |
| 0 | 2027 |
| 2028 if (os::is_MP()) { | |
| 2029 __ lock(); | |
| 2030 } | |
| 2031 | |
| 2032 // src -> dest iff dest == rax, else rax, <- dest | |
| 2033 // *obj_reg = lock_reg iff *obj_reg == rax, else rax, = *(obj_reg) | |
| 304 | 2034 __ cmpxchgptr(lock_reg, Address(obj_reg, 0)); |
| 0 | 2035 __ jcc(Assembler::equal, lock_done); |
| 2036 | |
| 2037 // Test if the oopMark is an obvious stack pointer, i.e., | |
| 2038 // 1) (mark & 3) == 0, and | |
| 2039 // 2) rsp <= mark < mark + os::pagesize() | |
| 2040 // These 3 tests can be done by evaluating the following | |
| 2041 // expression: ((mark - rsp) & (3 - os::vm_page_size())), | |
| 2042 // assuming both stack pointer and pagesize have their | |
| 2043 // least significant 2 bits clear. | |
| 2044 // NOTE: the oopMark is in swap_reg %rax, as the result of cmpxchg | |
| 2045 | |
| 304 | 2046 __ subptr(swap_reg, rsp); |
| 2047 __ andptr(swap_reg, 3 - os::vm_page_size()); | |
| 0 | 2048 |
| 2049 // Save the test result, for recursive case, the result is zero | |
| 304 | 2050 __ movptr(Address(lock_reg, mark_word_offset), swap_reg); |
| 0 | 2051 __ jcc(Assembler::notEqual, slow_path_lock); |
| 2052 // Slow path will re-enter here | |
| 2053 __ bind(lock_done); | |
| 2054 | |
| 2055 if (UseBiasedLocking) { | |
| 2056 // Re-fetch oop_handle_reg as we trashed it above | |
| 304 | 2057 __ movptr(oop_handle_reg, Address(rsp, wordSize)); |
| 0 | 2058 } |
| 2059 } | |
| 2060 | |
| 2061 | |
| 2062 // Finally just about ready to make the JNI call | |
| 2063 | |
| 2064 | |
| 2065 // get JNIEnv* which is first argument to native | |
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2066 if (!is_critical_native) { |
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2067 __ lea(rdx, Address(thread, in_bytes(JavaThread::jni_environment_offset()))); |
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2068 __ movptr(Address(rsp, 0), rdx); |
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2069 } |
| 0 | 2070 |
| 2071 // Now set thread in native | |
| 2072 __ movl(Address(thread, JavaThread::thread_state_offset()), _thread_in_native); | |
| 2073 | |
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2074 __ call(RuntimeAddress(native_func)); |
| 0 | 2075 |
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2076 // Verify or restore cpu control state after JNI call |
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2077 __ restore_cpu_control_state_after_jni(); |
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2078 |
| 0 | 2079 // WARNING - on Windows Java Natives use pascal calling convention and pop the |
| 2080 // arguments off of the stack. We could just re-adjust the stack pointer here | |
| 2081 // and continue to do SP relative addressing but we instead switch to FP | |
| 2082 // relative addressing. | |
| 2083 | |
| 2084 // Unpack native results. | |
| 2085 switch (ret_type) { | |
| 2086 case T_BOOLEAN: __ c2bool(rax); break; | |
| 304 | 2087 case T_CHAR : __ andptr(rax, 0xFFFF); break; |
| 0 | 2088 case T_BYTE : __ sign_extend_byte (rax); break; |
| 2089 case T_SHORT : __ sign_extend_short(rax); break; | |
| 2090 case T_INT : /* nothing to do */ break; | |
| 2091 case T_DOUBLE : | |
| 2092 case T_FLOAT : | |
| 2093 // Result is in st0 we'll save as needed | |
| 2094 break; | |
| 2095 case T_ARRAY: // Really a handle | |
| 2096 case T_OBJECT: // Really a handle | |
| 2097 break; // can't de-handlize until after safepoint check | |
| 2098 case T_VOID: break; | |
| 2099 case T_LONG: break; | |
| 2100 default : ShouldNotReachHere(); | |
| 2101 } | |
| 2102 | |
| 2103 // Switch thread to "native transition" state before reading the synchronization state. | |
| 2104 // This additional state is necessary because reading and testing the synchronization | |
| 2105 // state is not atomic w.r.t. GC, as this scenario demonstrates: | |
| 2106 // Java thread A, in _thread_in_native state, loads _not_synchronized and is preempted. | |
| 2107 // VM thread changes sync state to synchronizing and suspends threads for GC. | |
| 2108 // Thread A is resumed to finish this native method, but doesn't block here since it | |
| 2109 // didn't see any synchronization is progress, and escapes. | |
| 2110 __ movl(Address(thread, JavaThread::thread_state_offset()), _thread_in_native_trans); | |
| 2111 | |
| 2112 if(os::is_MP()) { | |
| 2113 if (UseMembar) { | |
| 304 | 2114 // Force this write out before the read below |
| 2115 __ membar(Assembler::Membar_mask_bits( | |
| 2116 Assembler::LoadLoad | Assembler::LoadStore | | |
| 2117 Assembler::StoreLoad | Assembler::StoreStore)); | |
| 0 | 2118 } else { |
| 2119 // Write serialization page so VM thread can do a pseudo remote membar. | |
| 2120 // We use the current thread pointer to calculate a thread specific | |
| 2121 // offset to write to within the page. This minimizes bus traffic | |
| 2122 // due to cache line collision. | |
| 2123 __ serialize_memory(thread, rcx); | |
| 2124 } | |
| 2125 } | |
| 2126 | |
| 2127 if (AlwaysRestoreFPU) { | |
| 2128 // Make sure the control word is correct. | |
| 2129 __ fldcw(ExternalAddress(StubRoutines::addr_fpu_cntrl_wrd_std())); | |
| 2130 } | |
| 2131 | |
|
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2132 Label after_transition; |
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2133 |
| 0 | 2134 // check for safepoint operation in progress and/or pending suspend requests |
| 2135 { Label Continue; | |
| 2136 | |
| 2137 __ cmp32(ExternalAddress((address)SafepointSynchronize::address_of_state()), | |
| 2138 SafepointSynchronize::_not_synchronized); | |
| 2139 | |
| 2140 Label L; | |
| 2141 __ jcc(Assembler::notEqual, L); | |
| 2142 __ cmpl(Address(thread, JavaThread::suspend_flags_offset()), 0); | |
| 2143 __ jcc(Assembler::equal, Continue); | |
| 2144 __ bind(L); | |
| 2145 | |
| 2146 // Don't use call_VM as it will see a possible pending exception and forward it | |
| 2147 // and never return here preventing us from clearing _last_native_pc down below. | |
| 2148 // Also can't use call_VM_leaf either as it will check to see if rsi & rdi are | |
| 2149 // preserved and correspond to the bcp/locals pointers. So we do a runtime call | |
| 2150 // by hand. | |
| 2151 // | |
| 2152 save_native_result(masm, ret_type, stack_slots); | |
| 304 | 2153 __ push(thread); |
|
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2154 if (!is_critical_native) { |
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2155 __ call(RuntimeAddress(CAST_FROM_FN_PTR(address, |
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2156 JavaThread::check_special_condition_for_native_trans))); |
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2157 } else { |
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2158 __ call(RuntimeAddress(CAST_FROM_FN_PTR(address, |
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2159 JavaThread::check_special_condition_for_native_trans_and_transition))); |
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2160 } |
| 0 | 2161 __ increment(rsp, wordSize); |
| 2162 // Restore any method result value | |
| 2163 restore_native_result(masm, ret_type, stack_slots); | |
| 2164 | |
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2165 if (is_critical_native) { |
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2166 // The call above performed the transition to thread_in_Java so |
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2167 // skip the transition logic below. |
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2168 __ jmpb(after_transition); |
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2169 } |
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2170 |
| 0 | 2171 __ bind(Continue); |
| 2172 } | |
| 2173 | |
| 2174 // change thread state | |
| 2175 __ movl(Address(thread, JavaThread::thread_state_offset()), _thread_in_Java); | |
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2176 __ bind(after_transition); |
| 0 | 2177 |
| 2178 Label reguard; | |
| 2179 Label reguard_done; | |
| 2180 __ cmpl(Address(thread, JavaThread::stack_guard_state_offset()), JavaThread::stack_guard_yellow_disabled); | |
| 2181 __ jcc(Assembler::equal, reguard); | |
| 2182 | |
| 2183 // slow path reguard re-enters here | |
| 2184 __ bind(reguard_done); | |
| 2185 | |
| 2186 // Handle possible exception (will unlock if necessary) | |
| 2187 | |
| 2188 // native result if any is live | |
| 2189 | |
| 2190 // Unlock | |
| 2191 Label slow_path_unlock; | |
| 2192 Label unlock_done; | |
| 2193 if (method->is_synchronized()) { | |
| 2194 | |
| 2195 Label done; | |
| 2196 | |
| 2197 // Get locked oop from the handle we passed to jni | |
| 304 | 2198 __ movptr(obj_reg, Address(oop_handle_reg, 0)); |
| 0 | 2199 |
| 2200 if (UseBiasedLocking) { | |
| 2201 __ biased_locking_exit(obj_reg, rbx, done); | |
| 2202 } | |
| 2203 | |
| 2204 // Simple recursive lock? | |
| 2205 | |
| 304 | 2206 __ cmpptr(Address(rbp, lock_slot_rbp_offset), (int32_t)NULL_WORD); |
| 0 | 2207 __ jcc(Assembler::equal, done); |
| 2208 | |
| 2209 // Must save rax, if if it is live now because cmpxchg must use it | |
| 2210 if (ret_type != T_FLOAT && ret_type != T_DOUBLE && ret_type != T_VOID) { | |
| 2211 save_native_result(masm, ret_type, stack_slots); | |
| 2212 } | |
| 2213 | |
| 2214 // get old displaced header | |
| 304 | 2215 __ movptr(rbx, Address(rbp, lock_slot_rbp_offset)); |
| 0 | 2216 |
| 2217 // get address of the stack lock | |
| 304 | 2218 __ lea(rax, Address(rbp, lock_slot_rbp_offset)); |
| 0 | 2219 |
| 2220 // Atomic swap old header if oop still contains the stack lock | |
| 2221 if (os::is_MP()) { | |
| 2222 __ lock(); | |
| 2223 } | |
| 2224 | |
| 2225 // src -> dest iff dest == rax, else rax, <- dest | |
| 2226 // *obj_reg = rbx, iff *obj_reg == rax, else rax, = *(obj_reg) | |
| 304 | 2227 __ cmpxchgptr(rbx, Address(obj_reg, 0)); |
| 0 | 2228 __ jcc(Assembler::notEqual, slow_path_unlock); |
| 2229 | |
| 2230 // slow path re-enters here | |
| 2231 __ bind(unlock_done); | |
| 2232 if (ret_type != T_FLOAT && ret_type != T_DOUBLE && ret_type != T_VOID) { | |
| 2233 restore_native_result(masm, ret_type, stack_slots); | |
| 2234 } | |
| 2235 | |
| 2236 __ bind(done); | |
| 2237 | |
| 2238 } | |
| 2239 | |
| 2240 { | |
| 2241 SkipIfEqual skip_if(masm, &DTraceMethodProbes, 0); | |
| 2242 // Tell dtrace about this method exit | |
| 2243 save_native_result(masm, ret_type, stack_slots); | |
|
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2244 __ mov_metadata(rax, method()); |
| 0 | 2245 __ call_VM_leaf( |
| 2246 CAST_FROM_FN_PTR(address, SharedRuntime::dtrace_method_exit), | |
| 2247 thread, rax); | |
| 2248 restore_native_result(masm, ret_type, stack_slots); | |
| 2249 } | |
| 2250 | |
| 2251 // We can finally stop using that last_Java_frame we setup ages ago | |
| 2252 | |
| 2253 __ reset_last_Java_frame(thread, false, true); | |
| 2254 | |
| 2255 // Unpack oop result | |
| 2256 if (ret_type == T_OBJECT || ret_type == T_ARRAY) { | |
| 2257 Label L; | |
| 304 | 2258 __ cmpptr(rax, (int32_t)NULL_WORD); |
| 0 | 2259 __ jcc(Assembler::equal, L); |
| 304 | 2260 __ movptr(rax, Address(rax, 0)); |
| 0 | 2261 __ bind(L); |
| 2262 __ verify_oop(rax); | |
| 2263 } | |
| 2264 | |
|
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|
2265 if (!is_critical_native) { |
|
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|
2266 // reset handle block |
|
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|
2267 __ movptr(rcx, Address(thread, JavaThread::active_handles_offset())); |
|
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2268 __ movl(Address(rcx, JNIHandleBlock::top_offset_in_bytes()), NULL_WORD); |
|
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2269 |
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|
2270 // Any exception pending? |
|
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2271 __ cmpptr(Address(thread, in_bytes(Thread::pending_exception_offset())), (int32_t)NULL_WORD); |
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2272 __ jcc(Assembler::notEqual, exception_pending); |
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|
2273 } |
| 0 | 2274 |
| 2275 // no exception, we're almost done | |
| 2276 | |
| 2277 // check that only result value is on FPU stack | |
| 2278 __ verify_FPU(ret_type == T_FLOAT || ret_type == T_DOUBLE ? 1 : 0, "native_wrapper normal exit"); | |
| 2279 | |
| 2280 // Fixup floating pointer results so that result looks like a return from a compiled method | |
| 2281 if (ret_type == T_FLOAT) { | |
| 2282 if (UseSSE >= 1) { | |
| 2283 // Pop st0 and store as float and reload into xmm register | |
| 2284 __ fstp_s(Address(rbp, -4)); | |
| 2285 __ movflt(xmm0, Address(rbp, -4)); | |
| 2286 } | |
| 2287 } else if (ret_type == T_DOUBLE) { | |
| 2288 if (UseSSE >= 2) { | |
| 2289 // Pop st0 and store as double and reload into xmm register | |
| 2290 __ fstp_d(Address(rbp, -8)); | |
| 2291 __ movdbl(xmm0, Address(rbp, -8)); | |
| 2292 } | |
| 2293 } | |
| 2294 | |
| 2295 // Return | |
| 2296 | |
| 2297 __ leave(); | |
| 2298 __ ret(0); | |
| 2299 | |
| 2300 // Unexpected paths are out of line and go here | |
| 2301 | |
| 2302 // Slow path locking & unlocking | |
| 2303 if (method->is_synchronized()) { | |
| 2304 | |
| 2305 // BEGIN Slow path lock | |
| 2306 | |
| 2307 __ bind(slow_path_lock); | |
| 2308 | |
| 2309 // has last_Java_frame setup. No exceptions so do vanilla call not call_VM | |
| 2310 // args are (oop obj, BasicLock* lock, JavaThread* thread) | |
| 304 | 2311 __ push(thread); |
| 2312 __ push(lock_reg); | |
| 2313 __ push(obj_reg); | |
| 0 | 2314 __ call(RuntimeAddress(CAST_FROM_FN_PTR(address, SharedRuntime::complete_monitor_locking_C))); |
| 304 | 2315 __ addptr(rsp, 3*wordSize); |
| 0 | 2316 |
| 2317 #ifdef ASSERT | |
| 2318 { Label L; | |
| 304 | 2319 __ cmpptr(Address(thread, in_bytes(Thread::pending_exception_offset())), (int)NULL_WORD); |
| 0 | 2320 __ jcc(Assembler::equal, L); |
| 2321 __ stop("no pending exception allowed on exit from monitorenter"); | |
| 2322 __ bind(L); | |
| 2323 } | |
| 2324 #endif | |
| 2325 __ jmp(lock_done); | |
| 2326 | |
| 2327 // END Slow path lock | |
| 2328 | |
| 2329 // BEGIN Slow path unlock | |
| 2330 __ bind(slow_path_unlock); | |
| 2331 | |
| 2332 // Slow path unlock | |
| 2333 | |
| 2334 if (ret_type == T_FLOAT || ret_type == T_DOUBLE ) { | |
| 2335 save_native_result(masm, ret_type, stack_slots); | |
| 2336 } | |
| 2337 // Save pending exception around call to VM (which contains an EXCEPTION_MARK) | |
| 2338 | |
| 304 | 2339 __ pushptr(Address(thread, in_bytes(Thread::pending_exception_offset()))); |
|
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|
2340 __ movptr(Address(thread, in_bytes(Thread::pending_exception_offset())), NULL_WORD); |
| 0 | 2341 |
| 2342 | |
| 2343 // should be a peal | |
| 2344 // +wordSize because of the push above | |
| 304 | 2345 __ lea(rax, Address(rbp, lock_slot_rbp_offset)); |
| 2346 __ push(rax); | |
| 2347 | |
| 2348 __ push(obj_reg); | |
| 0 | 2349 __ call(RuntimeAddress(CAST_FROM_FN_PTR(address, SharedRuntime::complete_monitor_unlocking_C))); |
| 304 | 2350 __ addptr(rsp, 2*wordSize); |
| 0 | 2351 #ifdef ASSERT |
| 2352 { | |
| 2353 Label L; | |
| 304 | 2354 __ cmpptr(Address(thread, in_bytes(Thread::pending_exception_offset())), (int32_t)NULL_WORD); |
| 0 | 2355 __ jcc(Assembler::equal, L); |
| 2356 __ stop("no pending exception allowed on exit complete_monitor_unlocking_C"); | |
| 2357 __ bind(L); | |
| 2358 } | |
| 2359 #endif /* ASSERT */ | |
| 2360 | |
| 304 | 2361 __ popptr(Address(thread, in_bytes(Thread::pending_exception_offset()))); |
| 0 | 2362 |
| 2363 if (ret_type == T_FLOAT || ret_type == T_DOUBLE ) { | |
| 2364 restore_native_result(masm, ret_type, stack_slots); | |
| 2365 } | |
| 2366 __ jmp(unlock_done); | |
| 2367 // END Slow path unlock | |
| 2368 | |
| 2369 } | |
| 2370 | |
| 2371 // SLOW PATH Reguard the stack if needed | |
| 2372 | |
| 2373 __ bind(reguard); | |
| 2374 save_native_result(masm, ret_type, stack_slots); | |
| 2375 { | |
| 2376 __ call(RuntimeAddress(CAST_FROM_FN_PTR(address, SharedRuntime::reguard_yellow_pages))); | |
| 2377 } | |
| 2378 restore_native_result(masm, ret_type, stack_slots); | |
| 2379 __ jmp(reguard_done); | |
| 2380 | |
| 2381 | |
| 2382 // BEGIN EXCEPTION PROCESSING | |
| 2383 | |
|
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|
2384 if (!is_critical_native) { |
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|
2385 // Forward the exception |
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|
2386 __ bind(exception_pending); |
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|
2387 |
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|
2388 // remove possible return value from FPU register stack |
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|
2389 __ empty_FPU_stack(); |
|
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|
2390 |
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|
2391 // pop our frame |
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|
2392 __ leave(); |
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|
2393 // and forward the exception |
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|
2394 __ jump(RuntimeAddress(StubRoutines::forward_exception_entry())); |
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|
2395 } |
| 0 | 2396 |
| 2397 __ flush(); | |
| 2398 | |
| 2399 nmethod *nm = nmethod::new_native_nmethod(method, | |
|
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|
2400 compile_id, |
| 0 | 2401 masm->code(), |
| 2402 vep_offset, | |
| 2403 frame_complete, | |
| 2404 stack_slots / VMRegImpl::slots_per_word, | |
| 2405 (is_static ? in_ByteSize(klass_offset) : in_ByteSize(receiver_offset)), | |
| 2406 in_ByteSize(lock_slot_offset*VMRegImpl::stack_slot_size), | |
| 2407 oop_maps); | |
|
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|
2408 |
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|
2409 if (is_critical_native) { |
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|
2410 nm->set_lazy_critical_native(true); |
|
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|
2411 } |
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|
2412 |
| 0 | 2413 return nm; |
| 2414 | |
| 2415 } | |
| 2416 | |
|
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2417 #ifdef HAVE_DTRACE_H |
|
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2418 // --------------------------------------------------------------------------- |
|
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2419 // Generate a dtrace nmethod for a given signature. The method takes arguments |
|
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2420 // in the Java compiled code convention, marshals them to the native |
|
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|
2421 // abi and then leaves nops at the position you would expect to call a native |
|
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2422 // function. When the probe is enabled the nops are replaced with a trap |
|
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2423 // instruction that dtrace inserts and the trace will cause a notification |
|
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|
2424 // to dtrace. |
|
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|
2425 // |
|
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2426 // The probes are only able to take primitive types and java/lang/String as |
|
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|
2427 // arguments. No other java types are allowed. Strings are converted to utf8 |
|
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|
2428 // strings so that from dtrace point of view java strings are converted to C |
|
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|
2429 // strings. There is an arbitrary fixed limit on the total space that a method |
|
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|
2430 // can use for converting the strings. (256 chars per string in the signature). |
|
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|
2431 // So any java string larger then this is truncated. |
|
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|
2432 |
|
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|
2433 nmethod *SharedRuntime::generate_dtrace_nmethod( |
|
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|
2434 MacroAssembler *masm, methodHandle method) { |
|
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|
2435 |
|
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|
2436 // generate_dtrace_nmethod is guarded by a mutex so we are sure to |
|
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|
2437 // be single threaded in this method. |
|
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|
2438 assert(AdapterHandlerLibrary_lock->owned_by_self(), "must be"); |
|
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|
2439 |
|
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|
2440 // Fill in the signature array, for the calling-convention call. |
|
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2441 int total_args_passed = method->size_of_parameters(); |
|
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2442 |
|
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|
2443 BasicType* in_sig_bt = NEW_RESOURCE_ARRAY(BasicType, total_args_passed); |
|
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2444 VMRegPair *in_regs = NEW_RESOURCE_ARRAY(VMRegPair, total_args_passed); |
|
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2445 |
|
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|
2446 // The signature we are going to use for the trap that dtrace will see |
|
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2447 // java/lang/String is converted. We drop "this" and any other object |
|
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|
2448 // is converted to NULL. (A one-slot java/lang/Long object reference |
|
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2449 // is converted to a two-slot long, which is why we double the allocation). |
|
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|
2450 BasicType* out_sig_bt = NEW_RESOURCE_ARRAY(BasicType, total_args_passed * 2); |
|
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|
2451 VMRegPair* out_regs = NEW_RESOURCE_ARRAY(VMRegPair, total_args_passed * 2); |
|
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2452 |
|
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|
2453 int i=0; |
|
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2454 int total_strings = 0; |
|
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2455 int first_arg_to_pass = 0; |
|
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2456 int total_c_args = 0; |
|
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|
2457 |
|
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|
2458 if( !method->is_static() ) { // Pass in receiver first |
|
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|
2459 in_sig_bt[i++] = T_OBJECT; |
|
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|
2460 first_arg_to_pass = 1; |
|
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|
2461 } |
|
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|
2462 |
|
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|
2463 // We need to convert the java args to where a native (non-jni) function |
|
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|
2464 // would expect them. To figure out where they go we convert the java |
|
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|
2465 // signature to a C signature. |
|
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2466 |
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2467 SignatureStream ss(method->signature()); |
|
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2468 for ( ; !ss.at_return_type(); ss.next()) { |
|
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2469 BasicType bt = ss.type(); |
|
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2470 in_sig_bt[i++] = bt; // Collect remaining bits of signature |
|
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2471 out_sig_bt[total_c_args++] = bt; |
|
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|
2472 if( bt == T_OBJECT) { |
|
2177
3582bf76420e
6990754: Use native memory and reference counting to implement SymbolTable
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|
2473 Symbol* s = ss.as_symbol_or_null(); // symbol is created |
|
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2474 if (s == vmSymbols::java_lang_String()) { |
|
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2475 total_strings++; |
|
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|
2476 out_sig_bt[total_c_args-1] = T_ADDRESS; |
|
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2477 } else if (s == vmSymbols::java_lang_Boolean() || |
|
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2478 s == vmSymbols::java_lang_Character() || |
|
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2479 s == vmSymbols::java_lang_Byte() || |
|
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2480 s == vmSymbols::java_lang_Short() || |
|
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2481 s == vmSymbols::java_lang_Integer() || |
|
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2482 s == vmSymbols::java_lang_Float()) { |
|
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|
2483 out_sig_bt[total_c_args-1] = T_INT; |
|
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2484 } else if (s == vmSymbols::java_lang_Long() || |
|
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2485 s == vmSymbols::java_lang_Double()) { |
|
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|
2486 out_sig_bt[total_c_args-1] = T_LONG; |
|
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2487 out_sig_bt[total_c_args++] = T_VOID; |
|
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|
2488 } |
|
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|
2489 } else if ( bt == T_LONG || bt == T_DOUBLE ) { |
|
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|
2490 in_sig_bt[i++] = T_VOID; // Longs & doubles take 2 Java slots |
|
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2491 out_sig_bt[total_c_args++] = T_VOID; |
|
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|
2492 } |
|
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|
2493 } |
|
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|
2494 |
|
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|
2495 assert(i==total_args_passed, "validly parsed signature"); |
|
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|
2496 |
|
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|
2497 // Now get the compiled-Java layout as input arguments |
|
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|
2498 int comp_args_on_stack; |
|
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2499 comp_args_on_stack = SharedRuntime::java_calling_convention( |
|
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|
2500 in_sig_bt, in_regs, total_args_passed, false); |
|
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2501 |
|
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|
2502 // Now figure out where the args must be stored and how much stack space |
|
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2503 // they require (neglecting out_preserve_stack_slots). |
|
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2504 |
|
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|
2505 int out_arg_slots; |
|
14416
6a936747b569
8024344: PPC64 (part 112): C argument in register AND stack slot.
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|
2506 out_arg_slots = c_calling_convention(out_sig_bt, out_regs, NULL, total_c_args); |
|
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2507 |
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|
2508 // Calculate the total number of stack slots we will need. |
|
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2509 |
|
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|
2510 // First count the abi requirement plus all of the outgoing args |
|
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2511 int stack_slots = SharedRuntime::out_preserve_stack_slots() + out_arg_slots; |
|
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2512 |
|
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|
2513 // Now space for the string(s) we must convert |
|
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2514 |
|
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2515 int* string_locs = NEW_RESOURCE_ARRAY(int, total_strings + 1); |
|
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2516 for (i = 0; i < total_strings ; i++) { |
|
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2517 string_locs[i] = stack_slots; |
|
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2518 stack_slots += max_dtrace_string_size / VMRegImpl::stack_slot_size; |
|
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2519 } |
|
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|
2520 |
|
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2521 // + 2 for return address (which we own) and saved rbp, |
|
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2522 |
|
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2523 stack_slots += 2; |
|
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2524 |
|
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|
2525 // Ok The space we have allocated will look like: |
|
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|
2526 // |
|
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|
2527 // |
|
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|
2528 // FP-> | | |
|
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|
2529 // |---------------------| |
|
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2530 // | string[n] | |
|
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2531 // |---------------------| <- string_locs[n] |
|
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2532 // | string[n-1] | |
|
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|
2533 // |---------------------| <- string_locs[n-1] |
|
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2534 // | ... | |
|
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2535 // | ... | |
|
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|
2536 // |---------------------| <- string_locs[1] |
|
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2537 // | string[0] | |
|
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|
2538 // |---------------------| <- string_locs[0] |
|
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|
2539 // | outbound memory | |
|
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2540 // | based arguments | |
|
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2541 // | | |
|
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|
2542 // |---------------------| |
|
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2543 // | | |
|
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|
2544 // SP-> | out_preserved_slots | |
|
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|
2545 // |
|
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|
2546 // |
|
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|
2547 |
|
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|
2548 // Now compute actual number of stack words we need rounding to make |
|
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2549 // stack properly aligned. |
|
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|
2550 stack_slots = round_to(stack_slots, 2 * VMRegImpl::slots_per_word); |
|
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2551 |
|
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|
2552 int stack_size = stack_slots * VMRegImpl::stack_slot_size; |
|
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2553 |
|
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|
2554 intptr_t start = (intptr_t)__ pc(); |
|
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2555 |
|
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|
2556 // First thing make an ic check to see if we should even be here |
|
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|
2557 |
|
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|
2558 // We are free to use all registers as temps without saving them and |
|
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|
2559 // restoring them except rbp. rbp, is the only callee save register |
|
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|
2560 // as far as the interpreter and the compiler(s) are concerned. |
|
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|
2561 |
|
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|
2562 const Register ic_reg = rax; |
|
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|
2563 const Register receiver = rcx; |
|
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|
2564 Label hit; |
|
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|
2565 Label exception_pending; |
|
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|
2566 |
|
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|
2567 |
|
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|
2568 __ verify_oop(receiver); |
|
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|
2569 __ cmpl(ic_reg, Address(receiver, oopDesc::klass_offset_in_bytes())); |
|
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|
2570 __ jcc(Assembler::equal, hit); |
|
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|
2571 |
|
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|
2572 __ jump(RuntimeAddress(SharedRuntime::get_ic_miss_stub())); |
|
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2573 |
|
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|
2574 // verified entry must be aligned for code patching. |
|
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|
2575 // and the first 5 bytes must be in the same cache line |
|
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|
2576 // if we align at 8 then we will be sure 5 bytes are in the same line |
|
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|
2577 __ align(8); |
|
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|
2578 |
|
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|
2579 __ bind(hit); |
|
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|
2580 |
|
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6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
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0
diff
changeset
|
2581 int vep_offset = ((intptr_t)__ pc()) - start; |
|
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
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0
diff
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|
2582 |
|
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
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0
diff
changeset
|
2583 |
|
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
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0
diff
changeset
|
2584 // The instruction at the verified entry point must be 5 bytes or longer |
|
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
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0
diff
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|
2585 // because it can be patched on the fly by make_non_entrant. The stack bang |
|
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
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0
diff
changeset
|
2586 // instruction fits that requirement. |
|
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
changeset
|
2587 |
|
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
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0
diff
changeset
|
2588 // Generate stack overflow check |
|
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
changeset
|
2589 |
|
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
changeset
|
2590 |
|
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
changeset
|
2591 if (UseStackBanging) { |
|
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
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|
2592 if (stack_size <= StackShadowPages*os::vm_page_size()) { |
|
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
changeset
|
2593 __ bang_stack_with_offset(StackShadowPages*os::vm_page_size()); |
|
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
changeset
|
2594 } else { |
|
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
changeset
|
2595 __ movl(rax, stack_size); |
|
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
changeset
|
2596 __ bang_stack_size(rax, rbx); |
|
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
changeset
|
2597 } |
|
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
changeset
|
2598 } else { |
|
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
changeset
|
2599 // need a 5 byte instruction to allow MT safe patching to non-entrant |
|
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
changeset
|
2600 __ fat_nop(); |
|
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
changeset
|
2601 } |
|
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
changeset
|
2602 |
|
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
changeset
|
2603 assert(((int)__ pc() - start - vep_offset) >= 5, |
|
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
changeset
|
2604 "valid size for make_non_entrant"); |
|
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
changeset
|
2605 |
|
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
changeset
|
2606 // Generate a new frame for the wrapper. |
|
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
changeset
|
2607 __ enter(); |
|
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
changeset
|
2608 |
|
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
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|
2609 // -2 because return address is already present and so is saved rbp, |
|
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
changeset
|
2610 if (stack_size - 2*wordSize != 0) { |
|
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
changeset
|
2611 __ subl(rsp, stack_size - 2*wordSize); |
|
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
changeset
|
2612 } |
|
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
changeset
|
2613 |
|
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
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|
2614 // Frame is now completed as far a size and linkage. |
|
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
changeset
|
2615 |
|
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
changeset
|
2616 int frame_complete = ((intptr_t)__ pc()) - start; |
|
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
changeset
|
2617 |
|
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
changeset
|
2618 // First thing we do store all the args as if we are doing the call. |
|
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
changeset
|
2619 // Since the C calling convention is stack based that ensures that |
|
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
changeset
|
2620 // all the Java register args are stored before we need to convert any |
|
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
changeset
|
2621 // string we might have. |
|
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
changeset
|
2622 |
|
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
changeset
|
2623 int sid = 0; |
|
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
changeset
|
2624 int c_arg, j_arg; |
|
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
changeset
|
2625 int string_reg = 0; |
|
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
changeset
|
2626 |
|
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
changeset
|
2627 for (j_arg = first_arg_to_pass, c_arg = 0 ; |
|
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
changeset
|
2628 j_arg < total_args_passed ; j_arg++, c_arg++ ) { |
|
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
changeset
|
2629 |
|
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
changeset
|
2630 VMRegPair src = in_regs[j_arg]; |
|
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
changeset
|
2631 VMRegPair dst = out_regs[c_arg]; |
|
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
changeset
|
2632 assert(dst.first()->is_stack() || in_sig_bt[j_arg] == T_VOID, |
|
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
changeset
|
2633 "stack based abi assumed"); |
|
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
changeset
|
2634 |
|
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
changeset
|
2635 switch (in_sig_bt[j_arg]) { |
|
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
changeset
|
2636 |
|
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
changeset
|
2637 case T_ARRAY: |
|
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
changeset
|
2638 case T_OBJECT: |
|
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
changeset
|
2639 if (out_sig_bt[c_arg] == T_ADDRESS) { |
|
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
changeset
|
2640 // Any register based arg for a java string after the first |
|
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
changeset
|
2641 // will be destroyed by the call to get_utf so we store |
|
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
changeset
|
2642 // the original value in the location the utf string address |
|
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
changeset
|
2643 // will eventually be stored. |
|
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
changeset
|
2644 if (src.first()->is_reg()) { |
|
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
changeset
|
2645 if (string_reg++ != 0) { |
|
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
changeset
|
2646 simple_move32(masm, src, dst); |
|
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
changeset
|
2647 } |
|
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
changeset
|
2648 } |
|
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
changeset
|
2649 } else if (out_sig_bt[c_arg] == T_INT || out_sig_bt[c_arg] == T_LONG) { |
|
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
changeset
|
2650 // need to unbox a one-word value |
|
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
changeset
|
2651 Register in_reg = rax; |
|
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
changeset
|
2652 if ( src.first()->is_reg() ) { |
|
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
changeset
|
2653 in_reg = src.first()->as_Register(); |
|
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
changeset
|
2654 } else { |
|
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
changeset
|
2655 simple_move32(masm, src, in_reg->as_VMReg()); |
|
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
changeset
|
2656 } |
|
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
changeset
|
2657 Label skipUnbox; |
|
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
changeset
|
2658 __ movl(Address(rsp, reg2offset_out(dst.first())), NULL_WORD); |
|
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
changeset
|
2659 if ( out_sig_bt[c_arg] == T_LONG ) { |
|
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
changeset
|
2660 __ movl(Address(rsp, reg2offset_out(dst.second())), NULL_WORD); |
|
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
changeset
|
2661 } |
|
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
changeset
|
2662 __ testl(in_reg, in_reg); |
|
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
changeset
|
2663 __ jcc(Assembler::zero, skipUnbox); |
|
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
changeset
|
2664 assert(dst.first()->is_stack() && |
|
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
changeset
|
2665 (!dst.second()->is_valid() || dst.second()->is_stack()), |
|
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
changeset
|
2666 "value(s) must go into stack slots"); |
|
165
437d03ea40b1
6703888: Compressed Oops: use the 32-bits gap after klass in a object
kvn
parents:
116
diff
changeset
|
2667 |
|
437d03ea40b1
6703888: Compressed Oops: use the 32-bits gap after klass in a object
kvn
parents:
116
diff
changeset
|
2668 BasicType bt = out_sig_bt[c_arg]; |
|
437d03ea40b1
6703888: Compressed Oops: use the 32-bits gap after klass in a object
kvn
parents:
116
diff
changeset
|
2669 int box_offset = java_lang_boxing_object::value_offset_in_bytes(bt); |
|
437d03ea40b1
6703888: Compressed Oops: use the 32-bits gap after klass in a object
kvn
parents:
116
diff
changeset
|
2670 if ( bt == T_LONG ) { |
|
116
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
changeset
|
2671 __ movl(rbx, Address(in_reg, |
|
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
changeset
|
2672 box_offset + VMRegImpl::stack_slot_size)); |
|
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
changeset
|
2673 __ movl(Address(rsp, reg2offset_out(dst.second())), rbx); |
|
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
changeset
|
2674 } |
|
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
changeset
|
2675 __ movl(in_reg, Address(in_reg, box_offset)); |
|
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
changeset
|
2676 __ movl(Address(rsp, reg2offset_out(dst.first())), in_reg); |
|
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
changeset
|
2677 __ bind(skipUnbox); |
|
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
changeset
|
2678 } else { |
|
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
changeset
|
2679 // Convert the arg to NULL |
|
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
changeset
|
2680 __ movl(Address(rsp, reg2offset_out(dst.first())), NULL_WORD); |
|
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
changeset
|
2681 } |
|
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
changeset
|
2682 if (out_sig_bt[c_arg] == T_LONG) { |
|
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
changeset
|
2683 assert(out_sig_bt[c_arg+1] == T_VOID, "must be"); |
|
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
changeset
|
2684 ++c_arg; // Move over the T_VOID To keep the loop indices in sync |
|
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
changeset
|
2685 } |
|
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
changeset
|
2686 break; |
|
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
changeset
|
2687 |
|
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
changeset
|
2688 case T_VOID: |
|
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
changeset
|
2689 break; |
|
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
changeset
|
2690 |
|
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
changeset
|
2691 case T_FLOAT: |
|
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
changeset
|
2692 float_move(masm, src, dst); |
|
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
changeset
|
2693 break; |
|
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
0
diff
changeset
|
2694 |
|
018d5b58dd4f
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2695 case T_DOUBLE: |
|
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2696 assert( j_arg + 1 < total_args_passed && |
|
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2697 in_sig_bt[j_arg + 1] == T_VOID, "bad arg list"); |
|
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2698 double_move(masm, src, dst); |
|
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2699 break; |
|
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|
2700 |
|
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2701 case T_LONG : |
|
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2702 long_move(masm, src, dst); |
|
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2703 break; |
|
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|
2704 |
|
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|
2705 case T_ADDRESS: assert(false, "found T_ADDRESS in java args"); |
|
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|
2706 |
|
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|
2707 default: |
|
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|
2708 simple_move32(masm, src, dst); |
|
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2709 } |
|
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|
2710 } |
|
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|
2711 |
|
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|
2712 // Now we must convert any string we have to utf8 |
|
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|
2713 // |
|
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|
2714 |
|
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2715 for (sid = 0, j_arg = first_arg_to_pass, c_arg = 0 ; |
|
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2716 sid < total_strings ; j_arg++, c_arg++ ) { |
|
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2717 |
|
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2718 if (out_sig_bt[c_arg] == T_ADDRESS) { |
|
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2719 |
|
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2720 Address utf8_addr = Address( |
|
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2721 rsp, string_locs[sid++] * VMRegImpl::stack_slot_size); |
|
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2722 __ leal(rax, utf8_addr); |
|
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2723 |
|
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2724 // The first string we find might still be in the original java arg |
|
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2725 // register |
|
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|
2726 VMReg orig_loc = in_regs[j_arg].first(); |
|
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2727 Register string_oop; |
|
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2728 |
|
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|
2729 // This is where the argument will eventually reside |
|
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2730 Address dest = Address(rsp, reg2offset_out(out_regs[c_arg].first())); |
|
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2731 |
|
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|
2732 if (sid == 1 && orig_loc->is_reg()) { |
|
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2733 string_oop = orig_loc->as_Register(); |
|
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2734 assert(string_oop != rax, "smashed arg"); |
|
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2735 } else { |
|
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|
2736 |
|
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|
2737 if (orig_loc->is_reg()) { |
|
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2738 // Get the copy of the jls object |
|
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2739 __ movl(rcx, dest); |
|
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2740 } else { |
|
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2741 // arg is still in the original location |
|
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2742 __ movl(rcx, Address(rbp, reg2offset_in(orig_loc))); |
|
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|
2743 } |
|
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|
2744 string_oop = rcx; |
|
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2745 |
|
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|
2746 } |
|
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|
2747 Label nullString; |
|
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2748 __ movl(dest, NULL_WORD); |
|
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2749 __ testl(string_oop, string_oop); |
|
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2750 __ jcc(Assembler::zero, nullString); |
|
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|
2751 |
|
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|
2752 // Now we can store the address of the utf string as the argument |
|
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2753 __ movl(dest, rax); |
|
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2754 |
|
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|
2755 // And do the conversion |
|
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|
2756 __ call_VM_leaf(CAST_FROM_FN_PTR( |
|
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|
2757 address, SharedRuntime::get_utf), string_oop, rax); |
|
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2758 __ bind(nullString); |
|
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|
2759 } |
|
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|
2760 |
|
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|
2761 if (in_sig_bt[j_arg] == T_OBJECT && out_sig_bt[c_arg] == T_LONG) { |
|
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|
2762 assert(out_sig_bt[c_arg+1] == T_VOID, "must be"); |
|
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|
2763 ++c_arg; // Move over the T_VOID To keep the loop indices in sync |
|
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|
2764 } |
|
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|
2765 } |
|
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|
2766 |
|
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|
2767 |
|
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|
2768 // Ok now we are done. Need to place the nop that dtrace wants in order to |
|
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|
2769 // patch in the trap |
|
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|
2770 |
|
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|
2771 int patch_offset = ((intptr_t)__ pc()) - start; |
|
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|
2772 |
|
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|
2773 __ nop(); |
|
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|
2774 |
|
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|
2775 |
|
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|
2776 // Return |
|
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|
2777 |
|
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|
2778 __ leave(); |
|
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|
2779 __ ret(0); |
|
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|
2780 |
|
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|
2781 __ flush(); |
|
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|
2782 |
|
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|
2783 nmethod *nm = nmethod::new_dtrace_nmethod( |
|
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|
2784 method, masm->code(), vep_offset, patch_offset, frame_complete, |
|
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2785 stack_slots / VMRegImpl::slots_per_word); |
|
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|
2786 return nm; |
|
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|
2787 |
|
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|
2788 } |
|
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|
2789 |
|
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|
2790 #endif // HAVE_DTRACE_H |
|
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2791 |
| 0 | 2792 // this function returns the adjust size (in number of words) to a c2i adapter |
| 2793 // activation for use during deoptimization | |
| 2794 int Deoptimization::last_frame_adjust(int callee_parameters, int callee_locals ) { | |
| 1506 | 2795 return (callee_locals - callee_parameters) * Interpreter::stackElementWords; |
| 0 | 2796 } |
| 2797 | |
| 2798 | |
| 2799 uint SharedRuntime::out_preserve_stack_slots() { | |
| 2800 return 0; | |
| 2801 } | |
| 2802 | |
| 2803 //------------------------------generate_deopt_blob---------------------------- | |
| 2804 void SharedRuntime::generate_deopt_blob() { | |
| 2805 // allocate space for the code | |
| 2806 ResourceMark rm; | |
| 2807 // setup code generation tools | |
| 2808 CodeBuffer buffer("deopt_blob", 1024, 1024); | |
| 2809 MacroAssembler* masm = new MacroAssembler(&buffer); | |
| 2810 int frame_size_in_words; | |
| 2811 OopMap* map = NULL; | |
| 2812 // Account for the extra args we place on the stack | |
| 2813 // by the time we call fetch_unroll_info | |
| 2814 const int additional_words = 2; // deopt kind, thread | |
| 2815 | |
| 2816 OopMapSet *oop_maps = new OopMapSet(); | |
| 2817 | |
| 2818 // ------------- | |
| 2819 // This code enters when returning to a de-optimized nmethod. A return | |
| 2820 // address has been pushed on the the stack, and return values are in | |
| 2821 // registers. | |
| 2822 // If we are doing a normal deopt then we were called from the patched | |
| 2823 // nmethod from the point we returned to the nmethod. So the return | |
| 2824 // address on the stack is wrong by NativeCall::instruction_size | |
| 2825 // We will adjust the value to it looks like we have the original return | |
| 2826 // address on the stack (like when we eagerly deoptimized). | |
| 2827 // In the case of an exception pending with deoptimized then we enter | |
| 2828 // with a return address on the stack that points after the call we patched | |
| 2829 // into the exception handler. We have the following register state: | |
| 2830 // rax,: exception | |
| 2831 // rbx,: exception handler | |
| 2832 // rdx: throwing pc | |
| 2833 // So in this case we simply jam rdx into the useless return address and | |
| 2834 // the stack looks just like we want. | |
| 2835 // | |
| 2836 // At this point we need to de-opt. We save the argument return | |
| 2837 // registers. We call the first C routine, fetch_unroll_info(). This | |
| 2838 // routine captures the return values and returns a structure which | |
| 2839 // describes the current frame size and the sizes of all replacement frames. | |
| 2840 // The current frame is compiled code and may contain many inlined | |
| 2841 // functions, each with their own JVM state. We pop the current frame, then | |
| 2842 // push all the new frames. Then we call the C routine unpack_frames() to | |
| 2843 // populate these frames. Finally unpack_frames() returns us the new target | |
| 2844 // address. Notice that callee-save registers are BLOWN here; they have | |
| 2845 // already been captured in the vframeArray at the time the return PC was | |
| 2846 // patched. | |
| 2847 address start = __ pc(); | |
| 2848 Label cont; | |
| 2849 | |
| 2850 // Prolog for non exception case! | |
| 2851 | |
| 2852 // Save everything in sight. | |
| 2853 | |
|
926
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|
2854 map = RegisterSaver::save_live_registers(masm, additional_words, &frame_size_in_words, false); |
| 0 | 2855 // Normal deoptimization |
| 304 | 2856 __ push(Deoptimization::Unpack_deopt); |
| 0 | 2857 __ jmp(cont); |
| 2858 | |
| 2859 int reexecute_offset = __ pc() - start; | |
| 2860 | |
| 2861 // Reexecute case | |
| 2862 // return address is the pc describes what bci to do re-execute at | |
| 2863 | |
| 2864 // No need to update map as each call to save_live_registers will produce identical oopmap | |
|
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|
2865 (void) RegisterSaver::save_live_registers(masm, additional_words, &frame_size_in_words, false); |
| 0 | 2866 |
| 304 | 2867 __ push(Deoptimization::Unpack_reexecute); |
| 0 | 2868 __ jmp(cont); |
| 2869 | |
| 2870 int exception_offset = __ pc() - start; | |
| 2871 | |
| 2872 // Prolog for exception case | |
| 2873 | |
| 2874 // all registers are dead at this entry point, except for rax, and | |
| 2875 // rdx which contain the exception oop and exception pc | |
| 2876 // respectively. Set them in TLS and fall thru to the | |
| 2877 // unpack_with_exception_in_tls entry point. | |
| 2878 | |
| 2879 __ get_thread(rdi); | |
| 304 | 2880 __ movptr(Address(rdi, JavaThread::exception_pc_offset()), rdx); |
| 2881 __ movptr(Address(rdi, JavaThread::exception_oop_offset()), rax); | |
| 0 | 2882 |
| 2883 int exception_in_tls_offset = __ pc() - start; | |
| 2884 | |
| 2885 // new implementation because exception oop is now passed in JavaThread | |
| 2886 | |
| 2887 // Prolog for exception case | |
| 2888 // All registers must be preserved because they might be used by LinearScan | |
| 2889 // Exceptiop oop and throwing PC are passed in JavaThread | |
| 2890 // tos: stack at point of call to method that threw the exception (i.e. only | |
| 2891 // args are on the stack, no return address) | |
| 2892 | |
| 2893 // make room on stack for the return address | |
| 2894 // It will be patched later with the throwing pc. The correct value is not | |
| 2895 // available now because loading it from memory would destroy registers. | |
| 304 | 2896 __ push(0); |
| 0 | 2897 |
| 2898 // Save everything in sight. | |
| 2899 | |
| 2900 // No need to update map as each call to save_live_registers will produce identical oopmap | |
|
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2901 (void) RegisterSaver::save_live_registers(masm, additional_words, &frame_size_in_words, false); |
| 0 | 2902 |
| 2903 // Now it is safe to overwrite any register | |
| 2904 | |
| 2905 // store the correct deoptimization type | |
| 304 | 2906 __ push(Deoptimization::Unpack_exception); |
| 0 | 2907 |
| 2908 // load throwing pc from JavaThread and patch it as the return address | |
| 2909 // of the current frame. Then clear the field in JavaThread | |
| 2910 __ get_thread(rdi); | |
| 304 | 2911 __ movptr(rdx, Address(rdi, JavaThread::exception_pc_offset())); |
| 2912 __ movptr(Address(rbp, wordSize), rdx); | |
|
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2913 __ movptr(Address(rdi, JavaThread::exception_pc_offset()), NULL_WORD); |
| 0 | 2914 |
| 2915 #ifdef ASSERT | |
| 2916 // verify that there is really an exception oop in JavaThread | |
| 304 | 2917 __ movptr(rax, Address(rdi, JavaThread::exception_oop_offset())); |
| 0 | 2918 __ verify_oop(rax); |
| 2919 | |
| 2920 // verify that there is no pending exception | |
| 2921 Label no_pending_exception; | |
| 304 | 2922 __ movptr(rax, Address(rdi, Thread::pending_exception_offset())); |
| 2923 __ testptr(rax, rax); | |
| 0 | 2924 __ jcc(Assembler::zero, no_pending_exception); |
| 2925 __ stop("must not have pending exception here"); | |
| 2926 __ bind(no_pending_exception); | |
| 2927 #endif | |
| 2928 | |
| 2929 __ bind(cont); | |
| 2930 | |
| 2931 // Compiled code leaves the floating point stack dirty, empty it. | |
| 2932 __ empty_FPU_stack(); | |
| 2933 | |
| 2934 | |
| 2935 // Call C code. Need thread and this frame, but NOT official VM entry | |
| 2936 // crud. We cannot block on this call, no GC can happen. | |
| 2937 __ get_thread(rcx); | |
| 304 | 2938 __ push(rcx); |
| 0 | 2939 // fetch_unroll_info needs to call last_java_frame() |
| 2940 __ set_last_Java_frame(rcx, noreg, noreg, NULL); | |
| 2941 | |
| 2942 __ call(RuntimeAddress(CAST_FROM_FN_PTR(address, Deoptimization::fetch_unroll_info))); | |
| 2943 | |
| 2944 // Need to have an oopmap that tells fetch_unroll_info where to | |
| 2945 // find any register it might need. | |
| 2946 | |
| 2947 oop_maps->add_gc_map( __ pc()-start, map); | |
| 2948 | |
| 2949 // Discard arg to fetch_unroll_info | |
| 304 | 2950 __ pop(rcx); |
| 0 | 2951 |
| 2952 __ get_thread(rcx); | |
| 2953 __ reset_last_Java_frame(rcx, false, false); | |
| 2954 | |
| 2955 // Load UnrollBlock into EDI | |
| 304 | 2956 __ mov(rdi, rax); |
| 0 | 2957 |
| 2958 // Move the unpack kind to a safe place in the UnrollBlock because | |
| 2959 // we are very short of registers | |
| 2960 | |
| 2961 Address unpack_kind(rdi, Deoptimization::UnrollBlock::unpack_kind_offset_in_bytes()); | |
| 2962 // retrieve the deopt kind from where we left it. | |
| 304 | 2963 __ pop(rax); |
| 0 | 2964 __ movl(unpack_kind, rax); // save the unpack_kind value |
| 2965 | |
| 2966 Label noException; | |
| 2967 __ cmpl(rax, Deoptimization::Unpack_exception); // Was exception pending? | |
| 2968 __ jcc(Assembler::notEqual, noException); | |
| 304 | 2969 __ movptr(rax, Address(rcx, JavaThread::exception_oop_offset())); |
| 2970 __ movptr(rdx, Address(rcx, JavaThread::exception_pc_offset())); | |
|
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2971 __ movptr(Address(rcx, JavaThread::exception_oop_offset()), NULL_WORD); |
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2972 __ movptr(Address(rcx, JavaThread::exception_pc_offset()), NULL_WORD); |
| 0 | 2973 |
| 2974 __ verify_oop(rax); | |
| 2975 | |
| 2976 // Overwrite the result registers with the exception results. | |
| 304 | 2977 __ movptr(Address(rsp, RegisterSaver::raxOffset()*wordSize), rax); |
| 2978 __ movptr(Address(rsp, RegisterSaver::rdxOffset()*wordSize), rdx); | |
| 0 | 2979 |
| 2980 __ bind(noException); | |
| 2981 | |
| 2982 // Stack is back to only having register save data on the stack. | |
| 2983 // Now restore the result registers. Everything else is either dead or captured | |
| 2984 // in the vframeArray. | |
| 2985 | |
| 2986 RegisterSaver::restore_result_registers(masm); | |
| 2987 | |
|
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2988 // Non standard control word may be leaked out through a safepoint blob, and we can |
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2989 // deopt at a poll point with the non standard control word. However, we should make |
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2990 // sure the control word is correct after restore_result_registers. |
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2991 __ fldcw(ExternalAddress(StubRoutines::addr_fpu_cntrl_wrd_std())); |
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2992 |
| 0 | 2993 // All of the register save area has been popped of the stack. Only the |
| 2994 // return address remains. | |
| 2995 | |
| 2996 // Pop all the frames we must move/replace. | |
| 2997 // | |
| 2998 // Frame picture (youngest to oldest) | |
| 2999 // 1: self-frame (no frame link) | |
| 3000 // 2: deopting frame (no frame link) | |
| 3001 // 3: caller of deopting frame (could be compiled/interpreted). | |
| 3002 // | |
| 3003 // Note: by leaving the return address of self-frame on the stack | |
| 3004 // and using the size of frame 2 to adjust the stack | |
| 3005 // when we are done the return to frame 3 will still be on the stack. | |
| 3006 | |
| 3007 // Pop deoptimized frame | |
| 304 | 3008 __ addptr(rsp, Address(rdi,Deoptimization::UnrollBlock::size_of_deoptimized_frame_offset_in_bytes())); |
| 0 | 3009 |
| 3010 // sp should be pointing at the return address to the caller (3) | |
| 3011 | |
|
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3012 // Pick up the initial fp we should save |
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3013 // restore rbp before stack bang because if stack overflow is thrown it needs to be pushed (and preserved) |
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3014 __ movptr(rbp, Address(rdi, Deoptimization::UnrollBlock::initial_info_offset_in_bytes())); |
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3015 |
|
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3016 #ifdef ASSERT |
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3017 // Compilers generate code that bang the stack by as much as the |
|
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3018 // interpreter would need. So this stack banging should never |
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3019 // trigger a fault. Verify that it does not on non product builds. |
| 0 | 3020 if (UseStackBanging) { |
| 3021 __ movl(rbx, Address(rdi ,Deoptimization::UnrollBlock::total_frame_sizes_offset_in_bytes())); | |
| 3022 __ bang_stack_size(rbx, rcx); | |
| 3023 } | |
|
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3024 #endif |
| 0 | 3025 |
| 3026 // Load array of frame pcs into ECX | |
| 304 | 3027 __ movptr(rcx,Address(rdi,Deoptimization::UnrollBlock::frame_pcs_offset_in_bytes())); |
| 3028 | |
| 3029 __ pop(rsi); // trash the old pc | |
| 0 | 3030 |
| 3031 // Load array of frame sizes into ESI | |
| 304 | 3032 __ movptr(rsi,Address(rdi,Deoptimization::UnrollBlock::frame_sizes_offset_in_bytes())); |
| 0 | 3033 |
| 3034 Address counter(rdi, Deoptimization::UnrollBlock::counter_temp_offset_in_bytes()); | |
| 3035 | |
| 3036 __ movl(rbx, Address(rdi, Deoptimization::UnrollBlock::number_of_frames_offset_in_bytes())); | |
| 3037 __ movl(counter, rbx); | |
| 3038 | |
| 3039 // Now adjust the caller's stack to make up for the extra locals | |
| 3040 // but record the original sp so that we can save it in the skeletal interpreter | |
| 3041 // frame and the stack walking of interpreter_sender will get the unextended sp | |
| 3042 // value and not the "real" sp value. | |
| 3043 | |
| 3044 Address sp_temp(rdi, Deoptimization::UnrollBlock::sender_sp_temp_offset_in_bytes()); | |
| 304 | 3045 __ movptr(sp_temp, rsp); |
| 3046 __ movl2ptr(rbx, Address(rdi, Deoptimization::UnrollBlock::caller_adjustment_offset_in_bytes())); | |
| 3047 __ subptr(rsp, rbx); | |
| 0 | 3048 |
| 3049 // Push interpreter frames in a loop | |
| 3050 Label loop; | |
| 3051 __ bind(loop); | |
| 304 | 3052 __ movptr(rbx, Address(rsi, 0)); // Load frame size |
| 0 | 3053 #ifdef CC_INTERP |
| 304 | 3054 __ subptr(rbx, 4*wordSize); // we'll push pc and ebp by hand and |
| 0 | 3055 #ifdef ASSERT |
| 304 | 3056 __ push(0xDEADDEAD); // Make a recognizable pattern |
| 3057 __ push(0xDEADDEAD); | |
| 0 | 3058 #else /* ASSERT */ |
| 304 | 3059 __ subptr(rsp, 2*wordSize); // skip the "static long no_param" |
| 0 | 3060 #endif /* ASSERT */ |
| 3061 #else /* CC_INTERP */ | |
| 304 | 3062 __ subptr(rbx, 2*wordSize); // we'll push pc and rbp, by hand |
| 0 | 3063 #endif /* CC_INTERP */ |
| 304 | 3064 __ pushptr(Address(rcx, 0)); // save return address |
| 0 | 3065 __ enter(); // save old & set new rbp, |
| 304 | 3066 __ subptr(rsp, rbx); // Prolog! |
| 3067 __ movptr(rbx, sp_temp); // sender's sp | |
| 0 | 3068 #ifdef CC_INTERP |
| 304 | 3069 __ movptr(Address(rbp, |
| 0 | 3070 -(sizeof(BytecodeInterpreter)) + in_bytes(byte_offset_of(BytecodeInterpreter, _sender_sp))), |
| 3071 rbx); // Make it walkable | |
| 3072 #else /* CC_INTERP */ | |
| 3073 // This value is corrected by layout_activation_impl | |
|
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3074 __ movptr(Address(rbp, frame::interpreter_frame_last_sp_offset * wordSize), NULL_WORD); |
| 304 | 3075 __ movptr(Address(rbp, frame::interpreter_frame_sender_sp_offset * wordSize), rbx); // Make it walkable |
| 0 | 3076 #endif /* CC_INTERP */ |
| 304 | 3077 __ movptr(sp_temp, rsp); // pass to next frame |
| 3078 __ addptr(rsi, wordSize); // Bump array pointer (sizes) | |
| 3079 __ addptr(rcx, wordSize); // Bump array pointer (pcs) | |
| 3080 __ decrementl(counter); // decrement counter | |
| 0 | 3081 __ jcc(Assembler::notZero, loop); |
| 304 | 3082 __ pushptr(Address(rcx, 0)); // save final return address |
| 0 | 3083 |
| 3084 // Re-push self-frame | |
| 3085 __ enter(); // save old & set new rbp, | |
| 3086 | |
| 3087 // Return address and rbp, are in place | |
| 3088 // We'll push additional args later. Just allocate a full sized | |
| 3089 // register save area | |
| 304 | 3090 __ subptr(rsp, (frame_size_in_words-additional_words - 2) * wordSize); |
| 0 | 3091 |
| 3092 // Restore frame locals after moving the frame | |
| 304 | 3093 __ movptr(Address(rsp, RegisterSaver::raxOffset()*wordSize), rax); |
| 3094 __ movptr(Address(rsp, RegisterSaver::rdxOffset()*wordSize), rdx); | |
| 0 | 3095 __ fstp_d(Address(rsp, RegisterSaver::fpResultOffset()*wordSize)); // Pop float stack and store in local |
| 3096 if( UseSSE>=2 ) __ movdbl(Address(rsp, RegisterSaver::xmm0Offset()*wordSize), xmm0); | |
| 3097 if( UseSSE==1 ) __ movflt(Address(rsp, RegisterSaver::xmm0Offset()*wordSize), xmm0); | |
| 3098 | |
| 3099 // Set up the args to unpack_frame | |
| 3100 | |
| 3101 __ pushl(unpack_kind); // get the unpack_kind value | |
| 3102 __ get_thread(rcx); | |
| 304 | 3103 __ push(rcx); |
| 0 | 3104 |
| 3105 // set last_Java_sp, last_Java_fp | |
| 3106 __ set_last_Java_frame(rcx, noreg, rbp, NULL); | |
| 3107 | |
| 3108 // Call C code. Need thread but NOT official VM entry | |
| 3109 // crud. We cannot block on this call, no GC can happen. Call should | |
| 3110 // restore return values to their stack-slots with the new SP. | |
| 3111 __ call(RuntimeAddress(CAST_FROM_FN_PTR(address, Deoptimization::unpack_frames))); | |
| 3112 // Set an oopmap for the call site | |
| 3113 oop_maps->add_gc_map( __ pc()-start, new OopMap( frame_size_in_words, 0 )); | |
| 3114 | |
| 3115 // rax, contains the return result type | |
| 304 | 3116 __ push(rax); |
| 0 | 3117 |
| 3118 __ get_thread(rcx); | |
| 3119 __ reset_last_Java_frame(rcx, false, false); | |
| 3120 | |
| 3121 // Collect return values | |
| 304 | 3122 __ movptr(rax,Address(rsp, (RegisterSaver::raxOffset() + additional_words + 1)*wordSize)); |
| 3123 __ movptr(rdx,Address(rsp, (RegisterSaver::rdxOffset() + additional_words + 1)*wordSize)); | |
| 0 | 3124 |
| 3125 // Clear floating point stack before returning to interpreter | |
| 3126 __ empty_FPU_stack(); | |
| 3127 | |
| 3128 // Check if we should push the float or double return value. | |
| 3129 Label results_done, yes_double_value; | |
| 3130 __ cmpl(Address(rsp, 0), T_DOUBLE); | |
| 3131 __ jcc (Assembler::zero, yes_double_value); | |
| 3132 __ cmpl(Address(rsp, 0), T_FLOAT); | |
| 3133 __ jcc (Assembler::notZero, results_done); | |
| 3134 | |
| 3135 // return float value as expected by interpreter | |
| 3136 if( UseSSE>=1 ) __ movflt(xmm0, Address(rsp, (RegisterSaver::xmm0Offset() + additional_words + 1)*wordSize)); | |
| 3137 else __ fld_d(Address(rsp, (RegisterSaver::fpResultOffset() + additional_words + 1)*wordSize)); | |
| 3138 __ jmp(results_done); | |
| 3139 | |
| 3140 // return double value as expected by interpreter | |
| 3141 __ bind(yes_double_value); | |
| 3142 if( UseSSE>=2 ) __ movdbl(xmm0, Address(rsp, (RegisterSaver::xmm0Offset() + additional_words + 1)*wordSize)); | |
| 3143 else __ fld_d(Address(rsp, (RegisterSaver::fpResultOffset() + additional_words + 1)*wordSize)); | |
| 3144 | |
| 3145 __ bind(results_done); | |
| 3146 | |
| 3147 // Pop self-frame. | |
| 3148 __ leave(); // Epilog! | |
| 3149 | |
| 3150 // Jump to interpreter | |
| 3151 __ ret(0); | |
| 3152 | |
| 3153 // ------------- | |
| 3154 // make sure all code is generated | |
| 3155 masm->flush(); | |
| 3156 | |
| 3157 _deopt_blob = DeoptimizationBlob::create( &buffer, oop_maps, 0, exception_offset, reexecute_offset, frame_size_in_words); | |
| 3158 _deopt_blob->set_unpack_with_exception_in_tls_offset(exception_in_tls_offset); | |
| 3159 } | |
| 3160 | |
| 3161 | |
| 3162 #ifdef COMPILER2 | |
| 3163 //------------------------------generate_uncommon_trap_blob-------------------- | |
| 3164 void SharedRuntime::generate_uncommon_trap_blob() { | |
| 3165 // allocate space for the code | |
| 3166 ResourceMark rm; | |
| 3167 // setup code generation tools | |
| 3168 CodeBuffer buffer("uncommon_trap_blob", 512, 512); | |
| 3169 MacroAssembler* masm = new MacroAssembler(&buffer); | |
| 3170 | |
| 3171 enum frame_layout { | |
| 3172 arg0_off, // thread sp + 0 // Arg location for | |
| 3173 arg1_off, // unloaded_class_index sp + 1 // calling C | |
| 3174 // The frame sender code expects that rbp will be in the "natural" place and | |
| 3175 // will override any oopMap setting for it. We must therefore force the layout | |
| 3176 // so that it agrees with the frame sender code. | |
| 3177 rbp_off, // callee saved register sp + 2 | |
| 3178 return_off, // slot for return address sp + 3 | |
| 3179 framesize | |
| 3180 }; | |
| 3181 | |
| 3182 address start = __ pc(); | |
| 17780 | 3183 |
| 3184 if (UseRTMLocking) { | |
| 3185 // Abort RTM transaction before possible nmethod deoptimization. | |
| 3186 __ xabort(0); | |
| 3187 } | |
| 3188 | |
| 0 | 3189 // Push self-frame. |
| 304 | 3190 __ subptr(rsp, return_off*wordSize); // Epilog! |
| 0 | 3191 |
| 3192 // rbp, is an implicitly saved callee saved register (i.e. the calling | |
| 3193 // convention will save restore it in prolog/epilog) Other than that | |
| 3194 // there are no callee save registers no that adapter frames are gone. | |
| 304 | 3195 __ movptr(Address(rsp, rbp_off*wordSize), rbp); |
| 0 | 3196 |
| 3197 // Clear the floating point exception stack | |
| 3198 __ empty_FPU_stack(); | |
| 3199 | |
| 3200 // set last_Java_sp | |
| 3201 __ get_thread(rdx); | |
| 3202 __ set_last_Java_frame(rdx, noreg, noreg, NULL); | |
| 3203 | |
| 3204 // Call C code. Need thread but NOT official VM entry | |
| 3205 // crud. We cannot block on this call, no GC can happen. Call should | |
| 3206 // capture callee-saved registers as well as return values. | |
| 304 | 3207 __ movptr(Address(rsp, arg0_off*wordSize), rdx); |
| 0 | 3208 // argument already in ECX |
| 3209 __ movl(Address(rsp, arg1_off*wordSize),rcx); | |
| 3210 __ call(RuntimeAddress(CAST_FROM_FN_PTR(address, Deoptimization::uncommon_trap))); | |
| 3211 | |
| 3212 // Set an oopmap for the call site | |
| 3213 OopMapSet *oop_maps = new OopMapSet(); | |
| 3214 OopMap* map = new OopMap( framesize, 0 ); | |
| 3215 // No oopMap for rbp, it is known implicitly | |
| 3216 | |
| 3217 oop_maps->add_gc_map( __ pc()-start, map); | |
| 3218 | |
| 3219 __ get_thread(rcx); | |
| 3220 | |
| 3221 __ reset_last_Java_frame(rcx, false, false); | |
| 3222 | |
| 3223 // Load UnrollBlock into EDI | |
| 304 | 3224 __ movptr(rdi, rax); |
| 0 | 3225 |
| 3226 // Pop all the frames we must move/replace. | |
| 3227 // | |
| 3228 // Frame picture (youngest to oldest) | |
| 3229 // 1: self-frame (no frame link) | |
| 3230 // 2: deopting frame (no frame link) | |
| 3231 // 3: caller of deopting frame (could be compiled/interpreted). | |
| 3232 | |
| 3233 // Pop self-frame. We have no frame, and must rely only on EAX and ESP. | |
| 304 | 3234 __ addptr(rsp,(framesize-1)*wordSize); // Epilog! |
| 0 | 3235 |
| 3236 // Pop deoptimized frame | |
| 304 | 3237 __ movl2ptr(rcx, Address(rdi,Deoptimization::UnrollBlock::size_of_deoptimized_frame_offset_in_bytes())); |
| 3238 __ addptr(rsp, rcx); | |
| 0 | 3239 |
| 3240 // sp should be pointing at the return address to the caller (3) | |
| 3241 | |
|
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3242 // Pick up the initial fp we should save |
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3243 // restore rbp before stack bang because if stack overflow is thrown it needs to be pushed (and preserved) |
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3244 __ movptr(rbp, Address(rdi, Deoptimization::UnrollBlock::initial_info_offset_in_bytes())); |
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3245 |
|
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3246 #ifdef ASSERT |
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3247 // Compilers generate code that bang the stack by as much as the |
|
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3248 // interpreter would need. So this stack banging should never |
|
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3249 // trigger a fault. Verify that it does not on non product builds. |
| 0 | 3250 if (UseStackBanging) { |
| 3251 __ movl(rbx, Address(rdi ,Deoptimization::UnrollBlock::total_frame_sizes_offset_in_bytes())); | |
| 3252 __ bang_stack_size(rbx, rcx); | |
| 3253 } | |
|
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3254 #endif |
| 0 | 3255 |
| 3256 // Load array of frame pcs into ECX | |
| 3257 __ movl(rcx,Address(rdi,Deoptimization::UnrollBlock::frame_pcs_offset_in_bytes())); | |
| 3258 | |
| 304 | 3259 __ pop(rsi); // trash the pc |
| 0 | 3260 |
| 3261 // Load array of frame sizes into ESI | |
| 304 | 3262 __ movptr(rsi,Address(rdi,Deoptimization::UnrollBlock::frame_sizes_offset_in_bytes())); |
| 0 | 3263 |
| 3264 Address counter(rdi, Deoptimization::UnrollBlock::counter_temp_offset_in_bytes()); | |
| 3265 | |
| 3266 __ movl(rbx, Address(rdi, Deoptimization::UnrollBlock::number_of_frames_offset_in_bytes())); | |
| 3267 __ movl(counter, rbx); | |
| 3268 | |
| 3269 // Now adjust the caller's stack to make up for the extra locals | |
| 3270 // but record the original sp so that we can save it in the skeletal interpreter | |
| 3271 // frame and the stack walking of interpreter_sender will get the unextended sp | |
| 3272 // value and not the "real" sp value. | |
| 3273 | |
| 3274 Address sp_temp(rdi, Deoptimization::UnrollBlock::sender_sp_temp_offset_in_bytes()); | |
| 304 | 3275 __ movptr(sp_temp, rsp); |
| 3276 __ movl(rbx, Address(rdi, Deoptimization::UnrollBlock::caller_adjustment_offset_in_bytes())); | |
| 3277 __ subptr(rsp, rbx); | |
| 0 | 3278 |
| 3279 // Push interpreter frames in a loop | |
| 3280 Label loop; | |
| 3281 __ bind(loop); | |
| 304 | 3282 __ movptr(rbx, Address(rsi, 0)); // Load frame size |
| 0 | 3283 #ifdef CC_INTERP |
| 304 | 3284 __ subptr(rbx, 4*wordSize); // we'll push pc and ebp by hand and |
| 0 | 3285 #ifdef ASSERT |
| 304 | 3286 __ push(0xDEADDEAD); // Make a recognizable pattern |
| 3287 __ push(0xDEADDEAD); // (parm to RecursiveInterpreter...) | |
| 0 | 3288 #else /* ASSERT */ |
| 304 | 3289 __ subptr(rsp, 2*wordSize); // skip the "static long no_param" |
| 0 | 3290 #endif /* ASSERT */ |
| 3291 #else /* CC_INTERP */ | |
| 304 | 3292 __ subptr(rbx, 2*wordSize); // we'll push pc and rbp, by hand |
| 0 | 3293 #endif /* CC_INTERP */ |
| 304 | 3294 __ pushptr(Address(rcx, 0)); // save return address |
| 0 | 3295 __ enter(); // save old & set new rbp, |
| 304 | 3296 __ subptr(rsp, rbx); // Prolog! |
| 3297 __ movptr(rbx, sp_temp); // sender's sp | |
| 0 | 3298 #ifdef CC_INTERP |
| 304 | 3299 __ movptr(Address(rbp, |
| 0 | 3300 -(sizeof(BytecodeInterpreter)) + in_bytes(byte_offset_of(BytecodeInterpreter, _sender_sp))), |
| 3301 rbx); // Make it walkable | |
| 3302 #else /* CC_INTERP */ | |
| 3303 // This value is corrected by layout_activation_impl | |
|
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3304 __ movptr(Address(rbp, frame::interpreter_frame_last_sp_offset * wordSize), NULL_WORD ); |
| 304 | 3305 __ movptr(Address(rbp, frame::interpreter_frame_sender_sp_offset * wordSize), rbx); // Make it walkable |
| 0 | 3306 #endif /* CC_INTERP */ |
| 304 | 3307 __ movptr(sp_temp, rsp); // pass to next frame |
| 3308 __ addptr(rsi, wordSize); // Bump array pointer (sizes) | |
| 3309 __ addptr(rcx, wordSize); // Bump array pointer (pcs) | |
| 3310 __ decrementl(counter); // decrement counter | |
| 0 | 3311 __ jcc(Assembler::notZero, loop); |
| 304 | 3312 __ pushptr(Address(rcx, 0)); // save final return address |
| 0 | 3313 |
| 3314 // Re-push self-frame | |
| 3315 __ enter(); // save old & set new rbp, | |
| 304 | 3316 __ subptr(rsp, (framesize-2) * wordSize); // Prolog! |
| 0 | 3317 |
| 3318 | |
| 3319 // set last_Java_sp, last_Java_fp | |
| 3320 __ get_thread(rdi); | |
| 3321 __ set_last_Java_frame(rdi, noreg, rbp, NULL); | |
| 3322 | |
| 3323 // Call C code. Need thread but NOT official VM entry | |
| 3324 // crud. We cannot block on this call, no GC can happen. Call should | |
| 3325 // restore return values to their stack-slots with the new SP. | |
| 304 | 3326 __ movptr(Address(rsp,arg0_off*wordSize),rdi); |
| 0 | 3327 __ movl(Address(rsp,arg1_off*wordSize), Deoptimization::Unpack_uncommon_trap); |
| 3328 __ call(RuntimeAddress(CAST_FROM_FN_PTR(address, Deoptimization::unpack_frames))); | |
| 3329 // Set an oopmap for the call site | |
| 3330 oop_maps->add_gc_map( __ pc()-start, new OopMap( framesize, 0 ) ); | |
| 3331 | |
| 3332 __ get_thread(rdi); | |
| 3333 __ reset_last_Java_frame(rdi, true, false); | |
| 3334 | |
| 3335 // Pop self-frame. | |
| 3336 __ leave(); // Epilog! | |
| 3337 | |
| 3338 // Jump to interpreter | |
| 3339 __ ret(0); | |
| 3340 | |
| 3341 // ------------- | |
| 3342 // make sure all code is generated | |
| 3343 masm->flush(); | |
| 3344 | |
| 3345 _uncommon_trap_blob = UncommonTrapBlob::create(&buffer, oop_maps, framesize); | |
| 3346 } | |
| 3347 #endif // COMPILER2 | |
| 3348 | |
| 3349 //------------------------------generate_handler_blob------ | |
| 3350 // | |
| 3351 // Generate a special Compile2Runtime blob that saves all registers, | |
| 3352 // setup oopmap, and calls safepoint code to stop the compiled code for | |
| 3353 // a safepoint. | |
| 3354 // | |
|
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|
3355 SafepointBlob* SharedRuntime::generate_handler_blob(address call_ptr, int poll_type) { |
| 0 | 3356 |
| 3357 // Account for thread arg in our frame | |
| 3358 const int additional_words = 1; | |
| 3359 int frame_size_in_words; | |
| 3360 | |
| 3361 assert (StubRoutines::forward_exception_entry() != NULL, "must be generated before"); | |
| 3362 | |
| 3363 ResourceMark rm; | |
| 3364 OopMapSet *oop_maps = new OopMapSet(); | |
| 3365 OopMap* map; | |
| 3366 | |
| 3367 // allocate space for the code | |
| 3368 // setup code generation tools | |
| 3369 CodeBuffer buffer("handler_blob", 1024, 512); | |
| 3370 MacroAssembler* masm = new MacroAssembler(&buffer); | |
| 3371 | |
| 3372 const Register java_thread = rdi; // callee-saved for VC++ | |
| 3373 address start = __ pc(); | |
| 3374 address call_pc = NULL; | |
|
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|
3375 bool cause_return = (poll_type == POLL_AT_RETURN); |
|
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|
3376 bool save_vectors = (poll_type == POLL_AT_VECTOR_LOOP); |
| 17780 | 3377 |
| 3378 if (UseRTMLocking) { | |
| 3379 // Abort RTM transaction before calling runtime | |
| 3380 // because critical section will be large and will be | |
| 3381 // aborted anyway. Also nmethod could be deoptimized. | |
| 3382 __ xabort(0); | |
| 3383 } | |
| 3384 | |
| 0 | 3385 // If cause_return is true we are at a poll_return and there is |
| 3386 // the return address on the stack to the caller on the nmethod | |
| 3387 // that is safepoint. We can leave this return on the stack and | |
| 3388 // effectively complete the return and safepoint in the caller. | |
| 3389 // Otherwise we push space for a return address that the safepoint | |
| 3390 // handler will install later to make the stack walking sensible. | |
|
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|
3391 if (!cause_return) |
|
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|
3392 __ push(rbx); // Make room for return address (or push it again) |
|
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|
3393 |
|
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|
3394 map = RegisterSaver::save_live_registers(masm, additional_words, &frame_size_in_words, false, save_vectors); |
| 0 | 3395 |
| 3396 // The following is basically a call_VM. However, we need the precise | |
| 3397 // address of the call in order to generate an oopmap. Hence, we do all the | |
| 3398 // work ourselves. | |
| 3399 | |
| 3400 // Push thread argument and setup last_Java_sp | |
| 3401 __ get_thread(java_thread); | |
| 304 | 3402 __ push(java_thread); |
| 0 | 3403 __ set_last_Java_frame(java_thread, noreg, noreg, NULL); |
| 3404 | |
| 3405 // if this was not a poll_return then we need to correct the return address now. | |
|
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|
3406 if (!cause_return) { |
| 304 | 3407 __ movptr(rax, Address(java_thread, JavaThread::saved_exception_pc_offset())); |
| 3408 __ movptr(Address(rbp, wordSize), rax); | |
| 0 | 3409 } |
| 3410 | |
| 3411 // do the call | |
| 3412 __ call(RuntimeAddress(call_ptr)); | |
| 3413 | |
| 3414 // Set an oopmap for the call site. This oopmap will map all | |
| 3415 // oop-registers and debug-info registers as callee-saved. This | |
| 3416 // will allow deoptimization at this safepoint to find all possible | |
| 3417 // debug-info recordings, as well as let GC find all oops. | |
| 3418 | |
| 3419 oop_maps->add_gc_map( __ pc() - start, map); | |
| 3420 | |
| 3421 // Discard arg | |
| 304 | 3422 __ pop(rcx); |
| 0 | 3423 |
| 3424 Label noException; | |
| 3425 | |
| 3426 // Clear last_Java_sp again | |
| 3427 __ get_thread(java_thread); | |
| 3428 __ reset_last_Java_frame(java_thread, false, false); | |
| 3429 | |
| 304 | 3430 __ cmpptr(Address(java_thread, Thread::pending_exception_offset()), (int32_t)NULL_WORD); |
| 0 | 3431 __ jcc(Assembler::equal, noException); |
| 3432 | |
| 3433 // Exception pending | |
|
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|
3434 RegisterSaver::restore_live_registers(masm, save_vectors); |
| 0 | 3435 |
| 3436 __ jump(RuntimeAddress(StubRoutines::forward_exception_entry())); | |
| 3437 | |
| 3438 __ bind(noException); | |
| 3439 | |
| 3440 // Normal exit, register restoring and exit | |
|
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|
3441 RegisterSaver::restore_live_registers(masm, save_vectors); |
| 0 | 3442 |
| 3443 __ ret(0); | |
| 3444 | |
| 3445 // make sure all code is generated | |
| 3446 masm->flush(); | |
| 3447 | |
| 3448 // Fill-out other meta info | |
| 3449 return SafepointBlob::create(&buffer, oop_maps, frame_size_in_words); | |
| 3450 } | |
| 3451 | |
| 3452 // | |
| 3453 // generate_resolve_blob - call resolution (static/virtual/opt-virtual/ic-miss | |
| 3454 // | |
| 3455 // Generate a stub that calls into vm to find out the proper destination | |
| 3456 // of a java call. All the argument registers are live at this point | |
| 3457 // but since this is generic code we don't know what they are and the caller | |
| 3458 // must do any gc of the args. | |
| 3459 // | |
|
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|
3460 RuntimeStub* SharedRuntime::generate_resolve_blob(address destination, const char* name) { |
| 0 | 3461 assert (StubRoutines::forward_exception_entry() != NULL, "must be generated before"); |
| 3462 | |
| 3463 // allocate space for the code | |
| 3464 ResourceMark rm; | |
| 3465 | |
| 3466 CodeBuffer buffer(name, 1000, 512); | |
| 3467 MacroAssembler* masm = new MacroAssembler(&buffer); | |
| 3468 | |
| 3469 int frame_size_words; | |
| 3470 enum frame_layout { | |
| 3471 thread_off, | |
| 3472 extra_words }; | |
| 3473 | |
| 3474 OopMapSet *oop_maps = new OopMapSet(); | |
| 3475 OopMap* map = NULL; | |
| 3476 | |
| 3477 int start = __ offset(); | |
| 3478 | |
| 3479 map = RegisterSaver::save_live_registers(masm, extra_words, &frame_size_words); | |
| 3480 | |
| 3481 int frame_complete = __ offset(); | |
| 3482 | |
| 3483 const Register thread = rdi; | |
| 3484 __ get_thread(rdi); | |
| 3485 | |
| 304 | 3486 __ push(thread); |
| 0 | 3487 __ set_last_Java_frame(thread, noreg, rbp, NULL); |
| 3488 | |
| 3489 __ call(RuntimeAddress(destination)); | |
| 3490 | |
| 3491 | |
| 3492 // Set an oopmap for the call site. | |
| 3493 // We need this not only for callee-saved registers, but also for volatile | |
| 3494 // registers that the compiler might be keeping live across a safepoint. | |
| 3495 | |
| 3496 oop_maps->add_gc_map( __ offset() - start, map); | |
| 3497 | |
| 3498 // rax, contains the address we are going to jump to assuming no exception got installed | |
| 3499 | |
| 304 | 3500 __ addptr(rsp, wordSize); |
| 0 | 3501 |
| 3502 // clear last_Java_sp | |
| 3503 __ reset_last_Java_frame(thread, true, false); | |
| 3504 // check for pending exceptions | |
| 3505 Label pending; | |
| 304 | 3506 __ cmpptr(Address(thread, Thread::pending_exception_offset()), (int32_t)NULL_WORD); |
| 0 | 3507 __ jcc(Assembler::notEqual, pending); |
| 3508 | |
|
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3509 // get the returned Method* |
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|
3510 __ get_vm_result_2(rbx, thread); |
| 304 | 3511 __ movptr(Address(rsp, RegisterSaver::rbx_offset() * wordSize), rbx); |
| 3512 | |
| 3513 __ movptr(Address(rsp, RegisterSaver::rax_offset() * wordSize), rax); | |
| 0 | 3514 |
| 3515 RegisterSaver::restore_live_registers(masm); | |
| 3516 | |
| 3517 // We are back the the original state on entry and ready to go. | |
| 3518 | |
| 3519 __ jmp(rax); | |
| 3520 | |
| 3521 // Pending exception after the safepoint | |
| 3522 | |
| 3523 __ bind(pending); | |
| 3524 | |
| 3525 RegisterSaver::restore_live_registers(masm); | |
| 3526 | |
| 3527 // exception pending => remove activation and forward to exception handler | |
| 3528 | |
| 3529 __ get_thread(thread); | |
|
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3530 __ movptr(Address(thread, JavaThread::vm_result_offset()), NULL_WORD); |
| 304 | 3531 __ movptr(rax, Address(thread, Thread::pending_exception_offset())); |
| 0 | 3532 __ jump(RuntimeAddress(StubRoutines::forward_exception_entry())); |
| 3533 | |
| 3534 // ------------- | |
| 3535 // make sure all code is generated | |
| 3536 masm->flush(); | |
| 3537 | |
| 3538 // return the blob | |
| 3539 // frame_size_words or bytes?? | |
| 3540 return RuntimeStub::new_runtime_stub(name, &buffer, frame_complete, frame_size_words, oop_maps, true); | |
| 3541 } |