annotate src/share/vm/c1/c1_LIR.cpp @ 6739:8a02ca5e5576

7195816: NPG: Crash in c1_ValueType - ShouldNotReachHere Summary: C1 needs knowledge of T_METADATA at the LIR level. Reviewed-by: kvn, coleenp
author roland
date Tue, 11 Sep 2012 16:20:57 +0200
parents da91efe96a93
children 7eca5de9e0b6
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1 /*
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2 * Copyright (c) 2000, 2012, Oracle and/or its affiliates. All rights reserved.
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3 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
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4 *
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5 * This code is free software; you can redistribute it and/or modify it
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6 * under the terms of the GNU General Public License version 2 only, as
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7 * published by the Free Software Foundation.
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8 *
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9 * This code is distributed in the hope that it will be useful, but WITHOUT
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10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
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12 * version 2 for more details (a copy is included in the LICENSE file that
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13 * accompanied this code).
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14 *
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15 * You should have received a copy of the GNU General Public License version
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16 * 2 along with this work; if not, write to the Free Software Foundation,
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17 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
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18 *
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19 * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
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20 * or visit www.oracle.com if you need additional information or have any
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21 * questions.
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22 *
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23 */
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24
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25 #include "precompiled.hpp"
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26 #include "c1/c1_InstructionPrinter.hpp"
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27 #include "c1/c1_LIR.hpp"
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28 #include "c1/c1_LIRAssembler.hpp"
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29 #include "c1/c1_ValueStack.hpp"
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30 #include "ci/ciInstance.hpp"
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31 #include "runtime/sharedRuntime.hpp"
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32
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33 Register LIR_OprDesc::as_register() const {
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34 return FrameMap::cpu_rnr2reg(cpu_regnr());
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35 }
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36
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37 Register LIR_OprDesc::as_register_lo() const {
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38 return FrameMap::cpu_rnr2reg(cpu_regnrLo());
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39 }
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40
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41 Register LIR_OprDesc::as_register_hi() const {
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42 return FrameMap::cpu_rnr2reg(cpu_regnrHi());
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43 }
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44
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45 #if defined(X86)
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46
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47 XMMRegister LIR_OprDesc::as_xmm_float_reg() const {
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48 return FrameMap::nr2xmmreg(xmm_regnr());
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49 }
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50
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51 XMMRegister LIR_OprDesc::as_xmm_double_reg() const {
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52 assert(xmm_regnrLo() == xmm_regnrHi(), "assumed in calculation");
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53 return FrameMap::nr2xmmreg(xmm_regnrLo());
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54 }
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55
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56 #endif // X86
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57
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58 #if defined(SPARC) || defined(PPC)
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59
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60 FloatRegister LIR_OprDesc::as_float_reg() const {
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61 return FrameMap::nr2floatreg(fpu_regnr());
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62 }
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63
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64 FloatRegister LIR_OprDesc::as_double_reg() const {
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65 return FrameMap::nr2floatreg(fpu_regnrHi());
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66 }
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67
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68 #endif
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69
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70 #ifdef ARM
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71
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72 FloatRegister LIR_OprDesc::as_float_reg() const {
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73 return as_FloatRegister(fpu_regnr());
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74 }
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75
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76 FloatRegister LIR_OprDesc::as_double_reg() const {
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77 return as_FloatRegister(fpu_regnrLo());
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78 }
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79
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80 #endif
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81
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82
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83 LIR_Opr LIR_OprFact::illegalOpr = LIR_OprFact::illegal();
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84
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85 LIR_Opr LIR_OprFact::value_type(ValueType* type) {
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86 ValueTag tag = type->tag();
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87 switch (tag) {
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88 case metaDataTag : {
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89 ClassConstant* c = type->as_ClassConstant();
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90 if (c != NULL && !c->value()->is_loaded()) {
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91 return LIR_OprFact::metadataConst(NULL);
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92 } else if (c != NULL) {
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93 return LIR_OprFact::metadataConst(c->value()->constant_encoding());
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94 } else {
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95 MethodConstant* m = type->as_MethodConstant();
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96 assert (m != NULL, "not a class or a method?");
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97 return LIR_OprFact::metadataConst(m->value()->constant_encoding());
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98 }
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99 }
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100 case objectTag : {
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101 return LIR_OprFact::oopConst(type->as_ObjectType()->encoding());
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102 }
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103 case addressTag: return LIR_OprFact::addressConst(type->as_AddressConstant()->value());
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104 case intTag : return LIR_OprFact::intConst(type->as_IntConstant()->value());
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105 case floatTag : return LIR_OprFact::floatConst(type->as_FloatConstant()->value());
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106 case longTag : return LIR_OprFact::longConst(type->as_LongConstant()->value());
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107 case doubleTag : return LIR_OprFact::doubleConst(type->as_DoubleConstant()->value());
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108 default: ShouldNotReachHere(); return LIR_OprFact::intConst(-1);
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109 }
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110 }
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111
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112
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113 LIR_Opr LIR_OprFact::dummy_value_type(ValueType* type) {
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114 switch (type->tag()) {
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115 case objectTag: return LIR_OprFact::oopConst(NULL);
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116 case addressTag:return LIR_OprFact::addressConst(0);
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117 case intTag: return LIR_OprFact::intConst(0);
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118 case floatTag: return LIR_OprFact::floatConst(0.0);
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119 case longTag: return LIR_OprFact::longConst(0);
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120 case doubleTag: return LIR_OprFact::doubleConst(0.0);
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121 default: ShouldNotReachHere(); return LIR_OprFact::intConst(-1);
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122 }
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123 return illegalOpr;
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124 }
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125
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126
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127
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128 //---------------------------------------------------
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129
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130
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131 LIR_Address::Scale LIR_Address::scale(BasicType type) {
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132 int elem_size = type2aelembytes(type);
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133 switch (elem_size) {
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134 case 1: return LIR_Address::times_1;
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135 case 2: return LIR_Address::times_2;
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136 case 4: return LIR_Address::times_4;
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137 case 8: return LIR_Address::times_8;
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138 }
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139 ShouldNotReachHere();
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140 return LIR_Address::times_1;
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141 }
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142
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143
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144 #ifndef PRODUCT
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145 void LIR_Address::verify() const {
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146 #if defined(SPARC) || defined(PPC)
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147 assert(scale() == times_1, "Scaled addressing mode not available on SPARC/PPC and should not be used");
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148 assert(disp() == 0 || index()->is_illegal(), "can't have both");
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149 #endif
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150 #ifdef ARM
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151 assert(disp() == 0 || index()->is_illegal(), "can't have both");
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152 // Note: offsets higher than 4096 must not be rejected here. They can
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153 // be handled by the back-end or will be rejected if not.
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154 #endif
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155 #ifdef _LP64
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156 assert(base()->is_cpu_register(), "wrong base operand");
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157 assert(index()->is_illegal() || index()->is_double_cpu(), "wrong index operand");
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158 assert(base()->type() == T_OBJECT || base()->type() == T_LONG || base()->type() == T_METADATA,
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159 "wrong type for addresses");
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160 #else
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161 assert(base()->is_single_cpu(), "wrong base operand");
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162 assert(index()->is_illegal() || index()->is_single_cpu(), "wrong index operand");
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163 assert(base()->type() == T_OBJECT || base()->type() == T_INT || base()->type() == T_METADATA,
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164 "wrong type for addresses");
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165 #endif
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166 }
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167 #endif
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168
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169
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170 //---------------------------------------------------
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171
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172 char LIR_OprDesc::type_char(BasicType t) {
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173 switch (t) {
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174 case T_ARRAY:
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175 t = T_OBJECT;
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176 case T_BOOLEAN:
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177 case T_CHAR:
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178 case T_FLOAT:
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179 case T_DOUBLE:
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180 case T_BYTE:
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181 case T_SHORT:
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182 case T_INT:
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183 case T_LONG:
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184 case T_OBJECT:
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185 case T_ADDRESS:
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186 case T_METADATA:
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187 case T_VOID:
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188 return ::type2char(t);
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189
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190 case T_ILLEGAL:
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191 return '?';
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192
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193 default:
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194 ShouldNotReachHere();
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195 return '?';
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196 }
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197 }
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198
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199 #ifndef PRODUCT
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200 void LIR_OprDesc::validate_type() const {
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201
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202 #ifdef ASSERT
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203 if (!is_pointer() && !is_illegal()) {
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204 switch (as_BasicType(type_field())) {
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205 case T_LONG:
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206 assert((kind_field() == cpu_register || kind_field() == stack_value) &&
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207 size_field() == double_size, "must match");
0
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208 break;
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209 case T_FLOAT:
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210 // FP return values can be also in CPU registers on ARM and PPC (softfp ABI)
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211 assert((kind_field() == fpu_register || kind_field() == stack_value
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212 ARM_ONLY(|| kind_field() == cpu_register)
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213 PPC_ONLY(|| kind_field() == cpu_register) ) &&
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214 size_field() == single_size, "must match");
0
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215 break;
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216 case T_DOUBLE:
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217 // FP return values can be also in CPU registers on ARM and PPC (softfp ABI)
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218 assert((kind_field() == fpu_register || kind_field() == stack_value
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219 ARM_ONLY(|| kind_field() == cpu_register)
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220 PPC_ONLY(|| kind_field() == cpu_register) ) &&
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221 size_field() == double_size, "must match");
0
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222 break;
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223 case T_BOOLEAN:
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224 case T_CHAR:
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225 case T_BYTE:
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226 case T_SHORT:
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227 case T_INT:
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diff changeset
228 case T_ADDRESS:
0
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229 case T_OBJECT:
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230 case T_METADATA:
0
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231 case T_ARRAY:
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232 assert((kind_field() == cpu_register || kind_field() == stack_value) &&
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233 size_field() == single_size, "must match");
0
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234 break;
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235
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236 case T_ILLEGAL:
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237 // XXX TKR also means unknown right now
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238 // assert(is_illegal(), "must match");
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239 break;
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240
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241 default:
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242 ShouldNotReachHere();
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243 }
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244 }
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245 #endif
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246
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247 }
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248 #endif // PRODUCT
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249
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250
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251 bool LIR_OprDesc::is_oop() const {
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252 if (is_pointer()) {
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253 return pointer()->is_oop_pointer();
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254 } else {
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255 OprType t= type_field();
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256 assert(t != unknown_type, "not set");
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257 return t == object_type;
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258 }
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259 }
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260
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261
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262
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263 void LIR_Op2::verify() const {
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264 #ifdef ASSERT
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265 switch (code()) {
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266 case lir_cmove:
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267 break;
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268
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269 default:
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270 assert(!result_opr()->is_register() || !result_opr()->is_oop_register(),
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271 "can't produce oops from arith");
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272 }
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273
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274 if (TwoOperandLIRForm) {
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275 switch (code()) {
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276 case lir_add:
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277 case lir_sub:
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278 case lir_mul:
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279 case lir_mul_strictfp:
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280 case lir_div:
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281 case lir_div_strictfp:
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282 case lir_rem:
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283 case lir_logic_and:
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284 case lir_logic_or:
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285 case lir_logic_xor:
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286 case lir_shl:
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287 case lir_shr:
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288 assert(in_opr1() == result_opr(), "opr1 and result must match");
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289 assert(in_opr1()->is_valid() && in_opr2()->is_valid(), "must be valid");
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290 break;
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291
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292 // special handling for lir_ushr because of write barriers
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293 case lir_ushr:
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294 assert(in_opr1() == result_opr() || in_opr2()->is_constant(), "opr1 and result must match or shift count is constant");
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295 assert(in_opr1()->is_valid() && in_opr2()->is_valid(), "must be valid");
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296 break;
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297
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298 }
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299 }
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300 #endif
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301 }
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302
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303
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304 LIR_OpBranch::LIR_OpBranch(LIR_Condition cond, BasicType type, BlockBegin* block)
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305 : LIR_Op(lir_branch, LIR_OprFact::illegalOpr, (CodeEmitInfo*)NULL)
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306 , _cond(cond)
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307 , _type(type)
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308 , _label(block->label())
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309 , _block(block)
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310 , _ublock(NULL)
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311 , _stub(NULL) {
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312 }
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313
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314 LIR_OpBranch::LIR_OpBranch(LIR_Condition cond, BasicType type, CodeStub* stub) :
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315 LIR_Op(lir_branch, LIR_OprFact::illegalOpr, (CodeEmitInfo*)NULL)
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316 , _cond(cond)
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317 , _type(type)
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318 , _label(stub->entry())
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319 , _block(NULL)
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320 , _ublock(NULL)
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321 , _stub(stub) {
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322 }
a61af66fc99e Initial load
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323
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324 LIR_OpBranch::LIR_OpBranch(LIR_Condition cond, BasicType type, BlockBegin* block, BlockBegin* ublock)
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325 : LIR_Op(lir_cond_float_branch, LIR_OprFact::illegalOpr, (CodeEmitInfo*)NULL)
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326 , _cond(cond)
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327 , _type(type)
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328 , _label(block->label())
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329 , _block(block)
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330 , _ublock(ublock)
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331 , _stub(NULL)
a61af66fc99e Initial load
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332 {
a61af66fc99e Initial load
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333 }
a61af66fc99e Initial load
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parents:
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334
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335 void LIR_OpBranch::change_block(BlockBegin* b) {
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336 assert(_block != NULL, "must have old block");
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337 assert(_block->label() == label(), "must be equal");
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338
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339 _block = b;
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340 _label = b->label();
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341 }
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342
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343 void LIR_OpBranch::change_ublock(BlockBegin* b) {
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344 assert(_ublock != NULL, "must have old block");
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345 _ublock = b;
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346 }
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347
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348 void LIR_OpBranch::negate_cond() {
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349 switch (_cond) {
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parents:
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350 case lir_cond_equal: _cond = lir_cond_notEqual; break;
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diff changeset
351 case lir_cond_notEqual: _cond = lir_cond_equal; break;
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parents:
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352 case lir_cond_less: _cond = lir_cond_greaterEqual; break;
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353 case lir_cond_lessEqual: _cond = lir_cond_greater; break;
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354 case lir_cond_greaterEqual: _cond = lir_cond_less; break;
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355 case lir_cond_greater: _cond = lir_cond_lessEqual; break;
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356 default: ShouldNotReachHere();
a61af66fc99e Initial load
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357 }
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358 }
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359
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360
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361 LIR_OpTypeCheck::LIR_OpTypeCheck(LIR_Code code, LIR_Opr result, LIR_Opr object, ciKlass* klass,
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362 LIR_Opr tmp1, LIR_Opr tmp2, LIR_Opr tmp3,
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363 bool fast_check, CodeEmitInfo* info_for_exception, CodeEmitInfo* info_for_patch,
1783
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iveresov
parents: 1681
diff changeset
364 CodeStub* stub)
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365
0
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366 : LIR_Op(code, result, NULL)
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367 , _object(object)
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368 , _array(LIR_OprFact::illegalOpr)
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369 , _klass(klass)
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parents:
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370 , _tmp1(tmp1)
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371 , _tmp2(tmp2)
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372 , _tmp3(tmp3)
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373 , _fast_check(fast_check)
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374 , _stub(stub)
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375 , _info_for_patch(info_for_patch)
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376 , _info_for_exception(info_for_exception)
1783
d5d065957597 6953144: Tiered compilation
iveresov
parents: 1681
diff changeset
377 , _profiled_method(NULL)
d5d065957597 6953144: Tiered compilation
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parents: 1681
diff changeset
378 , _profiled_bci(-1)
d5d065957597 6953144: Tiered compilation
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parents: 1681
diff changeset
379 , _should_profile(false)
d5d065957597 6953144: Tiered compilation
iveresov
parents: 1681
diff changeset
380 {
0
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parents:
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381 if (code == lir_checkcast) {
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parents:
diff changeset
382 assert(info_for_exception != NULL, "checkcast throws exceptions");
a61af66fc99e Initial load
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parents:
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383 } else if (code == lir_instanceof) {
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384 assert(info_for_exception == NULL, "instanceof throws no exceptions");
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385 } else {
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386 ShouldNotReachHere();
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diff changeset
387 }
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388 }
a61af66fc99e Initial load
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389
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390
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parents:
diff changeset
391
1783
d5d065957597 6953144: Tiered compilation
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parents: 1681
diff changeset
392 LIR_OpTypeCheck::LIR_OpTypeCheck(LIR_Code code, LIR_Opr object, LIR_Opr array, LIR_Opr tmp1, LIR_Opr tmp2, LIR_Opr tmp3, CodeEmitInfo* info_for_exception)
0
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393 : LIR_Op(code, LIR_OprFact::illegalOpr, NULL)
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394 , _object(object)
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parents:
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395 , _array(array)
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parents:
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396 , _klass(NULL)
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parents:
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397 , _tmp1(tmp1)
a61af66fc99e Initial load
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parents:
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398 , _tmp2(tmp2)
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parents:
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399 , _tmp3(tmp3)
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parents:
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400 , _fast_check(false)
a61af66fc99e Initial load
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parents:
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401 , _stub(NULL)
a61af66fc99e Initial load
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parents:
diff changeset
402 , _info_for_patch(NULL)
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parents:
diff changeset
403 , _info_for_exception(info_for_exception)
1783
d5d065957597 6953144: Tiered compilation
iveresov
parents: 1681
diff changeset
404 , _profiled_method(NULL)
d5d065957597 6953144: Tiered compilation
iveresov
parents: 1681
diff changeset
405 , _profiled_bci(-1)
d5d065957597 6953144: Tiered compilation
iveresov
parents: 1681
diff changeset
406 , _should_profile(false)
d5d065957597 6953144: Tiered compilation
iveresov
parents: 1681
diff changeset
407 {
0
a61af66fc99e Initial load
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parents:
diff changeset
408 if (code == lir_store_check) {
2168
e4fee0bdaa85 7008809: should report the class in ArrayStoreExceptions from compiled code
never
parents: 2002
diff changeset
409 _stub = new ArrayStoreExceptionStub(object, info_for_exception);
0
a61af66fc99e Initial load
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parents:
diff changeset
410 assert(info_for_exception != NULL, "store_check throws exceptions");
a61af66fc99e Initial load
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parents:
diff changeset
411 } else {
a61af66fc99e Initial load
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parents:
diff changeset
412 ShouldNotReachHere();
a61af66fc99e Initial load
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parents:
diff changeset
413 }
a61af66fc99e Initial load
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parents:
diff changeset
414 }
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parents:
diff changeset
415
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parents:
diff changeset
416
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parents:
diff changeset
417 LIR_OpArrayCopy::LIR_OpArrayCopy(LIR_Opr src, LIR_Opr src_pos, LIR_Opr dst, LIR_Opr dst_pos, LIR_Opr length,
a61af66fc99e Initial load
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parents:
diff changeset
418 LIR_Opr tmp, ciArrayKlass* expected_type, int flags, CodeEmitInfo* info)
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parents:
diff changeset
419 : LIR_Op(lir_arraycopy, LIR_OprFact::illegalOpr, info)
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parents:
diff changeset
420 , _tmp(tmp)
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parents:
diff changeset
421 , _src(src)
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parents:
diff changeset
422 , _src_pos(src_pos)
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parents:
diff changeset
423 , _dst(dst)
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parents:
diff changeset
424 , _dst_pos(dst_pos)
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parents:
diff changeset
425 , _flags(flags)
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parents:
diff changeset
426 , _expected_type(expected_type)
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parents:
diff changeset
427 , _length(length) {
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parents:
diff changeset
428 _stub = new ArrayCopyStub(this);
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parents:
diff changeset
429 }
a61af66fc99e Initial load
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parents:
diff changeset
430
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parents:
diff changeset
431
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parents:
diff changeset
432 //-------------------verify--------------------------
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parents:
diff changeset
433
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parents:
diff changeset
434 void LIR_Op1::verify() const {
a61af66fc99e Initial load
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parents:
diff changeset
435 switch(code()) {
a61af66fc99e Initial load
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parents:
diff changeset
436 case lir_move:
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parents:
diff changeset
437 assert(in_opr()->is_valid() && result_opr()->is_valid(), "must be");
a61af66fc99e Initial load
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parents:
diff changeset
438 break;
a61af66fc99e Initial load
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parents:
diff changeset
439 case lir_null_check:
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parents:
diff changeset
440 assert(in_opr()->is_register(), "must be");
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parents:
diff changeset
441 break;
a61af66fc99e Initial load
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parents:
diff changeset
442 case lir_return:
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parents:
diff changeset
443 assert(in_opr()->is_register() || in_opr()->is_illegal(), "must be");
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parents:
diff changeset
444 break;
a61af66fc99e Initial load
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parents:
diff changeset
445 }
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parents:
diff changeset
446 }
a61af66fc99e Initial load
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parents:
diff changeset
447
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parents:
diff changeset
448 void LIR_OpRTCall::verify() const {
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parents:
diff changeset
449 assert(strcmp(Runtime1::name_for_address(addr()), "<unknown function>") != 0, "unknown function");
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parents:
diff changeset
450 }
a61af66fc99e Initial load
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parents:
diff changeset
451
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parents:
diff changeset
452 //-------------------visits--------------------------
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parents:
diff changeset
453
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parents:
diff changeset
454 // complete rework of LIR instruction visitor.
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parents:
diff changeset
455 // The virtual calls for each instruction type is replaced by a big
a61af66fc99e Initial load
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parents:
diff changeset
456 // switch that adds the operands for each instruction
a61af66fc99e Initial load
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parents:
diff changeset
457
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parents:
diff changeset
458 void LIR_OpVisitState::visit(LIR_Op* op) {
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parents:
diff changeset
459 // copy information from the LIR_Op
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diff changeset
460 reset();
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parents:
diff changeset
461 set_op(op);
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parents:
diff changeset
462
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parents:
diff changeset
463 switch (op->code()) {
a61af66fc99e Initial load
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parents:
diff changeset
464
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parents:
diff changeset
465 // LIR_Op0
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diff changeset
466 case lir_word_align: // result and info always invalid
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parents:
diff changeset
467 case lir_backwardbranch_target: // result and info always invalid
a61af66fc99e Initial load
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parents:
diff changeset
468 case lir_build_frame: // result and info always invalid
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parents:
diff changeset
469 case lir_fpop_raw: // result and info always invalid
a61af66fc99e Initial load
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parents:
diff changeset
470 case lir_24bit_FPU: // result and info always invalid
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parents:
diff changeset
471 case lir_reset_FPU: // result and info always invalid
a61af66fc99e Initial load
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parents:
diff changeset
472 case lir_breakpoint: // result and info always invalid
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parents:
diff changeset
473 case lir_membar: // result and info always invalid
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parents:
diff changeset
474 case lir_membar_acquire: // result and info always invalid
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parents:
diff changeset
475 case lir_membar_release: // result and info always invalid
4966
701a83c86f28 7120481: storeStore barrier in constructor with final field
jiangli
parents: 4765
diff changeset
476 case lir_membar_loadload: // result and info always invalid
701a83c86f28 7120481: storeStore barrier in constructor with final field
jiangli
parents: 4765
diff changeset
477 case lir_membar_storestore: // result and info always invalid
701a83c86f28 7120481: storeStore barrier in constructor with final field
jiangli
parents: 4765
diff changeset
478 case lir_membar_loadstore: // result and info always invalid
701a83c86f28 7120481: storeStore barrier in constructor with final field
jiangli
parents: 4765
diff changeset
479 case lir_membar_storeload: // result and info always invalid
0
a61af66fc99e Initial load
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parents:
diff changeset
480 {
a61af66fc99e Initial load
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parents:
diff changeset
481 assert(op->as_Op0() != NULL, "must be");
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parents:
diff changeset
482 assert(op->_info == NULL, "info not used by this instruction");
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parents:
diff changeset
483 assert(op->_result->is_illegal(), "not used");
a61af66fc99e Initial load
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parents:
diff changeset
484 break;
a61af66fc99e Initial load
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parents:
diff changeset
485 }
a61af66fc99e Initial load
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parents:
diff changeset
486
a61af66fc99e Initial load
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parents:
diff changeset
487 case lir_nop: // may have info, result always invalid
a61af66fc99e Initial load
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parents:
diff changeset
488 case lir_std_entry: // may have result, info always invalid
a61af66fc99e Initial load
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parents:
diff changeset
489 case lir_osr_entry: // may have result, info always invalid
a61af66fc99e Initial load
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parents:
diff changeset
490 case lir_get_thread: // may have result, info always invalid
a61af66fc99e Initial load
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parents:
diff changeset
491 {
a61af66fc99e Initial load
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parents:
diff changeset
492 assert(op->as_Op0() != NULL, "must be");
a61af66fc99e Initial load
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parents:
diff changeset
493 if (op->_info != NULL) do_info(op->_info);
a61af66fc99e Initial load
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parents:
diff changeset
494 if (op->_result->is_valid()) do_output(op->_result);
a61af66fc99e Initial load
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parents:
diff changeset
495 break;
a61af66fc99e Initial load
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parents:
diff changeset
496 }
a61af66fc99e Initial load
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parents:
diff changeset
497
a61af66fc99e Initial load
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parents:
diff changeset
498
a61af66fc99e Initial load
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parents:
diff changeset
499 // LIR_OpLabel
a61af66fc99e Initial load
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parents:
diff changeset
500 case lir_label: // result and info always invalid
a61af66fc99e Initial load
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parents:
diff changeset
501 {
a61af66fc99e Initial load
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parents:
diff changeset
502 assert(op->as_OpLabel() != NULL, "must be");
a61af66fc99e Initial load
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parents:
diff changeset
503 assert(op->_info == NULL, "info not used by this instruction");
a61af66fc99e Initial load
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parents:
diff changeset
504 assert(op->_result->is_illegal(), "not used");
a61af66fc99e Initial load
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parents:
diff changeset
505 break;
a61af66fc99e Initial load
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parents:
diff changeset
506 }
a61af66fc99e Initial load
duke
parents:
diff changeset
507
a61af66fc99e Initial load
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parents:
diff changeset
508
a61af66fc99e Initial load
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parents:
diff changeset
509 // LIR_Op1
a61af66fc99e Initial load
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parents:
diff changeset
510 case lir_fxch: // input always valid, result and info always invalid
a61af66fc99e Initial load
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parents:
diff changeset
511 case lir_fld: // input always valid, result and info always invalid
a61af66fc99e Initial load
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parents:
diff changeset
512 case lir_ffree: // input always valid, result and info always invalid
a61af66fc99e Initial load
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parents:
diff changeset
513 case lir_push: // input always valid, result and info always invalid
a61af66fc99e Initial load
duke
parents:
diff changeset
514 case lir_pop: // input always valid, result and info always invalid
a61af66fc99e Initial load
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parents:
diff changeset
515 case lir_return: // input always valid, result and info always invalid
a61af66fc99e Initial load
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parents:
diff changeset
516 case lir_leal: // input and result always valid, info always invalid
a61af66fc99e Initial load
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parents:
diff changeset
517 case lir_neg: // input and result always valid, info always invalid
a61af66fc99e Initial load
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parents:
diff changeset
518 case lir_monaddr: // input and result always valid, info always invalid
a61af66fc99e Initial load
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parents:
diff changeset
519 case lir_null_check: // input and info always valid, result always invalid
a61af66fc99e Initial load
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parents:
diff changeset
520 case lir_move: // input and result always valid, may have info
1783
d5d065957597 6953144: Tiered compilation
iveresov
parents: 1681
diff changeset
521 case lir_pack64: // input and result always valid
d5d065957597 6953144: Tiered compilation
iveresov
parents: 1681
diff changeset
522 case lir_unpack64: // input and result always valid
0
a61af66fc99e Initial load
duke
parents:
diff changeset
523 case lir_prefetchr: // input always valid, result and info always invalid
a61af66fc99e Initial load
duke
parents:
diff changeset
524 case lir_prefetchw: // input always valid, result and info always invalid
a61af66fc99e Initial load
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parents:
diff changeset
525 {
a61af66fc99e Initial load
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parents:
diff changeset
526 assert(op->as_Op1() != NULL, "must be");
a61af66fc99e Initial load
duke
parents:
diff changeset
527 LIR_Op1* op1 = (LIR_Op1*)op;
a61af66fc99e Initial load
duke
parents:
diff changeset
528
a61af66fc99e Initial load
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parents:
diff changeset
529 if (op1->_info) do_info(op1->_info);
a61af66fc99e Initial load
duke
parents:
diff changeset
530 if (op1->_opr->is_valid()) do_input(op1->_opr);
a61af66fc99e Initial load
duke
parents:
diff changeset
531 if (op1->_result->is_valid()) do_output(op1->_result);
a61af66fc99e Initial load
duke
parents:
diff changeset
532
a61af66fc99e Initial load
duke
parents:
diff changeset
533 break;
a61af66fc99e Initial load
duke
parents:
diff changeset
534 }
a61af66fc99e Initial load
duke
parents:
diff changeset
535
a61af66fc99e Initial load
duke
parents:
diff changeset
536 case lir_safepoint:
a61af66fc99e Initial load
duke
parents:
diff changeset
537 {
a61af66fc99e Initial load
duke
parents:
diff changeset
538 assert(op->as_Op1() != NULL, "must be");
a61af66fc99e Initial load
duke
parents:
diff changeset
539 LIR_Op1* op1 = (LIR_Op1*)op;
a61af66fc99e Initial load
duke
parents:
diff changeset
540
a61af66fc99e Initial load
duke
parents:
diff changeset
541 assert(op1->_info != NULL, ""); do_info(op1->_info);
a61af66fc99e Initial load
duke
parents:
diff changeset
542 if (op1->_opr->is_valid()) do_temp(op1->_opr); // safepoints on SPARC need temporary register
a61af66fc99e Initial load
duke
parents:
diff changeset
543 assert(op1->_result->is_illegal(), "safepoint does not produce value");
a61af66fc99e Initial load
duke
parents:
diff changeset
544
a61af66fc99e Initial load
duke
parents:
diff changeset
545 break;
a61af66fc99e Initial load
duke
parents:
diff changeset
546 }
a61af66fc99e Initial load
duke
parents:
diff changeset
547
a61af66fc99e Initial load
duke
parents:
diff changeset
548 // LIR_OpConvert;
a61af66fc99e Initial load
duke
parents:
diff changeset
549 case lir_convert: // input and result always valid, info always invalid
a61af66fc99e Initial load
duke
parents:
diff changeset
550 {
a61af66fc99e Initial load
duke
parents:
diff changeset
551 assert(op->as_OpConvert() != NULL, "must be");
a61af66fc99e Initial load
duke
parents:
diff changeset
552 LIR_OpConvert* opConvert = (LIR_OpConvert*)op;
a61af66fc99e Initial load
duke
parents:
diff changeset
553
a61af66fc99e Initial load
duke
parents:
diff changeset
554 assert(opConvert->_info == NULL, "must be");
a61af66fc99e Initial load
duke
parents:
diff changeset
555 if (opConvert->_opr->is_valid()) do_input(opConvert->_opr);
a61af66fc99e Initial load
duke
parents:
diff changeset
556 if (opConvert->_result->is_valid()) do_output(opConvert->_result);
1681
126ea7725993 6953477: Increase portability and flexibility of building Hotspot
bobv
parents: 1579
diff changeset
557 #ifdef PPC
126ea7725993 6953477: Increase portability and flexibility of building Hotspot
bobv
parents: 1579
diff changeset
558 if (opConvert->_tmp1->is_valid()) do_temp(opConvert->_tmp1);
126ea7725993 6953477: Increase portability and flexibility of building Hotspot
bobv
parents: 1579
diff changeset
559 if (opConvert->_tmp2->is_valid()) do_temp(opConvert->_tmp2);
126ea7725993 6953477: Increase portability and flexibility of building Hotspot
bobv
parents: 1579
diff changeset
560 #endif
0
a61af66fc99e Initial load
duke
parents:
diff changeset
561 do_stub(opConvert->_stub);
a61af66fc99e Initial load
duke
parents:
diff changeset
562
a61af66fc99e Initial load
duke
parents:
diff changeset
563 break;
a61af66fc99e Initial load
duke
parents:
diff changeset
564 }
a61af66fc99e Initial load
duke
parents:
diff changeset
565
a61af66fc99e Initial load
duke
parents:
diff changeset
566 // LIR_OpBranch;
a61af66fc99e Initial load
duke
parents:
diff changeset
567 case lir_branch: // may have info, input and result register always invalid
a61af66fc99e Initial load
duke
parents:
diff changeset
568 case lir_cond_float_branch: // may have info, input and result register always invalid
a61af66fc99e Initial load
duke
parents:
diff changeset
569 {
a61af66fc99e Initial load
duke
parents:
diff changeset
570 assert(op->as_OpBranch() != NULL, "must be");
a61af66fc99e Initial load
duke
parents:
diff changeset
571 LIR_OpBranch* opBranch = (LIR_OpBranch*)op;
a61af66fc99e Initial load
duke
parents:
diff changeset
572
a61af66fc99e Initial load
duke
parents:
diff changeset
573 if (opBranch->_info != NULL) do_info(opBranch->_info);
a61af66fc99e Initial load
duke
parents:
diff changeset
574 assert(opBranch->_result->is_illegal(), "not used");
a61af66fc99e Initial load
duke
parents:
diff changeset
575 if (opBranch->_stub != NULL) opBranch->stub()->visit(this);
a61af66fc99e Initial load
duke
parents:
diff changeset
576
a61af66fc99e Initial load
duke
parents:
diff changeset
577 break;
a61af66fc99e Initial load
duke
parents:
diff changeset
578 }
a61af66fc99e Initial load
duke
parents:
diff changeset
579
a61af66fc99e Initial load
duke
parents:
diff changeset
580
a61af66fc99e Initial load
duke
parents:
diff changeset
581 // LIR_OpAllocObj
a61af66fc99e Initial load
duke
parents:
diff changeset
582 case lir_alloc_object:
a61af66fc99e Initial load
duke
parents:
diff changeset
583 {
a61af66fc99e Initial load
duke
parents:
diff changeset
584 assert(op->as_OpAllocObj() != NULL, "must be");
a61af66fc99e Initial load
duke
parents:
diff changeset
585 LIR_OpAllocObj* opAllocObj = (LIR_OpAllocObj*)op;
a61af66fc99e Initial load
duke
parents:
diff changeset
586
a61af66fc99e Initial load
duke
parents:
diff changeset
587 if (opAllocObj->_info) do_info(opAllocObj->_info);
1681
126ea7725993 6953477: Increase portability and flexibility of building Hotspot
bobv
parents: 1579
diff changeset
588 if (opAllocObj->_opr->is_valid()) { do_input(opAllocObj->_opr);
126ea7725993 6953477: Increase portability and flexibility of building Hotspot
bobv
parents: 1579
diff changeset
589 do_temp(opAllocObj->_opr);
126ea7725993 6953477: Increase portability and flexibility of building Hotspot
bobv
parents: 1579
diff changeset
590 }
0
a61af66fc99e Initial load
duke
parents:
diff changeset
591 if (opAllocObj->_tmp1->is_valid()) do_temp(opAllocObj->_tmp1);
a61af66fc99e Initial load
duke
parents:
diff changeset
592 if (opAllocObj->_tmp2->is_valid()) do_temp(opAllocObj->_tmp2);
a61af66fc99e Initial load
duke
parents:
diff changeset
593 if (opAllocObj->_tmp3->is_valid()) do_temp(opAllocObj->_tmp3);
a61af66fc99e Initial load
duke
parents:
diff changeset
594 if (opAllocObj->_tmp4->is_valid()) do_temp(opAllocObj->_tmp4);
a61af66fc99e Initial load
duke
parents:
diff changeset
595 if (opAllocObj->_result->is_valid()) do_output(opAllocObj->_result);
a61af66fc99e Initial load
duke
parents:
diff changeset
596 do_stub(opAllocObj->_stub);
a61af66fc99e Initial load
duke
parents:
diff changeset
597 break;
a61af66fc99e Initial load
duke
parents:
diff changeset
598 }
a61af66fc99e Initial load
duke
parents:
diff changeset
599
a61af66fc99e Initial load
duke
parents:
diff changeset
600
a61af66fc99e Initial load
duke
parents:
diff changeset
601 // LIR_OpRoundFP;
a61af66fc99e Initial load
duke
parents:
diff changeset
602 case lir_roundfp: {
a61af66fc99e Initial load
duke
parents:
diff changeset
603 assert(op->as_OpRoundFP() != NULL, "must be");
a61af66fc99e Initial load
duke
parents:
diff changeset
604 LIR_OpRoundFP* opRoundFP = (LIR_OpRoundFP*)op;
a61af66fc99e Initial load
duke
parents:
diff changeset
605
a61af66fc99e Initial load
duke
parents:
diff changeset
606 assert(op->_info == NULL, "info not used by this instruction");
a61af66fc99e Initial load
duke
parents:
diff changeset
607 assert(opRoundFP->_tmp->is_illegal(), "not used");
a61af66fc99e Initial load
duke
parents:
diff changeset
608 do_input(opRoundFP->_opr);
a61af66fc99e Initial load
duke
parents:
diff changeset
609 do_output(opRoundFP->_result);
a61af66fc99e Initial load
duke
parents:
diff changeset
610
a61af66fc99e Initial load
duke
parents:
diff changeset
611 break;
a61af66fc99e Initial load
duke
parents:
diff changeset
612 }
a61af66fc99e Initial load
duke
parents:
diff changeset
613
a61af66fc99e Initial load
duke
parents:
diff changeset
614
a61af66fc99e Initial load
duke
parents:
diff changeset
615 // LIR_Op2
a61af66fc99e Initial load
duke
parents:
diff changeset
616 case lir_cmp:
a61af66fc99e Initial load
duke
parents:
diff changeset
617 case lir_cmp_l2i:
a61af66fc99e Initial load
duke
parents:
diff changeset
618 case lir_ucmp_fd2i:
a61af66fc99e Initial load
duke
parents:
diff changeset
619 case lir_cmp_fd2i:
a61af66fc99e Initial load
duke
parents:
diff changeset
620 case lir_add:
a61af66fc99e Initial load
duke
parents:
diff changeset
621 case lir_sub:
a61af66fc99e Initial load
duke
parents:
diff changeset
622 case lir_mul:
a61af66fc99e Initial load
duke
parents:
diff changeset
623 case lir_div:
a61af66fc99e Initial load
duke
parents:
diff changeset
624 case lir_rem:
a61af66fc99e Initial load
duke
parents:
diff changeset
625 case lir_sqrt:
a61af66fc99e Initial load
duke
parents:
diff changeset
626 case lir_abs:
a61af66fc99e Initial load
duke
parents:
diff changeset
627 case lir_logic_and:
a61af66fc99e Initial load
duke
parents:
diff changeset
628 case lir_logic_or:
a61af66fc99e Initial load
duke
parents:
diff changeset
629 case lir_logic_xor:
a61af66fc99e Initial load
duke
parents:
diff changeset
630 case lir_shl:
a61af66fc99e Initial load
duke
parents:
diff changeset
631 case lir_shr:
a61af66fc99e Initial load
duke
parents:
diff changeset
632 case lir_ushr:
a61af66fc99e Initial load
duke
parents:
diff changeset
633 {
a61af66fc99e Initial load
duke
parents:
diff changeset
634 assert(op->as_Op2() != NULL, "must be");
a61af66fc99e Initial load
duke
parents:
diff changeset
635 LIR_Op2* op2 = (LIR_Op2*)op;
6084
6759698e3140 7133857: exp() and pow() should use the x87 ISA on x86
roland
parents: 4966
diff changeset
636 assert(op2->_tmp2->is_illegal() && op2->_tmp3->is_illegal() &&
6759698e3140 7133857: exp() and pow() should use the x87 ISA on x86
roland
parents: 4966
diff changeset
637 op2->_tmp4->is_illegal() && op2->_tmp5->is_illegal(), "not used");
0
a61af66fc99e Initial load
duke
parents:
diff changeset
638
a61af66fc99e Initial load
duke
parents:
diff changeset
639 if (op2->_info) do_info(op2->_info);
a61af66fc99e Initial load
duke
parents:
diff changeset
640 if (op2->_opr1->is_valid()) do_input(op2->_opr1);
a61af66fc99e Initial load
duke
parents:
diff changeset
641 if (op2->_opr2->is_valid()) do_input(op2->_opr2);
6084
6759698e3140 7133857: exp() and pow() should use the x87 ISA on x86
roland
parents: 4966
diff changeset
642 if (op2->_tmp1->is_valid()) do_temp(op2->_tmp1);
0
a61af66fc99e Initial load
duke
parents:
diff changeset
643 if (op2->_result->is_valid()) do_output(op2->_result);
a61af66fc99e Initial load
duke
parents:
diff changeset
644
a61af66fc99e Initial load
duke
parents:
diff changeset
645 break;
a61af66fc99e Initial load
duke
parents:
diff changeset
646 }
a61af66fc99e Initial load
duke
parents:
diff changeset
647
a61af66fc99e Initial load
duke
parents:
diff changeset
648 // special handling for cmove: right input operand must not be equal
a61af66fc99e Initial load
duke
parents:
diff changeset
649 // to the result operand, otherwise the backend fails
a61af66fc99e Initial load
duke
parents:
diff changeset
650 case lir_cmove:
a61af66fc99e Initial load
duke
parents:
diff changeset
651 {
a61af66fc99e Initial load
duke
parents:
diff changeset
652 assert(op->as_Op2() != NULL, "must be");
a61af66fc99e Initial load
duke
parents:
diff changeset
653 LIR_Op2* op2 = (LIR_Op2*)op;
a61af66fc99e Initial load
duke
parents:
diff changeset
654
6084
6759698e3140 7133857: exp() and pow() should use the x87 ISA on x86
roland
parents: 4966
diff changeset
655 assert(op2->_info == NULL && op2->_tmp1->is_illegal() && op2->_tmp2->is_illegal() &&
6759698e3140 7133857: exp() and pow() should use the x87 ISA on x86
roland
parents: 4966
diff changeset
656 op2->_tmp3->is_illegal() && op2->_tmp4->is_illegal() && op2->_tmp5->is_illegal(), "not used");
0
a61af66fc99e Initial load
duke
parents:
diff changeset
657 assert(op2->_opr1->is_valid() && op2->_opr2->is_valid() && op2->_result->is_valid(), "used");
a61af66fc99e Initial load
duke
parents:
diff changeset
658
a61af66fc99e Initial load
duke
parents:
diff changeset
659 do_input(op2->_opr1);
a61af66fc99e Initial load
duke
parents:
diff changeset
660 do_input(op2->_opr2);
a61af66fc99e Initial load
duke
parents:
diff changeset
661 do_temp(op2->_opr2);
a61af66fc99e Initial load
duke
parents:
diff changeset
662 do_output(op2->_result);
a61af66fc99e Initial load
duke
parents:
diff changeset
663
a61af66fc99e Initial load
duke
parents:
diff changeset
664 break;
a61af66fc99e Initial load
duke
parents:
diff changeset
665 }
a61af66fc99e Initial load
duke
parents:
diff changeset
666
a61af66fc99e Initial load
duke
parents:
diff changeset
667 // vspecial handling for strict operations: register input operands
a61af66fc99e Initial load
duke
parents:
diff changeset
668 // as temp to guarantee that they do not overlap with other
a61af66fc99e Initial load
duke
parents:
diff changeset
669 // registers
a61af66fc99e Initial load
duke
parents:
diff changeset
670 case lir_mul_strictfp:
a61af66fc99e Initial load
duke
parents:
diff changeset
671 case lir_div_strictfp:
a61af66fc99e Initial load
duke
parents:
diff changeset
672 {
a61af66fc99e Initial load
duke
parents:
diff changeset
673 assert(op->as_Op2() != NULL, "must be");
a61af66fc99e Initial load
duke
parents:
diff changeset
674 LIR_Op2* op2 = (LIR_Op2*)op;
a61af66fc99e Initial load
duke
parents:
diff changeset
675
a61af66fc99e Initial load
duke
parents:
diff changeset
676 assert(op2->_info == NULL, "not used");
a61af66fc99e Initial load
duke
parents:
diff changeset
677 assert(op2->_opr1->is_valid(), "used");
a61af66fc99e Initial load
duke
parents:
diff changeset
678 assert(op2->_opr2->is_valid(), "used");
a61af66fc99e Initial load
duke
parents:
diff changeset
679 assert(op2->_result->is_valid(), "used");
6084
6759698e3140 7133857: exp() and pow() should use the x87 ISA on x86
roland
parents: 4966
diff changeset
680 assert(op2->_tmp2->is_illegal() && op2->_tmp3->is_illegal() &&
6759698e3140 7133857: exp() and pow() should use the x87 ISA on x86
roland
parents: 4966
diff changeset
681 op2->_tmp4->is_illegal() && op2->_tmp5->is_illegal(), "not used");
0
a61af66fc99e Initial load
duke
parents:
diff changeset
682
a61af66fc99e Initial load
duke
parents:
diff changeset
683 do_input(op2->_opr1); do_temp(op2->_opr1);
a61af66fc99e Initial load
duke
parents:
diff changeset
684 do_input(op2->_opr2); do_temp(op2->_opr2);
6084
6759698e3140 7133857: exp() and pow() should use the x87 ISA on x86
roland
parents: 4966
diff changeset
685 if (op2->_tmp1->is_valid()) do_temp(op2->_tmp1);
0
a61af66fc99e Initial load
duke
parents:
diff changeset
686 do_output(op2->_result);
a61af66fc99e Initial load
duke
parents:
diff changeset
687
a61af66fc99e Initial load
duke
parents:
diff changeset
688 break;
a61af66fc99e Initial load
duke
parents:
diff changeset
689 }
a61af66fc99e Initial load
duke
parents:
diff changeset
690
1378
9f5b60a14736 6939930: exception unwind changes in 6919934 hurts compilation speed
never
parents: 1301
diff changeset
691 case lir_throw: {
0
a61af66fc99e Initial load
duke
parents:
diff changeset
692 assert(op->as_Op2() != NULL, "must be");
a61af66fc99e Initial load
duke
parents:
diff changeset
693 LIR_Op2* op2 = (LIR_Op2*)op;
a61af66fc99e Initial load
duke
parents:
diff changeset
694
a61af66fc99e Initial load
duke
parents:
diff changeset
695 if (op2->_info) do_info(op2->_info);
a61af66fc99e Initial load
duke
parents:
diff changeset
696 if (op2->_opr1->is_valid()) do_temp(op2->_opr1);
a61af66fc99e Initial load
duke
parents:
diff changeset
697 if (op2->_opr2->is_valid()) do_input(op2->_opr2); // exception object is input parameter
a61af66fc99e Initial load
duke
parents:
diff changeset
698 assert(op2->_result->is_illegal(), "no result");
6084
6759698e3140 7133857: exp() and pow() should use the x87 ISA on x86
roland
parents: 4966
diff changeset
699 assert(op2->_tmp2->is_illegal() && op2->_tmp3->is_illegal() &&
6759698e3140 7133857: exp() and pow() should use the x87 ISA on x86
roland
parents: 4966
diff changeset
700 op2->_tmp4->is_illegal() && op2->_tmp5->is_illegal(), "not used");
0
a61af66fc99e Initial load
duke
parents:
diff changeset
701
a61af66fc99e Initial load
duke
parents:
diff changeset
702 break;
a61af66fc99e Initial load
duke
parents:
diff changeset
703 }
a61af66fc99e Initial load
duke
parents:
diff changeset
704
1378
9f5b60a14736 6939930: exception unwind changes in 6919934 hurts compilation speed
never
parents: 1301
diff changeset
705 case lir_unwind: {
9f5b60a14736 6939930: exception unwind changes in 6919934 hurts compilation speed
never
parents: 1301
diff changeset
706 assert(op->as_Op1() != NULL, "must be");
9f5b60a14736 6939930: exception unwind changes in 6919934 hurts compilation speed
never
parents: 1301
diff changeset
707 LIR_Op1* op1 = (LIR_Op1*)op;
9f5b60a14736 6939930: exception unwind changes in 6919934 hurts compilation speed
never
parents: 1301
diff changeset
708
9f5b60a14736 6939930: exception unwind changes in 6919934 hurts compilation speed
never
parents: 1301
diff changeset
709 assert(op1->_info == NULL, "no info");
9f5b60a14736 6939930: exception unwind changes in 6919934 hurts compilation speed
never
parents: 1301
diff changeset
710 assert(op1->_opr->is_valid(), "exception oop"); do_input(op1->_opr);
9f5b60a14736 6939930: exception unwind changes in 6919934 hurts compilation speed
never
parents: 1301
diff changeset
711 assert(op1->_result->is_illegal(), "no result");
9f5b60a14736 6939930: exception unwind changes in 6919934 hurts compilation speed
never
parents: 1301
diff changeset
712
9f5b60a14736 6939930: exception unwind changes in 6919934 hurts compilation speed
never
parents: 1301
diff changeset
713 break;
9f5b60a14736 6939930: exception unwind changes in 6919934 hurts compilation speed
never
parents: 1301
diff changeset
714 }
9f5b60a14736 6939930: exception unwind changes in 6919934 hurts compilation speed
never
parents: 1301
diff changeset
715
0
a61af66fc99e Initial load
duke
parents:
diff changeset
716
a61af66fc99e Initial load
duke
parents:
diff changeset
717 case lir_tan:
a61af66fc99e Initial load
duke
parents:
diff changeset
718 case lir_sin:
953
ff1a29907b6c 6855215: Calculation error (NaN) after about 1500 calculations
never
parents: 304
diff changeset
719 case lir_cos:
ff1a29907b6c 6855215: Calculation error (NaN) after about 1500 calculations
never
parents: 304
diff changeset
720 case lir_log:
6084
6759698e3140 7133857: exp() and pow() should use the x87 ISA on x86
roland
parents: 4966
diff changeset
721 case lir_log10:
6759698e3140 7133857: exp() and pow() should use the x87 ISA on x86
roland
parents: 4966
diff changeset
722 case lir_exp: {
0
a61af66fc99e Initial load
duke
parents:
diff changeset
723 assert(op->as_Op2() != NULL, "must be");
a61af66fc99e Initial load
duke
parents:
diff changeset
724 LIR_Op2* op2 = (LIR_Op2*)op;
a61af66fc99e Initial load
duke
parents:
diff changeset
725
953
ff1a29907b6c 6855215: Calculation error (NaN) after about 1500 calculations
never
parents: 304
diff changeset
726 // On x86 tan/sin/cos need two temporary fpu stack slots and
ff1a29907b6c 6855215: Calculation error (NaN) after about 1500 calculations
never
parents: 304
diff changeset
727 // log/log10 need one so handle opr2 and tmp as temp inputs.
ff1a29907b6c 6855215: Calculation error (NaN) after about 1500 calculations
never
parents: 304
diff changeset
728 // Register input operand as temp to guarantee that it doesn't
ff1a29907b6c 6855215: Calculation error (NaN) after about 1500 calculations
never
parents: 304
diff changeset
729 // overlap with the input.
0
a61af66fc99e Initial load
duke
parents:
diff changeset
730 assert(op2->_info == NULL, "not used");
6084
6759698e3140 7133857: exp() and pow() should use the x87 ISA on x86
roland
parents: 4966
diff changeset
731 assert(op2->_tmp5->is_illegal(), "not used");
6759698e3140 7133857: exp() and pow() should use the x87 ISA on x86
roland
parents: 4966
diff changeset
732 assert(op2->_tmp2->is_valid() == (op->code() == lir_exp), "not used");
6759698e3140 7133857: exp() and pow() should use the x87 ISA on x86
roland
parents: 4966
diff changeset
733 assert(op2->_tmp3->is_valid() == (op->code() == lir_exp), "not used");
6759698e3140 7133857: exp() and pow() should use the x87 ISA on x86
roland
parents: 4966
diff changeset
734 assert(op2->_tmp4->is_valid() == (op->code() == lir_exp), "not used");
0
a61af66fc99e Initial load
duke
parents:
diff changeset
735 assert(op2->_opr1->is_valid(), "used");
a61af66fc99e Initial load
duke
parents:
diff changeset
736 do_input(op2->_opr1); do_temp(op2->_opr1);
a61af66fc99e Initial load
duke
parents:
diff changeset
737
a61af66fc99e Initial load
duke
parents:
diff changeset
738 if (op2->_opr2->is_valid()) do_temp(op2->_opr2);
6084
6759698e3140 7133857: exp() and pow() should use the x87 ISA on x86
roland
parents: 4966
diff changeset
739 if (op2->_tmp1->is_valid()) do_temp(op2->_tmp1);
6759698e3140 7133857: exp() and pow() should use the x87 ISA on x86
roland
parents: 4966
diff changeset
740 if (op2->_tmp2->is_valid()) do_temp(op2->_tmp2);
6759698e3140 7133857: exp() and pow() should use the x87 ISA on x86
roland
parents: 4966
diff changeset
741 if (op2->_tmp3->is_valid()) do_temp(op2->_tmp3);
6759698e3140 7133857: exp() and pow() should use the x87 ISA on x86
roland
parents: 4966
diff changeset
742 if (op2->_tmp4->is_valid()) do_temp(op2->_tmp4);
0
a61af66fc99e Initial load
duke
parents:
diff changeset
743 if (op2->_result->is_valid()) do_output(op2->_result);
a61af66fc99e Initial load
duke
parents:
diff changeset
744
a61af66fc99e Initial load
duke
parents:
diff changeset
745 break;
a61af66fc99e Initial load
duke
parents:
diff changeset
746 }
a61af66fc99e Initial load
duke
parents:
diff changeset
747
6084
6759698e3140 7133857: exp() and pow() should use the x87 ISA on x86
roland
parents: 4966
diff changeset
748 case lir_pow: {
6759698e3140 7133857: exp() and pow() should use the x87 ISA on x86
roland
parents: 4966
diff changeset
749 assert(op->as_Op2() != NULL, "must be");
6759698e3140 7133857: exp() and pow() should use the x87 ISA on x86
roland
parents: 4966
diff changeset
750 LIR_Op2* op2 = (LIR_Op2*)op;
6759698e3140 7133857: exp() and pow() should use the x87 ISA on x86
roland
parents: 4966
diff changeset
751
6759698e3140 7133857: exp() and pow() should use the x87 ISA on x86
roland
parents: 4966
diff changeset
752 // On x86 pow needs two temporary fpu stack slots: tmp1 and
6759698e3140 7133857: exp() and pow() should use the x87 ISA on x86
roland
parents: 4966
diff changeset
753 // tmp2. Register input operands as temps to guarantee that it
6759698e3140 7133857: exp() and pow() should use the x87 ISA on x86
roland
parents: 4966
diff changeset
754 // doesn't overlap with the temporary slots.
6759698e3140 7133857: exp() and pow() should use the x87 ISA on x86
roland
parents: 4966
diff changeset
755 assert(op2->_info == NULL, "not used");
6759698e3140 7133857: exp() and pow() should use the x87 ISA on x86
roland
parents: 4966
diff changeset
756 assert(op2->_opr1->is_valid() && op2->_opr2->is_valid(), "used");
6759698e3140 7133857: exp() and pow() should use the x87 ISA on x86
roland
parents: 4966
diff changeset
757 assert(op2->_tmp1->is_valid() && op2->_tmp2->is_valid() && op2->_tmp3->is_valid()
6759698e3140 7133857: exp() and pow() should use the x87 ISA on x86
roland
parents: 4966
diff changeset
758 && op2->_tmp4->is_valid() && op2->_tmp5->is_valid(), "used");
6759698e3140 7133857: exp() and pow() should use the x87 ISA on x86
roland
parents: 4966
diff changeset
759 assert(op2->_result->is_valid(), "used");
6759698e3140 7133857: exp() and pow() should use the x87 ISA on x86
roland
parents: 4966
diff changeset
760
6759698e3140 7133857: exp() and pow() should use the x87 ISA on x86
roland
parents: 4966
diff changeset
761 do_input(op2->_opr1); do_temp(op2->_opr1);
6759698e3140 7133857: exp() and pow() should use the x87 ISA on x86
roland
parents: 4966
diff changeset
762 do_input(op2->_opr2); do_temp(op2->_opr2);
6759698e3140 7133857: exp() and pow() should use the x87 ISA on x86
roland
parents: 4966
diff changeset
763 do_temp(op2->_tmp1);
6759698e3140 7133857: exp() and pow() should use the x87 ISA on x86
roland
parents: 4966
diff changeset
764 do_temp(op2->_tmp2);
6759698e3140 7133857: exp() and pow() should use the x87 ISA on x86
roland
parents: 4966
diff changeset
765 do_temp(op2->_tmp3);
6759698e3140 7133857: exp() and pow() should use the x87 ISA on x86
roland
parents: 4966
diff changeset
766 do_temp(op2->_tmp4);
6759698e3140 7133857: exp() and pow() should use the x87 ISA on x86
roland
parents: 4966
diff changeset
767 do_temp(op2->_tmp5);
6759698e3140 7133857: exp() and pow() should use the x87 ISA on x86
roland
parents: 4966
diff changeset
768 do_output(op2->_result);
6759698e3140 7133857: exp() and pow() should use the x87 ISA on x86
roland
parents: 4966
diff changeset
769
6759698e3140 7133857: exp() and pow() should use the x87 ISA on x86
roland
parents: 4966
diff changeset
770 break;
6759698e3140 7133857: exp() and pow() should use the x87 ISA on x86
roland
parents: 4966
diff changeset
771 }
0
a61af66fc99e Initial load
duke
parents:
diff changeset
772
a61af66fc99e Initial load
duke
parents:
diff changeset
773 // LIR_Op3
a61af66fc99e Initial load
duke
parents:
diff changeset
774 case lir_idiv:
a61af66fc99e Initial load
duke
parents:
diff changeset
775 case lir_irem: {
a61af66fc99e Initial load
duke
parents:
diff changeset
776 assert(op->as_Op3() != NULL, "must be");
a61af66fc99e Initial load
duke
parents:
diff changeset
777 LIR_Op3* op3= (LIR_Op3*)op;
a61af66fc99e Initial load
duke
parents:
diff changeset
778
a61af66fc99e Initial load
duke
parents:
diff changeset
779 if (op3->_info) do_info(op3->_info);
a61af66fc99e Initial load
duke
parents:
diff changeset
780 if (op3->_opr1->is_valid()) do_input(op3->_opr1);
a61af66fc99e Initial load
duke
parents:
diff changeset
781
a61af66fc99e Initial load
duke
parents:
diff changeset
782 // second operand is input and temp, so ensure that second operand
a61af66fc99e Initial load
duke
parents:
diff changeset
783 // and third operand get not the same register
a61af66fc99e Initial load
duke
parents:
diff changeset
784 if (op3->_opr2->is_valid()) do_input(op3->_opr2);
a61af66fc99e Initial load
duke
parents:
diff changeset
785 if (op3->_opr2->is_valid()) do_temp(op3->_opr2);
a61af66fc99e Initial load
duke
parents:
diff changeset
786 if (op3->_opr3->is_valid()) do_temp(op3->_opr3);
a61af66fc99e Initial load
duke
parents:
diff changeset
787
a61af66fc99e Initial load
duke
parents:
diff changeset
788 if (op3->_result->is_valid()) do_output(op3->_result);
a61af66fc99e Initial load
duke
parents:
diff changeset
789
a61af66fc99e Initial load
duke
parents:
diff changeset
790 break;
a61af66fc99e Initial load
duke
parents:
diff changeset
791 }
a61af66fc99e Initial load
duke
parents:
diff changeset
792
a61af66fc99e Initial load
duke
parents:
diff changeset
793
a61af66fc99e Initial load
duke
parents:
diff changeset
794 // LIR_OpJavaCall
a61af66fc99e Initial load
duke
parents:
diff changeset
795 case lir_static_call:
a61af66fc99e Initial load
duke
parents:
diff changeset
796 case lir_optvirtual_call:
a61af66fc99e Initial load
duke
parents:
diff changeset
797 case lir_icvirtual_call:
1295
3cf667df43ef 6919934: JSR 292 needs to support x86 C1
twisti
parents: 953
diff changeset
798 case lir_virtual_call:
3cf667df43ef 6919934: JSR 292 needs to support x86 C1
twisti
parents: 953
diff changeset
799 case lir_dynamic_call: {
3cf667df43ef 6919934: JSR 292 needs to support x86 C1
twisti
parents: 953
diff changeset
800 LIR_OpJavaCall* opJavaCall = op->as_OpJavaCall();
3cf667df43ef 6919934: JSR 292 needs to support x86 C1
twisti
parents: 953
diff changeset
801 assert(opJavaCall != NULL, "must be");
0
a61af66fc99e Initial load
duke
parents:
diff changeset
802
a61af66fc99e Initial load
duke
parents:
diff changeset
803 if (opJavaCall->_receiver->is_valid()) do_input(opJavaCall->_receiver);
a61af66fc99e Initial load
duke
parents:
diff changeset
804
a61af66fc99e Initial load
duke
parents:
diff changeset
805 // only visit register parameters
a61af66fc99e Initial load
duke
parents:
diff changeset
806 int n = opJavaCall->_arguments->length();
a61af66fc99e Initial load
duke
parents:
diff changeset
807 for (int i = 0; i < n; i++) {
a61af66fc99e Initial load
duke
parents:
diff changeset
808 if (!opJavaCall->_arguments->at(i)->is_pointer()) {
a61af66fc99e Initial load
duke
parents:
diff changeset
809 do_input(*opJavaCall->_arguments->adr_at(i));
a61af66fc99e Initial load
duke
parents:
diff changeset
810 }
a61af66fc99e Initial load
duke
parents:
diff changeset
811 }
a61af66fc99e Initial load
duke
parents:
diff changeset
812
a61af66fc99e Initial load
duke
parents:
diff changeset
813 if (opJavaCall->_info) do_info(opJavaCall->_info);
1564
61b2245abf36 6930772: JSR 292 needs to support SPARC C1
twisti
parents: 1378
diff changeset
814 if (opJavaCall->is_method_handle_invoke()) {
61b2245abf36 6930772: JSR 292 needs to support SPARC C1
twisti
parents: 1378
diff changeset
815 opJavaCall->_method_handle_invoke_SP_save_opr = FrameMap::method_handle_invoke_SP_save_opr();
61b2245abf36 6930772: JSR 292 needs to support SPARC C1
twisti
parents: 1378
diff changeset
816 do_temp(opJavaCall->_method_handle_invoke_SP_save_opr);
61b2245abf36 6930772: JSR 292 needs to support SPARC C1
twisti
parents: 1378
diff changeset
817 }
0
a61af66fc99e Initial load
duke
parents:
diff changeset
818 do_call();
a61af66fc99e Initial load
duke
parents:
diff changeset
819 if (opJavaCall->_result->is_valid()) do_output(opJavaCall->_result);
a61af66fc99e Initial load
duke
parents:
diff changeset
820
a61af66fc99e Initial load
duke
parents:
diff changeset
821 break;
a61af66fc99e Initial load
duke
parents:
diff changeset
822 }
a61af66fc99e Initial load
duke
parents:
diff changeset
823
a61af66fc99e Initial load
duke
parents:
diff changeset
824
a61af66fc99e Initial load
duke
parents:
diff changeset
825 // LIR_OpRTCall
a61af66fc99e Initial load
duke
parents:
diff changeset
826 case lir_rtcall: {
a61af66fc99e Initial load
duke
parents:
diff changeset
827 assert(op->as_OpRTCall() != NULL, "must be");
a61af66fc99e Initial load
duke
parents:
diff changeset
828 LIR_OpRTCall* opRTCall = (LIR_OpRTCall*)op;
a61af66fc99e Initial load
duke
parents:
diff changeset
829
a61af66fc99e Initial load
duke
parents:
diff changeset
830 // only visit register parameters
a61af66fc99e Initial load
duke
parents:
diff changeset
831 int n = opRTCall->_arguments->length();
a61af66fc99e Initial load
duke
parents:
diff changeset
832 for (int i = 0; i < n; i++) {
a61af66fc99e Initial load
duke
parents:
diff changeset
833 if (!opRTCall->_arguments->at(i)->is_pointer()) {
a61af66fc99e Initial load
duke
parents:
diff changeset
834 do_input(*opRTCall->_arguments->adr_at(i));
a61af66fc99e Initial load
duke
parents:
diff changeset
835 }
a61af66fc99e Initial load
duke
parents:
diff changeset
836 }
a61af66fc99e Initial load
duke
parents:
diff changeset
837 if (opRTCall->_info) do_info(opRTCall->_info);
a61af66fc99e Initial load
duke
parents:
diff changeset
838 if (opRTCall->_tmp->is_valid()) do_temp(opRTCall->_tmp);
a61af66fc99e Initial load
duke
parents:
diff changeset
839 do_call();
a61af66fc99e Initial load
duke
parents:
diff changeset
840 if (opRTCall->_result->is_valid()) do_output(opRTCall->_result);
a61af66fc99e Initial load
duke
parents:
diff changeset
841
a61af66fc99e Initial load
duke
parents:
diff changeset
842 break;
a61af66fc99e Initial load
duke
parents:
diff changeset
843 }
a61af66fc99e Initial load
duke
parents:
diff changeset
844
a61af66fc99e Initial load
duke
parents:
diff changeset
845
a61af66fc99e Initial load
duke
parents:
diff changeset
846 // LIR_OpArrayCopy
a61af66fc99e Initial load
duke
parents:
diff changeset
847 case lir_arraycopy: {
a61af66fc99e Initial load
duke
parents:
diff changeset
848 assert(op->as_OpArrayCopy() != NULL, "must be");
a61af66fc99e Initial load
duke
parents:
diff changeset
849 LIR_OpArrayCopy* opArrayCopy = (LIR_OpArrayCopy*)op;
a61af66fc99e Initial load
duke
parents:
diff changeset
850
a61af66fc99e Initial load
duke
parents:
diff changeset
851 assert(opArrayCopy->_result->is_illegal(), "unused");
a61af66fc99e Initial load
duke
parents:
diff changeset
852 assert(opArrayCopy->_src->is_valid(), "used"); do_input(opArrayCopy->_src); do_temp(opArrayCopy->_src);
a61af66fc99e Initial load
duke
parents:
diff changeset
853 assert(opArrayCopy->_src_pos->is_valid(), "used"); do_input(opArrayCopy->_src_pos); do_temp(opArrayCopy->_src_pos);
a61af66fc99e Initial load
duke
parents:
diff changeset
854 assert(opArrayCopy->_dst->is_valid(), "used"); do_input(opArrayCopy->_dst); do_temp(opArrayCopy->_dst);
a61af66fc99e Initial load
duke
parents:
diff changeset
855 assert(opArrayCopy->_dst_pos->is_valid(), "used"); do_input(opArrayCopy->_dst_pos); do_temp(opArrayCopy->_dst_pos);
a61af66fc99e Initial load
duke
parents:
diff changeset
856 assert(opArrayCopy->_length->is_valid(), "used"); do_input(opArrayCopy->_length); do_temp(opArrayCopy->_length);
a61af66fc99e Initial load
duke
parents:
diff changeset
857 assert(opArrayCopy->_tmp->is_valid(), "used"); do_temp(opArrayCopy->_tmp);
a61af66fc99e Initial load
duke
parents:
diff changeset
858 if (opArrayCopy->_info) do_info(opArrayCopy->_info);
a61af66fc99e Initial load
duke
parents:
diff changeset
859
a61af66fc99e Initial load
duke
parents:
diff changeset
860 // the implementation of arraycopy always has a call into the runtime
a61af66fc99e Initial load
duke
parents:
diff changeset
861 do_call();
a61af66fc99e Initial load
duke
parents:
diff changeset
862
a61af66fc99e Initial load
duke
parents:
diff changeset
863 break;
a61af66fc99e Initial load
duke
parents:
diff changeset
864 }
a61af66fc99e Initial load
duke
parents:
diff changeset
865
a61af66fc99e Initial load
duke
parents:
diff changeset
866
a61af66fc99e Initial load
duke
parents:
diff changeset
867 // LIR_OpLock
a61af66fc99e Initial load
duke
parents:
diff changeset
868 case lir_lock:
a61af66fc99e Initial load
duke
parents:
diff changeset
869 case lir_unlock: {
a61af66fc99e Initial load
duke
parents:
diff changeset
870 assert(op->as_OpLock() != NULL, "must be");
a61af66fc99e Initial load
duke
parents:
diff changeset
871 LIR_OpLock* opLock = (LIR_OpLock*)op;
a61af66fc99e Initial load
duke
parents:
diff changeset
872
a61af66fc99e Initial load
duke
parents:
diff changeset
873 if (opLock->_info) do_info(opLock->_info);
a61af66fc99e Initial load
duke
parents:
diff changeset
874
a61af66fc99e Initial load
duke
parents:
diff changeset
875 // TODO: check if these operands really have to be temp
a61af66fc99e Initial load
duke
parents:
diff changeset
876 // (or if input is sufficient). This may have influence on the oop map!
a61af66fc99e Initial load
duke
parents:
diff changeset
877 assert(opLock->_lock->is_valid(), "used"); do_temp(opLock->_lock);
a61af66fc99e Initial load
duke
parents:
diff changeset
878 assert(opLock->_hdr->is_valid(), "used"); do_temp(opLock->_hdr);
a61af66fc99e Initial load
duke
parents:
diff changeset
879 assert(opLock->_obj->is_valid(), "used"); do_temp(opLock->_obj);
a61af66fc99e Initial load
duke
parents:
diff changeset
880
a61af66fc99e Initial load
duke
parents:
diff changeset
881 if (opLock->_scratch->is_valid()) do_temp(opLock->_scratch);
a61af66fc99e Initial load
duke
parents:
diff changeset
882 assert(opLock->_result->is_illegal(), "unused");
a61af66fc99e Initial load
duke
parents:
diff changeset
883
a61af66fc99e Initial load
duke
parents:
diff changeset
884 do_stub(opLock->_stub);
a61af66fc99e Initial load
duke
parents:
diff changeset
885
a61af66fc99e Initial load
duke
parents:
diff changeset
886 break;
a61af66fc99e Initial load
duke
parents:
diff changeset
887 }
a61af66fc99e Initial load
duke
parents:
diff changeset
888
a61af66fc99e Initial load
duke
parents:
diff changeset
889
a61af66fc99e Initial load
duke
parents:
diff changeset
890 // LIR_OpDelay
a61af66fc99e Initial load
duke
parents:
diff changeset
891 case lir_delay_slot: {
a61af66fc99e Initial load
duke
parents:
diff changeset
892 assert(op->as_OpDelay() != NULL, "must be");
a61af66fc99e Initial load
duke
parents:
diff changeset
893 LIR_OpDelay* opDelay = (LIR_OpDelay*)op;
a61af66fc99e Initial load
duke
parents:
diff changeset
894
a61af66fc99e Initial load
duke
parents:
diff changeset
895 visit(opDelay->delay_op());
a61af66fc99e Initial load
duke
parents:
diff changeset
896 break;
a61af66fc99e Initial load
duke
parents:
diff changeset
897 }
a61af66fc99e Initial load
duke
parents:
diff changeset
898
a61af66fc99e Initial load
duke
parents:
diff changeset
899 // LIR_OpTypeCheck
a61af66fc99e Initial load
duke
parents:
diff changeset
900 case lir_instanceof:
a61af66fc99e Initial load
duke
parents:
diff changeset
901 case lir_checkcast:
a61af66fc99e Initial load
duke
parents:
diff changeset
902 case lir_store_check: {
a61af66fc99e Initial load
duke
parents:
diff changeset
903 assert(op->as_OpTypeCheck() != NULL, "must be");
a61af66fc99e Initial load
duke
parents:
diff changeset
904 LIR_OpTypeCheck* opTypeCheck = (LIR_OpTypeCheck*)op;
a61af66fc99e Initial load
duke
parents:
diff changeset
905
a61af66fc99e Initial load
duke
parents:
diff changeset
906 if (opTypeCheck->_info_for_exception) do_info(opTypeCheck->_info_for_exception);
a61af66fc99e Initial load
duke
parents:
diff changeset
907 if (opTypeCheck->_info_for_patch) do_info(opTypeCheck->_info_for_patch);
a61af66fc99e Initial load
duke
parents:
diff changeset
908 if (opTypeCheck->_object->is_valid()) do_input(opTypeCheck->_object);
4765
b642b49f9738 7123253: C1: in store check code, usage of registers may be incorrect
roland
parents: 3957
diff changeset
909 if (op->code() == lir_store_check && opTypeCheck->_object->is_valid()) {
b642b49f9738 7123253: C1: in store check code, usage of registers may be incorrect
roland
parents: 3957
diff changeset
910 do_temp(opTypeCheck->_object);
b642b49f9738 7123253: C1: in store check code, usage of registers may be incorrect
roland
parents: 3957
diff changeset
911 }
0
a61af66fc99e Initial load
duke
parents:
diff changeset
912 if (opTypeCheck->_array->is_valid()) do_input(opTypeCheck->_array);
a61af66fc99e Initial load
duke
parents:
diff changeset
913 if (opTypeCheck->_tmp1->is_valid()) do_temp(opTypeCheck->_tmp1);
a61af66fc99e Initial load
duke
parents:
diff changeset
914 if (opTypeCheck->_tmp2->is_valid()) do_temp(opTypeCheck->_tmp2);
a61af66fc99e Initial load
duke
parents:
diff changeset
915 if (opTypeCheck->_tmp3->is_valid()) do_temp(opTypeCheck->_tmp3);
a61af66fc99e Initial load
duke
parents:
diff changeset
916 if (opTypeCheck->_result->is_valid()) do_output(opTypeCheck->_result);
a61af66fc99e Initial load
duke
parents:
diff changeset
917 do_stub(opTypeCheck->_stub);
a61af66fc99e Initial load
duke
parents:
diff changeset
918 break;
a61af66fc99e Initial load
duke
parents:
diff changeset
919 }
a61af66fc99e Initial load
duke
parents:
diff changeset
920
a61af66fc99e Initial load
duke
parents:
diff changeset
921 // LIR_OpCompareAndSwap
a61af66fc99e Initial load
duke
parents:
diff changeset
922 case lir_cas_long:
a61af66fc99e Initial load
duke
parents:
diff changeset
923 case lir_cas_obj:
a61af66fc99e Initial load
duke
parents:
diff changeset
924 case lir_cas_int: {
a61af66fc99e Initial load
duke
parents:
diff changeset
925 assert(op->as_OpCompareAndSwap() != NULL, "must be");
a61af66fc99e Initial load
duke
parents:
diff changeset
926 LIR_OpCompareAndSwap* opCompareAndSwap = (LIR_OpCompareAndSwap*)op;
a61af66fc99e Initial load
duke
parents:
diff changeset
927
1681
126ea7725993 6953477: Increase portability and flexibility of building Hotspot
bobv
parents: 1579
diff changeset
928 assert(opCompareAndSwap->_addr->is_valid(), "used");
126ea7725993 6953477: Increase portability and flexibility of building Hotspot
bobv
parents: 1579
diff changeset
929 assert(opCompareAndSwap->_cmp_value->is_valid(), "used");
126ea7725993 6953477: Increase portability and flexibility of building Hotspot
bobv
parents: 1579
diff changeset
930 assert(opCompareAndSwap->_new_value->is_valid(), "used");
0
a61af66fc99e Initial load
duke
parents:
diff changeset
931 if (opCompareAndSwap->_info) do_info(opCompareAndSwap->_info);
1681
126ea7725993 6953477: Increase portability and flexibility of building Hotspot
bobv
parents: 1579
diff changeset
932 do_input(opCompareAndSwap->_addr);
126ea7725993 6953477: Increase portability and flexibility of building Hotspot
bobv
parents: 1579
diff changeset
933 do_temp(opCompareAndSwap->_addr);
126ea7725993 6953477: Increase portability and flexibility of building Hotspot
bobv
parents: 1579
diff changeset
934 do_input(opCompareAndSwap->_cmp_value);
126ea7725993 6953477: Increase portability and flexibility of building Hotspot
bobv
parents: 1579
diff changeset
935 do_temp(opCompareAndSwap->_cmp_value);
126ea7725993 6953477: Increase portability and flexibility of building Hotspot
bobv
parents: 1579
diff changeset
936 do_input(opCompareAndSwap->_new_value);
126ea7725993 6953477: Increase portability and flexibility of building Hotspot
bobv
parents: 1579
diff changeset
937 do_temp(opCompareAndSwap->_new_value);
0
a61af66fc99e Initial load
duke
parents:
diff changeset
938 if (opCompareAndSwap->_tmp1->is_valid()) do_temp(opCompareAndSwap->_tmp1);
a61af66fc99e Initial load
duke
parents:
diff changeset
939 if (opCompareAndSwap->_tmp2->is_valid()) do_temp(opCompareAndSwap->_tmp2);
a61af66fc99e Initial load
duke
parents:
diff changeset
940 if (opCompareAndSwap->_result->is_valid()) do_output(opCompareAndSwap->_result);
a61af66fc99e Initial load
duke
parents:
diff changeset
941
a61af66fc99e Initial load
duke
parents:
diff changeset
942 break;
a61af66fc99e Initial load
duke
parents:
diff changeset
943 }
a61af66fc99e Initial load
duke
parents:
diff changeset
944
a61af66fc99e Initial load
duke
parents:
diff changeset
945
a61af66fc99e Initial load
duke
parents:
diff changeset
946 // LIR_OpAllocArray;
a61af66fc99e Initial load
duke
parents:
diff changeset
947 case lir_alloc_array: {
a61af66fc99e Initial load
duke
parents:
diff changeset
948 assert(op->as_OpAllocArray() != NULL, "must be");
a61af66fc99e Initial load
duke
parents:
diff changeset
949 LIR_OpAllocArray* opAllocArray = (LIR_OpAllocArray*)op;
a61af66fc99e Initial load
duke
parents:
diff changeset
950
a61af66fc99e Initial load
duke
parents:
diff changeset
951 if (opAllocArray->_info) do_info(opAllocArray->_info);
a61af66fc99e Initial load
duke
parents:
diff changeset
952 if (opAllocArray->_klass->is_valid()) do_input(opAllocArray->_klass); do_temp(opAllocArray->_klass);
a61af66fc99e Initial load
duke
parents:
diff changeset
953 if (opAllocArray->_len->is_valid()) do_input(opAllocArray->_len); do_temp(opAllocArray->_len);
a61af66fc99e Initial load
duke
parents:
diff changeset
954 if (opAllocArray->_tmp1->is_valid()) do_temp(opAllocArray->_tmp1);
a61af66fc99e Initial load
duke
parents:
diff changeset
955 if (opAllocArray->_tmp2->is_valid()) do_temp(opAllocArray->_tmp2);
a61af66fc99e Initial load
duke
parents:
diff changeset
956 if (opAllocArray->_tmp3->is_valid()) do_temp(opAllocArray->_tmp3);
a61af66fc99e Initial load
duke
parents:
diff changeset
957 if (opAllocArray->_tmp4->is_valid()) do_temp(opAllocArray->_tmp4);
a61af66fc99e Initial load
duke
parents:
diff changeset
958 if (opAllocArray->_result->is_valid()) do_output(opAllocArray->_result);
a61af66fc99e Initial load
duke
parents:
diff changeset
959 do_stub(opAllocArray->_stub);
a61af66fc99e Initial load
duke
parents:
diff changeset
960 break;
a61af66fc99e Initial load
duke
parents:
diff changeset
961 }
a61af66fc99e Initial load
duke
parents:
diff changeset
962
a61af66fc99e Initial load
duke
parents:
diff changeset
963 // LIR_OpProfileCall:
a61af66fc99e Initial load
duke
parents:
diff changeset
964 case lir_profile_call: {
a61af66fc99e Initial load
duke
parents:
diff changeset
965 assert(op->as_OpProfileCall() != NULL, "must be");
a61af66fc99e Initial load
duke
parents:
diff changeset
966 LIR_OpProfileCall* opProfileCall = (LIR_OpProfileCall*)op;
a61af66fc99e Initial load
duke
parents:
diff changeset
967
a61af66fc99e Initial load
duke
parents:
diff changeset
968 if (opProfileCall->_recv->is_valid()) do_temp(opProfileCall->_recv);
a61af66fc99e Initial load
duke
parents:
diff changeset
969 assert(opProfileCall->_mdo->is_valid(), "used"); do_temp(opProfileCall->_mdo);
a61af66fc99e Initial load
duke
parents:
diff changeset
970 assert(opProfileCall->_tmp1->is_valid(), "used"); do_temp(opProfileCall->_tmp1);
a61af66fc99e Initial load
duke
parents:
diff changeset
971 break;
a61af66fc99e Initial load
duke
parents:
diff changeset
972 }
a61af66fc99e Initial load
duke
parents:
diff changeset
973 default:
a61af66fc99e Initial load
duke
parents:
diff changeset
974 ShouldNotReachHere();
a61af66fc99e Initial load
duke
parents:
diff changeset
975 }
a61af66fc99e Initial load
duke
parents:
diff changeset
976 }
a61af66fc99e Initial load
duke
parents:
diff changeset
977
a61af66fc99e Initial load
duke
parents:
diff changeset
978
a61af66fc99e Initial load
duke
parents:
diff changeset
979 void LIR_OpVisitState::do_stub(CodeStub* stub) {
a61af66fc99e Initial load
duke
parents:
diff changeset
980 if (stub != NULL) {
a61af66fc99e Initial load
duke
parents:
diff changeset
981 stub->visit(this);
a61af66fc99e Initial load
duke
parents:
diff changeset
982 }
a61af66fc99e Initial load
duke
parents:
diff changeset
983 }
a61af66fc99e Initial load
duke
parents:
diff changeset
984
a61af66fc99e Initial load
duke
parents:
diff changeset
985 XHandlers* LIR_OpVisitState::all_xhandler() {
a61af66fc99e Initial load
duke
parents:
diff changeset
986 XHandlers* result = NULL;
a61af66fc99e Initial load
duke
parents:
diff changeset
987
a61af66fc99e Initial load
duke
parents:
diff changeset
988 int i;
a61af66fc99e Initial load
duke
parents:
diff changeset
989 for (i = 0; i < info_count(); i++) {
a61af66fc99e Initial load
duke
parents:
diff changeset
990 if (info_at(i)->exception_handlers() != NULL) {
a61af66fc99e Initial load
duke
parents:
diff changeset
991 result = info_at(i)->exception_handlers();
a61af66fc99e Initial load
duke
parents:
diff changeset
992 break;
a61af66fc99e Initial load
duke
parents:
diff changeset
993 }
a61af66fc99e Initial load
duke
parents:
diff changeset
994 }
a61af66fc99e Initial load
duke
parents:
diff changeset
995
a61af66fc99e Initial load
duke
parents:
diff changeset
996 #ifdef ASSERT
a61af66fc99e Initial load
duke
parents:
diff changeset
997 for (i = 0; i < info_count(); i++) {
a61af66fc99e Initial load
duke
parents:
diff changeset
998 assert(info_at(i)->exception_handlers() == NULL ||
a61af66fc99e Initial load
duke
parents:
diff changeset
999 info_at(i)->exception_handlers() == result,
a61af66fc99e Initial load
duke
parents:
diff changeset
1000 "only one xhandler list allowed per LIR-operation");
a61af66fc99e Initial load
duke
parents:
diff changeset
1001 }
a61af66fc99e Initial load
duke
parents:
diff changeset
1002 #endif
a61af66fc99e Initial load
duke
parents:
diff changeset
1003
a61af66fc99e Initial load
duke
parents:
diff changeset
1004 if (result != NULL) {
a61af66fc99e Initial load
duke
parents:
diff changeset
1005 return result;
a61af66fc99e Initial load
duke
parents:
diff changeset
1006 } else {
a61af66fc99e Initial load
duke
parents:
diff changeset
1007 return new XHandlers();
a61af66fc99e Initial load
duke
parents:
diff changeset
1008 }
a61af66fc99e Initial load
duke
parents:
diff changeset
1009
a61af66fc99e Initial load
duke
parents:
diff changeset
1010 return result;
a61af66fc99e Initial load
duke
parents:
diff changeset
1011 }
a61af66fc99e Initial load
duke
parents:
diff changeset
1012
a61af66fc99e Initial load
duke
parents:
diff changeset
1013
a61af66fc99e Initial load
duke
parents:
diff changeset
1014 #ifdef ASSERT
a61af66fc99e Initial load
duke
parents:
diff changeset
1015 bool LIR_OpVisitState::no_operands(LIR_Op* op) {
a61af66fc99e Initial load
duke
parents:
diff changeset
1016 visit(op);
a61af66fc99e Initial load
duke
parents:
diff changeset
1017
a61af66fc99e Initial load
duke
parents:
diff changeset
1018 return opr_count(inputMode) == 0 &&
a61af66fc99e Initial load
duke
parents:
diff changeset
1019 opr_count(outputMode) == 0 &&
a61af66fc99e Initial load
duke
parents:
diff changeset
1020 opr_count(tempMode) == 0 &&
a61af66fc99e Initial load
duke
parents:
diff changeset
1021 info_count() == 0 &&
a61af66fc99e Initial load
duke
parents:
diff changeset
1022 !has_call() &&
a61af66fc99e Initial load
duke
parents:
diff changeset
1023 !has_slow_case();
a61af66fc99e Initial load
duke
parents:
diff changeset
1024 }
a61af66fc99e Initial load
duke
parents:
diff changeset
1025 #endif
a61af66fc99e Initial load
duke
parents:
diff changeset
1026
a61af66fc99e Initial load
duke
parents:
diff changeset
1027 //---------------------------------------------------
a61af66fc99e Initial load
duke
parents:
diff changeset
1028
a61af66fc99e Initial load
duke
parents:
diff changeset
1029
a61af66fc99e Initial load
duke
parents:
diff changeset
1030 void LIR_OpJavaCall::emit_code(LIR_Assembler* masm) {
a61af66fc99e Initial load
duke
parents:
diff changeset
1031 masm->emit_call(this);
a61af66fc99e Initial load
duke
parents:
diff changeset
1032 }
a61af66fc99e Initial load
duke
parents:
diff changeset
1033
a61af66fc99e Initial load
duke
parents:
diff changeset
1034 void LIR_OpRTCall::emit_code(LIR_Assembler* masm) {
a61af66fc99e Initial load
duke
parents:
diff changeset
1035 masm->emit_rtcall(this);
a61af66fc99e Initial load
duke
parents:
diff changeset
1036 }
a61af66fc99e Initial load
duke
parents:
diff changeset
1037
a61af66fc99e Initial load
duke
parents:
diff changeset
1038 void LIR_OpLabel::emit_code(LIR_Assembler* masm) {
a61af66fc99e Initial load
duke
parents:
diff changeset
1039 masm->emit_opLabel(this);
a61af66fc99e Initial load
duke
parents:
diff changeset
1040 }
a61af66fc99e Initial load
duke
parents:
diff changeset
1041
a61af66fc99e Initial load
duke
parents:
diff changeset
1042 void LIR_OpArrayCopy::emit_code(LIR_Assembler* masm) {
a61af66fc99e Initial load
duke
parents:
diff changeset
1043 masm->emit_arraycopy(this);
a61af66fc99e Initial load
duke
parents:
diff changeset
1044 masm->emit_code_stub(stub());
a61af66fc99e Initial load
duke
parents:
diff changeset
1045 }
a61af66fc99e Initial load
duke
parents:
diff changeset
1046
a61af66fc99e Initial load
duke
parents:
diff changeset
1047 void LIR_Op0::emit_code(LIR_Assembler* masm) {
a61af66fc99e Initial load
duke
parents:
diff changeset
1048 masm->emit_op0(this);
a61af66fc99e Initial load
duke
parents:
diff changeset
1049 }
a61af66fc99e Initial load
duke
parents:
diff changeset
1050
a61af66fc99e Initial load
duke
parents:
diff changeset
1051 void LIR_Op1::emit_code(LIR_Assembler* masm) {
a61af66fc99e Initial load
duke
parents:
diff changeset
1052 masm->emit_op1(this);
a61af66fc99e Initial load
duke
parents:
diff changeset
1053 }
a61af66fc99e Initial load
duke
parents:
diff changeset
1054
a61af66fc99e Initial load
duke
parents:
diff changeset
1055 void LIR_OpAllocObj::emit_code(LIR_Assembler* masm) {
a61af66fc99e Initial load
duke
parents:
diff changeset
1056 masm->emit_alloc_obj(this);
a61af66fc99e Initial load
duke
parents:
diff changeset
1057 masm->emit_code_stub(stub());
a61af66fc99e Initial load
duke
parents:
diff changeset
1058 }
a61af66fc99e Initial load
duke
parents:
diff changeset
1059
a61af66fc99e Initial load
duke
parents:
diff changeset
1060 void LIR_OpBranch::emit_code(LIR_Assembler* masm) {
a61af66fc99e Initial load
duke
parents:
diff changeset
1061 masm->emit_opBranch(this);
a61af66fc99e Initial load
duke
parents:
diff changeset
1062 if (stub()) {
a61af66fc99e Initial load
duke
parents:
diff changeset
1063 masm->emit_code_stub(stub());
a61af66fc99e Initial load
duke
parents:
diff changeset
1064 }
a61af66fc99e Initial load
duke
parents:
diff changeset
1065 }
a61af66fc99e Initial load
duke
parents:
diff changeset
1066
a61af66fc99e Initial load
duke
parents:
diff changeset
1067 void LIR_OpConvert::emit_code(LIR_Assembler* masm) {
a61af66fc99e Initial load
duke
parents:
diff changeset
1068 masm->emit_opConvert(this);
a61af66fc99e Initial load
duke
parents:
diff changeset
1069 if (stub() != NULL) {
a61af66fc99e Initial load
duke
parents:
diff changeset
1070 masm->emit_code_stub(stub());
a61af66fc99e Initial load
duke
parents:
diff changeset
1071 }
a61af66fc99e Initial load
duke
parents:
diff changeset
1072 }
a61af66fc99e Initial load
duke
parents:
diff changeset
1073
a61af66fc99e Initial load
duke
parents:
diff changeset
1074 void LIR_Op2::emit_code(LIR_Assembler* masm) {
a61af66fc99e Initial load
duke
parents:
diff changeset
1075 masm->emit_op2(this);
a61af66fc99e Initial load
duke
parents:
diff changeset
1076 }
a61af66fc99e Initial load
duke
parents:
diff changeset
1077
a61af66fc99e Initial load
duke
parents:
diff changeset
1078 void LIR_OpAllocArray::emit_code(LIR_Assembler* masm) {
a61af66fc99e Initial load
duke
parents:
diff changeset
1079 masm->emit_alloc_array(this);
a61af66fc99e Initial load
duke
parents:
diff changeset
1080 masm->emit_code_stub(stub());
a61af66fc99e Initial load
duke
parents:
diff changeset
1081 }
a61af66fc99e Initial load
duke
parents:
diff changeset
1082
a61af66fc99e Initial load
duke
parents:
diff changeset
1083 void LIR_OpTypeCheck::emit_code(LIR_Assembler* masm) {
1791
3a294e483abc 6919069: client compiler needs to capture more profile information for tiered work
iveresov
parents: 1783
diff changeset
1084 masm->emit_opTypeCheck(this);
0
a61af66fc99e Initial load
duke
parents:
diff changeset
1085 if (stub()) {
a61af66fc99e Initial load
duke
parents:
diff changeset
1086 masm->emit_code_stub(stub());
a61af66fc99e Initial load
duke
parents:
diff changeset
1087 }
a61af66fc99e Initial load
duke
parents:
diff changeset
1088 }
a61af66fc99e Initial load
duke
parents:
diff changeset
1089
a61af66fc99e Initial load
duke
parents:
diff changeset
1090 void LIR_OpCompareAndSwap::emit_code(LIR_Assembler* masm) {
a61af66fc99e Initial load
duke
parents:
diff changeset
1091 masm->emit_compare_and_swap(this);
a61af66fc99e Initial load
duke
parents:
diff changeset
1092 }
a61af66fc99e Initial load
duke
parents:
diff changeset
1093
a61af66fc99e Initial load
duke
parents:
diff changeset
1094 void LIR_Op3::emit_code(LIR_Assembler* masm) {
a61af66fc99e Initial load
duke
parents:
diff changeset
1095 masm->emit_op3(this);
a61af66fc99e Initial load
duke
parents:
diff changeset
1096 }
a61af66fc99e Initial load
duke
parents:
diff changeset
1097
a61af66fc99e Initial load
duke
parents:
diff changeset
1098 void LIR_OpLock::emit_code(LIR_Assembler* masm) {
a61af66fc99e Initial load
duke
parents:
diff changeset
1099 masm->emit_lock(this);
a61af66fc99e Initial load
duke
parents:
diff changeset
1100 if (stub()) {
a61af66fc99e Initial load
duke
parents:
diff changeset
1101 masm->emit_code_stub(stub());
a61af66fc99e Initial load
duke
parents:
diff changeset
1102 }
a61af66fc99e Initial load
duke
parents:
diff changeset
1103 }
a61af66fc99e Initial load
duke
parents:
diff changeset
1104
a61af66fc99e Initial load
duke
parents:
diff changeset
1105
a61af66fc99e Initial load
duke
parents:
diff changeset
1106 void LIR_OpDelay::emit_code(LIR_Assembler* masm) {
a61af66fc99e Initial load
duke
parents:
diff changeset
1107 masm->emit_delay(this);
a61af66fc99e Initial load
duke
parents:
diff changeset
1108 }
a61af66fc99e Initial load
duke
parents:
diff changeset
1109
a61af66fc99e Initial load
duke
parents:
diff changeset
1110 void LIR_OpProfileCall::emit_code(LIR_Assembler* masm) {
a61af66fc99e Initial load
duke
parents:
diff changeset
1111 masm->emit_profile_call(this);
a61af66fc99e Initial load
duke
parents:
diff changeset
1112 }
a61af66fc99e Initial load
duke
parents:
diff changeset
1113
a61af66fc99e Initial load
duke
parents:
diff changeset
1114 // LIR_List
a61af66fc99e Initial load
duke
parents:
diff changeset
1115 LIR_List::LIR_List(Compilation* compilation, BlockBegin* block)
a61af66fc99e Initial load
duke
parents:
diff changeset
1116 : _operations(8)
a61af66fc99e Initial load
duke
parents:
diff changeset
1117 , _compilation(compilation)
a61af66fc99e Initial load
duke
parents:
diff changeset
1118 #ifndef PRODUCT
a61af66fc99e Initial load
duke
parents:
diff changeset
1119 , _block(block)
a61af66fc99e Initial load
duke
parents:
diff changeset
1120 #endif
a61af66fc99e Initial load
duke
parents:
diff changeset
1121 #ifdef ASSERT
a61af66fc99e Initial load
duke
parents:
diff changeset
1122 , _file(NULL)
a61af66fc99e Initial load
duke
parents:
diff changeset
1123 , _line(0)
a61af66fc99e Initial load
duke
parents:
diff changeset
1124 #endif
a61af66fc99e Initial load
duke
parents:
diff changeset
1125 { }
a61af66fc99e Initial load
duke
parents:
diff changeset
1126
a61af66fc99e Initial load
duke
parents:
diff changeset
1127
a61af66fc99e Initial load
duke
parents:
diff changeset
1128 #ifdef ASSERT
a61af66fc99e Initial load
duke
parents:
diff changeset
1129 void LIR_List::set_file_and_line(const char * file, int line) {
a61af66fc99e Initial load
duke
parents:
diff changeset
1130 const char * f = strrchr(file, '/');
a61af66fc99e Initial load
duke
parents:
diff changeset
1131 if (f == NULL) f = strrchr(file, '\\');
a61af66fc99e Initial load
duke
parents:
diff changeset
1132 if (f == NULL) {
a61af66fc99e Initial load
duke
parents:
diff changeset
1133 f = file;
a61af66fc99e Initial load
duke
parents:
diff changeset
1134 } else {
a61af66fc99e Initial load
duke
parents:
diff changeset
1135 f++;
a61af66fc99e Initial load
duke
parents:
diff changeset
1136 }
a61af66fc99e Initial load
duke
parents:
diff changeset
1137 _file = f;
a61af66fc99e Initial load
duke
parents:
diff changeset
1138 _line = line;
a61af66fc99e Initial load
duke
parents:
diff changeset
1139 }
a61af66fc99e Initial load
duke
parents:
diff changeset
1140 #endif
a61af66fc99e Initial load
duke
parents:
diff changeset
1141
a61af66fc99e Initial load
duke
parents:
diff changeset
1142
a61af66fc99e Initial load
duke
parents:
diff changeset
1143 void LIR_List::append(LIR_InsertionBuffer* buffer) {
a61af66fc99e Initial load
duke
parents:
diff changeset
1144 assert(this == buffer->lir_list(), "wrong lir list");
a61af66fc99e Initial load
duke
parents:
diff changeset
1145 const int n = _operations.length();
a61af66fc99e Initial load
duke
parents:
diff changeset
1146
a61af66fc99e Initial load
duke
parents:
diff changeset
1147 if (buffer->number_of_ops() > 0) {
a61af66fc99e Initial load
duke
parents:
diff changeset
1148 // increase size of instructions list
a61af66fc99e Initial load
duke
parents:
diff changeset
1149 _operations.at_grow(n + buffer->number_of_ops() - 1, NULL);
a61af66fc99e Initial load
duke
parents:
diff changeset
1150 // insert ops from buffer into instructions list
a61af66fc99e Initial load
duke
parents:
diff changeset
1151 int op_index = buffer->number_of_ops() - 1;
a61af66fc99e Initial load
duke
parents:
diff changeset
1152 int ip_index = buffer->number_of_insertion_points() - 1;
a61af66fc99e Initial load
duke
parents:
diff changeset
1153 int from_index = n - 1;
a61af66fc99e Initial load
duke
parents:
diff changeset
1154 int to_index = _operations.length() - 1;
a61af66fc99e Initial load
duke
parents:
diff changeset
1155 for (; ip_index >= 0; ip_index --) {
a61af66fc99e Initial load
duke
parents:
diff changeset
1156 int index = buffer->index_at(ip_index);
a61af66fc99e Initial load
duke
parents:
diff changeset
1157 // make room after insertion point
a61af66fc99e Initial load
duke
parents:
diff changeset
1158 while (index < from_index) {
a61af66fc99e Initial load
duke
parents:
diff changeset
1159 _operations.at_put(to_index --, _operations.at(from_index --));
a61af66fc99e Initial load
duke
parents:
diff changeset
1160 }
a61af66fc99e Initial load
duke
parents:
diff changeset
1161 // insert ops from buffer
a61af66fc99e Initial load
duke
parents:
diff changeset
1162 for (int i = buffer->count_at(ip_index); i > 0; i --) {
a61af66fc99e Initial load
duke
parents:
diff changeset
1163 _operations.at_put(to_index --, buffer->op_at(op_index --));
a61af66fc99e Initial load
duke
parents:
diff changeset
1164 }
a61af66fc99e Initial load
duke
parents:
diff changeset
1165 }
a61af66fc99e Initial load
duke
parents:
diff changeset
1166 }
a61af66fc99e Initial load
duke
parents:
diff changeset
1167
a61af66fc99e Initial load
duke
parents:
diff changeset
1168 buffer->finish();
a61af66fc99e Initial load
duke
parents:
diff changeset
1169 }
a61af66fc99e Initial load
duke
parents:
diff changeset
1170
a61af66fc99e Initial load
duke
parents:
diff changeset
1171
a61af66fc99e Initial load
duke
parents:
diff changeset
1172 void LIR_List::oop2reg_patch(jobject o, LIR_Opr reg, CodeEmitInfo* info) {
6739
8a02ca5e5576 7195816: NPG: Crash in c1_ValueType - ShouldNotReachHere
roland
parents: 6725
diff changeset
1173 assert(reg->type() == T_OBJECT, "bad reg");
0
a61af66fc99e Initial load
duke
parents:
diff changeset
1174 append(new LIR_Op1(lir_move, LIR_OprFact::oopConst(o), reg, T_OBJECT, lir_patch_normal, info));
a61af66fc99e Initial load
duke
parents:
diff changeset
1175 }
a61af66fc99e Initial load
duke
parents:
diff changeset
1176
6725
da91efe96a93 6964458: Reimplement class meta-data storage to use native memory
coleenp
parents: 6084
diff changeset
1177 void LIR_List::klass2reg_patch(Metadata* o, LIR_Opr reg, CodeEmitInfo* info) {
6739
8a02ca5e5576 7195816: NPG: Crash in c1_ValueType - ShouldNotReachHere
roland
parents: 6725
diff changeset
1178 assert(reg->type() == T_METADATA, "bad reg");
6725
da91efe96a93 6964458: Reimplement class meta-data storage to use native memory
coleenp
parents: 6084
diff changeset
1179 append(new LIR_Op1(lir_move, LIR_OprFact::metadataConst(o), reg, T_METADATA, lir_patch_normal, info));
da91efe96a93 6964458: Reimplement class meta-data storage to use native memory
coleenp
parents: 6084
diff changeset
1180 }
0
a61af66fc99e Initial load
duke
parents:
diff changeset
1181
a61af66fc99e Initial load
duke
parents:
diff changeset
1182 void LIR_List::load(LIR_Address* addr, LIR_Opr src, CodeEmitInfo* info, LIR_PatchCode patch_code) {
a61af66fc99e Initial load
duke
parents:
diff changeset
1183 append(new LIR_Op1(
a61af66fc99e Initial load
duke
parents:
diff changeset
1184 lir_move,
a61af66fc99e Initial load
duke
parents:
diff changeset
1185 LIR_OprFact::address(addr),
a61af66fc99e Initial load
duke
parents:
diff changeset
1186 src,
a61af66fc99e Initial load
duke
parents:
diff changeset
1187 addr->type(),
a61af66fc99e Initial load
duke
parents:
diff changeset
1188 patch_code,
a61af66fc99e Initial load
duke
parents:
diff changeset
1189 info));
a61af66fc99e Initial load
duke
parents:
diff changeset
1190 }
a61af66fc99e Initial load
duke
parents:
diff changeset
1191
a61af66fc99e Initial load
duke
parents:
diff changeset
1192
a61af66fc99e Initial load
duke
parents:
diff changeset
1193 void LIR_List::volatile_load_mem_reg(LIR_Address* address, LIR_Opr dst, CodeEmitInfo* info, LIR_PatchCode patch_code) {
a61af66fc99e Initial load
duke
parents:
diff changeset
1194 append(new LIR_Op1(
a61af66fc99e Initial load
duke
parents:
diff changeset
1195 lir_move,
a61af66fc99e Initial load
duke
parents:
diff changeset
1196 LIR_OprFact::address(address),
a61af66fc99e Initial load
duke
parents:
diff changeset
1197 dst,
a61af66fc99e Initial load
duke
parents:
diff changeset
1198 address->type(),
a61af66fc99e Initial load
duke
parents:
diff changeset
1199 patch_code,
a61af66fc99e Initial load
duke
parents:
diff changeset
1200 info, lir_move_volatile));
a61af66fc99e Initial load
duke
parents:
diff changeset
1201 }
a61af66fc99e Initial load
duke
parents:
diff changeset
1202
a61af66fc99e Initial load
duke
parents:
diff changeset
1203 void LIR_List::volatile_load_unsafe_reg(LIR_Opr base, LIR_Opr offset, LIR_Opr dst, BasicType type, CodeEmitInfo* info, LIR_PatchCode patch_code) {
a61af66fc99e Initial load
duke
parents:
diff changeset
1204 append(new LIR_Op1(
a61af66fc99e Initial load
duke
parents:
diff changeset
1205 lir_move,
a61af66fc99e Initial load
duke
parents:
diff changeset
1206 LIR_OprFact::address(new LIR_Address(base, offset, type)),
a61af66fc99e Initial load
duke
parents:
diff changeset
1207 dst,
a61af66fc99e Initial load
duke
parents:
diff changeset
1208 type,
a61af66fc99e Initial load
duke
parents:
diff changeset
1209 patch_code,
a61af66fc99e Initial load
duke
parents:
diff changeset
1210 info, lir_move_volatile));
a61af66fc99e Initial load
duke
parents:
diff changeset
1211 }
a61af66fc99e Initial load
duke
parents:
diff changeset
1212
a61af66fc99e Initial load
duke
parents:
diff changeset
1213
a61af66fc99e Initial load
duke
parents:
diff changeset
1214 void LIR_List::prefetch(LIR_Address* addr, bool is_store) {
a61af66fc99e Initial load
duke
parents:
diff changeset
1215 append(new LIR_Op1(
a61af66fc99e Initial load
duke
parents:
diff changeset
1216 is_store ? lir_prefetchw : lir_prefetchr,
a61af66fc99e Initial load
duke
parents:
diff changeset
1217 LIR_OprFact::address(addr)));
a61af66fc99e Initial load
duke
parents:
diff changeset
1218 }
a61af66fc99e Initial load
duke
parents:
diff changeset
1219
a61af66fc99e Initial load
duke
parents:
diff changeset
1220
a61af66fc99e Initial load
duke
parents:
diff changeset
1221 void LIR_List::store_mem_int(jint v, LIR_Opr base, int offset_in_bytes, BasicType type, CodeEmitInfo* info, LIR_PatchCode patch_code) {
a61af66fc99e Initial load
duke
parents:
diff changeset
1222 append(new LIR_Op1(
a61af66fc99e Initial load
duke
parents:
diff changeset
1223 lir_move,
a61af66fc99e Initial load
duke
parents:
diff changeset
1224 LIR_OprFact::intConst(v),
a61af66fc99e Initial load
duke
parents:
diff changeset
1225 LIR_OprFact::address(new LIR_Address(base, offset_in_bytes, type)),
a61af66fc99e Initial load
duke
parents:
diff changeset
1226 type,
a61af66fc99e Initial load
duke
parents:
diff changeset
1227 patch_code,
a61af66fc99e Initial load
duke
parents:
diff changeset
1228 info));
a61af66fc99e Initial load
duke
parents:
diff changeset
1229 }
a61af66fc99e Initial load
duke
parents:
diff changeset
1230
a61af66fc99e Initial load
duke
parents:
diff changeset
1231
a61af66fc99e Initial load
duke
parents:
diff changeset
1232 void LIR_List::store_mem_oop(jobject o, LIR_Opr base, int offset_in_bytes, BasicType type, CodeEmitInfo* info, LIR_PatchCode patch_code) {
a61af66fc99e Initial load
duke
parents:
diff changeset
1233 append(new LIR_Op1(
a61af66fc99e Initial load
duke
parents:
diff changeset
1234 lir_move,
a61af66fc99e Initial load
duke
parents:
diff changeset
1235 LIR_OprFact::oopConst(o),
a61af66fc99e Initial load
duke
parents:
diff changeset
1236 LIR_OprFact::address(new LIR_Address(base, offset_in_bytes, type)),
a61af66fc99e Initial load
duke
parents:
diff changeset
1237 type,
a61af66fc99e Initial load
duke
parents:
diff changeset
1238 patch_code,
a61af66fc99e Initial load
duke
parents:
diff changeset
1239 info));
a61af66fc99e Initial load
duke
parents:
diff changeset
1240 }
a61af66fc99e Initial load
duke
parents:
diff changeset
1241
a61af66fc99e Initial load
duke
parents:
diff changeset
1242
a61af66fc99e Initial load
duke
parents:
diff changeset
1243 void LIR_List::store(LIR_Opr src, LIR_Address* addr, CodeEmitInfo* info, LIR_PatchCode patch_code) {
a61af66fc99e Initial load
duke
parents:
diff changeset
1244 append(new LIR_Op1(
a61af66fc99e Initial load
duke
parents:
diff changeset
1245 lir_move,
a61af66fc99e Initial load
duke
parents:
diff changeset
1246 src,
a61af66fc99e Initial load
duke
parents:
diff changeset
1247 LIR_OprFact::address(addr),
a61af66fc99e Initial load
duke
parents:
diff changeset
1248 addr->type(),
a61af66fc99e Initial load
duke
parents:
diff changeset
1249 patch_code,
a61af66fc99e Initial load
duke
parents:
diff changeset
1250 info));
a61af66fc99e Initial load
duke
parents:
diff changeset
1251 }
a61af66fc99e Initial load
duke
parents:
diff changeset
1252
a61af66fc99e Initial load
duke
parents:
diff changeset
1253
a61af66fc99e Initial load
duke
parents:
diff changeset
1254 void LIR_List::volatile_store_mem_reg(LIR_Opr src, LIR_Address* addr, CodeEmitInfo* info, LIR_PatchCode patch_code) {
a61af66fc99e Initial load
duke
parents:
diff changeset
1255 append(new LIR_Op1(
a61af66fc99e Initial load
duke
parents:
diff changeset
1256 lir_move,
a61af66fc99e Initial load
duke
parents:
diff changeset
1257 src,
a61af66fc99e Initial load
duke
parents:
diff changeset
1258 LIR_OprFact::address(addr),
a61af66fc99e Initial load
duke
parents:
diff changeset
1259 addr->type(),
a61af66fc99e Initial load
duke
parents:
diff changeset
1260 patch_code,
a61af66fc99e Initial load
duke
parents:
diff changeset
1261 info,
a61af66fc99e Initial load
duke
parents:
diff changeset
1262 lir_move_volatile));
a61af66fc99e Initial load
duke
parents:
diff changeset
1263 }
a61af66fc99e Initial load
duke
parents:
diff changeset
1264
a61af66fc99e Initial load
duke
parents:
diff changeset
1265 void LIR_List::volatile_store_unsafe_reg(LIR_Opr src, LIR_Opr base, LIR_Opr offset, BasicType type, CodeEmitInfo* info, LIR_PatchCode patch_code) {
a61af66fc99e Initial load
duke
parents:
diff changeset
1266 append(new LIR_Op1(
a61af66fc99e Initial load
duke
parents:
diff changeset
1267 lir_move,
a61af66fc99e Initial load
duke
parents:
diff changeset
1268 src,
a61af66fc99e Initial load
duke
parents:
diff changeset
1269 LIR_OprFact::address(new LIR_Address(base, offset, type)),
a61af66fc99e Initial load
duke
parents:
diff changeset
1270 type,
a61af66fc99e Initial load
duke
parents:
diff changeset
1271 patch_code,
a61af66fc99e Initial load
duke
parents:
diff changeset
1272 info, lir_move_volatile));
a61af66fc99e Initial load
duke
parents:
diff changeset
1273 }
a61af66fc99e Initial load
duke
parents:
diff changeset
1274
a61af66fc99e Initial load
duke
parents:
diff changeset
1275
a61af66fc99e Initial load
duke
parents:
diff changeset
1276 void LIR_List::idiv(LIR_Opr left, LIR_Opr right, LIR_Opr res, LIR_Opr tmp, CodeEmitInfo* info) {
a61af66fc99e Initial load
duke
parents:
diff changeset
1277 append(new LIR_Op3(
a61af66fc99e Initial load
duke
parents:
diff changeset
1278 lir_idiv,
a61af66fc99e Initial load
duke
parents:
diff changeset
1279 left,
a61af66fc99e Initial load
duke
parents:
diff changeset
1280 right,
a61af66fc99e Initial load
duke
parents:
diff changeset
1281 tmp,
a61af66fc99e Initial load
duke
parents:
diff changeset
1282 res,
a61af66fc99e Initial load
duke
parents:
diff changeset
1283 info));
a61af66fc99e Initial load
duke
parents:
diff changeset
1284 }
a61af66fc99e Initial load
duke
parents:
diff changeset
1285
a61af66fc99e Initial load
duke
parents:
diff changeset
1286
a61af66fc99e Initial load
duke
parents:
diff changeset
1287 void LIR_List::idiv(LIR_Opr left, int right, LIR_Opr res, LIR_Opr tmp, CodeEmitInfo* info) {
a61af66fc99e Initial load
duke
parents:
diff changeset
1288 append(new LIR_Op3(
a61af66fc99e Initial load
duke
parents:
diff changeset
1289 lir_idiv,
a61af66fc99e Initial load
duke
parents:
diff changeset
1290 left,
a61af66fc99e Initial load
duke
parents:
diff changeset
1291 LIR_OprFact::intConst(right),
a61af66fc99e Initial load
duke
parents:
diff changeset
1292 tmp,
a61af66fc99e Initial load
duke
parents:
diff changeset
1293 res,
a61af66fc99e Initial load
duke
parents:
diff changeset
1294 info));
a61af66fc99e Initial load
duke
parents:
diff changeset
1295 }
a61af66fc99e Initial load
duke
parents:
diff changeset
1296
a61af66fc99e Initial load
duke
parents:
diff changeset
1297
a61af66fc99e Initial load
duke
parents:
diff changeset
1298 void LIR_List::irem(LIR_Opr left, LIR_Opr right, LIR_Opr res, LIR_Opr tmp, CodeEmitInfo* info) {
a61af66fc99e Initial load
duke
parents:
diff changeset
1299 append(new LIR_Op3(
a61af66fc99e Initial load
duke
parents:
diff changeset
1300 lir_irem,
a61af66fc99e Initial load
duke
parents:
diff changeset
1301 left,
a61af66fc99e Initial load
duke
parents:
diff changeset
1302 right,
a61af66fc99e Initial load
duke
parents:
diff changeset
1303 tmp,
a61af66fc99e Initial load
duke
parents:
diff changeset
1304 res,
a61af66fc99e Initial load
duke
parents:
diff changeset
1305 info));
a61af66fc99e Initial load
duke
parents:
diff changeset
1306 }
a61af66fc99e Initial load
duke
parents:
diff changeset
1307
a61af66fc99e Initial load
duke
parents:
diff changeset
1308
a61af66fc99e Initial load
duke
parents:
diff changeset
1309 void LIR_List::irem(LIR_Opr left, int right, LIR_Opr res, LIR_Opr tmp, CodeEmitInfo* info) {
a61af66fc99e Initial load
duke
parents:
diff changeset
1310 append(new LIR_Op3(
a61af66fc99e Initial load
duke
parents:
diff changeset
1311 lir_irem,
a61af66fc99e Initial load
duke
parents:
diff changeset
1312 left,
a61af66fc99e Initial load
duke
parents:
diff changeset
1313 LIR_OprFact::intConst(right),
a61af66fc99e Initial load
duke
parents:
diff changeset
1314 tmp,
a61af66fc99e Initial load
duke
parents:
diff changeset
1315 res,
a61af66fc99e Initial load
duke
parents:
diff changeset
1316 info));
a61af66fc99e Initial load
duke
parents:
diff changeset
1317 }
a61af66fc99e Initial load
duke
parents:
diff changeset
1318
a61af66fc99e Initial load
duke
parents:
diff changeset
1319
a61af66fc99e Initial load
duke
parents:
diff changeset
1320 void LIR_List::cmp_mem_int(LIR_Condition condition, LIR_Opr base, int disp, int c, CodeEmitInfo* info) {
a61af66fc99e Initial load
duke
parents:
diff changeset
1321 append(new LIR_Op2(
a61af66fc99e Initial load
duke
parents:
diff changeset
1322 lir_cmp,
a61af66fc99e Initial load
duke
parents:
diff changeset
1323 condition,
a61af66fc99e Initial load
duke
parents:
diff changeset
1324 LIR_OprFact::address(new LIR_Address(base, disp, T_INT)),
a61af66fc99e Initial load
duke
parents:
diff changeset
1325 LIR_OprFact::intConst(c),
a61af66fc99e Initial load
duke
parents:
diff changeset
1326 info));
a61af66fc99e Initial load
duke
parents:
diff changeset
1327 }
a61af66fc99e Initial load
duke
parents:
diff changeset
1328
a61af66fc99e Initial load
duke
parents:
diff changeset
1329
a61af66fc99e Initial load
duke
parents:
diff changeset
1330 void LIR_List::cmp_reg_mem(LIR_Condition condition, LIR_Opr reg, LIR_Address* addr, CodeEmitInfo* info) {
a61af66fc99e Initial load
duke
parents:
diff changeset
1331 append(new LIR_Op2(
a61af66fc99e Initial load
duke
parents:
diff changeset
1332 lir_cmp,
a61af66fc99e Initial load
duke
parents:
diff changeset
1333 condition,
a61af66fc99e Initial load
duke
parents:
diff changeset
1334 reg,
a61af66fc99e Initial load
duke
parents:
diff changeset
1335 LIR_OprFact::address(addr),
a61af66fc99e Initial load
duke
parents:
diff changeset
1336 info));
a61af66fc99e Initial load
duke
parents:
diff changeset
1337 }
a61af66fc99e Initial load
duke
parents:
diff changeset
1338
a61af66fc99e Initial load
duke
parents:
diff changeset
1339 void LIR_List::allocate_object(LIR_Opr dst, LIR_Opr t1, LIR_Opr t2, LIR_Opr t3, LIR_Opr t4,
a61af66fc99e Initial load
duke
parents:
diff changeset
1340 int header_size, int object_size, LIR_Opr klass, bool init_check, CodeStub* stub) {
a61af66fc99e Initial load
duke
parents:
diff changeset
1341 append(new LIR_OpAllocObj(
a61af66fc99e Initial load
duke
parents:
diff changeset
1342 klass,
a61af66fc99e Initial load
duke
parents:
diff changeset
1343 dst,
a61af66fc99e Initial load
duke
parents:
diff changeset
1344 t1,
a61af66fc99e Initial load
duke
parents:
diff changeset
1345 t2,
a61af66fc99e Initial load
duke
parents:
diff changeset
1346 t3,
a61af66fc99e Initial load
duke
parents:
diff changeset
1347 t4,
a61af66fc99e Initial load
duke
parents:
diff changeset
1348 header_size,
a61af66fc99e Initial load
duke
parents:
diff changeset
1349 object_size,
a61af66fc99e Initial load
duke
parents:
diff changeset
1350 init_check,
a61af66fc99e Initial load
duke
parents:
diff changeset
1351 stub));
a61af66fc99e Initial load
duke
parents:
diff changeset
1352 }
a61af66fc99e Initial load
duke
parents:
diff changeset
1353
a61af66fc99e Initial load
duke
parents:
diff changeset
1354 void LIR_List::allocate_array(LIR_Opr dst, LIR_Opr len, LIR_Opr t1,LIR_Opr t2, LIR_Opr t3,LIR_Opr t4, BasicType type, LIR_Opr klass, CodeStub* stub) {
a61af66fc99e Initial load
duke
parents:
diff changeset
1355 append(new LIR_OpAllocArray(
a61af66fc99e Initial load
duke
parents:
diff changeset
1356 klass,
a61af66fc99e Initial load
duke
parents:
diff changeset
1357 len,
a61af66fc99e Initial load
duke
parents:
diff changeset
1358 dst,
a61af66fc99e Initial load
duke
parents:
diff changeset
1359 t1,
a61af66fc99e Initial load
duke
parents:
diff changeset
1360 t2,
a61af66fc99e Initial load
duke
parents:
diff changeset
1361 t3,
a61af66fc99e Initial load
duke
parents:
diff changeset
1362 t4,
a61af66fc99e Initial load
duke
parents:
diff changeset
1363 type,
a61af66fc99e Initial load
duke
parents:
diff changeset
1364 stub));
a61af66fc99e Initial load
duke
parents:
diff changeset
1365 }
a61af66fc99e Initial load
duke
parents:
diff changeset
1366
a61af66fc99e Initial load
duke
parents:
diff changeset
1367 void LIR_List::shift_left(LIR_Opr value, LIR_Opr count, LIR_Opr dst, LIR_Opr tmp) {
a61af66fc99e Initial load
duke
parents:
diff changeset
1368 append(new LIR_Op2(
a61af66fc99e Initial load
duke
parents:
diff changeset
1369 lir_shl,
a61af66fc99e Initial load
duke
parents:
diff changeset
1370 value,
a61af66fc99e Initial load
duke
parents:
diff changeset
1371 count,
a61af66fc99e Initial load
duke
parents:
diff changeset
1372 dst,
a61af66fc99e Initial load
duke
parents:
diff changeset
1373 tmp));
a61af66fc99e Initial load
duke
parents:
diff changeset
1374 }
a61af66fc99e Initial load
duke
parents:
diff changeset
1375
a61af66fc99e Initial load
duke
parents:
diff changeset
1376 void LIR_List::shift_right(LIR_Opr value, LIR_Opr count, LIR_Opr dst, LIR_Opr tmp) {
a61af66fc99e Initial load
duke
parents:
diff changeset
1377 append(new LIR_Op2(
a61af66fc99e Initial load
duke
parents:
diff changeset
1378 lir_shr,
a61af66fc99e Initial load
duke
parents:
diff changeset
1379 value,
a61af66fc99e Initial load
duke
parents:
diff changeset
1380 count,
a61af66fc99e Initial load
duke
parents:
diff changeset
1381 dst,
a61af66fc99e Initial load
duke
parents:
diff changeset
1382 tmp));
a61af66fc99e Initial load
duke
parents:
diff changeset
1383 }
a61af66fc99e Initial load
duke
parents:
diff changeset
1384
a61af66fc99e Initial load
duke
parents:
diff changeset
1385
a61af66fc99e Initial load
duke
parents:
diff changeset
1386 void LIR_List::unsigned_shift_right(LIR_Opr value, LIR_Opr count, LIR_Opr dst, LIR_Opr tmp) {
a61af66fc99e Initial load
duke
parents:
diff changeset
1387 append(new LIR_Op2(
a61af66fc99e Initial load
duke
parents:
diff changeset
1388 lir_ushr,
a61af66fc99e Initial load
duke
parents:
diff changeset
1389 value,
a61af66fc99e Initial load
duke
parents:
diff changeset
1390 count,
a61af66fc99e Initial load
duke
parents:
diff changeset
1391 dst,
a61af66fc99e Initial load
duke
parents:
diff changeset
1392 tmp));
a61af66fc99e Initial load
duke
parents:
diff changeset
1393 }
a61af66fc99e Initial load
duke
parents:
diff changeset
1394
a61af66fc99e Initial load
duke
parents:
diff changeset
1395 void LIR_List::fcmp2int(LIR_Opr left, LIR_Opr right, LIR_Opr dst, bool is_unordered_less) {
a61af66fc99e Initial load
duke
parents:
diff changeset
1396 append(new LIR_Op2(is_unordered_less ? lir_ucmp_fd2i : lir_cmp_fd2i,
a61af66fc99e Initial load
duke
parents:
diff changeset
1397 left,
a61af66fc99e Initial load
duke
parents:
diff changeset
1398 right,
a61af66fc99e Initial load
duke
parents:
diff changeset
1399 dst));
a61af66fc99e Initial load
duke
parents:
diff changeset
1400 }
a61af66fc99e Initial load
duke
parents:
diff changeset
1401
a61af66fc99e Initial load
duke
parents:
diff changeset
1402 void LIR_List::lock_object(LIR_Opr hdr, LIR_Opr obj, LIR_Opr lock, LIR_Opr scratch, CodeStub* stub, CodeEmitInfo* info) {
a61af66fc99e Initial load
duke
parents:
diff changeset
1403 append(new LIR_OpLock(
a61af66fc99e Initial load
duke
parents:
diff changeset
1404 lir_lock,
a61af66fc99e Initial load
duke
parents:
diff changeset
1405 hdr,
a61af66fc99e Initial load
duke
parents:
diff changeset
1406 obj,
a61af66fc99e Initial load
duke
parents:
diff changeset
1407 lock,
a61af66fc99e Initial load
duke
parents:
diff changeset
1408 scratch,
a61af66fc99e Initial load
duke
parents:
diff changeset
1409 stub,
a61af66fc99e Initial load
duke
parents:
diff changeset
1410 info));
a61af66fc99e Initial load
duke
parents:
diff changeset
1411 }
a61af66fc99e Initial load
duke
parents:
diff changeset
1412
1681
126ea7725993 6953477: Increase portability and flexibility of building Hotspot
bobv
parents: 1579
diff changeset
1413 void LIR_List::unlock_object(LIR_Opr hdr, LIR_Opr obj, LIR_Opr lock, LIR_Opr scratch, CodeStub* stub) {
0
a61af66fc99e Initial load
duke
parents:
diff changeset
1414 append(new LIR_OpLock(
a61af66fc99e Initial load
duke
parents:
diff changeset
1415 lir_unlock,
a61af66fc99e Initial load
duke
parents:
diff changeset
1416 hdr,
a61af66fc99e Initial load
duke
parents:
diff changeset
1417 obj,
a61af66fc99e Initial load
duke
parents:
diff changeset
1418 lock,
1681
126ea7725993 6953477: Increase portability and flexibility of building Hotspot
bobv
parents: 1579
diff changeset
1419 scratch,
0
a61af66fc99e Initial load
duke
parents:
diff changeset
1420 stub,
a61af66fc99e Initial load
duke
parents:
diff changeset
1421 NULL));
a61af66fc99e Initial load
duke
parents:
diff changeset
1422 }
a61af66fc99e Initial load
duke
parents:
diff changeset
1423
a61af66fc99e Initial load
duke
parents:
diff changeset
1424
a61af66fc99e Initial load
duke
parents:
diff changeset
1425 void check_LIR() {
a61af66fc99e Initial load
duke
parents:
diff changeset
1426 // cannot do the proper checking as PRODUCT and other modes return different results
a61af66fc99e Initial load
duke
parents:
diff changeset
1427 // guarantee(sizeof(LIR_OprDesc) == wordSize, "may not have a v-table");
a61af66fc99e Initial load
duke
parents:
diff changeset
1428 }
a61af66fc99e Initial load
duke
parents:
diff changeset
1429
a61af66fc99e Initial load
duke
parents:
diff changeset
1430
a61af66fc99e Initial load
duke
parents:
diff changeset
1431
a61af66fc99e Initial load
duke
parents:
diff changeset
1432 void LIR_List::checkcast (LIR_Opr result, LIR_Opr object, ciKlass* klass,
a61af66fc99e Initial load
duke
parents:
diff changeset
1433 LIR_Opr tmp1, LIR_Opr tmp2, LIR_Opr tmp3, bool fast_check,
a61af66fc99e Initial load
duke
parents:
diff changeset
1434 CodeEmitInfo* info_for_exception, CodeEmitInfo* info_for_patch, CodeStub* stub,
a61af66fc99e Initial load
duke
parents:
diff changeset
1435 ciMethod* profiled_method, int profiled_bci) {
1783
d5d065957597 6953144: Tiered compilation
iveresov
parents: 1681
diff changeset
1436 LIR_OpTypeCheck* c = new LIR_OpTypeCheck(lir_checkcast, result, object, klass,
d5d065957597 6953144: Tiered compilation
iveresov
parents: 1681
diff changeset
1437 tmp1, tmp2, tmp3, fast_check, info_for_exception, info_for_patch, stub);
d5d065957597 6953144: Tiered compilation
iveresov
parents: 1681
diff changeset
1438 if (profiled_method != NULL) {
d5d065957597 6953144: Tiered compilation
iveresov
parents: 1681
diff changeset
1439 c->set_profiled_method(profiled_method);
d5d065957597 6953144: Tiered compilation
iveresov
parents: 1681
diff changeset
1440 c->set_profiled_bci(profiled_bci);
d5d065957597 6953144: Tiered compilation
iveresov
parents: 1681
diff changeset
1441 c->set_should_profile(true);
d5d065957597 6953144: Tiered compilation
iveresov
parents: 1681
diff changeset
1442 }
d5d065957597 6953144: Tiered compilation
iveresov
parents: 1681
diff changeset
1443 append(c);
0
a61af66fc99e Initial load
duke
parents:
diff changeset
1444 }
a61af66fc99e Initial load
duke
parents:
diff changeset
1445
1791
3a294e483abc 6919069: client compiler needs to capture more profile information for tiered work
iveresov
parents: 1783
diff changeset
1446 void LIR_List::instanceof(LIR_Opr result, LIR_Opr object, ciKlass* klass, LIR_Opr tmp1, LIR_Opr tmp2, LIR_Opr tmp3, bool fast_check, CodeEmitInfo* info_for_patch, ciMethod* profiled_method, int profiled_bci) {
3a294e483abc 6919069: client compiler needs to capture more profile information for tiered work
iveresov
parents: 1783
diff changeset
1447 LIR_OpTypeCheck* c = new LIR_OpTypeCheck(lir_instanceof, result, object, klass, tmp1, tmp2, tmp3, fast_check, NULL, info_for_patch, NULL);
3a294e483abc 6919069: client compiler needs to capture more profile information for tiered work
iveresov
parents: 1783
diff changeset
1448 if (profiled_method != NULL) {
3a294e483abc 6919069: client compiler needs to capture more profile information for tiered work
iveresov
parents: 1783
diff changeset
1449 c->set_profiled_method(profiled_method);
3a294e483abc 6919069: client compiler needs to capture more profile information for tiered work
iveresov
parents: 1783
diff changeset
1450 c->set_profiled_bci(profiled_bci);
3a294e483abc 6919069: client compiler needs to capture more profile information for tiered work
iveresov
parents: 1783
diff changeset
1451 c->set_should_profile(true);
3a294e483abc 6919069: client compiler needs to capture more profile information for tiered work
iveresov
parents: 1783
diff changeset
1452 }
3a294e483abc 6919069: client compiler needs to capture more profile information for tiered work
iveresov
parents: 1783
diff changeset
1453 append(c);
0
a61af66fc99e Initial load
duke
parents:
diff changeset
1454 }
a61af66fc99e Initial load
duke
parents:
diff changeset
1455
a61af66fc99e Initial load
duke
parents:
diff changeset
1456
3957
5cceda753a4a 7091764: Tiered: enable aastore profiling
iveresov
parents: 3942
diff changeset
1457 void LIR_List::store_check(LIR_Opr object, LIR_Opr array, LIR_Opr tmp1, LIR_Opr tmp2, LIR_Opr tmp3,
5cceda753a4a 7091764: Tiered: enable aastore profiling
iveresov
parents: 3942
diff changeset
1458 CodeEmitInfo* info_for_exception, ciMethod* profiled_method, int profiled_bci) {
5cceda753a4a 7091764: Tiered: enable aastore profiling
iveresov
parents: 3942
diff changeset
1459 LIR_OpTypeCheck* c = new LIR_OpTypeCheck(lir_store_check, object, array, tmp1, tmp2, tmp3, info_for_exception);
5cceda753a4a 7091764: Tiered: enable aastore profiling
iveresov
parents: 3942
diff changeset
1460 if (profiled_method != NULL) {
5cceda753a4a 7091764: Tiered: enable aastore profiling
iveresov
parents: 3942
diff changeset
1461 c->set_profiled_method(profiled_method);
5cceda753a4a 7091764: Tiered: enable aastore profiling
iveresov
parents: 3942
diff changeset
1462 c->set_profiled_bci(profiled_bci);
5cceda753a4a 7091764: Tiered: enable aastore profiling
iveresov
parents: 3942
diff changeset
1463 c->set_should_profile(true);
5cceda753a4a 7091764: Tiered: enable aastore profiling
iveresov
parents: 3942
diff changeset
1464 }
5cceda753a4a 7091764: Tiered: enable aastore profiling
iveresov
parents: 3942
diff changeset
1465 append(c);
0
a61af66fc99e Initial load
duke
parents:
diff changeset
1466 }
a61af66fc99e Initial load
duke
parents:
diff changeset
1467
a61af66fc99e Initial load
duke
parents:
diff changeset
1468
1681
126ea7725993 6953477: Increase portability and flexibility of building Hotspot
bobv
parents: 1579
diff changeset
1469 void LIR_List::cas_long(LIR_Opr addr, LIR_Opr cmp_value, LIR_Opr new_value,
126ea7725993 6953477: Increase portability and flexibility of building Hotspot
bobv
parents: 1579
diff changeset
1470 LIR_Opr t1, LIR_Opr t2, LIR_Opr result) {
126ea7725993 6953477: Increase portability and flexibility of building Hotspot
bobv
parents: 1579
diff changeset
1471 append(new LIR_OpCompareAndSwap(lir_cas_long, addr, cmp_value, new_value, t1, t2, result));
0
a61af66fc99e Initial load
duke
parents:
diff changeset
1472 }
a61af66fc99e Initial load
duke
parents:
diff changeset
1473
1681
126ea7725993 6953477: Increase portability and flexibility of building Hotspot
bobv
parents: 1579
diff changeset
1474 void LIR_List::cas_obj(LIR_Opr addr, LIR_Opr cmp_value, LIR_Opr new_value,
126ea7725993 6953477: Increase portability and flexibility of building Hotspot
bobv
parents: 1579
diff changeset
1475 LIR_Opr t1, LIR_Opr t2, LIR_Opr result) {
126ea7725993 6953477: Increase portability and flexibility of building Hotspot
bobv
parents: 1579
diff changeset
1476 append(new LIR_OpCompareAndSwap(lir_cas_obj, addr, cmp_value, new_value, t1, t2, result));
0
a61af66fc99e Initial load
duke
parents:
diff changeset
1477 }
a61af66fc99e Initial load
duke
parents:
diff changeset
1478
1681
126ea7725993 6953477: Increase portability and flexibility of building Hotspot
bobv
parents: 1579
diff changeset
1479 void LIR_List::cas_int(LIR_Opr addr, LIR_Opr cmp_value, LIR_Opr new_value,
126ea7725993 6953477: Increase portability and flexibility of building Hotspot
bobv
parents: 1579
diff changeset
1480 LIR_Opr t1, LIR_Opr t2, LIR_Opr result) {
126ea7725993 6953477: Increase portability and flexibility of building Hotspot
bobv
parents: 1579
diff changeset
1481 append(new LIR_OpCompareAndSwap(lir_cas_int, addr, cmp_value, new_value, t1, t2, result));
0
a61af66fc99e Initial load
duke
parents:
diff changeset
1482 }
a61af66fc99e Initial load
duke
parents:
diff changeset
1483
a61af66fc99e Initial load
duke
parents:
diff changeset
1484
a61af66fc99e Initial load
duke
parents:
diff changeset
1485 #ifdef PRODUCT
a61af66fc99e Initial load
duke
parents:
diff changeset
1486
a61af66fc99e Initial load
duke
parents:
diff changeset
1487 void print_LIR(BlockList* blocks) {
a61af66fc99e Initial load
duke
parents:
diff changeset
1488 }
a61af66fc99e Initial load
duke
parents:
diff changeset
1489
a61af66fc99e Initial load
duke
parents:
diff changeset
1490 #else
a61af66fc99e Initial load
duke
parents:
diff changeset
1491 // LIR_OprDesc
a61af66fc99e Initial load
duke
parents:
diff changeset
1492 void LIR_OprDesc::print() const {
a61af66fc99e Initial load
duke
parents:
diff changeset
1493 print(tty);
a61af66fc99e Initial load
duke
parents:
diff changeset
1494 }
a61af66fc99e Initial load
duke
parents:
diff changeset
1495
a61af66fc99e Initial load
duke
parents:
diff changeset
1496 void LIR_OprDesc::print(outputStream* out) const {
a61af66fc99e Initial load
duke
parents:
diff changeset
1497 if (is_illegal()) {
a61af66fc99e Initial load
duke
parents:
diff changeset
1498 return;
a61af66fc99e Initial load
duke
parents:
diff changeset
1499 }
a61af66fc99e Initial load
duke
parents:
diff changeset
1500
a61af66fc99e Initial load
duke
parents:
diff changeset
1501 out->print("[");
a61af66fc99e Initial load
duke
parents:
diff changeset
1502 if (is_pointer()) {
a61af66fc99e Initial load
duke
parents:
diff changeset
1503 pointer()->print_value_on(out);
a61af66fc99e Initial load
duke
parents:
diff changeset
1504 } else if (is_single_stack()) {
a61af66fc99e Initial load
duke
parents:
diff changeset
1505 out->print("stack:%d", single_stack_ix());
a61af66fc99e Initial load
duke
parents:
diff changeset
1506 } else if (is_double_stack()) {
a61af66fc99e Initial load
duke
parents:
diff changeset
1507 out->print("dbl_stack:%d",double_stack_ix());
a61af66fc99e Initial load
duke
parents:
diff changeset
1508 } else if (is_virtual()) {
a61af66fc99e Initial load
duke
parents:
diff changeset
1509 out->print("R%d", vreg_number());
a61af66fc99e Initial load
duke
parents:
diff changeset
1510 } else if (is_single_cpu()) {
a61af66fc99e Initial load
duke
parents:
diff changeset
1511 out->print(as_register()->name());
a61af66fc99e Initial load
duke
parents:
diff changeset
1512 } else if (is_double_cpu()) {
a61af66fc99e Initial load
duke
parents:
diff changeset
1513 out->print(as_register_hi()->name());
a61af66fc99e Initial load
duke
parents:
diff changeset
1514 out->print(as_register_lo()->name());
304
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 196
diff changeset
1515 #if defined(X86)
0
a61af66fc99e Initial load
duke
parents:
diff changeset
1516 } else if (is_single_xmm()) {
a61af66fc99e Initial load
duke
parents:
diff changeset
1517 out->print(as_xmm_float_reg()->name());
a61af66fc99e Initial load
duke
parents:
diff changeset
1518 } else if (is_double_xmm()) {
a61af66fc99e Initial load
duke
parents:
diff changeset
1519 out->print(as_xmm_double_reg()->name());
a61af66fc99e Initial load
duke
parents:
diff changeset
1520 } else if (is_single_fpu()) {
a61af66fc99e Initial load
duke
parents:
diff changeset
1521 out->print("fpu%d", fpu_regnr());
a61af66fc99e Initial load
duke
parents:
diff changeset
1522 } else if (is_double_fpu()) {
a61af66fc99e Initial load
duke
parents:
diff changeset
1523 out->print("fpu%d", fpu_regnrLo());
1681
126ea7725993 6953477: Increase portability and flexibility of building Hotspot
bobv
parents: 1579
diff changeset
1524 #elif defined(ARM)
126ea7725993 6953477: Increase portability and flexibility of building Hotspot
bobv
parents: 1579
diff changeset
1525 } else if (is_single_fpu()) {
126ea7725993 6953477: Increase portability and flexibility of building Hotspot
bobv
parents: 1579
diff changeset
1526 out->print("s%d", fpu_regnr());
126ea7725993 6953477: Increase portability and flexibility of building Hotspot
bobv
parents: 1579
diff changeset
1527 } else if (is_double_fpu()) {
126ea7725993 6953477: Increase portability and flexibility of building Hotspot
bobv
parents: 1579
diff changeset
1528 out->print("d%d", fpu_regnrLo() >> 1);
0
a61af66fc99e Initial load
duke
parents:
diff changeset
1529 #else
a61af66fc99e Initial load
duke
parents:
diff changeset
1530 } else if (is_single_fpu()) {
a61af66fc99e Initial load
duke
parents:
diff changeset
1531 out->print(as_float_reg()->name());
a61af66fc99e Initial load
duke
parents:
diff changeset
1532 } else if (is_double_fpu()) {
a61af66fc99e Initial load
duke
parents:
diff changeset
1533 out->print(as_double_reg()->name());
a61af66fc99e Initial load
duke
parents:
diff changeset
1534 #endif
a61af66fc99e Initial load
duke
parents:
diff changeset
1535
a61af66fc99e Initial load
duke
parents:
diff changeset
1536 } else if (is_illegal()) {
a61af66fc99e Initial load
duke
parents:
diff changeset
1537 out->print("-");
a61af66fc99e Initial load
duke
parents:
diff changeset
1538 } else {
a61af66fc99e Initial load
duke
parents:
diff changeset
1539 out->print("Unknown Operand");
a61af66fc99e Initial load
duke
parents:
diff changeset
1540 }
a61af66fc99e Initial load
duke
parents:
diff changeset
1541 if (!is_illegal()) {
a61af66fc99e Initial load
duke
parents:
diff changeset
1542 out->print("|%c", type_char());
a61af66fc99e Initial load
duke
parents:
diff changeset
1543 }
a61af66fc99e Initial load
duke
parents:
diff changeset
1544 if (is_register() && is_last_use()) {
a61af66fc99e Initial load
duke
parents:
diff changeset
1545 out->print("(last_use)");
a61af66fc99e Initial load
duke
parents:
diff changeset
1546 }
a61af66fc99e Initial load
duke
parents:
diff changeset
1547 out->print("]");
a61af66fc99e Initial load
duke
parents:
diff changeset
1548 }
a61af66fc99e Initial load
duke
parents:
diff changeset
1549
a61af66fc99e Initial load
duke
parents:
diff changeset
1550
a61af66fc99e Initial load
duke
parents:
diff changeset
1551 // LIR_Address
a61af66fc99e Initial load
duke
parents:
diff changeset
1552 void LIR_Const::print_value_on(outputStream* out) const {
a61af66fc99e Initial load
duke
parents:
diff changeset
1553 switch (type()) {
1297
c466efa608d5 6932496: c1: deoptimization of jsr subroutine fails on sparcv9
roland
parents: 1295
diff changeset
1554 case T_ADDRESS:out->print("address:%d",as_jint()); break;
0
a61af66fc99e Initial load
duke
parents:
diff changeset
1555 case T_INT: out->print("int:%d", as_jint()); break;
a61af66fc99e Initial load
duke
parents:
diff changeset
1556 case T_LONG: out->print("lng:%lld", as_jlong()); break;
a61af66fc99e Initial load
duke
parents:
diff changeset
1557 case T_FLOAT: out->print("flt:%f", as_jfloat()); break;
a61af66fc99e Initial load
duke
parents:
diff changeset
1558 case T_DOUBLE: out->print("dbl:%f", as_jdouble()); break;
a61af66fc99e Initial load
duke
parents:
diff changeset
1559 case T_OBJECT: out->print("obj:0x%x", as_jobject()); break;
6725
da91efe96a93 6964458: Reimplement class meta-data storage to use native memory
coleenp
parents: 6084
diff changeset
1560 case T_METADATA: out->print("metadata:0x%x", as_metadata());break;
0
a61af66fc99e Initial load
duke
parents:
diff changeset
1561 default: out->print("%3d:0x%x",type(), as_jdouble()); break;
a61af66fc99e Initial load
duke
parents:
diff changeset
1562 }
a61af66fc99e Initial load
duke
parents:
diff changeset
1563 }
a61af66fc99e Initial load
duke
parents:
diff changeset
1564
a61af66fc99e Initial load
duke
parents:
diff changeset
1565 // LIR_Address
a61af66fc99e Initial load
duke
parents:
diff changeset
1566 void LIR_Address::print_value_on(outputStream* out) const {
a61af66fc99e Initial load
duke
parents:
diff changeset
1567 out->print("Base:"); _base->print(out);
a61af66fc99e Initial load
duke
parents:
diff changeset
1568 if (!_index->is_illegal()) {
a61af66fc99e Initial load
duke
parents:
diff changeset
1569 out->print(" Index:"); _index->print(out);
a61af66fc99e Initial load
duke
parents:
diff changeset
1570 switch (scale()) {
a61af66fc99e Initial load
duke
parents:
diff changeset
1571 case times_1: break;
a61af66fc99e Initial load
duke
parents:
diff changeset
1572 case times_2: out->print(" * 2"); break;
a61af66fc99e Initial load
duke
parents:
diff changeset
1573 case times_4: out->print(" * 4"); break;
a61af66fc99e Initial load
duke
parents:
diff changeset
1574 case times_8: out->print(" * 8"); break;
a61af66fc99e Initial load
duke
parents:
diff changeset
1575 }
a61af66fc99e Initial load
duke
parents:
diff changeset
1576 }
a61af66fc99e Initial load
duke
parents:
diff changeset
1577 out->print(" Disp: %d", _disp);
a61af66fc99e Initial load
duke
parents:
diff changeset
1578 }
a61af66fc99e Initial load
duke
parents:
diff changeset
1579
a61af66fc99e Initial load
duke
parents:
diff changeset
1580 // debug output of block header without InstructionPrinter
a61af66fc99e Initial load
duke
parents:
diff changeset
1581 // (because phi functions are not necessary for LIR)
a61af66fc99e Initial load
duke
parents:
diff changeset
1582 static void print_block(BlockBegin* x) {
a61af66fc99e Initial load
duke
parents:
diff changeset
1583 // print block id
a61af66fc99e Initial load
duke
parents:
diff changeset
1584 BlockEnd* end = x->end();
a61af66fc99e Initial load
duke
parents:
diff changeset
1585 tty->print("B%d ", x->block_id());
a61af66fc99e Initial load
duke
parents:
diff changeset
1586
a61af66fc99e Initial load
duke
parents:
diff changeset
1587 // print flags
a61af66fc99e Initial load
duke
parents:
diff changeset
1588 if (x->is_set(BlockBegin::std_entry_flag)) tty->print("std ");
a61af66fc99e Initial load
duke
parents:
diff changeset
1589 if (x->is_set(BlockBegin::osr_entry_flag)) tty->print("osr ");
a61af66fc99e Initial load
duke
parents:
diff changeset
1590 if (x->is_set(BlockBegin::exception_entry_flag)) tty->print("ex ");
a61af66fc99e Initial load
duke
parents:
diff changeset
1591 if (x->is_set(BlockBegin::subroutine_entry_flag)) tty->print("jsr ");
a61af66fc99e Initial load
duke
parents:
diff changeset
1592 if (x->is_set(BlockBegin::backward_branch_target_flag)) tty->print("bb ");
a61af66fc99e Initial load
duke
parents:
diff changeset
1593 if (x->is_set(BlockBegin::linear_scan_loop_header_flag)) tty->print("lh ");
a61af66fc99e Initial load
duke
parents:
diff changeset
1594 if (x->is_set(BlockBegin::linear_scan_loop_end_flag)) tty->print("le ");
a61af66fc99e Initial load
duke
parents:
diff changeset
1595
a61af66fc99e Initial load
duke
parents:
diff changeset
1596 // print block bci range
1819
f02a8bbe6ed4 6986046: C1 valuestack cleanup
roland
parents: 1816
diff changeset
1597 tty->print("[%d, %d] ", x->bci(), (end == NULL ? -1 : end->printable_bci()));
0
a61af66fc99e Initial load
duke
parents:
diff changeset
1598
a61af66fc99e Initial load
duke
parents:
diff changeset
1599 // print predecessors and successors
a61af66fc99e Initial load
duke
parents:
diff changeset
1600 if (x->number_of_preds() > 0) {
a61af66fc99e Initial load
duke
parents:
diff changeset
1601 tty->print("preds: ");
a61af66fc99e Initial load
duke
parents:
diff changeset
1602 for (int i = 0; i < x->number_of_preds(); i ++) {
a61af66fc99e Initial load
duke
parents:
diff changeset
1603 tty->print("B%d ", x->pred_at(i)->block_id());
a61af66fc99e Initial load
duke
parents:
diff changeset
1604 }
a61af66fc99e Initial load
duke
parents:
diff changeset
1605 }
a61af66fc99e Initial load
duke
parents:
diff changeset
1606
a61af66fc99e Initial load
duke
parents:
diff changeset
1607 if (x->number_of_sux() > 0) {
a61af66fc99e Initial load
duke
parents:
diff changeset
1608 tty->print("sux: ");
a61af66fc99e Initial load
duke
parents:
diff changeset
1609 for (int i = 0; i < x->number_of_sux(); i ++) {
a61af66fc99e Initial load
duke
parents:
diff changeset
1610 tty->print("B%d ", x->sux_at(i)->block_id());
a61af66fc99e Initial load
duke
parents:
diff changeset
1611 }
a61af66fc99e Initial load
duke
parents:
diff changeset
1612 }
a61af66fc99e Initial load
duke
parents:
diff changeset
1613
a61af66fc99e Initial load
duke
parents:
diff changeset
1614 // print exception handlers
a61af66fc99e Initial load
duke
parents:
diff changeset
1615 if (x->number_of_exception_handlers() > 0) {
a61af66fc99e Initial load
duke
parents:
diff changeset
1616 tty->print("xhandler: ");
a61af66fc99e Initial load
duke
parents:
diff changeset
1617 for (int i = 0; i < x->number_of_exception_handlers(); i++) {
a61af66fc99e Initial load
duke
parents:
diff changeset
1618 tty->print("B%d ", x->exception_handler_at(i)->block_id());
a61af66fc99e Initial load
duke
parents:
diff changeset
1619 }
a61af66fc99e Initial load
duke
parents:
diff changeset
1620 }
a61af66fc99e Initial load
duke
parents:
diff changeset
1621
a61af66fc99e Initial load
duke
parents:
diff changeset
1622 tty->cr();
a61af66fc99e Initial load
duke
parents:
diff changeset
1623 }
a61af66fc99e Initial load
duke
parents:
diff changeset
1624
a61af66fc99e Initial load
duke
parents:
diff changeset
1625 void print_LIR(BlockList* blocks) {
a61af66fc99e Initial load
duke
parents:
diff changeset
1626 tty->print_cr("LIR:");
a61af66fc99e Initial load
duke
parents:
diff changeset
1627 int i;
a61af66fc99e Initial load
duke
parents:
diff changeset
1628 for (i = 0; i < blocks->length(); i++) {
a61af66fc99e Initial load
duke
parents:
diff changeset
1629 BlockBegin* bb = blocks->at(i);
a61af66fc99e Initial load
duke
parents:
diff changeset
1630 print_block(bb);
a61af66fc99e Initial load
duke
parents:
diff changeset
1631 tty->print("__id_Instruction___________________________________________"); tty->cr();
a61af66fc99e Initial load
duke
parents:
diff changeset
1632 bb->lir()->print_instructions();
a61af66fc99e Initial load
duke
parents:
diff changeset
1633 }
a61af66fc99e Initial load
duke
parents:
diff changeset
1634 }
a61af66fc99e Initial load
duke
parents:
diff changeset
1635
a61af66fc99e Initial load
duke
parents:
diff changeset
1636 void LIR_List::print_instructions() {
a61af66fc99e Initial load
duke
parents:
diff changeset
1637 for (int i = 0; i < _operations.length(); i++) {
a61af66fc99e Initial load
duke
parents:
diff changeset
1638 _operations.at(i)->print(); tty->cr();
a61af66fc99e Initial load
duke
parents:
diff changeset
1639 }
a61af66fc99e Initial load
duke
parents:
diff changeset
1640 tty->cr();
a61af66fc99e Initial load
duke
parents:
diff changeset
1641 }
a61af66fc99e Initial load
duke
parents:
diff changeset
1642
a61af66fc99e Initial load
duke
parents:
diff changeset
1643 // LIR_Ops printing routines
a61af66fc99e Initial load
duke
parents:
diff changeset
1644 // LIR_Op
a61af66fc99e Initial load
duke
parents:
diff changeset
1645 void LIR_Op::print_on(outputStream* out) const {
a61af66fc99e Initial load
duke
parents:
diff changeset
1646 if (id() != -1 || PrintCFGToFile) {
a61af66fc99e Initial load
duke
parents:
diff changeset
1647 out->print("%4d ", id());
a61af66fc99e Initial load
duke
parents:
diff changeset
1648 } else {
a61af66fc99e Initial load
duke
parents:
diff changeset
1649 out->print(" ");
a61af66fc99e Initial load
duke
parents:
diff changeset
1650 }
a61af66fc99e Initial load
duke
parents:
diff changeset
1651 out->print(name()); out->print(" ");
a61af66fc99e Initial load
duke
parents:
diff changeset
1652 print_instr(out);
1819
f02a8bbe6ed4 6986046: C1 valuestack cleanup
roland
parents: 1816
diff changeset
1653 if (info() != NULL) out->print(" [bci:%d]", info()->stack()->bci());
0
a61af66fc99e Initial load
duke
parents:
diff changeset
1654 #ifdef ASSERT
a61af66fc99e Initial load
duke
parents:
diff changeset
1655 if (Verbose && _file != NULL) {
a61af66fc99e Initial load
duke
parents:
diff changeset
1656 out->print(" (%s:%d)", _file, _line);
a61af66fc99e Initial load
duke
parents:
diff changeset
1657 }
a61af66fc99e Initial load
duke
parents:
diff changeset
1658 #endif
a61af66fc99e Initial load
duke
parents:
diff changeset
1659 }
a61af66fc99e Initial load
duke
parents:
diff changeset
1660
a61af66fc99e Initial load
duke
parents:
diff changeset
1661 const char * LIR_Op::name() const {
a61af66fc99e Initial load
duke
parents:
diff changeset
1662 const char* s = NULL;
a61af66fc99e Initial load
duke
parents:
diff changeset
1663 switch(code()) {
a61af66fc99e Initial load
duke
parents:
diff changeset
1664 // LIR_Op0
a61af66fc99e Initial load
duke
parents:
diff changeset
1665 case lir_membar: s = "membar"; break;
a61af66fc99e Initial load
duke
parents:
diff changeset
1666 case lir_membar_acquire: s = "membar_acquire"; break;
a61af66fc99e Initial load
duke
parents:
diff changeset
1667 case lir_membar_release: s = "membar_release"; break;
4966
701a83c86f28 7120481: storeStore barrier in constructor with final field
jiangli
parents: 4765
diff changeset
1668 case lir_membar_loadload: s = "membar_loadload"; break;
701a83c86f28 7120481: storeStore barrier in constructor with final field
jiangli
parents: 4765
diff changeset
1669 case lir_membar_storestore: s = "membar_storestore"; break;
701a83c86f28 7120481: storeStore barrier in constructor with final field
jiangli
parents: 4765
diff changeset
1670 case lir_membar_loadstore: s = "membar_loadstore"; break;
701a83c86f28 7120481: storeStore barrier in constructor with final field
jiangli
parents: 4765
diff changeset
1671 case lir_membar_storeload: s = "membar_storeload"; break;
0
a61af66fc99e Initial load
duke
parents:
diff changeset
1672 case lir_word_align: s = "word_align"; break;
a61af66fc99e Initial load
duke
parents:
diff changeset
1673 case lir_label: s = "label"; break;
a61af66fc99e Initial load
duke
parents:
diff changeset
1674 case lir_nop: s = "nop"; break;
a61af66fc99e Initial load
duke
parents:
diff changeset
1675 case lir_backwardbranch_target: s = "backbranch"; break;
a61af66fc99e Initial load
duke
parents:
diff changeset
1676 case lir_std_entry: s = "std_entry"; break;
a61af66fc99e Initial load
duke
parents:
diff changeset
1677 case lir_osr_entry: s = "osr_entry"; break;
a61af66fc99e Initial load
duke
parents:
diff changeset
1678 case lir_build_frame: s = "build_frm"; break;
a61af66fc99e Initial load
duke
parents:
diff changeset
1679 case lir_fpop_raw: s = "fpop_raw"; break;
a61af66fc99e Initial load
duke
parents:
diff changeset
1680 case lir_24bit_FPU: s = "24bit_FPU"; break;
a61af66fc99e Initial load
duke
parents:
diff changeset
1681 case lir_reset_FPU: s = "reset_FPU"; break;
a61af66fc99e Initial load
duke
parents:
diff changeset
1682 case lir_breakpoint: s = "breakpoint"; break;
a61af66fc99e Initial load
duke
parents:
diff changeset
1683 case lir_get_thread: s = "get_thread"; break;
a61af66fc99e Initial load
duke
parents:
diff changeset
1684 // LIR_Op1
a61af66fc99e Initial load
duke
parents:
diff changeset
1685 case lir_fxch: s = "fxch"; break;
a61af66fc99e Initial load
duke
parents:
diff changeset
1686 case lir_fld: s = "fld"; break;
a61af66fc99e Initial load
duke
parents:
diff changeset
1687 case lir_ffree: s = "ffree"; break;
a61af66fc99e Initial load
duke
parents:
diff changeset
1688 case lir_push: s = "push"; break;
a61af66fc99e Initial load
duke
parents:
diff changeset
1689 case lir_pop: s = "pop"; break;
a61af66fc99e Initial load
duke
parents:
diff changeset
1690 case lir_null_check: s = "null_check"; break;
a61af66fc99e Initial load
duke
parents:
diff changeset
1691 case lir_return: s = "return"; break;
a61af66fc99e Initial load
duke
parents:
diff changeset
1692 case lir_safepoint: s = "safepoint"; break;
a61af66fc99e Initial load
duke
parents:
diff changeset
1693 case lir_neg: s = "neg"; break;
a61af66fc99e Initial load
duke
parents:
diff changeset
1694 case lir_leal: s = "leal"; break;
a61af66fc99e Initial load
duke
parents:
diff changeset
1695 case lir_branch: s = "branch"; break;
a61af66fc99e Initial load
duke
parents:
diff changeset
1696 case lir_cond_float_branch: s = "flt_cond_br"; break;
a61af66fc99e Initial load
duke
parents:
diff changeset
1697 case lir_move: s = "move"; break;
a61af66fc99e Initial load
duke
parents:
diff changeset
1698 case lir_roundfp: s = "roundfp"; break;
a61af66fc99e Initial load
duke
parents:
diff changeset
1699 case lir_rtcall: s = "rtcall"; break;
a61af66fc99e Initial load
duke
parents:
diff changeset
1700 case lir_throw: s = "throw"; break;
a61af66fc99e Initial load
duke
parents:
diff changeset
1701 case lir_unwind: s = "unwind"; break;
a61af66fc99e Initial load
duke
parents:
diff changeset
1702 case lir_convert: s = "convert"; break;
a61af66fc99e Initial load
duke
parents:
diff changeset
1703 case lir_alloc_object: s = "alloc_obj"; break;
a61af66fc99e Initial load
duke
parents:
diff changeset
1704 case lir_monaddr: s = "mon_addr"; break;
1783
d5d065957597 6953144: Tiered compilation
iveresov
parents: 1681
diff changeset
1705 case lir_pack64: s = "pack64"; break;
d5d065957597 6953144: Tiered compilation
iveresov
parents: 1681
diff changeset
1706 case lir_unpack64: s = "unpack64"; break;
0
a61af66fc99e Initial load
duke
parents:
diff changeset
1707 // LIR_Op2
a61af66fc99e Initial load
duke
parents:
diff changeset
1708 case lir_cmp: s = "cmp"; break;
a61af66fc99e Initial load
duke
parents:
diff changeset
1709 case lir_cmp_l2i: s = "cmp_l2i"; break;
a61af66fc99e Initial load
duke
parents:
diff changeset
1710 case lir_ucmp_fd2i: s = "ucomp_fd2i"; break;
a61af66fc99e Initial load
duke
parents:
diff changeset
1711 case lir_cmp_fd2i: s = "comp_fd2i"; break;
a61af66fc99e Initial load
duke
parents:
diff changeset
1712 case lir_cmove: s = "cmove"; break;
a61af66fc99e Initial load
duke
parents:
diff changeset
1713 case lir_add: s = "add"; break;
a61af66fc99e Initial load
duke
parents:
diff changeset
1714 case lir_sub: s = "sub"; break;
a61af66fc99e Initial load
duke
parents:
diff changeset
1715 case lir_mul: s = "mul"; break;
a61af66fc99e Initial load
duke
parents:
diff changeset
1716 case lir_mul_strictfp: s = "mul_strictfp"; break;
a61af66fc99e Initial load
duke
parents:
diff changeset
1717 case lir_div: s = "div"; break;
a61af66fc99e Initial load
duke
parents:
diff changeset
1718 case lir_div_strictfp: s = "div_strictfp"; break;
a61af66fc99e Initial load
duke
parents:
diff changeset
1719 case lir_rem: s = "rem"; break;
a61af66fc99e Initial load
duke
parents:
diff changeset
1720 case lir_abs: s = "abs"; break;
a61af66fc99e Initial load
duke
parents:
diff changeset
1721 case lir_sqrt: s = "sqrt"; break;
a61af66fc99e Initial load
duke
parents:
diff changeset
1722 case lir_sin: s = "sin"; break;
a61af66fc99e Initial load
duke
parents:
diff changeset
1723 case lir_cos: s = "cos"; break;
a61af66fc99e Initial load
duke
parents:
diff changeset
1724 case lir_tan: s = "tan"; break;
a61af66fc99e Initial load
duke
parents:
diff changeset
1725 case lir_log: s = "log"; break;
a61af66fc99e Initial load
duke
parents:
diff changeset
1726 case lir_log10: s = "log10"; break;
6084
6759698e3140 7133857: exp() and pow() should use the x87 ISA on x86
roland
parents: 4966
diff changeset
1727 case lir_exp: s = "exp"; break;
6759698e3140 7133857: exp() and pow() should use the x87 ISA on x86
roland
parents: 4966
diff changeset
1728 case lir_pow: s = "pow"; break;
0
a61af66fc99e Initial load
duke
parents:
diff changeset
1729 case lir_logic_and: s = "logic_and"; break;
a61af66fc99e Initial load
duke
parents:
diff changeset
1730 case lir_logic_or: s = "logic_or"; break;
a61af66fc99e Initial load
duke
parents:
diff changeset
1731 case lir_logic_xor: s = "logic_xor"; break;
a61af66fc99e Initial load
duke
parents:
diff changeset
1732 case lir_shl: s = "shift_left"; break;
a61af66fc99e Initial load
duke
parents:
diff changeset
1733 case lir_shr: s = "shift_right"; break;
a61af66fc99e Initial load
duke
parents:
diff changeset
1734 case lir_ushr: s = "ushift_right"; break;
a61af66fc99e Initial load
duke
parents:
diff changeset
1735 case lir_alloc_array: s = "alloc_array"; break;
a61af66fc99e Initial load
duke
parents:
diff changeset
1736 // LIR_Op3
a61af66fc99e Initial load
duke
parents:
diff changeset
1737 case lir_idiv: s = "idiv"; break;
a61af66fc99e Initial load
duke
parents:
diff changeset
1738 case lir_irem: s = "irem"; break;
a61af66fc99e Initial load
duke
parents:
diff changeset
1739 // LIR_OpJavaCall
a61af66fc99e Initial load
duke
parents:
diff changeset
1740 case lir_static_call: s = "static"; break;
a61af66fc99e Initial load
duke
parents:
diff changeset
1741 case lir_optvirtual_call: s = "optvirtual"; break;
a61af66fc99e Initial load
duke
parents:
diff changeset
1742 case lir_icvirtual_call: s = "icvirtual"; break;
a61af66fc99e Initial load
duke
parents:
diff changeset
1743 case lir_virtual_call: s = "virtual"; break;
1295
3cf667df43ef 6919934: JSR 292 needs to support x86 C1
twisti
parents: 953
diff changeset
1744 case lir_dynamic_call: s = "dynamic"; break;
0
a61af66fc99e Initial load
duke
parents:
diff changeset
1745 // LIR_OpArrayCopy
a61af66fc99e Initial load
duke
parents:
diff changeset
1746 case lir_arraycopy: s = "arraycopy"; break;
a61af66fc99e Initial load
duke
parents:
diff changeset
1747 // LIR_OpLock
a61af66fc99e Initial load
duke
parents:
diff changeset
1748 case lir_lock: s = "lock"; break;
a61af66fc99e Initial load
duke
parents:
diff changeset
1749 case lir_unlock: s = "unlock"; break;
a61af66fc99e Initial load
duke
parents:
diff changeset
1750 // LIR_OpDelay
a61af66fc99e Initial load
duke
parents:
diff changeset
1751 case lir_delay_slot: s = "delay"; break;
a61af66fc99e Initial load
duke
parents:
diff changeset
1752 // LIR_OpTypeCheck
a61af66fc99e Initial load
duke
parents:
diff changeset
1753 case lir_instanceof: s = "instanceof"; break;
a61af66fc99e Initial load
duke
parents:
diff changeset
1754 case lir_checkcast: s = "checkcast"; break;
a61af66fc99e Initial load
duke
parents:
diff changeset
1755 case lir_store_check: s = "store_check"; break;
a61af66fc99e Initial load
duke
parents:
diff changeset
1756 // LIR_OpCompareAndSwap
a61af66fc99e Initial load
duke
parents:
diff changeset
1757 case lir_cas_long: s = "cas_long"; break;
a61af66fc99e Initial load
duke
parents:
diff changeset
1758 case lir_cas_obj: s = "cas_obj"; break;
a61af66fc99e Initial load
duke
parents:
diff changeset
1759 case lir_cas_int: s = "cas_int"; break;
a61af66fc99e Initial load
duke
parents:
diff changeset
1760 // LIR_OpProfileCall
a61af66fc99e Initial load
duke
parents:
diff changeset
1761 case lir_profile_call: s = "profile_call"; break;
a61af66fc99e Initial load
duke
parents:
diff changeset
1762 case lir_none: ShouldNotReachHere();break;
a61af66fc99e Initial load
duke
parents:
diff changeset
1763 default: s = "illegal_op"; break;
a61af66fc99e Initial load
duke
parents:
diff changeset
1764 }
a61af66fc99e Initial load
duke
parents:
diff changeset
1765 return s;
a61af66fc99e Initial load
duke
parents:
diff changeset
1766 }
a61af66fc99e Initial load
duke
parents:
diff changeset
1767
a61af66fc99e Initial load
duke
parents:
diff changeset
1768 // LIR_OpJavaCall
a61af66fc99e Initial load
duke
parents:
diff changeset
1769 void LIR_OpJavaCall::print_instr(outputStream* out) const {
a61af66fc99e Initial load
duke
parents:
diff changeset
1770 out->print("call: ");
a61af66fc99e Initial load
duke
parents:
diff changeset
1771 out->print("[addr: 0x%x]", address());
a61af66fc99e Initial load
duke
parents:
diff changeset
1772 if (receiver()->is_valid()) {
a61af66fc99e Initial load
duke
parents:
diff changeset
1773 out->print(" [recv: "); receiver()->print(out); out->print("]");
a61af66fc99e Initial load
duke
parents:
diff changeset
1774 }
a61af66fc99e Initial load
duke
parents:
diff changeset
1775 if (result_opr()->is_valid()) {
a61af66fc99e Initial load
duke
parents:
diff changeset
1776 out->print(" [result: "); result_opr()->print(out); out->print("]");
a61af66fc99e Initial load
duke
parents:
diff changeset
1777 }
a61af66fc99e Initial load
duke
parents:
diff changeset
1778 }
a61af66fc99e Initial load
duke
parents:
diff changeset
1779
a61af66fc99e Initial load
duke
parents:
diff changeset
1780 // LIR_OpLabel
a61af66fc99e Initial load
duke
parents:
diff changeset
1781 void LIR_OpLabel::print_instr(outputStream* out) const {
a61af66fc99e Initial load
duke
parents:
diff changeset
1782 out->print("[label:0x%x]", _label);
a61af66fc99e Initial load
duke
parents:
diff changeset
1783 }
a61af66fc99e Initial load
duke
parents:
diff changeset
1784
a61af66fc99e Initial load
duke
parents:
diff changeset
1785 // LIR_OpArrayCopy
a61af66fc99e Initial load
duke
parents:
diff changeset
1786 void LIR_OpArrayCopy::print_instr(outputStream* out) const {
a61af66fc99e Initial load
duke
parents:
diff changeset
1787 src()->print(out); out->print(" ");
a61af66fc99e Initial load
duke
parents:
diff changeset
1788 src_pos()->print(out); out->print(" ");
a61af66fc99e Initial load
duke
parents:
diff changeset
1789 dst()->print(out); out->print(" ");
a61af66fc99e Initial load
duke
parents:
diff changeset
1790 dst_pos()->print(out); out->print(" ");
a61af66fc99e Initial load
duke
parents:
diff changeset
1791 length()->print(out); out->print(" ");
a61af66fc99e Initial load
duke
parents:
diff changeset
1792 tmp()->print(out); out->print(" ");
a61af66fc99e Initial load
duke
parents:
diff changeset
1793 }
a61af66fc99e Initial load
duke
parents:
diff changeset
1794
a61af66fc99e Initial load
duke
parents:
diff changeset
1795 // LIR_OpCompareAndSwap
a61af66fc99e Initial load
duke
parents:
diff changeset
1796 void LIR_OpCompareAndSwap::print_instr(outputStream* out) const {
a61af66fc99e Initial load
duke
parents:
diff changeset
1797 addr()->print(out); out->print(" ");
a61af66fc99e Initial load
duke
parents:
diff changeset
1798 cmp_value()->print(out); out->print(" ");
a61af66fc99e Initial load
duke
parents:
diff changeset
1799 new_value()->print(out); out->print(" ");
a61af66fc99e Initial load
duke
parents:
diff changeset
1800 tmp1()->print(out); out->print(" ");
a61af66fc99e Initial load
duke
parents:
diff changeset
1801 tmp2()->print(out); out->print(" ");
a61af66fc99e Initial load
duke
parents:
diff changeset
1802
a61af66fc99e Initial load
duke
parents:
diff changeset
1803 }
a61af66fc99e Initial load
duke
parents:
diff changeset
1804
a61af66fc99e Initial load
duke
parents:
diff changeset
1805 // LIR_Op0
a61af66fc99e Initial load
duke
parents:
diff changeset
1806 void LIR_Op0::print_instr(outputStream* out) const {
a61af66fc99e Initial load
duke
parents:
diff changeset
1807 result_opr()->print(out);
a61af66fc99e Initial load
duke
parents:
diff changeset
1808 }
a61af66fc99e Initial load
duke
parents:
diff changeset
1809
a61af66fc99e Initial load
duke
parents:
diff changeset
1810 // LIR_Op1
a61af66fc99e Initial load
duke
parents:
diff changeset
1811 const char * LIR_Op1::name() const {
a61af66fc99e Initial load
duke
parents:
diff changeset
1812 if (code() == lir_move) {
a61af66fc99e Initial load
duke
parents:
diff changeset
1813 switch (move_kind()) {
a61af66fc99e Initial load
duke
parents:
diff changeset
1814 case lir_move_normal:
a61af66fc99e Initial load
duke
parents:
diff changeset
1815 return "move";
a61af66fc99e Initial load
duke
parents:
diff changeset
1816 case lir_move_unaligned:
a61af66fc99e Initial load
duke
parents:
diff changeset
1817 return "unaligned move";
a61af66fc99e Initial load
duke
parents:
diff changeset
1818 case lir_move_volatile:
a61af66fc99e Initial load
duke
parents:
diff changeset
1819 return "volatile_move";
2002
ac637b7220d1 6985015: C1 needs to support compressed oops
iveresov
parents: 1972
diff changeset
1820 case lir_move_wide:
ac637b7220d1 6985015: C1 needs to support compressed oops
iveresov
parents: 1972
diff changeset
1821 return "wide_move";
0
a61af66fc99e Initial load
duke
parents:
diff changeset
1822 default:
a61af66fc99e Initial load
duke
parents:
diff changeset
1823 ShouldNotReachHere();
a61af66fc99e Initial load
duke
parents:
diff changeset
1824 return "illegal_op";
a61af66fc99e Initial load
duke
parents:
diff changeset
1825 }
a61af66fc99e Initial load
duke
parents:
diff changeset
1826 } else {
a61af66fc99e Initial load
duke
parents:
diff changeset
1827 return LIR_Op::name();
a61af66fc99e Initial load
duke
parents:
diff changeset
1828 }
a61af66fc99e Initial load
duke
parents:
diff changeset
1829 }
a61af66fc99e Initial load
duke
parents:
diff changeset
1830
a61af66fc99e Initial load
duke
parents:
diff changeset
1831
a61af66fc99e Initial load
duke
parents:
diff changeset
1832 void LIR_Op1::print_instr(outputStream* out) const {
a61af66fc99e Initial load
duke
parents:
diff changeset
1833 _opr->print(out); out->print(" ");
a61af66fc99e Initial load
duke
parents:
diff changeset
1834 result_opr()->print(out); out->print(" ");
a61af66fc99e Initial load
duke
parents:
diff changeset
1835 print_patch_code(out, patch_code());
a61af66fc99e Initial load
duke
parents:
diff changeset
1836 }
a61af66fc99e Initial load
duke
parents:
diff changeset
1837
a61af66fc99e Initial load
duke
parents:
diff changeset
1838
a61af66fc99e Initial load
duke
parents:
diff changeset
1839 // LIR_Op1
a61af66fc99e Initial load
duke
parents:
diff changeset
1840 void LIR_OpRTCall::print_instr(outputStream* out) const {
a61af66fc99e Initial load
duke
parents:
diff changeset
1841 intx a = (intx)addr();
a61af66fc99e Initial load
duke
parents:
diff changeset
1842 out->print(Runtime1::name_for_address(addr()));
a61af66fc99e Initial load
duke
parents:
diff changeset
1843 out->print(" ");
a61af66fc99e Initial load
duke
parents:
diff changeset
1844 tmp()->print(out);
a61af66fc99e Initial load
duke
parents:
diff changeset
1845 }
a61af66fc99e Initial load
duke
parents:
diff changeset
1846
a61af66fc99e Initial load
duke
parents:
diff changeset
1847 void LIR_Op1::print_patch_code(outputStream* out, LIR_PatchCode code) {
a61af66fc99e Initial load
duke
parents:
diff changeset
1848 switch(code) {
a61af66fc99e Initial load
duke
parents:
diff changeset
1849 case lir_patch_none: break;
a61af66fc99e Initial load
duke
parents:
diff changeset
1850 case lir_patch_low: out->print("[patch_low]"); break;
a61af66fc99e Initial load
duke
parents:
diff changeset
1851 case lir_patch_high: out->print("[patch_high]"); break;
a61af66fc99e Initial load
duke
parents:
diff changeset
1852 case lir_patch_normal: out->print("[patch_normal]"); break;
a61af66fc99e Initial load
duke
parents:
diff changeset
1853 default: ShouldNotReachHere();
a61af66fc99e Initial load
duke
parents:
diff changeset
1854 }
a61af66fc99e Initial load
duke
parents:
diff changeset
1855 }
a61af66fc99e Initial load
duke
parents:
diff changeset
1856
a61af66fc99e Initial load
duke
parents:
diff changeset
1857 // LIR_OpBranch
a61af66fc99e Initial load
duke
parents:
diff changeset
1858 void LIR_OpBranch::print_instr(outputStream* out) const {
a61af66fc99e Initial load
duke
parents:
diff changeset
1859 print_condition(out, cond()); out->print(" ");
a61af66fc99e Initial load
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parents:
diff changeset
1860 if (block() != NULL) {
a61af66fc99e Initial load
duke
parents:
diff changeset
1861 out->print("[B%d] ", block()->block_id());
a61af66fc99e Initial load
duke
parents:
diff changeset
1862 } else if (stub() != NULL) {
a61af66fc99e Initial load
duke
parents:
diff changeset
1863 out->print("[");
a61af66fc99e Initial load
duke
parents:
diff changeset
1864 stub()->print_name(out);
a61af66fc99e Initial load
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parents:
diff changeset
1865 out->print(": 0x%x]", stub());
1819
f02a8bbe6ed4 6986046: C1 valuestack cleanup
roland
parents: 1816
diff changeset
1866 if (stub()->info() != NULL) out->print(" [bci:%d]", stub()->info()->stack()->bci());
0
a61af66fc99e Initial load
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parents:
diff changeset
1867 } else {
a61af66fc99e Initial load
duke
parents:
diff changeset
1868 out->print("[label:0x%x] ", label());
a61af66fc99e Initial load
duke
parents:
diff changeset
1869 }
a61af66fc99e Initial load
duke
parents:
diff changeset
1870 if (ublock() != NULL) {
a61af66fc99e Initial load
duke
parents:
diff changeset
1871 out->print("unordered: [B%d] ", ublock()->block_id());
a61af66fc99e Initial load
duke
parents:
diff changeset
1872 }
a61af66fc99e Initial load
duke
parents:
diff changeset
1873 }
a61af66fc99e Initial load
duke
parents:
diff changeset
1874
a61af66fc99e Initial load
duke
parents:
diff changeset
1875 void LIR_Op::print_condition(outputStream* out, LIR_Condition cond) {
a61af66fc99e Initial load
duke
parents:
diff changeset
1876 switch(cond) {
a61af66fc99e Initial load
duke
parents:
diff changeset
1877 case lir_cond_equal: out->print("[EQ]"); break;
a61af66fc99e Initial load
duke
parents:
diff changeset
1878 case lir_cond_notEqual: out->print("[NE]"); break;
a61af66fc99e Initial load
duke
parents:
diff changeset
1879 case lir_cond_less: out->print("[LT]"); break;
a61af66fc99e Initial load
duke
parents:
diff changeset
1880 case lir_cond_lessEqual: out->print("[LE]"); break;
a61af66fc99e Initial load
duke
parents:
diff changeset
1881 case lir_cond_greaterEqual: out->print("[GE]"); break;
a61af66fc99e Initial load
duke
parents:
diff changeset
1882 case lir_cond_greater: out->print("[GT]"); break;
a61af66fc99e Initial load
duke
parents:
diff changeset
1883 case lir_cond_belowEqual: out->print("[BE]"); break;
a61af66fc99e Initial load
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parents:
diff changeset
1884 case lir_cond_aboveEqual: out->print("[AE]"); break;
a61af66fc99e Initial load
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parents:
diff changeset
1885 case lir_cond_always: out->print("[AL]"); break;
a61af66fc99e Initial load
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parents:
diff changeset
1886 default: out->print("[%d]",cond); break;
a61af66fc99e Initial load
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parents:
diff changeset
1887 }
a61af66fc99e Initial load
duke
parents:
diff changeset
1888 }
a61af66fc99e Initial load
duke
parents:
diff changeset
1889
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parents:
diff changeset
1890 // LIR_OpConvert
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parents:
diff changeset
1891 void LIR_OpConvert::print_instr(outputStream* out) const {
a61af66fc99e Initial load
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parents:
diff changeset
1892 print_bytecode(out, bytecode());
a61af66fc99e Initial load
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parents:
diff changeset
1893 in_opr()->print(out); out->print(" ");
a61af66fc99e Initial load
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parents:
diff changeset
1894 result_opr()->print(out); out->print(" ");
1681
126ea7725993 6953477: Increase portability and flexibility of building Hotspot
bobv
parents: 1579
diff changeset
1895 #ifdef PPC
126ea7725993 6953477: Increase portability and flexibility of building Hotspot
bobv
parents: 1579
diff changeset
1896 if(tmp1()->is_valid()) {
126ea7725993 6953477: Increase portability and flexibility of building Hotspot
bobv
parents: 1579
diff changeset
1897 tmp1()->print(out); out->print(" ");
126ea7725993 6953477: Increase portability and flexibility of building Hotspot
bobv
parents: 1579
diff changeset
1898 tmp2()->print(out); out->print(" ");
126ea7725993 6953477: Increase portability and flexibility of building Hotspot
bobv
parents: 1579
diff changeset
1899 }
126ea7725993 6953477: Increase portability and flexibility of building Hotspot
bobv
parents: 1579
diff changeset
1900 #endif
0
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parents:
diff changeset
1901 }
a61af66fc99e Initial load
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parents:
diff changeset
1902
a61af66fc99e Initial load
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parents:
diff changeset
1903 void LIR_OpConvert::print_bytecode(outputStream* out, Bytecodes::Code code) {
a61af66fc99e Initial load
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parents:
diff changeset
1904 switch(code) {
a61af66fc99e Initial load
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parents:
diff changeset
1905 case Bytecodes::_d2f: out->print("[d2f] "); break;
a61af66fc99e Initial load
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parents:
diff changeset
1906 case Bytecodes::_d2i: out->print("[d2i] "); break;
a61af66fc99e Initial load
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parents:
diff changeset
1907 case Bytecodes::_d2l: out->print("[d2l] "); break;
a61af66fc99e Initial load
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parents:
diff changeset
1908 case Bytecodes::_f2d: out->print("[f2d] "); break;
a61af66fc99e Initial load
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parents:
diff changeset
1909 case Bytecodes::_f2i: out->print("[f2i] "); break;
a61af66fc99e Initial load
duke
parents:
diff changeset
1910 case Bytecodes::_f2l: out->print("[f2l] "); break;
a61af66fc99e Initial load
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parents:
diff changeset
1911 case Bytecodes::_i2b: out->print("[i2b] "); break;
a61af66fc99e Initial load
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parents:
diff changeset
1912 case Bytecodes::_i2c: out->print("[i2c] "); break;
a61af66fc99e Initial load
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parents:
diff changeset
1913 case Bytecodes::_i2d: out->print("[i2d] "); break;
a61af66fc99e Initial load
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parents:
diff changeset
1914 case Bytecodes::_i2f: out->print("[i2f] "); break;
a61af66fc99e Initial load
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parents:
diff changeset
1915 case Bytecodes::_i2l: out->print("[i2l] "); break;
a61af66fc99e Initial load
duke
parents:
diff changeset
1916 case Bytecodes::_i2s: out->print("[i2s] "); break;
a61af66fc99e Initial load
duke
parents:
diff changeset
1917 case Bytecodes::_l2i: out->print("[l2i] "); break;
a61af66fc99e Initial load
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parents:
diff changeset
1918 case Bytecodes::_l2f: out->print("[l2f] "); break;
a61af66fc99e Initial load
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parents:
diff changeset
1919 case Bytecodes::_l2d: out->print("[l2d] "); break;
a61af66fc99e Initial load
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parents:
diff changeset
1920 default:
a61af66fc99e Initial load
duke
parents:
diff changeset
1921 out->print("[?%d]",code);
a61af66fc99e Initial load
duke
parents:
diff changeset
1922 break;
a61af66fc99e Initial load
duke
parents:
diff changeset
1923 }
a61af66fc99e Initial load
duke
parents:
diff changeset
1924 }
a61af66fc99e Initial load
duke
parents:
diff changeset
1925
a61af66fc99e Initial load
duke
parents:
diff changeset
1926 void LIR_OpAllocObj::print_instr(outputStream* out) const {
a61af66fc99e Initial load
duke
parents:
diff changeset
1927 klass()->print(out); out->print(" ");
a61af66fc99e Initial load
duke
parents:
diff changeset
1928 obj()->print(out); out->print(" ");
a61af66fc99e Initial load
duke
parents:
diff changeset
1929 tmp1()->print(out); out->print(" ");
a61af66fc99e Initial load
duke
parents:
diff changeset
1930 tmp2()->print(out); out->print(" ");
a61af66fc99e Initial load
duke
parents:
diff changeset
1931 tmp3()->print(out); out->print(" ");
a61af66fc99e Initial load
duke
parents:
diff changeset
1932 tmp4()->print(out); out->print(" ");
a61af66fc99e Initial load
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parents:
diff changeset
1933 out->print("[hdr:%d]", header_size()); out->print(" ");
a61af66fc99e Initial load
duke
parents:
diff changeset
1934 out->print("[obj:%d]", object_size()); out->print(" ");
a61af66fc99e Initial load
duke
parents:
diff changeset
1935 out->print("[lbl:0x%x]", stub()->entry());
a61af66fc99e Initial load
duke
parents:
diff changeset
1936 }
a61af66fc99e Initial load
duke
parents:
diff changeset
1937
a61af66fc99e Initial load
duke
parents:
diff changeset
1938 void LIR_OpRoundFP::print_instr(outputStream* out) const {
a61af66fc99e Initial load
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parents:
diff changeset
1939 _opr->print(out); out->print(" ");
a61af66fc99e Initial load
duke
parents:
diff changeset
1940 tmp()->print(out); out->print(" ");
a61af66fc99e Initial load
duke
parents:
diff changeset
1941 result_opr()->print(out); out->print(" ");
a61af66fc99e Initial load
duke
parents:
diff changeset
1942 }
a61af66fc99e Initial load
duke
parents:
diff changeset
1943
a61af66fc99e Initial load
duke
parents:
diff changeset
1944 // LIR_Op2
a61af66fc99e Initial load
duke
parents:
diff changeset
1945 void LIR_Op2::print_instr(outputStream* out) const {
a61af66fc99e Initial load
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parents:
diff changeset
1946 if (code() == lir_cmove) {
a61af66fc99e Initial load
duke
parents:
diff changeset
1947 print_condition(out, condition()); out->print(" ");
a61af66fc99e Initial load
duke
parents:
diff changeset
1948 }
a61af66fc99e Initial load
duke
parents:
diff changeset
1949 in_opr1()->print(out); out->print(" ");
a61af66fc99e Initial load
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parents:
diff changeset
1950 in_opr2()->print(out); out->print(" ");
6084
6759698e3140 7133857: exp() and pow() should use the x87 ISA on x86
roland
parents: 4966
diff changeset
1951 if (tmp1_opr()->is_valid()) { tmp1_opr()->print(out); out->print(" "); }
6759698e3140 7133857: exp() and pow() should use the x87 ISA on x86
roland
parents: 4966
diff changeset
1952 if (tmp2_opr()->is_valid()) { tmp2_opr()->print(out); out->print(" "); }
6759698e3140 7133857: exp() and pow() should use the x87 ISA on x86
roland
parents: 4966
diff changeset
1953 if (tmp3_opr()->is_valid()) { tmp3_opr()->print(out); out->print(" "); }
6759698e3140 7133857: exp() and pow() should use the x87 ISA on x86
roland
parents: 4966
diff changeset
1954 if (tmp4_opr()->is_valid()) { tmp4_opr()->print(out); out->print(" "); }
6759698e3140 7133857: exp() and pow() should use the x87 ISA on x86
roland
parents: 4966
diff changeset
1955 if (tmp5_opr()->is_valid()) { tmp5_opr()->print(out); out->print(" "); }
0
a61af66fc99e Initial load
duke
parents:
diff changeset
1956 result_opr()->print(out);
a61af66fc99e Initial load
duke
parents:
diff changeset
1957 }
a61af66fc99e Initial load
duke
parents:
diff changeset
1958
a61af66fc99e Initial load
duke
parents:
diff changeset
1959 void LIR_OpAllocArray::print_instr(outputStream* out) const {
a61af66fc99e Initial load
duke
parents:
diff changeset
1960 klass()->print(out); out->print(" ");
a61af66fc99e Initial load
duke
parents:
diff changeset
1961 len()->print(out); out->print(" ");
a61af66fc99e Initial load
duke
parents:
diff changeset
1962 obj()->print(out); out->print(" ");
a61af66fc99e Initial load
duke
parents:
diff changeset
1963 tmp1()->print(out); out->print(" ");
a61af66fc99e Initial load
duke
parents:
diff changeset
1964 tmp2()->print(out); out->print(" ");
a61af66fc99e Initial load
duke
parents:
diff changeset
1965 tmp3()->print(out); out->print(" ");
a61af66fc99e Initial load
duke
parents:
diff changeset
1966 tmp4()->print(out); out->print(" ");
a61af66fc99e Initial load
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parents:
diff changeset
1967 out->print("[type:0x%x]", type()); out->print(" ");
a61af66fc99e Initial load
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parents:
diff changeset
1968 out->print("[label:0x%x]", stub()->entry());
a61af66fc99e Initial load
duke
parents:
diff changeset
1969 }
a61af66fc99e Initial load
duke
parents:
diff changeset
1970
a61af66fc99e Initial load
duke
parents:
diff changeset
1971
a61af66fc99e Initial load
duke
parents:
diff changeset
1972 void LIR_OpTypeCheck::print_instr(outputStream* out) const {
a61af66fc99e Initial load
duke
parents:
diff changeset
1973 object()->print(out); out->print(" ");
a61af66fc99e Initial load
duke
parents:
diff changeset
1974 if (code() == lir_store_check) {
a61af66fc99e Initial load
duke
parents:
diff changeset
1975 array()->print(out); out->print(" ");
a61af66fc99e Initial load
duke
parents:
diff changeset
1976 }
a61af66fc99e Initial load
duke
parents:
diff changeset
1977 if (code() != lir_store_check) {
a61af66fc99e Initial load
duke
parents:
diff changeset
1978 klass()->print_name_on(out); out->print(" ");
a61af66fc99e Initial load
duke
parents:
diff changeset
1979 if (fast_check()) out->print("fast_check ");
a61af66fc99e Initial load
duke
parents:
diff changeset
1980 }
a61af66fc99e Initial load
duke
parents:
diff changeset
1981 tmp1()->print(out); out->print(" ");
a61af66fc99e Initial load
duke
parents:
diff changeset
1982 tmp2()->print(out); out->print(" ");
a61af66fc99e Initial load
duke
parents:
diff changeset
1983 tmp3()->print(out); out->print(" ");
a61af66fc99e Initial load
duke
parents:
diff changeset
1984 result_opr()->print(out); out->print(" ");
1819
f02a8bbe6ed4 6986046: C1 valuestack cleanup
roland
parents: 1816
diff changeset
1985 if (info_for_exception() != NULL) out->print(" [bci:%d]", info_for_exception()->stack()->bci());
0
a61af66fc99e Initial load
duke
parents:
diff changeset
1986 }
a61af66fc99e Initial load
duke
parents:
diff changeset
1987
a61af66fc99e Initial load
duke
parents:
diff changeset
1988
a61af66fc99e Initial load
duke
parents:
diff changeset
1989 // LIR_Op3
a61af66fc99e Initial load
duke
parents:
diff changeset
1990 void LIR_Op3::print_instr(outputStream* out) const {
a61af66fc99e Initial load
duke
parents:
diff changeset
1991 in_opr1()->print(out); out->print(" ");
a61af66fc99e Initial load
duke
parents:
diff changeset
1992 in_opr2()->print(out); out->print(" ");
a61af66fc99e Initial load
duke
parents:
diff changeset
1993 in_opr3()->print(out); out->print(" ");
a61af66fc99e Initial load
duke
parents:
diff changeset
1994 result_opr()->print(out);
a61af66fc99e Initial load
duke
parents:
diff changeset
1995 }
a61af66fc99e Initial load
duke
parents:
diff changeset
1996
a61af66fc99e Initial load
duke
parents:
diff changeset
1997
a61af66fc99e Initial load
duke
parents:
diff changeset
1998 void LIR_OpLock::print_instr(outputStream* out) const {
a61af66fc99e Initial load
duke
parents:
diff changeset
1999 hdr_opr()->print(out); out->print(" ");
a61af66fc99e Initial load
duke
parents:
diff changeset
2000 obj_opr()->print(out); out->print(" ");
a61af66fc99e Initial load
duke
parents:
diff changeset
2001 lock_opr()->print(out); out->print(" ");
a61af66fc99e Initial load
duke
parents:
diff changeset
2002 if (_scratch->is_valid()) {
a61af66fc99e Initial load
duke
parents:
diff changeset
2003 _scratch->print(out); out->print(" ");
a61af66fc99e Initial load
duke
parents:
diff changeset
2004 }
a61af66fc99e Initial load
duke
parents:
diff changeset
2005 out->print("[lbl:0x%x]", stub()->entry());
a61af66fc99e Initial load
duke
parents:
diff changeset
2006 }
a61af66fc99e Initial load
duke
parents:
diff changeset
2007
a61af66fc99e Initial load
duke
parents:
diff changeset
2008
a61af66fc99e Initial load
duke
parents:
diff changeset
2009 void LIR_OpDelay::print_instr(outputStream* out) const {
a61af66fc99e Initial load
duke
parents:
diff changeset
2010 _op->print_on(out);
a61af66fc99e Initial load
duke
parents:
diff changeset
2011 }
a61af66fc99e Initial load
duke
parents:
diff changeset
2012
a61af66fc99e Initial load
duke
parents:
diff changeset
2013
a61af66fc99e Initial load
duke
parents:
diff changeset
2014 // LIR_OpProfileCall
a61af66fc99e Initial load
duke
parents:
diff changeset
2015 void LIR_OpProfileCall::print_instr(outputStream* out) const {
a61af66fc99e Initial load
duke
parents:
diff changeset
2016 profiled_method()->name()->print_symbol_on(out);
a61af66fc99e Initial load
duke
parents:
diff changeset
2017 out->print(".");
a61af66fc99e Initial load
duke
parents:
diff changeset
2018 profiled_method()->holder()->name()->print_symbol_on(out);
a61af66fc99e Initial load
duke
parents:
diff changeset
2019 out->print(" @ %d ", profiled_bci());
a61af66fc99e Initial load
duke
parents:
diff changeset
2020 mdo()->print(out); out->print(" ");
a61af66fc99e Initial load
duke
parents:
diff changeset
2021 recv()->print(out); out->print(" ");
a61af66fc99e Initial load
duke
parents:
diff changeset
2022 tmp1()->print(out); out->print(" ");
a61af66fc99e Initial load
duke
parents:
diff changeset
2023 }
a61af66fc99e Initial load
duke
parents:
diff changeset
2024
a61af66fc99e Initial load
duke
parents:
diff changeset
2025 #endif // PRODUCT
a61af66fc99e Initial load
duke
parents:
diff changeset
2026
a61af66fc99e Initial load
duke
parents:
diff changeset
2027 // Implementation of LIR_InsertionBuffer
a61af66fc99e Initial load
duke
parents:
diff changeset
2028
a61af66fc99e Initial load
duke
parents:
diff changeset
2029 void LIR_InsertionBuffer::append(int index, LIR_Op* op) {
a61af66fc99e Initial load
duke
parents:
diff changeset
2030 assert(_index_and_count.length() % 2 == 0, "must have a count for each index");
a61af66fc99e Initial load
duke
parents:
diff changeset
2031
a61af66fc99e Initial load
duke
parents:
diff changeset
2032 int i = number_of_insertion_points() - 1;
a61af66fc99e Initial load
duke
parents:
diff changeset
2033 if (i < 0 || index_at(i) < index) {
a61af66fc99e Initial load
duke
parents:
diff changeset
2034 append_new(index, 1);
a61af66fc99e Initial load
duke
parents:
diff changeset
2035 } else {
a61af66fc99e Initial load
duke
parents:
diff changeset
2036 assert(index_at(i) == index, "can append LIR_Ops in ascending order only");
a61af66fc99e Initial load
duke
parents:
diff changeset
2037 assert(count_at(i) > 0, "check");
a61af66fc99e Initial load
duke
parents:
diff changeset
2038 set_count_at(i, count_at(i) + 1);
a61af66fc99e Initial load
duke
parents:
diff changeset
2039 }
a61af66fc99e Initial load
duke
parents:
diff changeset
2040 _ops.push(op);
a61af66fc99e Initial load
duke
parents:
diff changeset
2041
a61af66fc99e Initial load
duke
parents:
diff changeset
2042 DEBUG_ONLY(verify());
a61af66fc99e Initial load
duke
parents:
diff changeset
2043 }
a61af66fc99e Initial load
duke
parents:
diff changeset
2044
a61af66fc99e Initial load
duke
parents:
diff changeset
2045 #ifdef ASSERT
a61af66fc99e Initial load
duke
parents:
diff changeset
2046 void LIR_InsertionBuffer::verify() {
a61af66fc99e Initial load
duke
parents:
diff changeset
2047 int sum = 0;
a61af66fc99e Initial load
duke
parents:
diff changeset
2048 int prev_idx = -1;
a61af66fc99e Initial load
duke
parents:
diff changeset
2049
a61af66fc99e Initial load
duke
parents:
diff changeset
2050 for (int i = 0; i < number_of_insertion_points(); i++) {
a61af66fc99e Initial load
duke
parents:
diff changeset
2051 assert(prev_idx < index_at(i), "index must be ordered ascending");
a61af66fc99e Initial load
duke
parents:
diff changeset
2052 sum += count_at(i);
a61af66fc99e Initial load
duke
parents:
diff changeset
2053 }
a61af66fc99e Initial load
duke
parents:
diff changeset
2054 assert(sum == number_of_ops(), "wrong total sum");
a61af66fc99e Initial load
duke
parents:
diff changeset
2055 }
a61af66fc99e Initial load
duke
parents:
diff changeset
2056 #endif