Mercurial > hg > graal-jvmci-8
annotate src/cpu/x86/vm/sharedRuntime_x86_64.cpp @ 20970:a560c9b81f0f
Add suport for oops in vector registers at safepoints
| author | Tom Rodriguez <tom.rodriguez@oracle.com> |
|---|---|
| date | Tue, 14 Apr 2015 22:20:07 -0700 |
| parents | 33a783b15758 |
| children | 2e35a4ea22ac |
| rev | line source |
|---|---|
| 0 | 1 /* |
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2 * Copyright (c) 2003, 2013, Oracle and/or its affiliates. All rights reserved. |
| 0 | 3 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. |
| 4 * | |
| 5 * This code is free software; you can redistribute it and/or modify it | |
| 6 * under the terms of the GNU General Public License version 2 only, as | |
| 7 * published by the Free Software Foundation. | |
| 8 * | |
| 9 * This code is distributed in the hope that it will be useful, but WITHOUT | |
| 10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or | |
| 11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License | |
| 12 * version 2 for more details (a copy is included in the LICENSE file that | |
| 13 * accompanied this code). | |
| 14 * | |
| 15 * You should have received a copy of the GNU General Public License version | |
| 16 * 2 along with this work; if not, write to the Free Software Foundation, | |
| 17 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA. | |
| 18 * | |
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19 * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA |
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20 * or visit www.oracle.com if you need additional information or have any |
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21 * questions. |
| 0 | 22 * |
| 23 */ | |
| 24 | |
| 1972 | 25 #include "precompiled.hpp" |
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26 #include "asm/macroAssembler.hpp" |
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27 #include "asm/macroAssembler.inline.hpp" |
| 1972 | 28 #include "code/debugInfoRec.hpp" |
| 29 #include "code/icBuffer.hpp" | |
| 30 #include "code/vtableStubs.hpp" | |
| 31 #include "interpreter/interpreter.hpp" | |
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32 #include "oops/compiledICHolder.hpp" |
| 1972 | 33 #include "prims/jvmtiRedefineClassesTrace.hpp" |
| 34 #include "runtime/sharedRuntime.hpp" | |
| 35 #include "runtime/vframeArray.hpp" | |
| 36 #include "vmreg_x86.inline.hpp" | |
| 37 #ifdef COMPILER1 | |
| 38 #include "c1/c1_Runtime1.hpp" | |
| 39 #endif | |
| 40 #ifdef COMPILER2 | |
| 41 #include "opto/runtime.hpp" | |
| 42 #endif | |
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43 #ifdef GRAAL |
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44 #include "graal/graalJavaAccess.hpp" |
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45 #endif |
| 0 | 46 |
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47 #define __ masm-> |
| 0 | 48 |
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49 const int StackAlignmentInSlots = StackAlignmentInBytes / VMRegImpl::stack_slot_size; |
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50 |
| 0 | 51 class SimpleRuntimeFrame { |
| 52 | |
| 53 public: | |
| 54 | |
| 55 // Most of the runtime stubs have this simple frame layout. | |
| 56 // This class exists to make the layout shared in one place. | |
| 57 // Offsets are for compiler stack slots, which are jints. | |
| 58 enum layout { | |
| 59 // The frame sender code expects that rbp will be in the "natural" place and | |
| 60 // will override any oopMap setting for it. We must therefore force the layout | |
| 61 // so that it agrees with the frame sender code. | |
| 62 rbp_off = frame::arg_reg_save_area_bytes/BytesPerInt, | |
| 63 rbp_off2, | |
| 64 return_off, return_off2, | |
| 65 framesize | |
| 66 }; | |
| 67 }; | |
| 68 | |
| 69 class RegisterSaver { | |
| 70 // Capture info about frame layout. Layout offsets are in jint | |
| 71 // units because compiler frame slots are jints. | |
| 72 #define DEF_XMM_OFFS(regnum) xmm ## regnum ## _off = xmm_off + (regnum)*16/BytesPerInt, xmm ## regnum ## H_off | |
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73 #define DEF_YMM_HI_OFFS(regnum) ymm_hi ## regnum ## _off = ymm_off + (regnum)*16/BytesPerInt |
| 0 | 74 enum layout { |
| 75 fpu_state_off = frame::arg_reg_save_area_bytes/BytesPerInt, // fxsave save area | |
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76 #if defined(COMPILER2) || defined(GRAAL) |
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77 ymm_off = fpu_state_off, // offset in fxsave save area |
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78 DEF_YMM_HI_OFFS(0), |
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79 DEF_YMM_HI_OFFS(1), |
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80 DEF_YMM_HI_OFFS(2), |
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81 DEF_YMM_HI_OFFS(3), |
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82 DEF_YMM_HI_OFFS(4), |
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83 DEF_YMM_HI_OFFS(5), |
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84 DEF_YMM_HI_OFFS(6), |
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85 DEF_YMM_HI_OFFS(7), |
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86 DEF_YMM_HI_OFFS(8), |
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87 DEF_YMM_HI_OFFS(9), |
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88 DEF_YMM_HI_OFFS(10), |
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89 DEF_YMM_HI_OFFS(11), |
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90 DEF_YMM_HI_OFFS(12), |
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91 DEF_YMM_HI_OFFS(13), |
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92 DEF_YMM_HI_OFFS(14), |
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93 DEF_YMM_HI_OFFS(15), |
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94 ymm_hi_save_size = 16 * 16 / BytesPerInt, |
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95 #else |
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96 ymm_hi_save_size = 0, |
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97 #endif |
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98 xmm_off = fpu_state_off + 160/BytesPerInt + ymm_hi_save_size, // offset in fxsave save area |
| 0 | 99 DEF_XMM_OFFS(0), |
| 100 DEF_XMM_OFFS(1), | |
| 101 DEF_XMM_OFFS(2), | |
| 102 DEF_XMM_OFFS(3), | |
| 103 DEF_XMM_OFFS(4), | |
| 104 DEF_XMM_OFFS(5), | |
| 105 DEF_XMM_OFFS(6), | |
| 106 DEF_XMM_OFFS(7), | |
| 107 DEF_XMM_OFFS(8), | |
| 108 DEF_XMM_OFFS(9), | |
| 109 DEF_XMM_OFFS(10), | |
| 110 DEF_XMM_OFFS(11), | |
| 111 DEF_XMM_OFFS(12), | |
| 112 DEF_XMM_OFFS(13), | |
| 113 DEF_XMM_OFFS(14), | |
| 114 DEF_XMM_OFFS(15), | |
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115 fpu_state_end = fpu_state_off + ((FPUStateSizeInWords-1)*wordSize / BytesPerInt) + ymm_hi_save_size, |
| 0 | 116 fpu_stateH_end, |
| 117 r15_off, r15H_off, | |
| 118 r14_off, r14H_off, | |
| 119 r13_off, r13H_off, | |
| 120 r12_off, r12H_off, | |
| 121 r11_off, r11H_off, | |
| 122 r10_off, r10H_off, | |
| 123 r9_off, r9H_off, | |
| 124 r8_off, r8H_off, | |
| 125 rdi_off, rdiH_off, | |
| 126 rsi_off, rsiH_off, | |
| 127 ignore_off, ignoreH_off, // extra copy of rbp | |
| 128 rsp_off, rspH_off, | |
| 129 rbx_off, rbxH_off, | |
| 130 rdx_off, rdxH_off, | |
| 131 rcx_off, rcxH_off, | |
| 132 rax_off, raxH_off, | |
| 133 // 16-byte stack alignment fill word: see MacroAssembler::push/pop_IU_state | |
| 134 align_off, alignH_off, | |
| 135 flags_off, flagsH_off, | |
| 136 // The frame sender code expects that rbp will be in the "natural" place and | |
| 137 // will override any oopMap setting for it. We must therefore force the layout | |
| 138 // so that it agrees with the frame sender code. | |
| 139 rbp_off, rbpH_off, // copy of rbp we will restore | |
| 140 return_off, returnH_off, // slot for return address | |
| 141 reg_save_size // size in compiler stack slots | |
| 142 }; | |
| 143 | |
| 144 public: | |
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145 static OopMap* save_live_registers(MacroAssembler* masm, int additional_frame_words, int* total_frame_words, bool save_vectors = false); |
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146 static void restore_live_registers(MacroAssembler* masm, bool restore_vectors = false); |
| 0 | 147 |
| 148 // Offsets into the register save area | |
| 149 // Used by deoptimization when it is managing result register | |
| 150 // values on its own | |
| 151 | |
| 152 static int rax_offset_in_bytes(void) { return BytesPerInt * rax_off; } | |
| 304 | 153 static int rdx_offset_in_bytes(void) { return BytesPerInt * rdx_off; } |
| 0 | 154 static int rbx_offset_in_bytes(void) { return BytesPerInt * rbx_off; } |
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155 static int r10_offset_in_bytes(void) { return BytesPerInt * r10_off; } |
| 0 | 156 static int xmm0_offset_in_bytes(void) { return BytesPerInt * xmm0_off; } |
| 157 static int return_offset_in_bytes(void) { return BytesPerInt * return_off; } | |
| 158 | |
| 159 // During deoptimization only the result registers need to be restored, | |
| 160 // all the other values have already been extracted. | |
| 161 static void restore_result_registers(MacroAssembler* masm); | |
| 162 }; | |
| 163 | |
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164 OopMap* RegisterSaver::save_live_registers(MacroAssembler* masm, int additional_frame_words, int* total_frame_words, bool save_vectors) { |
| 0 | 165 // Always make the frame size 16-byte aligned |
| 166 int frame_size_in_bytes = round_to(additional_frame_words*wordSize + | |
| 167 reg_save_size*BytesPerInt, 16); | |
| 168 // OopMap frame size is in compiler stack slots (jint's) not bytes or words | |
| 169 int frame_size_in_slots = frame_size_in_bytes / BytesPerInt; | |
| 170 // The caller will allocate additional_frame_words | |
| 171 int additional_frame_slots = additional_frame_words*wordSize / BytesPerInt; | |
| 172 // CodeBlob frame size is in words. | |
| 173 int frame_size_in_words = frame_size_in_bytes / wordSize; | |
| 174 *total_frame_words = frame_size_in_words; | |
| 175 | |
| 176 // Save registers, fpu state, and flags. | |
| 177 // We assume caller has already pushed the return address onto the | |
| 178 // stack, so rsp is 8-byte aligned here. | |
| 179 // We push rpb twice in this sequence because we want the real rbp | |
| 180 // to be under the return like a normal enter. | |
| 181 | |
| 182 __ enter(); // rsp becomes 16-byte aligned here | |
| 183 __ push_CPU_state(); // Push a multiple of 16 bytes | |
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184 |
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185 #if defined(COMPILER2) || defined(GRAAL) |
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186 __ subptr(rsp, 256); // Save upper half of YMM registers |
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187 if (save_vectors) { |
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188 assert(UseAVX > 0, "256bit vectors are supported only with AVX"); |
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189 #ifdef COMPILER2 |
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190 assert(MaxVectorSize == 32, "only 256bit vectors are supported now"); |
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191 #endif |
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192 // Save upper half of YMM registers |
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193 __ vextractf128h(Address(rsp, ymm_hi0_off * BytesPerInt), xmm0); |
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194 __ vextractf128h(Address(rsp, ymm_hi1_off * BytesPerInt), xmm1); |
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195 __ vextractf128h(Address(rsp, ymm_hi2_off * BytesPerInt), xmm2); |
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196 __ vextractf128h(Address(rsp, ymm_hi3_off * BytesPerInt), xmm3); |
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197 __ vextractf128h(Address(rsp, ymm_hi4_off * BytesPerInt), xmm4); |
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198 __ vextractf128h(Address(rsp, ymm_hi5_off * BytesPerInt), xmm5); |
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199 __ vextractf128h(Address(rsp, ymm_hi6_off * BytesPerInt), xmm6); |
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200 __ vextractf128h(Address(rsp, ymm_hi7_off * BytesPerInt), xmm7); |
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201 __ vextractf128h(Address(rsp, ymm_hi8_off * BytesPerInt), xmm8); |
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202 __ vextractf128h(Address(rsp, ymm_hi9_off * BytesPerInt), xmm9); |
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203 __ vextractf128h(Address(rsp, ymm_hi10_off * BytesPerInt), xmm10); |
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204 __ vextractf128h(Address(rsp, ymm_hi11_off * BytesPerInt), xmm11); |
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205 __ vextractf128h(Address(rsp, ymm_hi12_off * BytesPerInt), xmm12); |
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206 __ vextractf128h(Address(rsp, ymm_hi13_off * BytesPerInt), xmm13); |
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207 __ vextractf128h(Address(rsp, ymm_hi14_off * BytesPerInt), xmm14); |
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208 __ vextractf128h(Address(rsp, ymm_hi15_off * BytesPerInt), xmm15); |
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209 } |
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210 #else |
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211 assert(!save_vectors, "vectors are generated only by C2 and Graal"); |
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212 #endif |
| 0 | 213 if (frame::arg_reg_save_area_bytes != 0) { |
| 214 // Allocate argument register save area | |
| 304 | 215 __ subptr(rsp, frame::arg_reg_save_area_bytes); |
| 0 | 216 } |
| 217 | |
| 218 // Set an oopmap for the call site. This oopmap will map all | |
| 219 // oop-registers and debug-info registers as callee-saved. This | |
| 220 // will allow deoptimization at this safepoint to find all possible | |
| 221 // debug-info recordings, as well as let GC find all oops. | |
| 222 | |
| 223 OopMapSet *oop_maps = new OopMapSet(); | |
| 224 OopMap* map = new OopMap(frame_size_in_slots, 0); | |
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225 |
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226 #define STACK_OFFSET(x) VMRegImpl::stack2reg((x) + additional_frame_slots) |
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227 |
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228 map->set_callee_saved(STACK_OFFSET( rax_off ), rax->as_VMReg()); |
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229 map->set_callee_saved(STACK_OFFSET( rcx_off ), rcx->as_VMReg()); |
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230 map->set_callee_saved(STACK_OFFSET( rdx_off ), rdx->as_VMReg()); |
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231 map->set_callee_saved(STACK_OFFSET( rbx_off ), rbx->as_VMReg()); |
| 0 | 232 // rbp location is known implicitly by the frame sender code, needs no oopmap |
| 233 // and the location where rbp was saved by is ignored | |
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234 map->set_callee_saved(STACK_OFFSET( rsi_off ), rsi->as_VMReg()); |
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235 map->set_callee_saved(STACK_OFFSET( rdi_off ), rdi->as_VMReg()); |
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236 map->set_callee_saved(STACK_OFFSET( r8_off ), r8->as_VMReg()); |
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237 map->set_callee_saved(STACK_OFFSET( r9_off ), r9->as_VMReg()); |
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238 map->set_callee_saved(STACK_OFFSET( r10_off ), r10->as_VMReg()); |
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239 map->set_callee_saved(STACK_OFFSET( r11_off ), r11->as_VMReg()); |
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240 map->set_callee_saved(STACK_OFFSET( r12_off ), r12->as_VMReg()); |
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241 map->set_callee_saved(STACK_OFFSET( r13_off ), r13->as_VMReg()); |
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242 map->set_callee_saved(STACK_OFFSET( r14_off ), r14->as_VMReg()); |
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243 map->set_callee_saved(STACK_OFFSET( r15_off ), r15->as_VMReg()); |
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244 map->set_callee_saved(STACK_OFFSET(xmm0_off ), xmm0->as_VMReg()); |
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245 map->set_callee_saved(STACK_OFFSET(xmm1_off ), xmm1->as_VMReg()); |
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246 map->set_callee_saved(STACK_OFFSET(xmm2_off ), xmm2->as_VMReg()); |
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247 map->set_callee_saved(STACK_OFFSET(xmm3_off ), xmm3->as_VMReg()); |
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248 map->set_callee_saved(STACK_OFFSET(xmm4_off ), xmm4->as_VMReg()); |
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249 map->set_callee_saved(STACK_OFFSET(xmm5_off ), xmm5->as_VMReg()); |
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250 map->set_callee_saved(STACK_OFFSET(xmm6_off ), xmm6->as_VMReg()); |
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251 map->set_callee_saved(STACK_OFFSET(xmm7_off ), xmm7->as_VMReg()); |
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252 map->set_callee_saved(STACK_OFFSET(xmm8_off ), xmm8->as_VMReg()); |
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253 map->set_callee_saved(STACK_OFFSET(xmm9_off ), xmm9->as_VMReg()); |
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254 map->set_callee_saved(STACK_OFFSET(xmm10_off), xmm10->as_VMReg()); |
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255 map->set_callee_saved(STACK_OFFSET(xmm11_off), xmm11->as_VMReg()); |
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256 map->set_callee_saved(STACK_OFFSET(xmm12_off), xmm12->as_VMReg()); |
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257 map->set_callee_saved(STACK_OFFSET(xmm13_off), xmm13->as_VMReg()); |
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258 map->set_callee_saved(STACK_OFFSET(xmm14_off), xmm14->as_VMReg()); |
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259 map->set_callee_saved(STACK_OFFSET(xmm15_off), xmm15->as_VMReg()); |
| 0 | 260 |
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261 |
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262 #if defined(COMPILER2) || defined(GRAAL) |
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263 if (save_vectors) { |
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264 map->set_callee_saved(STACK_OFFSET(ymm_hi0_off ), xmm0->as_VMReg()->next()->next()->next()->next()); |
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265 map->set_callee_saved(STACK_OFFSET(ymm_hi1_off ), xmm1->as_VMReg()->next()->next()->next()->next()); |
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266 map->set_callee_saved(STACK_OFFSET(ymm_hi2_off ), xmm2->as_VMReg()->next()->next()->next()->next()); |
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267 map->set_callee_saved(STACK_OFFSET(ymm_hi3_off ), xmm3->as_VMReg()->next()->next()->next()->next()); |
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268 map->set_callee_saved(STACK_OFFSET(ymm_hi4_off ), xmm4->as_VMReg()->next()->next()->next()->next()); |
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269 map->set_callee_saved(STACK_OFFSET(ymm_hi5_off ), xmm5->as_VMReg()->next()->next()->next()->next()); |
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270 map->set_callee_saved(STACK_OFFSET(ymm_hi6_off ), xmm6->as_VMReg()->next()->next()->next()->next()); |
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271 map->set_callee_saved(STACK_OFFSET(ymm_hi7_off ), xmm7->as_VMReg()->next()->next()->next()->next()); |
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272 map->set_callee_saved(STACK_OFFSET(ymm_hi8_off ), xmm8->as_VMReg()->next()->next()->next()->next()); |
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273 map->set_callee_saved(STACK_OFFSET(ymm_hi9_off ), xmm9->as_VMReg()->next()->next()->next()->next()); |
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274 map->set_callee_saved(STACK_OFFSET(ymm_hi10_off), xmm10->as_VMReg()->next()->next()->next()->next()); |
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275 map->set_callee_saved(STACK_OFFSET(ymm_hi11_off), xmm11->as_VMReg()->next()->next()->next()->next()); |
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276 map->set_callee_saved(STACK_OFFSET(ymm_hi12_off), xmm12->as_VMReg()->next()->next()->next()->next()); |
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277 map->set_callee_saved(STACK_OFFSET(ymm_hi13_off), xmm13->as_VMReg()->next()->next()->next()->next()); |
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278 map->set_callee_saved(STACK_OFFSET(ymm_hi14_off), xmm14->as_VMReg()->next()->next()->next()->next()); |
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279 map->set_callee_saved(STACK_OFFSET(ymm_hi15_off), xmm15->as_VMReg()->next()->next()->next()->next()); |
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280 } |
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281 #endif |
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282 |
| 0 | 283 // %%% These should all be a waste but we'll keep things as they were for now |
| 284 if (true) { | |
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285 map->set_callee_saved(STACK_OFFSET( raxH_off ), rax->as_VMReg()->next()); |
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286 map->set_callee_saved(STACK_OFFSET( rcxH_off ), rcx->as_VMReg()->next()); |
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287 map->set_callee_saved(STACK_OFFSET( rdxH_off ), rdx->as_VMReg()->next()); |
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288 map->set_callee_saved(STACK_OFFSET( rbxH_off ), rbx->as_VMReg()->next()); |
| 0 | 289 // rbp location is known implicitly by the frame sender code, needs no oopmap |
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290 map->set_callee_saved(STACK_OFFSET( rsiH_off ), rsi->as_VMReg()->next()); |
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291 map->set_callee_saved(STACK_OFFSET( rdiH_off ), rdi->as_VMReg()->next()); |
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292 map->set_callee_saved(STACK_OFFSET( r8H_off ), r8->as_VMReg()->next()); |
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293 map->set_callee_saved(STACK_OFFSET( r9H_off ), r9->as_VMReg()->next()); |
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294 map->set_callee_saved(STACK_OFFSET( r10H_off ), r10->as_VMReg()->next()); |
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295 map->set_callee_saved(STACK_OFFSET( r11H_off ), r11->as_VMReg()->next()); |
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296 map->set_callee_saved(STACK_OFFSET( r12H_off ), r12->as_VMReg()->next()); |
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297 map->set_callee_saved(STACK_OFFSET( r13H_off ), r13->as_VMReg()->next()); |
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298 map->set_callee_saved(STACK_OFFSET( r14H_off ), r14->as_VMReg()->next()); |
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299 map->set_callee_saved(STACK_OFFSET( r15H_off ), r15->as_VMReg()->next()); |
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300 map->set_callee_saved(STACK_OFFSET(xmm0H_off ), xmm0->as_VMReg()->next()); |
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301 map->set_callee_saved(STACK_OFFSET(xmm1H_off ), xmm1->as_VMReg()->next()); |
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302 map->set_callee_saved(STACK_OFFSET(xmm2H_off ), xmm2->as_VMReg()->next()); |
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303 map->set_callee_saved(STACK_OFFSET(xmm3H_off ), xmm3->as_VMReg()->next()); |
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304 map->set_callee_saved(STACK_OFFSET(xmm4H_off ), xmm4->as_VMReg()->next()); |
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305 map->set_callee_saved(STACK_OFFSET(xmm5H_off ), xmm5->as_VMReg()->next()); |
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306 map->set_callee_saved(STACK_OFFSET(xmm6H_off ), xmm6->as_VMReg()->next()); |
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307 map->set_callee_saved(STACK_OFFSET(xmm7H_off ), xmm7->as_VMReg()->next()); |
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308 map->set_callee_saved(STACK_OFFSET(xmm8H_off ), xmm8->as_VMReg()->next()); |
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309 map->set_callee_saved(STACK_OFFSET(xmm9H_off ), xmm9->as_VMReg()->next()); |
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310 map->set_callee_saved(STACK_OFFSET(xmm10H_off), xmm10->as_VMReg()->next()); |
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311 map->set_callee_saved(STACK_OFFSET(xmm11H_off), xmm11->as_VMReg()->next()); |
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312 map->set_callee_saved(STACK_OFFSET(xmm12H_off), xmm12->as_VMReg()->next()); |
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313 map->set_callee_saved(STACK_OFFSET(xmm13H_off), xmm13->as_VMReg()->next()); |
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314 map->set_callee_saved(STACK_OFFSET(xmm14H_off), xmm14->as_VMReg()->next()); |
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315 map->set_callee_saved(STACK_OFFSET(xmm15H_off), xmm15->as_VMReg()->next()); |
| 0 | 316 } |
| 317 | |
| 318 return map; | |
| 319 } | |
| 320 | |
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321 void RegisterSaver::restore_live_registers(MacroAssembler* masm, bool restore_vectors) { |
| 0 | 322 if (frame::arg_reg_save_area_bytes != 0) { |
| 323 // Pop arg register save area | |
| 304 | 324 __ addptr(rsp, frame::arg_reg_save_area_bytes); |
| 0 | 325 } |
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326 #if defined(COMPILER2) || defined(GRAAL) |
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327 if (restore_vectors) { |
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328 // Restore upper half of YMM registes. |
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329 assert(UseAVX > 0, "256bit vectors are supported only with AVX"); |
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330 #if defined(COMPILER2) |
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331 assert(MaxVectorSize == 32, "only 256bit vectors are supported now"); |
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332 #endif |
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333 __ vinsertf128h(xmm0, Address(rsp, ymm_hi0_off * BytesPerInt)); |
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334 __ vinsertf128h(xmm1, Address(rsp, ymm_hi1_off * BytesPerInt)); |
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335 __ vinsertf128h(xmm2, Address(rsp, ymm_hi2_off * BytesPerInt)); |
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336 __ vinsertf128h(xmm3, Address(rsp, ymm_hi3_off * BytesPerInt)); |
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337 __ vinsertf128h(xmm4, Address(rsp, ymm_hi4_off * BytesPerInt)); |
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338 __ vinsertf128h(xmm5, Address(rsp, ymm_hi5_off * BytesPerInt)); |
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339 __ vinsertf128h(xmm6, Address(rsp, ymm_hi6_off * BytesPerInt)); |
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340 __ vinsertf128h(xmm7, Address(rsp, ymm_hi7_off * BytesPerInt)); |
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341 __ vinsertf128h(xmm8, Address(rsp, ymm_hi8_off * BytesPerInt)); |
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342 __ vinsertf128h(xmm9, Address(rsp, ymm_hi9_off * BytesPerInt)); |
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343 __ vinsertf128h(xmm10, Address(rsp, ymm_hi10_off * BytesPerInt)); |
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344 __ vinsertf128h(xmm11, Address(rsp, ymm_hi11_off * BytesPerInt)); |
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345 __ vinsertf128h(xmm12, Address(rsp, ymm_hi12_off * BytesPerInt)); |
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346 __ vinsertf128h(xmm13, Address(rsp, ymm_hi13_off * BytesPerInt)); |
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347 __ vinsertf128h(xmm14, Address(rsp, ymm_hi14_off * BytesPerInt)); |
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348 __ vinsertf128h(xmm15, Address(rsp, ymm_hi15_off * BytesPerInt)); |
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349 } |
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350 __ addptr(rsp, 256); |
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351 #else |
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352 assert(!restore_vectors, "vectors are generated only by C2 and Graal"); |
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353 #endif |
| 0 | 354 // Recover CPU state |
| 355 __ pop_CPU_state(); | |
| 356 // Get the rbp described implicitly by the calling convention (no oopMap) | |
| 304 | 357 __ pop(rbp); |
| 0 | 358 } |
| 359 | |
| 360 void RegisterSaver::restore_result_registers(MacroAssembler* masm) { | |
| 361 | |
| 362 // Just restore result register. Only used by deoptimization. By | |
| 363 // now any callee save register that needs to be restored to a c2 | |
| 364 // caller of the deoptee has been extracted into the vframeArray | |
| 365 // and will be stuffed into the c2i adapter we create for later | |
| 366 // restoration so only result registers need to be restored here. | |
| 367 | |
| 368 // Restore fp result register | |
| 369 __ movdbl(xmm0, Address(rsp, xmm0_offset_in_bytes())); | |
| 370 // Restore integer result register | |
| 304 | 371 __ movptr(rax, Address(rsp, rax_offset_in_bytes())); |
| 372 __ movptr(rdx, Address(rsp, rdx_offset_in_bytes())); | |
| 373 | |
| 0 | 374 // Pop all of the register save are off the stack except the return address |
| 304 | 375 __ addptr(rsp, return_offset_in_bytes()); |
| 0 | 376 } |
| 377 | |
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378 // Is vector's size (in bytes) bigger than a size saved by default? |
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379 // 16 bytes XMM registers are saved by default using fxsave/fxrstor instructions. |
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380 bool SharedRuntime::is_wide_vector(int size) { |
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381 return size > 16; |
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382 } |
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383 |
| 0 | 384 // The java_calling_convention describes stack locations as ideal slots on |
| 385 // a frame with no abi restrictions. Since we must observe abi restrictions | |
| 386 // (like the placement of the register window) the slots must be biased by | |
| 387 // the following value. | |
| 388 static int reg2offset_in(VMReg r) { | |
| 389 // Account for saved rbp and return address | |
| 390 // This should really be in_preserve_stack_slots | |
| 391 return (r->reg2stack() + 4) * VMRegImpl::stack_slot_size; | |
| 392 } | |
| 393 | |
| 394 static int reg2offset_out(VMReg r) { | |
| 395 return (r->reg2stack() + SharedRuntime::out_preserve_stack_slots()) * VMRegImpl::stack_slot_size; | |
| 396 } | |
| 397 | |
| 398 // --------------------------------------------------------------------------- | |
| 399 // Read the array of BasicTypes from a signature, and compute where the | |
| 400 // arguments should go. Values in the VMRegPair regs array refer to 4-byte | |
| 401 // quantities. Values less than VMRegImpl::stack0 are registers, those above | |
| 402 // refer to 4-byte stack slots. All stack slots are based off of the stack pointer | |
| 403 // as framesizes are fixed. | |
| 404 // VMRegImpl::stack0 refers to the first slot 0(sp). | |
| 405 // and VMRegImpl::stack0+1 refers to the memory word 4-byes higher. Register | |
| 406 // up to RegisterImpl::number_of_registers) are the 64-bit | |
| 407 // integer registers. | |
| 408 | |
| 409 // Note: the INPUTS in sig_bt are in units of Java argument words, which are | |
| 410 // either 32-bit or 64-bit depending on the build. The OUTPUTS are in 32-bit | |
| 411 // units regardless of build. Of course for i486 there is no 64 bit build | |
| 412 | |
| 413 // The Java calling convention is a "shifted" version of the C ABI. | |
| 414 // By skipping the first C ABI register we can call non-static jni methods | |
| 415 // with small numbers of arguments without having to shuffle the arguments | |
| 416 // at all. Since we control the java ABI we ought to at least get some | |
| 417 // advantage out of it. | |
| 418 | |
| 419 int SharedRuntime::java_calling_convention(const BasicType *sig_bt, | |
| 420 VMRegPair *regs, | |
| 421 int total_args_passed, | |
| 422 int is_outgoing) { | |
| 423 | |
| 424 // Create the mapping between argument positions and | |
| 425 // registers. | |
| 426 static const Register INT_ArgReg[Argument::n_int_register_parameters_j] = { | |
| 427 j_rarg0, j_rarg1, j_rarg2, j_rarg3, j_rarg4, j_rarg5 | |
| 428 }; | |
| 429 static const XMMRegister FP_ArgReg[Argument::n_float_register_parameters_j] = { | |
| 430 j_farg0, j_farg1, j_farg2, j_farg3, | |
| 431 j_farg4, j_farg5, j_farg6, j_farg7 | |
| 432 }; | |
| 433 | |
| 434 | |
| 435 uint int_args = 0; | |
| 436 uint fp_args = 0; | |
| 437 uint stk_args = 0; // inc by 2 each time | |
| 438 | |
| 439 for (int i = 0; i < total_args_passed; i++) { | |
| 440 switch (sig_bt[i]) { | |
| 441 case T_BOOLEAN: | |
| 442 case T_CHAR: | |
| 443 case T_BYTE: | |
| 444 case T_SHORT: | |
| 445 case T_INT: | |
| 446 if (int_args < Argument::n_int_register_parameters_j) { | |
| 447 regs[i].set1(INT_ArgReg[int_args++]->as_VMReg()); | |
| 448 } else { | |
| 449 regs[i].set1(VMRegImpl::stack2reg(stk_args)); | |
| 450 stk_args += 2; | |
| 451 } | |
| 452 break; | |
| 453 case T_VOID: | |
| 454 // halves of T_LONG or T_DOUBLE | |
| 455 assert(i != 0 && (sig_bt[i - 1] == T_LONG || sig_bt[i - 1] == T_DOUBLE), "expecting half"); | |
| 456 regs[i].set_bad(); | |
| 457 break; | |
| 458 case T_LONG: | |
| 459 assert(sig_bt[i + 1] == T_VOID, "expecting half"); | |
| 460 // fall through | |
| 461 case T_OBJECT: | |
| 462 case T_ARRAY: | |
| 463 case T_ADDRESS: | |
| 464 if (int_args < Argument::n_int_register_parameters_j) { | |
| 465 regs[i].set2(INT_ArgReg[int_args++]->as_VMReg()); | |
| 466 } else { | |
| 467 regs[i].set2(VMRegImpl::stack2reg(stk_args)); | |
| 468 stk_args += 2; | |
| 469 } | |
| 470 break; | |
| 471 case T_FLOAT: | |
| 472 if (fp_args < Argument::n_float_register_parameters_j) { | |
| 473 regs[i].set1(FP_ArgReg[fp_args++]->as_VMReg()); | |
| 474 } else { | |
| 475 regs[i].set1(VMRegImpl::stack2reg(stk_args)); | |
| 476 stk_args += 2; | |
| 477 } | |
| 478 break; | |
| 479 case T_DOUBLE: | |
| 480 assert(sig_bt[i + 1] == T_VOID, "expecting half"); | |
| 481 if (fp_args < Argument::n_float_register_parameters_j) { | |
| 482 regs[i].set2(FP_ArgReg[fp_args++]->as_VMReg()); | |
| 483 } else { | |
| 484 regs[i].set2(VMRegImpl::stack2reg(stk_args)); | |
| 485 stk_args += 2; | |
| 486 } | |
| 487 break; | |
| 488 default: | |
| 489 ShouldNotReachHere(); | |
| 490 break; | |
| 491 } | |
| 492 } | |
| 493 | |
| 494 return round_to(stk_args, 2); | |
| 495 } | |
| 496 | |
| 497 // Patch the callers callsite with entry to compiled code if it exists. | |
| 498 static void patch_callers_callsite(MacroAssembler *masm) { | |
| 499 Label L; | |
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500 __ cmpptr(Address(rbx, in_bytes(Method::code_offset())), (int32_t)NULL_WORD); |
| 0 | 501 __ jcc(Assembler::equal, L); |
| 502 | |
| 503 // Save the current stack pointer | |
| 304 | 504 __ mov(r13, rsp); |
| 0 | 505 // Schedule the branch target address early. |
| 506 // Call into the VM to patch the caller, then jump to compiled callee | |
| 507 // rax isn't live so capture return address while we easily can | |
| 304 | 508 __ movptr(rax, Address(rsp, 0)); |
| 0 | 509 |
| 510 // align stack so push_CPU_state doesn't fault | |
| 304 | 511 __ andptr(rsp, -(StackAlignmentInBytes)); |
| 0 | 512 __ push_CPU_state(); |
| 513 | |
| 514 // VM needs caller's callsite | |
| 515 // VM needs target method | |
| 516 // This needs to be a long call since we will relocate this adapter to | |
| 517 // the codeBuffer and it may not reach | |
| 518 | |
| 519 // Allocate argument register save area | |
| 520 if (frame::arg_reg_save_area_bytes != 0) { | |
| 304 | 521 __ subptr(rsp, frame::arg_reg_save_area_bytes); |
| 0 | 522 } |
| 304 | 523 __ mov(c_rarg0, rbx); |
| 524 __ mov(c_rarg1, rax); | |
| 0 | 525 __ call(RuntimeAddress(CAST_FROM_FN_PTR(address, SharedRuntime::fixup_callers_callsite))); |
| 526 | |
| 527 // De-allocate argument register save area | |
| 528 if (frame::arg_reg_save_area_bytes != 0) { | |
| 304 | 529 __ addptr(rsp, frame::arg_reg_save_area_bytes); |
| 0 | 530 } |
| 531 | |
| 532 __ pop_CPU_state(); | |
| 533 // restore sp | |
| 304 | 534 __ mov(rsp, r13); |
| 0 | 535 __ bind(L); |
| 536 } | |
| 537 | |
| 538 | |
| 539 static void gen_c2i_adapter(MacroAssembler *masm, | |
| 540 int total_args_passed, | |
| 541 int comp_args_on_stack, | |
| 542 const BasicType *sig_bt, | |
| 543 const VMRegPair *regs, | |
| 544 Label& skip_fixup) { | |
| 545 // Before we get into the guts of the C2I adapter, see if we should be here | |
| 546 // at all. We've come from compiled code and are attempting to jump to the | |
| 547 // interpreter, which means the caller made a static call to get here | |
| 548 // (vcalls always get a compiled target if there is one). Check for a | |
| 549 // compiled target. If there is one, we need to patch the caller's call. | |
| 550 patch_callers_callsite(masm); | |
| 551 | |
| 552 __ bind(skip_fixup); | |
| 553 | |
| 554 // Since all args are passed on the stack, total_args_passed * | |
| 555 // Interpreter::stackElementSize is the space we need. Plus 1 because | |
| 556 // we also account for the return address location since | |
| 557 // we store it first rather than hold it in rax across all the shuffling | |
| 558 | |
| 1506 | 559 int extraspace = (total_args_passed * Interpreter::stackElementSize) + wordSize; |
| 0 | 560 |
| 561 // stack is aligned, keep it that way | |
| 562 extraspace = round_to(extraspace, 2*wordSize); | |
| 563 | |
| 564 // Get return address | |
| 304 | 565 __ pop(rax); |
| 0 | 566 |
| 567 // set senderSP value | |
| 304 | 568 __ mov(r13, rsp); |
| 569 | |
| 570 __ subptr(rsp, extraspace); | |
| 0 | 571 |
| 572 // Store the return address in the expected location | |
| 304 | 573 __ movptr(Address(rsp, 0), rax); |
| 0 | 574 |
| 575 // Now write the args into the outgoing interpreter space | |
| 576 for (int i = 0; i < total_args_passed; i++) { | |
| 577 if (sig_bt[i] == T_VOID) { | |
| 578 assert(i > 0 && (sig_bt[i-1] == T_LONG || sig_bt[i-1] == T_DOUBLE), "missing half"); | |
| 579 continue; | |
| 580 } | |
| 581 | |
| 582 // offset to start parameters | |
| 1506 | 583 int st_off = (total_args_passed - i) * Interpreter::stackElementSize; |
| 584 int next_off = st_off - Interpreter::stackElementSize; | |
| 0 | 585 |
| 586 // Say 4 args: | |
| 587 // i st_off | |
| 588 // 0 32 T_LONG | |
| 589 // 1 24 T_VOID | |
| 590 // 2 16 T_OBJECT | |
| 591 // 3 8 T_BOOL | |
| 592 // - 0 return address | |
| 593 // | |
| 594 // However to make thing extra confusing. Because we can fit a long/double in | |
| 595 // a single slot on a 64 bt vm and it would be silly to break them up, the interpreter | |
| 596 // leaves one slot empty and only stores to a single slot. In this case the | |
| 597 // slot that is occupied is the T_VOID slot. See I said it was confusing. | |
| 598 | |
| 599 VMReg r_1 = regs[i].first(); | |
| 600 VMReg r_2 = regs[i].second(); | |
| 601 if (!r_1->is_valid()) { | |
| 602 assert(!r_2->is_valid(), ""); | |
| 603 continue; | |
| 604 } | |
| 605 if (r_1->is_stack()) { | |
| 606 // memory to memory use rax | |
| 607 int ld_off = r_1->reg2stack() * VMRegImpl::stack_slot_size + extraspace; | |
| 608 if (!r_2->is_valid()) { | |
| 609 // sign extend?? | |
| 610 __ movl(rax, Address(rsp, ld_off)); | |
| 304 | 611 __ movptr(Address(rsp, st_off), rax); |
| 0 | 612 |
| 613 } else { | |
| 614 | |
| 615 __ movq(rax, Address(rsp, ld_off)); | |
| 616 | |
| 617 // Two VMREgs|OptoRegs can be T_OBJECT, T_ADDRESS, T_DOUBLE, T_LONG | |
| 618 // T_DOUBLE and T_LONG use two slots in the interpreter | |
| 619 if ( sig_bt[i] == T_LONG || sig_bt[i] == T_DOUBLE) { | |
| 620 // ld_off == LSW, ld_off+wordSize == MSW | |
| 621 // st_off == MSW, next_off == LSW | |
| 622 __ movq(Address(rsp, next_off), rax); | |
| 623 #ifdef ASSERT | |
| 624 // Overwrite the unused slot with known junk | |
| 625 __ mov64(rax, CONST64(0xdeadffffdeadaaaa)); | |
| 304 | 626 __ movptr(Address(rsp, st_off), rax); |
| 0 | 627 #endif /* ASSERT */ |
| 628 } else { | |
| 629 __ movq(Address(rsp, st_off), rax); | |
| 630 } | |
| 631 } | |
| 632 } else if (r_1->is_Register()) { | |
| 633 Register r = r_1->as_Register(); | |
| 634 if (!r_2->is_valid()) { | |
| 635 // must be only an int (or less ) so move only 32bits to slot | |
| 636 // why not sign extend?? | |
| 637 __ movl(Address(rsp, st_off), r); | |
| 638 } else { | |
| 639 // Two VMREgs|OptoRegs can be T_OBJECT, T_ADDRESS, T_DOUBLE, T_LONG | |
| 640 // T_DOUBLE and T_LONG use two slots in the interpreter | |
| 641 if ( sig_bt[i] == T_LONG || sig_bt[i] == T_DOUBLE) { | |
| 642 // long/double in gpr | |
| 643 #ifdef ASSERT | |
| 644 // Overwrite the unused slot with known junk | |
| 645 __ mov64(rax, CONST64(0xdeadffffdeadaaab)); | |
| 304 | 646 __ movptr(Address(rsp, st_off), rax); |
| 0 | 647 #endif /* ASSERT */ |
| 648 __ movq(Address(rsp, next_off), r); | |
| 649 } else { | |
| 304 | 650 __ movptr(Address(rsp, st_off), r); |
| 0 | 651 } |
| 652 } | |
| 653 } else { | |
| 654 assert(r_1->is_XMMRegister(), ""); | |
| 655 if (!r_2->is_valid()) { | |
| 656 // only a float use just part of the slot | |
| 657 __ movflt(Address(rsp, st_off), r_1->as_XMMRegister()); | |
| 658 } else { | |
| 659 #ifdef ASSERT | |
| 660 // Overwrite the unused slot with known junk | |
| 661 __ mov64(rax, CONST64(0xdeadffffdeadaaac)); | |
| 304 | 662 __ movptr(Address(rsp, st_off), rax); |
| 0 | 663 #endif /* ASSERT */ |
| 664 __ movdbl(Address(rsp, next_off), r_1->as_XMMRegister()); | |
| 665 } | |
| 666 } | |
| 667 } | |
| 668 | |
| 669 // Schedule the branch target address early. | |
|
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670 __ movptr(rcx, Address(rbx, in_bytes(Method::interpreter_entry_offset()))); |
| 0 | 671 __ jmp(rcx); |
| 672 } | |
| 673 | |
|
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674 static void range_check(MacroAssembler* masm, Register pc_reg, Register temp_reg, |
|
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675 address code_start, address code_end, |
|
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676 Label& L_ok) { |
|
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677 Label L_fail; |
|
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|
678 __ lea(temp_reg, ExternalAddress(code_start)); |
|
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679 __ cmpptr(pc_reg, temp_reg); |
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680 __ jcc(Assembler::belowEqual, L_fail); |
|
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681 __ lea(temp_reg, ExternalAddress(code_end)); |
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682 __ cmpptr(pc_reg, temp_reg); |
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683 __ jcc(Assembler::below, L_ok); |
|
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684 __ bind(L_fail); |
|
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|
685 } |
|
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|
686 |
|
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687 void SharedRuntime::gen_i2c_adapter(MacroAssembler *masm, |
|
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688 int total_args_passed, |
|
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|
689 int comp_args_on_stack, |
|
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|
690 const BasicType *sig_bt, |
|
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691 const VMRegPair *regs, |
|
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|
692 int frame_extension_argument) { |
| 0 | 693 |
| 694 // Note: r13 contains the senderSP on entry. We must preserve it since | |
| 695 // we may do a i2c -> c2i transition if we lose a race where compiled | |
| 696 // code goes non-entrant while we get args ready. | |
| 697 // In addition we use r13 to locate all the interpreter args as | |
| 698 // we must align the stack to 16 bytes on an i2c entry else we | |
| 699 // lose alignment we expect in all compiled code and register | |
| 700 // save code can segv when fxsave instructions find improperly | |
| 701 // aligned stack pointer. | |
| 702 | |
|
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703 // Adapters can be frameless because they do not require the caller |
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704 // to perform additional cleanup work, such as correcting the stack pointer. |
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705 // An i2c adapter is frameless because the *caller* frame, which is interpreted, |
|
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706 // routinely repairs its own stack pointer (from interpreter_frame_last_sp), |
|
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707 // even if a callee has modified the stack pointer. |
|
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708 // A c2i adapter is frameless because the *callee* frame, which is interpreted, |
|
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709 // routinely repairs its caller's stack pointer (from sender_sp, which is set |
|
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|
710 // up via the senderSP register). |
|
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|
711 // In other words, if *either* the caller or callee is interpreted, we can |
|
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|
712 // get the stack pointer repaired after a call. |
|
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|
713 // This is why c2i and i2c adapters cannot be indefinitely composed. |
|
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|
714 // In particular, if a c2i adapter were to somehow call an i2c adapter, |
|
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|
715 // both caller and callee would be compiled methods, and neither would |
|
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|
716 // clean up the stack pointer changes performed by the two adapters. |
|
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|
717 // If this happens, control eventually transfers back to the compiled |
|
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|
718 // caller, but with an uncorrected stack, causing delayed havoc. |
|
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|
719 |
|
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|
720 // Pick up the return address |
| 304 | 721 __ movptr(rax, Address(rsp, 0)); |
| 0 | 722 |
|
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|
723 if (VerifyAdapterCalls && |
|
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|
724 (Interpreter::code() != NULL || StubRoutines::code1() != NULL)) { |
|
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|
725 // So, let's test for cascading c2i/i2c adapters right now. |
|
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|
726 // assert(Interpreter::contains($return_addr) || |
|
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|
727 // StubRoutines::contains($return_addr), |
|
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|
728 // "i2c adapter must return to an interpreter frame"); |
|
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|
729 __ block_comment("verify_i2c { "); |
|
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|
730 Label L_ok; |
|
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|
731 if (Interpreter::code() != NULL) |
|
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|
732 range_check(masm, rax, r11, |
|
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|
733 Interpreter::code()->code_start(), Interpreter::code()->code_end(), |
|
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|
734 L_ok); |
|
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|
735 if (StubRoutines::code1() != NULL) |
|
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|
736 range_check(masm, rax, r11, |
|
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|
737 StubRoutines::code1()->code_begin(), StubRoutines::code1()->code_end(), |
|
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|
738 L_ok); |
|
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|
739 if (StubRoutines::code2() != NULL) |
|
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changeset
|
740 range_check(masm, rax, r11, |
|
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|
741 StubRoutines::code2()->code_begin(), StubRoutines::code2()->code_end(), |
|
1d7922586cf6
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|
742 L_ok); |
|
1d7922586cf6
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|
743 const char* msg = "i2c adapter must return to an interpreter frame"; |
|
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|
744 __ block_comment(msg); |
|
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|
745 __ stop(msg); |
|
1d7922586cf6
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diff
changeset
|
746 __ bind(L_ok); |
|
1d7922586cf6
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diff
changeset
|
747 __ block_comment("} verify_i2ce "); |
|
1d7922586cf6
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|
748 } |
|
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parents:
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diff
changeset
|
749 |
|
17033
2d6dd2eebd51
Fixed HSAIL deopt
Tom Rodriguez <tom.rodriguez@oracle.com>
parents:
15104
diff
changeset
|
750 #ifdef GRAAL |
|
2d6dd2eebd51
Fixed HSAIL deopt
Tom Rodriguez <tom.rodriguez@oracle.com>
parents:
15104
diff
changeset
|
751 if (frame_extension_argument != -1) { |
|
2d6dd2eebd51
Fixed HSAIL deopt
Tom Rodriguez <tom.rodriguez@oracle.com>
parents:
15104
diff
changeset
|
752 // The frame_extension_argument is an int that describes the |
|
2d6dd2eebd51
Fixed HSAIL deopt
Tom Rodriguez <tom.rodriguez@oracle.com>
parents:
15104
diff
changeset
|
753 // expected amount of argument space in the caller frame. If that |
|
2d6dd2eebd51
Fixed HSAIL deopt
Tom Rodriguez <tom.rodriguez@oracle.com>
parents:
15104
diff
changeset
|
754 // is greater than total_args_passed then enlarge the caller frame |
|
2d6dd2eebd51
Fixed HSAIL deopt
Tom Rodriguez <tom.rodriguez@oracle.com>
parents:
15104
diff
changeset
|
755 // by that amount to ensure deopt works correctly. |
|
2d6dd2eebd51
Fixed HSAIL deopt
Tom Rodriguez <tom.rodriguez@oracle.com>
parents:
15104
diff
changeset
|
756 assert(frame_extension_argument < total_args_passed, "out of range"); |
|
2d6dd2eebd51
Fixed HSAIL deopt
Tom Rodriguez <tom.rodriguez@oracle.com>
parents:
15104
diff
changeset
|
757 assert(sig_bt[frame_extension_argument] == T_INT, "wrong signature"); |
|
2d6dd2eebd51
Fixed HSAIL deopt
Tom Rodriguez <tom.rodriguez@oracle.com>
parents:
15104
diff
changeset
|
758 |
|
2d6dd2eebd51
Fixed HSAIL deopt
Tom Rodriguez <tom.rodriguez@oracle.com>
parents:
15104
diff
changeset
|
759 Label done; |
|
2d6dd2eebd51
Fixed HSAIL deopt
Tom Rodriguez <tom.rodriguez@oracle.com>
parents:
15104
diff
changeset
|
760 int i = frame_extension_argument; |
|
2d6dd2eebd51
Fixed HSAIL deopt
Tom Rodriguez <tom.rodriguez@oracle.com>
parents:
15104
diff
changeset
|
761 int ld_off = (total_args_passed - i)*Interpreter::stackElementSize; |
|
2d6dd2eebd51
Fixed HSAIL deopt
Tom Rodriguez <tom.rodriguez@oracle.com>
parents:
15104
diff
changeset
|
762 // Check if anything needs to be done. Too much space is ok. |
|
2d6dd2eebd51
Fixed HSAIL deopt
Tom Rodriguez <tom.rodriguez@oracle.com>
parents:
15104
diff
changeset
|
763 __ movl(r13, Address(rsp, ld_off)); |
|
2d6dd2eebd51
Fixed HSAIL deopt
Tom Rodriguez <tom.rodriguez@oracle.com>
parents:
15104
diff
changeset
|
764 __ cmpl(r13, total_args_passed); |
|
2d6dd2eebd51
Fixed HSAIL deopt
Tom Rodriguez <tom.rodriguez@oracle.com>
parents:
15104
diff
changeset
|
765 __ jcc(Assembler::lessEqual, done); |
|
2d6dd2eebd51
Fixed HSAIL deopt
Tom Rodriguez <tom.rodriguez@oracle.com>
parents:
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diff
changeset
|
766 // Save the old rsp for the copy code |
|
2d6dd2eebd51
Fixed HSAIL deopt
Tom Rodriguez <tom.rodriguez@oracle.com>
parents:
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diff
changeset
|
767 __ movptr(r11, rsp); |
|
2d6dd2eebd51
Fixed HSAIL deopt
Tom Rodriguez <tom.rodriguez@oracle.com>
parents:
15104
diff
changeset
|
768 // Enlarge the frame |
|
2d6dd2eebd51
Fixed HSAIL deopt
Tom Rodriguez <tom.rodriguez@oracle.com>
parents:
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diff
changeset
|
769 __ subl(r13, total_args_passed); |
|
2d6dd2eebd51
Fixed HSAIL deopt
Tom Rodriguez <tom.rodriguez@oracle.com>
parents:
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diff
changeset
|
770 __ shlq(r13, 3); |
|
2d6dd2eebd51
Fixed HSAIL deopt
Tom Rodriguez <tom.rodriguez@oracle.com>
parents:
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diff
changeset
|
771 __ subptr(rsp, r13); |
|
2d6dd2eebd51
Fixed HSAIL deopt
Tom Rodriguez <tom.rodriguez@oracle.com>
parents:
15104
diff
changeset
|
772 |
|
2d6dd2eebd51
Fixed HSAIL deopt
Tom Rodriguez <tom.rodriguez@oracle.com>
parents:
15104
diff
changeset
|
773 // Now copy the arguments in reverse order so they don't get |
|
2d6dd2eebd51
Fixed HSAIL deopt
Tom Rodriguez <tom.rodriguez@oracle.com>
parents:
15104
diff
changeset
|
774 // overwritten during the copy. |
|
2d6dd2eebd51
Fixed HSAIL deopt
Tom Rodriguez <tom.rodriguez@oracle.com>
parents:
15104
diff
changeset
|
775 for (int i = total_args_passed - 1; i >= 0; i--) { |
|
2d6dd2eebd51
Fixed HSAIL deopt
Tom Rodriguez <tom.rodriguez@oracle.com>
parents:
15104
diff
changeset
|
776 int ld_off = (total_args_passed - i) * Interpreter::stackElementSize; |
|
2d6dd2eebd51
Fixed HSAIL deopt
Tom Rodriguez <tom.rodriguez@oracle.com>
parents:
15104
diff
changeset
|
777 __ movptr(r13, Address(r11, ld_off)); |
|
2d6dd2eebd51
Fixed HSAIL deopt
Tom Rodriguez <tom.rodriguez@oracle.com>
parents:
15104
diff
changeset
|
778 __ movptr(Address(rsp, ld_off), r13); |
|
2d6dd2eebd51
Fixed HSAIL deopt
Tom Rodriguez <tom.rodriguez@oracle.com>
parents:
15104
diff
changeset
|
779 } |
|
2d6dd2eebd51
Fixed HSAIL deopt
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parents:
15104
diff
changeset
|
780 __ bind(done); |
|
2d6dd2eebd51
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Tom Rodriguez <tom.rodriguez@oracle.com>
parents:
15104
diff
changeset
|
781 } |
|
2d6dd2eebd51
Fixed HSAIL deopt
Tom Rodriguez <tom.rodriguez@oracle.com>
parents:
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diff
changeset
|
782 #else |
|
2d6dd2eebd51
Fixed HSAIL deopt
Tom Rodriguez <tom.rodriguez@oracle.com>
parents:
15104
diff
changeset
|
783 assert(frame_extension_argument == -1, "unsupported"); |
|
2d6dd2eebd51
Fixed HSAIL deopt
Tom Rodriguez <tom.rodriguez@oracle.com>
parents:
15104
diff
changeset
|
784 #endif |
|
2d6dd2eebd51
Fixed HSAIL deopt
Tom Rodriguez <tom.rodriguez@oracle.com>
parents:
15104
diff
changeset
|
785 |
|
1135
e66fd840cb6b
6893081: method handle & invokedynamic code needs additional cleanup (post 6815692, 6858164)
twisti
parents:
848
diff
changeset
|
786 // Must preserve original SP for loading incoming arguments because |
|
e66fd840cb6b
6893081: method handle & invokedynamic code needs additional cleanup (post 6815692, 6858164)
twisti
parents:
848
diff
changeset
|
787 // we need to align the outgoing SP for compiled code. |
|
e66fd840cb6b
6893081: method handle & invokedynamic code needs additional cleanup (post 6815692, 6858164)
twisti
parents:
848
diff
changeset
|
788 __ movptr(r11, rsp); |
|
e66fd840cb6b
6893081: method handle & invokedynamic code needs additional cleanup (post 6815692, 6858164)
twisti
parents:
848
diff
changeset
|
789 |
| 0 | 790 // Cut-out for having no stack args. Since up to 2 int/oop args are passed |
| 791 // in registers, we will occasionally have no stack args. | |
| 792 int comp_words_on_stack = 0; | |
| 793 if (comp_args_on_stack) { | |
| 794 // Sig words on the stack are greater-than VMRegImpl::stack0. Those in | |
| 795 // registers are below. By subtracting stack0, we either get a negative | |
| 796 // number (all values in registers) or the maximum stack slot accessed. | |
| 797 | |
| 798 // Convert 4-byte c2 stack slots to words. | |
| 799 comp_words_on_stack = round_to(comp_args_on_stack*VMRegImpl::stack_slot_size, wordSize)>>LogBytesPerWord; | |
| 800 // Round up to miminum stack alignment, in wordSize | |
| 801 comp_words_on_stack = round_to(comp_words_on_stack, 2); | |
| 304 | 802 __ subptr(rsp, comp_words_on_stack * wordSize); |
| 0 | 803 } |
| 804 | |
| 805 | |
| 806 // Ensure compiled code always sees stack at proper alignment | |
| 304 | 807 __ andptr(rsp, -16); |
| 0 | 808 |
| 809 // push the return address and misalign the stack that youngest frame always sees | |
| 810 // as far as the placement of the call instruction | |
| 304 | 811 __ push(rax); |
| 0 | 812 |
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813 // Put saved SP in another register |
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814 const Register saved_sp = rax; |
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815 __ movptr(saved_sp, r11); |
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816 |
| 0 | 817 // Will jump to the compiled code just as if compiled code was doing it. |
| 818 // Pre-load the register-jump target early, to schedule it better. | |
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819 __ movptr(r11, Address(rbx, in_bytes(Method::from_compiled_offset()))); |
| 0 | 820 |
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821 #ifdef GRAAL |
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822 // check if this call should be routed towards a specific entry point |
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823 __ cmpptr(Address(r15_thread, in_bytes(JavaThread::graal_alternate_call_target_offset())), 0); |
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824 Label no_alternative_target; |
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825 __ jcc(Assembler::equal, no_alternative_target); |
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826 __ movptr(r11, Address(r15_thread, in_bytes(JavaThread::graal_alternate_call_target_offset()))); |
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827 __ movptr(Address(r15_thread, in_bytes(JavaThread::graal_alternate_call_target_offset())), 0); |
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828 __ bind(no_alternative_target); |
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829 #endif |
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830 |
| 0 | 831 // Now generate the shuffle code. Pick up all register args and move the |
| 832 // rest through the floating point stack top. | |
| 833 for (int i = 0; i < total_args_passed; i++) { | |
| 834 if (sig_bt[i] == T_VOID) { | |
| 835 // Longs and doubles are passed in native word order, but misaligned | |
| 836 // in the 32-bit build. | |
| 837 assert(i > 0 && (sig_bt[i-1] == T_LONG || sig_bt[i-1] == T_DOUBLE), "missing half"); | |
| 838 continue; | |
| 839 } | |
| 840 | |
| 841 // Pick up 0, 1 or 2 words from SP+offset. | |
| 842 | |
| 843 assert(!regs[i].second()->is_valid() || regs[i].first()->next() == regs[i].second(), | |
| 844 "scrambled load targets?"); | |
| 845 // Load in argument order going down. | |
| 1506 | 846 int ld_off = (total_args_passed - i)*Interpreter::stackElementSize; |
| 0 | 847 // Point to interpreter value (vs. tag) |
| 1506 | 848 int next_off = ld_off - Interpreter::stackElementSize; |
| 0 | 849 // |
| 850 // | |
| 851 // | |
| 852 VMReg r_1 = regs[i].first(); | |
| 853 VMReg r_2 = regs[i].second(); | |
| 854 if (!r_1->is_valid()) { | |
| 855 assert(!r_2->is_valid(), ""); | |
| 856 continue; | |
| 857 } | |
| 858 if (r_1->is_stack()) { | |
| 859 // Convert stack slot to an SP offset (+ wordSize to account for return address ) | |
| 860 int st_off = regs[i].first()->reg2stack()*VMRegImpl::stack_slot_size + wordSize; | |
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861 |
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862 // We can use r13 as a temp here because compiled code doesn't need r13 as an input |
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863 // and if we end up going thru a c2i because of a miss a reasonable value of r13 |
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864 // will be generated. |
| 0 | 865 if (!r_2->is_valid()) { |
| 866 // sign extend??? | |
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867 __ movl(r13, Address(saved_sp, ld_off)); |
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868 __ movptr(Address(rsp, st_off), r13); |
| 0 | 869 } else { |
| 870 // | |
| 871 // We are using two optoregs. This can be either T_OBJECT, T_ADDRESS, T_LONG, or T_DOUBLE | |
| 872 // the interpreter allocates two slots but only uses one for thr T_LONG or T_DOUBLE case | |
| 873 // So we must adjust where to pick up the data to match the interpreter. | |
| 874 // | |
| 875 // Interpreter local[n] == MSW, local[n+1] == LSW however locals | |
| 876 // are accessed as negative so LSW is at LOW address | |
| 877 | |
| 878 // ld_off is MSW so get LSW | |
| 879 const int offset = (sig_bt[i]==T_LONG||sig_bt[i]==T_DOUBLE)? | |
| 880 next_off : ld_off; | |
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881 __ movq(r13, Address(saved_sp, offset)); |
| 0 | 882 // st_off is LSW (i.e. reg.first()) |
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883 __ movq(Address(rsp, st_off), r13); |
| 0 | 884 } |
| 885 } else if (r_1->is_Register()) { // Register argument | |
| 886 Register r = r_1->as_Register(); | |
| 887 assert(r != rax, "must be different"); | |
| 888 if (r_2->is_valid()) { | |
| 889 // | |
| 890 // We are using two VMRegs. This can be either T_OBJECT, T_ADDRESS, T_LONG, or T_DOUBLE | |
| 891 // the interpreter allocates two slots but only uses one for thr T_LONG or T_DOUBLE case | |
| 892 // So we must adjust where to pick up the data to match the interpreter. | |
| 893 | |
| 894 const int offset = (sig_bt[i]==T_LONG||sig_bt[i]==T_DOUBLE)? | |
| 895 next_off : ld_off; | |
| 896 | |
| 897 // this can be a misaligned move | |
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898 __ movq(r, Address(saved_sp, offset)); |
| 0 | 899 } else { |
| 900 // sign extend and use a full word? | |
|
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901 __ movl(r, Address(saved_sp, ld_off)); |
| 0 | 902 } |
| 903 } else { | |
| 904 if (!r_2->is_valid()) { | |
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905 __ movflt(r_1->as_XMMRegister(), Address(saved_sp, ld_off)); |
| 0 | 906 } else { |
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907 __ movdbl(r_1->as_XMMRegister(), Address(saved_sp, next_off)); |
| 0 | 908 } |
| 909 } | |
| 910 } | |
| 911 | |
| 912 // 6243940 We might end up in handle_wrong_method if | |
| 913 // the callee is deoptimized as we race thru here. If that | |
| 914 // happens we don't want to take a safepoint because the | |
| 915 // caller frame will look interpreted and arguments are now | |
| 916 // "compiled" so it is much better to make this transition | |
| 917 // invisible to the stack walking code. Unfortunately if | |
| 918 // we try and find the callee by normal means a safepoint | |
| 919 // is possible. So we stash the desired callee in the thread | |
| 920 // and the vm will find there should this case occur. | |
| 921 | |
| 304 | 922 __ movptr(Address(r15_thread, JavaThread::callee_target_offset()), rbx); |
| 0 | 923 |
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924 // put Method* where a c2i would expect should we end up there |
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925 // only needed becaus eof c2 resolve stubs return Method* as a result in |
| 0 | 926 // rax |
| 304 | 927 __ mov(rax, rbx); |
| 0 | 928 __ jmp(r11); |
| 929 } | |
| 930 | |
| 931 // --------------------------------------------------------------- | |
| 932 AdapterHandlerEntry* SharedRuntime::generate_i2c2i_adapters(MacroAssembler *masm, | |
| 933 int total_args_passed, | |
| 934 int comp_args_on_stack, | |
| 935 const BasicType *sig_bt, | |
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936 const VMRegPair *regs, |
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937 AdapterFingerPrint* fingerprint) { |
| 0 | 938 address i2c_entry = __ pc(); |
| 939 | |
| 940 gen_i2c_adapter(masm, total_args_passed, comp_args_on_stack, sig_bt, regs); | |
| 941 | |
| 942 // ------------------------------------------------------------------------- | |
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943 // Generate a C2I adapter. On entry we know rbx holds the Method* during calls |
| 0 | 944 // to the interpreter. The args start out packed in the compiled layout. They |
| 945 // need to be unpacked into the interpreter layout. This will almost always | |
| 946 // require some stack space. We grow the current (compiled) stack, then repack | |
| 947 // the args. We finally end in a jump to the generic interpreter entry point. | |
| 948 // On exit from the interpreter, the interpreter will restore our SP (lest the | |
| 949 // compiled code, which relys solely on SP and not RBP, get sick). | |
| 950 | |
| 951 address c2i_unverified_entry = __ pc(); | |
| 952 Label skip_fixup; | |
| 953 Label ok; | |
| 954 | |
| 955 Register holder = rax; | |
| 956 Register receiver = j_rarg0; | |
| 957 Register temp = rbx; | |
| 958 | |
| 959 { | |
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960 __ load_klass(temp, receiver); |
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961 __ cmpptr(temp, Address(holder, CompiledICHolder::holder_klass_offset())); |
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962 __ movptr(rbx, Address(holder, CompiledICHolder::holder_method_offset())); |
| 0 | 963 __ jcc(Assembler::equal, ok); |
| 964 __ jump(RuntimeAddress(SharedRuntime::get_ic_miss_stub())); | |
| 965 | |
| 966 __ bind(ok); | |
| 967 // Method might have been compiled since the call site was patched to | |
| 968 // interpreted if that is the case treat it as a miss so we can get | |
| 969 // the call site corrected. | |
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970 __ cmpptr(Address(rbx, in_bytes(Method::code_offset())), (int32_t)NULL_WORD); |
| 0 | 971 __ jcc(Assembler::equal, skip_fixup); |
| 972 __ jump(RuntimeAddress(SharedRuntime::get_ic_miss_stub())); | |
| 973 } | |
| 974 | |
| 975 address c2i_entry = __ pc(); | |
| 976 | |
| 977 gen_c2i_adapter(masm, total_args_passed, comp_args_on_stack, sig_bt, regs, skip_fixup); | |
| 978 | |
| 979 __ flush(); | |
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980 return AdapterHandlerLibrary::new_entry(fingerprint, i2c_entry, c2i_entry, c2i_unverified_entry); |
| 0 | 981 } |
| 982 | |
| 983 int SharedRuntime::c_calling_convention(const BasicType *sig_bt, | |
| 984 VMRegPair *regs, | |
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985 VMRegPair *regs2, |
| 0 | 986 int total_args_passed) { |
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987 assert(regs2 == NULL, "not needed on x86"); |
| 0 | 988 // We return the amount of VMRegImpl stack slots we need to reserve for all |
| 989 // the arguments NOT counting out_preserve_stack_slots. | |
| 990 | |
| 991 // NOTE: These arrays will have to change when c1 is ported | |
| 992 #ifdef _WIN64 | |
| 993 static const Register INT_ArgReg[Argument::n_int_register_parameters_c] = { | |
| 994 c_rarg0, c_rarg1, c_rarg2, c_rarg3 | |
| 995 }; | |
| 996 static const XMMRegister FP_ArgReg[Argument::n_float_register_parameters_c] = { | |
| 997 c_farg0, c_farg1, c_farg2, c_farg3 | |
| 998 }; | |
| 999 #else | |
| 1000 static const Register INT_ArgReg[Argument::n_int_register_parameters_c] = { | |
| 1001 c_rarg0, c_rarg1, c_rarg2, c_rarg3, c_rarg4, c_rarg5 | |
| 1002 }; | |
| 1003 static const XMMRegister FP_ArgReg[Argument::n_float_register_parameters_c] = { | |
| 1004 c_farg0, c_farg1, c_farg2, c_farg3, | |
| 1005 c_farg4, c_farg5, c_farg6, c_farg7 | |
| 1006 }; | |
| 1007 #endif // _WIN64 | |
| 1008 | |
| 1009 | |
| 1010 uint int_args = 0; | |
| 1011 uint fp_args = 0; | |
| 1012 uint stk_args = 0; // inc by 2 each time | |
| 1013 | |
| 1014 for (int i = 0; i < total_args_passed; i++) { | |
| 1015 switch (sig_bt[i]) { | |
| 1016 case T_BOOLEAN: | |
| 1017 case T_CHAR: | |
| 1018 case T_BYTE: | |
| 1019 case T_SHORT: | |
| 1020 case T_INT: | |
| 1021 if (int_args < Argument::n_int_register_parameters_c) { | |
| 1022 regs[i].set1(INT_ArgReg[int_args++]->as_VMReg()); | |
| 1023 #ifdef _WIN64 | |
| 1024 fp_args++; | |
| 1025 // Allocate slots for callee to stuff register args the stack. | |
| 1026 stk_args += 2; | |
| 1027 #endif | |
| 1028 } else { | |
| 1029 regs[i].set1(VMRegImpl::stack2reg(stk_args)); | |
| 1030 stk_args += 2; | |
| 1031 } | |
| 1032 break; | |
| 1033 case T_LONG: | |
| 1034 assert(sig_bt[i + 1] == T_VOID, "expecting half"); | |
| 1035 // fall through | |
| 1036 case T_OBJECT: | |
| 1037 case T_ARRAY: | |
| 1038 case T_ADDRESS: | |
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1039 case T_METADATA: |
| 0 | 1040 if (int_args < Argument::n_int_register_parameters_c) { |
| 1041 regs[i].set2(INT_ArgReg[int_args++]->as_VMReg()); | |
| 1042 #ifdef _WIN64 | |
| 1043 fp_args++; | |
| 1044 stk_args += 2; | |
| 1045 #endif | |
| 1046 } else { | |
| 1047 regs[i].set2(VMRegImpl::stack2reg(stk_args)); | |
| 1048 stk_args += 2; | |
| 1049 } | |
| 1050 break; | |
| 1051 case T_FLOAT: | |
| 1052 if (fp_args < Argument::n_float_register_parameters_c) { | |
| 1053 regs[i].set1(FP_ArgReg[fp_args++]->as_VMReg()); | |
| 1054 #ifdef _WIN64 | |
| 1055 int_args++; | |
| 1056 // Allocate slots for callee to stuff register args the stack. | |
| 1057 stk_args += 2; | |
| 1058 #endif | |
| 1059 } else { | |
| 1060 regs[i].set1(VMRegImpl::stack2reg(stk_args)); | |
| 1061 stk_args += 2; | |
| 1062 } | |
| 1063 break; | |
| 1064 case T_DOUBLE: | |
| 1065 assert(sig_bt[i + 1] == T_VOID, "expecting half"); | |
| 1066 if (fp_args < Argument::n_float_register_parameters_c) { | |
| 1067 regs[i].set2(FP_ArgReg[fp_args++]->as_VMReg()); | |
| 1068 #ifdef _WIN64 | |
| 1069 int_args++; | |
| 1070 // Allocate slots for callee to stuff register args the stack. | |
| 1071 stk_args += 2; | |
| 1072 #endif | |
| 1073 } else { | |
| 1074 regs[i].set2(VMRegImpl::stack2reg(stk_args)); | |
| 1075 stk_args += 2; | |
| 1076 } | |
| 1077 break; | |
| 1078 case T_VOID: // Halves of longs and doubles | |
| 1079 assert(i != 0 && (sig_bt[i - 1] == T_LONG || sig_bt[i - 1] == T_DOUBLE), "expecting half"); | |
| 1080 regs[i].set_bad(); | |
| 1081 break; | |
| 1082 default: | |
| 1083 ShouldNotReachHere(); | |
| 1084 break; | |
| 1085 } | |
| 1086 } | |
| 1087 #ifdef _WIN64 | |
| 1088 // windows abi requires that we always allocate enough stack space | |
| 1089 // for 4 64bit registers to be stored down. | |
| 1090 if (stk_args < 8) { | |
| 1091 stk_args = 8; | |
| 1092 } | |
| 1093 #endif // _WIN64 | |
| 1094 | |
| 1095 return stk_args; | |
| 1096 } | |
| 1097 | |
| 1098 // On 64 bit we will store integer like items to the stack as | |
| 1099 // 64 bits items (sparc abi) even though java would only store | |
| 1100 // 32bits for a parameter. On 32bit it will simply be 32 bits | |
| 1101 // So this routine will do 32->32 on 32bit and 32->64 on 64bit | |
| 1102 static void move32_64(MacroAssembler* masm, VMRegPair src, VMRegPair dst) { | |
| 1103 if (src.first()->is_stack()) { | |
| 1104 if (dst.first()->is_stack()) { | |
| 1105 // stack to stack | |
| 1106 __ movslq(rax, Address(rbp, reg2offset_in(src.first()))); | |
| 1107 __ movq(Address(rsp, reg2offset_out(dst.first())), rax); | |
| 1108 } else { | |
| 1109 // stack to reg | |
| 1110 __ movslq(dst.first()->as_Register(), Address(rbp, reg2offset_in(src.first()))); | |
| 1111 } | |
| 1112 } else if (dst.first()->is_stack()) { | |
| 1113 // reg to stack | |
| 1114 // Do we really have to sign extend??? | |
| 1115 // __ movslq(src.first()->as_Register(), src.first()->as_Register()); | |
| 1116 __ movq(Address(rsp, reg2offset_out(dst.first())), src.first()->as_Register()); | |
| 1117 } else { | |
| 1118 // Do we really have to sign extend??? | |
| 1119 // __ movslq(dst.first()->as_Register(), src.first()->as_Register()); | |
| 1120 if (dst.first() != src.first()) { | |
| 1121 __ movq(dst.first()->as_Register(), src.first()->as_Register()); | |
| 1122 } | |
| 1123 } | |
| 1124 } | |
| 1125 | |
|
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1126 static void move_ptr(MacroAssembler* masm, VMRegPair src, VMRegPair dst) { |
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1127 if (src.first()->is_stack()) { |
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1128 if (dst.first()->is_stack()) { |
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1129 // stack to stack |
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1130 __ movq(rax, Address(rbp, reg2offset_in(src.first()))); |
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1131 __ movq(Address(rsp, reg2offset_out(dst.first())), rax); |
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1132 } else { |
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1133 // stack to reg |
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1134 __ movq(dst.first()->as_Register(), Address(rbp, reg2offset_in(src.first()))); |
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1135 } |
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1136 } else if (dst.first()->is_stack()) { |
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1137 // reg to stack |
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1138 __ movq(Address(rsp, reg2offset_out(dst.first())), src.first()->as_Register()); |
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1139 } else { |
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1140 if (dst.first() != src.first()) { |
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1141 __ movq(dst.first()->as_Register(), src.first()->as_Register()); |
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1142 } |
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1143 } |
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1144 } |
| 0 | 1145 |
| 1146 // An oop arg. Must pass a handle not the oop itself | |
| 1147 static void object_move(MacroAssembler* masm, | |
| 1148 OopMap* map, | |
| 1149 int oop_handle_offset, | |
| 1150 int framesize_in_slots, | |
| 1151 VMRegPair src, | |
| 1152 VMRegPair dst, | |
| 1153 bool is_receiver, | |
| 1154 int* receiver_offset) { | |
| 1155 | |
| 1156 // must pass a handle. First figure out the location we use as a handle | |
| 1157 | |
| 1158 Register rHandle = dst.first()->is_stack() ? rax : dst.first()->as_Register(); | |
| 1159 | |
| 1160 // See if oop is NULL if it is we need no handle | |
| 1161 | |
| 1162 if (src.first()->is_stack()) { | |
| 1163 | |
| 1164 // Oop is already on the stack as an argument | |
| 1165 int offset_in_older_frame = src.first()->reg2stack() + SharedRuntime::out_preserve_stack_slots(); | |
| 1166 map->set_oop(VMRegImpl::stack2reg(offset_in_older_frame + framesize_in_slots)); | |
| 1167 if (is_receiver) { | |
| 1168 *receiver_offset = (offset_in_older_frame + framesize_in_slots) * VMRegImpl::stack_slot_size; | |
| 1169 } | |
| 1170 | |
| 304 | 1171 __ cmpptr(Address(rbp, reg2offset_in(src.first())), (int32_t)NULL_WORD); |
| 1172 __ lea(rHandle, Address(rbp, reg2offset_in(src.first()))); | |
| 0 | 1173 // conditionally move a NULL |
| 304 | 1174 __ cmovptr(Assembler::equal, rHandle, Address(rbp, reg2offset_in(src.first()))); |
| 0 | 1175 } else { |
| 1176 | |
| 1177 // Oop is in an a register we must store it to the space we reserve | |
| 1178 // on the stack for oop_handles and pass a handle if oop is non-NULL | |
| 1179 | |
| 1180 const Register rOop = src.first()->as_Register(); | |
| 1181 int oop_slot; | |
| 1182 if (rOop == j_rarg0) | |
| 1183 oop_slot = 0; | |
| 1184 else if (rOop == j_rarg1) | |
| 1185 oop_slot = 1; | |
| 1186 else if (rOop == j_rarg2) | |
| 1187 oop_slot = 2; | |
| 1188 else if (rOop == j_rarg3) | |
| 1189 oop_slot = 3; | |
| 1190 else if (rOop == j_rarg4) | |
| 1191 oop_slot = 4; | |
| 1192 else { | |
| 1193 assert(rOop == j_rarg5, "wrong register"); | |
| 1194 oop_slot = 5; | |
| 1195 } | |
| 1196 | |
| 1197 oop_slot = oop_slot * VMRegImpl::slots_per_word + oop_handle_offset; | |
| 1198 int offset = oop_slot*VMRegImpl::stack_slot_size; | |
| 1199 | |
| 1200 map->set_oop(VMRegImpl::stack2reg(oop_slot)); | |
| 1201 // Store oop in handle area, may be NULL | |
| 304 | 1202 __ movptr(Address(rsp, offset), rOop); |
| 0 | 1203 if (is_receiver) { |
| 1204 *receiver_offset = offset; | |
| 1205 } | |
| 1206 | |
| 304 | 1207 __ cmpptr(rOop, (int32_t)NULL_WORD); |
| 1208 __ lea(rHandle, Address(rsp, offset)); | |
| 0 | 1209 // conditionally move a NULL from the handle area where it was just stored |
| 304 | 1210 __ cmovptr(Assembler::equal, rHandle, Address(rsp, offset)); |
| 0 | 1211 } |
| 1212 | |
| 1213 // If arg is on the stack then place it otherwise it is already in correct reg. | |
| 1214 if (dst.first()->is_stack()) { | |
| 304 | 1215 __ movptr(Address(rsp, reg2offset_out(dst.first())), rHandle); |
| 0 | 1216 } |
| 1217 } | |
| 1218 | |
| 1219 // A float arg may have to do float reg int reg conversion | |
| 1220 static void float_move(MacroAssembler* masm, VMRegPair src, VMRegPair dst) { | |
| 1221 assert(!src.second()->is_valid() && !dst.second()->is_valid(), "bad float_move"); | |
| 1222 | |
| 1223 // The calling conventions assures us that each VMregpair is either | |
| 1224 // all really one physical register or adjacent stack slots. | |
| 1225 // This greatly simplifies the cases here compared to sparc. | |
| 1226 | |
| 1227 if (src.first()->is_stack()) { | |
| 1228 if (dst.first()->is_stack()) { | |
| 1229 __ movl(rax, Address(rbp, reg2offset_in(src.first()))); | |
| 304 | 1230 __ movptr(Address(rsp, reg2offset_out(dst.first())), rax); |
| 0 | 1231 } else { |
| 1232 // stack to reg | |
| 1233 assert(dst.first()->is_XMMRegister(), "only expect xmm registers as parameters"); | |
| 1234 __ movflt(dst.first()->as_XMMRegister(), Address(rbp, reg2offset_in(src.first()))); | |
| 1235 } | |
| 1236 } else if (dst.first()->is_stack()) { | |
| 1237 // reg to stack | |
| 1238 assert(src.first()->is_XMMRegister(), "only expect xmm registers as parameters"); | |
| 1239 __ movflt(Address(rsp, reg2offset_out(dst.first())), src.first()->as_XMMRegister()); | |
| 1240 } else { | |
| 1241 // reg to reg | |
| 1242 // In theory these overlap but the ordering is such that this is likely a nop | |
| 1243 if ( src.first() != dst.first()) { | |
| 1244 __ movdbl(dst.first()->as_XMMRegister(), src.first()->as_XMMRegister()); | |
| 1245 } | |
| 1246 } | |
| 1247 } | |
| 1248 | |
| 1249 // A long move | |
| 1250 static void long_move(MacroAssembler* masm, VMRegPair src, VMRegPair dst) { | |
| 1251 | |
| 1252 // The calling conventions assures us that each VMregpair is either | |
| 1253 // all really one physical register or adjacent stack slots. | |
| 1254 // This greatly simplifies the cases here compared to sparc. | |
| 1255 | |
| 1256 if (src.is_single_phys_reg() ) { | |
| 1257 if (dst.is_single_phys_reg()) { | |
| 1258 if (dst.first() != src.first()) { | |
| 304 | 1259 __ mov(dst.first()->as_Register(), src.first()->as_Register()); |
| 0 | 1260 } |
| 1261 } else { | |
| 1262 assert(dst.is_single_reg(), "not a stack pair"); | |
| 1263 __ movq(Address(rsp, reg2offset_out(dst.first())), src.first()->as_Register()); | |
| 1264 } | |
| 1265 } else if (dst.is_single_phys_reg()) { | |
| 1266 assert(src.is_single_reg(), "not a stack pair"); | |
| 1267 __ movq(dst.first()->as_Register(), Address(rbp, reg2offset_out(src.first()))); | |
| 1268 } else { | |
| 1269 assert(src.is_single_reg() && dst.is_single_reg(), "not stack pairs"); | |
| 1270 __ movq(rax, Address(rbp, reg2offset_in(src.first()))); | |
| 1271 __ movq(Address(rsp, reg2offset_out(dst.first())), rax); | |
| 1272 } | |
| 1273 } | |
| 1274 | |
| 1275 // A double move | |
| 1276 static void double_move(MacroAssembler* masm, VMRegPair src, VMRegPair dst) { | |
| 1277 | |
| 1278 // The calling conventions assures us that each VMregpair is either | |
| 1279 // all really one physical register or adjacent stack slots. | |
| 1280 // This greatly simplifies the cases here compared to sparc. | |
| 1281 | |
| 1282 if (src.is_single_phys_reg() ) { | |
| 1283 if (dst.is_single_phys_reg()) { | |
| 1284 // In theory these overlap but the ordering is such that this is likely a nop | |
| 1285 if ( src.first() != dst.first()) { | |
| 1286 __ movdbl(dst.first()->as_XMMRegister(), src.first()->as_XMMRegister()); | |
| 1287 } | |
| 1288 } else { | |
| 1289 assert(dst.is_single_reg(), "not a stack pair"); | |
| 1290 __ movdbl(Address(rsp, reg2offset_out(dst.first())), src.first()->as_XMMRegister()); | |
| 1291 } | |
| 1292 } else if (dst.is_single_phys_reg()) { | |
| 1293 assert(src.is_single_reg(), "not a stack pair"); | |
| 1294 __ movdbl(dst.first()->as_XMMRegister(), Address(rbp, reg2offset_out(src.first()))); | |
| 1295 } else { | |
| 1296 assert(src.is_single_reg() && dst.is_single_reg(), "not stack pairs"); | |
| 1297 __ movq(rax, Address(rbp, reg2offset_in(src.first()))); | |
| 1298 __ movq(Address(rsp, reg2offset_out(dst.first())), rax); | |
| 1299 } | |
| 1300 } | |
| 1301 | |
| 1302 | |
| 1303 void SharedRuntime::save_native_result(MacroAssembler *masm, BasicType ret_type, int frame_slots) { | |
| 1304 // We always ignore the frame_slots arg and just use the space just below frame pointer | |
| 1305 // which by this time is free to use | |
| 1306 switch (ret_type) { | |
| 1307 case T_FLOAT: | |
| 1308 __ movflt(Address(rbp, -wordSize), xmm0); | |
| 1309 break; | |
| 1310 case T_DOUBLE: | |
| 1311 __ movdbl(Address(rbp, -wordSize), xmm0); | |
| 1312 break; | |
| 1313 case T_VOID: break; | |
| 1314 default: { | |
| 304 | 1315 __ movptr(Address(rbp, -wordSize), rax); |
| 0 | 1316 } |
| 1317 } | |
| 1318 } | |
| 1319 | |
| 1320 void SharedRuntime::restore_native_result(MacroAssembler *masm, BasicType ret_type, int frame_slots) { | |
| 1321 // We always ignore the frame_slots arg and just use the space just below frame pointer | |
| 1322 // which by this time is free to use | |
| 1323 switch (ret_type) { | |
| 1324 case T_FLOAT: | |
| 1325 __ movflt(xmm0, Address(rbp, -wordSize)); | |
| 1326 break; | |
| 1327 case T_DOUBLE: | |
| 1328 __ movdbl(xmm0, Address(rbp, -wordSize)); | |
| 1329 break; | |
| 1330 case T_VOID: break; | |
| 1331 default: { | |
| 304 | 1332 __ movptr(rax, Address(rbp, -wordSize)); |
| 0 | 1333 } |
| 1334 } | |
| 1335 } | |
| 1336 | |
| 1337 static void save_args(MacroAssembler *masm, int arg_count, int first_arg, VMRegPair *args) { | |
| 1338 for ( int i = first_arg ; i < arg_count ; i++ ) { | |
| 1339 if (args[i].first()->is_Register()) { | |
| 304 | 1340 __ push(args[i].first()->as_Register()); |
| 0 | 1341 } else if (args[i].first()->is_XMMRegister()) { |
| 304 | 1342 __ subptr(rsp, 2*wordSize); |
| 0 | 1343 __ movdbl(Address(rsp, 0), args[i].first()->as_XMMRegister()); |
| 1344 } | |
| 1345 } | |
| 1346 } | |
| 1347 | |
| 1348 static void restore_args(MacroAssembler *masm, int arg_count, int first_arg, VMRegPair *args) { | |
| 1349 for ( int i = arg_count - 1 ; i >= first_arg ; i-- ) { | |
| 1350 if (args[i].first()->is_Register()) { | |
| 304 | 1351 __ pop(args[i].first()->as_Register()); |
| 0 | 1352 } else if (args[i].first()->is_XMMRegister()) { |
| 1353 __ movdbl(args[i].first()->as_XMMRegister(), Address(rsp, 0)); | |
| 304 | 1354 __ addptr(rsp, 2*wordSize); |
| 0 | 1355 } |
| 1356 } | |
| 1357 } | |
| 1358 | |
|
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1359 |
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1360 static void save_or_restore_arguments(MacroAssembler* masm, |
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1361 const int stack_slots, |
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1362 const int total_in_args, |
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1363 const int arg_save_area, |
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1364 OopMap* map, |
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1365 VMRegPair* in_regs, |
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1366 BasicType* in_sig_bt) { |
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1367 // if map is non-NULL then the code should store the values, |
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1368 // otherwise it should load them. |
| 5905 | 1369 int slot = arg_save_area; |
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1370 // Save down double word first |
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1371 for ( int i = 0; i < total_in_args; i++) { |
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1372 if (in_regs[i].first()->is_XMMRegister() && in_sig_bt[i] == T_DOUBLE) { |
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1373 int offset = slot * VMRegImpl::stack_slot_size; |
| 5905 | 1374 slot += VMRegImpl::slots_per_word; |
| 1375 assert(slot <= stack_slots, "overflow"); | |
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1376 if (map != NULL) { |
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1377 __ movdbl(Address(rsp, offset), in_regs[i].first()->as_XMMRegister()); |
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1378 } else { |
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1379 __ movdbl(in_regs[i].first()->as_XMMRegister(), Address(rsp, offset)); |
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1380 } |
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1381 } |
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1382 if (in_regs[i].first()->is_Register() && |
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1383 (in_sig_bt[i] == T_LONG || in_sig_bt[i] == T_ARRAY)) { |
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1384 int offset = slot * VMRegImpl::stack_slot_size; |
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1385 if (map != NULL) { |
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1386 __ movq(Address(rsp, offset), in_regs[i].first()->as_Register()); |
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1387 if (in_sig_bt[i] == T_ARRAY) { |
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1388 map->set_oop(VMRegImpl::stack2reg(slot));; |
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1389 } |
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1390 } else { |
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1391 __ movq(in_regs[i].first()->as_Register(), Address(rsp, offset)); |
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1392 } |
| 5907 | 1393 slot += VMRegImpl::slots_per_word; |
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1394 } |
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1395 } |
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1396 // Save or restore single word registers |
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1397 for ( int i = 0; i < total_in_args; i++) { |
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1398 if (in_regs[i].first()->is_Register()) { |
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1399 int offset = slot * VMRegImpl::stack_slot_size; |
| 5905 | 1400 slot++; |
| 1401 assert(slot <= stack_slots, "overflow"); | |
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1402 |
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1403 // Value is in an input register pass we must flush it to the stack |
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1404 const Register reg = in_regs[i].first()->as_Register(); |
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1405 switch (in_sig_bt[i]) { |
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1406 case T_BOOLEAN: |
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1407 case T_CHAR: |
|
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1408 case T_BYTE: |
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1409 case T_SHORT: |
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1410 case T_INT: |
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1411 if (map != NULL) { |
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1412 __ movl(Address(rsp, offset), reg); |
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1413 } else { |
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1414 __ movl(reg, Address(rsp, offset)); |
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1415 } |
|
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1416 break; |
|
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1417 case T_ARRAY: |
|
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1418 case T_LONG: |
|
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1419 // handled above |
|
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1420 break; |
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1421 case T_OBJECT: |
|
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1422 default: ShouldNotReachHere(); |
|
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1423 } |
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1424 } else if (in_regs[i].first()->is_XMMRegister()) { |
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1425 if (in_sig_bt[i] == T_FLOAT) { |
|
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1426 int offset = slot * VMRegImpl::stack_slot_size; |
| 5905 | 1427 slot++; |
| 1428 assert(slot <= stack_slots, "overflow"); | |
|
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1429 if (map != NULL) { |
|
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1430 __ movflt(Address(rsp, offset), in_regs[i].first()->as_XMMRegister()); |
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1431 } else { |
|
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1432 __ movflt(in_regs[i].first()->as_XMMRegister(), Address(rsp, offset)); |
|
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1433 } |
|
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1434 } |
|
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1435 } else if (in_regs[i].first()->is_stack()) { |
|
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1436 if (in_sig_bt[i] == T_ARRAY && map != NULL) { |
|
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1437 int offset_in_older_frame = in_regs[i].first()->reg2stack() + SharedRuntime::out_preserve_stack_slots(); |
|
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1438 map->set_oop(VMRegImpl::stack2reg(offset_in_older_frame + stack_slots)); |
|
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1439 } |
|
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|
1440 } |
|
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|
1441 } |
|
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|
1442 } |
|
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|
1443 |
|
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|
1444 |
|
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|
1445 // Check GC_locker::needs_gc and enter the runtime if it's true. This |
|
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1446 // keeps a new JNI critical region from starting until a GC has been |
|
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1447 // forced. Save down any oops in registers and describe them in an |
|
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1448 // OopMap. |
|
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|
1449 static void check_needs_gc_for_critical_native(MacroAssembler* masm, |
|
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1450 int stack_slots, |
|
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1451 int total_c_args, |
|
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|
1452 int total_in_args, |
|
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1453 int arg_save_area, |
|
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|
1454 OopMapSet* oop_maps, |
|
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1455 VMRegPair* in_regs, |
|
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|
1456 BasicType* in_sig_bt) { |
|
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1457 __ block_comment("check GC_locker::needs_gc"); |
|
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|
1458 Label cont; |
|
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|
1459 __ cmp8(ExternalAddress((address)GC_locker::needs_gc_address()), false); |
|
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1460 __ jcc(Assembler::equal, cont); |
|
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|
1461 |
|
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1462 // Save down any incoming oops and call into the runtime to halt for a GC |
|
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1463 |
|
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|
1464 OopMap* map = new OopMap(stack_slots * 2, 0 /* arg_slots*/); |
|
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|
1465 save_or_restore_arguments(masm, stack_slots, total_in_args, |
|
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|
1466 arg_save_area, map, in_regs, in_sig_bt); |
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1467 |
|
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|
1468 address the_pc = __ pc(); |
|
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|
1469 oop_maps->add_gc_map( __ offset(), map); |
|
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|
1470 __ set_last_Java_frame(rsp, noreg, the_pc); |
|
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|
1471 |
|
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|
1472 __ block_comment("block_for_jni_critical"); |
|
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1473 __ movptr(c_rarg0, r15_thread); |
|
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|
1474 __ mov(r12, rsp); // remember sp |
|
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|
1475 __ subptr(rsp, frame::arg_reg_save_area_bytes); // windows |
|
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|
1476 __ andptr(rsp, -16); // align stack as required by ABI |
|
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1477 __ call(RuntimeAddress(CAST_FROM_FN_PTR(address, SharedRuntime::block_for_jni_critical))); |
|
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1478 __ mov(rsp, r12); // restore sp |
|
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|
1479 __ reinit_heapbase(); |
|
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|
1480 |
|
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|
1481 __ reset_last_Java_frame(false, true); |
|
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|
1482 |
|
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|
1483 save_or_restore_arguments(masm, stack_slots, total_in_args, |
|
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|
1484 arg_save_area, NULL, in_regs, in_sig_bt); |
|
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|
1485 |
|
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|
1486 __ bind(cont); |
|
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|
1487 #ifdef ASSERT |
|
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|
1488 if (StressCriticalJNINatives) { |
|
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1489 // Stress register saving |
|
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1490 OopMap* map = new OopMap(stack_slots * 2, 0 /* arg_slots*/); |
|
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|
1491 save_or_restore_arguments(masm, stack_slots, total_in_args, |
|
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|
1492 arg_save_area, map, in_regs, in_sig_bt); |
|
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1493 // Destroy argument registers |
|
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|
1494 for (int i = 0; i < total_in_args - 1; i++) { |
|
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1495 if (in_regs[i].first()->is_Register()) { |
|
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1496 const Register reg = in_regs[i].first()->as_Register(); |
|
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|
1497 __ xorptr(reg, reg); |
|
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|
1498 } else if (in_regs[i].first()->is_XMMRegister()) { |
|
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|
1499 __ xorpd(in_regs[i].first()->as_XMMRegister(), in_regs[i].first()->as_XMMRegister()); |
|
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1500 } else if (in_regs[i].first()->is_FloatRegister()) { |
|
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|
1501 ShouldNotReachHere(); |
|
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|
1502 } else if (in_regs[i].first()->is_stack()) { |
|
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|
1503 // Nothing to do |
|
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|
1504 } else { |
|
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|
1505 ShouldNotReachHere(); |
|
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|
1506 } |
|
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1507 if (in_sig_bt[i] == T_LONG || in_sig_bt[i] == T_DOUBLE) { |
|
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|
1508 i++; |
|
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|
1509 } |
|
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|
1510 } |
|
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|
1511 |
|
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|
1512 save_or_restore_arguments(masm, stack_slots, total_in_args, |
|
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1513 arg_save_area, NULL, in_regs, in_sig_bt); |
|
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1514 } |
|
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|
1515 #endif |
|
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|
1516 } |
|
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|
1517 |
|
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1518 // Unpack an array argument into a pointer to the body and the length |
|
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1519 // if the array is non-null, otherwise pass 0 for both. |
|
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|
1520 static void unpack_array_argument(MacroAssembler* masm, VMRegPair reg, BasicType in_elem_type, VMRegPair body_arg, VMRegPair length_arg) { |
|
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1521 Register tmp_reg = rax; |
|
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|
1522 assert(!body_arg.first()->is_Register() || body_arg.first()->as_Register() != tmp_reg, |
|
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1523 "possible collision"); |
|
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|
1524 assert(!length_arg.first()->is_Register() || length_arg.first()->as_Register() != tmp_reg, |
|
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1525 "possible collision"); |
|
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|
1526 |
|
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1527 __ block_comment("unpack_array_argument {"); |
|
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|
1528 |
|
4873
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|
1529 // Pass the length, ptr pair |
|
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|
1530 Label is_null, done; |
|
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|
1531 VMRegPair tmp; |
|
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1532 tmp.set_ptr(tmp_reg->as_VMReg()); |
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1533 if (reg.first()->is_stack()) { |
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1534 // Load the arg up from the stack |
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1535 move_ptr(masm, reg, tmp); |
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1536 reg = tmp; |
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1537 } |
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1538 __ testptr(reg.first()->as_Register(), reg.first()->as_Register()); |
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1539 __ jccb(Assembler::equal, is_null); |
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1540 __ lea(tmp_reg, Address(reg.first()->as_Register(), arrayOopDesc::base_offset_in_bytes(in_elem_type))); |
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1541 move_ptr(masm, tmp, body_arg); |
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1542 // load the length relative to the body. |
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1543 __ movl(tmp_reg, Address(tmp_reg, arrayOopDesc::length_offset_in_bytes() - |
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1544 arrayOopDesc::base_offset_in_bytes(in_elem_type))); |
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1545 move32_64(masm, tmp, length_arg); |
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1546 __ jmpb(done); |
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1547 __ bind(is_null); |
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1548 // Pass zeros |
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1549 __ xorptr(tmp_reg, tmp_reg); |
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1550 move_ptr(masm, tmp, body_arg); |
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1551 move32_64(masm, tmp, length_arg); |
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1552 __ bind(done); |
|
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1553 |
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1554 __ block_comment("} unpack_array_argument"); |
|
4873
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1555 } |
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1556 |
| 5905 | 1557 |
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1558 // Different signatures may require very different orders for the move |
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1559 // to avoid clobbering other arguments. There's no simple way to |
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1560 // order them safely. Compute a safe order for issuing stores and |
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1561 // break any cycles in those stores. This code is fairly general but |
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1562 // it's not necessary on the other platforms so we keep it in the |
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1563 // platform dependent code instead of moving it into a shared file. |
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1564 // (See bugs 7013347 & 7145024.) |
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1565 // Note that this code is specific to LP64. |
| 5905 | 1566 class ComputeMoveOrder: public StackObj { |
| 1567 class MoveOperation: public ResourceObj { | |
| 1568 friend class ComputeMoveOrder; | |
| 1569 private: | |
| 1570 VMRegPair _src; | |
| 1571 VMRegPair _dst; | |
| 1572 int _src_index; | |
| 1573 int _dst_index; | |
| 1574 bool _processed; | |
| 1575 MoveOperation* _next; | |
| 1576 MoveOperation* _prev; | |
| 1577 | |
| 1578 static int get_id(VMRegPair r) { | |
| 1579 return r.first()->value(); | |
| 1580 } | |
| 1581 | |
| 1582 public: | |
| 1583 MoveOperation(int src_index, VMRegPair src, int dst_index, VMRegPair dst): | |
| 1584 _src(src) | |
| 1585 , _src_index(src_index) | |
| 1586 , _dst(dst) | |
| 1587 , _dst_index(dst_index) | |
| 1588 , _next(NULL) | |
| 1589 , _prev(NULL) | |
| 1590 , _processed(false) { | |
| 1591 } | |
| 1592 | |
| 1593 VMRegPair src() const { return _src; } | |
| 1594 int src_id() const { return get_id(src()); } | |
| 1595 int src_index() const { return _src_index; } | |
| 1596 VMRegPair dst() const { return _dst; } | |
| 1597 void set_dst(int i, VMRegPair dst) { _dst_index = i, _dst = dst; } | |
| 1598 int dst_index() const { return _dst_index; } | |
| 1599 int dst_id() const { return get_id(dst()); } | |
| 1600 MoveOperation* next() const { return _next; } | |
| 1601 MoveOperation* prev() const { return _prev; } | |
| 1602 void set_processed() { _processed = true; } | |
| 1603 bool is_processed() const { return _processed; } | |
| 1604 | |
| 1605 // insert | |
| 1606 void break_cycle(VMRegPair temp_register) { | |
| 1607 // create a new store following the last store | |
| 1608 // to move from the temp_register to the original | |
| 1609 MoveOperation* new_store = new MoveOperation(-1, temp_register, dst_index(), dst()); | |
| 1610 | |
| 1611 // break the cycle of links and insert new_store at the end | |
| 1612 // break the reverse link. | |
| 1613 MoveOperation* p = prev(); | |
| 1614 assert(p->next() == this, "must be"); | |
| 1615 _prev = NULL; | |
| 1616 p->_next = new_store; | |
| 1617 new_store->_prev = p; | |
| 1618 | |
| 1619 // change the original store to save it's value in the temp. | |
| 1620 set_dst(-1, temp_register); | |
| 1621 } | |
| 1622 | |
| 1623 void link(GrowableArray<MoveOperation*>& killer) { | |
| 1624 // link this store in front the store that it depends on | |
| 1625 MoveOperation* n = killer.at_grow(src_id(), NULL); | |
| 1626 if (n != NULL) { | |
| 1627 assert(_next == NULL && n->_prev == NULL, "shouldn't have been set yet"); | |
| 1628 _next = n; | |
| 1629 n->_prev = this; | |
| 1630 } | |
| 1631 } | |
| 1632 }; | |
| 1633 | |
| 1634 private: | |
| 1635 GrowableArray<MoveOperation*> edges; | |
| 1636 | |
| 1637 public: | |
| 1638 ComputeMoveOrder(int total_in_args, VMRegPair* in_regs, int total_c_args, VMRegPair* out_regs, | |
| 1639 BasicType* in_sig_bt, GrowableArray<int>& arg_order, VMRegPair tmp_vmreg) { | |
| 1640 // Move operations where the dest is the stack can all be | |
| 1641 // scheduled first since they can't interfere with the other moves. | |
| 1642 for (int i = total_in_args - 1, c_arg = total_c_args - 1; i >= 0; i--, c_arg--) { | |
| 1643 if (in_sig_bt[i] == T_ARRAY) { | |
| 1644 c_arg--; | |
| 1645 if (out_regs[c_arg].first()->is_stack() && | |
| 1646 out_regs[c_arg + 1].first()->is_stack()) { | |
| 1647 arg_order.push(i); | |
| 1648 arg_order.push(c_arg); | |
| 1649 } else { | |
| 1650 if (out_regs[c_arg].first()->is_stack() || | |
| 1651 in_regs[i].first() == out_regs[c_arg].first()) { | |
| 1652 add_edge(i, in_regs[i].first(), c_arg, out_regs[c_arg + 1]); | |
| 1653 } else { | |
| 1654 add_edge(i, in_regs[i].first(), c_arg, out_regs[c_arg]); | |
| 1655 } | |
| 1656 } | |
| 1657 } else if (in_sig_bt[i] == T_VOID) { | |
| 1658 arg_order.push(i); | |
| 1659 arg_order.push(c_arg); | |
| 1660 } else { | |
| 1661 if (out_regs[c_arg].first()->is_stack() || | |
| 1662 in_regs[i].first() == out_regs[c_arg].first()) { | |
| 1663 arg_order.push(i); | |
| 1664 arg_order.push(c_arg); | |
| 1665 } else { | |
| 1666 add_edge(i, in_regs[i].first(), c_arg, out_regs[c_arg]); | |
| 1667 } | |
| 1668 } | |
| 1669 } | |
| 1670 // Break any cycles in the register moves and emit the in the | |
| 1671 // proper order. | |
| 1672 GrowableArray<MoveOperation*>* stores = get_store_order(tmp_vmreg); | |
| 1673 for (int i = 0; i < stores->length(); i++) { | |
| 1674 arg_order.push(stores->at(i)->src_index()); | |
| 1675 arg_order.push(stores->at(i)->dst_index()); | |
| 1676 } | |
| 1677 } | |
| 1678 | |
| 1679 // Collected all the move operations | |
| 1680 void add_edge(int src_index, VMRegPair src, int dst_index, VMRegPair dst) { | |
| 1681 if (src.first() == dst.first()) return; | |
| 1682 edges.append(new MoveOperation(src_index, src, dst_index, dst)); | |
| 1683 } | |
| 1684 | |
| 1685 // Walk the edges breaking cycles between moves. The result list | |
| 1686 // can be walked in order to produce the proper set of loads | |
| 1687 GrowableArray<MoveOperation*>* get_store_order(VMRegPair temp_register) { | |
| 1688 // Record which moves kill which values | |
| 1689 GrowableArray<MoveOperation*> killer; | |
| 1690 for (int i = 0; i < edges.length(); i++) { | |
| 1691 MoveOperation* s = edges.at(i); | |
| 1692 assert(killer.at_grow(s->dst_id(), NULL) == NULL, "only one killer"); | |
| 1693 killer.at_put_grow(s->dst_id(), s, NULL); | |
| 1694 } | |
| 1695 assert(killer.at_grow(MoveOperation::get_id(temp_register), NULL) == NULL, | |
| 1696 "make sure temp isn't in the registers that are killed"); | |
| 1697 | |
| 1698 // create links between loads and stores | |
| 1699 for (int i = 0; i < edges.length(); i++) { | |
| 1700 edges.at(i)->link(killer); | |
| 1701 } | |
| 1702 | |
| 1703 // at this point, all the move operations are chained together | |
| 1704 // in a doubly linked list. Processing it backwards finds | |
| 1705 // the beginning of the chain, forwards finds the end. If there's | |
| 1706 // a cycle it can be broken at any point, so pick an edge and walk | |
| 1707 // backward until the list ends or we end where we started. | |
| 1708 GrowableArray<MoveOperation*>* stores = new GrowableArray<MoveOperation*>(); | |
| 1709 for (int e = 0; e < edges.length(); e++) { | |
| 1710 MoveOperation* s = edges.at(e); | |
| 1711 if (!s->is_processed()) { | |
| 1712 MoveOperation* start = s; | |
| 1713 // search for the beginning of the chain or cycle | |
| 1714 while (start->prev() != NULL && start->prev() != s) { | |
| 1715 start = start->prev(); | |
| 1716 } | |
| 1717 if (start->prev() == s) { | |
| 1718 start->break_cycle(temp_register); | |
| 1719 } | |
| 1720 // walk the chain forward inserting to store list | |
| 1721 while (start != NULL) { | |
| 1722 stores->append(start); | |
| 1723 start->set_processed(); | |
| 1724 start = start->next(); | |
| 1725 } | |
| 1726 } | |
| 1727 } | |
| 1728 return stores; | |
| 1729 } | |
| 1730 }; | |
| 1731 | |
|
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1732 static void verify_oop_args(MacroAssembler* masm, |
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1733 methodHandle method, |
|
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1734 const BasicType* sig_bt, |
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1735 const VMRegPair* regs) { |
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1736 Register temp_reg = rbx; // not part of any compiled calling seq |
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1737 if (VerifyOops) { |
|
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1738 for (int i = 0; i < method->size_of_parameters(); i++) { |
|
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1739 if (sig_bt[i] == T_OBJECT || |
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1740 sig_bt[i] == T_ARRAY) { |
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1741 VMReg r = regs[i].first(); |
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1742 assert(r->is_valid(), "bad oop arg"); |
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1743 if (r->is_stack()) { |
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1744 __ movptr(temp_reg, Address(rsp, r->reg2stack() * VMRegImpl::stack_slot_size + wordSize)); |
|
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1745 __ verify_oop(temp_reg); |
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1746 } else { |
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1747 __ verify_oop(r->as_Register()); |
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1748 } |
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1749 } |
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1750 } |
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1751 } |
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1752 } |
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1753 |
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1754 static void gen_special_dispatch(MacroAssembler* masm, |
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1755 methodHandle method, |
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1756 const BasicType* sig_bt, |
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1757 const VMRegPair* regs) { |
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1758 verify_oop_args(masm, method, sig_bt, regs); |
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1759 vmIntrinsics::ID iid = method->intrinsic_id(); |
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1760 |
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1761 // Now write the args into the outgoing interpreter space |
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1762 bool has_receiver = false; |
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1763 Register receiver_reg = noreg; |
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1764 int member_arg_pos = -1; |
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1765 Register member_reg = noreg; |
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1766 int ref_kind = MethodHandles::signature_polymorphic_intrinsic_ref_kind(iid); |
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1767 if (ref_kind != 0) { |
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1768 member_arg_pos = method->size_of_parameters() - 1; // trailing MemberName argument |
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1769 member_reg = rbx; // known to be free at this point |
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1770 has_receiver = MethodHandles::ref_kind_has_receiver(ref_kind); |
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1771 } else if (iid == vmIntrinsics::_invokeBasic) { |
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1772 has_receiver = true; |
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1773 } else { |
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1774 fatal(err_msg_res("unexpected intrinsic id %d", iid)); |
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1775 } |
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1776 |
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1777 if (member_reg != noreg) { |
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1778 // Load the member_arg into register, if necessary. |
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1779 SharedRuntime::check_member_name_argument_is_last_argument(method, sig_bt, regs); |
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1780 VMReg r = regs[member_arg_pos].first(); |
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1781 if (r->is_stack()) { |
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1782 __ movptr(member_reg, Address(rsp, r->reg2stack() * VMRegImpl::stack_slot_size + wordSize)); |
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1783 } else { |
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1784 // no data motion is needed |
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1785 member_reg = r->as_Register(); |
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1786 } |
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1787 } |
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1788 |
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1789 if (has_receiver) { |
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1790 // Make sure the receiver is loaded into a register. |
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1791 assert(method->size_of_parameters() > 0, "oob"); |
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1792 assert(sig_bt[0] == T_OBJECT, "receiver argument must be an object"); |
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1793 VMReg r = regs[0].first(); |
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1794 assert(r->is_valid(), "bad receiver arg"); |
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1795 if (r->is_stack()) { |
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1796 // Porting note: This assumes that compiled calling conventions always |
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1797 // pass the receiver oop in a register. If this is not true on some |
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1798 // platform, pick a temp and load the receiver from stack. |
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1799 fatal("receiver always in a register"); |
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1800 receiver_reg = j_rarg0; // known to be free at this point |
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1801 __ movptr(receiver_reg, Address(rsp, r->reg2stack() * VMRegImpl::stack_slot_size + wordSize)); |
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1802 } else { |
|
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1803 // no data motion is needed |
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1804 receiver_reg = r->as_Register(); |
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1805 } |
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1806 } |
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1807 |
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1808 // Figure out which address we are really jumping to: |
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1809 MethodHandles::generate_method_handle_dispatch(masm, iid, |
|
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1810 receiver_reg, member_reg, /*for_compiler_entry:*/ true); |
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1811 } |
| 5905 | 1812 |
| 0 | 1813 // --------------------------------------------------------------------------- |
| 1814 // Generate a native wrapper for a given method. The method takes arguments | |
| 1815 // in the Java compiled code convention, marshals them to the native | |
| 1816 // convention (handlizes oops, etc), transitions to native, makes the call, | |
| 1817 // returns to java state (possibly blocking), unhandlizes any result and | |
| 1818 // returns. | |
|
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1819 // |
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1820 // Critical native functions are a shorthand for the use of |
|
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1821 // GetPrimtiveArrayCritical and disallow the use of any other JNI |
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1822 // functions. The wrapper is expected to unpack the arguments before |
|
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1823 // passing them to the callee and perform checks before and after the |
|
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1824 // native call to ensure that they GC_locker |
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1825 // lock_critical/unlock_critical semantics are followed. Some other |
|
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1826 // parts of JNI setup are skipped like the tear down of the JNI handle |
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1827 // block and the check for pending exceptions it's impossible for them |
|
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1828 // to be thrown. |
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1829 // |
|
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1830 // They are roughly structured like this: |
|
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1831 // if (GC_locker::needs_gc()) |
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1832 // SharedRuntime::block_for_jni_critical(); |
|
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1833 // tranistion to thread_in_native |
|
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1834 // unpack arrray arguments and call native entry point |
|
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1835 // check for safepoint in progress |
|
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1836 // check if any thread suspend flags are set |
|
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1837 // call into JVM and possible unlock the JNI critical |
|
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1838 // if a GC was suppressed while in the critical native. |
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1839 // transition back to thread_in_Java |
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1840 // return to caller |
|
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1841 // |
|
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1842 nmethod* SharedRuntime::generate_native_wrapper(MacroAssembler* masm, |
| 0 | 1843 methodHandle method, |
|
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1844 int compile_id, |
|
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1845 BasicType* in_sig_bt, |
|
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1846 VMRegPair* in_regs, |
| 0 | 1847 BasicType ret_type) { |
|
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1848 if (method->is_method_handle_intrinsic()) { |
|
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1849 vmIntrinsics::ID iid = method->intrinsic_id(); |
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1850 intptr_t start = (intptr_t)__ pc(); |
|
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1851 int vep_offset = ((intptr_t)__ pc()) - start; |
|
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1852 gen_special_dispatch(masm, |
|
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1853 method, |
|
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1854 in_sig_bt, |
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1855 in_regs); |
|
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1856 int frame_complete = ((intptr_t)__ pc()) - start; // not complete, period |
|
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1857 __ flush(); |
|
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1858 int stack_slots = SharedRuntime::out_preserve_stack_slots(); // no out slots at all, actually |
|
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1859 return nmethod::new_native_nmethod(method, |
|
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1860 compile_id, |
|
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|
1861 masm->code(), |
|
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1862 vep_offset, |
|
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1863 frame_complete, |
|
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1864 stack_slots / VMRegImpl::slots_per_word, |
|
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1865 in_ByteSize(-1), |
|
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1866 in_ByteSize(-1), |
|
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1867 (OopMapSet*)NULL); |
|
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1868 } |
|
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1869 bool is_critical_native = true; |
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1870 address native_func = method->critical_native_function(); |
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1871 if (native_func == NULL) { |
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1872 native_func = method->native_function(); |
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1873 is_critical_native = false; |
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1874 } |
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1875 assert(native_func != NULL, "must have function"); |
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1876 |
| 0 | 1877 // An OopMap for lock (and class if static) |
| 1878 OopMapSet *oop_maps = new OopMapSet(); | |
| 1879 intptr_t start = (intptr_t)__ pc(); | |
| 1880 | |
| 1881 // We have received a description of where all the java arg are located | |
| 1882 // on entry to the wrapper. We need to convert these args to where | |
| 1883 // the jni function will expect them. To figure out where they go | |
| 1884 // we convert the java signature to a C signature by inserting | |
| 1885 // the hidden arguments as arg[0] and possibly arg[1] (static method) | |
| 1886 | |
|
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1887 const int total_in_args = method->size_of_parameters(); |
|
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1888 int total_c_args = total_in_args; |
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1889 if (!is_critical_native) { |
|
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1890 total_c_args += 1; |
|
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1891 if (method->is_static()) { |
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1892 total_c_args++; |
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1893 } |
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1894 } else { |
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1895 for (int i = 0; i < total_in_args; i++) { |
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1896 if (in_sig_bt[i] == T_ARRAY) { |
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1897 total_c_args++; |
|
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1898 } |
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1899 } |
| 0 | 1900 } |
| 1901 | |
| 1902 BasicType* out_sig_bt = NEW_RESOURCE_ARRAY(BasicType, total_c_args); | |
|
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1903 VMRegPair* out_regs = NEW_RESOURCE_ARRAY(VMRegPair, total_c_args); |
|
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1904 BasicType* in_elem_bt = NULL; |
| 0 | 1905 |
| 1906 int argc = 0; | |
|
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1907 if (!is_critical_native) { |
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1908 out_sig_bt[argc++] = T_ADDRESS; |
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1909 if (method->is_static()) { |
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1910 out_sig_bt[argc++] = T_OBJECT; |
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1911 } |
|
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1912 |
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1913 for (int i = 0; i < total_in_args ; i++ ) { |
|
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1914 out_sig_bt[argc++] = in_sig_bt[i]; |
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1915 } |
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1916 } else { |
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1917 Thread* THREAD = Thread::current(); |
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1918 in_elem_bt = NEW_RESOURCE_ARRAY(BasicType, total_in_args); |
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1919 SignatureStream ss(method->signature()); |
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1920 for (int i = 0; i < total_in_args ; i++ ) { |
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1921 if (in_sig_bt[i] == T_ARRAY) { |
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1922 // Arrays are passed as int, elem* pair |
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1923 out_sig_bt[argc++] = T_INT; |
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1924 out_sig_bt[argc++] = T_ADDRESS; |
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1925 Symbol* atype = ss.as_symbol(CHECK_NULL); |
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1926 const char* at = atype->as_C_string(); |
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1927 if (strlen(at) == 2) { |
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1928 assert(at[0] == '[', "must be"); |
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1929 switch (at[1]) { |
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1930 case 'B': in_elem_bt[i] = T_BYTE; break; |
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1931 case 'C': in_elem_bt[i] = T_CHAR; break; |
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1932 case 'D': in_elem_bt[i] = T_DOUBLE; break; |
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1933 case 'F': in_elem_bt[i] = T_FLOAT; break; |
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1934 case 'I': in_elem_bt[i] = T_INT; break; |
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1935 case 'J': in_elem_bt[i] = T_LONG; break; |
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1936 case 'S': in_elem_bt[i] = T_SHORT; break; |
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1937 case 'Z': in_elem_bt[i] = T_BOOLEAN; break; |
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1938 default: ShouldNotReachHere(); |
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1939 } |
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1940 } |
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1941 } else { |
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1942 out_sig_bt[argc++] = in_sig_bt[i]; |
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1943 in_elem_bt[i] = T_VOID; |
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1944 } |
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1945 if (in_sig_bt[i] != T_VOID) { |
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1946 assert(in_sig_bt[i] == ss.type(), "must match"); |
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1947 ss.next(); |
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1948 } |
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1949 } |
| 0 | 1950 } |
| 1951 | |
| 1952 // Now figure out where the args must be stored and how much stack space | |
| 1953 // they require. | |
| 1954 int out_arg_slots; | |
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1955 out_arg_slots = c_calling_convention(out_sig_bt, out_regs, NULL, total_c_args); |
| 0 | 1956 |
| 1957 // Compute framesize for the wrapper. We need to handlize all oops in | |
| 1958 // incoming registers | |
| 1959 | |
| 1960 // Calculate the total number of stack slots we will need. | |
| 1961 | |
| 1962 // First count the abi requirement plus all of the outgoing args | |
| 1963 int stack_slots = SharedRuntime::out_preserve_stack_slots() + out_arg_slots; | |
| 1964 | |
| 1965 // Now the space for the inbound oop handle area | |
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1966 int total_save_slots = 6 * VMRegImpl::slots_per_word; // 6 arguments passed in registers |
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1967 if (is_critical_native) { |
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1968 // Critical natives may have to call out so they need a save area |
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1969 // for register arguments. |
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1970 int double_slots = 0; |
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1971 int single_slots = 0; |
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1972 for ( int i = 0; i < total_in_args; i++) { |
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1973 if (in_regs[i].first()->is_Register()) { |
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1974 const Register reg = in_regs[i].first()->as_Register(); |
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1975 switch (in_sig_bt[i]) { |
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1976 case T_BOOLEAN: |
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1977 case T_BYTE: |
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1978 case T_SHORT: |
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1979 case T_CHAR: |
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1980 case T_INT: single_slots++; break; |
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1981 case T_ARRAY: // specific to LP64 (7145024) |
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1982 case T_LONG: double_slots++; break; |
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1983 default: ShouldNotReachHere(); |
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1984 } |
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1985 } else if (in_regs[i].first()->is_XMMRegister()) { |
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1986 switch (in_sig_bt[i]) { |
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1987 case T_FLOAT: single_slots++; break; |
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1988 case T_DOUBLE: double_slots++; break; |
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1989 default: ShouldNotReachHere(); |
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1990 } |
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1991 } else if (in_regs[i].first()->is_FloatRegister()) { |
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1992 ShouldNotReachHere(); |
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1993 } |
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1994 } |
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1995 total_save_slots = double_slots * 2 + single_slots; |
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1996 // align the save area |
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1997 if (double_slots != 0) { |
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1998 stack_slots = round_to(stack_slots, 2); |
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1999 } |
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2000 } |
| 0 | 2001 |
| 2002 int oop_handle_offset = stack_slots; | |
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2003 stack_slots += total_save_slots; |
| 0 | 2004 |
| 2005 // Now any space we need for handlizing a klass if static method | |
| 2006 | |
| 2007 int klass_slot_offset = 0; | |
| 2008 int klass_offset = -1; | |
| 2009 int lock_slot_offset = 0; | |
| 2010 bool is_static = false; | |
| 2011 | |
| 2012 if (method->is_static()) { | |
| 2013 klass_slot_offset = stack_slots; | |
| 2014 stack_slots += VMRegImpl::slots_per_word; | |
| 2015 klass_offset = klass_slot_offset * VMRegImpl::stack_slot_size; | |
| 2016 is_static = true; | |
| 2017 } | |
| 2018 | |
| 2019 // Plus a lock if needed | |
| 2020 | |
| 2021 if (method->is_synchronized()) { | |
| 2022 lock_slot_offset = stack_slots; | |
| 2023 stack_slots += VMRegImpl::slots_per_word; | |
| 2024 } | |
| 2025 | |
| 2026 // Now a place (+2) to save return values or temp during shuffling | |
| 2027 // + 4 for return address (which we own) and saved rbp | |
| 2028 stack_slots += 6; | |
| 2029 | |
| 2030 // Ok The space we have allocated will look like: | |
| 2031 // | |
| 2032 // | |
| 2033 // FP-> | | | |
| 2034 // |---------------------| | |
| 2035 // | 2 slots for moves | | |
| 2036 // |---------------------| | |
| 2037 // | lock box (if sync) | | |
| 2038 // |---------------------| <- lock_slot_offset | |
| 2039 // | klass (if static) | | |
| 2040 // |---------------------| <- klass_slot_offset | |
| 2041 // | oopHandle area | | |
| 2042 // |---------------------| <- oop_handle_offset (6 java arg registers) | |
| 2043 // | outbound memory | | |
| 2044 // | based arguments | | |
| 2045 // | | | |
| 2046 // |---------------------| | |
| 2047 // | | | |
| 2048 // SP-> | out_preserved_slots | | |
| 2049 // | |
| 2050 // | |
| 2051 | |
| 2052 | |
| 2053 // Now compute actual number of stack words we need rounding to make | |
| 2054 // stack properly aligned. | |
|
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2055 stack_slots = round_to(stack_slots, StackAlignmentInSlots); |
| 0 | 2056 |
| 2057 int stack_size = stack_slots * VMRegImpl::stack_slot_size; | |
| 2058 | |
| 2059 // First thing make an ic check to see if we should even be here | |
| 2060 | |
| 2061 // We are free to use all registers as temps without saving them and | |
| 2062 // restoring them except rbp. rbp is the only callee save register | |
| 2063 // as far as the interpreter and the compiler(s) are concerned. | |
| 2064 | |
| 2065 | |
| 2066 const Register ic_reg = rax; | |
| 2067 const Register receiver = j_rarg0; | |
| 2068 | |
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2069 Label hit; |
| 0 | 2070 Label exception_pending; |
| 2071 | |
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2072 assert_different_registers(ic_reg, receiver, rscratch1); |
| 0 | 2073 __ verify_oop(receiver); |
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2074 __ load_klass(rscratch1, receiver); |
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2075 __ cmpq(ic_reg, rscratch1); |
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2076 __ jcc(Assembler::equal, hit); |
| 0 | 2077 |
| 2078 __ jump(RuntimeAddress(SharedRuntime::get_ic_miss_stub())); | |
| 2079 | |
| 2080 // Verified entry point must be aligned | |
| 2081 __ align(8); | |
| 2082 | |
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2083 __ bind(hit); |
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2084 |
| 0 | 2085 int vep_offset = ((intptr_t)__ pc()) - start; |
| 2086 | |
| 2087 // The instruction at the verified entry point must be 5 bytes or longer | |
| 2088 // because it can be patched on the fly by make_non_entrant. The stack bang | |
| 2089 // instruction fits that requirement. | |
| 2090 | |
| 2091 // Generate stack overflow check | |
| 2092 | |
| 2093 if (UseStackBanging) { | |
| 2094 __ bang_stack_with_offset(StackShadowPages*os::vm_page_size()); | |
| 2095 } else { | |
| 2096 // need a 5 byte instruction to allow MT safe patching to non-entrant | |
| 2097 __ fat_nop(); | |
| 2098 } | |
| 2099 | |
| 2100 // Generate a new frame for the wrapper. | |
| 2101 __ enter(); | |
| 2102 // -2 because return address is already present and so is saved rbp | |
| 304 | 2103 __ subptr(rsp, stack_size - 2*wordSize); |
| 0 | 2104 |
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2105 // Frame is now completed as far as size and linkage. |
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2106 int frame_complete = ((intptr_t)__ pc()) - start; |
| 0 | 2107 |
| 17780 | 2108 if (UseRTMLocking) { |
| 2109 // Abort RTM transaction before calling JNI | |
| 2110 // because critical section will be large and will be | |
| 2111 // aborted anyway. Also nmethod could be deoptimized. | |
| 2112 __ xabort(0); | |
| 2113 } | |
| 2114 | |
| 0 | 2115 #ifdef ASSERT |
| 2116 { | |
| 2117 Label L; | |
| 304 | 2118 __ mov(rax, rsp); |
| 605 | 2119 __ andptr(rax, -16); // must be 16 byte boundary (see amd64 ABI) |
| 304 | 2120 __ cmpptr(rax, rsp); |
| 0 | 2121 __ jcc(Assembler::equal, L); |
| 2122 __ stop("improperly aligned stack"); | |
| 2123 __ bind(L); | |
| 2124 } | |
| 2125 #endif /* ASSERT */ | |
| 2126 | |
| 2127 | |
| 2128 // We use r14 as the oop handle for the receiver/klass | |
| 2129 // It is callee save so it survives the call to native | |
| 2130 | |
| 2131 const Register oop_handle_reg = r14; | |
| 2132 | |
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2133 if (is_critical_native) { |
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2134 check_needs_gc_for_critical_native(masm, stack_slots, total_c_args, total_in_args, |
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2135 oop_handle_offset, oop_maps, in_regs, in_sig_bt); |
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2136 } |
| 0 | 2137 |
| 2138 // | |
| 2139 // We immediately shuffle the arguments so that any vm call we have to | |
| 2140 // make from here on out (sync slow path, jvmti, etc.) we will have | |
| 2141 // captured the oops from our caller and have a valid oopMap for | |
| 2142 // them. | |
| 2143 | |
| 2144 // ----------------- | |
| 2145 // The Grand Shuffle | |
| 2146 | |
| 2147 // The Java calling convention is either equal (linux) or denser (win64) than the | |
| 2148 // c calling convention. However the because of the jni_env argument the c calling | |
| 2149 // convention always has at least one more (and two for static) arguments than Java. | |
| 2150 // Therefore if we move the args from java -> c backwards then we will never have | |
| 2151 // a register->register conflict and we don't have to build a dependency graph | |
| 2152 // and figure out how to break any cycles. | |
| 2153 // | |
| 2154 | |
| 2155 // Record esp-based slot for receiver on stack for non-static methods | |
| 2156 int receiver_offset = -1; | |
| 2157 | |
| 2158 // This is a trick. We double the stack slots so we can claim | |
| 2159 // the oops in the caller's frame. Since we are sure to have | |
| 2160 // more args than the caller doubling is enough to make | |
| 2161 // sure we can capture all the incoming oop args from the | |
| 2162 // caller. | |
| 2163 // | |
| 2164 OopMap* map = new OopMap(stack_slots * 2, 0 /* arg_slots*/); | |
| 2165 | |
| 2166 // Mark location of rbp (someday) | |
| 2167 // map->set_callee_saved(VMRegImpl::stack2reg( stack_slots - 2), stack_slots * 2, 0, vmreg(rbp)); | |
| 2168 | |
| 2169 // Use eax, ebx as temporaries during any memory-memory moves we have to do | |
| 2170 // All inbound args are referenced based on rbp and all outbound args via rsp. | |
| 2171 | |
| 2172 | |
| 2173 #ifdef ASSERT | |
| 2174 bool reg_destroyed[RegisterImpl::number_of_registers]; | |
| 2175 bool freg_destroyed[XMMRegisterImpl::number_of_registers]; | |
| 2176 for ( int r = 0 ; r < RegisterImpl::number_of_registers ; r++ ) { | |
| 2177 reg_destroyed[r] = false; | |
| 2178 } | |
| 2179 for ( int f = 0 ; f < XMMRegisterImpl::number_of_registers ; f++ ) { | |
| 2180 freg_destroyed[f] = false; | |
| 2181 } | |
| 2182 | |
| 2183 #endif /* ASSERT */ | |
| 2184 | |
|
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2185 // This may iterate in two different directions depending on the |
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2186 // kind of native it is. The reason is that for regular JNI natives |
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2187 // the incoming and outgoing registers are offset upwards and for |
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2188 // critical natives they are offset down. |
| 5905 | 2189 GrowableArray<int> arg_order(2 * total_in_args); |
| 2190 VMRegPair tmp_vmreg; | |
| 2191 tmp_vmreg.set1(rbx->as_VMReg()); | |
| 2192 | |
| 2193 if (!is_critical_native) { | |
| 2194 for (int i = total_in_args - 1, c_arg = total_c_args - 1; i >= 0; i--, c_arg--) { | |
| 2195 arg_order.push(i); | |
| 2196 arg_order.push(c_arg); | |
| 2197 } | |
| 2198 } else { | |
| 2199 // Compute a valid move order, using tmp_vmreg to break any cycles | |
| 2200 ComputeMoveOrder cmo(total_in_args, in_regs, total_c_args, out_regs, in_sig_bt, arg_order, tmp_vmreg); | |
|
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2201 } |
| 5905 | 2202 |
| 2203 int temploc = -1; | |
| 2204 for (int ai = 0; ai < arg_order.length(); ai += 2) { | |
| 2205 int i = arg_order.at(ai); | |
| 2206 int c_arg = arg_order.at(ai + 1); | |
| 2207 __ block_comment(err_msg("move %d -> %d", i, c_arg)); | |
| 2208 if (c_arg == -1) { | |
| 2209 assert(is_critical_native, "should only be required for critical natives"); | |
| 2210 // This arg needs to be moved to a temporary | |
| 2211 __ mov(tmp_vmreg.first()->as_Register(), in_regs[i].first()->as_Register()); | |
| 2212 in_regs[i] = tmp_vmreg; | |
| 2213 temploc = i; | |
| 2214 continue; | |
| 2215 } else if (i == -1) { | |
| 2216 assert(is_critical_native, "should only be required for critical natives"); | |
| 2217 // Read from the temporary location | |
| 2218 assert(temploc != -1, "must be valid"); | |
| 2219 i = temploc; | |
| 2220 temploc = -1; | |
| 2221 } | |
| 0 | 2222 #ifdef ASSERT |
| 2223 if (in_regs[i].first()->is_Register()) { | |
| 2224 assert(!reg_destroyed[in_regs[i].first()->as_Register()->encoding()], "destroyed reg!"); | |
| 2225 } else if (in_regs[i].first()->is_XMMRegister()) { | |
| 2226 assert(!freg_destroyed[in_regs[i].first()->as_XMMRegister()->encoding()], "destroyed reg!"); | |
| 2227 } | |
| 2228 if (out_regs[c_arg].first()->is_Register()) { | |
| 2229 reg_destroyed[out_regs[c_arg].first()->as_Register()->encoding()] = true; | |
| 2230 } else if (out_regs[c_arg].first()->is_XMMRegister()) { | |
| 2231 freg_destroyed[out_regs[c_arg].first()->as_XMMRegister()->encoding()] = true; | |
| 2232 } | |
| 2233 #endif /* ASSERT */ | |
| 2234 switch (in_sig_bt[i]) { | |
| 2235 case T_ARRAY: | |
|
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2236 if (is_critical_native) { |
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2237 unpack_array_argument(masm, in_regs[i], in_elem_bt[i], out_regs[c_arg + 1], out_regs[c_arg]); |
|
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2238 c_arg++; |
|
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2239 #ifdef ASSERT |
|
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2240 if (out_regs[c_arg].first()->is_Register()) { |
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2241 reg_destroyed[out_regs[c_arg].first()->as_Register()->encoding()] = true; |
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2242 } else if (out_regs[c_arg].first()->is_XMMRegister()) { |
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2243 freg_destroyed[out_regs[c_arg].first()->as_XMMRegister()->encoding()] = true; |
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2244 } |
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|
2245 #endif |
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2246 break; |
|
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2247 } |
| 0 | 2248 case T_OBJECT: |
|
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2249 assert(!is_critical_native, "no oop arguments"); |
| 0 | 2250 object_move(masm, map, oop_handle_offset, stack_slots, in_regs[i], out_regs[c_arg], |
| 2251 ((i == 0) && (!is_static)), | |
| 2252 &receiver_offset); | |
| 2253 break; | |
| 2254 case T_VOID: | |
| 2255 break; | |
| 2256 | |
| 2257 case T_FLOAT: | |
| 2258 float_move(masm, in_regs[i], out_regs[c_arg]); | |
| 2259 break; | |
| 2260 | |
| 2261 case T_DOUBLE: | |
| 2262 assert( i + 1 < total_in_args && | |
| 2263 in_sig_bt[i + 1] == T_VOID && | |
| 2264 out_sig_bt[c_arg+1] == T_VOID, "bad arg list"); | |
| 2265 double_move(masm, in_regs[i], out_regs[c_arg]); | |
| 2266 break; | |
| 2267 | |
| 2268 case T_LONG : | |
| 2269 long_move(masm, in_regs[i], out_regs[c_arg]); | |
| 2270 break; | |
| 2271 | |
| 2272 case T_ADDRESS: assert(false, "found T_ADDRESS in java args"); | |
| 2273 | |
| 2274 default: | |
| 2275 move32_64(masm, in_regs[i], out_regs[c_arg]); | |
| 2276 } | |
| 2277 } | |
| 2278 | |
|
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2279 int c_arg; |
| 0 | 2280 |
| 2281 // Pre-load a static method's oop into r14. Used both by locking code and | |
| 2282 // the normal JNI call code. | |
|
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2283 if (!is_critical_native) { |
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2284 // point c_arg at the first arg that is already loaded in case we |
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2285 // need to spill before we call out |
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2286 c_arg = total_c_args - total_in_args; |
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2287 |
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2288 if (method->is_static()) { |
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2289 |
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2290 // load oop into a register |
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2291 __ movoop(oop_handle_reg, JNIHandles::make_local(method->method_holder()->java_mirror())); |
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2292 |
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2293 // Now handlize the static class mirror it's known not-null. |
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2294 __ movptr(Address(rsp, klass_offset), oop_handle_reg); |
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2295 map->set_oop(VMRegImpl::stack2reg(klass_slot_offset)); |
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2296 |
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2297 // Now get the handle |
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2298 __ lea(oop_handle_reg, Address(rsp, klass_offset)); |
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2299 // store the klass handle as second argument |
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2300 __ movptr(c_rarg1, oop_handle_reg); |
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2301 // and protect the arg if we must spill |
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2302 c_arg--; |
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2303 } |
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2304 } else { |
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2305 // For JNI critical methods we need to save all registers in save_args. |
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2306 c_arg = 0; |
| 0 | 2307 } |
| 2308 | |
| 2309 // Change state to native (we save the return address in the thread, since it might not | |
| 2310 // be pushed on the stack when we do a a stack traversal). It is enough that the pc() | |
| 2311 // points into the right code segment. It does not have to be the correct return pc. | |
| 2312 // We use the same pc/oopMap repeatedly when we call out | |
| 2313 | |
| 2314 intptr_t the_pc = (intptr_t) __ pc(); | |
| 2315 oop_maps->add_gc_map(the_pc - start, map); | |
| 2316 | |
| 2317 __ set_last_Java_frame(rsp, noreg, (address)the_pc); | |
| 2318 | |
| 2319 | |
| 2320 // We have all of the arguments setup at this point. We must not touch any register | |
| 2321 // argument registers at this point (what if we save/restore them there are no oop? | |
| 2322 | |
| 2323 { | |
| 2324 SkipIfEqual skip(masm, &DTraceMethodProbes, false); | |
| 2325 // protect the args we've loaded | |
| 2326 save_args(masm, total_c_args, c_arg, out_regs); | |
|
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2327 __ mov_metadata(c_rarg1, method()); |
| 0 | 2328 __ call_VM_leaf( |
| 2329 CAST_FROM_FN_PTR(address, SharedRuntime::dtrace_method_entry), | |
| 2330 r15_thread, c_rarg1); | |
| 2331 restore_args(masm, total_c_args, c_arg, out_regs); | |
| 2332 } | |
| 2333 | |
|
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2334 // RedefineClasses() tracing support for obsolete method entry |
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2335 if (RC_TRACE_IN_RANGE(0x00001000, 0x00002000)) { |
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2336 // protect the args we've loaded |
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2337 save_args(masm, total_c_args, c_arg, out_regs); |
|
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2338 __ mov_metadata(c_rarg1, method()); |
|
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2339 __ call_VM_leaf( |
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2340 CAST_FROM_FN_PTR(address, SharedRuntime::rc_trace_method_entry), |
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2341 r15_thread, c_rarg1); |
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2342 restore_args(masm, total_c_args, c_arg, out_regs); |
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2343 } |
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2344 |
| 0 | 2345 // Lock a synchronized method |
| 2346 | |
| 2347 // Register definitions used by locking and unlocking | |
| 2348 | |
| 2349 const Register swap_reg = rax; // Must use rax for cmpxchg instruction | |
| 2350 const Register obj_reg = rbx; // Will contain the oop | |
| 2351 const Register lock_reg = r13; // Address of compiler lock object (BasicLock) | |
| 2352 const Register old_hdr = r13; // value of old header at unlock time | |
| 2353 | |
| 2354 Label slow_path_lock; | |
| 2355 Label lock_done; | |
| 2356 | |
| 2357 if (method->is_synchronized()) { | |
|
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2358 assert(!is_critical_native, "unhandled"); |
| 0 | 2359 |
| 2360 | |
| 2361 const int mark_word_offset = BasicLock::displaced_header_offset_in_bytes(); | |
| 2362 | |
| 2363 // Get the handle (the 2nd argument) | |
| 304 | 2364 __ mov(oop_handle_reg, c_rarg1); |
| 0 | 2365 |
| 2366 // Get address of the box | |
| 2367 | |
| 304 | 2368 __ lea(lock_reg, Address(rsp, lock_slot_offset * VMRegImpl::stack_slot_size)); |
| 0 | 2369 |
| 2370 // Load the oop from the handle | |
| 304 | 2371 __ movptr(obj_reg, Address(oop_handle_reg, 0)); |
| 0 | 2372 |
| 2373 if (UseBiasedLocking) { | |
| 2374 __ biased_locking_enter(lock_reg, obj_reg, swap_reg, rscratch1, false, lock_done, &slow_path_lock); | |
| 2375 } | |
| 2376 | |
| 2377 // Load immediate 1 into swap_reg %rax | |
| 2378 __ movl(swap_reg, 1); | |
| 2379 | |
| 2380 // Load (object->mark() | 1) into swap_reg %rax | |
| 304 | 2381 __ orptr(swap_reg, Address(obj_reg, 0)); |
| 0 | 2382 |
| 2383 // Save (object->mark() | 1) into BasicLock's displaced header | |
| 304 | 2384 __ movptr(Address(lock_reg, mark_word_offset), swap_reg); |
| 0 | 2385 |
| 2386 if (os::is_MP()) { | |
| 2387 __ lock(); | |
| 2388 } | |
| 2389 | |
| 2390 // src -> dest iff dest == rax else rax <- dest | |
| 304 | 2391 __ cmpxchgptr(lock_reg, Address(obj_reg, 0)); |
| 0 | 2392 __ jcc(Assembler::equal, lock_done); |
| 2393 | |
| 2394 // Hmm should this move to the slow path code area??? | |
| 2395 | |
| 2396 // Test if the oopMark is an obvious stack pointer, i.e., | |
| 2397 // 1) (mark & 3) == 0, and | |
| 2398 // 2) rsp <= mark < mark + os::pagesize() | |
| 2399 // These 3 tests can be done by evaluating the following | |
| 2400 // expression: ((mark - rsp) & (3 - os::vm_page_size())), | |
| 2401 // assuming both stack pointer and pagesize have their | |
| 2402 // least significant 2 bits clear. | |
| 2403 // NOTE: the oopMark is in swap_reg %rax as the result of cmpxchg | |
| 2404 | |
| 304 | 2405 __ subptr(swap_reg, rsp); |
| 2406 __ andptr(swap_reg, 3 - os::vm_page_size()); | |
| 0 | 2407 |
| 2408 // Save the test result, for recursive case, the result is zero | |
| 304 | 2409 __ movptr(Address(lock_reg, mark_word_offset), swap_reg); |
| 0 | 2410 __ jcc(Assembler::notEqual, slow_path_lock); |
| 2411 | |
| 2412 // Slow path will re-enter here | |
| 2413 | |
| 2414 __ bind(lock_done); | |
| 2415 } | |
| 2416 | |
| 2417 | |
| 2418 // Finally just about ready to make the JNI call | |
| 2419 | |
| 2420 | |
| 2421 // get JNIEnv* which is first argument to native | |
|
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2422 if (!is_critical_native) { |
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2423 __ lea(c_rarg0, Address(r15_thread, in_bytes(JavaThread::jni_environment_offset()))); |
|
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2424 } |
| 0 | 2425 |
| 2426 // Now set thread in native | |
| 304 | 2427 __ movl(Address(r15_thread, JavaThread::thread_state_offset()), _thread_in_native); |
| 0 | 2428 |
|
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2429 __ call(RuntimeAddress(native_func)); |
| 0 | 2430 |
|
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2431 // Verify or restore cpu control state after JNI call |
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2432 __ restore_cpu_control_state_after_jni(); |
| 0 | 2433 |
| 2434 // Unpack native results. | |
| 2435 switch (ret_type) { | |
| 2436 case T_BOOLEAN: __ c2bool(rax); break; | |
| 2437 case T_CHAR : __ movzwl(rax, rax); break; | |
| 2438 case T_BYTE : __ sign_extend_byte (rax); break; | |
| 2439 case T_SHORT : __ sign_extend_short(rax); break; | |
| 2440 case T_INT : /* nothing to do */ break; | |
| 2441 case T_DOUBLE : | |
| 2442 case T_FLOAT : | |
| 2443 // Result is in xmm0 we'll save as needed | |
| 2444 break; | |
| 2445 case T_ARRAY: // Really a handle | |
| 2446 case T_OBJECT: // Really a handle | |
| 2447 break; // can't de-handlize until after safepoint check | |
| 2448 case T_VOID: break; | |
| 2449 case T_LONG: break; | |
| 2450 default : ShouldNotReachHere(); | |
| 2451 } | |
| 2452 | |
| 2453 // Switch thread to "native transition" state before reading the synchronization state. | |
| 2454 // This additional state is necessary because reading and testing the synchronization | |
| 2455 // state is not atomic w.r.t. GC, as this scenario demonstrates: | |
| 2456 // Java thread A, in _thread_in_native state, loads _not_synchronized and is preempted. | |
| 2457 // VM thread changes sync state to synchronizing and suspends threads for GC. | |
| 2458 // Thread A is resumed to finish this native method, but doesn't block here since it | |
| 2459 // didn't see any synchronization is progress, and escapes. | |
| 304 | 2460 __ movl(Address(r15_thread, JavaThread::thread_state_offset()), _thread_in_native_trans); |
| 0 | 2461 |
| 2462 if(os::is_MP()) { | |
| 2463 if (UseMembar) { | |
| 2464 // Force this write out before the read below | |
| 2465 __ membar(Assembler::Membar_mask_bits( | |
| 2466 Assembler::LoadLoad | Assembler::LoadStore | | |
| 2467 Assembler::StoreLoad | Assembler::StoreStore)); | |
| 2468 } else { | |
| 2469 // Write serialization page so VM thread can do a pseudo remote membar. | |
| 2470 // We use the current thread pointer to calculate a thread specific | |
| 2471 // offset to write to within the page. This minimizes bus traffic | |
| 2472 // due to cache line collision. | |
| 2473 __ serialize_memory(r15_thread, rcx); | |
| 2474 } | |
| 2475 } | |
| 2476 | |
|
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2477 Label after_transition; |
| 0 | 2478 |
| 2479 // check for safepoint operation in progress and/or pending suspend requests | |
| 2480 { | |
| 2481 Label Continue; | |
| 2482 | |
| 2483 __ cmp32(ExternalAddress((address)SafepointSynchronize::address_of_state()), | |
| 2484 SafepointSynchronize::_not_synchronized); | |
| 2485 | |
| 2486 Label L; | |
| 2487 __ jcc(Assembler::notEqual, L); | |
| 2488 __ cmpl(Address(r15_thread, JavaThread::suspend_flags_offset()), 0); | |
| 2489 __ jcc(Assembler::equal, Continue); | |
| 2490 __ bind(L); | |
| 2491 | |
| 2492 // Don't use call_VM as it will see a possible pending exception and forward it | |
| 2493 // and never return here preventing us from clearing _last_native_pc down below. | |
| 2494 // Also can't use call_VM_leaf either as it will check to see if rsi & rdi are | |
| 2495 // preserved and correspond to the bcp/locals pointers. So we do a runtime call | |
| 2496 // by hand. | |
| 2497 // | |
| 2498 save_native_result(masm, ret_type, stack_slots); | |
| 304 | 2499 __ mov(c_rarg0, r15_thread); |
| 2500 __ mov(r12, rsp); // remember sp | |
| 2501 __ subptr(rsp, frame::arg_reg_save_area_bytes); // windows | |
| 2502 __ andptr(rsp, -16); // align stack as required by ABI | |
|
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2503 if (!is_critical_native) { |
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2504 __ call(RuntimeAddress(CAST_FROM_FN_PTR(address, JavaThread::check_special_condition_for_native_trans))); |
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2505 } else { |
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2506 __ call(RuntimeAddress(CAST_FROM_FN_PTR(address, JavaThread::check_special_condition_for_native_trans_and_transition))); |
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2507 } |
| 304 | 2508 __ mov(rsp, r12); // restore sp |
|
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2509 __ reinit_heapbase(); |
| 0 | 2510 // Restore any method result value |
| 2511 restore_native_result(masm, ret_type, stack_slots); | |
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2512 |
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2513 if (is_critical_native) { |
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2514 // The call above performed the transition to thread_in_Java so |
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2515 // skip the transition logic below. |
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2516 __ jmpb(after_transition); |
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2517 } |
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|
2518 |
| 0 | 2519 __ bind(Continue); |
| 2520 } | |
| 2521 | |
| 2522 // change thread state | |
| 2523 __ movl(Address(r15_thread, JavaThread::thread_state_offset()), _thread_in_Java); | |
|
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2524 __ bind(after_transition); |
| 0 | 2525 |
| 2526 Label reguard; | |
| 2527 Label reguard_done; | |
| 2528 __ cmpl(Address(r15_thread, JavaThread::stack_guard_state_offset()), JavaThread::stack_guard_yellow_disabled); | |
| 2529 __ jcc(Assembler::equal, reguard); | |
| 2530 __ bind(reguard_done); | |
| 2531 | |
| 2532 // native result if any is live | |
| 2533 | |
| 2534 // Unlock | |
| 2535 Label unlock_done; | |
| 2536 Label slow_path_unlock; | |
| 2537 if (method->is_synchronized()) { | |
| 2538 | |
| 2539 // Get locked oop from the handle we passed to jni | |
| 304 | 2540 __ movptr(obj_reg, Address(oop_handle_reg, 0)); |
| 0 | 2541 |
| 2542 Label done; | |
| 2543 | |
| 2544 if (UseBiasedLocking) { | |
| 2545 __ biased_locking_exit(obj_reg, old_hdr, done); | |
| 2546 } | |
| 2547 | |
| 2548 // Simple recursive lock? | |
| 2549 | |
| 304 | 2550 __ cmpptr(Address(rsp, lock_slot_offset * VMRegImpl::stack_slot_size), (int32_t)NULL_WORD); |
| 0 | 2551 __ jcc(Assembler::equal, done); |
| 2552 | |
| 2553 // Must save rax if if it is live now because cmpxchg must use it | |
| 2554 if (ret_type != T_FLOAT && ret_type != T_DOUBLE && ret_type != T_VOID) { | |
| 2555 save_native_result(masm, ret_type, stack_slots); | |
| 2556 } | |
| 2557 | |
| 2558 | |
| 2559 // get address of the stack lock | |
| 304 | 2560 __ lea(rax, Address(rsp, lock_slot_offset * VMRegImpl::stack_slot_size)); |
| 0 | 2561 // get old displaced header |
| 304 | 2562 __ movptr(old_hdr, Address(rax, 0)); |
| 0 | 2563 |
| 2564 // Atomic swap old header if oop still contains the stack lock | |
| 2565 if (os::is_MP()) { | |
| 2566 __ lock(); | |
| 2567 } | |
| 304 | 2568 __ cmpxchgptr(old_hdr, Address(obj_reg, 0)); |
| 0 | 2569 __ jcc(Assembler::notEqual, slow_path_unlock); |
| 2570 | |
| 2571 // slow path re-enters here | |
| 2572 __ bind(unlock_done); | |
| 2573 if (ret_type != T_FLOAT && ret_type != T_DOUBLE && ret_type != T_VOID) { | |
| 2574 restore_native_result(masm, ret_type, stack_slots); | |
| 2575 } | |
| 2576 | |
| 2577 __ bind(done); | |
| 2578 | |
| 2579 } | |
| 2580 { | |
| 2581 SkipIfEqual skip(masm, &DTraceMethodProbes, false); | |
| 2582 save_native_result(masm, ret_type, stack_slots); | |
|
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2583 __ mov_metadata(c_rarg1, method()); |
| 0 | 2584 __ call_VM_leaf( |
| 2585 CAST_FROM_FN_PTR(address, SharedRuntime::dtrace_method_exit), | |
| 2586 r15_thread, c_rarg1); | |
| 2587 restore_native_result(masm, ret_type, stack_slots); | |
| 2588 } | |
| 2589 | |
| 2590 __ reset_last_Java_frame(false, true); | |
| 2591 | |
| 2592 // Unpack oop result | |
| 2593 if (ret_type == T_OBJECT || ret_type == T_ARRAY) { | |
| 2594 Label L; | |
| 304 | 2595 __ testptr(rax, rax); |
| 0 | 2596 __ jcc(Assembler::zero, L); |
| 304 | 2597 __ movptr(rax, Address(rax, 0)); |
| 0 | 2598 __ bind(L); |
| 2599 __ verify_oop(rax); | |
| 2600 } | |
| 2601 | |
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2602 if (!is_critical_native) { |
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2603 // reset handle block |
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2604 __ movptr(rcx, Address(r15_thread, JavaThread::active_handles_offset())); |
|
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2605 __ movl(Address(rcx, JNIHandleBlock::top_offset_in_bytes()), (int32_t)NULL_WORD); |
|
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2606 } |
| 0 | 2607 |
| 2608 // pop our frame | |
| 2609 | |
| 2610 __ leave(); | |
| 2611 | |
|
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2612 if (!is_critical_native) { |
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2613 // Any exception pending? |
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2614 __ cmpptr(Address(r15_thread, in_bytes(Thread::pending_exception_offset())), (int32_t)NULL_WORD); |
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2615 __ jcc(Assembler::notEqual, exception_pending); |
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2616 } |
| 0 | 2617 |
| 2618 // Return | |
| 2619 | |
| 2620 __ ret(0); | |
| 2621 | |
| 2622 // Unexpected paths are out of line and go here | |
| 2623 | |
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2624 if (!is_critical_native) { |
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2625 // forward the exception |
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2626 __ bind(exception_pending); |
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2627 |
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2628 // and forward the exception |
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|
2629 __ jump(RuntimeAddress(StubRoutines::forward_exception_entry())); |
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|
2630 } |
| 0 | 2631 |
| 2632 // Slow path locking & unlocking | |
| 2633 if (method->is_synchronized()) { | |
| 2634 | |
| 2635 // BEGIN Slow path lock | |
| 2636 __ bind(slow_path_lock); | |
| 2637 | |
| 2638 // has last_Java_frame setup. No exceptions so do vanilla call not call_VM | |
| 2639 // args are (oop obj, BasicLock* lock, JavaThread* thread) | |
| 2640 | |
| 2641 // protect the args we've loaded | |
| 2642 save_args(masm, total_c_args, c_arg, out_regs); | |
| 2643 | |
| 304 | 2644 __ mov(c_rarg0, obj_reg); |
| 2645 __ mov(c_rarg1, lock_reg); | |
| 2646 __ mov(c_rarg2, r15_thread); | |
| 0 | 2647 |
| 2648 // Not a leaf but we have last_Java_frame setup as we want | |
| 2649 __ call_VM_leaf(CAST_FROM_FN_PTR(address, SharedRuntime::complete_monitor_locking_C), 3); | |
| 2650 restore_args(masm, total_c_args, c_arg, out_regs); | |
| 2651 | |
| 2652 #ifdef ASSERT | |
| 2653 { Label L; | |
| 304 | 2654 __ cmpptr(Address(r15_thread, in_bytes(Thread::pending_exception_offset())), (int32_t)NULL_WORD); |
| 0 | 2655 __ jcc(Assembler::equal, L); |
| 2656 __ stop("no pending exception allowed on exit from monitorenter"); | |
| 2657 __ bind(L); | |
| 2658 } | |
| 2659 #endif | |
| 2660 __ jmp(lock_done); | |
| 2661 | |
| 2662 // END Slow path lock | |
| 2663 | |
| 2664 // BEGIN Slow path unlock | |
| 2665 __ bind(slow_path_unlock); | |
| 2666 | |
| 2667 // If we haven't already saved the native result we must save it now as xmm registers | |
| 2668 // are still exposed. | |
| 2669 | |
| 2670 if (ret_type == T_FLOAT || ret_type == T_DOUBLE ) { | |
| 2671 save_native_result(masm, ret_type, stack_slots); | |
| 2672 } | |
| 2673 | |
| 304 | 2674 __ lea(c_rarg1, Address(rsp, lock_slot_offset * VMRegImpl::stack_slot_size)); |
| 2675 | |
| 2676 __ mov(c_rarg0, obj_reg); | |
| 2677 __ mov(r12, rsp); // remember sp | |
| 2678 __ subptr(rsp, frame::arg_reg_save_area_bytes); // windows | |
| 2679 __ andptr(rsp, -16); // align stack as required by ABI | |
| 0 | 2680 |
| 2681 // Save pending exception around call to VM (which contains an EXCEPTION_MARK) | |
| 2682 // NOTE that obj_reg == rbx currently | |
| 304 | 2683 __ movptr(rbx, Address(r15_thread, in_bytes(Thread::pending_exception_offset()))); |
| 2684 __ movptr(Address(r15_thread, in_bytes(Thread::pending_exception_offset())), (int32_t)NULL_WORD); | |
| 0 | 2685 |
| 2686 __ call(RuntimeAddress(CAST_FROM_FN_PTR(address, SharedRuntime::complete_monitor_unlocking_C))); | |
| 304 | 2687 __ mov(rsp, r12); // restore sp |
|
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2688 __ reinit_heapbase(); |
| 0 | 2689 #ifdef ASSERT |
| 2690 { | |
| 2691 Label L; | |
| 304 | 2692 __ cmpptr(Address(r15_thread, in_bytes(Thread::pending_exception_offset())), (int)NULL_WORD); |
| 0 | 2693 __ jcc(Assembler::equal, L); |
| 2694 __ stop("no pending exception allowed on exit complete_monitor_unlocking_C"); | |
| 2695 __ bind(L); | |
| 2696 } | |
| 2697 #endif /* ASSERT */ | |
| 2698 | |
| 304 | 2699 __ movptr(Address(r15_thread, in_bytes(Thread::pending_exception_offset())), rbx); |
| 0 | 2700 |
| 2701 if (ret_type == T_FLOAT || ret_type == T_DOUBLE ) { | |
| 2702 restore_native_result(masm, ret_type, stack_slots); | |
| 2703 } | |
| 2704 __ jmp(unlock_done); | |
| 2705 | |
| 2706 // END Slow path unlock | |
| 2707 | |
| 2708 } // synchronized | |
| 2709 | |
| 2710 // SLOW PATH Reguard the stack if needed | |
| 2711 | |
| 2712 __ bind(reguard); | |
| 2713 save_native_result(masm, ret_type, stack_slots); | |
| 304 | 2714 __ mov(r12, rsp); // remember sp |
| 2715 __ subptr(rsp, frame::arg_reg_save_area_bytes); // windows | |
| 2716 __ andptr(rsp, -16); // align stack as required by ABI | |
| 0 | 2717 __ call(RuntimeAddress(CAST_FROM_FN_PTR(address, SharedRuntime::reguard_yellow_pages))); |
| 304 | 2718 __ mov(rsp, r12); // restore sp |
|
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2719 __ reinit_heapbase(); |
| 0 | 2720 restore_native_result(masm, ret_type, stack_slots); |
| 2721 // and continue | |
| 2722 __ jmp(reguard_done); | |
| 2723 | |
| 2724 | |
| 2725 | |
| 2726 __ flush(); | |
| 2727 | |
| 2728 nmethod *nm = nmethod::new_native_nmethod(method, | |
|
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2729 compile_id, |
| 0 | 2730 masm->code(), |
| 2731 vep_offset, | |
| 2732 frame_complete, | |
| 2733 stack_slots / VMRegImpl::slots_per_word, | |
| 2734 (is_static ? in_ByteSize(klass_offset) : in_ByteSize(receiver_offset)), | |
| 2735 in_ByteSize(lock_slot_offset*VMRegImpl::stack_slot_size), | |
| 2736 oop_maps); | |
|
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2737 |
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2738 if (is_critical_native) { |
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2739 nm->set_lazy_critical_native(true); |
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2740 } |
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2741 |
| 0 | 2742 return nm; |
| 2743 | |
| 2744 } | |
| 2745 | |
|
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2746 #ifdef HAVE_DTRACE_H |
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2747 // --------------------------------------------------------------------------- |
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2748 // Generate a dtrace nmethod for a given signature. The method takes arguments |
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2749 // in the Java compiled code convention, marshals them to the native |
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2750 // abi and then leaves nops at the position you would expect to call a native |
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2751 // function. When the probe is enabled the nops are replaced with a trap |
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2752 // instruction that dtrace inserts and the trace will cause a notification |
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2753 // to dtrace. |
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2754 // |
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2755 // The probes are only able to take primitive types and java/lang/String as |
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2756 // arguments. No other java types are allowed. Strings are converted to utf8 |
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2757 // strings so that from dtrace point of view java strings are converted to C |
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2758 // strings. There is an arbitrary fixed limit on the total space that a method |
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2759 // can use for converting the strings. (256 chars per string in the signature). |
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2760 // So any java string larger then this is truncated. |
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2761 |
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2762 static int fp_offset[ConcreteRegisterImpl::number_of_registers] = { 0 }; |
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2763 static bool offsets_initialized = false; |
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2764 |
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2765 |
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2766 nmethod *SharedRuntime::generate_dtrace_nmethod(MacroAssembler *masm, |
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2767 methodHandle method) { |
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2768 |
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2769 |
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2770 // generate_dtrace_nmethod is guarded by a mutex so we are sure to |
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2771 // be single threaded in this method. |
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2772 assert(AdapterHandlerLibrary_lock->owned_by_self(), "must be"); |
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2773 |
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2774 if (!offsets_initialized) { |
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2775 fp_offset[c_rarg0->as_VMReg()->value()] = -1 * wordSize; |
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2776 fp_offset[c_rarg1->as_VMReg()->value()] = -2 * wordSize; |
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2777 fp_offset[c_rarg2->as_VMReg()->value()] = -3 * wordSize; |
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2778 fp_offset[c_rarg3->as_VMReg()->value()] = -4 * wordSize; |
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2779 fp_offset[c_rarg4->as_VMReg()->value()] = -5 * wordSize; |
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2780 fp_offset[c_rarg5->as_VMReg()->value()] = -6 * wordSize; |
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2781 |
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2782 fp_offset[c_farg0->as_VMReg()->value()] = -7 * wordSize; |
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2783 fp_offset[c_farg1->as_VMReg()->value()] = -8 * wordSize; |
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2784 fp_offset[c_farg2->as_VMReg()->value()] = -9 * wordSize; |
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2785 fp_offset[c_farg3->as_VMReg()->value()] = -10 * wordSize; |
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2786 fp_offset[c_farg4->as_VMReg()->value()] = -11 * wordSize; |
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2787 fp_offset[c_farg5->as_VMReg()->value()] = -12 * wordSize; |
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2788 fp_offset[c_farg6->as_VMReg()->value()] = -13 * wordSize; |
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2789 fp_offset[c_farg7->as_VMReg()->value()] = -14 * wordSize; |
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2790 |
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2791 offsets_initialized = true; |
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2792 } |
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2793 // Fill in the signature array, for the calling-convention call. |
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2794 int total_args_passed = method->size_of_parameters(); |
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2795 |
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2796 BasicType* in_sig_bt = NEW_RESOURCE_ARRAY(BasicType, total_args_passed); |
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2797 VMRegPair *in_regs = NEW_RESOURCE_ARRAY(VMRegPair, total_args_passed); |
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2798 |
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2799 // The signature we are going to use for the trap that dtrace will see |
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2800 // java/lang/String is converted. We drop "this" and any other object |
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2801 // is converted to NULL. (A one-slot java/lang/Long object reference |
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2802 // is converted to a two-slot long, which is why we double the allocation). |
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2803 BasicType* out_sig_bt = NEW_RESOURCE_ARRAY(BasicType, total_args_passed * 2); |
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2804 VMRegPair* out_regs = NEW_RESOURCE_ARRAY(VMRegPair, total_args_passed * 2); |
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2805 |
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2806 int i=0; |
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2807 int total_strings = 0; |
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2808 int first_arg_to_pass = 0; |
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2809 int total_c_args = 0; |
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2810 |
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2811 // Skip the receiver as dtrace doesn't want to see it |
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2812 if( !method->is_static() ) { |
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2813 in_sig_bt[i++] = T_OBJECT; |
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2814 first_arg_to_pass = 1; |
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2815 } |
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2816 |
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2817 // We need to convert the java args to where a native (non-jni) function |
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2818 // would expect them. To figure out where they go we convert the java |
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2819 // signature to a C signature. |
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2820 |
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2821 SignatureStream ss(method->signature()); |
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2822 for ( ; !ss.at_return_type(); ss.next()) { |
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2823 BasicType bt = ss.type(); |
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2824 in_sig_bt[i++] = bt; // Collect remaining bits of signature |
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2825 out_sig_bt[total_c_args++] = bt; |
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2826 if( bt == T_OBJECT) { |
|
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2827 Symbol* s = ss.as_symbol_or_null(); // symbol is created |
|
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2828 if (s == vmSymbols::java_lang_String()) { |
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2829 total_strings++; |
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2830 out_sig_bt[total_c_args-1] = T_ADDRESS; |
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2831 } else if (s == vmSymbols::java_lang_Boolean() || |
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2832 s == vmSymbols::java_lang_Character() || |
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2833 s == vmSymbols::java_lang_Byte() || |
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2834 s == vmSymbols::java_lang_Short() || |
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2835 s == vmSymbols::java_lang_Integer() || |
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2836 s == vmSymbols::java_lang_Float()) { |
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2837 out_sig_bt[total_c_args-1] = T_INT; |
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2838 } else if (s == vmSymbols::java_lang_Long() || |
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2839 s == vmSymbols::java_lang_Double()) { |
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2840 out_sig_bt[total_c_args-1] = T_LONG; |
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2841 out_sig_bt[total_c_args++] = T_VOID; |
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2842 } |
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2843 } else if ( bt == T_LONG || bt == T_DOUBLE ) { |
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2844 in_sig_bt[i++] = T_VOID; // Longs & doubles take 2 Java slots |
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2845 // We convert double to long |
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2846 out_sig_bt[total_c_args-1] = T_LONG; |
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2847 out_sig_bt[total_c_args++] = T_VOID; |
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2848 } else if ( bt == T_FLOAT) { |
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2849 // We convert float to int |
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2850 out_sig_bt[total_c_args-1] = T_INT; |
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2851 } |
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2852 } |
|
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2853 |
|
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2854 assert(i==total_args_passed, "validly parsed signature"); |
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2855 |
|
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2856 // Now get the compiled-Java layout as input arguments |
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2857 int comp_args_on_stack; |
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2858 comp_args_on_stack = SharedRuntime::java_calling_convention( |
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2859 in_sig_bt, in_regs, total_args_passed, false); |
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2860 |
|
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2861 // Now figure out where the args must be stored and how much stack space |
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2862 // they require (neglecting out_preserve_stack_slots but space for storing |
|
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2863 // the 1st six register arguments). It's weird see int_stk_helper. |
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2864 |
|
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2865 int out_arg_slots; |
|
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|
2866 out_arg_slots = c_calling_convention(out_sig_bt, out_regs, NULL, total_c_args); |
|
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2867 |
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2868 // Calculate the total number of stack slots we will need. |
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2869 |
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2870 // First count the abi requirement plus all of the outgoing args |
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2871 int stack_slots = SharedRuntime::out_preserve_stack_slots() + out_arg_slots; |
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2872 |
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2873 // Now space for the string(s) we must convert |
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2874 int* string_locs = NEW_RESOURCE_ARRAY(int, total_strings + 1); |
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2875 for (i = 0; i < total_strings ; i++) { |
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2876 string_locs[i] = stack_slots; |
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2877 stack_slots += max_dtrace_string_size / VMRegImpl::stack_slot_size; |
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2878 } |
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2879 |
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2880 // Plus the temps we might need to juggle register args |
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2881 // regs take two slots each |
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2882 stack_slots += (Argument::n_int_register_parameters_c + |
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2883 Argument::n_float_register_parameters_c) * 2; |
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2884 |
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2885 |
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2886 // + 4 for return address (which we own) and saved rbp, |
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2887 |
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2888 stack_slots += 4; |
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2889 |
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2890 // Ok The space we have allocated will look like: |
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2891 // |
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2892 // |
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2893 // FP-> | | |
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2894 // |---------------------| |
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2895 // | string[n] | |
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2896 // |---------------------| <- string_locs[n] |
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2897 // | string[n-1] | |
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2898 // |---------------------| <- string_locs[n-1] |
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2899 // | ... | |
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2900 // | ... | |
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2901 // |---------------------| <- string_locs[1] |
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2902 // | string[0] | |
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2903 // |---------------------| <- string_locs[0] |
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2904 // | outbound memory | |
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2905 // | based arguments | |
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2906 // | | |
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2907 // |---------------------| |
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2908 // | | |
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2909 // SP-> | out_preserved_slots | |
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2910 // |
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2911 // |
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2912 |
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2913 // Now compute actual number of stack words we need rounding to make |
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2914 // stack properly aligned. |
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2915 stack_slots = round_to(stack_slots, 4 * VMRegImpl::slots_per_word); |
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2916 |
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2917 int stack_size = stack_slots * VMRegImpl::stack_slot_size; |
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2918 |
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2919 intptr_t start = (intptr_t)__ pc(); |
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2920 |
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2921 // First thing make an ic check to see if we should even be here |
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2922 |
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2923 // We are free to use all registers as temps without saving them and |
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2924 // restoring them except rbp. rbp, is the only callee save register |
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2925 // as far as the interpreter and the compiler(s) are concerned. |
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2926 |
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2927 const Register ic_reg = rax; |
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2928 const Register receiver = rcx; |
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2929 Label hit; |
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2930 Label exception_pending; |
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2931 |
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2932 |
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2933 __ verify_oop(receiver); |
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2934 __ cmpl(ic_reg, Address(receiver, oopDesc::klass_offset_in_bytes())); |
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2935 __ jcc(Assembler::equal, hit); |
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2936 |
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2937 __ jump(RuntimeAddress(SharedRuntime::get_ic_miss_stub())); |
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2938 |
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2939 // verified entry must be aligned for code patching. |
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2940 // and the first 5 bytes must be in the same cache line |
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2941 // if we align at 8 then we will be sure 5 bytes are in the same line |
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2942 __ align(8); |
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2943 |
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2944 __ bind(hit); |
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2945 |
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2946 int vep_offset = ((intptr_t)__ pc()) - start; |
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2947 |
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2948 |
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2949 // The instruction at the verified entry point must be 5 bytes or longer |
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2950 // because it can be patched on the fly by make_non_entrant. The stack bang |
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2951 // instruction fits that requirement. |
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2952 |
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2953 // Generate stack overflow check |
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2954 |
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2955 if (UseStackBanging) { |
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2956 if (stack_size <= StackShadowPages*os::vm_page_size()) { |
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2957 __ bang_stack_with_offset(StackShadowPages*os::vm_page_size()); |
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2958 } else { |
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2959 __ movl(rax, stack_size); |
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2960 __ bang_stack_size(rax, rbx); |
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2961 } |
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2962 } else { |
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2963 // need a 5 byte instruction to allow MT safe patching to non-entrant |
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2964 __ fat_nop(); |
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2965 } |
|
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2966 |
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2967 assert(((uintptr_t)__ pc() - start - vep_offset) >= 5, |
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2968 "valid size for make_non_entrant"); |
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2969 |
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2970 // Generate a new frame for the wrapper. |
|
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2971 __ enter(); |
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2972 |
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2973 // -4 because return address is already present and so is saved rbp, |
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2974 if (stack_size - 2*wordSize != 0) { |
|
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2975 __ subq(rsp, stack_size - 2*wordSize); |
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2976 } |
|
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2977 |
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2978 // Frame is now completed as far a size and linkage. |
|
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2979 |
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2980 int frame_complete = ((intptr_t)__ pc()) - start; |
|
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2981 |
|
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2982 int c_arg, j_arg; |
|
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2983 |
|
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2984 // State of input register args |
|
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|
2985 |
|
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|
2986 bool live[ConcreteRegisterImpl::number_of_registers]; |
|
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|
2987 |
|
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diff
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|
2988 live[j_rarg0->as_VMReg()->value()] = false; |
|
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|
2989 live[j_rarg1->as_VMReg()->value()] = false; |
|
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|
2990 live[j_rarg2->as_VMReg()->value()] = false; |
|
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|
2991 live[j_rarg3->as_VMReg()->value()] = false; |
|
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|
2992 live[j_rarg4->as_VMReg()->value()] = false; |
|
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|
2993 live[j_rarg5->as_VMReg()->value()] = false; |
|
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kamg
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|
2994 |
|
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diff
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|
2995 live[j_farg0->as_VMReg()->value()] = false; |
|
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|
2996 live[j_farg1->as_VMReg()->value()] = false; |
|
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|
2997 live[j_farg2->as_VMReg()->value()] = false; |
|
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|
2998 live[j_farg3->as_VMReg()->value()] = false; |
|
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|
2999 live[j_farg4->as_VMReg()->value()] = false; |
|
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|
3000 live[j_farg5->as_VMReg()->value()] = false; |
|
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|
3001 live[j_farg6->as_VMReg()->value()] = false; |
|
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|
3002 live[j_farg7->as_VMReg()->value()] = false; |
|
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kamg
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diff
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|
3003 |
|
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6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
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113
diff
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|
3004 |
|
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|
3005 bool rax_is_zero = false; |
|
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kamg
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|
3006 |
|
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|
3007 // All args (except strings) destined for the stack are moved first |
|
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|
3008 for (j_arg = first_arg_to_pass, c_arg = 0 ; |
|
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|
3009 j_arg < total_args_passed ; j_arg++, c_arg++ ) { |
|
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|
3010 VMRegPair src = in_regs[j_arg]; |
|
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|
3011 VMRegPair dst = out_regs[c_arg]; |
|
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|
3012 |
|
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|
3013 // Get the real reg value or a dummy (rsp) |
|
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kamg
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113
diff
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|
3014 |
|
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113
diff
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|
3015 int src_reg = src.first()->is_reg() ? |
|
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|
3016 src.first()->value() : |
|
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kamg
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|
3017 rsp->as_VMReg()->value(); |
|
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kamg
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113
diff
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|
3018 |
|
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113
diff
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|
3019 bool useless = in_sig_bt[j_arg] == T_ARRAY || |
|
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kamg
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diff
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|
3020 (in_sig_bt[j_arg] == T_OBJECT && |
|
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kamg
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113
diff
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|
3021 out_sig_bt[c_arg] != T_INT && |
|
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kamg
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113
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|
3022 out_sig_bt[c_arg] != T_ADDRESS && |
|
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kamg
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|
3023 out_sig_bt[c_arg] != T_LONG); |
|
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6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
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113
diff
changeset
|
3024 |
|
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
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113
diff
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|
3025 live[src_reg] = !useless; |
|
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6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
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113
diff
changeset
|
3026 |
|
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
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113
diff
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|
3027 if (dst.first()->is_stack()) { |
|
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3028 |
|
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
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113
diff
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|
3029 // Even though a string arg in a register is still live after this loop |
|
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
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113
diff
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|
3030 // after the string conversion loop (next) it will be dead so we take |
|
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
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113
diff
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|
3031 // advantage of that now for simpler code to manage live. |
|
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3032 |
|
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
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113
diff
changeset
|
3033 live[src_reg] = false; |
|
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
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113
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|
3034 switch (in_sig_bt[j_arg]) { |
|
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3035 |
|
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
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113
diff
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|
3036 case T_ARRAY: |
|
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
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113
diff
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|
3037 case T_OBJECT: |
|
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
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113
diff
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|
3038 { |
|
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
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113
diff
changeset
|
3039 Address stack_dst(rsp, reg2offset_out(dst.first())); |
|
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3040 |
|
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3041 if (out_sig_bt[c_arg] == T_INT || out_sig_bt[c_arg] == T_LONG) { |
|
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
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113
diff
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|
3042 // need to unbox a one-word value |
|
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
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113
diff
changeset
|
3043 Register in_reg = rax; |
|
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
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113
diff
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|
3044 if ( src.first()->is_reg() ) { |
|
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3045 in_reg = src.first()->as_Register(); |
|
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
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113
diff
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|
3046 } else { |
|
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
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113
diff
changeset
|
3047 __ movq(rax, Address(rbp, reg2offset_in(src.first()))); |
|
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
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113
diff
changeset
|
3048 rax_is_zero = false; |
|
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3049 } |
|
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3050 Label skipUnbox; |
|
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3051 __ movptr(Address(rsp, reg2offset_out(dst.first())), |
|
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
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|
3052 (int32_t)NULL_WORD); |
|
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
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113
diff
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|
3053 __ testq(in_reg, in_reg); |
|
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
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|
3054 __ jcc(Assembler::zero, skipUnbox); |
|
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3055 |
|
165
437d03ea40b1
6703888: Compressed Oops: use the 32-bits gap after klass in a object
kvn
parents:
116
diff
changeset
|
3056 BasicType bt = out_sig_bt[c_arg]; |
|
437d03ea40b1
6703888: Compressed Oops: use the 32-bits gap after klass in a object
kvn
parents:
116
diff
changeset
|
3057 int box_offset = java_lang_boxing_object::value_offset_in_bytes(bt); |
|
116
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
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113
diff
changeset
|
3058 Address src1(in_reg, box_offset); |
|
165
437d03ea40b1
6703888: Compressed Oops: use the 32-bits gap after klass in a object
kvn
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116
diff
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|
3059 if ( bt == T_LONG ) { |
|
116
018d5b58dd4f
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kamg
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113
diff
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|
3060 __ movq(in_reg, src1); |
|
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3061 __ movq(stack_dst, in_reg); |
|
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3062 assert(out_sig_bt[c_arg+1] == T_VOID, "must be"); |
|
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
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113
diff
changeset
|
3063 ++c_arg; // skip over T_VOID to keep the loop indices in sync |
|
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
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113
diff
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|
3064 } else { |
|
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
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113
diff
changeset
|
3065 __ movl(in_reg, src1); |
|
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3066 __ movl(stack_dst, in_reg); |
|
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3067 } |
|
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3068 |
|
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3069 __ bind(skipUnbox); |
|
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
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113
diff
changeset
|
3070 } else if (out_sig_bt[c_arg] != T_ADDRESS) { |
|
018d5b58dd4f
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kamg
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113
diff
changeset
|
3071 // Convert the arg to NULL |
|
018d5b58dd4f
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kamg
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113
diff
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|
3072 if (!rax_is_zero) { |
|
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
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113
diff
changeset
|
3073 __ xorq(rax, rax); |
|
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
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113
diff
changeset
|
3074 rax_is_zero = true; |
|
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3075 } |
|
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
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113
diff
changeset
|
3076 __ movq(stack_dst, rax); |
|
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3077 } |
|
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3078 } |
|
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3079 break; |
|
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3080 |
|
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
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113
diff
changeset
|
3081 case T_VOID: |
|
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3082 break; |
|
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3083 |
|
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3084 case T_FLOAT: |
|
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3085 // This does the right thing since we know it is destined for the |
|
018d5b58dd4f
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kamg
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113
diff
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|
3086 // stack |
|
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
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113
diff
changeset
|
3087 float_move(masm, src, dst); |
|
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3088 break; |
|
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3089 |
|
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3090 case T_DOUBLE: |
|
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
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113
diff
changeset
|
3091 // This does the right thing since we know it is destined for the |
|
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
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113
diff
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|
3092 // stack |
|
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
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113
diff
changeset
|
3093 double_move(masm, src, dst); |
|
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3094 break; |
|
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3095 |
|
018d5b58dd4f
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kamg
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113
diff
changeset
|
3096 case T_LONG : |
|
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
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113
diff
changeset
|
3097 long_move(masm, src, dst); |
|
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
changeset
|
3098 break; |
|
018d5b58dd4f
6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents:
113
diff
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3099 |
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3100 case T_ADDRESS: assert(false, "found T_ADDRESS in java args"); |
|
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3101 |
|
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3102 default: |
|
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3103 move32_64(masm, src, dst); |
|
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3104 } |
|
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|
3105 } |
|
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|
3106 |
|
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3107 } |
|
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3108 |
|
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3109 // If we have any strings we must store any register based arg to the stack |
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3110 // This includes any still live xmm registers too. |
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3111 |
|
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3112 int sid = 0; |
|
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3113 |
|
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3114 if (total_strings > 0 ) { |
|
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3115 for (j_arg = first_arg_to_pass, c_arg = 0 ; |
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3116 j_arg < total_args_passed ; j_arg++, c_arg++ ) { |
|
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3117 VMRegPair src = in_regs[j_arg]; |
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3118 VMRegPair dst = out_regs[c_arg]; |
|
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3119 |
|
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3120 if (src.first()->is_reg()) { |
|
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3121 Address src_tmp(rbp, fp_offset[src.first()->value()]); |
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3122 |
|
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3123 // string oops were left untouched by the previous loop even if the |
|
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3124 // eventual (converted) arg is destined for the stack so park them |
|
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3125 // away now (except for first) |
|
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3126 |
|
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3127 if (out_sig_bt[c_arg] == T_ADDRESS) { |
|
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3128 Address utf8_addr = Address( |
|
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3129 rsp, string_locs[sid++] * VMRegImpl::stack_slot_size); |
|
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3130 if (sid != 1) { |
|
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3131 // The first string arg won't be killed until after the utf8 |
|
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3132 // conversion |
|
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3133 __ movq(utf8_addr, src.first()->as_Register()); |
|
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3134 } |
|
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3135 } else if (dst.first()->is_reg()) { |
|
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3136 if (in_sig_bt[j_arg] == T_FLOAT || in_sig_bt[j_arg] == T_DOUBLE) { |
|
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3137 |
|
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3138 // Convert the xmm register to an int and store it in the reserved |
|
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3139 // location for the eventual c register arg |
|
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3140 XMMRegister f = src.first()->as_XMMRegister(); |
|
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3141 if (in_sig_bt[j_arg] == T_FLOAT) { |
|
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3142 __ movflt(src_tmp, f); |
|
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3143 } else { |
|
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3144 __ movdbl(src_tmp, f); |
|
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3145 } |
|
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|
3146 } else { |
|
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3147 // If the arg is an oop type we don't support don't bother to store |
|
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3148 // it remember string was handled above. |
|
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3149 bool useless = in_sig_bt[j_arg] == T_ARRAY || |
|
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3150 (in_sig_bt[j_arg] == T_OBJECT && |
|
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|
3151 out_sig_bt[c_arg] != T_INT && |
|
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3152 out_sig_bt[c_arg] != T_LONG); |
|
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|
3153 |
|
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|
3154 if (!useless) { |
|
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3155 __ movq(src_tmp, src.first()->as_Register()); |
|
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|
3156 } |
|
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|
3157 } |
|
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|
3158 } |
|
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|
3159 } |
|
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|
3160 if (in_sig_bt[j_arg] == T_OBJECT && out_sig_bt[c_arg] == T_LONG) { |
|
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3161 assert(out_sig_bt[c_arg+1] == T_VOID, "must be"); |
|
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3162 ++c_arg; // skip over T_VOID to keep the loop indices in sync |
|
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|
3163 } |
|
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|
3164 } |
|
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|
3165 |
|
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|
3166 // Now that the volatile registers are safe, convert all the strings |
|
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|
3167 sid = 0; |
|
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|
3168 |
|
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|
3169 for (j_arg = first_arg_to_pass, c_arg = 0 ; |
|
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3170 j_arg < total_args_passed ; j_arg++, c_arg++ ) { |
|
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3171 if (out_sig_bt[c_arg] == T_ADDRESS) { |
|
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3172 // It's a string |
|
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|
3173 Address utf8_addr = Address( |
|
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|
3174 rsp, string_locs[sid++] * VMRegImpl::stack_slot_size); |
|
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3175 // The first string we find might still be in the original java arg |
|
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|
3176 // register |
|
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|
3177 |
|
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|
3178 VMReg src = in_regs[j_arg].first(); |
|
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|
3179 |
|
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|
3180 // We will need to eventually save the final argument to the trap |
|
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3181 // in the von-volatile location dedicated to src. This is the offset |
|
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|
3182 // from fp we will use. |
|
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|
3183 int src_off = src->is_reg() ? |
|
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3184 fp_offset[src->value()] : reg2offset_in(src); |
|
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|
3185 |
|
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|
3186 // This is where the argument will eventually reside |
|
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|
3187 VMRegPair dst = out_regs[c_arg]; |
|
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|
3188 |
|
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|
3189 if (src->is_reg()) { |
|
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3190 if (sid == 1) { |
|
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|
3191 __ movq(c_rarg0, src->as_Register()); |
|
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|
3192 } else { |
|
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3193 __ movq(c_rarg0, utf8_addr); |
|
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|
3194 } |
|
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|
3195 } else { |
|
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3196 // arg is still in the original location |
|
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|
3197 __ movq(c_rarg0, Address(rbp, reg2offset_in(src))); |
|
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|
3198 } |
|
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|
3199 Label done, convert; |
|
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|
3200 |
|
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|
3201 // see if the oop is NULL |
|
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|
3202 __ testq(c_rarg0, c_rarg0); |
|
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3203 __ jcc(Assembler::notEqual, convert); |
|
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|
3204 |
|
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|
3205 if (dst.first()->is_reg()) { |
|
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|
3206 // Save the ptr to utf string in the origina src loc or the tmp |
|
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|
3207 // dedicated to it |
|
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|
3208 __ movq(Address(rbp, src_off), c_rarg0); |
|
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3209 } else { |
|
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|
3210 __ movq(Address(rsp, reg2offset_out(dst.first())), c_rarg0); |
|
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|
3211 } |
|
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|
3212 __ jmp(done); |
|
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|
3213 |
|
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3214 __ bind(convert); |
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3215 |
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3216 __ lea(c_rarg1, utf8_addr); |
|
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3217 if (dst.first()->is_reg()) { |
|
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3218 __ movq(Address(rbp, src_off), c_rarg1); |
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3219 } else { |
|
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3220 __ movq(Address(rsp, reg2offset_out(dst.first())), c_rarg1); |
|
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3221 } |
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3222 // And do the conversion |
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3223 __ call(RuntimeAddress( |
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3224 CAST_FROM_FN_PTR(address, SharedRuntime::get_utf))); |
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3225 |
|
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3226 __ bind(done); |
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3227 } |
|
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3228 if (in_sig_bt[j_arg] == T_OBJECT && out_sig_bt[c_arg] == T_LONG) { |
|
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3229 assert(out_sig_bt[c_arg+1] == T_VOID, "must be"); |
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3230 ++c_arg; // skip over T_VOID to keep the loop indices in sync |
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3231 } |
|
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3232 } |
|
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3233 // The get_utf call killed all the c_arg registers |
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3234 live[c_rarg0->as_VMReg()->value()] = false; |
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3235 live[c_rarg1->as_VMReg()->value()] = false; |
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3236 live[c_rarg2->as_VMReg()->value()] = false; |
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3237 live[c_rarg3->as_VMReg()->value()] = false; |
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3238 live[c_rarg4->as_VMReg()->value()] = false; |
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3239 live[c_rarg5->as_VMReg()->value()] = false; |
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3240 |
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3241 live[c_farg0->as_VMReg()->value()] = false; |
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3242 live[c_farg1->as_VMReg()->value()] = false; |
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3243 live[c_farg2->as_VMReg()->value()] = false; |
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3244 live[c_farg3->as_VMReg()->value()] = false; |
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3245 live[c_farg4->as_VMReg()->value()] = false; |
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3246 live[c_farg5->as_VMReg()->value()] = false; |
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3247 live[c_farg6->as_VMReg()->value()] = false; |
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3248 live[c_farg7->as_VMReg()->value()] = false; |
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3249 } |
|
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3250 |
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3251 // Now we can finally move the register args to their desired locations |
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3252 |
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3253 rax_is_zero = false; |
|
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3254 |
|
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3255 for (j_arg = first_arg_to_pass, c_arg = 0 ; |
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3256 j_arg < total_args_passed ; j_arg++, c_arg++ ) { |
|
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3257 |
|
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3258 VMRegPair src = in_regs[j_arg]; |
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3259 VMRegPair dst = out_regs[c_arg]; |
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3260 |
|
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3261 // Only need to look for args destined for the interger registers (since we |
|
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3262 // convert float/double args to look like int/long outbound) |
|
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3263 if (dst.first()->is_reg()) { |
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3264 Register r = dst.first()->as_Register(); |
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3265 |
|
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3266 // Check if the java arg is unsupported and thereofre useless |
|
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3267 bool useless = in_sig_bt[j_arg] == T_ARRAY || |
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3268 (in_sig_bt[j_arg] == T_OBJECT && |
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3269 out_sig_bt[c_arg] != T_INT && |
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3270 out_sig_bt[c_arg] != T_ADDRESS && |
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3271 out_sig_bt[c_arg] != T_LONG); |
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3272 |
|
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|
3273 |
|
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|
3274 // If we're going to kill an existing arg save it first |
|
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3275 if (live[dst.first()->value()]) { |
|
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3276 // you can't kill yourself |
|
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3277 if (src.first() != dst.first()) { |
|
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3278 __ movq(Address(rbp, fp_offset[dst.first()->value()]), r); |
|
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|
3279 } |
|
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|
3280 } |
|
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|
3281 if (src.first()->is_reg()) { |
|
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3282 if (live[src.first()->value()] ) { |
|
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3283 if (in_sig_bt[j_arg] == T_FLOAT) { |
|
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3284 __ movdl(r, src.first()->as_XMMRegister()); |
|
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3285 } else if (in_sig_bt[j_arg] == T_DOUBLE) { |
|
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3286 __ movdq(r, src.first()->as_XMMRegister()); |
|
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3287 } else if (r != src.first()->as_Register()) { |
|
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3288 if (!useless) { |
|
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3289 __ movq(r, src.first()->as_Register()); |
|
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|
3290 } |
|
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|
3291 } |
|
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|
3292 } else { |
|
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3293 // If the arg is an oop type we don't support don't bother to store |
|
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|
3294 // it |
|
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|
3295 if (!useless) { |
|
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3296 if (in_sig_bt[j_arg] == T_DOUBLE || |
|
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3297 in_sig_bt[j_arg] == T_LONG || |
|
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3298 in_sig_bt[j_arg] == T_OBJECT ) { |
|
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3299 __ movq(r, Address(rbp, fp_offset[src.first()->value()])); |
|
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3300 } else { |
|
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3301 __ movl(r, Address(rbp, fp_offset[src.first()->value()])); |
|
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3302 } |
|
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|
3303 } |
|
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|
3304 } |
|
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|
3305 live[src.first()->value()] = false; |
|
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3306 } else if (!useless) { |
|
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3307 // full sized move even for int should be ok |
|
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3308 __ movq(r, Address(rbp, reg2offset_in(src.first()))); |
|
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3309 } |
|
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|
3310 |
|
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3311 // At this point r has the original java arg in the final location |
|
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3312 // (assuming it wasn't useless). If the java arg was an oop |
|
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3313 // we have a bit more to do |
|
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3314 |
|
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3315 if (in_sig_bt[j_arg] == T_ARRAY || in_sig_bt[j_arg] == T_OBJECT ) { |
|
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3316 if (out_sig_bt[c_arg] == T_INT || out_sig_bt[c_arg] == T_LONG) { |
|
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3317 // need to unbox a one-word value |
|
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3318 Label skip; |
|
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|
3319 __ testq(r, r); |
|
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|
3320 __ jcc(Assembler::equal, skip); |
|
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3321 BasicType bt = out_sig_bt[c_arg]; |
|
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3322 int box_offset = java_lang_boxing_object::value_offset_in_bytes(bt); |
|
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3323 Address src1(r, box_offset); |
|
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3324 if ( bt == T_LONG ) { |
|
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3325 __ movq(r, src1); |
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3326 } else { |
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3327 __ movl(r, src1); |
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3328 } |
|
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3329 __ bind(skip); |
|
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3330 |
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3331 } else if (out_sig_bt[c_arg] != T_ADDRESS) { |
|
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3332 // Convert the arg to NULL |
|
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3333 __ xorq(r, r); |
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3334 } |
|
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3335 } |
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3336 |
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3337 // dst can longer be holding an input value |
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3338 live[dst.first()->value()] = false; |
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3339 } |
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3340 if (in_sig_bt[j_arg] == T_OBJECT && out_sig_bt[c_arg] == T_LONG) { |
|
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3341 assert(out_sig_bt[c_arg+1] == T_VOID, "must be"); |
|
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3342 ++c_arg; // skip over T_VOID to keep the loop indices in sync |
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3343 } |
|
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3344 } |
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3345 |
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3346 |
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3347 // Ok now we are done. Need to place the nop that dtrace wants in order to |
|
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3348 // patch in the trap |
|
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3349 int patch_offset = ((intptr_t)__ pc()) - start; |
|
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3350 |
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3351 __ nop(); |
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3352 |
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3353 |
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3354 // Return |
|
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3355 |
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3356 __ leave(); |
|
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3357 __ ret(0); |
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3358 |
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3359 __ flush(); |
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3360 |
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3361 nmethod *nm = nmethod::new_dtrace_nmethod( |
|
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3362 method, masm->code(), vep_offset, patch_offset, frame_complete, |
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3363 stack_slots / VMRegImpl::slots_per_word); |
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3364 return nm; |
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3365 |
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3366 } |
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3367 |
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3368 #endif // HAVE_DTRACE_H |
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3369 |
| 0 | 3370 // this function returns the adjust size (in number of words) to a c2i adapter |
| 3371 // activation for use during deoptimization | |
| 3372 int Deoptimization::last_frame_adjust(int callee_parameters, int callee_locals ) { | |
| 1506 | 3373 return (callee_locals - callee_parameters) * Interpreter::stackElementWords; |
| 0 | 3374 } |
| 3375 | |
| 3376 | |
| 3377 uint SharedRuntime::out_preserve_stack_slots() { | |
| 3378 return 0; | |
| 3379 } | |
| 3380 | |
| 3381 //------------------------------generate_deopt_blob---------------------------- | |
| 3382 void SharedRuntime::generate_deopt_blob() { | |
| 3383 // Allocate space for the code | |
| 3384 ResourceMark rm; | |
| 3385 // Setup code generation tools | |
| 3386 CodeBuffer buffer("deopt_blob", 2048, 1024); | |
| 3387 MacroAssembler* masm = new MacroAssembler(&buffer); | |
| 3388 int frame_size_in_words; | |
| 3389 OopMap* map = NULL; | |
| 3390 OopMapSet *oop_maps = new OopMapSet(); | |
| 3391 | |
| 3392 // ------------- | |
| 3393 // This code enters when returning to a de-optimized nmethod. A return | |
| 3394 // address has been pushed on the the stack, and return values are in | |
| 3395 // registers. | |
| 3396 // If we are doing a normal deopt then we were called from the patched | |
| 3397 // nmethod from the point we returned to the nmethod. So the return | |
| 3398 // address on the stack is wrong by NativeCall::instruction_size | |
| 3399 // We will adjust the value so it looks like we have the original return | |
| 3400 // address on the stack (like when we eagerly deoptimized). | |
| 3401 // In the case of an exception pending when deoptimizing, we enter | |
| 3402 // with a return address on the stack that points after the call we patched | |
| 3403 // into the exception handler. We have the following register state from, | |
| 3404 // e.g., the forward exception stub (see stubGenerator_x86_64.cpp). | |
| 3405 // rax: exception oop | |
| 3406 // rbx: exception handler | |
| 3407 // rdx: throwing pc | |
| 3408 // So in this case we simply jam rdx into the useless return address and | |
| 3409 // the stack looks just like we want. | |
| 3410 // | |
| 3411 // At this point we need to de-opt. We save the argument return | |
| 3412 // registers. We call the first C routine, fetch_unroll_info(). This | |
| 3413 // routine captures the return values and returns a structure which | |
| 3414 // describes the current frame size and the sizes of all replacement frames. | |
| 3415 // The current frame is compiled code and may contain many inlined | |
| 3416 // functions, each with their own JVM state. We pop the current frame, then | |
| 3417 // push all the new frames. Then we call the C routine unpack_frames() to | |
| 3418 // populate these frames. Finally unpack_frames() returns us the new target | |
| 3419 // address. Notice that callee-save registers are BLOWN here; they have | |
| 3420 // already been captured in the vframeArray at the time the return PC was | |
| 3421 // patched. | |
| 3422 address start = __ pc(); | |
| 3423 Label cont; | |
| 3424 | |
| 3425 // Prolog for non exception case! | |
| 3426 | |
| 3427 // Save everything in sight. | |
| 3428 map = RegisterSaver::save_live_registers(masm, 0, &frame_size_in_words); | |
| 3429 | |
| 3430 // Normal deoptimization. Save exec mode for unpack_frames. | |
|
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3431 __ movl(r14, Deoptimization::Unpack_deopt); // callee-saved |
| 0 | 3432 __ jmp(cont); |
| 304 | 3433 |
| 3434 int reexecute_offset = __ pc() - start; | |
|
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3435 #if defined(COMPILERGRAAL) && !defined(COMPILER1) |
|
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3436 // Graal does not use this kind of deoptimization |
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|
3437 __ should_not_reach_here(); |
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3438 #endif |
| 304 | 3439 |
| 3440 // Reexecute case | |
| 3441 // return address is the pc describes what bci to do re-execute at | |
| 3442 | |
| 3443 // No need to update map as each call to save_live_registers will produce identical oopmap | |
| 3444 (void) RegisterSaver::save_live_registers(masm, 0, &frame_size_in_words); | |
| 3445 | |
| 3446 __ movl(r14, Deoptimization::Unpack_reexecute); // callee-saved | |
| 3447 __ jmp(cont); | |
| 3448 | |
|
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3449 #ifdef GRAAL |
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3450 int implicit_exception_uncommon_trap_offset = __ pc() - start; |
| 15104 | 3451 |
| 10409 | 3452 __ pushptr(Address(r15_thread, in_bytes(JavaThread::graal_implicit_exception_pc_offset()))); |
|
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3453 |
|
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|
3454 int uncommon_trap_offset = __ pc() - start; |
|
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3455 |
|
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|
3456 // Save everything in sight. |
|
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|
3457 RegisterSaver::save_live_registers(masm, 0, &frame_size_in_words); |
|
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|
3458 // fetch_unroll_info needs to call last_java_frame() |
|
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|
3459 __ set_last_Java_frame(noreg, noreg, NULL); |
|
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|
3460 |
|
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|
3461 __ movl(c_rarg1, Address(r15_thread, in_bytes(ThreadShadow::pending_deoptimization_offset()))); |
|
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|
3462 __ movl(Address(r15_thread, in_bytes(ThreadShadow::pending_deoptimization_offset())), -1); |
|
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|
3463 |
|
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|
3464 __ movl(r14, (int32_t)Deoptimization::Unpack_reexecute); |
|
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|
3465 __ mov(c_rarg0, r15_thread); |
|
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|
3466 __ call(RuntimeAddress(CAST_FROM_FN_PTR(address, Deoptimization::uncommon_trap))); |
|
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|
3467 oop_maps->add_gc_map( __ pc()-start, map->deep_copy()); |
|
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3468 |
|
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|
3469 __ reset_last_Java_frame(false, false); |
|
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|
3470 |
|
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|
3471 Label after_fetch_unroll_info_call; |
|
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|
3472 __ jmp(after_fetch_unroll_info_call); |
|
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|
3473 #endif // GRAAL |
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|
3474 |
| 0 | 3475 int exception_offset = __ pc() - start; |
| 3476 | |
| 3477 // Prolog for exception case | |
| 3478 | |
| 304 | 3479 // all registers are dead at this entry point, except for rax, and |
| 3480 // rdx which contain the exception oop and exception pc | |
| 3481 // respectively. Set them in TLS and fall thru to the | |
| 3482 // unpack_with_exception_in_tls entry point. | |
| 3483 | |
| 3484 __ movptr(Address(r15_thread, JavaThread::exception_pc_offset()), rdx); | |
| 3485 __ movptr(Address(r15_thread, JavaThread::exception_oop_offset()), rax); | |
| 3486 | |
| 3487 int exception_in_tls_offset = __ pc() - start; | |
| 3488 | |
| 3489 // new implementation because exception oop is now passed in JavaThread | |
| 3490 | |
| 3491 // Prolog for exception case | |
| 3492 // All registers must be preserved because they might be used by LinearScan | |
| 3493 // Exceptiop oop and throwing PC are passed in JavaThread | |
| 3494 // tos: stack at point of call to method that threw the exception (i.e. only | |
| 3495 // args are on the stack, no return address) | |
| 3496 | |
| 3497 // make room on stack for the return address | |
| 3498 // It will be patched later with the throwing pc. The correct value is not | |
| 3499 // available now because loading it from memory would destroy registers. | |
| 3500 __ push(0); | |
| 0 | 3501 |
| 3502 // Save everything in sight. | |
| 3503 map = RegisterSaver::save_live_registers(masm, 0, &frame_size_in_words); | |
| 3504 | |
| 304 | 3505 // Now it is safe to overwrite any register |
| 3506 | |
| 0 | 3507 // Deopt during an exception. Save exec mode for unpack_frames. |
|
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3508 __ movl(r14, Deoptimization::Unpack_exception); // callee-saved |
| 0 | 3509 |
| 304 | 3510 // load throwing pc from JavaThread and patch it as the return address |
| 3511 // of the current frame. Then clear the field in JavaThread | |
| 3512 | |
| 3513 __ movptr(rdx, Address(r15_thread, JavaThread::exception_pc_offset())); | |
| 3514 __ movptr(Address(rbp, wordSize), rdx); | |
| 3515 __ movptr(Address(r15_thread, JavaThread::exception_pc_offset()), (int32_t)NULL_WORD); | |
| 3516 | |
| 3517 #ifdef ASSERT | |
| 3518 // verify that there is really an exception oop in JavaThread | |
| 3519 __ movptr(rax, Address(r15_thread, JavaThread::exception_oop_offset())); | |
| 3520 __ verify_oop(rax); | |
| 3521 | |
| 3522 // verify that there is no pending exception | |
| 3523 Label no_pending_exception; | |
| 3524 __ movptr(rax, Address(r15_thread, Thread::pending_exception_offset())); | |
| 3525 __ testptr(rax, rax); | |
| 3526 __ jcc(Assembler::zero, no_pending_exception); | |
| 3527 __ stop("must not have pending exception here"); | |
| 3528 __ bind(no_pending_exception); | |
| 3529 #endif | |
| 3530 | |
| 0 | 3531 __ bind(cont); |
| 3532 | |
| 3533 // Call C code. Need thread and this frame, but NOT official VM entry | |
| 3534 // crud. We cannot block on this call, no GC can happen. | |
| 3535 // | |
| 3536 // UnrollBlock* fetch_unroll_info(JavaThread* thread) | |
| 3537 | |
| 3538 // fetch_unroll_info needs to call last_java_frame(). | |
| 3539 | |
| 3540 __ set_last_Java_frame(noreg, noreg, NULL); | |
| 3541 #ifdef ASSERT | |
| 3542 { Label L; | |
| 304 | 3543 __ cmpptr(Address(r15_thread, |
| 0 | 3544 JavaThread::last_Java_fp_offset()), |
| 304 | 3545 (int32_t)0); |
| 0 | 3546 __ jcc(Assembler::equal, L); |
| 3547 __ stop("SharedRuntime::generate_deopt_blob: last_Java_fp not cleared"); | |
| 3548 __ bind(L); | |
| 3549 } | |
| 3550 #endif // ASSERT | |
| 304 | 3551 __ mov(c_rarg0, r15_thread); |
| 0 | 3552 __ call(RuntimeAddress(CAST_FROM_FN_PTR(address, Deoptimization::fetch_unroll_info))); |
| 3553 | |
| 3554 // Need to have an oopmap that tells fetch_unroll_info where to | |
| 3555 // find any register it might need. | |
| 3556 oop_maps->add_gc_map(__ pc() - start, map); | |
| 3557 | |
| 3558 __ reset_last_Java_frame(false, false); | |
| 3559 | |
|
4985
0d2a2797a61f
2 more #ifdef GRAAL
Thomas Wuerthinger <thomas.wuerthinger@oracle.com>
parents:
4984
diff
changeset
|
3560 #ifdef GRAAL |
|
2059
9508a52cbd32
Add deoptimization blob support.
Thomas Wuerthinger <wuerthinger@ssw.jku.at>
parents:
1972
diff
changeset
|
3561 __ bind(after_fetch_unroll_info_call); |
|
4985
0d2a2797a61f
2 more #ifdef GRAAL
Thomas Wuerthinger <thomas.wuerthinger@oracle.com>
parents:
4984
diff
changeset
|
3562 #endif |
|
2059
9508a52cbd32
Add deoptimization blob support.
Thomas Wuerthinger <wuerthinger@ssw.jku.at>
parents:
1972
diff
changeset
|
3563 |
| 0 | 3564 // Load UnrollBlock* into rdi |
| 304 | 3565 __ mov(rdi, rax); |
| 3566 | |
| 3567 Label noException; | |
|
682
69aefafe69c1
6824463: deopt blob is testing wrong register on 64-bit x86
never
parents:
628
diff
changeset
|
3568 __ cmpl(r14, Deoptimization::Unpack_exception); // Was exception pending? |
| 304 | 3569 __ jcc(Assembler::notEqual, noException); |
| 3570 __ movptr(rax, Address(r15_thread, JavaThread::exception_oop_offset())); | |
| 3571 // QQQ this is useless it was NULL above | |
| 3572 __ movptr(rdx, Address(r15_thread, JavaThread::exception_pc_offset())); | |
| 3573 __ movptr(Address(r15_thread, JavaThread::exception_oop_offset()), (int32_t)NULL_WORD); | |
| 3574 __ movptr(Address(r15_thread, JavaThread::exception_pc_offset()), (int32_t)NULL_WORD); | |
| 3575 | |
| 3576 __ verify_oop(rax); | |
| 3577 | |
| 3578 // Overwrite the result registers with the exception results. | |
| 3579 __ movptr(Address(rsp, RegisterSaver::rax_offset_in_bytes()), rax); | |
| 3580 // I think this is useless | |
| 3581 __ movptr(Address(rsp, RegisterSaver::rdx_offset_in_bytes()), rdx); | |
| 3582 | |
| 3583 __ bind(noException); | |
| 0 | 3584 |
| 3585 // Only register save data is on the stack. | |
| 3586 // Now restore the result registers. Everything else is either dead | |
| 3587 // or captured in the vframeArray. | |
| 3588 RegisterSaver::restore_result_registers(masm); | |
| 3589 | |
| 3590 // All of the register save area has been popped of the stack. Only the | |
| 3591 // return address remains. | |
| 3592 | |
| 3593 // Pop all the frames we must move/replace. | |
| 3594 // | |
| 3595 // Frame picture (youngest to oldest) | |
| 3596 // 1: self-frame (no frame link) | |
| 3597 // 2: deopting frame (no frame link) | |
| 3598 // 3: caller of deopting frame (could be compiled/interpreted). | |
| 3599 // | |
| 3600 // Note: by leaving the return address of self-frame on the stack | |
| 3601 // and using the size of frame 2 to adjust the stack | |
| 3602 // when we are done the return to frame 3 will still be on the stack. | |
| 3603 | |
| 3604 // Pop deoptimized frame | |
| 3605 __ movl(rcx, Address(rdi, Deoptimization::UnrollBlock::size_of_deoptimized_frame_offset_in_bytes())); | |
| 304 | 3606 __ addptr(rsp, rcx); |
| 0 | 3607 |
| 3608 // rsp should be pointing at the return address to the caller (3) | |
| 3609 | |
|
13384
fca8f4799229
8028308: nsk regression, assert(obj->is_oop()) failed: not an oop
roland
parents:
10998
diff
changeset
|
3610 // Pick up the initial fp we should save |
|
fca8f4799229
8028308: nsk regression, assert(obj->is_oop()) failed: not an oop
roland
parents:
10998
diff
changeset
|
3611 // restore rbp before stack bang because if stack overflow is thrown it needs to be pushed (and preserved) |
|
fca8f4799229
8028308: nsk regression, assert(obj->is_oop()) failed: not an oop
roland
parents:
10998
diff
changeset
|
3612 __ movptr(rbp, Address(rdi, Deoptimization::UnrollBlock::initial_info_offset_in_bytes())); |
|
fca8f4799229
8028308: nsk regression, assert(obj->is_oop()) failed: not an oop
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parents:
10998
diff
changeset
|
3613 |
|
17980
0bf37f737702
8032410: compiler/uncommontrap/TestStackBangRbp.java times out on Solaris-Sparc V9
roland
parents:
17850
diff
changeset
|
3614 #ifdef ASSERT |
|
0bf37f737702
8032410: compiler/uncommontrap/TestStackBangRbp.java times out on Solaris-Sparc V9
roland
parents:
17850
diff
changeset
|
3615 // Compilers generate code that bang the stack by as much as the |
|
0bf37f737702
8032410: compiler/uncommontrap/TestStackBangRbp.java times out on Solaris-Sparc V9
roland
parents:
17850
diff
changeset
|
3616 // interpreter would need. So this stack banging should never |
|
0bf37f737702
8032410: compiler/uncommontrap/TestStackBangRbp.java times out on Solaris-Sparc V9
roland
parents:
17850
diff
changeset
|
3617 // trigger a fault. Verify that it does not on non product builds. |
| 0 | 3618 if (UseStackBanging) { |
| 3619 __ movl(rbx, Address(rdi, Deoptimization::UnrollBlock::total_frame_sizes_offset_in_bytes())); | |
| 3620 __ bang_stack_size(rbx, rcx); | |
| 3621 } | |
|
17980
0bf37f737702
8032410: compiler/uncommontrap/TestStackBangRbp.java times out on Solaris-Sparc V9
roland
parents:
17850
diff
changeset
|
3622 #endif |
| 0 | 3623 |
| 3624 // Load address of array of frame pcs into rcx | |
| 304 | 3625 __ movptr(rcx, Address(rdi, Deoptimization::UnrollBlock::frame_pcs_offset_in_bytes())); |
| 0 | 3626 |
| 3627 // Trash the old pc | |
| 304 | 3628 __ addptr(rsp, wordSize); |
| 0 | 3629 |
| 3630 // Load address of array of frame sizes into rsi | |
| 304 | 3631 __ movptr(rsi, Address(rdi, Deoptimization::UnrollBlock::frame_sizes_offset_in_bytes())); |
| 0 | 3632 |
| 3633 // Load counter into rdx | |
| 3634 __ movl(rdx, Address(rdi, Deoptimization::UnrollBlock::number_of_frames_offset_in_bytes())); | |
| 3635 | |
| 3636 // Now adjust the caller's stack to make up for the extra locals | |
| 3637 // but record the original sp so that we can save it in the skeletal interpreter | |
| 3638 // frame and the stack walking of interpreter_sender will get the unextended sp | |
| 3639 // value and not the "real" sp value. | |
| 3640 | |
| 3641 const Register sender_sp = r8; | |
| 3642 | |
| 304 | 3643 __ mov(sender_sp, rsp); |
| 0 | 3644 __ movl(rbx, Address(rdi, |
| 3645 Deoptimization::UnrollBlock:: | |
| 3646 caller_adjustment_offset_in_bytes())); | |
| 304 | 3647 __ subptr(rsp, rbx); |
| 0 | 3648 |
| 3649 // Push interpreter frames in a loop | |
| 3650 Label loop; | |
| 3651 __ bind(loop); | |
| 304 | 3652 __ movptr(rbx, Address(rsi, 0)); // Load frame size |
| 3653 #ifdef CC_INTERP | |
| 3654 __ subptr(rbx, 4*wordSize); // we'll push pc and ebp by hand and | |
| 3655 #ifdef ASSERT | |
| 3656 __ push(0xDEADDEAD); // Make a recognizable pattern | |
| 3657 __ push(0xDEADDEAD); | |
| 3658 #else /* ASSERT */ | |
| 3659 __ subptr(rsp, 2*wordSize); // skip the "static long no_param" | |
| 3660 #endif /* ASSERT */ | |
| 3661 #else | |
| 3662 __ subptr(rbx, 2*wordSize); // We'll push pc and ebp by hand | |
| 3663 #endif // CC_INTERP | |
| 3664 __ pushptr(Address(rcx, 0)); // Save return address | |
| 0 | 3665 __ enter(); // Save old & set new ebp |
| 304 | 3666 __ subptr(rsp, rbx); // Prolog |
| 3667 #ifdef CC_INTERP | |
| 3668 __ movptr(Address(rbp, | |
| 3669 -(sizeof(BytecodeInterpreter)) + in_bytes(byte_offset_of(BytecodeInterpreter, _sender_sp))), | |
| 3670 sender_sp); // Make it walkable | |
| 3671 #else /* CC_INTERP */ | |
| 0 | 3672 // This value is corrected by layout_activation_impl |
| 304 | 3673 __ movptr(Address(rbp, frame::interpreter_frame_last_sp_offset * wordSize), (int32_t)NULL_WORD ); |
| 3674 __ movptr(Address(rbp, frame::interpreter_frame_sender_sp_offset * wordSize), sender_sp); // Make it walkable | |
| 3675 #endif /* CC_INTERP */ | |
| 3676 __ mov(sender_sp, rsp); // Pass sender_sp to next frame | |
| 3677 __ addptr(rsi, wordSize); // Bump array pointer (sizes) | |
| 3678 __ addptr(rcx, wordSize); // Bump array pointer (pcs) | |
| 0 | 3679 __ decrementl(rdx); // Decrement counter |
| 3680 __ jcc(Assembler::notZero, loop); | |
| 304 | 3681 __ pushptr(Address(rcx, 0)); // Save final return address |
| 0 | 3682 |
| 3683 // Re-push self-frame | |
| 3684 __ enter(); // Save old & set new ebp | |
| 3685 | |
| 3686 // Allocate a full sized register save area. | |
| 3687 // Return address and rbp are in place, so we allocate two less words. | |
| 304 | 3688 __ subptr(rsp, (frame_size_in_words - 2) * wordSize); |
| 0 | 3689 |
| 3690 // Restore frame locals after moving the frame | |
| 3691 __ movdbl(Address(rsp, RegisterSaver::xmm0_offset_in_bytes()), xmm0); | |
| 304 | 3692 __ movptr(Address(rsp, RegisterSaver::rax_offset_in_bytes()), rax); |
| 0 | 3693 |
| 3694 // Call C code. Need thread but NOT official VM entry | |
| 3695 // crud. We cannot block on this call, no GC can happen. Call should | |
| 3696 // restore return values to their stack-slots with the new SP. | |
| 3697 // | |
| 3698 // void Deoptimization::unpack_frames(JavaThread* thread, int exec_mode) | |
| 3699 | |
| 3700 // Use rbp because the frames look interpreted now | |
|
4057
1feb272af3a7
6636110: unaligned stackpointer leads to crash during deoptimization
never
parents:
3931
diff
changeset
|
3701 // Save "the_pc" since it cannot easily be retrieved using the last_java_SP after we aligned SP. |
|
1feb272af3a7
6636110: unaligned stackpointer leads to crash during deoptimization
never
parents:
3931
diff
changeset
|
3702 // Don't need the precise return PC here, just precise enough to point into this code blob. |
|
1feb272af3a7
6636110: unaligned stackpointer leads to crash during deoptimization
never
parents:
3931
diff
changeset
|
3703 address the_pc = __ pc(); |
|
1feb272af3a7
6636110: unaligned stackpointer leads to crash during deoptimization
never
parents:
3931
diff
changeset
|
3704 __ set_last_Java_frame(noreg, rbp, the_pc); |
|
1feb272af3a7
6636110: unaligned stackpointer leads to crash during deoptimization
never
parents:
3931
diff
changeset
|
3705 |
|
1feb272af3a7
6636110: unaligned stackpointer leads to crash during deoptimization
never
parents:
3931
diff
changeset
|
3706 __ andptr(rsp, -(StackAlignmentInBytes)); // Fix stack alignment as required by ABI |
| 304 | 3707 __ mov(c_rarg0, r15_thread); |
|
113
ba764ed4b6f2
6420645: Create a vm that uses compressed oops for up to 32gb heapsizes
coleenp
parents:
0
diff
changeset
|
3708 __ movl(c_rarg1, r14); // second arg: exec_mode |
| 0 | 3709 __ call(RuntimeAddress(CAST_FROM_FN_PTR(address, Deoptimization::unpack_frames))); |
|
4057
1feb272af3a7
6636110: unaligned stackpointer leads to crash during deoptimization
never
parents:
3931
diff
changeset
|
3710 // Revert SP alignment after call since we're going to do some SP relative addressing below |
|
1feb272af3a7
6636110: unaligned stackpointer leads to crash during deoptimization
never
parents:
3931
diff
changeset
|
3711 __ movptr(rsp, Address(r15_thread, JavaThread::last_Java_sp_offset())); |
| 0 | 3712 |
| 3713 // Set an oopmap for the call site | |
|
4057
1feb272af3a7
6636110: unaligned stackpointer leads to crash during deoptimization
never
parents:
3931
diff
changeset
|
3714 // Use the same PC we used for the last java frame |
|
1feb272af3a7
6636110: unaligned stackpointer leads to crash during deoptimization
never
parents:
3931
diff
changeset
|
3715 oop_maps->add_gc_map(the_pc - start, |
| 0 | 3716 new OopMap( frame_size_in_words, 0 )); |
| 3717 | |
|
4057
1feb272af3a7
6636110: unaligned stackpointer leads to crash during deoptimization
never
parents:
3931
diff
changeset
|
3718 // Clear fp AND pc |
|
1feb272af3a7
6636110: unaligned stackpointer leads to crash during deoptimization
never
parents:
3931
diff
changeset
|
3719 __ reset_last_Java_frame(true, true); |
| 0 | 3720 |
| 3721 // Collect return values | |
| 3722 __ movdbl(xmm0, Address(rsp, RegisterSaver::xmm0_offset_in_bytes())); | |
| 304 | 3723 __ movptr(rax, Address(rsp, RegisterSaver::rax_offset_in_bytes())); |
| 3724 // I think this is useless (throwing pc?) | |
| 3725 __ movptr(rdx, Address(rsp, RegisterSaver::rdx_offset_in_bytes())); | |
| 0 | 3726 |
| 3727 // Pop self-frame. | |
| 3728 __ leave(); // Epilog | |
| 3729 | |
| 3730 // Jump to interpreter | |
| 3731 __ ret(0); | |
| 3732 | |
| 3733 // Make sure all code is generated | |
| 3734 masm->flush(); | |
| 3735 | |
| 304 | 3736 _deopt_blob = DeoptimizationBlob::create(&buffer, oop_maps, 0, exception_offset, reexecute_offset, frame_size_in_words); |
| 3737 _deopt_blob->set_unpack_with_exception_in_tls_offset(exception_in_tls_offset); | |
|
4985
0d2a2797a61f
2 more #ifdef GRAAL
Thomas Wuerthinger <thomas.wuerthinger@oracle.com>
parents:
4984
diff
changeset
|
3738 #ifdef GRAAL |
|
19462
33a783b15758
made use of Graal stubs instead of equivalent HotSpot stubs optional and off by default
Doug Simon <doug.simon@oracle.com>
parents:
18041
diff
changeset
|
3739 _deopt_blob->set_uncommon_trap_offset(uncommon_trap_offset); |
|
5111
422c979ff392
fixed two cases where DeoptAction was invalid
Christian Haeubl <christian.haeubl@oracle.com>
parents:
5109
diff
changeset
|
3740 _deopt_blob->set_implicit_exception_uncommon_trap_offset(implicit_exception_uncommon_trap_offset); |
|
4985
0d2a2797a61f
2 more #ifdef GRAAL
Thomas Wuerthinger <thomas.wuerthinger@oracle.com>
parents:
4984
diff
changeset
|
3741 #endif |
| 0 | 3742 } |
| 3743 | |
| 3744 #ifdef COMPILER2 | |
| 3745 //------------------------------generate_uncommon_trap_blob-------------------- | |
| 3746 void SharedRuntime::generate_uncommon_trap_blob() { | |
| 3747 // Allocate space for the code | |
| 3748 ResourceMark rm; | |
| 3749 // Setup code generation tools | |
| 3750 CodeBuffer buffer("uncommon_trap_blob", 2048, 1024); | |
| 3751 MacroAssembler* masm = new MacroAssembler(&buffer); | |
| 3752 | |
| 3753 assert(SimpleRuntimeFrame::framesize % 4 == 0, "sp not 16-byte aligned"); | |
| 3754 | |
| 3755 address start = __ pc(); | |
| 3756 | |
| 17780 | 3757 if (UseRTMLocking) { |
| 3758 // Abort RTM transaction before possible nmethod deoptimization. | |
| 3759 __ xabort(0); | |
| 3760 } | |
| 3761 | |
| 0 | 3762 // Push self-frame. We get here with a return address on the |
| 3763 // stack, so rsp is 8-byte aligned until we allocate our frame. | |
| 304 | 3764 __ subptr(rsp, SimpleRuntimeFrame::return_off << LogBytesPerInt); // Epilog! |
| 0 | 3765 |
| 3766 // No callee saved registers. rbp is assumed implicitly saved | |
| 304 | 3767 __ movptr(Address(rsp, SimpleRuntimeFrame::rbp_off << LogBytesPerInt), rbp); |
| 0 | 3768 |
| 3769 // compiler left unloaded_class_index in j_rarg0 move to where the | |
| 3770 // runtime expects it. | |
| 3771 __ movl(c_rarg1, j_rarg0); | |
| 3772 | |
| 3773 __ set_last_Java_frame(noreg, noreg, NULL); | |
| 3774 | |
| 3775 // Call C code. Need thread but NOT official VM entry | |
| 3776 // crud. We cannot block on this call, no GC can happen. Call should | |
| 3777 // capture callee-saved registers as well as return values. | |
| 3778 // Thread is in rdi already. | |
| 3779 // | |
| 3780 // UnrollBlock* uncommon_trap(JavaThread* thread, jint unloaded_class_index); | |
| 3781 | |
| 304 | 3782 __ mov(c_rarg0, r15_thread); |
| 0 | 3783 __ call(RuntimeAddress(CAST_FROM_FN_PTR(address, Deoptimization::uncommon_trap))); |
| 3784 | |
| 3785 // Set an oopmap for the call site | |
| 3786 OopMapSet* oop_maps = new OopMapSet(); | |
| 3787 OopMap* map = new OopMap(SimpleRuntimeFrame::framesize, 0); | |
| 3788 | |
| 3789 // location of rbp is known implicitly by the frame sender code | |
| 3790 | |
| 3791 oop_maps->add_gc_map(__ pc() - start, map); | |
| 3792 | |
| 3793 __ reset_last_Java_frame(false, false); | |
| 3794 | |
| 3795 // Load UnrollBlock* into rdi | |
| 304 | 3796 __ mov(rdi, rax); |
| 0 | 3797 |
| 3798 // Pop all the frames we must move/replace. | |
| 3799 // | |
| 3800 // Frame picture (youngest to oldest) | |
| 3801 // 1: self-frame (no frame link) | |
| 3802 // 2: deopting frame (no frame link) | |
| 3803 // 3: caller of deopting frame (could be compiled/interpreted). | |
| 3804 | |
| 3805 // Pop self-frame. We have no frame, and must rely only on rax and rsp. | |
| 304 | 3806 __ addptr(rsp, (SimpleRuntimeFrame::framesize - 2) << LogBytesPerInt); // Epilog! |
| 0 | 3807 |
| 3808 // Pop deoptimized frame (int) | |
| 3809 __ movl(rcx, Address(rdi, | |
| 3810 Deoptimization::UnrollBlock:: | |
| 3811 size_of_deoptimized_frame_offset_in_bytes())); | |
| 304 | 3812 __ addptr(rsp, rcx); |
| 0 | 3813 |
| 3814 // rsp should be pointing at the return address to the caller (3) | |
| 3815 | |
|
13384
fca8f4799229
8028308: nsk regression, assert(obj->is_oop()) failed: not an oop
roland
parents:
10998
diff
changeset
|
3816 // Pick up the initial fp we should save |
|
fca8f4799229
8028308: nsk regression, assert(obj->is_oop()) failed: not an oop
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parents:
10998
diff
changeset
|
3817 // restore rbp before stack bang because if stack overflow is thrown it needs to be pushed (and preserved) |
|
fca8f4799229
8028308: nsk regression, assert(obj->is_oop()) failed: not an oop
roland
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10998
diff
changeset
|
3818 __ movptr(rbp, Address(rdi, Deoptimization::UnrollBlock::initial_info_offset_in_bytes())); |
|
fca8f4799229
8028308: nsk regression, assert(obj->is_oop()) failed: not an oop
roland
parents:
10998
diff
changeset
|
3819 |
|
17980
0bf37f737702
8032410: compiler/uncommontrap/TestStackBangRbp.java times out on Solaris-Sparc V9
roland
parents:
17850
diff
changeset
|
3820 #ifdef ASSERT |
|
0bf37f737702
8032410: compiler/uncommontrap/TestStackBangRbp.java times out on Solaris-Sparc V9
roland
parents:
17850
diff
changeset
|
3821 // Compilers generate code that bang the stack by as much as the |
|
0bf37f737702
8032410: compiler/uncommontrap/TestStackBangRbp.java times out on Solaris-Sparc V9
roland
parents:
17850
diff
changeset
|
3822 // interpreter would need. So this stack banging should never |
|
0bf37f737702
8032410: compiler/uncommontrap/TestStackBangRbp.java times out on Solaris-Sparc V9
roland
parents:
17850
diff
changeset
|
3823 // trigger a fault. Verify that it does not on non product builds. |
| 0 | 3824 if (UseStackBanging) { |
| 3825 __ movl(rbx, Address(rdi ,Deoptimization::UnrollBlock::total_frame_sizes_offset_in_bytes())); | |
| 3826 __ bang_stack_size(rbx, rcx); | |
| 3827 } | |
|
17980
0bf37f737702
8032410: compiler/uncommontrap/TestStackBangRbp.java times out on Solaris-Sparc V9
roland
parents:
17850
diff
changeset
|
3828 #endif |
| 0 | 3829 |
| 3830 // Load address of array of frame pcs into rcx (address*) | |
|
13384
fca8f4799229
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10998
diff
changeset
|
3831 __ movptr(rcx, Address(rdi, Deoptimization::UnrollBlock::frame_pcs_offset_in_bytes())); |
| 0 | 3832 |
| 3833 // Trash the return pc | |
| 304 | 3834 __ addptr(rsp, wordSize); |
| 0 | 3835 |
| 3836 // Load address of array of frame sizes into rsi (intptr_t*) | |
|
13384
fca8f4799229
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roland
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10998
diff
changeset
|
3837 __ movptr(rsi, Address(rdi, Deoptimization::UnrollBlock:: frame_sizes_offset_in_bytes())); |
| 0 | 3838 |
| 3839 // Counter | |
|
13384
fca8f4799229
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roland
parents:
10998
diff
changeset
|
3840 __ movl(rdx, Address(rdi, Deoptimization::UnrollBlock:: number_of_frames_offset_in_bytes())); // (int) |
| 0 | 3841 |
| 3842 // Now adjust the caller's stack to make up for the extra locals but | |
| 3843 // record the original sp so that we can save it in the skeletal | |
| 3844 // interpreter frame and the stack walking of interpreter_sender | |
| 3845 // will get the unextended sp value and not the "real" sp value. | |
| 3846 | |
| 3847 const Register sender_sp = r8; | |
| 3848 | |
| 304 | 3849 __ mov(sender_sp, rsp); |
|
13384
fca8f4799229
8028308: nsk regression, assert(obj->is_oop()) failed: not an oop
roland
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10998
diff
changeset
|
3850 __ movl(rbx, Address(rdi, Deoptimization::UnrollBlock:: caller_adjustment_offset_in_bytes())); // (int) |
| 304 | 3851 __ subptr(rsp, rbx); |
| 0 | 3852 |
| 3853 // Push interpreter frames in a loop | |
| 3854 Label loop; | |
| 3855 __ bind(loop); | |
| 304 | 3856 __ movptr(rbx, Address(rsi, 0)); // Load frame size |
| 3857 __ subptr(rbx, 2 * wordSize); // We'll push pc and rbp by hand | |
| 3858 __ pushptr(Address(rcx, 0)); // Save return address | |
| 3859 __ enter(); // Save old & set new rbp | |
| 3860 __ subptr(rsp, rbx); // Prolog | |
|
520
52a431267315
6791168: Fix invalid code in bytecodeInterpreter that can cause gcc ICE
coleenp
parents:
304
diff
changeset
|
3861 #ifdef CC_INTERP |
|
52a431267315
6791168: Fix invalid code in bytecodeInterpreter that can cause gcc ICE
coleenp
parents:
304
diff
changeset
|
3862 __ movptr(Address(rbp, |
|
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|
3863 -(sizeof(BytecodeInterpreter)) + in_bytes(byte_offset_of(BytecodeInterpreter, _sender_sp))), |
|
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|
3864 sender_sp); // Make it walkable |
|
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|
3865 #else // CC_INTERP |
| 304 | 3866 __ movptr(Address(rbp, frame::interpreter_frame_sender_sp_offset * wordSize), |
| 3867 sender_sp); // Make it walkable | |
| 0 | 3868 // This value is corrected by layout_activation_impl |
| 304 | 3869 __ movptr(Address(rbp, frame::interpreter_frame_last_sp_offset * wordSize), (int32_t)NULL_WORD ); |
|
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|
3870 #endif // CC_INTERP |
| 304 | 3871 __ mov(sender_sp, rsp); // Pass sender_sp to next frame |
| 3872 __ addptr(rsi, wordSize); // Bump array pointer (sizes) | |
| 3873 __ addptr(rcx, wordSize); // Bump array pointer (pcs) | |
| 3874 __ decrementl(rdx); // Decrement counter | |
| 0 | 3875 __ jcc(Assembler::notZero, loop); |
| 304 | 3876 __ pushptr(Address(rcx, 0)); // Save final return address |
| 0 | 3877 |
| 3878 // Re-push self-frame | |
| 3879 __ enter(); // Save old & set new rbp | |
| 304 | 3880 __ subptr(rsp, (SimpleRuntimeFrame::framesize - 4) << LogBytesPerInt); |
| 0 | 3881 // Prolog |
| 3882 | |
| 3883 // Use rbp because the frames look interpreted now | |
|
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|
3884 // Save "the_pc" since it cannot easily be retrieved using the last_java_SP after we aligned SP. |
|
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|
3885 // Don't need the precise return PC here, just precise enough to point into this code blob. |
|
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|
3886 address the_pc = __ pc(); |
|
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|
3887 __ set_last_Java_frame(noreg, rbp, the_pc); |
| 0 | 3888 |
| 3889 // Call C code. Need thread but NOT official VM entry | |
| 3890 // crud. We cannot block on this call, no GC can happen. Call should | |
| 3891 // restore return values to their stack-slots with the new SP. | |
| 3892 // Thread is in rdi already. | |
| 3893 // | |
| 3894 // BasicType unpack_frames(JavaThread* thread, int exec_mode); | |
| 3895 | |
|
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|
3896 __ andptr(rsp, -(StackAlignmentInBytes)); // Align SP as required by ABI |
| 304 | 3897 __ mov(c_rarg0, r15_thread); |
| 0 | 3898 __ movl(c_rarg1, Deoptimization::Unpack_uncommon_trap); |
| 3899 __ call(RuntimeAddress(CAST_FROM_FN_PTR(address, Deoptimization::unpack_frames))); | |
| 3900 | |
| 3901 // Set an oopmap for the call site | |
|
4057
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|
3902 // Use the same PC we used for the last java frame |
|
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|
3903 oop_maps->add_gc_map(the_pc - start, new OopMap(SimpleRuntimeFrame::framesize, 0)); |
|
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|
3904 |
|
1feb272af3a7
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|
3905 // Clear fp AND pc |
|
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|
3906 __ reset_last_Java_frame(true, true); |
| 0 | 3907 |
| 3908 // Pop self-frame. | |
| 3909 __ leave(); // Epilog | |
| 3910 | |
| 3911 // Jump to interpreter | |
| 3912 __ ret(0); | |
| 3913 | |
| 3914 // Make sure all code is generated | |
| 3915 masm->flush(); | |
| 3916 | |
| 3917 _uncommon_trap_blob = UncommonTrapBlob::create(&buffer, oop_maps, | |
| 3918 SimpleRuntimeFrame::framesize >> 1); | |
| 3919 } | |
| 3920 #endif // COMPILER2 | |
| 3921 | |
| 3922 | |
| 3923 //------------------------------generate_handler_blob------ | |
| 3924 // | |
| 3925 // Generate a special Compile2Runtime blob that saves all registers, | |
| 3926 // and setup oopmap. | |
| 3927 // | |
|
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|
3928 SafepointBlob* SharedRuntime::generate_handler_blob(address call_ptr, int poll_type) { |
| 0 | 3929 assert(StubRoutines::forward_exception_entry() != NULL, |
| 3930 "must be generated before"); | |
| 3931 | |
| 3932 ResourceMark rm; | |
| 3933 OopMapSet *oop_maps = new OopMapSet(); | |
| 3934 OopMap* map; | |
| 3935 | |
| 3936 // Allocate space for the code. Setup code generation tools. | |
| 3937 CodeBuffer buffer("handler_blob", 2048, 1024); | |
| 3938 MacroAssembler* masm = new MacroAssembler(&buffer); | |
| 3939 | |
| 3940 address start = __ pc(); | |
| 3941 address call_pc = NULL; | |
| 3942 int frame_size_in_words; | |
|
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|
3943 bool cause_return = (poll_type == POLL_AT_RETURN); |
|
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|
3944 bool save_vectors = (poll_type == POLL_AT_VECTOR_LOOP); |
| 0 | 3945 |
| 17780 | 3946 if (UseRTMLocking) { |
| 3947 // Abort RTM transaction before calling runtime | |
| 3948 // because critical section will be large and will be | |
| 3949 // aborted anyway. Also nmethod could be deoptimized. | |
| 3950 __ xabort(0); | |
| 3951 } | |
| 3952 | |
| 0 | 3953 // Make room for return address (or push it again) |
| 3954 if (!cause_return) { | |
| 304 | 3955 __ push(rbx); |
| 0 | 3956 } |
| 3957 | |
| 3958 // Save registers, fpu state, and flags | |
|
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|
3959 map = RegisterSaver::save_live_registers(masm, 0, &frame_size_in_words, save_vectors); |
| 0 | 3960 |
| 3961 // The following is basically a call_VM. However, we need the precise | |
| 3962 // address of the call in order to generate an oopmap. Hence, we do all the | |
| 3963 // work outselves. | |
| 3964 | |
| 3965 __ set_last_Java_frame(noreg, noreg, NULL); | |
| 3966 | |
| 3967 // The return address must always be correct so that frame constructor never | |
| 3968 // sees an invalid pc. | |
| 3969 | |
| 3970 if (!cause_return) { | |
| 3971 // overwrite the dummy value we pushed on entry | |
| 304 | 3972 __ movptr(c_rarg0, Address(r15_thread, JavaThread::saved_exception_pc_offset())); |
| 3973 __ movptr(Address(rbp, wordSize), c_rarg0); | |
| 0 | 3974 } |
| 3975 | |
| 3976 // Do the call | |
| 304 | 3977 __ mov(c_rarg0, r15_thread); |
| 0 | 3978 __ call(RuntimeAddress(call_ptr)); |
| 3979 | |
| 3980 // Set an oopmap for the call site. This oopmap will map all | |
| 3981 // oop-registers and debug-info registers as callee-saved. This | |
| 3982 // will allow deoptimization at this safepoint to find all possible | |
| 3983 // debug-info recordings, as well as let GC find all oops. | |
| 3984 | |
| 3985 oop_maps->add_gc_map( __ pc() - start, map); | |
| 3986 | |
| 3987 Label noException; | |
| 3988 | |
| 3989 __ reset_last_Java_frame(false, false); | |
| 3990 | |
| 304 | 3991 __ cmpptr(Address(r15_thread, Thread::pending_exception_offset()), (int32_t)NULL_WORD); |
| 0 | 3992 __ jcc(Assembler::equal, noException); |
| 3993 | |
| 3994 // Exception pending | |
| 3995 | |
|
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|
3996 RegisterSaver::restore_live_registers(masm, save_vectors); |
| 0 | 3997 |
| 3998 __ jump(RuntimeAddress(StubRoutines::forward_exception_entry())); | |
| 3999 | |
| 4000 // No exception case | |
| 4001 __ bind(noException); | |
| 4002 | |
| 4003 // Normal exit, restore registers and exit. | |
|
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|
4004 RegisterSaver::restore_live_registers(masm, save_vectors); |
| 0 | 4005 |
| 4006 __ ret(0); | |
| 4007 | |
| 4008 // Make sure all code is generated | |
| 4009 masm->flush(); | |
| 4010 | |
| 4011 // Fill-out other meta info | |
| 4012 return SafepointBlob::create(&buffer, oop_maps, frame_size_in_words); | |
| 4013 } | |
| 4014 | |
| 4015 // | |
| 4016 // generate_resolve_blob - call resolution (static/virtual/opt-virtual/ic-miss | |
| 4017 // | |
| 4018 // Generate a stub that calls into vm to find out the proper destination | |
| 4019 // of a java call. All the argument registers are live at this point | |
| 4020 // but since this is generic code we don't know what they are and the caller | |
| 4021 // must do any gc of the args. | |
| 4022 // | |
|
3442
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7045514: SPARC assembly code for JSR 292 ricochet frames
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3363
diff
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|
4023 RuntimeStub* SharedRuntime::generate_resolve_blob(address destination, const char* name) { |
| 0 | 4024 assert (StubRoutines::forward_exception_entry() != NULL, "must be generated before"); |
| 4025 | |
| 4026 // allocate space for the code | |
| 4027 ResourceMark rm; | |
| 4028 | |
| 4029 CodeBuffer buffer(name, 1000, 512); | |
| 4030 MacroAssembler* masm = new MacroAssembler(&buffer); | |
| 4031 | |
| 4032 int frame_size_in_words; | |
| 4033 | |
| 4034 OopMapSet *oop_maps = new OopMapSet(); | |
| 4035 OopMap* map = NULL; | |
| 4036 | |
| 4037 int start = __ offset(); | |
| 4038 | |
| 4039 map = RegisterSaver::save_live_registers(masm, 0, &frame_size_in_words); | |
| 4040 | |
| 4041 int frame_complete = __ offset(); | |
| 4042 | |
| 4043 __ set_last_Java_frame(noreg, noreg, NULL); | |
| 4044 | |
| 304 | 4045 __ mov(c_rarg0, r15_thread); |
| 0 | 4046 |
| 4047 __ call(RuntimeAddress(destination)); | |
| 4048 | |
| 4049 | |
| 4050 // Set an oopmap for the call site. | |
| 4051 // We need this not only for callee-saved registers, but also for volatile | |
| 4052 // registers that the compiler might be keeping live across a safepoint. | |
| 4053 | |
| 4054 oop_maps->add_gc_map( __ offset() - start, map); | |
| 4055 | |
| 4056 // rax contains the address we are going to jump to assuming no exception got installed | |
| 4057 | |
| 4058 // clear last_Java_sp | |
| 4059 __ reset_last_Java_frame(false, false); | |
| 4060 // check for pending exceptions | |
| 4061 Label pending; | |
| 304 | 4062 __ cmpptr(Address(r15_thread, Thread::pending_exception_offset()), (int32_t)NULL_WORD); |
| 0 | 4063 __ jcc(Assembler::notEqual, pending); |
| 4064 | |
|
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|
4065 // get the returned Method* |
|
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|
4066 __ get_vm_result_2(rbx, r15_thread); |
| 304 | 4067 __ movptr(Address(rsp, RegisterSaver::rbx_offset_in_bytes()), rbx); |
| 4068 | |
| 4069 __ movptr(Address(rsp, RegisterSaver::rax_offset_in_bytes()), rax); | |
| 0 | 4070 |
| 4071 RegisterSaver::restore_live_registers(masm); | |
| 4072 | |
| 4073 // We are back the the original state on entry and ready to go. | |
| 4074 | |
| 4075 __ jmp(rax); | |
| 4076 | |
| 4077 // Pending exception after the safepoint | |
| 4078 | |
| 4079 __ bind(pending); | |
| 4080 | |
| 4081 RegisterSaver::restore_live_registers(masm); | |
| 4082 | |
| 4083 // exception pending => remove activation and forward to exception handler | |
| 4084 | |
| 4085 __ movptr(Address(r15_thread, JavaThread::vm_result_offset()), (int)NULL_WORD); | |
| 4086 | |
| 304 | 4087 __ movptr(rax, Address(r15_thread, Thread::pending_exception_offset())); |
| 0 | 4088 __ jump(RuntimeAddress(StubRoutines::forward_exception_entry())); |
| 4089 | |
| 4090 // ------------- | |
| 4091 // make sure all code is generated | |
| 4092 masm->flush(); | |
| 4093 | |
| 4094 // return the blob | |
| 4095 // frame_size_words or bytes?? | |
| 4096 return RuntimeStub::new_runtime_stub(name, &buffer, frame_complete, frame_size_in_words, oop_maps, true); | |
| 4097 } | |
| 4098 | |
| 4099 | |
| 4100 #ifdef COMPILER2 | |
| 4101 // This is here instead of runtime_x86_64.cpp because it uses SimpleRuntimeFrame | |
| 4102 // | |
| 4103 //------------------------------generate_exception_blob--------------------------- | |
| 4104 // creates exception blob at the end | |
| 4105 // Using exception blob, this code is jumped from a compiled method. | |
| 4106 // (see emit_exception_handler in x86_64.ad file) | |
| 4107 // | |
| 4108 // Given an exception pc at a call we call into the runtime for the | |
| 4109 // handler in this method. This handler might merely restore state | |
| 4110 // (i.e. callee save registers) unwind the frame and jump to the | |
| 4111 // exception handler for the nmethod if there is no Java level handler | |
| 4112 // for the nmethod. | |
| 4113 // | |
| 4114 // This code is entered with a jmp. | |
| 4115 // | |
| 4116 // Arguments: | |
| 4117 // rax: exception oop | |
| 4118 // rdx: exception pc | |
| 4119 // | |
| 4120 // Results: | |
| 4121 // rax: exception oop | |
| 4122 // rdx: exception pc in caller or ??? | |
| 4123 // destination: exception handler of caller | |
| 4124 // | |
| 4125 // Note: the exception pc MUST be at a call (precise debug information) | |
| 4126 // Registers rax, rdx, rcx, rsi, rdi, r8-r11 are not callee saved. | |
| 4127 // | |
| 4128 | |
| 4129 void OptoRuntime::generate_exception_blob() { | |
| 4130 assert(!OptoRuntime::is_callee_saved_register(RDX_num), ""); | |
| 4131 assert(!OptoRuntime::is_callee_saved_register(RAX_num), ""); | |
| 4132 assert(!OptoRuntime::is_callee_saved_register(RCX_num), ""); | |
| 4133 | |
| 4134 assert(SimpleRuntimeFrame::framesize % 4 == 0, "sp not 16-byte aligned"); | |
| 4135 | |
| 4136 // Allocate space for the code | |
| 4137 ResourceMark rm; | |
| 4138 // Setup code generation tools | |
| 4139 CodeBuffer buffer("exception_blob", 2048, 1024); | |
| 4140 MacroAssembler* masm = new MacroAssembler(&buffer); | |
| 4141 | |
| 4142 | |
| 4143 address start = __ pc(); | |
| 4144 | |
| 4145 // Exception pc is 'return address' for stack walker | |
| 304 | 4146 __ push(rdx); |
| 4147 __ subptr(rsp, SimpleRuntimeFrame::return_off << LogBytesPerInt); // Prolog | |
| 0 | 4148 |
| 4149 // Save callee-saved registers. See x86_64.ad. | |
| 4150 | |
| 4151 // rbp is an implicitly saved callee saved register (i.e. the calling | |
| 4152 // convention will save restore it in prolog/epilog) Other than that | |
| 4153 // there are no callee save registers now that adapter frames are gone. | |
| 4154 | |
| 304 | 4155 __ movptr(Address(rsp, SimpleRuntimeFrame::rbp_off << LogBytesPerInt), rbp); |
| 0 | 4156 |
| 4157 // Store exception in Thread object. We cannot pass any arguments to the | |
| 4158 // handle_exception call, since we do not want to make any assumption | |
| 4159 // about the size of the frame where the exception happened in. | |
| 4160 // c_rarg0 is either rdi (Linux) or rcx (Windows). | |
| 304 | 4161 __ movptr(Address(r15_thread, JavaThread::exception_oop_offset()),rax); |
| 4162 __ movptr(Address(r15_thread, JavaThread::exception_pc_offset()), rdx); | |
| 0 | 4163 |
| 4164 // This call does all the hard work. It checks if an exception handler | |
| 4165 // exists in the method. | |
| 4166 // If so, it returns the handler address. | |
| 4167 // If not, it prepares for stack-unwinding, restoring the callee-save | |
| 4168 // registers of the frame being removed. | |
| 4169 // | |
| 4170 // address OptoRuntime::handle_exception_C(JavaThread* thread) | |
| 4171 | |
|
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|
4172 // At a method handle call, the stack may not be properly aligned |
|
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7148486: At a method handle call returning with an exception may call the runtime with misaligned stack (x64)
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|
4173 // when returning with an exception. |
|
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7148486: At a method handle call returning with an exception may call the runtime with misaligned stack (x64)
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4873
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|
4174 address the_pc = __ pc(); |
|
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|
4175 __ set_last_Java_frame(noreg, noreg, the_pc); |
| 304 | 4176 __ mov(c_rarg0, r15_thread); |
|
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|
4177 __ andptr(rsp, -(StackAlignmentInBytes)); // Align stack |
| 0 | 4178 __ call(RuntimeAddress(CAST_FROM_FN_PTR(address, OptoRuntime::handle_exception_C))); |
| 4179 | |
| 4180 // Set an oopmap for the call site. This oopmap will only be used if we | |
| 4181 // are unwinding the stack. Hence, all locations will be dead. | |
| 4182 // Callee-saved registers will be the same as the frame above (i.e., | |
| 4183 // handle_exception_stub), since they were restored when we got the | |
| 4184 // exception. | |
| 4185 | |
| 4186 OopMapSet* oop_maps = new OopMapSet(); | |
| 4187 | |
|
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|
4188 oop_maps->add_gc_map(the_pc - start, new OopMap(SimpleRuntimeFrame::framesize, 0)); |
|
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|
4189 |
|
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|
4190 __ reset_last_Java_frame(false, true); |
| 0 | 4191 |
| 4192 // Restore callee-saved registers | |
| 4193 | |
| 4194 // rbp is an implicitly saved callee saved register (i.e. the calling | |
| 4195 // convention will save restore it in prolog/epilog) Other than that | |
| 4196 // there are no callee save registers no that adapter frames are gone. | |
| 4197 | |
| 304 | 4198 __ movptr(rbp, Address(rsp, SimpleRuntimeFrame::rbp_off << LogBytesPerInt)); |
| 4199 | |
| 4200 __ addptr(rsp, SimpleRuntimeFrame::return_off << LogBytesPerInt); // Epilog | |
| 4201 __ pop(rdx); // No need for exception pc anymore | |
| 0 | 4202 |
| 4203 // rax: exception handler | |
| 4204 | |
|
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1187
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|
4205 // Restore SP from BP if the exception PC is a MethodHandle call site. |
|
93767e6a2dfd
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|
4206 __ cmpl(Address(r15_thread, JavaThread::is_method_handle_return_offset()), 0); |
| 1567 | 4207 __ cmovptr(Assembler::notEqual, rsp, rbp_mh_SP_save); |
|
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|
4208 |
| 0 | 4209 // We have a handler in rax (could be deopt blob). |
| 304 | 4210 __ mov(r8, rax); |
| 0 | 4211 |
| 4212 // Get the exception oop | |
| 304 | 4213 __ movptr(rax, Address(r15_thread, JavaThread::exception_oop_offset())); |
| 0 | 4214 // Get the exception pc in case we are deoptimized |
| 304 | 4215 __ movptr(rdx, Address(r15_thread, JavaThread::exception_pc_offset())); |
| 0 | 4216 #ifdef ASSERT |
| 4217 __ movptr(Address(r15_thread, JavaThread::exception_handler_pc_offset()), (int)NULL_WORD); | |
| 4218 __ movptr(Address(r15_thread, JavaThread::exception_pc_offset()), (int)NULL_WORD); | |
| 4219 #endif | |
| 4220 // Clear the exception oop so GC no longer processes it as a root. | |
| 4221 __ movptr(Address(r15_thread, JavaThread::exception_oop_offset()), (int)NULL_WORD); | |
| 4222 | |
| 4223 // rax: exception oop | |
| 4224 // r8: exception handler | |
| 4225 // rdx: exception pc | |
| 4226 // Jump to handler | |
| 4227 | |
| 4228 __ jmp(r8); | |
| 4229 | |
| 4230 // Make sure all code is generated | |
| 4231 masm->flush(); | |
| 4232 | |
| 4233 // Set exception blob | |
| 4234 _exception_blob = ExceptionBlob::create(&buffer, oop_maps, SimpleRuntimeFrame::framesize >> 1); | |
| 4235 } | |
| 4236 #endif // COMPILER2 |