Mercurial > hg > graal-jvmci-8
annotate src/share/vm/c1/c1_LIR.cpp @ 23660:b5f3a471e646
Merge.
author | Doug Simon <doug.simon@oracle.com> |
---|---|
date | Wed, 01 Jun 2016 00:11:44 +0200 |
parents | e8260b6328fb |
children |
rev | line source |
---|---|
0 | 1 /* |
22851
ddce0b7cee93
8072383: resolve conflicts between open and closed ports
dlong
parents:
17945
diff
changeset
|
2 * Copyright (c) 2000, 2015, Oracle and/or its affiliates. All rights reserved. |
0 | 3 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. |
4 * | |
5 * This code is free software; you can redistribute it and/or modify it | |
6 * under the terms of the GNU General Public License version 2 only, as | |
7 * published by the Free Software Foundation. | |
8 * | |
9 * This code is distributed in the hope that it will be useful, but WITHOUT | |
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or | |
11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License | |
12 * version 2 for more details (a copy is included in the LICENSE file that | |
13 * accompanied this code). | |
14 * | |
15 * You should have received a copy of the GNU General Public License version | |
16 * 2 along with this work; if not, write to the Free Software Foundation, | |
17 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA. | |
18 * | |
1552
c18cbe5936b8
6941466: Oracle rebranding changes for Hotspot repositories
trims
parents:
1378
diff
changeset
|
19 * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA |
c18cbe5936b8
6941466: Oracle rebranding changes for Hotspot repositories
trims
parents:
1378
diff
changeset
|
20 * or visit www.oracle.com if you need additional information or have any |
c18cbe5936b8
6941466: Oracle rebranding changes for Hotspot repositories
trims
parents:
1378
diff
changeset
|
21 * questions. |
0 | 22 * |
23 */ | |
24 | |
1972 | 25 #include "precompiled.hpp" |
26 #include "c1/c1_InstructionPrinter.hpp" | |
27 #include "c1/c1_LIR.hpp" | |
28 #include "c1/c1_LIRAssembler.hpp" | |
29 #include "c1/c1_ValueStack.hpp" | |
30 #include "ci/ciInstance.hpp" | |
31 #include "runtime/sharedRuntime.hpp" | |
0 | 32 |
33 Register LIR_OprDesc::as_register() const { | |
34 return FrameMap::cpu_rnr2reg(cpu_regnr()); | |
35 } | |
36 | |
37 Register LIR_OprDesc::as_register_lo() const { | |
38 return FrameMap::cpu_rnr2reg(cpu_regnrLo()); | |
39 } | |
40 | |
41 Register LIR_OprDesc::as_register_hi() const { | |
42 return FrameMap::cpu_rnr2reg(cpu_regnrHi()); | |
43 } | |
44 | |
304 | 45 #if defined(X86) |
0 | 46 |
47 XMMRegister LIR_OprDesc::as_xmm_float_reg() const { | |
48 return FrameMap::nr2xmmreg(xmm_regnr()); | |
49 } | |
50 | |
51 XMMRegister LIR_OprDesc::as_xmm_double_reg() const { | |
52 assert(xmm_regnrLo() == xmm_regnrHi(), "assumed in calculation"); | |
53 return FrameMap::nr2xmmreg(xmm_regnrLo()); | |
54 } | |
55 | |
304 | 56 #endif // X86 |
0 | 57 |
1681
126ea7725993
6953477: Increase portability and flexibility of building Hotspot
bobv
parents:
1579
diff
changeset
|
58 #if defined(SPARC) || defined(PPC) |
0 | 59 |
60 FloatRegister LIR_OprDesc::as_float_reg() const { | |
61 return FrameMap::nr2floatreg(fpu_regnr()); | |
62 } | |
63 | |
64 FloatRegister LIR_OprDesc::as_double_reg() const { | |
65 return FrameMap::nr2floatreg(fpu_regnrHi()); | |
66 } | |
67 | |
68 #endif | |
69 | |
1681
126ea7725993
6953477: Increase portability and flexibility of building Hotspot
bobv
parents:
1579
diff
changeset
|
70 #ifdef ARM |
126ea7725993
6953477: Increase portability and flexibility of building Hotspot
bobv
parents:
1579
diff
changeset
|
71 |
126ea7725993
6953477: Increase portability and flexibility of building Hotspot
bobv
parents:
1579
diff
changeset
|
72 FloatRegister LIR_OprDesc::as_float_reg() const { |
126ea7725993
6953477: Increase portability and flexibility of building Hotspot
bobv
parents:
1579
diff
changeset
|
73 return as_FloatRegister(fpu_regnr()); |
126ea7725993
6953477: Increase portability and flexibility of building Hotspot
bobv
parents:
1579
diff
changeset
|
74 } |
126ea7725993
6953477: Increase portability and flexibility of building Hotspot
bobv
parents:
1579
diff
changeset
|
75 |
126ea7725993
6953477: Increase portability and flexibility of building Hotspot
bobv
parents:
1579
diff
changeset
|
76 FloatRegister LIR_OprDesc::as_double_reg() const { |
126ea7725993
6953477: Increase portability and flexibility of building Hotspot
bobv
parents:
1579
diff
changeset
|
77 return as_FloatRegister(fpu_regnrLo()); |
126ea7725993
6953477: Increase portability and flexibility of building Hotspot
bobv
parents:
1579
diff
changeset
|
78 } |
126ea7725993
6953477: Increase portability and flexibility of building Hotspot
bobv
parents:
1579
diff
changeset
|
79 |
126ea7725993
6953477: Increase portability and flexibility of building Hotspot
bobv
parents:
1579
diff
changeset
|
80 #endif |
126ea7725993
6953477: Increase portability and flexibility of building Hotspot
bobv
parents:
1579
diff
changeset
|
81 |
126ea7725993
6953477: Increase portability and flexibility of building Hotspot
bobv
parents:
1579
diff
changeset
|
82 |
0 | 83 LIR_Opr LIR_OprFact::illegalOpr = LIR_OprFact::illegal(); |
84 | |
85 LIR_Opr LIR_OprFact::value_type(ValueType* type) { | |
86 ValueTag tag = type->tag(); | |
87 switch (tag) { | |
6725
da91efe96a93
6964458: Reimplement class meta-data storage to use native memory
coleenp
parents:
6084
diff
changeset
|
88 case metaDataTag : { |
0 | 89 ClassConstant* c = type->as_ClassConstant(); |
90 if (c != NULL && !c->value()->is_loaded()) { | |
6725
da91efe96a93
6964458: Reimplement class meta-data storage to use native memory
coleenp
parents:
6084
diff
changeset
|
91 return LIR_OprFact::metadataConst(NULL); |
6739
8a02ca5e5576
7195816: NPG: Crash in c1_ValueType - ShouldNotReachHere
roland
parents:
6725
diff
changeset
|
92 } else if (c != NULL) { |
8a02ca5e5576
7195816: NPG: Crash in c1_ValueType - ShouldNotReachHere
roland
parents:
6725
diff
changeset
|
93 return LIR_OprFact::metadataConst(c->value()->constant_encoding()); |
0 | 94 } else { |
6739
8a02ca5e5576
7195816: NPG: Crash in c1_ValueType - ShouldNotReachHere
roland
parents:
6725
diff
changeset
|
95 MethodConstant* m = type->as_MethodConstant(); |
8a02ca5e5576
7195816: NPG: Crash in c1_ValueType - ShouldNotReachHere
roland
parents:
6725
diff
changeset
|
96 assert (m != NULL, "not a class or a method?"); |
8a02ca5e5576
7195816: NPG: Crash in c1_ValueType - ShouldNotReachHere
roland
parents:
6725
diff
changeset
|
97 return LIR_OprFact::metadataConst(m->value()->constant_encoding()); |
6725
da91efe96a93
6964458: Reimplement class meta-data storage to use native memory
coleenp
parents:
6084
diff
changeset
|
98 } |
da91efe96a93
6964458: Reimplement class meta-data storage to use native memory
coleenp
parents:
6084
diff
changeset
|
99 } |
da91efe96a93
6964458: Reimplement class meta-data storage to use native memory
coleenp
parents:
6084
diff
changeset
|
100 case objectTag : { |
0 | 101 return LIR_OprFact::oopConst(type->as_ObjectType()->encoding()); |
102 } | |
1297
c466efa608d5
6932496: c1: deoptimization of jsr subroutine fails on sparcv9
roland
parents:
1295
diff
changeset
|
103 case addressTag: return LIR_OprFact::addressConst(type->as_AddressConstant()->value()); |
0 | 104 case intTag : return LIR_OprFact::intConst(type->as_IntConstant()->value()); |
105 case floatTag : return LIR_OprFact::floatConst(type->as_FloatConstant()->value()); | |
106 case longTag : return LIR_OprFact::longConst(type->as_LongConstant()->value()); | |
107 case doubleTag : return LIR_OprFact::doubleConst(type->as_DoubleConstant()->value()); | |
304 | 108 default: ShouldNotReachHere(); return LIR_OprFact::intConst(-1); |
0 | 109 } |
110 } | |
111 | |
112 | |
113 LIR_Opr LIR_OprFact::dummy_value_type(ValueType* type) { | |
114 switch (type->tag()) { | |
115 case objectTag: return LIR_OprFact::oopConst(NULL); | |
1297
c466efa608d5
6932496: c1: deoptimization of jsr subroutine fails on sparcv9
roland
parents:
1295
diff
changeset
|
116 case addressTag:return LIR_OprFact::addressConst(0); |
0 | 117 case intTag: return LIR_OprFact::intConst(0); |
118 case floatTag: return LIR_OprFact::floatConst(0.0); | |
119 case longTag: return LIR_OprFact::longConst(0); | |
120 case doubleTag: return LIR_OprFact::doubleConst(0.0); | |
304 | 121 default: ShouldNotReachHere(); return LIR_OprFact::intConst(-1); |
0 | 122 } |
123 return illegalOpr; | |
124 } | |
125 | |
126 | |
127 | |
128 //--------------------------------------------------- | |
129 | |
130 | |
131 LIR_Address::Scale LIR_Address::scale(BasicType type) { | |
29
d5fc211aea19
6633953: type2aelembytes{T_ADDRESS} should be 8 bytes in 64 bit VM
kvn
parents:
0
diff
changeset
|
132 int elem_size = type2aelembytes(type); |
0 | 133 switch (elem_size) { |
134 case 1: return LIR_Address::times_1; | |
135 case 2: return LIR_Address::times_2; | |
136 case 4: return LIR_Address::times_4; | |
137 case 8: return LIR_Address::times_8; | |
138 } | |
139 ShouldNotReachHere(); | |
140 return LIR_Address::times_1; | |
141 } | |
142 | |
143 | |
144 #ifndef PRODUCT | |
22851
ddce0b7cee93
8072383: resolve conflicts between open and closed ports
dlong
parents:
17945
diff
changeset
|
145 void LIR_Address::verify0() const { |
1681
126ea7725993
6953477: Increase portability and flexibility of building Hotspot
bobv
parents:
1579
diff
changeset
|
146 #if defined(SPARC) || defined(PPC) |
126ea7725993
6953477: Increase portability and flexibility of building Hotspot
bobv
parents:
1579
diff
changeset
|
147 assert(scale() == times_1, "Scaled addressing mode not available on SPARC/PPC and should not be used"); |
0 | 148 assert(disp() == 0 || index()->is_illegal(), "can't have both"); |
149 #endif | |
150 #ifdef _LP64 | |
151 assert(base()->is_cpu_register(), "wrong base operand"); | |
152 assert(index()->is_illegal() || index()->is_double_cpu(), "wrong index operand"); | |
6725
da91efe96a93
6964458: Reimplement class meta-data storage to use native memory
coleenp
parents:
6084
diff
changeset
|
153 assert(base()->type() == T_OBJECT || base()->type() == T_LONG || base()->type() == T_METADATA, |
0 | 154 "wrong type for addresses"); |
155 #else | |
156 assert(base()->is_single_cpu(), "wrong base operand"); | |
157 assert(index()->is_illegal() || index()->is_single_cpu(), "wrong index operand"); | |
6725
da91efe96a93
6964458: Reimplement class meta-data storage to use native memory
coleenp
parents:
6084
diff
changeset
|
158 assert(base()->type() == T_OBJECT || base()->type() == T_INT || base()->type() == T_METADATA, |
0 | 159 "wrong type for addresses"); |
160 #endif | |
161 } | |
162 #endif | |
163 | |
164 | |
165 //--------------------------------------------------- | |
166 | |
167 char LIR_OprDesc::type_char(BasicType t) { | |
168 switch (t) { | |
169 case T_ARRAY: | |
170 t = T_OBJECT; | |
171 case T_BOOLEAN: | |
172 case T_CHAR: | |
173 case T_FLOAT: | |
174 case T_DOUBLE: | |
175 case T_BYTE: | |
176 case T_SHORT: | |
177 case T_INT: | |
178 case T_LONG: | |
179 case T_OBJECT: | |
180 case T_ADDRESS: | |
181 case T_VOID: | |
182 return ::type2char(t); | |
12969
9acbfe04b5c3
8026495: JVM Crashes when started with -XX:+DTraceMethodProbes on Solaris x86_64
iveresov
parents:
12875
diff
changeset
|
183 case T_METADATA: |
9acbfe04b5c3
8026495: JVM Crashes when started with -XX:+DTraceMethodProbes on Solaris x86_64
iveresov
parents:
12875
diff
changeset
|
184 return 'M'; |
0 | 185 case T_ILLEGAL: |
186 return '?'; | |
187 | |
188 default: | |
189 ShouldNotReachHere(); | |
304 | 190 return '?'; |
0 | 191 } |
192 } | |
193 | |
194 #ifndef PRODUCT | |
195 void LIR_OprDesc::validate_type() const { | |
196 | |
197 #ifdef ASSERT | |
198 if (!is_pointer() && !is_illegal()) { | |
11004
87a6f2df28e2
8002160: Compilation issue with adlc using latest SunStudio compilers
drchase
parents:
9156
diff
changeset
|
199 OprKind kindfield = kind_field(); // Factored out because of compiler bug, see 8002160 |
0 | 200 switch (as_BasicType(type_field())) { |
201 case T_LONG: | |
11004
87a6f2df28e2
8002160: Compilation issue with adlc using latest SunStudio compilers
drchase
parents:
9156
diff
changeset
|
202 assert((kindfield == cpu_register || kindfield == stack_value) && |
1681
126ea7725993
6953477: Increase portability and flexibility of building Hotspot
bobv
parents:
1579
diff
changeset
|
203 size_field() == double_size, "must match"); |
0 | 204 break; |
205 case T_FLOAT: | |
1681
126ea7725993
6953477: Increase portability and flexibility of building Hotspot
bobv
parents:
1579
diff
changeset
|
206 // FP return values can be also in CPU registers on ARM and PPC (softfp ABI) |
11004
87a6f2df28e2
8002160: Compilation issue with adlc using latest SunStudio compilers
drchase
parents:
9156
diff
changeset
|
207 assert((kindfield == fpu_register || kindfield == stack_value |
87a6f2df28e2
8002160: Compilation issue with adlc using latest SunStudio compilers
drchase
parents:
9156
diff
changeset
|
208 ARM_ONLY(|| kindfield == cpu_register) |
87a6f2df28e2
8002160: Compilation issue with adlc using latest SunStudio compilers
drchase
parents:
9156
diff
changeset
|
209 PPC_ONLY(|| kindfield == cpu_register) ) && |
1681
126ea7725993
6953477: Increase portability and flexibility of building Hotspot
bobv
parents:
1579
diff
changeset
|
210 size_field() == single_size, "must match"); |
0 | 211 break; |
212 case T_DOUBLE: | |
1681
126ea7725993
6953477: Increase portability and flexibility of building Hotspot
bobv
parents:
1579
diff
changeset
|
213 // FP return values can be also in CPU registers on ARM and PPC (softfp ABI) |
11004
87a6f2df28e2
8002160: Compilation issue with adlc using latest SunStudio compilers
drchase
parents:
9156
diff
changeset
|
214 assert((kindfield == fpu_register || kindfield == stack_value |
87a6f2df28e2
8002160: Compilation issue with adlc using latest SunStudio compilers
drchase
parents:
9156
diff
changeset
|
215 ARM_ONLY(|| kindfield == cpu_register) |
87a6f2df28e2
8002160: Compilation issue with adlc using latest SunStudio compilers
drchase
parents:
9156
diff
changeset
|
216 PPC_ONLY(|| kindfield == cpu_register) ) && |
1681
126ea7725993
6953477: Increase portability and flexibility of building Hotspot
bobv
parents:
1579
diff
changeset
|
217 size_field() == double_size, "must match"); |
0 | 218 break; |
219 case T_BOOLEAN: | |
220 case T_CHAR: | |
221 case T_BYTE: | |
222 case T_SHORT: | |
223 case T_INT: | |
1816
87b64980e2f1
6972540: sun/nio/ch/SocketChannelImpl compilation crashed when executing CompileTheWorld
never
parents:
1791
diff
changeset
|
224 case T_ADDRESS: |
0 | 225 case T_OBJECT: |
6725
da91efe96a93
6964458: Reimplement class meta-data storage to use native memory
coleenp
parents:
6084
diff
changeset
|
226 case T_METADATA: |
0 | 227 case T_ARRAY: |
11004
87a6f2df28e2
8002160: Compilation issue with adlc using latest SunStudio compilers
drchase
parents:
9156
diff
changeset
|
228 assert((kindfield == cpu_register || kindfield == stack_value) && |
1681
126ea7725993
6953477: Increase portability and flexibility of building Hotspot
bobv
parents:
1579
diff
changeset
|
229 size_field() == single_size, "must match"); |
0 | 230 break; |
231 | |
232 case T_ILLEGAL: | |
233 // XXX TKR also means unknown right now | |
234 // assert(is_illegal(), "must match"); | |
235 break; | |
236 | |
237 default: | |
238 ShouldNotReachHere(); | |
239 } | |
240 } | |
241 #endif | |
242 | |
243 } | |
244 #endif // PRODUCT | |
245 | |
246 | |
247 bool LIR_OprDesc::is_oop() const { | |
248 if (is_pointer()) { | |
249 return pointer()->is_oop_pointer(); | |
250 } else { | |
251 OprType t= type_field(); | |
252 assert(t != unknown_type, "not set"); | |
253 return t == object_type; | |
254 } | |
255 } | |
256 | |
257 | |
258 | |
259 void LIR_Op2::verify() const { | |
260 #ifdef ASSERT | |
261 switch (code()) { | |
262 case lir_cmove: | |
6795
7eca5de9e0b6
7023898: Intrinsify AtomicLongFieldUpdater.getAndIncrement()
roland
parents:
6739
diff
changeset
|
263 case lir_xchg: |
0 | 264 break; |
265 | |
266 default: | |
267 assert(!result_opr()->is_register() || !result_opr()->is_oop_register(), | |
268 "can't produce oops from arith"); | |
269 } | |
270 | |
271 if (TwoOperandLIRForm) { | |
272 switch (code()) { | |
273 case lir_add: | |
274 case lir_sub: | |
275 case lir_mul: | |
276 case lir_mul_strictfp: | |
277 case lir_div: | |
278 case lir_div_strictfp: | |
279 case lir_rem: | |
280 case lir_logic_and: | |
281 case lir_logic_or: | |
282 case lir_logic_xor: | |
283 case lir_shl: | |
284 case lir_shr: | |
285 assert(in_opr1() == result_opr(), "opr1 and result must match"); | |
286 assert(in_opr1()->is_valid() && in_opr2()->is_valid(), "must be valid"); | |
287 break; | |
288 | |
289 // special handling for lir_ushr because of write barriers | |
290 case lir_ushr: | |
291 assert(in_opr1() == result_opr() || in_opr2()->is_constant(), "opr1 and result must match or shift count is constant"); | |
292 assert(in_opr1()->is_valid() && in_opr2()->is_valid(), "must be valid"); | |
293 break; | |
294 | |
295 } | |
296 } | |
297 #endif | |
298 } | |
299 | |
300 | |
301 LIR_OpBranch::LIR_OpBranch(LIR_Condition cond, BasicType type, BlockBegin* block) | |
302 : LIR_Op(lir_branch, LIR_OprFact::illegalOpr, (CodeEmitInfo*)NULL) | |
303 , _cond(cond) | |
304 , _type(type) | |
305 , _label(block->label()) | |
306 , _block(block) | |
307 , _ublock(NULL) | |
308 , _stub(NULL) { | |
309 } | |
310 | |
311 LIR_OpBranch::LIR_OpBranch(LIR_Condition cond, BasicType type, CodeStub* stub) : | |
312 LIR_Op(lir_branch, LIR_OprFact::illegalOpr, (CodeEmitInfo*)NULL) | |
313 , _cond(cond) | |
314 , _type(type) | |
315 , _label(stub->entry()) | |
316 , _block(NULL) | |
317 , _ublock(NULL) | |
318 , _stub(stub) { | |
319 } | |
320 | |
321 LIR_OpBranch::LIR_OpBranch(LIR_Condition cond, BasicType type, BlockBegin* block, BlockBegin* ublock) | |
322 : LIR_Op(lir_cond_float_branch, LIR_OprFact::illegalOpr, (CodeEmitInfo*)NULL) | |
323 , _cond(cond) | |
324 , _type(type) | |
325 , _label(block->label()) | |
326 , _block(block) | |
327 , _ublock(ublock) | |
328 , _stub(NULL) | |
329 { | |
330 } | |
331 | |
332 void LIR_OpBranch::change_block(BlockBegin* b) { | |
333 assert(_block != NULL, "must have old block"); | |
334 assert(_block->label() == label(), "must be equal"); | |
335 | |
336 _block = b; | |
337 _label = b->label(); | |
338 } | |
339 | |
340 void LIR_OpBranch::change_ublock(BlockBegin* b) { | |
341 assert(_ublock != NULL, "must have old block"); | |
342 _ublock = b; | |
343 } | |
344 | |
345 void LIR_OpBranch::negate_cond() { | |
346 switch (_cond) { | |
347 case lir_cond_equal: _cond = lir_cond_notEqual; break; | |
348 case lir_cond_notEqual: _cond = lir_cond_equal; break; | |
349 case lir_cond_less: _cond = lir_cond_greaterEqual; break; | |
350 case lir_cond_lessEqual: _cond = lir_cond_greater; break; | |
351 case lir_cond_greaterEqual: _cond = lir_cond_less; break; | |
352 case lir_cond_greater: _cond = lir_cond_lessEqual; break; | |
353 default: ShouldNotReachHere(); | |
354 } | |
355 } | |
356 | |
357 | |
358 LIR_OpTypeCheck::LIR_OpTypeCheck(LIR_Code code, LIR_Opr result, LIR_Opr object, ciKlass* klass, | |
359 LIR_Opr tmp1, LIR_Opr tmp2, LIR_Opr tmp3, | |
360 bool fast_check, CodeEmitInfo* info_for_exception, CodeEmitInfo* info_for_patch, | |
1783 | 361 CodeStub* stub) |
362 | |
0 | 363 : LIR_Op(code, result, NULL) |
364 , _object(object) | |
365 , _array(LIR_OprFact::illegalOpr) | |
366 , _klass(klass) | |
367 , _tmp1(tmp1) | |
368 , _tmp2(tmp2) | |
369 , _tmp3(tmp3) | |
370 , _fast_check(fast_check) | |
371 , _stub(stub) | |
372 , _info_for_patch(info_for_patch) | |
373 , _info_for_exception(info_for_exception) | |
1783 | 374 , _profiled_method(NULL) |
375 , _profiled_bci(-1) | |
376 , _should_profile(false) | |
377 { | |
0 | 378 if (code == lir_checkcast) { |
379 assert(info_for_exception != NULL, "checkcast throws exceptions"); | |
380 } else if (code == lir_instanceof) { | |
381 assert(info_for_exception == NULL, "instanceof throws no exceptions"); | |
382 } else { | |
383 ShouldNotReachHere(); | |
384 } | |
385 } | |
386 | |
387 | |
388 | |
1783 | 389 LIR_OpTypeCheck::LIR_OpTypeCheck(LIR_Code code, LIR_Opr object, LIR_Opr array, LIR_Opr tmp1, LIR_Opr tmp2, LIR_Opr tmp3, CodeEmitInfo* info_for_exception) |
0 | 390 : LIR_Op(code, LIR_OprFact::illegalOpr, NULL) |
391 , _object(object) | |
392 , _array(array) | |
393 , _klass(NULL) | |
394 , _tmp1(tmp1) | |
395 , _tmp2(tmp2) | |
396 , _tmp3(tmp3) | |
397 , _fast_check(false) | |
398 , _stub(NULL) | |
399 , _info_for_patch(NULL) | |
400 , _info_for_exception(info_for_exception) | |
1783 | 401 , _profiled_method(NULL) |
402 , _profiled_bci(-1) | |
403 , _should_profile(false) | |
404 { | |
0 | 405 if (code == lir_store_check) { |
2168
e4fee0bdaa85
7008809: should report the class in ArrayStoreExceptions from compiled code
never
parents:
2002
diff
changeset
|
406 _stub = new ArrayStoreExceptionStub(object, info_for_exception); |
0 | 407 assert(info_for_exception != NULL, "store_check throws exceptions"); |
408 } else { | |
409 ShouldNotReachHere(); | |
410 } | |
411 } | |
412 | |
413 | |
414 LIR_OpArrayCopy::LIR_OpArrayCopy(LIR_Opr src, LIR_Opr src_pos, LIR_Opr dst, LIR_Opr dst_pos, LIR_Opr length, | |
415 LIR_Opr tmp, ciArrayKlass* expected_type, int flags, CodeEmitInfo* info) | |
416 : LIR_Op(lir_arraycopy, LIR_OprFact::illegalOpr, info) | |
417 , _tmp(tmp) | |
418 , _src(src) | |
419 , _src_pos(src_pos) | |
420 , _dst(dst) | |
421 , _dst_pos(dst_pos) | |
422 , _flags(flags) | |
423 , _expected_type(expected_type) | |
424 , _length(length) { | |
425 _stub = new ArrayCopyStub(this); | |
426 } | |
427 | |
11080
b800986664f4
7088419: Use x86 Hardware CRC32 Instruction with java.util.zip.CRC32
drchase
parents:
11004
diff
changeset
|
428 LIR_OpUpdateCRC32::LIR_OpUpdateCRC32(LIR_Opr crc, LIR_Opr val, LIR_Opr res) |
b800986664f4
7088419: Use x86 Hardware CRC32 Instruction with java.util.zip.CRC32
drchase
parents:
11004
diff
changeset
|
429 : LIR_Op(lir_updatecrc32, res, NULL) |
b800986664f4
7088419: Use x86 Hardware CRC32 Instruction with java.util.zip.CRC32
drchase
parents:
11004
diff
changeset
|
430 , _crc(crc) |
b800986664f4
7088419: Use x86 Hardware CRC32 Instruction with java.util.zip.CRC32
drchase
parents:
11004
diff
changeset
|
431 , _val(val) { |
b800986664f4
7088419: Use x86 Hardware CRC32 Instruction with java.util.zip.CRC32
drchase
parents:
11004
diff
changeset
|
432 } |
0 | 433 |
434 //-------------------verify-------------------------- | |
435 | |
436 void LIR_Op1::verify() const { | |
437 switch(code()) { | |
438 case lir_move: | |
439 assert(in_opr()->is_valid() && result_opr()->is_valid(), "must be"); | |
440 break; | |
441 case lir_null_check: | |
442 assert(in_opr()->is_register(), "must be"); | |
443 break; | |
444 case lir_return: | |
445 assert(in_opr()->is_register() || in_opr()->is_illegal(), "must be"); | |
446 break; | |
447 } | |
448 } | |
449 | |
450 void LIR_OpRTCall::verify() const { | |
451 assert(strcmp(Runtime1::name_for_address(addr()), "<unknown function>") != 0, "unknown function"); | |
452 } | |
453 | |
454 //-------------------visits-------------------------- | |
455 | |
456 // complete rework of LIR instruction visitor. | |
23050
e8260b6328fb
8068945: Use RBP register as proper frame pointer in JIT compiled code on x86
zmajo
parents:
22851
diff
changeset
|
457 // The virtual call for each instruction type is replaced by a big |
0 | 458 // switch that adds the operands for each instruction |
459 | |
460 void LIR_OpVisitState::visit(LIR_Op* op) { | |
461 // copy information from the LIR_Op | |
462 reset(); | |
463 set_op(op); | |
464 | |
465 switch (op->code()) { | |
466 | |
467 // LIR_Op0 | |
468 case lir_word_align: // result and info always invalid | |
469 case lir_backwardbranch_target: // result and info always invalid | |
470 case lir_build_frame: // result and info always invalid | |
471 case lir_fpop_raw: // result and info always invalid | |
472 case lir_24bit_FPU: // result and info always invalid | |
473 case lir_reset_FPU: // result and info always invalid | |
474 case lir_breakpoint: // result and info always invalid | |
475 case lir_membar: // result and info always invalid | |
476 case lir_membar_acquire: // result and info always invalid | |
477 case lir_membar_release: // result and info always invalid | |
4966
701a83c86f28
7120481: storeStore barrier in constructor with final field
jiangli
parents:
4765
diff
changeset
|
478 case lir_membar_loadload: // result and info always invalid |
701a83c86f28
7120481: storeStore barrier in constructor with final field
jiangli
parents:
4765
diff
changeset
|
479 case lir_membar_storestore: // result and info always invalid |
701a83c86f28
7120481: storeStore barrier in constructor with final field
jiangli
parents:
4765
diff
changeset
|
480 case lir_membar_loadstore: // result and info always invalid |
701a83c86f28
7120481: storeStore barrier in constructor with final field
jiangli
parents:
4765
diff
changeset
|
481 case lir_membar_storeload: // result and info always invalid |
0 | 482 { |
483 assert(op->as_Op0() != NULL, "must be"); | |
484 assert(op->_info == NULL, "info not used by this instruction"); | |
485 assert(op->_result->is_illegal(), "not used"); | |
486 break; | |
487 } | |
488 | |
489 case lir_nop: // may have info, result always invalid | |
490 case lir_std_entry: // may have result, info always invalid | |
491 case lir_osr_entry: // may have result, info always invalid | |
492 case lir_get_thread: // may have result, info always invalid | |
493 { | |
494 assert(op->as_Op0() != NULL, "must be"); | |
495 if (op->_info != NULL) do_info(op->_info); | |
496 if (op->_result->is_valid()) do_output(op->_result); | |
497 break; | |
498 } | |
499 | |
500 | |
501 // LIR_OpLabel | |
502 case lir_label: // result and info always invalid | |
503 { | |
504 assert(op->as_OpLabel() != NULL, "must be"); | |
505 assert(op->_info == NULL, "info not used by this instruction"); | |
506 assert(op->_result->is_illegal(), "not used"); | |
507 break; | |
508 } | |
509 | |
510 | |
511 // LIR_Op1 | |
512 case lir_fxch: // input always valid, result and info always invalid | |
513 case lir_fld: // input always valid, result and info always invalid | |
514 case lir_ffree: // input always valid, result and info always invalid | |
515 case lir_push: // input always valid, result and info always invalid | |
516 case lir_pop: // input always valid, result and info always invalid | |
517 case lir_return: // input always valid, result and info always invalid | |
518 case lir_leal: // input and result always valid, info always invalid | |
519 case lir_neg: // input and result always valid, info always invalid | |
520 case lir_monaddr: // input and result always valid, info always invalid | |
521 case lir_null_check: // input and info always valid, result always invalid | |
522 case lir_move: // input and result always valid, may have info | |
1783 | 523 case lir_pack64: // input and result always valid |
524 case lir_unpack64: // input and result always valid | |
0 | 525 case lir_prefetchr: // input always valid, result and info always invalid |
526 case lir_prefetchw: // input always valid, result and info always invalid | |
527 { | |
528 assert(op->as_Op1() != NULL, "must be"); | |
529 LIR_Op1* op1 = (LIR_Op1*)op; | |
530 | |
531 if (op1->_info) do_info(op1->_info); | |
532 if (op1->_opr->is_valid()) do_input(op1->_opr); | |
533 if (op1->_result->is_valid()) do_output(op1->_result); | |
534 | |
535 break; | |
536 } | |
537 | |
538 case lir_safepoint: | |
539 { | |
540 assert(op->as_Op1() != NULL, "must be"); | |
541 LIR_Op1* op1 = (LIR_Op1*)op; | |
542 | |
543 assert(op1->_info != NULL, ""); do_info(op1->_info); | |
544 if (op1->_opr->is_valid()) do_temp(op1->_opr); // safepoints on SPARC need temporary register | |
545 assert(op1->_result->is_illegal(), "safepoint does not produce value"); | |
546 | |
547 break; | |
548 } | |
549 | |
550 // LIR_OpConvert; | |
551 case lir_convert: // input and result always valid, info always invalid | |
552 { | |
553 assert(op->as_OpConvert() != NULL, "must be"); | |
554 LIR_OpConvert* opConvert = (LIR_OpConvert*)op; | |
555 | |
556 assert(opConvert->_info == NULL, "must be"); | |
557 if (opConvert->_opr->is_valid()) do_input(opConvert->_opr); | |
558 if (opConvert->_result->is_valid()) do_output(opConvert->_result); | |
1681
126ea7725993
6953477: Increase portability and flexibility of building Hotspot
bobv
parents:
1579
diff
changeset
|
559 #ifdef PPC |
126ea7725993
6953477: Increase portability and flexibility of building Hotspot
bobv
parents:
1579
diff
changeset
|
560 if (opConvert->_tmp1->is_valid()) do_temp(opConvert->_tmp1); |
126ea7725993
6953477: Increase portability and flexibility of building Hotspot
bobv
parents:
1579
diff
changeset
|
561 if (opConvert->_tmp2->is_valid()) do_temp(opConvert->_tmp2); |
126ea7725993
6953477: Increase portability and flexibility of building Hotspot
bobv
parents:
1579
diff
changeset
|
562 #endif |
0 | 563 do_stub(opConvert->_stub); |
564 | |
565 break; | |
566 } | |
567 | |
568 // LIR_OpBranch; | |
569 case lir_branch: // may have info, input and result register always invalid | |
570 case lir_cond_float_branch: // may have info, input and result register always invalid | |
571 { | |
572 assert(op->as_OpBranch() != NULL, "must be"); | |
573 LIR_OpBranch* opBranch = (LIR_OpBranch*)op; | |
574 | |
575 if (opBranch->_info != NULL) do_info(opBranch->_info); | |
576 assert(opBranch->_result->is_illegal(), "not used"); | |
577 if (opBranch->_stub != NULL) opBranch->stub()->visit(this); | |
578 | |
579 break; | |
580 } | |
581 | |
582 | |
583 // LIR_OpAllocObj | |
584 case lir_alloc_object: | |
585 { | |
586 assert(op->as_OpAllocObj() != NULL, "must be"); | |
587 LIR_OpAllocObj* opAllocObj = (LIR_OpAllocObj*)op; | |
588 | |
589 if (opAllocObj->_info) do_info(opAllocObj->_info); | |
1681
126ea7725993
6953477: Increase portability and flexibility of building Hotspot
bobv
parents:
1579
diff
changeset
|
590 if (opAllocObj->_opr->is_valid()) { do_input(opAllocObj->_opr); |
126ea7725993
6953477: Increase portability and flexibility of building Hotspot
bobv
parents:
1579
diff
changeset
|
591 do_temp(opAllocObj->_opr); |
126ea7725993
6953477: Increase portability and flexibility of building Hotspot
bobv
parents:
1579
diff
changeset
|
592 } |
0 | 593 if (opAllocObj->_tmp1->is_valid()) do_temp(opAllocObj->_tmp1); |
594 if (opAllocObj->_tmp2->is_valid()) do_temp(opAllocObj->_tmp2); | |
595 if (opAllocObj->_tmp3->is_valid()) do_temp(opAllocObj->_tmp3); | |
596 if (opAllocObj->_tmp4->is_valid()) do_temp(opAllocObj->_tmp4); | |
597 if (opAllocObj->_result->is_valid()) do_output(opAllocObj->_result); | |
598 do_stub(opAllocObj->_stub); | |
599 break; | |
600 } | |
601 | |
602 | |
603 // LIR_OpRoundFP; | |
604 case lir_roundfp: { | |
605 assert(op->as_OpRoundFP() != NULL, "must be"); | |
606 LIR_OpRoundFP* opRoundFP = (LIR_OpRoundFP*)op; | |
607 | |
608 assert(op->_info == NULL, "info not used by this instruction"); | |
609 assert(opRoundFP->_tmp->is_illegal(), "not used"); | |
610 do_input(opRoundFP->_opr); | |
611 do_output(opRoundFP->_result); | |
612 | |
613 break; | |
614 } | |
615 | |
616 | |
617 // LIR_Op2 | |
618 case lir_cmp: | |
619 case lir_cmp_l2i: | |
620 case lir_ucmp_fd2i: | |
621 case lir_cmp_fd2i: | |
622 case lir_add: | |
623 case lir_sub: | |
624 case lir_mul: | |
625 case lir_div: | |
626 case lir_rem: | |
627 case lir_sqrt: | |
628 case lir_abs: | |
629 case lir_logic_and: | |
630 case lir_logic_or: | |
631 case lir_logic_xor: | |
632 case lir_shl: | |
633 case lir_shr: | |
634 case lir_ushr: | |
6795
7eca5de9e0b6
7023898: Intrinsify AtomicLongFieldUpdater.getAndIncrement()
roland
parents:
6739
diff
changeset
|
635 case lir_xadd: |
7eca5de9e0b6
7023898: Intrinsify AtomicLongFieldUpdater.getAndIncrement()
roland
parents:
6739
diff
changeset
|
636 case lir_xchg: |
8860 | 637 case lir_assert: |
0 | 638 { |
639 assert(op->as_Op2() != NULL, "must be"); | |
640 LIR_Op2* op2 = (LIR_Op2*)op; | |
6084
6759698e3140
7133857: exp() and pow() should use the x87 ISA on x86
roland
parents:
4966
diff
changeset
|
641 assert(op2->_tmp2->is_illegal() && op2->_tmp3->is_illegal() && |
6759698e3140
7133857: exp() and pow() should use the x87 ISA on x86
roland
parents:
4966
diff
changeset
|
642 op2->_tmp4->is_illegal() && op2->_tmp5->is_illegal(), "not used"); |
0 | 643 |
644 if (op2->_info) do_info(op2->_info); | |
645 if (op2->_opr1->is_valid()) do_input(op2->_opr1); | |
646 if (op2->_opr2->is_valid()) do_input(op2->_opr2); | |
6084
6759698e3140
7133857: exp() and pow() should use the x87 ISA on x86
roland
parents:
4966
diff
changeset
|
647 if (op2->_tmp1->is_valid()) do_temp(op2->_tmp1); |
0 | 648 if (op2->_result->is_valid()) do_output(op2->_result); |
6795
7eca5de9e0b6
7023898: Intrinsify AtomicLongFieldUpdater.getAndIncrement()
roland
parents:
6739
diff
changeset
|
649 if (op->code() == lir_xchg || op->code() == lir_xadd) { |
7eca5de9e0b6
7023898: Intrinsify AtomicLongFieldUpdater.getAndIncrement()
roland
parents:
6739
diff
changeset
|
650 // on ARM and PPC, return value is loaded first so could |
7eca5de9e0b6
7023898: Intrinsify AtomicLongFieldUpdater.getAndIncrement()
roland
parents:
6739
diff
changeset
|
651 // destroy inputs. On other platforms that implement those |
7eca5de9e0b6
7023898: Intrinsify AtomicLongFieldUpdater.getAndIncrement()
roland
parents:
6739
diff
changeset
|
652 // (x86, sparc), the extra constrainsts are harmless. |
7eca5de9e0b6
7023898: Intrinsify AtomicLongFieldUpdater.getAndIncrement()
roland
parents:
6739
diff
changeset
|
653 if (op2->_opr1->is_valid()) do_temp(op2->_opr1); |
7eca5de9e0b6
7023898: Intrinsify AtomicLongFieldUpdater.getAndIncrement()
roland
parents:
6739
diff
changeset
|
654 if (op2->_opr2->is_valid()) do_temp(op2->_opr2); |
7eca5de9e0b6
7023898: Intrinsify AtomicLongFieldUpdater.getAndIncrement()
roland
parents:
6739
diff
changeset
|
655 } |
0 | 656 |
657 break; | |
658 } | |
659 | |
660 // special handling for cmove: right input operand must not be equal | |
661 // to the result operand, otherwise the backend fails | |
662 case lir_cmove: | |
663 { | |
664 assert(op->as_Op2() != NULL, "must be"); | |
665 LIR_Op2* op2 = (LIR_Op2*)op; | |
666 | |
6084
6759698e3140
7133857: exp() and pow() should use the x87 ISA on x86
roland
parents:
4966
diff
changeset
|
667 assert(op2->_info == NULL && op2->_tmp1->is_illegal() && op2->_tmp2->is_illegal() && |
6759698e3140
7133857: exp() and pow() should use the x87 ISA on x86
roland
parents:
4966
diff
changeset
|
668 op2->_tmp3->is_illegal() && op2->_tmp4->is_illegal() && op2->_tmp5->is_illegal(), "not used"); |
0 | 669 assert(op2->_opr1->is_valid() && op2->_opr2->is_valid() && op2->_result->is_valid(), "used"); |
670 | |
671 do_input(op2->_opr1); | |
672 do_input(op2->_opr2); | |
673 do_temp(op2->_opr2); | |
674 do_output(op2->_result); | |
675 | |
676 break; | |
677 } | |
678 | |
679 // vspecial handling for strict operations: register input operands | |
680 // as temp to guarantee that they do not overlap with other | |
681 // registers | |
682 case lir_mul_strictfp: | |
683 case lir_div_strictfp: | |
684 { | |
685 assert(op->as_Op2() != NULL, "must be"); | |
686 LIR_Op2* op2 = (LIR_Op2*)op; | |
687 | |
688 assert(op2->_info == NULL, "not used"); | |
689 assert(op2->_opr1->is_valid(), "used"); | |
690 assert(op2->_opr2->is_valid(), "used"); | |
691 assert(op2->_result->is_valid(), "used"); | |
6084
6759698e3140
7133857: exp() and pow() should use the x87 ISA on x86
roland
parents:
4966
diff
changeset
|
692 assert(op2->_tmp2->is_illegal() && op2->_tmp3->is_illegal() && |
6759698e3140
7133857: exp() and pow() should use the x87 ISA on x86
roland
parents:
4966
diff
changeset
|
693 op2->_tmp4->is_illegal() && op2->_tmp5->is_illegal(), "not used"); |
0 | 694 |
695 do_input(op2->_opr1); do_temp(op2->_opr1); | |
696 do_input(op2->_opr2); do_temp(op2->_opr2); | |
6084
6759698e3140
7133857: exp() and pow() should use the x87 ISA on x86
roland
parents:
4966
diff
changeset
|
697 if (op2->_tmp1->is_valid()) do_temp(op2->_tmp1); |
0 | 698 do_output(op2->_result); |
699 | |
700 break; | |
701 } | |
702 | |
1378
9f5b60a14736
6939930: exception unwind changes in 6919934 hurts compilation speed
never
parents:
1301
diff
changeset
|
703 case lir_throw: { |
0 | 704 assert(op->as_Op2() != NULL, "must be"); |
705 LIR_Op2* op2 = (LIR_Op2*)op; | |
706 | |
707 if (op2->_info) do_info(op2->_info); | |
708 if (op2->_opr1->is_valid()) do_temp(op2->_opr1); | |
709 if (op2->_opr2->is_valid()) do_input(op2->_opr2); // exception object is input parameter | |
710 assert(op2->_result->is_illegal(), "no result"); | |
6084
6759698e3140
7133857: exp() and pow() should use the x87 ISA on x86
roland
parents:
4966
diff
changeset
|
711 assert(op2->_tmp2->is_illegal() && op2->_tmp3->is_illegal() && |
6759698e3140
7133857: exp() and pow() should use the x87 ISA on x86
roland
parents:
4966
diff
changeset
|
712 op2->_tmp4->is_illegal() && op2->_tmp5->is_illegal(), "not used"); |
0 | 713 |
714 break; | |
715 } | |
716 | |
1378
9f5b60a14736
6939930: exception unwind changes in 6919934 hurts compilation speed
never
parents:
1301
diff
changeset
|
717 case lir_unwind: { |
9f5b60a14736
6939930: exception unwind changes in 6919934 hurts compilation speed
never
parents:
1301
diff
changeset
|
718 assert(op->as_Op1() != NULL, "must be"); |
9f5b60a14736
6939930: exception unwind changes in 6919934 hurts compilation speed
never
parents:
1301
diff
changeset
|
719 LIR_Op1* op1 = (LIR_Op1*)op; |
9f5b60a14736
6939930: exception unwind changes in 6919934 hurts compilation speed
never
parents:
1301
diff
changeset
|
720 |
9f5b60a14736
6939930: exception unwind changes in 6919934 hurts compilation speed
never
parents:
1301
diff
changeset
|
721 assert(op1->_info == NULL, "no info"); |
9f5b60a14736
6939930: exception unwind changes in 6919934 hurts compilation speed
never
parents:
1301
diff
changeset
|
722 assert(op1->_opr->is_valid(), "exception oop"); do_input(op1->_opr); |
9f5b60a14736
6939930: exception unwind changes in 6919934 hurts compilation speed
never
parents:
1301
diff
changeset
|
723 assert(op1->_result->is_illegal(), "no result"); |
9f5b60a14736
6939930: exception unwind changes in 6919934 hurts compilation speed
never
parents:
1301
diff
changeset
|
724 |
9f5b60a14736
6939930: exception unwind changes in 6919934 hurts compilation speed
never
parents:
1301
diff
changeset
|
725 break; |
9f5b60a14736
6939930: exception unwind changes in 6919934 hurts compilation speed
never
parents:
1301
diff
changeset
|
726 } |
9f5b60a14736
6939930: exception unwind changes in 6919934 hurts compilation speed
never
parents:
1301
diff
changeset
|
727 |
0 | 728 |
729 case lir_tan: | |
730 case lir_sin: | |
953
ff1a29907b6c
6855215: Calculation error (NaN) after about 1500 calculations
never
parents:
304
diff
changeset
|
731 case lir_cos: |
ff1a29907b6c
6855215: Calculation error (NaN) after about 1500 calculations
never
parents:
304
diff
changeset
|
732 case lir_log: |
6084
6759698e3140
7133857: exp() and pow() should use the x87 ISA on x86
roland
parents:
4966
diff
changeset
|
733 case lir_log10: |
6759698e3140
7133857: exp() and pow() should use the x87 ISA on x86
roland
parents:
4966
diff
changeset
|
734 case lir_exp: { |
0 | 735 assert(op->as_Op2() != NULL, "must be"); |
736 LIR_Op2* op2 = (LIR_Op2*)op; | |
737 | |
953
ff1a29907b6c
6855215: Calculation error (NaN) after about 1500 calculations
never
parents:
304
diff
changeset
|
738 // On x86 tan/sin/cos need two temporary fpu stack slots and |
ff1a29907b6c
6855215: Calculation error (NaN) after about 1500 calculations
never
parents:
304
diff
changeset
|
739 // log/log10 need one so handle opr2 and tmp as temp inputs. |
ff1a29907b6c
6855215: Calculation error (NaN) after about 1500 calculations
never
parents:
304
diff
changeset
|
740 // Register input operand as temp to guarantee that it doesn't |
ff1a29907b6c
6855215: Calculation error (NaN) after about 1500 calculations
never
parents:
304
diff
changeset
|
741 // overlap with the input. |
0 | 742 assert(op2->_info == NULL, "not used"); |
6084
6759698e3140
7133857: exp() and pow() should use the x87 ISA on x86
roland
parents:
4966
diff
changeset
|
743 assert(op2->_tmp5->is_illegal(), "not used"); |
6759698e3140
7133857: exp() and pow() should use the x87 ISA on x86
roland
parents:
4966
diff
changeset
|
744 assert(op2->_tmp2->is_valid() == (op->code() == lir_exp), "not used"); |
6759698e3140
7133857: exp() and pow() should use the x87 ISA on x86
roland
parents:
4966
diff
changeset
|
745 assert(op2->_tmp3->is_valid() == (op->code() == lir_exp), "not used"); |
6759698e3140
7133857: exp() and pow() should use the x87 ISA on x86
roland
parents:
4966
diff
changeset
|
746 assert(op2->_tmp4->is_valid() == (op->code() == lir_exp), "not used"); |
0 | 747 assert(op2->_opr1->is_valid(), "used"); |
748 do_input(op2->_opr1); do_temp(op2->_opr1); | |
749 | |
750 if (op2->_opr2->is_valid()) do_temp(op2->_opr2); | |
6084
6759698e3140
7133857: exp() and pow() should use the x87 ISA on x86
roland
parents:
4966
diff
changeset
|
751 if (op2->_tmp1->is_valid()) do_temp(op2->_tmp1); |
6759698e3140
7133857: exp() and pow() should use the x87 ISA on x86
roland
parents:
4966
diff
changeset
|
752 if (op2->_tmp2->is_valid()) do_temp(op2->_tmp2); |
6759698e3140
7133857: exp() and pow() should use the x87 ISA on x86
roland
parents:
4966
diff
changeset
|
753 if (op2->_tmp3->is_valid()) do_temp(op2->_tmp3); |
6759698e3140
7133857: exp() and pow() should use the x87 ISA on x86
roland
parents:
4966
diff
changeset
|
754 if (op2->_tmp4->is_valid()) do_temp(op2->_tmp4); |
0 | 755 if (op2->_result->is_valid()) do_output(op2->_result); |
756 | |
757 break; | |
758 } | |
759 | |
6084
6759698e3140
7133857: exp() and pow() should use the x87 ISA on x86
roland
parents:
4966
diff
changeset
|
760 case lir_pow: { |
6759698e3140
7133857: exp() and pow() should use the x87 ISA on x86
roland
parents:
4966
diff
changeset
|
761 assert(op->as_Op2() != NULL, "must be"); |
6759698e3140
7133857: exp() and pow() should use the x87 ISA on x86
roland
parents:
4966
diff
changeset
|
762 LIR_Op2* op2 = (LIR_Op2*)op; |
6759698e3140
7133857: exp() and pow() should use the x87 ISA on x86
roland
parents:
4966
diff
changeset
|
763 |
6759698e3140
7133857: exp() and pow() should use the x87 ISA on x86
roland
parents:
4966
diff
changeset
|
764 // On x86 pow needs two temporary fpu stack slots: tmp1 and |
6759698e3140
7133857: exp() and pow() should use the x87 ISA on x86
roland
parents:
4966
diff
changeset
|
765 // tmp2. Register input operands as temps to guarantee that it |
6759698e3140
7133857: exp() and pow() should use the x87 ISA on x86
roland
parents:
4966
diff
changeset
|
766 // doesn't overlap with the temporary slots. |
6759698e3140
7133857: exp() and pow() should use the x87 ISA on x86
roland
parents:
4966
diff
changeset
|
767 assert(op2->_info == NULL, "not used"); |
6759698e3140
7133857: exp() and pow() should use the x87 ISA on x86
roland
parents:
4966
diff
changeset
|
768 assert(op2->_opr1->is_valid() && op2->_opr2->is_valid(), "used"); |
6759698e3140
7133857: exp() and pow() should use the x87 ISA on x86
roland
parents:
4966
diff
changeset
|
769 assert(op2->_tmp1->is_valid() && op2->_tmp2->is_valid() && op2->_tmp3->is_valid() |
6759698e3140
7133857: exp() and pow() should use the x87 ISA on x86
roland
parents:
4966
diff
changeset
|
770 && op2->_tmp4->is_valid() && op2->_tmp5->is_valid(), "used"); |
6759698e3140
7133857: exp() and pow() should use the x87 ISA on x86
roland
parents:
4966
diff
changeset
|
771 assert(op2->_result->is_valid(), "used"); |
6759698e3140
7133857: exp() and pow() should use the x87 ISA on x86
roland
parents:
4966
diff
changeset
|
772 |
6759698e3140
7133857: exp() and pow() should use the x87 ISA on x86
roland
parents:
4966
diff
changeset
|
773 do_input(op2->_opr1); do_temp(op2->_opr1); |
6759698e3140
7133857: exp() and pow() should use the x87 ISA on x86
roland
parents:
4966
diff
changeset
|
774 do_input(op2->_opr2); do_temp(op2->_opr2); |
6759698e3140
7133857: exp() and pow() should use the x87 ISA on x86
roland
parents:
4966
diff
changeset
|
775 do_temp(op2->_tmp1); |
6759698e3140
7133857: exp() and pow() should use the x87 ISA on x86
roland
parents:
4966
diff
changeset
|
776 do_temp(op2->_tmp2); |
6759698e3140
7133857: exp() and pow() should use the x87 ISA on x86
roland
parents:
4966
diff
changeset
|
777 do_temp(op2->_tmp3); |
6759698e3140
7133857: exp() and pow() should use the x87 ISA on x86
roland
parents:
4966
diff
changeset
|
778 do_temp(op2->_tmp4); |
6759698e3140
7133857: exp() and pow() should use the x87 ISA on x86
roland
parents:
4966
diff
changeset
|
779 do_temp(op2->_tmp5); |
6759698e3140
7133857: exp() and pow() should use the x87 ISA on x86
roland
parents:
4966
diff
changeset
|
780 do_output(op2->_result); |
6759698e3140
7133857: exp() and pow() should use the x87 ISA on x86
roland
parents:
4966
diff
changeset
|
781 |
6759698e3140
7133857: exp() and pow() should use the x87 ISA on x86
roland
parents:
4966
diff
changeset
|
782 break; |
6759698e3140
7133857: exp() and pow() should use the x87 ISA on x86
roland
parents:
4966
diff
changeset
|
783 } |
0 | 784 |
785 // LIR_Op3 | |
786 case lir_idiv: | |
787 case lir_irem: { | |
788 assert(op->as_Op3() != NULL, "must be"); | |
789 LIR_Op3* op3= (LIR_Op3*)op; | |
790 | |
791 if (op3->_info) do_info(op3->_info); | |
792 if (op3->_opr1->is_valid()) do_input(op3->_opr1); | |
793 | |
794 // second operand is input and temp, so ensure that second operand | |
795 // and third operand get not the same register | |
796 if (op3->_opr2->is_valid()) do_input(op3->_opr2); | |
797 if (op3->_opr2->is_valid()) do_temp(op3->_opr2); | |
798 if (op3->_opr3->is_valid()) do_temp(op3->_opr3); | |
799 | |
800 if (op3->_result->is_valid()) do_output(op3->_result); | |
801 | |
802 break; | |
803 } | |
804 | |
805 | |
806 // LIR_OpJavaCall | |
807 case lir_static_call: | |
808 case lir_optvirtual_call: | |
809 case lir_icvirtual_call: | |
1295 | 810 case lir_virtual_call: |
811 case lir_dynamic_call: { | |
812 LIR_OpJavaCall* opJavaCall = op->as_OpJavaCall(); | |
813 assert(opJavaCall != NULL, "must be"); | |
0 | 814 |
815 if (opJavaCall->_receiver->is_valid()) do_input(opJavaCall->_receiver); | |
816 | |
817 // only visit register parameters | |
818 int n = opJavaCall->_arguments->length(); | |
8084
84a926fe53d0
8005722: Assert in c1_LIR.hpp incorrect wrt to number of register operands
bpittore
parents:
7623
diff
changeset
|
819 for (int i = opJavaCall->_receiver->is_valid() ? 1 : 0; i < n; i++) { |
0 | 820 if (!opJavaCall->_arguments->at(i)->is_pointer()) { |
821 do_input(*opJavaCall->_arguments->adr_at(i)); | |
822 } | |
823 } | |
824 | |
825 if (opJavaCall->_info) do_info(opJavaCall->_info); | |
23050
e8260b6328fb
8068945: Use RBP register as proper frame pointer in JIT compiled code on x86
zmajo
parents:
22851
diff
changeset
|
826 if (FrameMap::method_handle_invoke_SP_save_opr() != LIR_OprFact::illegalOpr && |
e8260b6328fb
8068945: Use RBP register as proper frame pointer in JIT compiled code on x86
zmajo
parents:
22851
diff
changeset
|
827 opJavaCall->is_method_handle_invoke()) { |
1564 | 828 opJavaCall->_method_handle_invoke_SP_save_opr = FrameMap::method_handle_invoke_SP_save_opr(); |
829 do_temp(opJavaCall->_method_handle_invoke_SP_save_opr); | |
830 } | |
0 | 831 do_call(); |
832 if (opJavaCall->_result->is_valid()) do_output(opJavaCall->_result); | |
833 | |
834 break; | |
835 } | |
836 | |
837 | |
838 // LIR_OpRTCall | |
839 case lir_rtcall: { | |
840 assert(op->as_OpRTCall() != NULL, "must be"); | |
841 LIR_OpRTCall* opRTCall = (LIR_OpRTCall*)op; | |
842 | |
843 // only visit register parameters | |
844 int n = opRTCall->_arguments->length(); | |
845 for (int i = 0; i < n; i++) { | |
846 if (!opRTCall->_arguments->at(i)->is_pointer()) { | |
847 do_input(*opRTCall->_arguments->adr_at(i)); | |
848 } | |
849 } | |
850 if (opRTCall->_info) do_info(opRTCall->_info); | |
851 if (opRTCall->_tmp->is_valid()) do_temp(opRTCall->_tmp); | |
852 do_call(); | |
853 if (opRTCall->_result->is_valid()) do_output(opRTCall->_result); | |
854 | |
855 break; | |
856 } | |
857 | |
858 | |
859 // LIR_OpArrayCopy | |
860 case lir_arraycopy: { | |
861 assert(op->as_OpArrayCopy() != NULL, "must be"); | |
862 LIR_OpArrayCopy* opArrayCopy = (LIR_OpArrayCopy*)op; | |
863 | |
864 assert(opArrayCopy->_result->is_illegal(), "unused"); | |
865 assert(opArrayCopy->_src->is_valid(), "used"); do_input(opArrayCopy->_src); do_temp(opArrayCopy->_src); | |
866 assert(opArrayCopy->_src_pos->is_valid(), "used"); do_input(opArrayCopy->_src_pos); do_temp(opArrayCopy->_src_pos); | |
867 assert(opArrayCopy->_dst->is_valid(), "used"); do_input(opArrayCopy->_dst); do_temp(opArrayCopy->_dst); | |
868 assert(opArrayCopy->_dst_pos->is_valid(), "used"); do_input(opArrayCopy->_dst_pos); do_temp(opArrayCopy->_dst_pos); | |
869 assert(opArrayCopy->_length->is_valid(), "used"); do_input(opArrayCopy->_length); do_temp(opArrayCopy->_length); | |
870 assert(opArrayCopy->_tmp->is_valid(), "used"); do_temp(opArrayCopy->_tmp); | |
871 if (opArrayCopy->_info) do_info(opArrayCopy->_info); | |
872 | |
873 // the implementation of arraycopy always has a call into the runtime | |
874 do_call(); | |
875 | |
876 break; | |
877 } | |
878 | |
879 | |
11080
b800986664f4
7088419: Use x86 Hardware CRC32 Instruction with java.util.zip.CRC32
drchase
parents:
11004
diff
changeset
|
880 // LIR_OpUpdateCRC32 |
b800986664f4
7088419: Use x86 Hardware CRC32 Instruction with java.util.zip.CRC32
drchase
parents:
11004
diff
changeset
|
881 case lir_updatecrc32: { |
b800986664f4
7088419: Use x86 Hardware CRC32 Instruction with java.util.zip.CRC32
drchase
parents:
11004
diff
changeset
|
882 assert(op->as_OpUpdateCRC32() != NULL, "must be"); |
b800986664f4
7088419: Use x86 Hardware CRC32 Instruction with java.util.zip.CRC32
drchase
parents:
11004
diff
changeset
|
883 LIR_OpUpdateCRC32* opUp = (LIR_OpUpdateCRC32*)op; |
b800986664f4
7088419: Use x86 Hardware CRC32 Instruction with java.util.zip.CRC32
drchase
parents:
11004
diff
changeset
|
884 |
b800986664f4
7088419: Use x86 Hardware CRC32 Instruction with java.util.zip.CRC32
drchase
parents:
11004
diff
changeset
|
885 assert(opUp->_crc->is_valid(), "used"); do_input(opUp->_crc); do_temp(opUp->_crc); |
b800986664f4
7088419: Use x86 Hardware CRC32 Instruction with java.util.zip.CRC32
drchase
parents:
11004
diff
changeset
|
886 assert(opUp->_val->is_valid(), "used"); do_input(opUp->_val); do_temp(opUp->_val); |
b800986664f4
7088419: Use x86 Hardware CRC32 Instruction with java.util.zip.CRC32
drchase
parents:
11004
diff
changeset
|
887 assert(opUp->_result->is_valid(), "used"); do_output(opUp->_result); |
b800986664f4
7088419: Use x86 Hardware CRC32 Instruction with java.util.zip.CRC32
drchase
parents:
11004
diff
changeset
|
888 assert(opUp->_info == NULL, "no info for LIR_OpUpdateCRC32"); |
b800986664f4
7088419: Use x86 Hardware CRC32 Instruction with java.util.zip.CRC32
drchase
parents:
11004
diff
changeset
|
889 |
b800986664f4
7088419: Use x86 Hardware CRC32 Instruction with java.util.zip.CRC32
drchase
parents:
11004
diff
changeset
|
890 break; |
b800986664f4
7088419: Use x86 Hardware CRC32 Instruction with java.util.zip.CRC32
drchase
parents:
11004
diff
changeset
|
891 } |
b800986664f4
7088419: Use x86 Hardware CRC32 Instruction with java.util.zip.CRC32
drchase
parents:
11004
diff
changeset
|
892 |
b800986664f4
7088419: Use x86 Hardware CRC32 Instruction with java.util.zip.CRC32
drchase
parents:
11004
diff
changeset
|
893 |
0 | 894 // LIR_OpLock |
895 case lir_lock: | |
896 case lir_unlock: { | |
897 assert(op->as_OpLock() != NULL, "must be"); | |
898 LIR_OpLock* opLock = (LIR_OpLock*)op; | |
899 | |
900 if (opLock->_info) do_info(opLock->_info); | |
901 | |
902 // TODO: check if these operands really have to be temp | |
903 // (or if input is sufficient). This may have influence on the oop map! | |
904 assert(opLock->_lock->is_valid(), "used"); do_temp(opLock->_lock); | |
905 assert(opLock->_hdr->is_valid(), "used"); do_temp(opLock->_hdr); | |
906 assert(opLock->_obj->is_valid(), "used"); do_temp(opLock->_obj); | |
907 | |
908 if (opLock->_scratch->is_valid()) do_temp(opLock->_scratch); | |
909 assert(opLock->_result->is_illegal(), "unused"); | |
910 | |
911 do_stub(opLock->_stub); | |
912 | |
913 break; | |
914 } | |
915 | |
916 | |
917 // LIR_OpDelay | |
918 case lir_delay_slot: { | |
919 assert(op->as_OpDelay() != NULL, "must be"); | |
920 LIR_OpDelay* opDelay = (LIR_OpDelay*)op; | |
921 | |
922 visit(opDelay->delay_op()); | |
923 break; | |
924 } | |
925 | |
926 // LIR_OpTypeCheck | |
927 case lir_instanceof: | |
928 case lir_checkcast: | |
929 case lir_store_check: { | |
930 assert(op->as_OpTypeCheck() != NULL, "must be"); | |
931 LIR_OpTypeCheck* opTypeCheck = (LIR_OpTypeCheck*)op; | |
932 | |
933 if (opTypeCheck->_info_for_exception) do_info(opTypeCheck->_info_for_exception); | |
934 if (opTypeCheck->_info_for_patch) do_info(opTypeCheck->_info_for_patch); | |
935 if (opTypeCheck->_object->is_valid()) do_input(opTypeCheck->_object); | |
4765
b642b49f9738
7123253: C1: in store check code, usage of registers may be incorrect
roland
parents:
3957
diff
changeset
|
936 if (op->code() == lir_store_check && opTypeCheck->_object->is_valid()) { |
b642b49f9738
7123253: C1: in store check code, usage of registers may be incorrect
roland
parents:
3957
diff
changeset
|
937 do_temp(opTypeCheck->_object); |
b642b49f9738
7123253: C1: in store check code, usage of registers may be incorrect
roland
parents:
3957
diff
changeset
|
938 } |
0 | 939 if (opTypeCheck->_array->is_valid()) do_input(opTypeCheck->_array); |
940 if (opTypeCheck->_tmp1->is_valid()) do_temp(opTypeCheck->_tmp1); | |
941 if (opTypeCheck->_tmp2->is_valid()) do_temp(opTypeCheck->_tmp2); | |
942 if (opTypeCheck->_tmp3->is_valid()) do_temp(opTypeCheck->_tmp3); | |
943 if (opTypeCheck->_result->is_valid()) do_output(opTypeCheck->_result); | |
944 do_stub(opTypeCheck->_stub); | |
945 break; | |
946 } | |
947 | |
948 // LIR_OpCompareAndSwap | |
949 case lir_cas_long: | |
950 case lir_cas_obj: | |
951 case lir_cas_int: { | |
952 assert(op->as_OpCompareAndSwap() != NULL, "must be"); | |
953 LIR_OpCompareAndSwap* opCompareAndSwap = (LIR_OpCompareAndSwap*)op; | |
954 | |
1681
126ea7725993
6953477: Increase portability and flexibility of building Hotspot
bobv
parents:
1579
diff
changeset
|
955 assert(opCompareAndSwap->_addr->is_valid(), "used"); |
126ea7725993
6953477: Increase portability and flexibility of building Hotspot
bobv
parents:
1579
diff
changeset
|
956 assert(opCompareAndSwap->_cmp_value->is_valid(), "used"); |
126ea7725993
6953477: Increase portability and flexibility of building Hotspot
bobv
parents:
1579
diff
changeset
|
957 assert(opCompareAndSwap->_new_value->is_valid(), "used"); |
0 | 958 if (opCompareAndSwap->_info) do_info(opCompareAndSwap->_info); |
1681
126ea7725993
6953477: Increase portability and flexibility of building Hotspot
bobv
parents:
1579
diff
changeset
|
959 do_input(opCompareAndSwap->_addr); |
126ea7725993
6953477: Increase portability and flexibility of building Hotspot
bobv
parents:
1579
diff
changeset
|
960 do_temp(opCompareAndSwap->_addr); |
126ea7725993
6953477: Increase portability and flexibility of building Hotspot
bobv
parents:
1579
diff
changeset
|
961 do_input(opCompareAndSwap->_cmp_value); |
126ea7725993
6953477: Increase portability and flexibility of building Hotspot
bobv
parents:
1579
diff
changeset
|
962 do_temp(opCompareAndSwap->_cmp_value); |
126ea7725993
6953477: Increase portability and flexibility of building Hotspot
bobv
parents:
1579
diff
changeset
|
963 do_input(opCompareAndSwap->_new_value); |
126ea7725993
6953477: Increase portability and flexibility of building Hotspot
bobv
parents:
1579
diff
changeset
|
964 do_temp(opCompareAndSwap->_new_value); |
0 | 965 if (opCompareAndSwap->_tmp1->is_valid()) do_temp(opCompareAndSwap->_tmp1); |
966 if (opCompareAndSwap->_tmp2->is_valid()) do_temp(opCompareAndSwap->_tmp2); | |
967 if (opCompareAndSwap->_result->is_valid()) do_output(opCompareAndSwap->_result); | |
968 | |
969 break; | |
970 } | |
971 | |
972 | |
973 // LIR_OpAllocArray; | |
974 case lir_alloc_array: { | |
975 assert(op->as_OpAllocArray() != NULL, "must be"); | |
976 LIR_OpAllocArray* opAllocArray = (LIR_OpAllocArray*)op; | |
977 | |
978 if (opAllocArray->_info) do_info(opAllocArray->_info); | |
979 if (opAllocArray->_klass->is_valid()) do_input(opAllocArray->_klass); do_temp(opAllocArray->_klass); | |
980 if (opAllocArray->_len->is_valid()) do_input(opAllocArray->_len); do_temp(opAllocArray->_len); | |
981 if (opAllocArray->_tmp1->is_valid()) do_temp(opAllocArray->_tmp1); | |
982 if (opAllocArray->_tmp2->is_valid()) do_temp(opAllocArray->_tmp2); | |
983 if (opAllocArray->_tmp3->is_valid()) do_temp(opAllocArray->_tmp3); | |
984 if (opAllocArray->_tmp4->is_valid()) do_temp(opAllocArray->_tmp4); | |
985 if (opAllocArray->_result->is_valid()) do_output(opAllocArray->_result); | |
986 do_stub(opAllocArray->_stub); | |
987 break; | |
988 } | |
989 | |
990 // LIR_OpProfileCall: | |
991 case lir_profile_call: { | |
992 assert(op->as_OpProfileCall() != NULL, "must be"); | |
993 LIR_OpProfileCall* opProfileCall = (LIR_OpProfileCall*)op; | |
994 | |
995 if (opProfileCall->_recv->is_valid()) do_temp(opProfileCall->_recv); | |
996 assert(opProfileCall->_mdo->is_valid(), "used"); do_temp(opProfileCall->_mdo); | |
997 assert(opProfileCall->_tmp1->is_valid(), "used"); do_temp(opProfileCall->_tmp1); | |
998 break; | |
999 } | |
12875
d13d7aba8c12
8023657: New type profiling points: arguments to call
roland
parents:
11080
diff
changeset
|
1000 |
d13d7aba8c12
8023657: New type profiling points: arguments to call
roland
parents:
11080
diff
changeset
|
1001 // LIR_OpProfileType: |
d13d7aba8c12
8023657: New type profiling points: arguments to call
roland
parents:
11080
diff
changeset
|
1002 case lir_profile_type: { |
d13d7aba8c12
8023657: New type profiling points: arguments to call
roland
parents:
11080
diff
changeset
|
1003 assert(op->as_OpProfileType() != NULL, "must be"); |
d13d7aba8c12
8023657: New type profiling points: arguments to call
roland
parents:
11080
diff
changeset
|
1004 LIR_OpProfileType* opProfileType = (LIR_OpProfileType*)op; |
d13d7aba8c12
8023657: New type profiling points: arguments to call
roland
parents:
11080
diff
changeset
|
1005 |
d13d7aba8c12
8023657: New type profiling points: arguments to call
roland
parents:
11080
diff
changeset
|
1006 do_input(opProfileType->_mdp); do_temp(opProfileType->_mdp); |
d13d7aba8c12
8023657: New type profiling points: arguments to call
roland
parents:
11080
diff
changeset
|
1007 do_input(opProfileType->_obj); |
d13d7aba8c12
8023657: New type profiling points: arguments to call
roland
parents:
11080
diff
changeset
|
1008 do_temp(opProfileType->_tmp); |
d13d7aba8c12
8023657: New type profiling points: arguments to call
roland
parents:
11080
diff
changeset
|
1009 break; |
d13d7aba8c12
8023657: New type profiling points: arguments to call
roland
parents:
11080
diff
changeset
|
1010 } |
0 | 1011 default: |
1012 ShouldNotReachHere(); | |
1013 } | |
1014 } | |
1015 | |
1016 | |
1017 void LIR_OpVisitState::do_stub(CodeStub* stub) { | |
1018 if (stub != NULL) { | |
1019 stub->visit(this); | |
1020 } | |
1021 } | |
1022 | |
1023 XHandlers* LIR_OpVisitState::all_xhandler() { | |
1024 XHandlers* result = NULL; | |
1025 | |
1026 int i; | |
1027 for (i = 0; i < info_count(); i++) { | |
1028 if (info_at(i)->exception_handlers() != NULL) { | |
1029 result = info_at(i)->exception_handlers(); | |
1030 break; | |
1031 } | |
1032 } | |
1033 | |
1034 #ifdef ASSERT | |
1035 for (i = 0; i < info_count(); i++) { | |
1036 assert(info_at(i)->exception_handlers() == NULL || | |
1037 info_at(i)->exception_handlers() == result, | |
1038 "only one xhandler list allowed per LIR-operation"); | |
1039 } | |
1040 #endif | |
1041 | |
1042 if (result != NULL) { | |
1043 return result; | |
1044 } else { | |
1045 return new XHandlers(); | |
1046 } | |
1047 | |
1048 return result; | |
1049 } | |
1050 | |
1051 | |
1052 #ifdef ASSERT | |
1053 bool LIR_OpVisitState::no_operands(LIR_Op* op) { | |
1054 visit(op); | |
1055 | |
1056 return opr_count(inputMode) == 0 && | |
1057 opr_count(outputMode) == 0 && | |
1058 opr_count(tempMode) == 0 && | |
1059 info_count() == 0 && | |
1060 !has_call() && | |
1061 !has_slow_case(); | |
1062 } | |
1063 #endif | |
1064 | |
1065 //--------------------------------------------------- | |
1066 | |
1067 | |
1068 void LIR_OpJavaCall::emit_code(LIR_Assembler* masm) { | |
1069 masm->emit_call(this); | |
1070 } | |
1071 | |
1072 void LIR_OpRTCall::emit_code(LIR_Assembler* masm) { | |
1073 masm->emit_rtcall(this); | |
1074 } | |
1075 | |
1076 void LIR_OpLabel::emit_code(LIR_Assembler* masm) { | |
1077 masm->emit_opLabel(this); | |
1078 } | |
1079 | |
1080 void LIR_OpArrayCopy::emit_code(LIR_Assembler* masm) { | |
1081 masm->emit_arraycopy(this); | |
17945 | 1082 masm->append_code_stub(stub()); |
0 | 1083 } |
1084 | |
11080
b800986664f4
7088419: Use x86 Hardware CRC32 Instruction with java.util.zip.CRC32
drchase
parents:
11004
diff
changeset
|
1085 void LIR_OpUpdateCRC32::emit_code(LIR_Assembler* masm) { |
b800986664f4
7088419: Use x86 Hardware CRC32 Instruction with java.util.zip.CRC32
drchase
parents:
11004
diff
changeset
|
1086 masm->emit_updatecrc32(this); |
b800986664f4
7088419: Use x86 Hardware CRC32 Instruction with java.util.zip.CRC32
drchase
parents:
11004
diff
changeset
|
1087 } |
b800986664f4
7088419: Use x86 Hardware CRC32 Instruction with java.util.zip.CRC32
drchase
parents:
11004
diff
changeset
|
1088 |
0 | 1089 void LIR_Op0::emit_code(LIR_Assembler* masm) { |
1090 masm->emit_op0(this); | |
1091 } | |
1092 | |
1093 void LIR_Op1::emit_code(LIR_Assembler* masm) { | |
1094 masm->emit_op1(this); | |
1095 } | |
1096 | |
1097 void LIR_OpAllocObj::emit_code(LIR_Assembler* masm) { | |
1098 masm->emit_alloc_obj(this); | |
17945 | 1099 masm->append_code_stub(stub()); |
0 | 1100 } |
1101 | |
1102 void LIR_OpBranch::emit_code(LIR_Assembler* masm) { | |
1103 masm->emit_opBranch(this); | |
1104 if (stub()) { | |
17945 | 1105 masm->append_code_stub(stub()); |
0 | 1106 } |
1107 } | |
1108 | |
1109 void LIR_OpConvert::emit_code(LIR_Assembler* masm) { | |
1110 masm->emit_opConvert(this); | |
1111 if (stub() != NULL) { | |
17945 | 1112 masm->append_code_stub(stub()); |
0 | 1113 } |
1114 } | |
1115 | |
1116 void LIR_Op2::emit_code(LIR_Assembler* masm) { | |
1117 masm->emit_op2(this); | |
1118 } | |
1119 | |
1120 void LIR_OpAllocArray::emit_code(LIR_Assembler* masm) { | |
1121 masm->emit_alloc_array(this); | |
17945 | 1122 masm->append_code_stub(stub()); |
0 | 1123 } |
1124 | |
1125 void LIR_OpTypeCheck::emit_code(LIR_Assembler* masm) { | |
1791
3a294e483abc
6919069: client compiler needs to capture more profile information for tiered work
iveresov
parents:
1783
diff
changeset
|
1126 masm->emit_opTypeCheck(this); |
0 | 1127 if (stub()) { |
17945 | 1128 masm->append_code_stub(stub()); |
0 | 1129 } |
1130 } | |
1131 | |
1132 void LIR_OpCompareAndSwap::emit_code(LIR_Assembler* masm) { | |
1133 masm->emit_compare_and_swap(this); | |
1134 } | |
1135 | |
1136 void LIR_Op3::emit_code(LIR_Assembler* masm) { | |
1137 masm->emit_op3(this); | |
1138 } | |
1139 | |
1140 void LIR_OpLock::emit_code(LIR_Assembler* masm) { | |
1141 masm->emit_lock(this); | |
1142 if (stub()) { | |
17945 | 1143 masm->append_code_stub(stub()); |
0 | 1144 } |
1145 } | |
1146 | |
8860 | 1147 #ifdef ASSERT |
1148 void LIR_OpAssert::emit_code(LIR_Assembler* masm) { | |
1149 masm->emit_assert(this); | |
1150 } | |
1151 #endif | |
0 | 1152 |
1153 void LIR_OpDelay::emit_code(LIR_Assembler* masm) { | |
1154 masm->emit_delay(this); | |
1155 } | |
1156 | |
1157 void LIR_OpProfileCall::emit_code(LIR_Assembler* masm) { | |
1158 masm->emit_profile_call(this); | |
1159 } | |
1160 | |
12875
d13d7aba8c12
8023657: New type profiling points: arguments to call
roland
parents:
11080
diff
changeset
|
1161 void LIR_OpProfileType::emit_code(LIR_Assembler* masm) { |
d13d7aba8c12
8023657: New type profiling points: arguments to call
roland
parents:
11080
diff
changeset
|
1162 masm->emit_profile_type(this); |
d13d7aba8c12
8023657: New type profiling points: arguments to call
roland
parents:
11080
diff
changeset
|
1163 } |
d13d7aba8c12
8023657: New type profiling points: arguments to call
roland
parents:
11080
diff
changeset
|
1164 |
0 | 1165 // LIR_List |
1166 LIR_List::LIR_List(Compilation* compilation, BlockBegin* block) | |
1167 : _operations(8) | |
1168 , _compilation(compilation) | |
1169 #ifndef PRODUCT | |
1170 , _block(block) | |
1171 #endif | |
1172 #ifdef ASSERT | |
1173 , _file(NULL) | |
1174 , _line(0) | |
1175 #endif | |
1176 { } | |
1177 | |
1178 | |
1179 #ifdef ASSERT | |
1180 void LIR_List::set_file_and_line(const char * file, int line) { | |
1181 const char * f = strrchr(file, '/'); | |
1182 if (f == NULL) f = strrchr(file, '\\'); | |
1183 if (f == NULL) { | |
1184 f = file; | |
1185 } else { | |
1186 f++; | |
1187 } | |
1188 _file = f; | |
1189 _line = line; | |
1190 } | |
1191 #endif | |
1192 | |
1193 | |
1194 void LIR_List::append(LIR_InsertionBuffer* buffer) { | |
1195 assert(this == buffer->lir_list(), "wrong lir list"); | |
1196 const int n = _operations.length(); | |
1197 | |
1198 if (buffer->number_of_ops() > 0) { | |
1199 // increase size of instructions list | |
1200 _operations.at_grow(n + buffer->number_of_ops() - 1, NULL); | |
1201 // insert ops from buffer into instructions list | |
1202 int op_index = buffer->number_of_ops() - 1; | |
1203 int ip_index = buffer->number_of_insertion_points() - 1; | |
1204 int from_index = n - 1; | |
1205 int to_index = _operations.length() - 1; | |
1206 for (; ip_index >= 0; ip_index --) { | |
1207 int index = buffer->index_at(ip_index); | |
1208 // make room after insertion point | |
1209 while (index < from_index) { | |
1210 _operations.at_put(to_index --, _operations.at(from_index --)); | |
1211 } | |
1212 // insert ops from buffer | |
1213 for (int i = buffer->count_at(ip_index); i > 0; i --) { | |
1214 _operations.at_put(to_index --, buffer->op_at(op_index --)); | |
1215 } | |
1216 } | |
1217 } | |
1218 | |
1219 buffer->finish(); | |
1220 } | |
1221 | |
1222 | |
1223 void LIR_List::oop2reg_patch(jobject o, LIR_Opr reg, CodeEmitInfo* info) { | |
6739
8a02ca5e5576
7195816: NPG: Crash in c1_ValueType - ShouldNotReachHere
roland
parents:
6725
diff
changeset
|
1224 assert(reg->type() == T_OBJECT, "bad reg"); |
0 | 1225 append(new LIR_Op1(lir_move, LIR_OprFact::oopConst(o), reg, T_OBJECT, lir_patch_normal, info)); |
1226 } | |
1227 | |
6725
da91efe96a93
6964458: Reimplement class meta-data storage to use native memory
coleenp
parents:
6084
diff
changeset
|
1228 void LIR_List::klass2reg_patch(Metadata* o, LIR_Opr reg, CodeEmitInfo* info) { |
6739
8a02ca5e5576
7195816: NPG: Crash in c1_ValueType - ShouldNotReachHere
roland
parents:
6725
diff
changeset
|
1229 assert(reg->type() == T_METADATA, "bad reg"); |
6725
da91efe96a93
6964458: Reimplement class meta-data storage to use native memory
coleenp
parents:
6084
diff
changeset
|
1230 append(new LIR_Op1(lir_move, LIR_OprFact::metadataConst(o), reg, T_METADATA, lir_patch_normal, info)); |
da91efe96a93
6964458: Reimplement class meta-data storage to use native memory
coleenp
parents:
6084
diff
changeset
|
1231 } |
0 | 1232 |
1233 void LIR_List::load(LIR_Address* addr, LIR_Opr src, CodeEmitInfo* info, LIR_PatchCode patch_code) { | |
1234 append(new LIR_Op1( | |
1235 lir_move, | |
1236 LIR_OprFact::address(addr), | |
1237 src, | |
1238 addr->type(), | |
1239 patch_code, | |
1240 info)); | |
1241 } | |
1242 | |
1243 | |
1244 void LIR_List::volatile_load_mem_reg(LIR_Address* address, LIR_Opr dst, CodeEmitInfo* info, LIR_PatchCode patch_code) { | |
1245 append(new LIR_Op1( | |
1246 lir_move, | |
1247 LIR_OprFact::address(address), | |
1248 dst, | |
1249 address->type(), | |
1250 patch_code, | |
1251 info, lir_move_volatile)); | |
1252 } | |
1253 | |
1254 void LIR_List::volatile_load_unsafe_reg(LIR_Opr base, LIR_Opr offset, LIR_Opr dst, BasicType type, CodeEmitInfo* info, LIR_PatchCode patch_code) { | |
1255 append(new LIR_Op1( | |
1256 lir_move, | |
1257 LIR_OprFact::address(new LIR_Address(base, offset, type)), | |
1258 dst, | |
1259 type, | |
1260 patch_code, | |
1261 info, lir_move_volatile)); | |
1262 } | |
1263 | |
1264 | |
1265 void LIR_List::prefetch(LIR_Address* addr, bool is_store) { | |
1266 append(new LIR_Op1( | |
1267 is_store ? lir_prefetchw : lir_prefetchr, | |
1268 LIR_OprFact::address(addr))); | |
1269 } | |
1270 | |
1271 | |
1272 void LIR_List::store_mem_int(jint v, LIR_Opr base, int offset_in_bytes, BasicType type, CodeEmitInfo* info, LIR_PatchCode patch_code) { | |
1273 append(new LIR_Op1( | |
1274 lir_move, | |
1275 LIR_OprFact::intConst(v), | |
1276 LIR_OprFact::address(new LIR_Address(base, offset_in_bytes, type)), | |
1277 type, | |
1278 patch_code, | |
1279 info)); | |
1280 } | |
1281 | |
1282 | |
1283 void LIR_List::store_mem_oop(jobject o, LIR_Opr base, int offset_in_bytes, BasicType type, CodeEmitInfo* info, LIR_PatchCode patch_code) { | |
1284 append(new LIR_Op1( | |
1285 lir_move, | |
1286 LIR_OprFact::oopConst(o), | |
1287 LIR_OprFact::address(new LIR_Address(base, offset_in_bytes, type)), | |
1288 type, | |
1289 patch_code, | |
1290 info)); | |
1291 } | |
1292 | |
1293 | |
1294 void LIR_List::store(LIR_Opr src, LIR_Address* addr, CodeEmitInfo* info, LIR_PatchCode patch_code) { | |
1295 append(new LIR_Op1( | |
1296 lir_move, | |
1297 src, | |
1298 LIR_OprFact::address(addr), | |
1299 addr->type(), | |
1300 patch_code, | |
1301 info)); | |
1302 } | |
1303 | |
1304 | |
1305 void LIR_List::volatile_store_mem_reg(LIR_Opr src, LIR_Address* addr, CodeEmitInfo* info, LIR_PatchCode patch_code) { | |
1306 append(new LIR_Op1( | |
1307 lir_move, | |
1308 src, | |
1309 LIR_OprFact::address(addr), | |
1310 addr->type(), | |
1311 patch_code, | |
1312 info, | |
1313 lir_move_volatile)); | |
1314 } | |
1315 | |
1316 void LIR_List::volatile_store_unsafe_reg(LIR_Opr src, LIR_Opr base, LIR_Opr offset, BasicType type, CodeEmitInfo* info, LIR_PatchCode patch_code) { | |
1317 append(new LIR_Op1( | |
1318 lir_move, | |
1319 src, | |
1320 LIR_OprFact::address(new LIR_Address(base, offset, type)), | |
1321 type, | |
1322 patch_code, | |
1323 info, lir_move_volatile)); | |
1324 } | |
1325 | |
1326 | |
1327 void LIR_List::idiv(LIR_Opr left, LIR_Opr right, LIR_Opr res, LIR_Opr tmp, CodeEmitInfo* info) { | |
1328 append(new LIR_Op3( | |
1329 lir_idiv, | |
1330 left, | |
1331 right, | |
1332 tmp, | |
1333 res, | |
1334 info)); | |
1335 } | |
1336 | |
1337 | |
1338 void LIR_List::idiv(LIR_Opr left, int right, LIR_Opr res, LIR_Opr tmp, CodeEmitInfo* info) { | |
1339 append(new LIR_Op3( | |
1340 lir_idiv, | |
1341 left, | |
1342 LIR_OprFact::intConst(right), | |
1343 tmp, | |
1344 res, | |
1345 info)); | |
1346 } | |
1347 | |
1348 | |
1349 void LIR_List::irem(LIR_Opr left, LIR_Opr right, LIR_Opr res, LIR_Opr tmp, CodeEmitInfo* info) { | |
1350 append(new LIR_Op3( | |
1351 lir_irem, | |
1352 left, | |
1353 right, | |
1354 tmp, | |
1355 res, | |
1356 info)); | |
1357 } | |
1358 | |
1359 | |
1360 void LIR_List::irem(LIR_Opr left, int right, LIR_Opr res, LIR_Opr tmp, CodeEmitInfo* info) { | |
1361 append(new LIR_Op3( | |
1362 lir_irem, | |
1363 left, | |
1364 LIR_OprFact::intConst(right), | |
1365 tmp, | |
1366 res, | |
1367 info)); | |
1368 } | |
1369 | |
1370 | |
1371 void LIR_List::cmp_mem_int(LIR_Condition condition, LIR_Opr base, int disp, int c, CodeEmitInfo* info) { | |
1372 append(new LIR_Op2( | |
1373 lir_cmp, | |
1374 condition, | |
1375 LIR_OprFact::address(new LIR_Address(base, disp, T_INT)), | |
1376 LIR_OprFact::intConst(c), | |
1377 info)); | |
1378 } | |
1379 | |
1380 | |
1381 void LIR_List::cmp_reg_mem(LIR_Condition condition, LIR_Opr reg, LIR_Address* addr, CodeEmitInfo* info) { | |
1382 append(new LIR_Op2( | |
1383 lir_cmp, | |
1384 condition, | |
1385 reg, | |
1386 LIR_OprFact::address(addr), | |
1387 info)); | |
1388 } | |
1389 | |
1390 void LIR_List::allocate_object(LIR_Opr dst, LIR_Opr t1, LIR_Opr t2, LIR_Opr t3, LIR_Opr t4, | |
1391 int header_size, int object_size, LIR_Opr klass, bool init_check, CodeStub* stub) { | |
1392 append(new LIR_OpAllocObj( | |
1393 klass, | |
1394 dst, | |
1395 t1, | |
1396 t2, | |
1397 t3, | |
1398 t4, | |
1399 header_size, | |
1400 object_size, | |
1401 init_check, | |
1402 stub)); | |
1403 } | |
1404 | |
1405 void LIR_List::allocate_array(LIR_Opr dst, LIR_Opr len, LIR_Opr t1,LIR_Opr t2, LIR_Opr t3,LIR_Opr t4, BasicType type, LIR_Opr klass, CodeStub* stub) { | |
1406 append(new LIR_OpAllocArray( | |
1407 klass, | |
1408 len, | |
1409 dst, | |
1410 t1, | |
1411 t2, | |
1412 t3, | |
1413 t4, | |
1414 type, | |
1415 stub)); | |
1416 } | |
1417 | |
1418 void LIR_List::shift_left(LIR_Opr value, LIR_Opr count, LIR_Opr dst, LIR_Opr tmp) { | |
1419 append(new LIR_Op2( | |
1420 lir_shl, | |
1421 value, | |
1422 count, | |
1423 dst, | |
1424 tmp)); | |
1425 } | |
1426 | |
1427 void LIR_List::shift_right(LIR_Opr value, LIR_Opr count, LIR_Opr dst, LIR_Opr tmp) { | |
1428 append(new LIR_Op2( | |
1429 lir_shr, | |
1430 value, | |
1431 count, | |
1432 dst, | |
1433 tmp)); | |
1434 } | |
1435 | |
1436 | |
1437 void LIR_List::unsigned_shift_right(LIR_Opr value, LIR_Opr count, LIR_Opr dst, LIR_Opr tmp) { | |
1438 append(new LIR_Op2( | |
1439 lir_ushr, | |
1440 value, | |
1441 count, | |
1442 dst, | |
1443 tmp)); | |
1444 } | |
1445 | |
1446 void LIR_List::fcmp2int(LIR_Opr left, LIR_Opr right, LIR_Opr dst, bool is_unordered_less) { | |
1447 append(new LIR_Op2(is_unordered_less ? lir_ucmp_fd2i : lir_cmp_fd2i, | |
1448 left, | |
1449 right, | |
1450 dst)); | |
1451 } | |
1452 | |
1453 void LIR_List::lock_object(LIR_Opr hdr, LIR_Opr obj, LIR_Opr lock, LIR_Opr scratch, CodeStub* stub, CodeEmitInfo* info) { | |
1454 append(new LIR_OpLock( | |
1455 lir_lock, | |
1456 hdr, | |
1457 obj, | |
1458 lock, | |
1459 scratch, | |
1460 stub, | |
1461 info)); | |
1462 } | |
1463 | |
1681
126ea7725993
6953477: Increase portability and flexibility of building Hotspot
bobv
parents:
1579
diff
changeset
|
1464 void LIR_List::unlock_object(LIR_Opr hdr, LIR_Opr obj, LIR_Opr lock, LIR_Opr scratch, CodeStub* stub) { |
0 | 1465 append(new LIR_OpLock( |
1466 lir_unlock, | |
1467 hdr, | |
1468 obj, | |
1469 lock, | |
1681
126ea7725993
6953477: Increase portability and flexibility of building Hotspot
bobv
parents:
1579
diff
changeset
|
1470 scratch, |
0 | 1471 stub, |
1472 NULL)); | |
1473 } | |
1474 | |
1475 | |
1476 void check_LIR() { | |
1477 // cannot do the proper checking as PRODUCT and other modes return different results | |
1478 // guarantee(sizeof(LIR_OprDesc) == wordSize, "may not have a v-table"); | |
1479 } | |
1480 | |
1481 | |
1482 | |
1483 void LIR_List::checkcast (LIR_Opr result, LIR_Opr object, ciKlass* klass, | |
1484 LIR_Opr tmp1, LIR_Opr tmp2, LIR_Opr tmp3, bool fast_check, | |
1485 CodeEmitInfo* info_for_exception, CodeEmitInfo* info_for_patch, CodeStub* stub, | |
1486 ciMethod* profiled_method, int profiled_bci) { | |
1783 | 1487 LIR_OpTypeCheck* c = new LIR_OpTypeCheck(lir_checkcast, result, object, klass, |
1488 tmp1, tmp2, tmp3, fast_check, info_for_exception, info_for_patch, stub); | |
1489 if (profiled_method != NULL) { | |
1490 c->set_profiled_method(profiled_method); | |
1491 c->set_profiled_bci(profiled_bci); | |
1492 c->set_should_profile(true); | |
1493 } | |
1494 append(c); | |
0 | 1495 } |
1496 | |
1791
3a294e483abc
6919069: client compiler needs to capture more profile information for tiered work
iveresov
parents:
1783
diff
changeset
|
1497 void LIR_List::instanceof(LIR_Opr result, LIR_Opr object, ciKlass* klass, LIR_Opr tmp1, LIR_Opr tmp2, LIR_Opr tmp3, bool fast_check, CodeEmitInfo* info_for_patch, ciMethod* profiled_method, int profiled_bci) { |
3a294e483abc
6919069: client compiler needs to capture more profile information for tiered work
iveresov
parents:
1783
diff
changeset
|
1498 LIR_OpTypeCheck* c = new LIR_OpTypeCheck(lir_instanceof, result, object, klass, tmp1, tmp2, tmp3, fast_check, NULL, info_for_patch, NULL); |
3a294e483abc
6919069: client compiler needs to capture more profile information for tiered work
iveresov
parents:
1783
diff
changeset
|
1499 if (profiled_method != NULL) { |
3a294e483abc
6919069: client compiler needs to capture more profile information for tiered work
iveresov
parents:
1783
diff
changeset
|
1500 c->set_profiled_method(profiled_method); |
3a294e483abc
6919069: client compiler needs to capture more profile information for tiered work
iveresov
parents:
1783
diff
changeset
|
1501 c->set_profiled_bci(profiled_bci); |
3a294e483abc
6919069: client compiler needs to capture more profile information for tiered work
iveresov
parents:
1783
diff
changeset
|
1502 c->set_should_profile(true); |
3a294e483abc
6919069: client compiler needs to capture more profile information for tiered work
iveresov
parents:
1783
diff
changeset
|
1503 } |
3a294e483abc
6919069: client compiler needs to capture more profile information for tiered work
iveresov
parents:
1783
diff
changeset
|
1504 append(c); |
0 | 1505 } |
1506 | |
1507 | |
3957 | 1508 void LIR_List::store_check(LIR_Opr object, LIR_Opr array, LIR_Opr tmp1, LIR_Opr tmp2, LIR_Opr tmp3, |
1509 CodeEmitInfo* info_for_exception, ciMethod* profiled_method, int profiled_bci) { | |
1510 LIR_OpTypeCheck* c = new LIR_OpTypeCheck(lir_store_check, object, array, tmp1, tmp2, tmp3, info_for_exception); | |
1511 if (profiled_method != NULL) { | |
1512 c->set_profiled_method(profiled_method); | |
1513 c->set_profiled_bci(profiled_bci); | |
1514 c->set_should_profile(true); | |
1515 } | |
1516 append(c); | |
0 | 1517 } |
1518 | |
1519 | |
1681
126ea7725993
6953477: Increase portability and flexibility of building Hotspot
bobv
parents:
1579
diff
changeset
|
1520 void LIR_List::cas_long(LIR_Opr addr, LIR_Opr cmp_value, LIR_Opr new_value, |
126ea7725993
6953477: Increase portability and flexibility of building Hotspot
bobv
parents:
1579
diff
changeset
|
1521 LIR_Opr t1, LIR_Opr t2, LIR_Opr result) { |
126ea7725993
6953477: Increase portability and flexibility of building Hotspot
bobv
parents:
1579
diff
changeset
|
1522 append(new LIR_OpCompareAndSwap(lir_cas_long, addr, cmp_value, new_value, t1, t2, result)); |
0 | 1523 } |
1524 | |
1681
126ea7725993
6953477: Increase portability and flexibility of building Hotspot
bobv
parents:
1579
diff
changeset
|
1525 void LIR_List::cas_obj(LIR_Opr addr, LIR_Opr cmp_value, LIR_Opr new_value, |
126ea7725993
6953477: Increase portability and flexibility of building Hotspot
bobv
parents:
1579
diff
changeset
|
1526 LIR_Opr t1, LIR_Opr t2, LIR_Opr result) { |
126ea7725993
6953477: Increase portability and flexibility of building Hotspot
bobv
parents:
1579
diff
changeset
|
1527 append(new LIR_OpCompareAndSwap(lir_cas_obj, addr, cmp_value, new_value, t1, t2, result)); |
0 | 1528 } |
1529 | |
1681
126ea7725993
6953477: Increase portability and flexibility of building Hotspot
bobv
parents:
1579
diff
changeset
|
1530 void LIR_List::cas_int(LIR_Opr addr, LIR_Opr cmp_value, LIR_Opr new_value, |
126ea7725993
6953477: Increase portability and flexibility of building Hotspot
bobv
parents:
1579
diff
changeset
|
1531 LIR_Opr t1, LIR_Opr t2, LIR_Opr result) { |
126ea7725993
6953477: Increase portability and flexibility of building Hotspot
bobv
parents:
1579
diff
changeset
|
1532 append(new LIR_OpCompareAndSwap(lir_cas_int, addr, cmp_value, new_value, t1, t2, result)); |
0 | 1533 } |
1534 | |
1535 | |
1536 #ifdef PRODUCT | |
1537 | |
1538 void print_LIR(BlockList* blocks) { | |
1539 } | |
1540 | |
1541 #else | |
1542 // LIR_OprDesc | |
1543 void LIR_OprDesc::print() const { | |
1544 print(tty); | |
1545 } | |
1546 | |
1547 void LIR_OprDesc::print(outputStream* out) const { | |
1548 if (is_illegal()) { | |
1549 return; | |
1550 } | |
1551 | |
1552 out->print("["); | |
1553 if (is_pointer()) { | |
1554 pointer()->print_value_on(out); | |
1555 } else if (is_single_stack()) { | |
1556 out->print("stack:%d", single_stack_ix()); | |
1557 } else if (is_double_stack()) { | |
1558 out->print("dbl_stack:%d",double_stack_ix()); | |
1559 } else if (is_virtual()) { | |
1560 out->print("R%d", vreg_number()); | |
1561 } else if (is_single_cpu()) { | |
17937
78bbf4d43a14
8037816: Fix for 8036122 breaks build with Xcode5/clang
drchase
parents:
12969
diff
changeset
|
1562 out->print("%s", as_register()->name()); |
0 | 1563 } else if (is_double_cpu()) { |
17937
78bbf4d43a14
8037816: Fix for 8036122 breaks build with Xcode5/clang
drchase
parents:
12969
diff
changeset
|
1564 out->print("%s", as_register_hi()->name()); |
78bbf4d43a14
8037816: Fix for 8036122 breaks build with Xcode5/clang
drchase
parents:
12969
diff
changeset
|
1565 out->print("%s", as_register_lo()->name()); |
304 | 1566 #if defined(X86) |
0 | 1567 } else if (is_single_xmm()) { |
17937
78bbf4d43a14
8037816: Fix for 8036122 breaks build with Xcode5/clang
drchase
parents:
12969
diff
changeset
|
1568 out->print("%s", as_xmm_float_reg()->name()); |
0 | 1569 } else if (is_double_xmm()) { |
17937
78bbf4d43a14
8037816: Fix for 8036122 breaks build with Xcode5/clang
drchase
parents:
12969
diff
changeset
|
1570 out->print("%s", as_xmm_double_reg()->name()); |
0 | 1571 } else if (is_single_fpu()) { |
1572 out->print("fpu%d", fpu_regnr()); | |
1573 } else if (is_double_fpu()) { | |
1574 out->print("fpu%d", fpu_regnrLo()); | |
1681
126ea7725993
6953477: Increase portability and flexibility of building Hotspot
bobv
parents:
1579
diff
changeset
|
1575 #elif defined(ARM) |
126ea7725993
6953477: Increase portability and flexibility of building Hotspot
bobv
parents:
1579
diff
changeset
|
1576 } else if (is_single_fpu()) { |
126ea7725993
6953477: Increase portability and flexibility of building Hotspot
bobv
parents:
1579
diff
changeset
|
1577 out->print("s%d", fpu_regnr()); |
126ea7725993
6953477: Increase portability and flexibility of building Hotspot
bobv
parents:
1579
diff
changeset
|
1578 } else if (is_double_fpu()) { |
126ea7725993
6953477: Increase portability and flexibility of building Hotspot
bobv
parents:
1579
diff
changeset
|
1579 out->print("d%d", fpu_regnrLo() >> 1); |
0 | 1580 #else |
1581 } else if (is_single_fpu()) { | |
17937
78bbf4d43a14
8037816: Fix for 8036122 breaks build with Xcode5/clang
drchase
parents:
12969
diff
changeset
|
1582 out->print("%s", as_float_reg()->name()); |
0 | 1583 } else if (is_double_fpu()) { |
17937
78bbf4d43a14
8037816: Fix for 8036122 breaks build with Xcode5/clang
drchase
parents:
12969
diff
changeset
|
1584 out->print("%s", as_double_reg()->name()); |
0 | 1585 #endif |
1586 | |
1587 } else if (is_illegal()) { | |
1588 out->print("-"); | |
1589 } else { | |
1590 out->print("Unknown Operand"); | |
1591 } | |
1592 if (!is_illegal()) { | |
1593 out->print("|%c", type_char()); | |
1594 } | |
1595 if (is_register() && is_last_use()) { | |
1596 out->print("(last_use)"); | |
1597 } | |
1598 out->print("]"); | |
1599 } | |
1600 | |
1601 | |
1602 // LIR_Address | |
1603 void LIR_Const::print_value_on(outputStream* out) const { | |
1604 switch (type()) { | |
1297
c466efa608d5
6932496: c1: deoptimization of jsr subroutine fails on sparcv9
roland
parents:
1295
diff
changeset
|
1605 case T_ADDRESS:out->print("address:%d",as_jint()); break; |
0 | 1606 case T_INT: out->print("int:%d", as_jint()); break; |
7623
203f64878aab
7102489: RFE: cleanup jlong typedef on __APPLE__and _LLP64 systems.
hseigel
parents:
6795
diff
changeset
|
1607 case T_LONG: out->print("lng:" JLONG_FORMAT, as_jlong()); break; |
0 | 1608 case T_FLOAT: out->print("flt:%f", as_jfloat()); break; |
1609 case T_DOUBLE: out->print("dbl:%f", as_jdouble()); break; | |
17937
78bbf4d43a14
8037816: Fix for 8036122 breaks build with Xcode5/clang
drchase
parents:
12969
diff
changeset
|
1610 case T_OBJECT: out->print("obj:" INTPTR_FORMAT, p2i(as_jobject())); break; |
78bbf4d43a14
8037816: Fix for 8036122 breaks build with Xcode5/clang
drchase
parents:
12969
diff
changeset
|
1611 case T_METADATA: out->print("metadata:" INTPTR_FORMAT, p2i(as_metadata()));break; |
78bbf4d43a14
8037816: Fix for 8036122 breaks build with Xcode5/clang
drchase
parents:
12969
diff
changeset
|
1612 default: out->print("%3d:0x" UINT64_FORMAT_X, type(), (uint64_t)as_jlong()); break; |
0 | 1613 } |
1614 } | |
1615 | |
1616 // LIR_Address | |
1617 void LIR_Address::print_value_on(outputStream* out) const { | |
1618 out->print("Base:"); _base->print(out); | |
1619 if (!_index->is_illegal()) { | |
1620 out->print(" Index:"); _index->print(out); | |
1621 switch (scale()) { | |
1622 case times_1: break; | |
1623 case times_2: out->print(" * 2"); break; | |
1624 case times_4: out->print(" * 4"); break; | |
1625 case times_8: out->print(" * 8"); break; | |
1626 } | |
1627 } | |
17937
78bbf4d43a14
8037816: Fix for 8036122 breaks build with Xcode5/clang
drchase
parents:
12969
diff
changeset
|
1628 out->print(" Disp: " INTX_FORMAT, _disp); |
0 | 1629 } |
1630 | |
1631 // debug output of block header without InstructionPrinter | |
1632 // (because phi functions are not necessary for LIR) | |
1633 static void print_block(BlockBegin* x) { | |
1634 // print block id | |
1635 BlockEnd* end = x->end(); | |
1636 tty->print("B%d ", x->block_id()); | |
1637 | |
1638 // print flags | |
1639 if (x->is_set(BlockBegin::std_entry_flag)) tty->print("std "); | |
1640 if (x->is_set(BlockBegin::osr_entry_flag)) tty->print("osr "); | |
1641 if (x->is_set(BlockBegin::exception_entry_flag)) tty->print("ex "); | |
1642 if (x->is_set(BlockBegin::subroutine_entry_flag)) tty->print("jsr "); | |
1643 if (x->is_set(BlockBegin::backward_branch_target_flag)) tty->print("bb "); | |
1644 if (x->is_set(BlockBegin::linear_scan_loop_header_flag)) tty->print("lh "); | |
1645 if (x->is_set(BlockBegin::linear_scan_loop_end_flag)) tty->print("le "); | |
1646 | |
1647 // print block bci range | |
1819 | 1648 tty->print("[%d, %d] ", x->bci(), (end == NULL ? -1 : end->printable_bci())); |
0 | 1649 |
1650 // print predecessors and successors | |
1651 if (x->number_of_preds() > 0) { | |
1652 tty->print("preds: "); | |
1653 for (int i = 0; i < x->number_of_preds(); i ++) { | |
1654 tty->print("B%d ", x->pred_at(i)->block_id()); | |
1655 } | |
1656 } | |
1657 | |
1658 if (x->number_of_sux() > 0) { | |
1659 tty->print("sux: "); | |
1660 for (int i = 0; i < x->number_of_sux(); i ++) { | |
1661 tty->print("B%d ", x->sux_at(i)->block_id()); | |
1662 } | |
1663 } | |
1664 | |
1665 // print exception handlers | |
1666 if (x->number_of_exception_handlers() > 0) { | |
1667 tty->print("xhandler: "); | |
1668 for (int i = 0; i < x->number_of_exception_handlers(); i++) { | |
1669 tty->print("B%d ", x->exception_handler_at(i)->block_id()); | |
1670 } | |
1671 } | |
1672 | |
1673 tty->cr(); | |
1674 } | |
1675 | |
1676 void print_LIR(BlockList* blocks) { | |
1677 tty->print_cr("LIR:"); | |
1678 int i; | |
1679 for (i = 0; i < blocks->length(); i++) { | |
1680 BlockBegin* bb = blocks->at(i); | |
1681 print_block(bb); | |
1682 tty->print("__id_Instruction___________________________________________"); tty->cr(); | |
1683 bb->lir()->print_instructions(); | |
1684 } | |
1685 } | |
1686 | |
1687 void LIR_List::print_instructions() { | |
1688 for (int i = 0; i < _operations.length(); i++) { | |
1689 _operations.at(i)->print(); tty->cr(); | |
1690 } | |
1691 tty->cr(); | |
1692 } | |
1693 | |
1694 // LIR_Ops printing routines | |
1695 // LIR_Op | |
1696 void LIR_Op::print_on(outputStream* out) const { | |
1697 if (id() != -1 || PrintCFGToFile) { | |
1698 out->print("%4d ", id()); | |
1699 } else { | |
1700 out->print(" "); | |
1701 } | |
17937
78bbf4d43a14
8037816: Fix for 8036122 breaks build with Xcode5/clang
drchase
parents:
12969
diff
changeset
|
1702 out->print("%s ", name()); |
0 | 1703 print_instr(out); |
1819 | 1704 if (info() != NULL) out->print(" [bci:%d]", info()->stack()->bci()); |
0 | 1705 #ifdef ASSERT |
1706 if (Verbose && _file != NULL) { | |
1707 out->print(" (%s:%d)", _file, _line); | |
1708 } | |
1709 #endif | |
1710 } | |
1711 | |
1712 const char * LIR_Op::name() const { | |
1713 const char* s = NULL; | |
1714 switch(code()) { | |
1715 // LIR_Op0 | |
1716 case lir_membar: s = "membar"; break; | |
1717 case lir_membar_acquire: s = "membar_acquire"; break; | |
1718 case lir_membar_release: s = "membar_release"; break; | |
4966
701a83c86f28
7120481: storeStore barrier in constructor with final field
jiangli
parents:
4765
diff
changeset
|
1719 case lir_membar_loadload: s = "membar_loadload"; break; |
701a83c86f28
7120481: storeStore barrier in constructor with final field
jiangli
parents:
4765
diff
changeset
|
1720 case lir_membar_storestore: s = "membar_storestore"; break; |
701a83c86f28
7120481: storeStore barrier in constructor with final field
jiangli
parents:
4765
diff
changeset
|
1721 case lir_membar_loadstore: s = "membar_loadstore"; break; |
701a83c86f28
7120481: storeStore barrier in constructor with final field
jiangli
parents:
4765
diff
changeset
|
1722 case lir_membar_storeload: s = "membar_storeload"; break; |
0 | 1723 case lir_word_align: s = "word_align"; break; |
1724 case lir_label: s = "label"; break; | |
1725 case lir_nop: s = "nop"; break; | |
1726 case lir_backwardbranch_target: s = "backbranch"; break; | |
1727 case lir_std_entry: s = "std_entry"; break; | |
1728 case lir_osr_entry: s = "osr_entry"; break; | |
1729 case lir_build_frame: s = "build_frm"; break; | |
1730 case lir_fpop_raw: s = "fpop_raw"; break; | |
1731 case lir_24bit_FPU: s = "24bit_FPU"; break; | |
1732 case lir_reset_FPU: s = "reset_FPU"; break; | |
1733 case lir_breakpoint: s = "breakpoint"; break; | |
1734 case lir_get_thread: s = "get_thread"; break; | |
1735 // LIR_Op1 | |
1736 case lir_fxch: s = "fxch"; break; | |
1737 case lir_fld: s = "fld"; break; | |
1738 case lir_ffree: s = "ffree"; break; | |
1739 case lir_push: s = "push"; break; | |
1740 case lir_pop: s = "pop"; break; | |
1741 case lir_null_check: s = "null_check"; break; | |
1742 case lir_return: s = "return"; break; | |
1743 case lir_safepoint: s = "safepoint"; break; | |
1744 case lir_neg: s = "neg"; break; | |
1745 case lir_leal: s = "leal"; break; | |
1746 case lir_branch: s = "branch"; break; | |
1747 case lir_cond_float_branch: s = "flt_cond_br"; break; | |
1748 case lir_move: s = "move"; break; | |
1749 case lir_roundfp: s = "roundfp"; break; | |
1750 case lir_rtcall: s = "rtcall"; break; | |
1751 case lir_throw: s = "throw"; break; | |
1752 case lir_unwind: s = "unwind"; break; | |
1753 case lir_convert: s = "convert"; break; | |
1754 case lir_alloc_object: s = "alloc_obj"; break; | |
1755 case lir_monaddr: s = "mon_addr"; break; | |
1783 | 1756 case lir_pack64: s = "pack64"; break; |
1757 case lir_unpack64: s = "unpack64"; break; | |
0 | 1758 // LIR_Op2 |
1759 case lir_cmp: s = "cmp"; break; | |
1760 case lir_cmp_l2i: s = "cmp_l2i"; break; | |
1761 case lir_ucmp_fd2i: s = "ucomp_fd2i"; break; | |
1762 case lir_cmp_fd2i: s = "comp_fd2i"; break; | |
1763 case lir_cmove: s = "cmove"; break; | |
1764 case lir_add: s = "add"; break; | |
1765 case lir_sub: s = "sub"; break; | |
1766 case lir_mul: s = "mul"; break; | |
1767 case lir_mul_strictfp: s = "mul_strictfp"; break; | |
1768 case lir_div: s = "div"; break; | |
1769 case lir_div_strictfp: s = "div_strictfp"; break; | |
1770 case lir_rem: s = "rem"; break; | |
1771 case lir_abs: s = "abs"; break; | |
1772 case lir_sqrt: s = "sqrt"; break; | |
1773 case lir_sin: s = "sin"; break; | |
1774 case lir_cos: s = "cos"; break; | |
1775 case lir_tan: s = "tan"; break; | |
1776 case lir_log: s = "log"; break; | |
1777 case lir_log10: s = "log10"; break; | |
6084
6759698e3140
7133857: exp() and pow() should use the x87 ISA on x86
roland
parents:
4966
diff
changeset
|
1778 case lir_exp: s = "exp"; break; |
6759698e3140
7133857: exp() and pow() should use the x87 ISA on x86
roland
parents:
4966
diff
changeset
|
1779 case lir_pow: s = "pow"; break; |
0 | 1780 case lir_logic_and: s = "logic_and"; break; |
1781 case lir_logic_or: s = "logic_or"; break; | |
1782 case lir_logic_xor: s = "logic_xor"; break; | |
1783 case lir_shl: s = "shift_left"; break; | |
1784 case lir_shr: s = "shift_right"; break; | |
1785 case lir_ushr: s = "ushift_right"; break; | |
1786 case lir_alloc_array: s = "alloc_array"; break; | |
6795
7eca5de9e0b6
7023898: Intrinsify AtomicLongFieldUpdater.getAndIncrement()
roland
parents:
6739
diff
changeset
|
1787 case lir_xadd: s = "xadd"; break; |
7eca5de9e0b6
7023898: Intrinsify AtomicLongFieldUpdater.getAndIncrement()
roland
parents:
6739
diff
changeset
|
1788 case lir_xchg: s = "xchg"; break; |
0 | 1789 // LIR_Op3 |
1790 case lir_idiv: s = "idiv"; break; | |
1791 case lir_irem: s = "irem"; break; | |
1792 // LIR_OpJavaCall | |
1793 case lir_static_call: s = "static"; break; | |
1794 case lir_optvirtual_call: s = "optvirtual"; break; | |
1795 case lir_icvirtual_call: s = "icvirtual"; break; | |
1796 case lir_virtual_call: s = "virtual"; break; | |
1295 | 1797 case lir_dynamic_call: s = "dynamic"; break; |
0 | 1798 // LIR_OpArrayCopy |
1799 case lir_arraycopy: s = "arraycopy"; break; | |
11080
b800986664f4
7088419: Use x86 Hardware CRC32 Instruction with java.util.zip.CRC32
drchase
parents:
11004
diff
changeset
|
1800 // LIR_OpUpdateCRC32 |
b800986664f4
7088419: Use x86 Hardware CRC32 Instruction with java.util.zip.CRC32
drchase
parents:
11004
diff
changeset
|
1801 case lir_updatecrc32: s = "updatecrc32"; break; |
0 | 1802 // LIR_OpLock |
1803 case lir_lock: s = "lock"; break; | |
1804 case lir_unlock: s = "unlock"; break; | |
1805 // LIR_OpDelay | |
1806 case lir_delay_slot: s = "delay"; break; | |
1807 // LIR_OpTypeCheck | |
1808 case lir_instanceof: s = "instanceof"; break; | |
1809 case lir_checkcast: s = "checkcast"; break; | |
1810 case lir_store_check: s = "store_check"; break; | |
1811 // LIR_OpCompareAndSwap | |
1812 case lir_cas_long: s = "cas_long"; break; | |
1813 case lir_cas_obj: s = "cas_obj"; break; | |
1814 case lir_cas_int: s = "cas_int"; break; | |
1815 // LIR_OpProfileCall | |
1816 case lir_profile_call: s = "profile_call"; break; | |
12875
d13d7aba8c12
8023657: New type profiling points: arguments to call
roland
parents:
11080
diff
changeset
|
1817 // LIR_OpProfileType |
d13d7aba8c12
8023657: New type profiling points: arguments to call
roland
parents:
11080
diff
changeset
|
1818 case lir_profile_type: s = "profile_type"; break; |
8860 | 1819 // LIR_OpAssert |
9156
acadb114c818
8011648: C1: optimized build is broken after 7153771
roland
parents:
8860
diff
changeset
|
1820 #ifdef ASSERT |
8860 | 1821 case lir_assert: s = "assert"; break; |
9156
acadb114c818
8011648: C1: optimized build is broken after 7153771
roland
parents:
8860
diff
changeset
|
1822 #endif |
0 | 1823 case lir_none: ShouldNotReachHere();break; |
1824 default: s = "illegal_op"; break; | |
1825 } | |
1826 return s; | |
1827 } | |
1828 | |
1829 // LIR_OpJavaCall | |
1830 void LIR_OpJavaCall::print_instr(outputStream* out) const { | |
1831 out->print("call: "); | |
17937
78bbf4d43a14
8037816: Fix for 8036122 breaks build with Xcode5/clang
drchase
parents:
12969
diff
changeset
|
1832 out->print("[addr: " INTPTR_FORMAT "]", p2i(address())); |
0 | 1833 if (receiver()->is_valid()) { |
1834 out->print(" [recv: "); receiver()->print(out); out->print("]"); | |
1835 } | |
1836 if (result_opr()->is_valid()) { | |
1837 out->print(" [result: "); result_opr()->print(out); out->print("]"); | |
1838 } | |
1839 } | |
1840 | |
1841 // LIR_OpLabel | |
1842 void LIR_OpLabel::print_instr(outputStream* out) const { | |
17937
78bbf4d43a14
8037816: Fix for 8036122 breaks build with Xcode5/clang
drchase
parents:
12969
diff
changeset
|
1843 out->print("[label:" INTPTR_FORMAT "]", p2i(_label)); |
0 | 1844 } |
1845 | |
1846 // LIR_OpArrayCopy | |
1847 void LIR_OpArrayCopy::print_instr(outputStream* out) const { | |
1848 src()->print(out); out->print(" "); | |
1849 src_pos()->print(out); out->print(" "); | |
1850 dst()->print(out); out->print(" "); | |
1851 dst_pos()->print(out); out->print(" "); | |
1852 length()->print(out); out->print(" "); | |
1853 tmp()->print(out); out->print(" "); | |
1854 } | |
1855 | |
11080
b800986664f4
7088419: Use x86 Hardware CRC32 Instruction with java.util.zip.CRC32
drchase
parents:
11004
diff
changeset
|
1856 // LIR_OpUpdateCRC32 |
b800986664f4
7088419: Use x86 Hardware CRC32 Instruction with java.util.zip.CRC32
drchase
parents:
11004
diff
changeset
|
1857 void LIR_OpUpdateCRC32::print_instr(outputStream* out) const { |
b800986664f4
7088419: Use x86 Hardware CRC32 Instruction with java.util.zip.CRC32
drchase
parents:
11004
diff
changeset
|
1858 crc()->print(out); out->print(" "); |
b800986664f4
7088419: Use x86 Hardware CRC32 Instruction with java.util.zip.CRC32
drchase
parents:
11004
diff
changeset
|
1859 val()->print(out); out->print(" "); |
b800986664f4
7088419: Use x86 Hardware CRC32 Instruction with java.util.zip.CRC32
drchase
parents:
11004
diff
changeset
|
1860 result_opr()->print(out); out->print(" "); |
b800986664f4
7088419: Use x86 Hardware CRC32 Instruction with java.util.zip.CRC32
drchase
parents:
11004
diff
changeset
|
1861 } |
b800986664f4
7088419: Use x86 Hardware CRC32 Instruction with java.util.zip.CRC32
drchase
parents:
11004
diff
changeset
|
1862 |
0 | 1863 // LIR_OpCompareAndSwap |
1864 void LIR_OpCompareAndSwap::print_instr(outputStream* out) const { | |
1865 addr()->print(out); out->print(" "); | |
1866 cmp_value()->print(out); out->print(" "); | |
1867 new_value()->print(out); out->print(" "); | |
1868 tmp1()->print(out); out->print(" "); | |
1869 tmp2()->print(out); out->print(" "); | |
1870 | |
1871 } | |
1872 | |
1873 // LIR_Op0 | |
1874 void LIR_Op0::print_instr(outputStream* out) const { | |
1875 result_opr()->print(out); | |
1876 } | |
1877 | |
1878 // LIR_Op1 | |
1879 const char * LIR_Op1::name() const { | |
1880 if (code() == lir_move) { | |
1881 switch (move_kind()) { | |
1882 case lir_move_normal: | |
1883 return "move"; | |
1884 case lir_move_unaligned: | |
1885 return "unaligned move"; | |
1886 case lir_move_volatile: | |
1887 return "volatile_move"; | |
2002 | 1888 case lir_move_wide: |
1889 return "wide_move"; | |
0 | 1890 default: |
1891 ShouldNotReachHere(); | |
1892 return "illegal_op"; | |
1893 } | |
1894 } else { | |
1895 return LIR_Op::name(); | |
1896 } | |
1897 } | |
1898 | |
1899 | |
1900 void LIR_Op1::print_instr(outputStream* out) const { | |
1901 _opr->print(out); out->print(" "); | |
1902 result_opr()->print(out); out->print(" "); | |
1903 print_patch_code(out, patch_code()); | |
1904 } | |
1905 | |
1906 | |
1907 // LIR_Op1 | |
1908 void LIR_OpRTCall::print_instr(outputStream* out) const { | |
1909 intx a = (intx)addr(); | |
17937
78bbf4d43a14
8037816: Fix for 8036122 breaks build with Xcode5/clang
drchase
parents:
12969
diff
changeset
|
1910 out->print("%s", Runtime1::name_for_address(addr())); |
0 | 1911 out->print(" "); |
1912 tmp()->print(out); | |
1913 } | |
1914 | |
1915 void LIR_Op1::print_patch_code(outputStream* out, LIR_PatchCode code) { | |
1916 switch(code) { | |
1917 case lir_patch_none: break; | |
1918 case lir_patch_low: out->print("[patch_low]"); break; | |
1919 case lir_patch_high: out->print("[patch_high]"); break; | |
1920 case lir_patch_normal: out->print("[patch_normal]"); break; | |
1921 default: ShouldNotReachHere(); | |
1922 } | |
1923 } | |
1924 | |
1925 // LIR_OpBranch | |
1926 void LIR_OpBranch::print_instr(outputStream* out) const { | |
1927 print_condition(out, cond()); out->print(" "); | |
1928 if (block() != NULL) { | |
1929 out->print("[B%d] ", block()->block_id()); | |
1930 } else if (stub() != NULL) { | |
1931 out->print("["); | |
1932 stub()->print_name(out); | |
17937
78bbf4d43a14
8037816: Fix for 8036122 breaks build with Xcode5/clang
drchase
parents:
12969
diff
changeset
|
1933 out->print(": " INTPTR_FORMAT "]", p2i(stub())); |
1819 | 1934 if (stub()->info() != NULL) out->print(" [bci:%d]", stub()->info()->stack()->bci()); |
0 | 1935 } else { |
17937
78bbf4d43a14
8037816: Fix for 8036122 breaks build with Xcode5/clang
drchase
parents:
12969
diff
changeset
|
1936 out->print("[label:" INTPTR_FORMAT "] ", p2i(label())); |
0 | 1937 } |
1938 if (ublock() != NULL) { | |
1939 out->print("unordered: [B%d] ", ublock()->block_id()); | |
1940 } | |
1941 } | |
1942 | |
1943 void LIR_Op::print_condition(outputStream* out, LIR_Condition cond) { | |
1944 switch(cond) { | |
1945 case lir_cond_equal: out->print("[EQ]"); break; | |
1946 case lir_cond_notEqual: out->print("[NE]"); break; | |
1947 case lir_cond_less: out->print("[LT]"); break; | |
1948 case lir_cond_lessEqual: out->print("[LE]"); break; | |
1949 case lir_cond_greaterEqual: out->print("[GE]"); break; | |
1950 case lir_cond_greater: out->print("[GT]"); break; | |
1951 case lir_cond_belowEqual: out->print("[BE]"); break; | |
1952 case lir_cond_aboveEqual: out->print("[AE]"); break; | |
1953 case lir_cond_always: out->print("[AL]"); break; | |
1954 default: out->print("[%d]",cond); break; | |
1955 } | |
1956 } | |
1957 | |
1958 // LIR_OpConvert | |
1959 void LIR_OpConvert::print_instr(outputStream* out) const { | |
1960 print_bytecode(out, bytecode()); | |
1961 in_opr()->print(out); out->print(" "); | |
1962 result_opr()->print(out); out->print(" "); | |
1681
126ea7725993
6953477: Increase portability and flexibility of building Hotspot
bobv
parents:
1579
diff
changeset
|
1963 #ifdef PPC |
126ea7725993
6953477: Increase portability and flexibility of building Hotspot
bobv
parents:
1579
diff
changeset
|
1964 if(tmp1()->is_valid()) { |
126ea7725993
6953477: Increase portability and flexibility of building Hotspot
bobv
parents:
1579
diff
changeset
|
1965 tmp1()->print(out); out->print(" "); |
126ea7725993
6953477: Increase portability and flexibility of building Hotspot
bobv
parents:
1579
diff
changeset
|
1966 tmp2()->print(out); out->print(" "); |
126ea7725993
6953477: Increase portability and flexibility of building Hotspot
bobv
parents:
1579
diff
changeset
|
1967 } |
126ea7725993
6953477: Increase portability and flexibility of building Hotspot
bobv
parents:
1579
diff
changeset
|
1968 #endif |
0 | 1969 } |
1970 | |
1971 void LIR_OpConvert::print_bytecode(outputStream* out, Bytecodes::Code code) { | |
1972 switch(code) { | |
1973 case Bytecodes::_d2f: out->print("[d2f] "); break; | |
1974 case Bytecodes::_d2i: out->print("[d2i] "); break; | |
1975 case Bytecodes::_d2l: out->print("[d2l] "); break; | |
1976 case Bytecodes::_f2d: out->print("[f2d] "); break; | |
1977 case Bytecodes::_f2i: out->print("[f2i] "); break; | |
1978 case Bytecodes::_f2l: out->print("[f2l] "); break; | |
1979 case Bytecodes::_i2b: out->print("[i2b] "); break; | |
1980 case Bytecodes::_i2c: out->print("[i2c] "); break; | |
1981 case Bytecodes::_i2d: out->print("[i2d] "); break; | |
1982 case Bytecodes::_i2f: out->print("[i2f] "); break; | |
1983 case Bytecodes::_i2l: out->print("[i2l] "); break; | |
1984 case Bytecodes::_i2s: out->print("[i2s] "); break; | |
1985 case Bytecodes::_l2i: out->print("[l2i] "); break; | |
1986 case Bytecodes::_l2f: out->print("[l2f] "); break; | |
1987 case Bytecodes::_l2d: out->print("[l2d] "); break; | |
1988 default: | |
1989 out->print("[?%d]",code); | |
1990 break; | |
1991 } | |
1992 } | |
1993 | |
1994 void LIR_OpAllocObj::print_instr(outputStream* out) const { | |
1995 klass()->print(out); out->print(" "); | |
1996 obj()->print(out); out->print(" "); | |
1997 tmp1()->print(out); out->print(" "); | |
1998 tmp2()->print(out); out->print(" "); | |
1999 tmp3()->print(out); out->print(" "); | |
2000 tmp4()->print(out); out->print(" "); | |
2001 out->print("[hdr:%d]", header_size()); out->print(" "); | |
2002 out->print("[obj:%d]", object_size()); out->print(" "); | |
17937
78bbf4d43a14
8037816: Fix for 8036122 breaks build with Xcode5/clang
drchase
parents:
12969
diff
changeset
|
2003 out->print("[lbl:" INTPTR_FORMAT "]", p2i(stub()->entry())); |
0 | 2004 } |
2005 | |
2006 void LIR_OpRoundFP::print_instr(outputStream* out) const { | |
2007 _opr->print(out); out->print(" "); | |
2008 tmp()->print(out); out->print(" "); | |
2009 result_opr()->print(out); out->print(" "); | |
2010 } | |
2011 | |
2012 // LIR_Op2 | |
2013 void LIR_Op2::print_instr(outputStream* out) const { | |
2014 if (code() == lir_cmove) { | |
2015 print_condition(out, condition()); out->print(" "); | |
2016 } | |
2017 in_opr1()->print(out); out->print(" "); | |
2018 in_opr2()->print(out); out->print(" "); | |
6084
6759698e3140
7133857: exp() and pow() should use the x87 ISA on x86
roland
parents:
4966
diff
changeset
|
2019 if (tmp1_opr()->is_valid()) { tmp1_opr()->print(out); out->print(" "); } |
6759698e3140
7133857: exp() and pow() should use the x87 ISA on x86
roland
parents:
4966
diff
changeset
|
2020 if (tmp2_opr()->is_valid()) { tmp2_opr()->print(out); out->print(" "); } |
6759698e3140
7133857: exp() and pow() should use the x87 ISA on x86
roland
parents:
4966
diff
changeset
|
2021 if (tmp3_opr()->is_valid()) { tmp3_opr()->print(out); out->print(" "); } |
6759698e3140
7133857: exp() and pow() should use the x87 ISA on x86
roland
parents:
4966
diff
changeset
|
2022 if (tmp4_opr()->is_valid()) { tmp4_opr()->print(out); out->print(" "); } |
6759698e3140
7133857: exp() and pow() should use the x87 ISA on x86
roland
parents:
4966
diff
changeset
|
2023 if (tmp5_opr()->is_valid()) { tmp5_opr()->print(out); out->print(" "); } |
0 | 2024 result_opr()->print(out); |
2025 } | |
2026 | |
2027 void LIR_OpAllocArray::print_instr(outputStream* out) const { | |
2028 klass()->print(out); out->print(" "); | |
2029 len()->print(out); out->print(" "); | |
2030 obj()->print(out); out->print(" "); | |
2031 tmp1()->print(out); out->print(" "); | |
2032 tmp2()->print(out); out->print(" "); | |
2033 tmp3()->print(out); out->print(" "); | |
2034 tmp4()->print(out); out->print(" "); | |
2035 out->print("[type:0x%x]", type()); out->print(" "); | |
17937
78bbf4d43a14
8037816: Fix for 8036122 breaks build with Xcode5/clang
drchase
parents:
12969
diff
changeset
|
2036 out->print("[label:" INTPTR_FORMAT "]", p2i(stub()->entry())); |
0 | 2037 } |
2038 | |
2039 | |
2040 void LIR_OpTypeCheck::print_instr(outputStream* out) const { | |
2041 object()->print(out); out->print(" "); | |
2042 if (code() == lir_store_check) { | |
2043 array()->print(out); out->print(" "); | |
2044 } | |
2045 if (code() != lir_store_check) { | |
2046 klass()->print_name_on(out); out->print(" "); | |
2047 if (fast_check()) out->print("fast_check "); | |
2048 } | |
2049 tmp1()->print(out); out->print(" "); | |
2050 tmp2()->print(out); out->print(" "); | |
2051 tmp3()->print(out); out->print(" "); | |
2052 result_opr()->print(out); out->print(" "); | |
1819 | 2053 if (info_for_exception() != NULL) out->print(" [bci:%d]", info_for_exception()->stack()->bci()); |
0 | 2054 } |
2055 | |
2056 | |
2057 // LIR_Op3 | |
2058 void LIR_Op3::print_instr(outputStream* out) const { | |
2059 in_opr1()->print(out); out->print(" "); | |
2060 in_opr2()->print(out); out->print(" "); | |
2061 in_opr3()->print(out); out->print(" "); | |
2062 result_opr()->print(out); | |
2063 } | |
2064 | |
2065 | |
2066 void LIR_OpLock::print_instr(outputStream* out) const { | |
2067 hdr_opr()->print(out); out->print(" "); | |
2068 obj_opr()->print(out); out->print(" "); | |
2069 lock_opr()->print(out); out->print(" "); | |
2070 if (_scratch->is_valid()) { | |
2071 _scratch->print(out); out->print(" "); | |
2072 } | |
17937
78bbf4d43a14
8037816: Fix for 8036122 breaks build with Xcode5/clang
drchase
parents:
12969
diff
changeset
|
2073 out->print("[lbl:" INTPTR_FORMAT "]", p2i(stub()->entry())); |
0 | 2074 } |
2075 | |
9156
acadb114c818
8011648: C1: optimized build is broken after 7153771
roland
parents:
8860
diff
changeset
|
2076 #ifdef ASSERT |
8860 | 2077 void LIR_OpAssert::print_instr(outputStream* out) const { |
2078 print_condition(out, condition()); out->print(" "); | |
2079 in_opr1()->print(out); out->print(" "); | |
2080 in_opr2()->print(out); out->print(", \""); | |
17937
78bbf4d43a14
8037816: Fix for 8036122 breaks build with Xcode5/clang
drchase
parents:
12969
diff
changeset
|
2081 out->print("%s", msg()); out->print("\""); |
8860 | 2082 } |
9156
acadb114c818
8011648: C1: optimized build is broken after 7153771
roland
parents:
8860
diff
changeset
|
2083 #endif |
8860 | 2084 |
0 | 2085 |
2086 void LIR_OpDelay::print_instr(outputStream* out) const { | |
2087 _op->print_on(out); | |
2088 } | |
2089 | |
2090 | |
2091 // LIR_OpProfileCall | |
2092 void LIR_OpProfileCall::print_instr(outputStream* out) const { | |
2093 profiled_method()->name()->print_symbol_on(out); | |
2094 out->print("."); | |
2095 profiled_method()->holder()->name()->print_symbol_on(out); | |
2096 out->print(" @ %d ", profiled_bci()); | |
2097 mdo()->print(out); out->print(" "); | |
2098 recv()->print(out); out->print(" "); | |
2099 tmp1()->print(out); out->print(" "); | |
2100 } | |
2101 | |
12875
d13d7aba8c12
8023657: New type profiling points: arguments to call
roland
parents:
11080
diff
changeset
|
2102 // LIR_OpProfileType |
d13d7aba8c12
8023657: New type profiling points: arguments to call
roland
parents:
11080
diff
changeset
|
2103 void LIR_OpProfileType::print_instr(outputStream* out) const { |
d13d7aba8c12
8023657: New type profiling points: arguments to call
roland
parents:
11080
diff
changeset
|
2104 out->print("exact = "); exact_klass()->print_name_on(out); |
d13d7aba8c12
8023657: New type profiling points: arguments to call
roland
parents:
11080
diff
changeset
|
2105 out->print("current = "); ciTypeEntries::print_ciklass(out, current_klass()); |
d13d7aba8c12
8023657: New type profiling points: arguments to call
roland
parents:
11080
diff
changeset
|
2106 mdp()->print(out); out->print(" "); |
d13d7aba8c12
8023657: New type profiling points: arguments to call
roland
parents:
11080
diff
changeset
|
2107 obj()->print(out); out->print(" "); |
d13d7aba8c12
8023657: New type profiling points: arguments to call
roland
parents:
11080
diff
changeset
|
2108 tmp()->print(out); out->print(" "); |
d13d7aba8c12
8023657: New type profiling points: arguments to call
roland
parents:
11080
diff
changeset
|
2109 } |
d13d7aba8c12
8023657: New type profiling points: arguments to call
roland
parents:
11080
diff
changeset
|
2110 |
0 | 2111 #endif // PRODUCT |
2112 | |
2113 // Implementation of LIR_InsertionBuffer | |
2114 | |
2115 void LIR_InsertionBuffer::append(int index, LIR_Op* op) { | |
2116 assert(_index_and_count.length() % 2 == 0, "must have a count for each index"); | |
2117 | |
2118 int i = number_of_insertion_points() - 1; | |
2119 if (i < 0 || index_at(i) < index) { | |
2120 append_new(index, 1); | |
2121 } else { | |
2122 assert(index_at(i) == index, "can append LIR_Ops in ascending order only"); | |
2123 assert(count_at(i) > 0, "check"); | |
2124 set_count_at(i, count_at(i) + 1); | |
2125 } | |
2126 _ops.push(op); | |
2127 | |
2128 DEBUG_ONLY(verify()); | |
2129 } | |
2130 | |
2131 #ifdef ASSERT | |
2132 void LIR_InsertionBuffer::verify() { | |
2133 int sum = 0; | |
2134 int prev_idx = -1; | |
2135 | |
2136 for (int i = 0; i < number_of_insertion_points(); i++) { | |
2137 assert(prev_idx < index_at(i), "index must be ordered ascending"); | |
2138 sum += count_at(i); | |
2139 } | |
2140 assert(sum == number_of_ops(), "wrong total sum"); | |
2141 } | |
2142 #endif |