annotate src/cpu/x86/vm/sharedRuntime_x86_64.cpp @ 22298:c28cb37b2e1d

Rename JVMCI to INCLUDE_JVMCI.
author twisti
date Wed, 22 Jul 2015 08:56:03 -0700
parents 525c4df9428b
children c2c971a9776f
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1 /*
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2 * Copyright (c) 2003, 2013, Oracle and/or its affiliates. All rights reserved.
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3 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
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4 *
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5 * This code is free software; you can redistribute it and/or modify it
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6 * under the terms of the GNU General Public License version 2 only, as
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7 * published by the Free Software Foundation.
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8 *
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9 * This code is distributed in the hope that it will be useful, but WITHOUT
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10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
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12 * version 2 for more details (a copy is included in the LICENSE file that
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13 * accompanied this code).
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14 *
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15 * You should have received a copy of the GNU General Public License version
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16 * 2 along with this work; if not, write to the Free Software Foundation,
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17 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
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18 *
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19 * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
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20 * or visit www.oracle.com if you need additional information or have any
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21 * questions.
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22 *
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23 */
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24
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25 #include "precompiled.hpp"
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26 #include "asm/macroAssembler.hpp"
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27 #include "asm/macroAssembler.inline.hpp"
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28 #include "code/debugInfoRec.hpp"
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29 #include "code/icBuffer.hpp"
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30 #include "code/vtableStubs.hpp"
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31 #include "interpreter/interpreter.hpp"
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32 #include "oops/compiledICHolder.hpp"
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33 #include "prims/jvmtiRedefineClassesTrace.hpp"
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34 #include "runtime/sharedRuntime.hpp"
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35 #include "runtime/vframeArray.hpp"
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36 #include "vmreg_x86.inline.hpp"
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37 #ifdef COMPILER1
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38 #include "c1/c1_Runtime1.hpp"
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39 #endif
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40 #ifdef COMPILER2
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41 #include "opto/runtime.hpp"
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42 #endif
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43 #if INCLUDE_JVMCI
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44 #include "jvmci/jvmciJavaAccess.hpp"
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45 #endif
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46
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47 #define __ masm->
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48
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49 const int StackAlignmentInSlots = StackAlignmentInBytes / VMRegImpl::stack_slot_size;
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50
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51 class SimpleRuntimeFrame {
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52
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53 public:
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54
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55 // Most of the runtime stubs have this simple frame layout.
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56 // This class exists to make the layout shared in one place.
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57 // Offsets are for compiler stack slots, which are jints.
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58 enum layout {
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59 // The frame sender code expects that rbp will be in the "natural" place and
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60 // will override any oopMap setting for it. We must therefore force the layout
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61 // so that it agrees with the frame sender code.
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62 rbp_off = frame::arg_reg_save_area_bytes/BytesPerInt,
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63 rbp_off2,
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64 return_off, return_off2,
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65 framesize
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66 };
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67 };
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68
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69 class RegisterSaver {
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70 // Capture info about frame layout. Layout offsets are in jint
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71 // units because compiler frame slots are jints.
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72 #define DEF_XMM_OFFS(regnum) xmm ## regnum ## _off = xmm_off + (regnum)*16/BytesPerInt, xmm ## regnum ## H_off
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73 enum layout {
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74 fpu_state_off = frame::arg_reg_save_area_bytes/BytesPerInt, // fxsave save area
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75 xmm_off = fpu_state_off + 160/BytesPerInt, // offset in fxsave save area
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76 DEF_XMM_OFFS(0),
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77 DEF_XMM_OFFS(1),
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78 DEF_XMM_OFFS(2),
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79 DEF_XMM_OFFS(3),
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80 DEF_XMM_OFFS(4),
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81 DEF_XMM_OFFS(5),
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82 DEF_XMM_OFFS(6),
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83 DEF_XMM_OFFS(7),
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84 DEF_XMM_OFFS(8),
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85 DEF_XMM_OFFS(9),
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86 DEF_XMM_OFFS(10),
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87 DEF_XMM_OFFS(11),
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88 DEF_XMM_OFFS(12),
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89 DEF_XMM_OFFS(13),
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90 DEF_XMM_OFFS(14),
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91 DEF_XMM_OFFS(15),
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92 fpu_state_end = fpu_state_off + ((FPUStateSizeInWords-1)*wordSize / BytesPerInt),
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93 fpu_stateH_end,
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94 r15_off, r15H_off,
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95 r14_off, r14H_off,
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96 r13_off, r13H_off,
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97 r12_off, r12H_off,
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98 r11_off, r11H_off,
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99 r10_off, r10H_off,
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100 r9_off, r9H_off,
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101 r8_off, r8H_off,
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102 rdi_off, rdiH_off,
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103 rsi_off, rsiH_off,
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104 ignore_off, ignoreH_off, // extra copy of rbp
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105 rsp_off, rspH_off,
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106 rbx_off, rbxH_off,
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107 rdx_off, rdxH_off,
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108 rcx_off, rcxH_off,
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109 rax_off, raxH_off,
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110 // 16-byte stack alignment fill word: see MacroAssembler::push/pop_IU_state
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111 align_off, alignH_off,
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112 flags_off, flagsH_off,
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113 // The frame sender code expects that rbp will be in the "natural" place and
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114 // will override any oopMap setting for it. We must therefore force the layout
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115 // so that it agrees with the frame sender code.
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116 rbp_off, rbpH_off, // copy of rbp we will restore
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117 return_off, returnH_off, // slot for return address
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118 reg_save_size // size in compiler stack slots
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119 };
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120
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121 public:
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122 static OopMap* save_live_registers(MacroAssembler* masm, int additional_frame_words, int* total_frame_words, bool save_vectors = false);
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123 static void restore_live_registers(MacroAssembler* masm, bool restore_vectors = false);
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124
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125 // Offsets into the register save area
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126 // Used by deoptimization when it is managing result register
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127 // values on its own
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128
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129 static int rax_offset_in_bytes(void) { return BytesPerInt * rax_off; }
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130 static int rdx_offset_in_bytes(void) { return BytesPerInt * rdx_off; }
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131 static int rbx_offset_in_bytes(void) { return BytesPerInt * rbx_off; }
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132 static int r10_offset_in_bytes(void) { return BytesPerInt * r10_off; }
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133 static int xmm0_offset_in_bytes(void) { return BytesPerInt * xmm0_off; }
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134 static int return_offset_in_bytes(void) { return BytesPerInt * return_off; }
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135
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136 // During deoptimization only the result registers need to be restored,
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137 // all the other values have already been extracted.
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138 static void restore_result_registers(MacroAssembler* masm);
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139 };
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140
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141 OopMap* RegisterSaver::save_live_registers(MacroAssembler* masm, int additional_frame_words, int* total_frame_words, bool save_vectors) {
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142 int vect_words = 0;
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143 int ymmhi_offset = -1;
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144 #if defined(COMPILER2) || INCLUDE_JVMCI
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145 if (save_vectors) {
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146 assert(UseAVX > 0, "256bit vectors are supported only with AVX");
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147 assert(MaxVectorSize == 32, "only 256bit vectors are supported now");
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148 // Save upper half of YMM registes
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149 vect_words = 16 * 16 / wordSize;
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150 ymmhi_offset = additional_frame_words;
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151 additional_frame_words += vect_words;
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152 }
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153 #else
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154 assert(!save_vectors, "vectors are generated only by C2 and JVMCI");
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155 #endif
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156
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157 // Always make the frame size 16-byte aligned
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158 int frame_size_in_bytes = round_to(additional_frame_words*wordSize +
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159 reg_save_size*BytesPerInt, 16);
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160 // OopMap frame size is in compiler stack slots (jint's) not bytes or words
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161 int frame_size_in_slots = frame_size_in_bytes / BytesPerInt;
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162 // The caller will allocate additional_frame_words
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163 int additional_frame_slots = additional_frame_words*wordSize / BytesPerInt;
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164 // CodeBlob frame size is in words.
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165 int frame_size_in_words = frame_size_in_bytes / wordSize;
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166 *total_frame_words = frame_size_in_words;
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167
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168 // Save registers, fpu state, and flags.
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169 // We assume caller has already pushed the return address onto the
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170 // stack, so rsp is 8-byte aligned here.
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171 // We push rpb twice in this sequence because we want the real rbp
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172 // to be under the return like a normal enter.
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173
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174 __ enter(); // rsp becomes 16-byte aligned here
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175 __ push_CPU_state(); // Push a multiple of 16 bytes
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176
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177 if (vect_words > 0) {
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178 assert(vect_words*wordSize == 256, "");
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179 __ subptr(rsp, 256); // Save upper half of YMM registes
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180 __ vextractf128h(Address(rsp, 0),xmm0);
525c4df9428b Corrected ymm save location description
Tom Rodriguez <tom.rodriguez@oracle.com>
parents: 21761
diff changeset
181 __ vextractf128h(Address(rsp, 16),xmm1);
525c4df9428b Corrected ymm save location description
Tom Rodriguez <tom.rodriguez@oracle.com>
parents: 21761
diff changeset
182 __ vextractf128h(Address(rsp, 32),xmm2);
525c4df9428b Corrected ymm save location description
Tom Rodriguez <tom.rodriguez@oracle.com>
parents: 21761
diff changeset
183 __ vextractf128h(Address(rsp, 48),xmm3);
525c4df9428b Corrected ymm save location description
Tom Rodriguez <tom.rodriguez@oracle.com>
parents: 21761
diff changeset
184 __ vextractf128h(Address(rsp, 64),xmm4);
525c4df9428b Corrected ymm save location description
Tom Rodriguez <tom.rodriguez@oracle.com>
parents: 21761
diff changeset
185 __ vextractf128h(Address(rsp, 80),xmm5);
525c4df9428b Corrected ymm save location description
Tom Rodriguez <tom.rodriguez@oracle.com>
parents: 21761
diff changeset
186 __ vextractf128h(Address(rsp, 96),xmm6);
525c4df9428b Corrected ymm save location description
Tom Rodriguez <tom.rodriguez@oracle.com>
parents: 21761
diff changeset
187 __ vextractf128h(Address(rsp,112),xmm7);
525c4df9428b Corrected ymm save location description
Tom Rodriguez <tom.rodriguez@oracle.com>
parents: 21761
diff changeset
188 __ vextractf128h(Address(rsp,128),xmm8);
525c4df9428b Corrected ymm save location description
Tom Rodriguez <tom.rodriguez@oracle.com>
parents: 21761
diff changeset
189 __ vextractf128h(Address(rsp,144),xmm9);
525c4df9428b Corrected ymm save location description
Tom Rodriguez <tom.rodriguez@oracle.com>
parents: 21761
diff changeset
190 __ vextractf128h(Address(rsp,160),xmm10);
525c4df9428b Corrected ymm save location description
Tom Rodriguez <tom.rodriguez@oracle.com>
parents: 21761
diff changeset
191 __ vextractf128h(Address(rsp,176),xmm11);
525c4df9428b Corrected ymm save location description
Tom Rodriguez <tom.rodriguez@oracle.com>
parents: 21761
diff changeset
192 __ vextractf128h(Address(rsp,192),xmm12);
525c4df9428b Corrected ymm save location description
Tom Rodriguez <tom.rodriguez@oracle.com>
parents: 21761
diff changeset
193 __ vextractf128h(Address(rsp,208),xmm13);
525c4df9428b Corrected ymm save location description
Tom Rodriguez <tom.rodriguez@oracle.com>
parents: 21761
diff changeset
194 __ vextractf128h(Address(rsp,224),xmm14);
525c4df9428b Corrected ymm save location description
Tom Rodriguez <tom.rodriguez@oracle.com>
parents: 21761
diff changeset
195 __ vextractf128h(Address(rsp,240),xmm15);
6792
137868b7aa6f 7196199: java/text/Bidi/Bug6665028.java failed: Bidi run count incorrect
kvn
parents: 6790
diff changeset
196 }
0
a61af66fc99e Initial load
duke
parents:
diff changeset
197 if (frame::arg_reg_save_area_bytes != 0) {
a61af66fc99e Initial load
duke
parents:
diff changeset
198 // Allocate argument register save area
304
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 196
diff changeset
199 __ subptr(rsp, frame::arg_reg_save_area_bytes);
0
a61af66fc99e Initial load
duke
parents:
diff changeset
200 }
a61af66fc99e Initial load
duke
parents:
diff changeset
201
a61af66fc99e Initial load
duke
parents:
diff changeset
202 // Set an oopmap for the call site. This oopmap will map all
a61af66fc99e Initial load
duke
parents:
diff changeset
203 // oop-registers and debug-info registers as callee-saved. This
a61af66fc99e Initial load
duke
parents:
diff changeset
204 // will allow deoptimization at this safepoint to find all possible
a61af66fc99e Initial load
duke
parents:
diff changeset
205 // debug-info recordings, as well as let GC find all oops.
a61af66fc99e Initial load
duke
parents:
diff changeset
206
a61af66fc99e Initial load
duke
parents:
diff changeset
207 OopMapSet *oop_maps = new OopMapSet();
a61af66fc99e Initial load
duke
parents:
diff changeset
208 OopMap* map = new OopMap(frame_size_in_slots, 0);
6792
137868b7aa6f 7196199: java/text/Bidi/Bug6665028.java failed: Bidi run count incorrect
kvn
parents: 6790
diff changeset
209
137868b7aa6f 7196199: java/text/Bidi/Bug6665028.java failed: Bidi run count incorrect
kvn
parents: 6790
diff changeset
210 #define STACK_OFFSET(x) VMRegImpl::stack2reg((x) + additional_frame_slots)
21884
525c4df9428b Corrected ymm save location description
Tom Rodriguez <tom.rodriguez@oracle.com>
parents: 21761
diff changeset
211 #define YMMHI_STACK_OFFSET(x) VMRegImpl::stack2reg((x / VMRegImpl::stack_slot_size) + ymmhi_offset)
6792
137868b7aa6f 7196199: java/text/Bidi/Bug6665028.java failed: Bidi run count incorrect
kvn
parents: 6790
diff changeset
212
137868b7aa6f 7196199: java/text/Bidi/Bug6665028.java failed: Bidi run count incorrect
kvn
parents: 6790
diff changeset
213 map->set_callee_saved(STACK_OFFSET( rax_off ), rax->as_VMReg());
137868b7aa6f 7196199: java/text/Bidi/Bug6665028.java failed: Bidi run count incorrect
kvn
parents: 6790
diff changeset
214 map->set_callee_saved(STACK_OFFSET( rcx_off ), rcx->as_VMReg());
137868b7aa6f 7196199: java/text/Bidi/Bug6665028.java failed: Bidi run count incorrect
kvn
parents: 6790
diff changeset
215 map->set_callee_saved(STACK_OFFSET( rdx_off ), rdx->as_VMReg());
137868b7aa6f 7196199: java/text/Bidi/Bug6665028.java failed: Bidi run count incorrect
kvn
parents: 6790
diff changeset
216 map->set_callee_saved(STACK_OFFSET( rbx_off ), rbx->as_VMReg());
0
a61af66fc99e Initial load
duke
parents:
diff changeset
217 // rbp location is known implicitly by the frame sender code, needs no oopmap
a61af66fc99e Initial load
duke
parents:
diff changeset
218 // and the location where rbp was saved by is ignored
6792
137868b7aa6f 7196199: java/text/Bidi/Bug6665028.java failed: Bidi run count incorrect
kvn
parents: 6790
diff changeset
219 map->set_callee_saved(STACK_OFFSET( rsi_off ), rsi->as_VMReg());
137868b7aa6f 7196199: java/text/Bidi/Bug6665028.java failed: Bidi run count incorrect
kvn
parents: 6790
diff changeset
220 map->set_callee_saved(STACK_OFFSET( rdi_off ), rdi->as_VMReg());
137868b7aa6f 7196199: java/text/Bidi/Bug6665028.java failed: Bidi run count incorrect
kvn
parents: 6790
diff changeset
221 map->set_callee_saved(STACK_OFFSET( r8_off ), r8->as_VMReg());
137868b7aa6f 7196199: java/text/Bidi/Bug6665028.java failed: Bidi run count incorrect
kvn
parents: 6790
diff changeset
222 map->set_callee_saved(STACK_OFFSET( r9_off ), r9->as_VMReg());
137868b7aa6f 7196199: java/text/Bidi/Bug6665028.java failed: Bidi run count incorrect
kvn
parents: 6790
diff changeset
223 map->set_callee_saved(STACK_OFFSET( r10_off ), r10->as_VMReg());
137868b7aa6f 7196199: java/text/Bidi/Bug6665028.java failed: Bidi run count incorrect
kvn
parents: 6790
diff changeset
224 map->set_callee_saved(STACK_OFFSET( r11_off ), r11->as_VMReg());
137868b7aa6f 7196199: java/text/Bidi/Bug6665028.java failed: Bidi run count incorrect
kvn
parents: 6790
diff changeset
225 map->set_callee_saved(STACK_OFFSET( r12_off ), r12->as_VMReg());
137868b7aa6f 7196199: java/text/Bidi/Bug6665028.java failed: Bidi run count incorrect
kvn
parents: 6790
diff changeset
226 map->set_callee_saved(STACK_OFFSET( r13_off ), r13->as_VMReg());
137868b7aa6f 7196199: java/text/Bidi/Bug6665028.java failed: Bidi run count incorrect
kvn
parents: 6790
diff changeset
227 map->set_callee_saved(STACK_OFFSET( r14_off ), r14->as_VMReg());
137868b7aa6f 7196199: java/text/Bidi/Bug6665028.java failed: Bidi run count incorrect
kvn
parents: 6790
diff changeset
228 map->set_callee_saved(STACK_OFFSET( r15_off ), r15->as_VMReg());
137868b7aa6f 7196199: java/text/Bidi/Bug6665028.java failed: Bidi run count incorrect
kvn
parents: 6790
diff changeset
229 map->set_callee_saved(STACK_OFFSET(xmm0_off ), xmm0->as_VMReg());
137868b7aa6f 7196199: java/text/Bidi/Bug6665028.java failed: Bidi run count incorrect
kvn
parents: 6790
diff changeset
230 map->set_callee_saved(STACK_OFFSET(xmm1_off ), xmm1->as_VMReg());
137868b7aa6f 7196199: java/text/Bidi/Bug6665028.java failed: Bidi run count incorrect
kvn
parents: 6790
diff changeset
231 map->set_callee_saved(STACK_OFFSET(xmm2_off ), xmm2->as_VMReg());
137868b7aa6f 7196199: java/text/Bidi/Bug6665028.java failed: Bidi run count incorrect
kvn
parents: 6790
diff changeset
232 map->set_callee_saved(STACK_OFFSET(xmm3_off ), xmm3->as_VMReg());
137868b7aa6f 7196199: java/text/Bidi/Bug6665028.java failed: Bidi run count incorrect
kvn
parents: 6790
diff changeset
233 map->set_callee_saved(STACK_OFFSET(xmm4_off ), xmm4->as_VMReg());
137868b7aa6f 7196199: java/text/Bidi/Bug6665028.java failed: Bidi run count incorrect
kvn
parents: 6790
diff changeset
234 map->set_callee_saved(STACK_OFFSET(xmm5_off ), xmm5->as_VMReg());
137868b7aa6f 7196199: java/text/Bidi/Bug6665028.java failed: Bidi run count incorrect
kvn
parents: 6790
diff changeset
235 map->set_callee_saved(STACK_OFFSET(xmm6_off ), xmm6->as_VMReg());
137868b7aa6f 7196199: java/text/Bidi/Bug6665028.java failed: Bidi run count incorrect
kvn
parents: 6790
diff changeset
236 map->set_callee_saved(STACK_OFFSET(xmm7_off ), xmm7->as_VMReg());
137868b7aa6f 7196199: java/text/Bidi/Bug6665028.java failed: Bidi run count incorrect
kvn
parents: 6790
diff changeset
237 map->set_callee_saved(STACK_OFFSET(xmm8_off ), xmm8->as_VMReg());
137868b7aa6f 7196199: java/text/Bidi/Bug6665028.java failed: Bidi run count incorrect
kvn
parents: 6790
diff changeset
238 map->set_callee_saved(STACK_OFFSET(xmm9_off ), xmm9->as_VMReg());
137868b7aa6f 7196199: java/text/Bidi/Bug6665028.java failed: Bidi run count incorrect
kvn
parents: 6790
diff changeset
239 map->set_callee_saved(STACK_OFFSET(xmm10_off), xmm10->as_VMReg());
137868b7aa6f 7196199: java/text/Bidi/Bug6665028.java failed: Bidi run count incorrect
kvn
parents: 6790
diff changeset
240 map->set_callee_saved(STACK_OFFSET(xmm11_off), xmm11->as_VMReg());
137868b7aa6f 7196199: java/text/Bidi/Bug6665028.java failed: Bidi run count incorrect
kvn
parents: 6790
diff changeset
241 map->set_callee_saved(STACK_OFFSET(xmm12_off), xmm12->as_VMReg());
137868b7aa6f 7196199: java/text/Bidi/Bug6665028.java failed: Bidi run count incorrect
kvn
parents: 6790
diff changeset
242 map->set_callee_saved(STACK_OFFSET(xmm13_off), xmm13->as_VMReg());
137868b7aa6f 7196199: java/text/Bidi/Bug6665028.java failed: Bidi run count incorrect
kvn
parents: 6790
diff changeset
243 map->set_callee_saved(STACK_OFFSET(xmm14_off), xmm14->as_VMReg());
137868b7aa6f 7196199: java/text/Bidi/Bug6665028.java failed: Bidi run count incorrect
kvn
parents: 6790
diff changeset
244 map->set_callee_saved(STACK_OFFSET(xmm15_off), xmm15->as_VMReg());
0
a61af66fc99e Initial load
duke
parents:
diff changeset
245
21737
c85c89f6b2d1 Reduce delta relative to hotspot for ymm register maps
Tom Rodriguez <tom.rodriguez@oracle.com>
parents: 21736
diff changeset
246
22298
c28cb37b2e1d Rename JVMCI to INCLUDE_JVMCI.
twisti
parents: 21884
diff changeset
247 #if defined(COMPILER2) || INCLUDE_JVMCI
21737
c85c89f6b2d1 Reduce delta relative to hotspot for ymm register maps
Tom Rodriguez <tom.rodriguez@oracle.com>
parents: 21736
diff changeset
248 if (save_vectors) {
21884
525c4df9428b Corrected ymm save location description
Tom Rodriguez <tom.rodriguez@oracle.com>
parents: 21761
diff changeset
249 assert(ymmhi_offset != -1, "save area must exist");
525c4df9428b Corrected ymm save location description
Tom Rodriguez <tom.rodriguez@oracle.com>
parents: 21761
diff changeset
250 map->set_callee_saved(YMMHI_STACK_OFFSET( 0), xmm0->as_VMReg()->next()->next()->next()->next());
525c4df9428b Corrected ymm save location description
Tom Rodriguez <tom.rodriguez@oracle.com>
parents: 21761
diff changeset
251 map->set_callee_saved(YMMHI_STACK_OFFSET( 16), xmm1->as_VMReg()->next()->next()->next()->next());
525c4df9428b Corrected ymm save location description
Tom Rodriguez <tom.rodriguez@oracle.com>
parents: 21761
diff changeset
252 map->set_callee_saved(YMMHI_STACK_OFFSET( 32), xmm2->as_VMReg()->next()->next()->next()->next());
525c4df9428b Corrected ymm save location description
Tom Rodriguez <tom.rodriguez@oracle.com>
parents: 21761
diff changeset
253 map->set_callee_saved(YMMHI_STACK_OFFSET( 48), xmm3->as_VMReg()->next()->next()->next()->next());
525c4df9428b Corrected ymm save location description
Tom Rodriguez <tom.rodriguez@oracle.com>
parents: 21761
diff changeset
254 map->set_callee_saved(YMMHI_STACK_OFFSET( 64), xmm4->as_VMReg()->next()->next()->next()->next());
525c4df9428b Corrected ymm save location description
Tom Rodriguez <tom.rodriguez@oracle.com>
parents: 21761
diff changeset
255 map->set_callee_saved(YMMHI_STACK_OFFSET( 80), xmm5->as_VMReg()->next()->next()->next()->next());
525c4df9428b Corrected ymm save location description
Tom Rodriguez <tom.rodriguez@oracle.com>
parents: 21761
diff changeset
256 map->set_callee_saved(YMMHI_STACK_OFFSET( 96), xmm6->as_VMReg()->next()->next()->next()->next());
525c4df9428b Corrected ymm save location description
Tom Rodriguez <tom.rodriguez@oracle.com>
parents: 21761
diff changeset
257 map->set_callee_saved(YMMHI_STACK_OFFSET(112), xmm7->as_VMReg()->next()->next()->next()->next());
525c4df9428b Corrected ymm save location description
Tom Rodriguez <tom.rodriguez@oracle.com>
parents: 21761
diff changeset
258 map->set_callee_saved(YMMHI_STACK_OFFSET(128), xmm8->as_VMReg()->next()->next()->next()->next());
525c4df9428b Corrected ymm save location description
Tom Rodriguez <tom.rodriguez@oracle.com>
parents: 21761
diff changeset
259 map->set_callee_saved(YMMHI_STACK_OFFSET(144), xmm9->as_VMReg()->next()->next()->next()->next());
525c4df9428b Corrected ymm save location description
Tom Rodriguez <tom.rodriguez@oracle.com>
parents: 21761
diff changeset
260 map->set_callee_saved(YMMHI_STACK_OFFSET(160), xmm10->as_VMReg()->next()->next()->next()->next());
525c4df9428b Corrected ymm save location description
Tom Rodriguez <tom.rodriguez@oracle.com>
parents: 21761
diff changeset
261 map->set_callee_saved(YMMHI_STACK_OFFSET(176), xmm11->as_VMReg()->next()->next()->next()->next());
525c4df9428b Corrected ymm save location description
Tom Rodriguez <tom.rodriguez@oracle.com>
parents: 21761
diff changeset
262 map->set_callee_saved(YMMHI_STACK_OFFSET(192), xmm12->as_VMReg()->next()->next()->next()->next());
525c4df9428b Corrected ymm save location description
Tom Rodriguez <tom.rodriguez@oracle.com>
parents: 21761
diff changeset
263 map->set_callee_saved(YMMHI_STACK_OFFSET(208), xmm13->as_VMReg()->next()->next()->next()->next());
525c4df9428b Corrected ymm save location description
Tom Rodriguez <tom.rodriguez@oracle.com>
parents: 21761
diff changeset
264 map->set_callee_saved(YMMHI_STACK_OFFSET(224), xmm14->as_VMReg()->next()->next()->next()->next());
525c4df9428b Corrected ymm save location description
Tom Rodriguez <tom.rodriguez@oracle.com>
parents: 21761
diff changeset
265 map->set_callee_saved(YMMHI_STACK_OFFSET(240), xmm15->as_VMReg()->next()->next()->next()->next());
21737
c85c89f6b2d1 Reduce delta relative to hotspot for ymm register maps
Tom Rodriguez <tom.rodriguez@oracle.com>
parents: 21736
diff changeset
266 }
c85c89f6b2d1 Reduce delta relative to hotspot for ymm register maps
Tom Rodriguez <tom.rodriguez@oracle.com>
parents: 21736
diff changeset
267 #endif
c85c89f6b2d1 Reduce delta relative to hotspot for ymm register maps
Tom Rodriguez <tom.rodriguez@oracle.com>
parents: 21736
diff changeset
268
0
a61af66fc99e Initial load
duke
parents:
diff changeset
269 // %%% These should all be a waste but we'll keep things as they were for now
a61af66fc99e Initial load
duke
parents:
diff changeset
270 if (true) {
6792
137868b7aa6f 7196199: java/text/Bidi/Bug6665028.java failed: Bidi run count incorrect
kvn
parents: 6790
diff changeset
271 map->set_callee_saved(STACK_OFFSET( raxH_off ), rax->as_VMReg()->next());
137868b7aa6f 7196199: java/text/Bidi/Bug6665028.java failed: Bidi run count incorrect
kvn
parents: 6790
diff changeset
272 map->set_callee_saved(STACK_OFFSET( rcxH_off ), rcx->as_VMReg()->next());
137868b7aa6f 7196199: java/text/Bidi/Bug6665028.java failed: Bidi run count incorrect
kvn
parents: 6790
diff changeset
273 map->set_callee_saved(STACK_OFFSET( rdxH_off ), rdx->as_VMReg()->next());
137868b7aa6f 7196199: java/text/Bidi/Bug6665028.java failed: Bidi run count incorrect
kvn
parents: 6790
diff changeset
274 map->set_callee_saved(STACK_OFFSET( rbxH_off ), rbx->as_VMReg()->next());
0
a61af66fc99e Initial load
duke
parents:
diff changeset
275 // rbp location is known implicitly by the frame sender code, needs no oopmap
6792
137868b7aa6f 7196199: java/text/Bidi/Bug6665028.java failed: Bidi run count incorrect
kvn
parents: 6790
diff changeset
276 map->set_callee_saved(STACK_OFFSET( rsiH_off ), rsi->as_VMReg()->next());
137868b7aa6f 7196199: java/text/Bidi/Bug6665028.java failed: Bidi run count incorrect
kvn
parents: 6790
diff changeset
277 map->set_callee_saved(STACK_OFFSET( rdiH_off ), rdi->as_VMReg()->next());
137868b7aa6f 7196199: java/text/Bidi/Bug6665028.java failed: Bidi run count incorrect
kvn
parents: 6790
diff changeset
278 map->set_callee_saved(STACK_OFFSET( r8H_off ), r8->as_VMReg()->next());
137868b7aa6f 7196199: java/text/Bidi/Bug6665028.java failed: Bidi run count incorrect
kvn
parents: 6790
diff changeset
279 map->set_callee_saved(STACK_OFFSET( r9H_off ), r9->as_VMReg()->next());
137868b7aa6f 7196199: java/text/Bidi/Bug6665028.java failed: Bidi run count incorrect
kvn
parents: 6790
diff changeset
280 map->set_callee_saved(STACK_OFFSET( r10H_off ), r10->as_VMReg()->next());
137868b7aa6f 7196199: java/text/Bidi/Bug6665028.java failed: Bidi run count incorrect
kvn
parents: 6790
diff changeset
281 map->set_callee_saved(STACK_OFFSET( r11H_off ), r11->as_VMReg()->next());
137868b7aa6f 7196199: java/text/Bidi/Bug6665028.java failed: Bidi run count incorrect
kvn
parents: 6790
diff changeset
282 map->set_callee_saved(STACK_OFFSET( r12H_off ), r12->as_VMReg()->next());
137868b7aa6f 7196199: java/text/Bidi/Bug6665028.java failed: Bidi run count incorrect
kvn
parents: 6790
diff changeset
283 map->set_callee_saved(STACK_OFFSET( r13H_off ), r13->as_VMReg()->next());
137868b7aa6f 7196199: java/text/Bidi/Bug6665028.java failed: Bidi run count incorrect
kvn
parents: 6790
diff changeset
284 map->set_callee_saved(STACK_OFFSET( r14H_off ), r14->as_VMReg()->next());
137868b7aa6f 7196199: java/text/Bidi/Bug6665028.java failed: Bidi run count incorrect
kvn
parents: 6790
diff changeset
285 map->set_callee_saved(STACK_OFFSET( r15H_off ), r15->as_VMReg()->next());
137868b7aa6f 7196199: java/text/Bidi/Bug6665028.java failed: Bidi run count incorrect
kvn
parents: 6790
diff changeset
286 map->set_callee_saved(STACK_OFFSET(xmm0H_off ), xmm0->as_VMReg()->next());
137868b7aa6f 7196199: java/text/Bidi/Bug6665028.java failed: Bidi run count incorrect
kvn
parents: 6790
diff changeset
287 map->set_callee_saved(STACK_OFFSET(xmm1H_off ), xmm1->as_VMReg()->next());
137868b7aa6f 7196199: java/text/Bidi/Bug6665028.java failed: Bidi run count incorrect
kvn
parents: 6790
diff changeset
288 map->set_callee_saved(STACK_OFFSET(xmm2H_off ), xmm2->as_VMReg()->next());
137868b7aa6f 7196199: java/text/Bidi/Bug6665028.java failed: Bidi run count incorrect
kvn
parents: 6790
diff changeset
289 map->set_callee_saved(STACK_OFFSET(xmm3H_off ), xmm3->as_VMReg()->next());
137868b7aa6f 7196199: java/text/Bidi/Bug6665028.java failed: Bidi run count incorrect
kvn
parents: 6790
diff changeset
290 map->set_callee_saved(STACK_OFFSET(xmm4H_off ), xmm4->as_VMReg()->next());
137868b7aa6f 7196199: java/text/Bidi/Bug6665028.java failed: Bidi run count incorrect
kvn
parents: 6790
diff changeset
291 map->set_callee_saved(STACK_OFFSET(xmm5H_off ), xmm5->as_VMReg()->next());
137868b7aa6f 7196199: java/text/Bidi/Bug6665028.java failed: Bidi run count incorrect
kvn
parents: 6790
diff changeset
292 map->set_callee_saved(STACK_OFFSET(xmm6H_off ), xmm6->as_VMReg()->next());
137868b7aa6f 7196199: java/text/Bidi/Bug6665028.java failed: Bidi run count incorrect
kvn
parents: 6790
diff changeset
293 map->set_callee_saved(STACK_OFFSET(xmm7H_off ), xmm7->as_VMReg()->next());
137868b7aa6f 7196199: java/text/Bidi/Bug6665028.java failed: Bidi run count incorrect
kvn
parents: 6790
diff changeset
294 map->set_callee_saved(STACK_OFFSET(xmm8H_off ), xmm8->as_VMReg()->next());
137868b7aa6f 7196199: java/text/Bidi/Bug6665028.java failed: Bidi run count incorrect
kvn
parents: 6790
diff changeset
295 map->set_callee_saved(STACK_OFFSET(xmm9H_off ), xmm9->as_VMReg()->next());
137868b7aa6f 7196199: java/text/Bidi/Bug6665028.java failed: Bidi run count incorrect
kvn
parents: 6790
diff changeset
296 map->set_callee_saved(STACK_OFFSET(xmm10H_off), xmm10->as_VMReg()->next());
137868b7aa6f 7196199: java/text/Bidi/Bug6665028.java failed: Bidi run count incorrect
kvn
parents: 6790
diff changeset
297 map->set_callee_saved(STACK_OFFSET(xmm11H_off), xmm11->as_VMReg()->next());
137868b7aa6f 7196199: java/text/Bidi/Bug6665028.java failed: Bidi run count incorrect
kvn
parents: 6790
diff changeset
298 map->set_callee_saved(STACK_OFFSET(xmm12H_off), xmm12->as_VMReg()->next());
137868b7aa6f 7196199: java/text/Bidi/Bug6665028.java failed: Bidi run count incorrect
kvn
parents: 6790
diff changeset
299 map->set_callee_saved(STACK_OFFSET(xmm13H_off), xmm13->as_VMReg()->next());
137868b7aa6f 7196199: java/text/Bidi/Bug6665028.java failed: Bidi run count incorrect
kvn
parents: 6790
diff changeset
300 map->set_callee_saved(STACK_OFFSET(xmm14H_off), xmm14->as_VMReg()->next());
137868b7aa6f 7196199: java/text/Bidi/Bug6665028.java failed: Bidi run count incorrect
kvn
parents: 6790
diff changeset
301 map->set_callee_saved(STACK_OFFSET(xmm15H_off), xmm15->as_VMReg()->next());
0
a61af66fc99e Initial load
duke
parents:
diff changeset
302 }
a61af66fc99e Initial load
duke
parents:
diff changeset
303
a61af66fc99e Initial load
duke
parents:
diff changeset
304 return map;
a61af66fc99e Initial load
duke
parents:
diff changeset
305 }
a61af66fc99e Initial load
duke
parents:
diff changeset
306
6792
137868b7aa6f 7196199: java/text/Bidi/Bug6665028.java failed: Bidi run count incorrect
kvn
parents: 6790
diff changeset
307 void RegisterSaver::restore_live_registers(MacroAssembler* masm, bool restore_vectors) {
0
a61af66fc99e Initial load
duke
parents:
diff changeset
308 if (frame::arg_reg_save_area_bytes != 0) {
a61af66fc99e Initial load
duke
parents:
diff changeset
309 // Pop arg register save area
304
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 196
diff changeset
310 __ addptr(rsp, frame::arg_reg_save_area_bytes);
0
a61af66fc99e Initial load
duke
parents:
diff changeset
311 }
22298
c28cb37b2e1d Rename JVMCI to INCLUDE_JVMCI.
twisti
parents: 21884
diff changeset
312 #if defined(COMPILER2) || INCLUDE_JVMCI
6792
137868b7aa6f 7196199: java/text/Bidi/Bug6665028.java failed: Bidi run count incorrect
kvn
parents: 6790
diff changeset
313 if (restore_vectors) {
137868b7aa6f 7196199: java/text/Bidi/Bug6665028.java failed: Bidi run count incorrect
kvn
parents: 6790
diff changeset
314 // Restore upper half of YMM registes.
137868b7aa6f 7196199: java/text/Bidi/Bug6665028.java failed: Bidi run count incorrect
kvn
parents: 6790
diff changeset
315 assert(UseAVX > 0, "256bit vectors are supported only with AVX");
137868b7aa6f 7196199: java/text/Bidi/Bug6665028.java failed: Bidi run count incorrect
kvn
parents: 6790
diff changeset
316 assert(MaxVectorSize == 32, "only 256bit vectors are supported now");
21884
525c4df9428b Corrected ymm save location description
Tom Rodriguez <tom.rodriguez@oracle.com>
parents: 21761
diff changeset
317 __ vinsertf128h(xmm0, Address(rsp, 0));
525c4df9428b Corrected ymm save location description
Tom Rodriguez <tom.rodriguez@oracle.com>
parents: 21761
diff changeset
318 __ vinsertf128h(xmm1, Address(rsp, 16));
525c4df9428b Corrected ymm save location description
Tom Rodriguez <tom.rodriguez@oracle.com>
parents: 21761
diff changeset
319 __ vinsertf128h(xmm2, Address(rsp, 32));
525c4df9428b Corrected ymm save location description
Tom Rodriguez <tom.rodriguez@oracle.com>
parents: 21761
diff changeset
320 __ vinsertf128h(xmm3, Address(rsp, 48));
525c4df9428b Corrected ymm save location description
Tom Rodriguez <tom.rodriguez@oracle.com>
parents: 21761
diff changeset
321 __ vinsertf128h(xmm4, Address(rsp, 64));
525c4df9428b Corrected ymm save location description
Tom Rodriguez <tom.rodriguez@oracle.com>
parents: 21761
diff changeset
322 __ vinsertf128h(xmm5, Address(rsp, 80));
525c4df9428b Corrected ymm save location description
Tom Rodriguez <tom.rodriguez@oracle.com>
parents: 21761
diff changeset
323 __ vinsertf128h(xmm6, Address(rsp, 96));
525c4df9428b Corrected ymm save location description
Tom Rodriguez <tom.rodriguez@oracle.com>
parents: 21761
diff changeset
324 __ vinsertf128h(xmm7, Address(rsp,112));
525c4df9428b Corrected ymm save location description
Tom Rodriguez <tom.rodriguez@oracle.com>
parents: 21761
diff changeset
325 __ vinsertf128h(xmm8, Address(rsp,128));
525c4df9428b Corrected ymm save location description
Tom Rodriguez <tom.rodriguez@oracle.com>
parents: 21761
diff changeset
326 __ vinsertf128h(xmm9, Address(rsp,144));
525c4df9428b Corrected ymm save location description
Tom Rodriguez <tom.rodriguez@oracle.com>
parents: 21761
diff changeset
327 __ vinsertf128h(xmm10, Address(rsp,160));
525c4df9428b Corrected ymm save location description
Tom Rodriguez <tom.rodriguez@oracle.com>
parents: 21761
diff changeset
328 __ vinsertf128h(xmm11, Address(rsp,176));
525c4df9428b Corrected ymm save location description
Tom Rodriguez <tom.rodriguez@oracle.com>
parents: 21761
diff changeset
329 __ vinsertf128h(xmm12, Address(rsp,192));
525c4df9428b Corrected ymm save location description
Tom Rodriguez <tom.rodriguez@oracle.com>
parents: 21761
diff changeset
330 __ vinsertf128h(xmm13, Address(rsp,208));
525c4df9428b Corrected ymm save location description
Tom Rodriguez <tom.rodriguez@oracle.com>
parents: 21761
diff changeset
331 __ vinsertf128h(xmm14, Address(rsp,224));
525c4df9428b Corrected ymm save location description
Tom Rodriguez <tom.rodriguez@oracle.com>
parents: 21761
diff changeset
332 __ vinsertf128h(xmm15, Address(rsp,240));
525c4df9428b Corrected ymm save location description
Tom Rodriguez <tom.rodriguez@oracle.com>
parents: 21761
diff changeset
333 __ addptr(rsp, 256);
6792
137868b7aa6f 7196199: java/text/Bidi/Bug6665028.java failed: Bidi run count incorrect
kvn
parents: 6790
diff changeset
334 }
137868b7aa6f 7196199: java/text/Bidi/Bug6665028.java failed: Bidi run count incorrect
kvn
parents: 6790
diff changeset
335 #else
21737
c85c89f6b2d1 Reduce delta relative to hotspot for ymm register maps
Tom Rodriguez <tom.rodriguez@oracle.com>
parents: 21736
diff changeset
336 assert(!restore_vectors, "vectors are generated only by C2 and JVMCI");
6792
137868b7aa6f 7196199: java/text/Bidi/Bug6665028.java failed: Bidi run count incorrect
kvn
parents: 6790
diff changeset
337 #endif
0
a61af66fc99e Initial load
duke
parents:
diff changeset
338 // Recover CPU state
a61af66fc99e Initial load
duke
parents:
diff changeset
339 __ pop_CPU_state();
a61af66fc99e Initial load
duke
parents:
diff changeset
340 // Get the rbp described implicitly by the calling convention (no oopMap)
304
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 196
diff changeset
341 __ pop(rbp);
0
a61af66fc99e Initial load
duke
parents:
diff changeset
342 }
a61af66fc99e Initial load
duke
parents:
diff changeset
343
a61af66fc99e Initial load
duke
parents:
diff changeset
344 void RegisterSaver::restore_result_registers(MacroAssembler* masm) {
a61af66fc99e Initial load
duke
parents:
diff changeset
345
a61af66fc99e Initial load
duke
parents:
diff changeset
346 // Just restore result register. Only used by deoptimization. By
a61af66fc99e Initial load
duke
parents:
diff changeset
347 // now any callee save register that needs to be restored to a c2
a61af66fc99e Initial load
duke
parents:
diff changeset
348 // caller of the deoptee has been extracted into the vframeArray
a61af66fc99e Initial load
duke
parents:
diff changeset
349 // and will be stuffed into the c2i adapter we create for later
a61af66fc99e Initial load
duke
parents:
diff changeset
350 // restoration so only result registers need to be restored here.
a61af66fc99e Initial load
duke
parents:
diff changeset
351
a61af66fc99e Initial load
duke
parents:
diff changeset
352 // Restore fp result register
a61af66fc99e Initial load
duke
parents:
diff changeset
353 __ movdbl(xmm0, Address(rsp, xmm0_offset_in_bytes()));
a61af66fc99e Initial load
duke
parents:
diff changeset
354 // Restore integer result register
304
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 196
diff changeset
355 __ movptr(rax, Address(rsp, rax_offset_in_bytes()));
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 196
diff changeset
356 __ movptr(rdx, Address(rsp, rdx_offset_in_bytes()));
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 196
diff changeset
357
0
a61af66fc99e Initial load
duke
parents:
diff changeset
358 // Pop all of the register save are off the stack except the return address
304
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 196
diff changeset
359 __ addptr(rsp, return_offset_in_bytes());
0
a61af66fc99e Initial load
duke
parents:
diff changeset
360 }
a61af66fc99e Initial load
duke
parents:
diff changeset
361
6792
137868b7aa6f 7196199: java/text/Bidi/Bug6665028.java failed: Bidi run count incorrect
kvn
parents: 6790
diff changeset
362 // Is vector's size (in bytes) bigger than a size saved by default?
137868b7aa6f 7196199: java/text/Bidi/Bug6665028.java failed: Bidi run count incorrect
kvn
parents: 6790
diff changeset
363 // 16 bytes XMM registers are saved by default using fxsave/fxrstor instructions.
137868b7aa6f 7196199: java/text/Bidi/Bug6665028.java failed: Bidi run count incorrect
kvn
parents: 6790
diff changeset
364 bool SharedRuntime::is_wide_vector(int size) {
137868b7aa6f 7196199: java/text/Bidi/Bug6665028.java failed: Bidi run count incorrect
kvn
parents: 6790
diff changeset
365 return size > 16;
137868b7aa6f 7196199: java/text/Bidi/Bug6665028.java failed: Bidi run count incorrect
kvn
parents: 6790
diff changeset
366 }
137868b7aa6f 7196199: java/text/Bidi/Bug6665028.java failed: Bidi run count incorrect
kvn
parents: 6790
diff changeset
367
0
a61af66fc99e Initial load
duke
parents:
diff changeset
368 // The java_calling_convention describes stack locations as ideal slots on
a61af66fc99e Initial load
duke
parents:
diff changeset
369 // a frame with no abi restrictions. Since we must observe abi restrictions
a61af66fc99e Initial load
duke
parents:
diff changeset
370 // (like the placement of the register window) the slots must be biased by
a61af66fc99e Initial load
duke
parents:
diff changeset
371 // the following value.
a61af66fc99e Initial load
duke
parents:
diff changeset
372 static int reg2offset_in(VMReg r) {
a61af66fc99e Initial load
duke
parents:
diff changeset
373 // Account for saved rbp and return address
a61af66fc99e Initial load
duke
parents:
diff changeset
374 // This should really be in_preserve_stack_slots
a61af66fc99e Initial load
duke
parents:
diff changeset
375 return (r->reg2stack() + 4) * VMRegImpl::stack_slot_size;
a61af66fc99e Initial load
duke
parents:
diff changeset
376 }
a61af66fc99e Initial load
duke
parents:
diff changeset
377
a61af66fc99e Initial load
duke
parents:
diff changeset
378 static int reg2offset_out(VMReg r) {
a61af66fc99e Initial load
duke
parents:
diff changeset
379 return (r->reg2stack() + SharedRuntime::out_preserve_stack_slots()) * VMRegImpl::stack_slot_size;
a61af66fc99e Initial load
duke
parents:
diff changeset
380 }
a61af66fc99e Initial load
duke
parents:
diff changeset
381
a61af66fc99e Initial load
duke
parents:
diff changeset
382 // ---------------------------------------------------------------------------
a61af66fc99e Initial load
duke
parents:
diff changeset
383 // Read the array of BasicTypes from a signature, and compute where the
a61af66fc99e Initial load
duke
parents:
diff changeset
384 // arguments should go. Values in the VMRegPair regs array refer to 4-byte
a61af66fc99e Initial load
duke
parents:
diff changeset
385 // quantities. Values less than VMRegImpl::stack0 are registers, those above
a61af66fc99e Initial load
duke
parents:
diff changeset
386 // refer to 4-byte stack slots. All stack slots are based off of the stack pointer
a61af66fc99e Initial load
duke
parents:
diff changeset
387 // as framesizes are fixed.
a61af66fc99e Initial load
duke
parents:
diff changeset
388 // VMRegImpl::stack0 refers to the first slot 0(sp).
a61af66fc99e Initial load
duke
parents:
diff changeset
389 // and VMRegImpl::stack0+1 refers to the memory word 4-byes higher. Register
a61af66fc99e Initial load
duke
parents:
diff changeset
390 // up to RegisterImpl::number_of_registers) are the 64-bit
a61af66fc99e Initial load
duke
parents:
diff changeset
391 // integer registers.
a61af66fc99e Initial load
duke
parents:
diff changeset
392
a61af66fc99e Initial load
duke
parents:
diff changeset
393 // Note: the INPUTS in sig_bt are in units of Java argument words, which are
a61af66fc99e Initial load
duke
parents:
diff changeset
394 // either 32-bit or 64-bit depending on the build. The OUTPUTS are in 32-bit
a61af66fc99e Initial load
duke
parents:
diff changeset
395 // units regardless of build. Of course for i486 there is no 64 bit build
a61af66fc99e Initial load
duke
parents:
diff changeset
396
a61af66fc99e Initial load
duke
parents:
diff changeset
397 // The Java calling convention is a "shifted" version of the C ABI.
a61af66fc99e Initial load
duke
parents:
diff changeset
398 // By skipping the first C ABI register we can call non-static jni methods
a61af66fc99e Initial load
duke
parents:
diff changeset
399 // with small numbers of arguments without having to shuffle the arguments
a61af66fc99e Initial load
duke
parents:
diff changeset
400 // at all. Since we control the java ABI we ought to at least get some
a61af66fc99e Initial load
duke
parents:
diff changeset
401 // advantage out of it.
a61af66fc99e Initial load
duke
parents:
diff changeset
402
a61af66fc99e Initial load
duke
parents:
diff changeset
403 int SharedRuntime::java_calling_convention(const BasicType *sig_bt,
a61af66fc99e Initial load
duke
parents:
diff changeset
404 VMRegPair *regs,
a61af66fc99e Initial load
duke
parents:
diff changeset
405 int total_args_passed,
a61af66fc99e Initial load
duke
parents:
diff changeset
406 int is_outgoing) {
a61af66fc99e Initial load
duke
parents:
diff changeset
407
a61af66fc99e Initial load
duke
parents:
diff changeset
408 // Create the mapping between argument positions and
a61af66fc99e Initial load
duke
parents:
diff changeset
409 // registers.
a61af66fc99e Initial load
duke
parents:
diff changeset
410 static const Register INT_ArgReg[Argument::n_int_register_parameters_j] = {
a61af66fc99e Initial load
duke
parents:
diff changeset
411 j_rarg0, j_rarg1, j_rarg2, j_rarg3, j_rarg4, j_rarg5
a61af66fc99e Initial load
duke
parents:
diff changeset
412 };
a61af66fc99e Initial load
duke
parents:
diff changeset
413 static const XMMRegister FP_ArgReg[Argument::n_float_register_parameters_j] = {
a61af66fc99e Initial load
duke
parents:
diff changeset
414 j_farg0, j_farg1, j_farg2, j_farg3,
a61af66fc99e Initial load
duke
parents:
diff changeset
415 j_farg4, j_farg5, j_farg6, j_farg7
a61af66fc99e Initial load
duke
parents:
diff changeset
416 };
a61af66fc99e Initial load
duke
parents:
diff changeset
417
a61af66fc99e Initial load
duke
parents:
diff changeset
418
a61af66fc99e Initial load
duke
parents:
diff changeset
419 uint int_args = 0;
a61af66fc99e Initial load
duke
parents:
diff changeset
420 uint fp_args = 0;
a61af66fc99e Initial load
duke
parents:
diff changeset
421 uint stk_args = 0; // inc by 2 each time
a61af66fc99e Initial load
duke
parents:
diff changeset
422
a61af66fc99e Initial load
duke
parents:
diff changeset
423 for (int i = 0; i < total_args_passed; i++) {
a61af66fc99e Initial load
duke
parents:
diff changeset
424 switch (sig_bt[i]) {
a61af66fc99e Initial load
duke
parents:
diff changeset
425 case T_BOOLEAN:
a61af66fc99e Initial load
duke
parents:
diff changeset
426 case T_CHAR:
a61af66fc99e Initial load
duke
parents:
diff changeset
427 case T_BYTE:
a61af66fc99e Initial load
duke
parents:
diff changeset
428 case T_SHORT:
a61af66fc99e Initial load
duke
parents:
diff changeset
429 case T_INT:
a61af66fc99e Initial load
duke
parents:
diff changeset
430 if (int_args < Argument::n_int_register_parameters_j) {
a61af66fc99e Initial load
duke
parents:
diff changeset
431 regs[i].set1(INT_ArgReg[int_args++]->as_VMReg());
a61af66fc99e Initial load
duke
parents:
diff changeset
432 } else {
a61af66fc99e Initial load
duke
parents:
diff changeset
433 regs[i].set1(VMRegImpl::stack2reg(stk_args));
a61af66fc99e Initial load
duke
parents:
diff changeset
434 stk_args += 2;
a61af66fc99e Initial load
duke
parents:
diff changeset
435 }
a61af66fc99e Initial load
duke
parents:
diff changeset
436 break;
a61af66fc99e Initial load
duke
parents:
diff changeset
437 case T_VOID:
a61af66fc99e Initial load
duke
parents:
diff changeset
438 // halves of T_LONG or T_DOUBLE
a61af66fc99e Initial load
duke
parents:
diff changeset
439 assert(i != 0 && (sig_bt[i - 1] == T_LONG || sig_bt[i - 1] == T_DOUBLE), "expecting half");
a61af66fc99e Initial load
duke
parents:
diff changeset
440 regs[i].set_bad();
a61af66fc99e Initial load
duke
parents:
diff changeset
441 break;
a61af66fc99e Initial load
duke
parents:
diff changeset
442 case T_LONG:
a61af66fc99e Initial load
duke
parents:
diff changeset
443 assert(sig_bt[i + 1] == T_VOID, "expecting half");
a61af66fc99e Initial load
duke
parents:
diff changeset
444 // fall through
a61af66fc99e Initial load
duke
parents:
diff changeset
445 case T_OBJECT:
a61af66fc99e Initial load
duke
parents:
diff changeset
446 case T_ARRAY:
a61af66fc99e Initial load
duke
parents:
diff changeset
447 case T_ADDRESS:
a61af66fc99e Initial load
duke
parents:
diff changeset
448 if (int_args < Argument::n_int_register_parameters_j) {
a61af66fc99e Initial load
duke
parents:
diff changeset
449 regs[i].set2(INT_ArgReg[int_args++]->as_VMReg());
a61af66fc99e Initial load
duke
parents:
diff changeset
450 } else {
a61af66fc99e Initial load
duke
parents:
diff changeset
451 regs[i].set2(VMRegImpl::stack2reg(stk_args));
a61af66fc99e Initial load
duke
parents:
diff changeset
452 stk_args += 2;
a61af66fc99e Initial load
duke
parents:
diff changeset
453 }
a61af66fc99e Initial load
duke
parents:
diff changeset
454 break;
a61af66fc99e Initial load
duke
parents:
diff changeset
455 case T_FLOAT:
a61af66fc99e Initial load
duke
parents:
diff changeset
456 if (fp_args < Argument::n_float_register_parameters_j) {
a61af66fc99e Initial load
duke
parents:
diff changeset
457 regs[i].set1(FP_ArgReg[fp_args++]->as_VMReg());
a61af66fc99e Initial load
duke
parents:
diff changeset
458 } else {
a61af66fc99e Initial load
duke
parents:
diff changeset
459 regs[i].set1(VMRegImpl::stack2reg(stk_args));
a61af66fc99e Initial load
duke
parents:
diff changeset
460 stk_args += 2;
a61af66fc99e Initial load
duke
parents:
diff changeset
461 }
a61af66fc99e Initial load
duke
parents:
diff changeset
462 break;
a61af66fc99e Initial load
duke
parents:
diff changeset
463 case T_DOUBLE:
a61af66fc99e Initial load
duke
parents:
diff changeset
464 assert(sig_bt[i + 1] == T_VOID, "expecting half");
a61af66fc99e Initial load
duke
parents:
diff changeset
465 if (fp_args < Argument::n_float_register_parameters_j) {
a61af66fc99e Initial load
duke
parents:
diff changeset
466 regs[i].set2(FP_ArgReg[fp_args++]->as_VMReg());
a61af66fc99e Initial load
duke
parents:
diff changeset
467 } else {
a61af66fc99e Initial load
duke
parents:
diff changeset
468 regs[i].set2(VMRegImpl::stack2reg(stk_args));
a61af66fc99e Initial load
duke
parents:
diff changeset
469 stk_args += 2;
a61af66fc99e Initial load
duke
parents:
diff changeset
470 }
a61af66fc99e Initial load
duke
parents:
diff changeset
471 break;
a61af66fc99e Initial load
duke
parents:
diff changeset
472 default:
a61af66fc99e Initial load
duke
parents:
diff changeset
473 ShouldNotReachHere();
a61af66fc99e Initial load
duke
parents:
diff changeset
474 break;
a61af66fc99e Initial load
duke
parents:
diff changeset
475 }
a61af66fc99e Initial load
duke
parents:
diff changeset
476 }
a61af66fc99e Initial load
duke
parents:
diff changeset
477
a61af66fc99e Initial load
duke
parents:
diff changeset
478 return round_to(stk_args, 2);
a61af66fc99e Initial load
duke
parents:
diff changeset
479 }
a61af66fc99e Initial load
duke
parents:
diff changeset
480
a61af66fc99e Initial load
duke
parents:
diff changeset
481 // Patch the callers callsite with entry to compiled code if it exists.
a61af66fc99e Initial load
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parents:
diff changeset
482 static void patch_callers_callsite(MacroAssembler *masm) {
a61af66fc99e Initial load
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parents:
diff changeset
483 Label L;
6725
da91efe96a93 6964458: Reimplement class meta-data storage to use native memory
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parents: 6266
diff changeset
484 __ cmpptr(Address(rbx, in_bytes(Method::code_offset())), (int32_t)NULL_WORD);
0
a61af66fc99e Initial load
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parents:
diff changeset
485 __ jcc(Assembler::equal, L);
a61af66fc99e Initial load
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parents:
diff changeset
486
a61af66fc99e Initial load
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parents:
diff changeset
487 // Save the current stack pointer
304
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parents: 196
diff changeset
488 __ mov(r13, rsp);
0
a61af66fc99e Initial load
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parents:
diff changeset
489 // Schedule the branch target address early.
a61af66fc99e Initial load
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parents:
diff changeset
490 // Call into the VM to patch the caller, then jump to compiled callee
a61af66fc99e Initial load
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parents:
diff changeset
491 // rax isn't live so capture return address while we easily can
304
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parents: 196
diff changeset
492 __ movptr(rax, Address(rsp, 0));
0
a61af66fc99e Initial load
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parents:
diff changeset
493
a61af66fc99e Initial load
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parents:
diff changeset
494 // align stack so push_CPU_state doesn't fault
304
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parents: 196
diff changeset
495 __ andptr(rsp, -(StackAlignmentInBytes));
0
a61af66fc99e Initial load
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parents:
diff changeset
496 __ push_CPU_state();
a61af66fc99e Initial load
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parents:
diff changeset
497
a61af66fc99e Initial load
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parents:
diff changeset
498 // VM needs caller's callsite
a61af66fc99e Initial load
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parents:
diff changeset
499 // VM needs target method
a61af66fc99e Initial load
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parents:
diff changeset
500 // This needs to be a long call since we will relocate this adapter to
a61af66fc99e Initial load
duke
parents:
diff changeset
501 // the codeBuffer and it may not reach
a61af66fc99e Initial load
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parents:
diff changeset
502
a61af66fc99e Initial load
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parents:
diff changeset
503 // Allocate argument register save area
a61af66fc99e Initial load
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parents:
diff changeset
504 if (frame::arg_reg_save_area_bytes != 0) {
304
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parents: 196
diff changeset
505 __ subptr(rsp, frame::arg_reg_save_area_bytes);
0
a61af66fc99e Initial load
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parents:
diff changeset
506 }
304
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
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parents: 196
diff changeset
507 __ mov(c_rarg0, rbx);
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
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parents: 196
diff changeset
508 __ mov(c_rarg1, rax);
0
a61af66fc99e Initial load
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parents:
diff changeset
509 __ call(RuntimeAddress(CAST_FROM_FN_PTR(address, SharedRuntime::fixup_callers_callsite)));
a61af66fc99e Initial load
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parents:
diff changeset
510
a61af66fc99e Initial load
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parents:
diff changeset
511 // De-allocate argument register save area
a61af66fc99e Initial load
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parents:
diff changeset
512 if (frame::arg_reg_save_area_bytes != 0) {
304
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parents: 196
diff changeset
513 __ addptr(rsp, frame::arg_reg_save_area_bytes);
0
a61af66fc99e Initial load
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parents:
diff changeset
514 }
a61af66fc99e Initial load
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parents:
diff changeset
515
a61af66fc99e Initial load
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parents:
diff changeset
516 __ pop_CPU_state();
a61af66fc99e Initial load
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parents:
diff changeset
517 // restore sp
304
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parents: 196
diff changeset
518 __ mov(rsp, r13);
0
a61af66fc99e Initial load
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parents:
diff changeset
519 __ bind(L);
a61af66fc99e Initial load
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parents:
diff changeset
520 }
a61af66fc99e Initial load
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parents:
diff changeset
521
a61af66fc99e Initial load
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parents:
diff changeset
522
a61af66fc99e Initial load
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parents:
diff changeset
523 static void gen_c2i_adapter(MacroAssembler *masm,
a61af66fc99e Initial load
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parents:
diff changeset
524 int total_args_passed,
a61af66fc99e Initial load
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parents:
diff changeset
525 int comp_args_on_stack,
a61af66fc99e Initial load
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parents:
diff changeset
526 const BasicType *sig_bt,
a61af66fc99e Initial load
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parents:
diff changeset
527 const VMRegPair *regs,
a61af66fc99e Initial load
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parents:
diff changeset
528 Label& skip_fixup) {
a61af66fc99e Initial load
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parents:
diff changeset
529 // Before we get into the guts of the C2I adapter, see if we should be here
a61af66fc99e Initial load
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parents:
diff changeset
530 // at all. We've come from compiled code and are attempting to jump to the
a61af66fc99e Initial load
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parents:
diff changeset
531 // interpreter, which means the caller made a static call to get here
a61af66fc99e Initial load
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parents:
diff changeset
532 // (vcalls always get a compiled target if there is one). Check for a
a61af66fc99e Initial load
duke
parents:
diff changeset
533 // compiled target. If there is one, we need to patch the caller's call.
a61af66fc99e Initial load
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parents:
diff changeset
534 patch_callers_callsite(masm);
a61af66fc99e Initial load
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parents:
diff changeset
535
a61af66fc99e Initial load
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parents:
diff changeset
536 __ bind(skip_fixup);
a61af66fc99e Initial load
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parents:
diff changeset
537
a61af66fc99e Initial load
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parents:
diff changeset
538 // Since all args are passed on the stack, total_args_passed *
a61af66fc99e Initial load
duke
parents:
diff changeset
539 // Interpreter::stackElementSize is the space we need. Plus 1 because
a61af66fc99e Initial load
duke
parents:
diff changeset
540 // we also account for the return address location since
a61af66fc99e Initial load
duke
parents:
diff changeset
541 // we store it first rather than hold it in rax across all the shuffling
a61af66fc99e Initial load
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parents:
diff changeset
542
1506
2338d41fbd81 6943304: remove tagged stack interpreter
twisti
parents: 1368
diff changeset
543 int extraspace = (total_args_passed * Interpreter::stackElementSize) + wordSize;
0
a61af66fc99e Initial load
duke
parents:
diff changeset
544
a61af66fc99e Initial load
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parents:
diff changeset
545 // stack is aligned, keep it that way
a61af66fc99e Initial load
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parents:
diff changeset
546 extraspace = round_to(extraspace, 2*wordSize);
a61af66fc99e Initial load
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parents:
diff changeset
547
a61af66fc99e Initial load
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parents:
diff changeset
548 // Get return address
304
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parents: 196
diff changeset
549 __ pop(rax);
0
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parents:
diff changeset
550
a61af66fc99e Initial load
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parents:
diff changeset
551 // set senderSP value
304
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parents: 196
diff changeset
552 __ mov(r13, rsp);
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 196
diff changeset
553
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
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parents: 196
diff changeset
554 __ subptr(rsp, extraspace);
0
a61af66fc99e Initial load
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parents:
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555
a61af66fc99e Initial load
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parents:
diff changeset
556 // Store the return address in the expected location
304
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parents: 196
diff changeset
557 __ movptr(Address(rsp, 0), rax);
0
a61af66fc99e Initial load
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parents:
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558
a61af66fc99e Initial load
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parents:
diff changeset
559 // Now write the args into the outgoing interpreter space
a61af66fc99e Initial load
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parents:
diff changeset
560 for (int i = 0; i < total_args_passed; i++) {
a61af66fc99e Initial load
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parents:
diff changeset
561 if (sig_bt[i] == T_VOID) {
a61af66fc99e Initial load
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parents:
diff changeset
562 assert(i > 0 && (sig_bt[i-1] == T_LONG || sig_bt[i-1] == T_DOUBLE), "missing half");
a61af66fc99e Initial load
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parents:
diff changeset
563 continue;
a61af66fc99e Initial load
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parents:
diff changeset
564 }
a61af66fc99e Initial load
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parents:
diff changeset
565
a61af66fc99e Initial load
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parents:
diff changeset
566 // offset to start parameters
1506
2338d41fbd81 6943304: remove tagged stack interpreter
twisti
parents: 1368
diff changeset
567 int st_off = (total_args_passed - i) * Interpreter::stackElementSize;
2338d41fbd81 6943304: remove tagged stack interpreter
twisti
parents: 1368
diff changeset
568 int next_off = st_off - Interpreter::stackElementSize;
0
a61af66fc99e Initial load
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parents:
diff changeset
569
a61af66fc99e Initial load
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parents:
diff changeset
570 // Say 4 args:
a61af66fc99e Initial load
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parents:
diff changeset
571 // i st_off
a61af66fc99e Initial load
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parents:
diff changeset
572 // 0 32 T_LONG
a61af66fc99e Initial load
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parents:
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573 // 1 24 T_VOID
a61af66fc99e Initial load
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parents:
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574 // 2 16 T_OBJECT
a61af66fc99e Initial load
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parents:
diff changeset
575 // 3 8 T_BOOL
a61af66fc99e Initial load
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parents:
diff changeset
576 // - 0 return address
a61af66fc99e Initial load
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parents:
diff changeset
577 //
a61af66fc99e Initial load
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parents:
diff changeset
578 // However to make thing extra confusing. Because we can fit a long/double in
a61af66fc99e Initial load
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parents:
diff changeset
579 // a single slot on a 64 bt vm and it would be silly to break them up, the interpreter
a61af66fc99e Initial load
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parents:
diff changeset
580 // leaves one slot empty and only stores to a single slot. In this case the
a61af66fc99e Initial load
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parents:
diff changeset
581 // slot that is occupied is the T_VOID slot. See I said it was confusing.
a61af66fc99e Initial load
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parents:
diff changeset
582
a61af66fc99e Initial load
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parents:
diff changeset
583 VMReg r_1 = regs[i].first();
a61af66fc99e Initial load
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parents:
diff changeset
584 VMReg r_2 = regs[i].second();
a61af66fc99e Initial load
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parents:
diff changeset
585 if (!r_1->is_valid()) {
a61af66fc99e Initial load
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parents:
diff changeset
586 assert(!r_2->is_valid(), "");
a61af66fc99e Initial load
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parents:
diff changeset
587 continue;
a61af66fc99e Initial load
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parents:
diff changeset
588 }
a61af66fc99e Initial load
duke
parents:
diff changeset
589 if (r_1->is_stack()) {
a61af66fc99e Initial load
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parents:
diff changeset
590 // memory to memory use rax
a61af66fc99e Initial load
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parents:
diff changeset
591 int ld_off = r_1->reg2stack() * VMRegImpl::stack_slot_size + extraspace;
a61af66fc99e Initial load
duke
parents:
diff changeset
592 if (!r_2->is_valid()) {
a61af66fc99e Initial load
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parents:
diff changeset
593 // sign extend??
a61af66fc99e Initial load
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parents:
diff changeset
594 __ movl(rax, Address(rsp, ld_off));
304
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parents: 196
diff changeset
595 __ movptr(Address(rsp, st_off), rax);
0
a61af66fc99e Initial load
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parents:
diff changeset
596
a61af66fc99e Initial load
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parents:
diff changeset
597 } else {
a61af66fc99e Initial load
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parents:
diff changeset
598
a61af66fc99e Initial load
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parents:
diff changeset
599 __ movq(rax, Address(rsp, ld_off));
a61af66fc99e Initial load
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parents:
diff changeset
600
a61af66fc99e Initial load
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parents:
diff changeset
601 // Two VMREgs|OptoRegs can be T_OBJECT, T_ADDRESS, T_DOUBLE, T_LONG
a61af66fc99e Initial load
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parents:
diff changeset
602 // T_DOUBLE and T_LONG use two slots in the interpreter
a61af66fc99e Initial load
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parents:
diff changeset
603 if ( sig_bt[i] == T_LONG || sig_bt[i] == T_DOUBLE) {
a61af66fc99e Initial load
duke
parents:
diff changeset
604 // ld_off == LSW, ld_off+wordSize == MSW
a61af66fc99e Initial load
duke
parents:
diff changeset
605 // st_off == MSW, next_off == LSW
a61af66fc99e Initial load
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parents:
diff changeset
606 __ movq(Address(rsp, next_off), rax);
a61af66fc99e Initial load
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parents:
diff changeset
607 #ifdef ASSERT
a61af66fc99e Initial load
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parents:
diff changeset
608 // Overwrite the unused slot with known junk
a61af66fc99e Initial load
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parents:
diff changeset
609 __ mov64(rax, CONST64(0xdeadffffdeadaaaa));
304
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parents: 196
diff changeset
610 __ movptr(Address(rsp, st_off), rax);
0
a61af66fc99e Initial load
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parents:
diff changeset
611 #endif /* ASSERT */
a61af66fc99e Initial load
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parents:
diff changeset
612 } else {
a61af66fc99e Initial load
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parents:
diff changeset
613 __ movq(Address(rsp, st_off), rax);
a61af66fc99e Initial load
duke
parents:
diff changeset
614 }
a61af66fc99e Initial load
duke
parents:
diff changeset
615 }
a61af66fc99e Initial load
duke
parents:
diff changeset
616 } else if (r_1->is_Register()) {
a61af66fc99e Initial load
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parents:
diff changeset
617 Register r = r_1->as_Register();
a61af66fc99e Initial load
duke
parents:
diff changeset
618 if (!r_2->is_valid()) {
a61af66fc99e Initial load
duke
parents:
diff changeset
619 // must be only an int (or less ) so move only 32bits to slot
a61af66fc99e Initial load
duke
parents:
diff changeset
620 // why not sign extend??
a61af66fc99e Initial load
duke
parents:
diff changeset
621 __ movl(Address(rsp, st_off), r);
a61af66fc99e Initial load
duke
parents:
diff changeset
622 } else {
a61af66fc99e Initial load
duke
parents:
diff changeset
623 // Two VMREgs|OptoRegs can be T_OBJECT, T_ADDRESS, T_DOUBLE, T_LONG
a61af66fc99e Initial load
duke
parents:
diff changeset
624 // T_DOUBLE and T_LONG use two slots in the interpreter
a61af66fc99e Initial load
duke
parents:
diff changeset
625 if ( sig_bt[i] == T_LONG || sig_bt[i] == T_DOUBLE) {
a61af66fc99e Initial load
duke
parents:
diff changeset
626 // long/double in gpr
a61af66fc99e Initial load
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parents:
diff changeset
627 #ifdef ASSERT
a61af66fc99e Initial load
duke
parents:
diff changeset
628 // Overwrite the unused slot with known junk
a61af66fc99e Initial load
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parents:
diff changeset
629 __ mov64(rax, CONST64(0xdeadffffdeadaaab));
304
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 196
diff changeset
630 __ movptr(Address(rsp, st_off), rax);
0
a61af66fc99e Initial load
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parents:
diff changeset
631 #endif /* ASSERT */
a61af66fc99e Initial load
duke
parents:
diff changeset
632 __ movq(Address(rsp, next_off), r);
a61af66fc99e Initial load
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parents:
diff changeset
633 } else {
304
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 196
diff changeset
634 __ movptr(Address(rsp, st_off), r);
0
a61af66fc99e Initial load
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parents:
diff changeset
635 }
a61af66fc99e Initial load
duke
parents:
diff changeset
636 }
a61af66fc99e Initial load
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parents:
diff changeset
637 } else {
a61af66fc99e Initial load
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parents:
diff changeset
638 assert(r_1->is_XMMRegister(), "");
a61af66fc99e Initial load
duke
parents:
diff changeset
639 if (!r_2->is_valid()) {
a61af66fc99e Initial load
duke
parents:
diff changeset
640 // only a float use just part of the slot
a61af66fc99e Initial load
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parents:
diff changeset
641 __ movflt(Address(rsp, st_off), r_1->as_XMMRegister());
a61af66fc99e Initial load
duke
parents:
diff changeset
642 } else {
a61af66fc99e Initial load
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parents:
diff changeset
643 #ifdef ASSERT
a61af66fc99e Initial load
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parents:
diff changeset
644 // Overwrite the unused slot with known junk
a61af66fc99e Initial load
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parents:
diff changeset
645 __ mov64(rax, CONST64(0xdeadffffdeadaaac));
304
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 196
diff changeset
646 __ movptr(Address(rsp, st_off), rax);
0
a61af66fc99e Initial load
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parents:
diff changeset
647 #endif /* ASSERT */
a61af66fc99e Initial load
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parents:
diff changeset
648 __ movdbl(Address(rsp, next_off), r_1->as_XMMRegister());
a61af66fc99e Initial load
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parents:
diff changeset
649 }
a61af66fc99e Initial load
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parents:
diff changeset
650 }
a61af66fc99e Initial load
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parents:
diff changeset
651 }
a61af66fc99e Initial load
duke
parents:
diff changeset
652
a61af66fc99e Initial load
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parents:
diff changeset
653 // Schedule the branch target address early.
6725
da91efe96a93 6964458: Reimplement class meta-data storage to use native memory
coleenp
parents: 6266
diff changeset
654 __ movptr(rcx, Address(rbx, in_bytes(Method::interpreter_entry_offset())));
0
a61af66fc99e Initial load
duke
parents:
diff changeset
655 __ jmp(rcx);
a61af66fc99e Initial load
duke
parents:
diff changeset
656 }
a61af66fc99e Initial load
duke
parents:
diff changeset
657
6266
1d7922586cf6 7023639: JSR 292 method handle invocation needs a fast path for compiled code
twisti
parents: 5907
diff changeset
658 static void range_check(MacroAssembler* masm, Register pc_reg, Register temp_reg,
1d7922586cf6 7023639: JSR 292 method handle invocation needs a fast path for compiled code
twisti
parents: 5907
diff changeset
659 address code_start, address code_end,
1d7922586cf6 7023639: JSR 292 method handle invocation needs a fast path for compiled code
twisti
parents: 5907
diff changeset
660 Label& L_ok) {
1d7922586cf6 7023639: JSR 292 method handle invocation needs a fast path for compiled code
twisti
parents: 5907
diff changeset
661 Label L_fail;
1d7922586cf6 7023639: JSR 292 method handle invocation needs a fast path for compiled code
twisti
parents: 5907
diff changeset
662 __ lea(temp_reg, ExternalAddress(code_start));
1d7922586cf6 7023639: JSR 292 method handle invocation needs a fast path for compiled code
twisti
parents: 5907
diff changeset
663 __ cmpptr(pc_reg, temp_reg);
1d7922586cf6 7023639: JSR 292 method handle invocation needs a fast path for compiled code
twisti
parents: 5907
diff changeset
664 __ jcc(Assembler::belowEqual, L_fail);
1d7922586cf6 7023639: JSR 292 method handle invocation needs a fast path for compiled code
twisti
parents: 5907
diff changeset
665 __ lea(temp_reg, ExternalAddress(code_end));
1d7922586cf6 7023639: JSR 292 method handle invocation needs a fast path for compiled code
twisti
parents: 5907
diff changeset
666 __ cmpptr(pc_reg, temp_reg);
1d7922586cf6 7023639: JSR 292 method handle invocation needs a fast path for compiled code
twisti
parents: 5907
diff changeset
667 __ jcc(Assembler::below, L_ok);
1d7922586cf6 7023639: JSR 292 method handle invocation needs a fast path for compiled code
twisti
parents: 5907
diff changeset
668 __ bind(L_fail);
1d7922586cf6 7023639: JSR 292 method handle invocation needs a fast path for compiled code
twisti
parents: 5907
diff changeset
669 }
1d7922586cf6 7023639: JSR 292 method handle invocation needs a fast path for compiled code
twisti
parents: 5907
diff changeset
670
14030
f6c04e69cf75 SharedRuntime: add gen_i2c_adapter, implement it with pre-existing methods in each architecture.
Gilles Duboscq <duboscq@ssw.jku.at>
parents: 13451
diff changeset
671 void SharedRuntime::gen_i2c_adapter(MacroAssembler *masm,
17033
2d6dd2eebd51 Fixed HSAIL deopt
Tom Rodriguez <tom.rodriguez@oracle.com>
parents: 15104
diff changeset
672 int total_args_passed,
2d6dd2eebd51 Fixed HSAIL deopt
Tom Rodriguez <tom.rodriguez@oracle.com>
parents: 15104
diff changeset
673 int comp_args_on_stack,
2d6dd2eebd51 Fixed HSAIL deopt
Tom Rodriguez <tom.rodriguez@oracle.com>
parents: 15104
diff changeset
674 const BasicType *sig_bt,
2d6dd2eebd51 Fixed HSAIL deopt
Tom Rodriguez <tom.rodriguez@oracle.com>
parents: 15104
diff changeset
675 const VMRegPair *regs,
2d6dd2eebd51 Fixed HSAIL deopt
Tom Rodriguez <tom.rodriguez@oracle.com>
parents: 15104
diff changeset
676 int frame_extension_argument) {
0
a61af66fc99e Initial load
duke
parents:
diff changeset
677
a61af66fc99e Initial load
duke
parents:
diff changeset
678 // Note: r13 contains the senderSP on entry. We must preserve it since
a61af66fc99e Initial load
duke
parents:
diff changeset
679 // we may do a i2c -> c2i transition if we lose a race where compiled
a61af66fc99e Initial load
duke
parents:
diff changeset
680 // code goes non-entrant while we get args ready.
a61af66fc99e Initial load
duke
parents:
diff changeset
681 // In addition we use r13 to locate all the interpreter args as
a61af66fc99e Initial load
duke
parents:
diff changeset
682 // we must align the stack to 16 bytes on an i2c entry else we
a61af66fc99e Initial load
duke
parents:
diff changeset
683 // lose alignment we expect in all compiled code and register
a61af66fc99e Initial load
duke
parents:
diff changeset
684 // save code can segv when fxsave instructions find improperly
a61af66fc99e Initial load
duke
parents:
diff changeset
685 // aligned stack pointer.
a61af66fc99e Initial load
duke
parents:
diff changeset
686
6266
1d7922586cf6 7023639: JSR 292 method handle invocation needs a fast path for compiled code
twisti
parents: 5907
diff changeset
687 // Adapters can be frameless because they do not require the caller
1d7922586cf6 7023639: JSR 292 method handle invocation needs a fast path for compiled code
twisti
parents: 5907
diff changeset
688 // to perform additional cleanup work, such as correcting the stack pointer.
1d7922586cf6 7023639: JSR 292 method handle invocation needs a fast path for compiled code
twisti
parents: 5907
diff changeset
689 // An i2c adapter is frameless because the *caller* frame, which is interpreted,
1d7922586cf6 7023639: JSR 292 method handle invocation needs a fast path for compiled code
twisti
parents: 5907
diff changeset
690 // routinely repairs its own stack pointer (from interpreter_frame_last_sp),
1d7922586cf6 7023639: JSR 292 method handle invocation needs a fast path for compiled code
twisti
parents: 5907
diff changeset
691 // even if a callee has modified the stack pointer.
1d7922586cf6 7023639: JSR 292 method handle invocation needs a fast path for compiled code
twisti
parents: 5907
diff changeset
692 // A c2i adapter is frameless because the *callee* frame, which is interpreted,
1d7922586cf6 7023639: JSR 292 method handle invocation needs a fast path for compiled code
twisti
parents: 5907
diff changeset
693 // routinely repairs its caller's stack pointer (from sender_sp, which is set
1d7922586cf6 7023639: JSR 292 method handle invocation needs a fast path for compiled code
twisti
parents: 5907
diff changeset
694 // up via the senderSP register).
1d7922586cf6 7023639: JSR 292 method handle invocation needs a fast path for compiled code
twisti
parents: 5907
diff changeset
695 // In other words, if *either* the caller or callee is interpreted, we can
1d7922586cf6 7023639: JSR 292 method handle invocation needs a fast path for compiled code
twisti
parents: 5907
diff changeset
696 // get the stack pointer repaired after a call.
1d7922586cf6 7023639: JSR 292 method handle invocation needs a fast path for compiled code
twisti
parents: 5907
diff changeset
697 // This is why c2i and i2c adapters cannot be indefinitely composed.
1d7922586cf6 7023639: JSR 292 method handle invocation needs a fast path for compiled code
twisti
parents: 5907
diff changeset
698 // In particular, if a c2i adapter were to somehow call an i2c adapter,
1d7922586cf6 7023639: JSR 292 method handle invocation needs a fast path for compiled code
twisti
parents: 5907
diff changeset
699 // both caller and callee would be compiled methods, and neither would
1d7922586cf6 7023639: JSR 292 method handle invocation needs a fast path for compiled code
twisti
parents: 5907
diff changeset
700 // clean up the stack pointer changes performed by the two adapters.
1d7922586cf6 7023639: JSR 292 method handle invocation needs a fast path for compiled code
twisti
parents: 5907
diff changeset
701 // If this happens, control eventually transfers back to the compiled
1d7922586cf6 7023639: JSR 292 method handle invocation needs a fast path for compiled code
twisti
parents: 5907
diff changeset
702 // caller, but with an uncorrected stack, causing delayed havoc.
1d7922586cf6 7023639: JSR 292 method handle invocation needs a fast path for compiled code
twisti
parents: 5907
diff changeset
703
2245
638119ce7cfd 7009309: JSR 292: compiler/6991596/Test6991596.java crashes on fastdebug JDK7/b122
twisti
parents: 2177
diff changeset
704 // Pick up the return address
304
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 196
diff changeset
705 __ movptr(rax, Address(rsp, 0));
0
a61af66fc99e Initial load
duke
parents:
diff changeset
706
6266
1d7922586cf6 7023639: JSR 292 method handle invocation needs a fast path for compiled code
twisti
parents: 5907
diff changeset
707 if (VerifyAdapterCalls &&
1d7922586cf6 7023639: JSR 292 method handle invocation needs a fast path for compiled code
twisti
parents: 5907
diff changeset
708 (Interpreter::code() != NULL || StubRoutines::code1() != NULL)) {
1d7922586cf6 7023639: JSR 292 method handle invocation needs a fast path for compiled code
twisti
parents: 5907
diff changeset
709 // So, let's test for cascading c2i/i2c adapters right now.
1d7922586cf6 7023639: JSR 292 method handle invocation needs a fast path for compiled code
twisti
parents: 5907
diff changeset
710 // assert(Interpreter::contains($return_addr) ||
1d7922586cf6 7023639: JSR 292 method handle invocation needs a fast path for compiled code
twisti
parents: 5907
diff changeset
711 // StubRoutines::contains($return_addr),
1d7922586cf6 7023639: JSR 292 method handle invocation needs a fast path for compiled code
twisti
parents: 5907
diff changeset
712 // "i2c adapter must return to an interpreter frame");
1d7922586cf6 7023639: JSR 292 method handle invocation needs a fast path for compiled code
twisti
parents: 5907
diff changeset
713 __ block_comment("verify_i2c { ");
1d7922586cf6 7023639: JSR 292 method handle invocation needs a fast path for compiled code
twisti
parents: 5907
diff changeset
714 Label L_ok;
1d7922586cf6 7023639: JSR 292 method handle invocation needs a fast path for compiled code
twisti
parents: 5907
diff changeset
715 if (Interpreter::code() != NULL)
1d7922586cf6 7023639: JSR 292 method handle invocation needs a fast path for compiled code
twisti
parents: 5907
diff changeset
716 range_check(masm, rax, r11,
1d7922586cf6 7023639: JSR 292 method handle invocation needs a fast path for compiled code
twisti
parents: 5907
diff changeset
717 Interpreter::code()->code_start(), Interpreter::code()->code_end(),
1d7922586cf6 7023639: JSR 292 method handle invocation needs a fast path for compiled code
twisti
parents: 5907
diff changeset
718 L_ok);
1d7922586cf6 7023639: JSR 292 method handle invocation needs a fast path for compiled code
twisti
parents: 5907
diff changeset
719 if (StubRoutines::code1() != NULL)
1d7922586cf6 7023639: JSR 292 method handle invocation needs a fast path for compiled code
twisti
parents: 5907
diff changeset
720 range_check(masm, rax, r11,
1d7922586cf6 7023639: JSR 292 method handle invocation needs a fast path for compiled code
twisti
parents: 5907
diff changeset
721 StubRoutines::code1()->code_begin(), StubRoutines::code1()->code_end(),
1d7922586cf6 7023639: JSR 292 method handle invocation needs a fast path for compiled code
twisti
parents: 5907
diff changeset
722 L_ok);
1d7922586cf6 7023639: JSR 292 method handle invocation needs a fast path for compiled code
twisti
parents: 5907
diff changeset
723 if (StubRoutines::code2() != NULL)
1d7922586cf6 7023639: JSR 292 method handle invocation needs a fast path for compiled code
twisti
parents: 5907
diff changeset
724 range_check(masm, rax, r11,
1d7922586cf6 7023639: JSR 292 method handle invocation needs a fast path for compiled code
twisti
parents: 5907
diff changeset
725 StubRoutines::code2()->code_begin(), StubRoutines::code2()->code_end(),
1d7922586cf6 7023639: JSR 292 method handle invocation needs a fast path for compiled code
twisti
parents: 5907
diff changeset
726 L_ok);
1d7922586cf6 7023639: JSR 292 method handle invocation needs a fast path for compiled code
twisti
parents: 5907
diff changeset
727 const char* msg = "i2c adapter must return to an interpreter frame";
1d7922586cf6 7023639: JSR 292 method handle invocation needs a fast path for compiled code
twisti
parents: 5907
diff changeset
728 __ block_comment(msg);
1d7922586cf6 7023639: JSR 292 method handle invocation needs a fast path for compiled code
twisti
parents: 5907
diff changeset
729 __ stop(msg);
1d7922586cf6 7023639: JSR 292 method handle invocation needs a fast path for compiled code
twisti
parents: 5907
diff changeset
730 __ bind(L_ok);
1d7922586cf6 7023639: JSR 292 method handle invocation needs a fast path for compiled code
twisti
parents: 5907
diff changeset
731 __ block_comment("} verify_i2ce ");
1d7922586cf6 7023639: JSR 292 method handle invocation needs a fast path for compiled code
twisti
parents: 5907
diff changeset
732 }
1d7922586cf6 7023639: JSR 292 method handle invocation needs a fast path for compiled code
twisti
parents: 5907
diff changeset
733
22298
c28cb37b2e1d Rename JVMCI to INCLUDE_JVMCI.
twisti
parents: 21884
diff changeset
734 #if INCLUDE_JVMCI
17033
2d6dd2eebd51 Fixed HSAIL deopt
Tom Rodriguez <tom.rodriguez@oracle.com>
parents: 15104
diff changeset
735 if (frame_extension_argument != -1) {
2d6dd2eebd51 Fixed HSAIL deopt
Tom Rodriguez <tom.rodriguez@oracle.com>
parents: 15104
diff changeset
736 // The frame_extension_argument is an int that describes the
2d6dd2eebd51 Fixed HSAIL deopt
Tom Rodriguez <tom.rodriguez@oracle.com>
parents: 15104
diff changeset
737 // expected amount of argument space in the caller frame. If that
2d6dd2eebd51 Fixed HSAIL deopt
Tom Rodriguez <tom.rodriguez@oracle.com>
parents: 15104
diff changeset
738 // is greater than total_args_passed then enlarge the caller frame
2d6dd2eebd51 Fixed HSAIL deopt
Tom Rodriguez <tom.rodriguez@oracle.com>
parents: 15104
diff changeset
739 // by that amount to ensure deopt works correctly.
2d6dd2eebd51 Fixed HSAIL deopt
Tom Rodriguez <tom.rodriguez@oracle.com>
parents: 15104
diff changeset
740 assert(frame_extension_argument < total_args_passed, "out of range");
2d6dd2eebd51 Fixed HSAIL deopt
Tom Rodriguez <tom.rodriguez@oracle.com>
parents: 15104
diff changeset
741 assert(sig_bt[frame_extension_argument] == T_INT, "wrong signature");
2d6dd2eebd51 Fixed HSAIL deopt
Tom Rodriguez <tom.rodriguez@oracle.com>
parents: 15104
diff changeset
742
2d6dd2eebd51 Fixed HSAIL deopt
Tom Rodriguez <tom.rodriguez@oracle.com>
parents: 15104
diff changeset
743 Label done;
2d6dd2eebd51 Fixed HSAIL deopt
Tom Rodriguez <tom.rodriguez@oracle.com>
parents: 15104
diff changeset
744 int i = frame_extension_argument;
2d6dd2eebd51 Fixed HSAIL deopt
Tom Rodriguez <tom.rodriguez@oracle.com>
parents: 15104
diff changeset
745 int ld_off = (total_args_passed - i)*Interpreter::stackElementSize;
2d6dd2eebd51 Fixed HSAIL deopt
Tom Rodriguez <tom.rodriguez@oracle.com>
parents: 15104
diff changeset
746 // Check if anything needs to be done. Too much space is ok.
2d6dd2eebd51 Fixed HSAIL deopt
Tom Rodriguez <tom.rodriguez@oracle.com>
parents: 15104
diff changeset
747 __ movl(r13, Address(rsp, ld_off));
2d6dd2eebd51 Fixed HSAIL deopt
Tom Rodriguez <tom.rodriguez@oracle.com>
parents: 15104
diff changeset
748 __ cmpl(r13, total_args_passed);
2d6dd2eebd51 Fixed HSAIL deopt
Tom Rodriguez <tom.rodriguez@oracle.com>
parents: 15104
diff changeset
749 __ jcc(Assembler::lessEqual, done);
2d6dd2eebd51 Fixed HSAIL deopt
Tom Rodriguez <tom.rodriguez@oracle.com>
parents: 15104
diff changeset
750 // Save the old rsp for the copy code
2d6dd2eebd51 Fixed HSAIL deopt
Tom Rodriguez <tom.rodriguez@oracle.com>
parents: 15104
diff changeset
751 __ movptr(r11, rsp);
2d6dd2eebd51 Fixed HSAIL deopt
Tom Rodriguez <tom.rodriguez@oracle.com>
parents: 15104
diff changeset
752 // Enlarge the frame
2d6dd2eebd51 Fixed HSAIL deopt
Tom Rodriguez <tom.rodriguez@oracle.com>
parents: 15104
diff changeset
753 __ subl(r13, total_args_passed);
2d6dd2eebd51 Fixed HSAIL deopt
Tom Rodriguez <tom.rodriguez@oracle.com>
parents: 15104
diff changeset
754 __ shlq(r13, 3);
2d6dd2eebd51 Fixed HSAIL deopt
Tom Rodriguez <tom.rodriguez@oracle.com>
parents: 15104
diff changeset
755 __ subptr(rsp, r13);
2d6dd2eebd51 Fixed HSAIL deopt
Tom Rodriguez <tom.rodriguez@oracle.com>
parents: 15104
diff changeset
756
2d6dd2eebd51 Fixed HSAIL deopt
Tom Rodriguez <tom.rodriguez@oracle.com>
parents: 15104
diff changeset
757 // Now copy the arguments in reverse order so they don't get
2d6dd2eebd51 Fixed HSAIL deopt
Tom Rodriguez <tom.rodriguez@oracle.com>
parents: 15104
diff changeset
758 // overwritten during the copy.
2d6dd2eebd51 Fixed HSAIL deopt
Tom Rodriguez <tom.rodriguez@oracle.com>
parents: 15104
diff changeset
759 for (int i = total_args_passed - 1; i >= 0; i--) {
2d6dd2eebd51 Fixed HSAIL deopt
Tom Rodriguez <tom.rodriguez@oracle.com>
parents: 15104
diff changeset
760 int ld_off = (total_args_passed - i) * Interpreter::stackElementSize;
2d6dd2eebd51 Fixed HSAIL deopt
Tom Rodriguez <tom.rodriguez@oracle.com>
parents: 15104
diff changeset
761 __ movptr(r13, Address(r11, ld_off));
2d6dd2eebd51 Fixed HSAIL deopt
Tom Rodriguez <tom.rodriguez@oracle.com>
parents: 15104
diff changeset
762 __ movptr(Address(rsp, ld_off), r13);
2d6dd2eebd51 Fixed HSAIL deopt
Tom Rodriguez <tom.rodriguez@oracle.com>
parents: 15104
diff changeset
763 }
2d6dd2eebd51 Fixed HSAIL deopt
Tom Rodriguez <tom.rodriguez@oracle.com>
parents: 15104
diff changeset
764 __ bind(done);
2d6dd2eebd51 Fixed HSAIL deopt
Tom Rodriguez <tom.rodriguez@oracle.com>
parents: 15104
diff changeset
765 }
2d6dd2eebd51 Fixed HSAIL deopt
Tom Rodriguez <tom.rodriguez@oracle.com>
parents: 15104
diff changeset
766 #else
2d6dd2eebd51 Fixed HSAIL deopt
Tom Rodriguez <tom.rodriguez@oracle.com>
parents: 15104
diff changeset
767 assert(frame_extension_argument == -1, "unsupported");
2d6dd2eebd51 Fixed HSAIL deopt
Tom Rodriguez <tom.rodriguez@oracle.com>
parents: 15104
diff changeset
768 #endif
2d6dd2eebd51 Fixed HSAIL deopt
Tom Rodriguez <tom.rodriguez@oracle.com>
parents: 15104
diff changeset
769
1135
e66fd840cb6b 6893081: method handle & invokedynamic code needs additional cleanup (post 6815692, 6858164)
twisti
parents: 848
diff changeset
770 // Must preserve original SP for loading incoming arguments because
e66fd840cb6b 6893081: method handle & invokedynamic code needs additional cleanup (post 6815692, 6858164)
twisti
parents: 848
diff changeset
771 // we need to align the outgoing SP for compiled code.
e66fd840cb6b 6893081: method handle & invokedynamic code needs additional cleanup (post 6815692, 6858164)
twisti
parents: 848
diff changeset
772 __ movptr(r11, rsp);
e66fd840cb6b 6893081: method handle & invokedynamic code needs additional cleanup (post 6815692, 6858164)
twisti
parents: 848
diff changeset
773
0
a61af66fc99e Initial load
duke
parents:
diff changeset
774 // Cut-out for having no stack args. Since up to 2 int/oop args are passed
a61af66fc99e Initial load
duke
parents:
diff changeset
775 // in registers, we will occasionally have no stack args.
a61af66fc99e Initial load
duke
parents:
diff changeset
776 int comp_words_on_stack = 0;
a61af66fc99e Initial load
duke
parents:
diff changeset
777 if (comp_args_on_stack) {
a61af66fc99e Initial load
duke
parents:
diff changeset
778 // Sig words on the stack are greater-than VMRegImpl::stack0. Those in
a61af66fc99e Initial load
duke
parents:
diff changeset
779 // registers are below. By subtracting stack0, we either get a negative
a61af66fc99e Initial load
duke
parents:
diff changeset
780 // number (all values in registers) or the maximum stack slot accessed.
a61af66fc99e Initial load
duke
parents:
diff changeset
781
a61af66fc99e Initial load
duke
parents:
diff changeset
782 // Convert 4-byte c2 stack slots to words.
a61af66fc99e Initial load
duke
parents:
diff changeset
783 comp_words_on_stack = round_to(comp_args_on_stack*VMRegImpl::stack_slot_size, wordSize)>>LogBytesPerWord;
a61af66fc99e Initial load
duke
parents:
diff changeset
784 // Round up to miminum stack alignment, in wordSize
a61af66fc99e Initial load
duke
parents:
diff changeset
785 comp_words_on_stack = round_to(comp_words_on_stack, 2);
304
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 196
diff changeset
786 __ subptr(rsp, comp_words_on_stack * wordSize);
0
a61af66fc99e Initial load
duke
parents:
diff changeset
787 }
a61af66fc99e Initial load
duke
parents:
diff changeset
788
a61af66fc99e Initial load
duke
parents:
diff changeset
789
a61af66fc99e Initial load
duke
parents:
diff changeset
790 // Ensure compiled code always sees stack at proper alignment
304
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 196
diff changeset
791 __ andptr(rsp, -16);
0
a61af66fc99e Initial load
duke
parents:
diff changeset
792
a61af66fc99e Initial load
duke
parents:
diff changeset
793 // push the return address and misalign the stack that youngest frame always sees
a61af66fc99e Initial load
duke
parents:
diff changeset
794 // as far as the placement of the call instruction
304
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 196
diff changeset
795 __ push(rax);
0
a61af66fc99e Initial load
duke
parents:
diff changeset
796
1135
e66fd840cb6b 6893081: method handle & invokedynamic code needs additional cleanup (post 6815692, 6858164)
twisti
parents: 848
diff changeset
797 // Put saved SP in another register
e66fd840cb6b 6893081: method handle & invokedynamic code needs additional cleanup (post 6815692, 6858164)
twisti
parents: 848
diff changeset
798 const Register saved_sp = rax;
e66fd840cb6b 6893081: method handle & invokedynamic code needs additional cleanup (post 6815692, 6858164)
twisti
parents: 848
diff changeset
799 __ movptr(saved_sp, r11);
e66fd840cb6b 6893081: method handle & invokedynamic code needs additional cleanup (post 6815692, 6858164)
twisti
parents: 848
diff changeset
800
0
a61af66fc99e Initial load
duke
parents:
diff changeset
801 // Will jump to the compiled code just as if compiled code was doing it.
a61af66fc99e Initial load
duke
parents:
diff changeset
802 // Pre-load the register-jump target early, to schedule it better.
6725
da91efe96a93 6964458: Reimplement class meta-data storage to use native memory
coleenp
parents: 6266
diff changeset
803 __ movptr(r11, Address(rbx, in_bytes(Method::from_compiled_offset())));
0
a61af66fc99e Initial load
duke
parents:
diff changeset
804
22298
c28cb37b2e1d Rename JVMCI to INCLUDE_JVMCI.
twisti
parents: 21884
diff changeset
805 #if INCLUDE_JVMCI
4993
897b7d18bebc added RiCompiledMethod.execute and the required VM infrastructure
Lukas Stadler <lukas.stadler@jku.at>
parents: 4985
diff changeset
806 // check if this call should be routed towards a specific entry point
21559
be896a1983c0 recast all Graal native code as JVMCI code (JBS:GRAAL-53)
Doug Simon <doug.simon@oracle.com>
parents: 21074
diff changeset
807 __ cmpptr(Address(r15_thread, in_bytes(JavaThread::jvmci_alternate_call_target_offset())), 0);
4993
897b7d18bebc added RiCompiledMethod.execute and the required VM infrastructure
Lukas Stadler <lukas.stadler@jku.at>
parents: 4985
diff changeset
808 Label no_alternative_target;
897b7d18bebc added RiCompiledMethod.execute and the required VM infrastructure
Lukas Stadler <lukas.stadler@jku.at>
parents: 4985
diff changeset
809 __ jcc(Assembler::equal, no_alternative_target);
21559
be896a1983c0 recast all Graal native code as JVMCI code (JBS:GRAAL-53)
Doug Simon <doug.simon@oracle.com>
parents: 21074
diff changeset
810 __ movptr(r11, Address(r15_thread, in_bytes(JavaThread::jvmci_alternate_call_target_offset())));
be896a1983c0 recast all Graal native code as JVMCI code (JBS:GRAAL-53)
Doug Simon <doug.simon@oracle.com>
parents: 21074
diff changeset
811 __ movptr(Address(r15_thread, in_bytes(JavaThread::jvmci_alternate_call_target_offset())), 0);
4993
897b7d18bebc added RiCompiledMethod.execute and the required VM infrastructure
Lukas Stadler <lukas.stadler@jku.at>
parents: 4985
diff changeset
812 __ bind(no_alternative_target);
897b7d18bebc added RiCompiledMethod.execute and the required VM infrastructure
Lukas Stadler <lukas.stadler@jku.at>
parents: 4985
diff changeset
813 #endif
897b7d18bebc added RiCompiledMethod.execute and the required VM infrastructure
Lukas Stadler <lukas.stadler@jku.at>
parents: 4985
diff changeset
814
0
a61af66fc99e Initial load
duke
parents:
diff changeset
815 // Now generate the shuffle code. Pick up all register args and move the
a61af66fc99e Initial load
duke
parents:
diff changeset
816 // rest through the floating point stack top.
a61af66fc99e Initial load
duke
parents:
diff changeset
817 for (int i = 0; i < total_args_passed; i++) {
a61af66fc99e Initial load
duke
parents:
diff changeset
818 if (sig_bt[i] == T_VOID) {
a61af66fc99e Initial load
duke
parents:
diff changeset
819 // Longs and doubles are passed in native word order, but misaligned
a61af66fc99e Initial load
duke
parents:
diff changeset
820 // in the 32-bit build.
a61af66fc99e Initial load
duke
parents:
diff changeset
821 assert(i > 0 && (sig_bt[i-1] == T_LONG || sig_bt[i-1] == T_DOUBLE), "missing half");
a61af66fc99e Initial load
duke
parents:
diff changeset
822 continue;
a61af66fc99e Initial load
duke
parents:
diff changeset
823 }
a61af66fc99e Initial load
duke
parents:
diff changeset
824
a61af66fc99e Initial load
duke
parents:
diff changeset
825 // Pick up 0, 1 or 2 words from SP+offset.
a61af66fc99e Initial load
duke
parents:
diff changeset
826
a61af66fc99e Initial load
duke
parents:
diff changeset
827 assert(!regs[i].second()->is_valid() || regs[i].first()->next() == regs[i].second(),
a61af66fc99e Initial load
duke
parents:
diff changeset
828 "scrambled load targets?");
a61af66fc99e Initial load
duke
parents:
diff changeset
829 // Load in argument order going down.
1506
2338d41fbd81 6943304: remove tagged stack interpreter
twisti
parents: 1368
diff changeset
830 int ld_off = (total_args_passed - i)*Interpreter::stackElementSize;
0
a61af66fc99e Initial load
duke
parents:
diff changeset
831 // Point to interpreter value (vs. tag)
1506
2338d41fbd81 6943304: remove tagged stack interpreter
twisti
parents: 1368
diff changeset
832 int next_off = ld_off - Interpreter::stackElementSize;
0
a61af66fc99e Initial load
duke
parents:
diff changeset
833 //
a61af66fc99e Initial load
duke
parents:
diff changeset
834 //
a61af66fc99e Initial load
duke
parents:
diff changeset
835 //
a61af66fc99e Initial load
duke
parents:
diff changeset
836 VMReg r_1 = regs[i].first();
a61af66fc99e Initial load
duke
parents:
diff changeset
837 VMReg r_2 = regs[i].second();
a61af66fc99e Initial load
duke
parents:
diff changeset
838 if (!r_1->is_valid()) {
a61af66fc99e Initial load
duke
parents:
diff changeset
839 assert(!r_2->is_valid(), "");
a61af66fc99e Initial load
duke
parents:
diff changeset
840 continue;
a61af66fc99e Initial load
duke
parents:
diff changeset
841 }
a61af66fc99e Initial load
duke
parents:
diff changeset
842 if (r_1->is_stack()) {
a61af66fc99e Initial load
duke
parents:
diff changeset
843 // Convert stack slot to an SP offset (+ wordSize to account for return address )
a61af66fc99e Initial load
duke
parents:
diff changeset
844 int st_off = regs[i].first()->reg2stack()*VMRegImpl::stack_slot_size + wordSize;
1135
e66fd840cb6b 6893081: method handle & invokedynamic code needs additional cleanup (post 6815692, 6858164)
twisti
parents: 848
diff changeset
845
e66fd840cb6b 6893081: method handle & invokedynamic code needs additional cleanup (post 6815692, 6858164)
twisti
parents: 848
diff changeset
846 // We can use r13 as a temp here because compiled code doesn't need r13 as an input
e66fd840cb6b 6893081: method handle & invokedynamic code needs additional cleanup (post 6815692, 6858164)
twisti
parents: 848
diff changeset
847 // and if we end up going thru a c2i because of a miss a reasonable value of r13
e66fd840cb6b 6893081: method handle & invokedynamic code needs additional cleanup (post 6815692, 6858164)
twisti
parents: 848
diff changeset
848 // will be generated.
0
a61af66fc99e Initial load
duke
parents:
diff changeset
849 if (!r_2->is_valid()) {
a61af66fc99e Initial load
duke
parents:
diff changeset
850 // sign extend???
1135
e66fd840cb6b 6893081: method handle & invokedynamic code needs additional cleanup (post 6815692, 6858164)
twisti
parents: 848
diff changeset
851 __ movl(r13, Address(saved_sp, ld_off));
e66fd840cb6b 6893081: method handle & invokedynamic code needs additional cleanup (post 6815692, 6858164)
twisti
parents: 848
diff changeset
852 __ movptr(Address(rsp, st_off), r13);
0
a61af66fc99e Initial load
duke
parents:
diff changeset
853 } else {
a61af66fc99e Initial load
duke
parents:
diff changeset
854 //
a61af66fc99e Initial load
duke
parents:
diff changeset
855 // We are using two optoregs. This can be either T_OBJECT, T_ADDRESS, T_LONG, or T_DOUBLE
a61af66fc99e Initial load
duke
parents:
diff changeset
856 // the interpreter allocates two slots but only uses one for thr T_LONG or T_DOUBLE case
a61af66fc99e Initial load
duke
parents:
diff changeset
857 // So we must adjust where to pick up the data to match the interpreter.
a61af66fc99e Initial load
duke
parents:
diff changeset
858 //
a61af66fc99e Initial load
duke
parents:
diff changeset
859 // Interpreter local[n] == MSW, local[n+1] == LSW however locals
a61af66fc99e Initial load
duke
parents:
diff changeset
860 // are accessed as negative so LSW is at LOW address
a61af66fc99e Initial load
duke
parents:
diff changeset
861
a61af66fc99e Initial load
duke
parents:
diff changeset
862 // ld_off is MSW so get LSW
a61af66fc99e Initial load
duke
parents:
diff changeset
863 const int offset = (sig_bt[i]==T_LONG||sig_bt[i]==T_DOUBLE)?
a61af66fc99e Initial load
duke
parents:
diff changeset
864 next_off : ld_off;
1135
e66fd840cb6b 6893081: method handle & invokedynamic code needs additional cleanup (post 6815692, 6858164)
twisti
parents: 848
diff changeset
865 __ movq(r13, Address(saved_sp, offset));
0
a61af66fc99e Initial load
duke
parents:
diff changeset
866 // st_off is LSW (i.e. reg.first())
1135
e66fd840cb6b 6893081: method handle & invokedynamic code needs additional cleanup (post 6815692, 6858164)
twisti
parents: 848
diff changeset
867 __ movq(Address(rsp, st_off), r13);
0
a61af66fc99e Initial load
duke
parents:
diff changeset
868 }
a61af66fc99e Initial load
duke
parents:
diff changeset
869 } else if (r_1->is_Register()) { // Register argument
a61af66fc99e Initial load
duke
parents:
diff changeset
870 Register r = r_1->as_Register();
a61af66fc99e Initial load
duke
parents:
diff changeset
871 assert(r != rax, "must be different");
a61af66fc99e Initial load
duke
parents:
diff changeset
872 if (r_2->is_valid()) {
a61af66fc99e Initial load
duke
parents:
diff changeset
873 //
a61af66fc99e Initial load
duke
parents:
diff changeset
874 // We are using two VMRegs. This can be either T_OBJECT, T_ADDRESS, T_LONG, or T_DOUBLE
a61af66fc99e Initial load
duke
parents:
diff changeset
875 // the interpreter allocates two slots but only uses one for thr T_LONG or T_DOUBLE case
a61af66fc99e Initial load
duke
parents:
diff changeset
876 // So we must adjust where to pick up the data to match the interpreter.
a61af66fc99e Initial load
duke
parents:
diff changeset
877
a61af66fc99e Initial load
duke
parents:
diff changeset
878 const int offset = (sig_bt[i]==T_LONG||sig_bt[i]==T_DOUBLE)?
a61af66fc99e Initial load
duke
parents:
diff changeset
879 next_off : ld_off;
a61af66fc99e Initial load
duke
parents:
diff changeset
880
a61af66fc99e Initial load
duke
parents:
diff changeset
881 // this can be a misaligned move
1135
e66fd840cb6b 6893081: method handle & invokedynamic code needs additional cleanup (post 6815692, 6858164)
twisti
parents: 848
diff changeset
882 __ movq(r, Address(saved_sp, offset));
0
a61af66fc99e Initial load
duke
parents:
diff changeset
883 } else {
a61af66fc99e Initial load
duke
parents:
diff changeset
884 // sign extend and use a full word?
1135
e66fd840cb6b 6893081: method handle & invokedynamic code needs additional cleanup (post 6815692, 6858164)
twisti
parents: 848
diff changeset
885 __ movl(r, Address(saved_sp, ld_off));
0
a61af66fc99e Initial load
duke
parents:
diff changeset
886 }
a61af66fc99e Initial load
duke
parents:
diff changeset
887 } else {
a61af66fc99e Initial load
duke
parents:
diff changeset
888 if (!r_2->is_valid()) {
1135
e66fd840cb6b 6893081: method handle & invokedynamic code needs additional cleanup (post 6815692, 6858164)
twisti
parents: 848
diff changeset
889 __ movflt(r_1->as_XMMRegister(), Address(saved_sp, ld_off));
0
a61af66fc99e Initial load
duke
parents:
diff changeset
890 } else {
1135
e66fd840cb6b 6893081: method handle & invokedynamic code needs additional cleanup (post 6815692, 6858164)
twisti
parents: 848
diff changeset
891 __ movdbl(r_1->as_XMMRegister(), Address(saved_sp, next_off));
0
a61af66fc99e Initial load
duke
parents:
diff changeset
892 }
a61af66fc99e Initial load
duke
parents:
diff changeset
893 }
a61af66fc99e Initial load
duke
parents:
diff changeset
894 }
a61af66fc99e Initial load
duke
parents:
diff changeset
895
a61af66fc99e Initial load
duke
parents:
diff changeset
896 // 6243940 We might end up in handle_wrong_method if
a61af66fc99e Initial load
duke
parents:
diff changeset
897 // the callee is deoptimized as we race thru here. If that
a61af66fc99e Initial load
duke
parents:
diff changeset
898 // happens we don't want to take a safepoint because the
a61af66fc99e Initial load
duke
parents:
diff changeset
899 // caller frame will look interpreted and arguments are now
a61af66fc99e Initial load
duke
parents:
diff changeset
900 // "compiled" so it is much better to make this transition
a61af66fc99e Initial load
duke
parents:
diff changeset
901 // invisible to the stack walking code. Unfortunately if
a61af66fc99e Initial load
duke
parents:
diff changeset
902 // we try and find the callee by normal means a safepoint
a61af66fc99e Initial load
duke
parents:
diff changeset
903 // is possible. So we stash the desired callee in the thread
a61af66fc99e Initial load
duke
parents:
diff changeset
904 // and the vm will find there should this case occur.
a61af66fc99e Initial load
duke
parents:
diff changeset
905
304
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 196
diff changeset
906 __ movptr(Address(r15_thread, JavaThread::callee_target_offset()), rbx);
0
a61af66fc99e Initial load
duke
parents:
diff changeset
907
6725
da91efe96a93 6964458: Reimplement class meta-data storage to use native memory
coleenp
parents: 6266
diff changeset
908 // put Method* where a c2i would expect should we end up there
da91efe96a93 6964458: Reimplement class meta-data storage to use native memory
coleenp
parents: 6266
diff changeset
909 // only needed becaus eof c2 resolve stubs return Method* as a result in
0
a61af66fc99e Initial load
duke
parents:
diff changeset
910 // rax
304
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 196
diff changeset
911 __ mov(rax, rbx);
0
a61af66fc99e Initial load
duke
parents:
diff changeset
912 __ jmp(r11);
a61af66fc99e Initial load
duke
parents:
diff changeset
913 }
a61af66fc99e Initial load
duke
parents:
diff changeset
914
a61af66fc99e Initial load
duke
parents:
diff changeset
915 // ---------------------------------------------------------------
a61af66fc99e Initial load
duke
parents:
diff changeset
916 AdapterHandlerEntry* SharedRuntime::generate_i2c2i_adapters(MacroAssembler *masm,
a61af66fc99e Initial load
duke
parents:
diff changeset
917 int total_args_passed,
a61af66fc99e Initial load
duke
parents:
diff changeset
918 int comp_args_on_stack,
a61af66fc99e Initial load
duke
parents:
diff changeset
919 const BasicType *sig_bt,
1187
cf0685d550f1 6911204: generated adapters with large signatures can fill up the code cache
never
parents: 1135
diff changeset
920 const VMRegPair *regs,
cf0685d550f1 6911204: generated adapters with large signatures can fill up the code cache
never
parents: 1135
diff changeset
921 AdapterFingerPrint* fingerprint) {
0
a61af66fc99e Initial load
duke
parents:
diff changeset
922 address i2c_entry = __ pc();
a61af66fc99e Initial load
duke
parents:
diff changeset
923
a61af66fc99e Initial load
duke
parents:
diff changeset
924 gen_i2c_adapter(masm, total_args_passed, comp_args_on_stack, sig_bt, regs);
a61af66fc99e Initial load
duke
parents:
diff changeset
925
a61af66fc99e Initial load
duke
parents:
diff changeset
926 // -------------------------------------------------------------------------
6725
da91efe96a93 6964458: Reimplement class meta-data storage to use native memory
coleenp
parents: 6266
diff changeset
927 // Generate a C2I adapter. On entry we know rbx holds the Method* during calls
0
a61af66fc99e Initial load
duke
parents:
diff changeset
928 // to the interpreter. The args start out packed in the compiled layout. They
a61af66fc99e Initial load
duke
parents:
diff changeset
929 // need to be unpacked into the interpreter layout. This will almost always
a61af66fc99e Initial load
duke
parents:
diff changeset
930 // require some stack space. We grow the current (compiled) stack, then repack
a61af66fc99e Initial load
duke
parents:
diff changeset
931 // the args. We finally end in a jump to the generic interpreter entry point.
a61af66fc99e Initial load
duke
parents:
diff changeset
932 // On exit from the interpreter, the interpreter will restore our SP (lest the
a61af66fc99e Initial load
duke
parents:
diff changeset
933 // compiled code, which relys solely on SP and not RBP, get sick).
a61af66fc99e Initial load
duke
parents:
diff changeset
934
a61af66fc99e Initial load
duke
parents:
diff changeset
935 address c2i_unverified_entry = __ pc();
a61af66fc99e Initial load
duke
parents:
diff changeset
936 Label skip_fixup;
a61af66fc99e Initial load
duke
parents:
diff changeset
937 Label ok;
a61af66fc99e Initial load
duke
parents:
diff changeset
938
a61af66fc99e Initial load
duke
parents:
diff changeset
939 Register holder = rax;
a61af66fc99e Initial load
duke
parents:
diff changeset
940 Register receiver = j_rarg0;
a61af66fc99e Initial load
duke
parents:
diff changeset
941 Register temp = rbx;
a61af66fc99e Initial load
duke
parents:
diff changeset
942
a61af66fc99e Initial load
duke
parents:
diff changeset
943 {
113
ba764ed4b6f2 6420645: Create a vm that uses compressed oops for up to 32gb heapsizes
coleenp
parents: 0
diff changeset
944 __ load_klass(temp, receiver);
6725
da91efe96a93 6964458: Reimplement class meta-data storage to use native memory
coleenp
parents: 6266
diff changeset
945 __ cmpptr(temp, Address(holder, CompiledICHolder::holder_klass_offset()));
da91efe96a93 6964458: Reimplement class meta-data storage to use native memory
coleenp
parents: 6266
diff changeset
946 __ movptr(rbx, Address(holder, CompiledICHolder::holder_method_offset()));
0
a61af66fc99e Initial load
duke
parents:
diff changeset
947 __ jcc(Assembler::equal, ok);
a61af66fc99e Initial load
duke
parents:
diff changeset
948 __ jump(RuntimeAddress(SharedRuntime::get_ic_miss_stub()));
a61af66fc99e Initial load
duke
parents:
diff changeset
949
a61af66fc99e Initial load
duke
parents:
diff changeset
950 __ bind(ok);
a61af66fc99e Initial load
duke
parents:
diff changeset
951 // Method might have been compiled since the call site was patched to
a61af66fc99e Initial load
duke
parents:
diff changeset
952 // interpreted if that is the case treat it as a miss so we can get
a61af66fc99e Initial load
duke
parents:
diff changeset
953 // the call site corrected.
6725
da91efe96a93 6964458: Reimplement class meta-data storage to use native memory
coleenp
parents: 6266
diff changeset
954 __ cmpptr(Address(rbx, in_bytes(Method::code_offset())), (int32_t)NULL_WORD);
0
a61af66fc99e Initial load
duke
parents:
diff changeset
955 __ jcc(Assembler::equal, skip_fixup);
a61af66fc99e Initial load
duke
parents:
diff changeset
956 __ jump(RuntimeAddress(SharedRuntime::get_ic_miss_stub()));
a61af66fc99e Initial load
duke
parents:
diff changeset
957 }
a61af66fc99e Initial load
duke
parents:
diff changeset
958
a61af66fc99e Initial load
duke
parents:
diff changeset
959 address c2i_entry = __ pc();
a61af66fc99e Initial load
duke
parents:
diff changeset
960
a61af66fc99e Initial load
duke
parents:
diff changeset
961 gen_c2i_adapter(masm, total_args_passed, comp_args_on_stack, sig_bt, regs, skip_fixup);
a61af66fc99e Initial load
duke
parents:
diff changeset
962
a61af66fc99e Initial load
duke
parents:
diff changeset
963 __ flush();
1187
cf0685d550f1 6911204: generated adapters with large signatures can fill up the code cache
never
parents: 1135
diff changeset
964 return AdapterHandlerLibrary::new_entry(fingerprint, i2c_entry, c2i_entry, c2i_unverified_entry);
0
a61af66fc99e Initial load
duke
parents:
diff changeset
965 }
a61af66fc99e Initial load
duke
parents:
diff changeset
966
a61af66fc99e Initial load
duke
parents:
diff changeset
967 int SharedRuntime::c_calling_convention(const BasicType *sig_bt,
a61af66fc99e Initial load
duke
parents:
diff changeset
968 VMRegPair *regs,
14416
6a936747b569 8024344: PPC64 (part 112): C argument in register AND stack slot.
goetz
parents: 10998
diff changeset
969 VMRegPair *regs2,
0
a61af66fc99e Initial load
duke
parents:
diff changeset
970 int total_args_passed) {
14416
6a936747b569 8024344: PPC64 (part 112): C argument in register AND stack slot.
goetz
parents: 10998
diff changeset
971 assert(regs2 == NULL, "not needed on x86");
0
a61af66fc99e Initial load
duke
parents:
diff changeset
972 // We return the amount of VMRegImpl stack slots we need to reserve for all
a61af66fc99e Initial load
duke
parents:
diff changeset
973 // the arguments NOT counting out_preserve_stack_slots.
a61af66fc99e Initial load
duke
parents:
diff changeset
974
a61af66fc99e Initial load
duke
parents:
diff changeset
975 // NOTE: These arrays will have to change when c1 is ported
a61af66fc99e Initial load
duke
parents:
diff changeset
976 #ifdef _WIN64
a61af66fc99e Initial load
duke
parents:
diff changeset
977 static const Register INT_ArgReg[Argument::n_int_register_parameters_c] = {
a61af66fc99e Initial load
duke
parents:
diff changeset
978 c_rarg0, c_rarg1, c_rarg2, c_rarg3
a61af66fc99e Initial load
duke
parents:
diff changeset
979 };
a61af66fc99e Initial load
duke
parents:
diff changeset
980 static const XMMRegister FP_ArgReg[Argument::n_float_register_parameters_c] = {
a61af66fc99e Initial load
duke
parents:
diff changeset
981 c_farg0, c_farg1, c_farg2, c_farg3
a61af66fc99e Initial load
duke
parents:
diff changeset
982 };
a61af66fc99e Initial load
duke
parents:
diff changeset
983 #else
a61af66fc99e Initial load
duke
parents:
diff changeset
984 static const Register INT_ArgReg[Argument::n_int_register_parameters_c] = {
a61af66fc99e Initial load
duke
parents:
diff changeset
985 c_rarg0, c_rarg1, c_rarg2, c_rarg3, c_rarg4, c_rarg5
a61af66fc99e Initial load
duke
parents:
diff changeset
986 };
a61af66fc99e Initial load
duke
parents:
diff changeset
987 static const XMMRegister FP_ArgReg[Argument::n_float_register_parameters_c] = {
a61af66fc99e Initial load
duke
parents:
diff changeset
988 c_farg0, c_farg1, c_farg2, c_farg3,
a61af66fc99e Initial load
duke
parents:
diff changeset
989 c_farg4, c_farg5, c_farg6, c_farg7
a61af66fc99e Initial load
duke
parents:
diff changeset
990 };
a61af66fc99e Initial load
duke
parents:
diff changeset
991 #endif // _WIN64
a61af66fc99e Initial load
duke
parents:
diff changeset
992
a61af66fc99e Initial load
duke
parents:
diff changeset
993
a61af66fc99e Initial load
duke
parents:
diff changeset
994 uint int_args = 0;
a61af66fc99e Initial load
duke
parents:
diff changeset
995 uint fp_args = 0;
a61af66fc99e Initial load
duke
parents:
diff changeset
996 uint stk_args = 0; // inc by 2 each time
a61af66fc99e Initial load
duke
parents:
diff changeset
997
a61af66fc99e Initial load
duke
parents:
diff changeset
998 for (int i = 0; i < total_args_passed; i++) {
a61af66fc99e Initial load
duke
parents:
diff changeset
999 switch (sig_bt[i]) {
a61af66fc99e Initial load
duke
parents:
diff changeset
1000 case T_BOOLEAN:
a61af66fc99e Initial load
duke
parents:
diff changeset
1001 case T_CHAR:
a61af66fc99e Initial load
duke
parents:
diff changeset
1002 case T_BYTE:
a61af66fc99e Initial load
duke
parents:
diff changeset
1003 case T_SHORT:
a61af66fc99e Initial load
duke
parents:
diff changeset
1004 case T_INT:
a61af66fc99e Initial load
duke
parents:
diff changeset
1005 if (int_args < Argument::n_int_register_parameters_c) {
a61af66fc99e Initial load
duke
parents:
diff changeset
1006 regs[i].set1(INT_ArgReg[int_args++]->as_VMReg());
a61af66fc99e Initial load
duke
parents:
diff changeset
1007 #ifdef _WIN64
a61af66fc99e Initial load
duke
parents:
diff changeset
1008 fp_args++;
a61af66fc99e Initial load
duke
parents:
diff changeset
1009 // Allocate slots for callee to stuff register args the stack.
a61af66fc99e Initial load
duke
parents:
diff changeset
1010 stk_args += 2;
a61af66fc99e Initial load
duke
parents:
diff changeset
1011 #endif
a61af66fc99e Initial load
duke
parents:
diff changeset
1012 } else {
a61af66fc99e Initial load
duke
parents:
diff changeset
1013 regs[i].set1(VMRegImpl::stack2reg(stk_args));
a61af66fc99e Initial load
duke
parents:
diff changeset
1014 stk_args += 2;
a61af66fc99e Initial load
duke
parents:
diff changeset
1015 }
a61af66fc99e Initial load
duke
parents:
diff changeset
1016 break;
a61af66fc99e Initial load
duke
parents:
diff changeset
1017 case T_LONG:
a61af66fc99e Initial load
duke
parents:
diff changeset
1018 assert(sig_bt[i + 1] == T_VOID, "expecting half");
a61af66fc99e Initial load
duke
parents:
diff changeset
1019 // fall through
a61af66fc99e Initial load
duke
parents:
diff changeset
1020 case T_OBJECT:
a61af66fc99e Initial load
duke
parents:
diff changeset
1021 case T_ARRAY:
a61af66fc99e Initial load
duke
parents:
diff changeset
1022 case T_ADDRESS:
6739
8a02ca5e5576 7195816: NPG: Crash in c1_ValueType - ShouldNotReachHere
roland
parents: 6725
diff changeset
1023 case T_METADATA:
0
a61af66fc99e Initial load
duke
parents:
diff changeset
1024 if (int_args < Argument::n_int_register_parameters_c) {
a61af66fc99e Initial load
duke
parents:
diff changeset
1025 regs[i].set2(INT_ArgReg[int_args++]->as_VMReg());
a61af66fc99e Initial load
duke
parents:
diff changeset
1026 #ifdef _WIN64
a61af66fc99e Initial load
duke
parents:
diff changeset
1027 fp_args++;
a61af66fc99e Initial load
duke
parents:
diff changeset
1028 stk_args += 2;
a61af66fc99e Initial load
duke
parents:
diff changeset
1029 #endif
a61af66fc99e Initial load
duke
parents:
diff changeset
1030 } else {
a61af66fc99e Initial load
duke
parents:
diff changeset
1031 regs[i].set2(VMRegImpl::stack2reg(stk_args));
a61af66fc99e Initial load
duke
parents:
diff changeset
1032 stk_args += 2;
a61af66fc99e Initial load
duke
parents:
diff changeset
1033 }
a61af66fc99e Initial load
duke
parents:
diff changeset
1034 break;
a61af66fc99e Initial load
duke
parents:
diff changeset
1035 case T_FLOAT:
a61af66fc99e Initial load
duke
parents:
diff changeset
1036 if (fp_args < Argument::n_float_register_parameters_c) {
a61af66fc99e Initial load
duke
parents:
diff changeset
1037 regs[i].set1(FP_ArgReg[fp_args++]->as_VMReg());
a61af66fc99e Initial load
duke
parents:
diff changeset
1038 #ifdef _WIN64
a61af66fc99e Initial load
duke
parents:
diff changeset
1039 int_args++;
a61af66fc99e Initial load
duke
parents:
diff changeset
1040 // Allocate slots for callee to stuff register args the stack.
a61af66fc99e Initial load
duke
parents:
diff changeset
1041 stk_args += 2;
a61af66fc99e Initial load
duke
parents:
diff changeset
1042 #endif
a61af66fc99e Initial load
duke
parents:
diff changeset
1043 } else {
a61af66fc99e Initial load
duke
parents:
diff changeset
1044 regs[i].set1(VMRegImpl::stack2reg(stk_args));
a61af66fc99e Initial load
duke
parents:
diff changeset
1045 stk_args += 2;
a61af66fc99e Initial load
duke
parents:
diff changeset
1046 }
a61af66fc99e Initial load
duke
parents:
diff changeset
1047 break;
a61af66fc99e Initial load
duke
parents:
diff changeset
1048 case T_DOUBLE:
a61af66fc99e Initial load
duke
parents:
diff changeset
1049 assert(sig_bt[i + 1] == T_VOID, "expecting half");
a61af66fc99e Initial load
duke
parents:
diff changeset
1050 if (fp_args < Argument::n_float_register_parameters_c) {
a61af66fc99e Initial load
duke
parents:
diff changeset
1051 regs[i].set2(FP_ArgReg[fp_args++]->as_VMReg());
a61af66fc99e Initial load
duke
parents:
diff changeset
1052 #ifdef _WIN64
a61af66fc99e Initial load
duke
parents:
diff changeset
1053 int_args++;
a61af66fc99e Initial load
duke
parents:
diff changeset
1054 // Allocate slots for callee to stuff register args the stack.
a61af66fc99e Initial load
duke
parents:
diff changeset
1055 stk_args += 2;
a61af66fc99e Initial load
duke
parents:
diff changeset
1056 #endif
a61af66fc99e Initial load
duke
parents:
diff changeset
1057 } else {
a61af66fc99e Initial load
duke
parents:
diff changeset
1058 regs[i].set2(VMRegImpl::stack2reg(stk_args));
a61af66fc99e Initial load
duke
parents:
diff changeset
1059 stk_args += 2;
a61af66fc99e Initial load
duke
parents:
diff changeset
1060 }
a61af66fc99e Initial load
duke
parents:
diff changeset
1061 break;
a61af66fc99e Initial load
duke
parents:
diff changeset
1062 case T_VOID: // Halves of longs and doubles
a61af66fc99e Initial load
duke
parents:
diff changeset
1063 assert(i != 0 && (sig_bt[i - 1] == T_LONG || sig_bt[i - 1] == T_DOUBLE), "expecting half");
a61af66fc99e Initial load
duke
parents:
diff changeset
1064 regs[i].set_bad();
a61af66fc99e Initial load
duke
parents:
diff changeset
1065 break;
a61af66fc99e Initial load
duke
parents:
diff changeset
1066 default:
a61af66fc99e Initial load
duke
parents:
diff changeset
1067 ShouldNotReachHere();
a61af66fc99e Initial load
duke
parents:
diff changeset
1068 break;
a61af66fc99e Initial load
duke
parents:
diff changeset
1069 }
a61af66fc99e Initial load
duke
parents:
diff changeset
1070 }
a61af66fc99e Initial load
duke
parents:
diff changeset
1071 #ifdef _WIN64
a61af66fc99e Initial load
duke
parents:
diff changeset
1072 // windows abi requires that we always allocate enough stack space
a61af66fc99e Initial load
duke
parents:
diff changeset
1073 // for 4 64bit registers to be stored down.
a61af66fc99e Initial load
duke
parents:
diff changeset
1074 if (stk_args < 8) {
a61af66fc99e Initial load
duke
parents:
diff changeset
1075 stk_args = 8;
a61af66fc99e Initial load
duke
parents:
diff changeset
1076 }
a61af66fc99e Initial load
duke
parents:
diff changeset
1077 #endif // _WIN64
a61af66fc99e Initial load
duke
parents:
diff changeset
1078
a61af66fc99e Initial load
duke
parents:
diff changeset
1079 return stk_args;
a61af66fc99e Initial load
duke
parents:
diff changeset
1080 }
a61af66fc99e Initial load
duke
parents:
diff changeset
1081
a61af66fc99e Initial load
duke
parents:
diff changeset
1082 // On 64 bit we will store integer like items to the stack as
a61af66fc99e Initial load
duke
parents:
diff changeset
1083 // 64 bits items (sparc abi) even though java would only store
a61af66fc99e Initial load
duke
parents:
diff changeset
1084 // 32bits for a parameter. On 32bit it will simply be 32 bits
a61af66fc99e Initial load
duke
parents:
diff changeset
1085 // So this routine will do 32->32 on 32bit and 32->64 on 64bit
a61af66fc99e Initial load
duke
parents:
diff changeset
1086 static void move32_64(MacroAssembler* masm, VMRegPair src, VMRegPair dst) {
a61af66fc99e Initial load
duke
parents:
diff changeset
1087 if (src.first()->is_stack()) {
a61af66fc99e Initial load
duke
parents:
diff changeset
1088 if (dst.first()->is_stack()) {
a61af66fc99e Initial load
duke
parents:
diff changeset
1089 // stack to stack
a61af66fc99e Initial load
duke
parents:
diff changeset
1090 __ movslq(rax, Address(rbp, reg2offset_in(src.first())));
a61af66fc99e Initial load
duke
parents:
diff changeset
1091 __ movq(Address(rsp, reg2offset_out(dst.first())), rax);
a61af66fc99e Initial load
duke
parents:
diff changeset
1092 } else {
a61af66fc99e Initial load
duke
parents:
diff changeset
1093 // stack to reg
a61af66fc99e Initial load
duke
parents:
diff changeset
1094 __ movslq(dst.first()->as_Register(), Address(rbp, reg2offset_in(src.first())));
a61af66fc99e Initial load
duke
parents:
diff changeset
1095 }
a61af66fc99e Initial load
duke
parents:
diff changeset
1096 } else if (dst.first()->is_stack()) {
a61af66fc99e Initial load
duke
parents:
diff changeset
1097 // reg to stack
a61af66fc99e Initial load
duke
parents:
diff changeset
1098 // Do we really have to sign extend???
a61af66fc99e Initial load
duke
parents:
diff changeset
1099 // __ movslq(src.first()->as_Register(), src.first()->as_Register());
a61af66fc99e Initial load
duke
parents:
diff changeset
1100 __ movq(Address(rsp, reg2offset_out(dst.first())), src.first()->as_Register());
a61af66fc99e Initial load
duke
parents:
diff changeset
1101 } else {
a61af66fc99e Initial load
duke
parents:
diff changeset
1102 // Do we really have to sign extend???
a61af66fc99e Initial load
duke
parents:
diff changeset
1103 // __ movslq(dst.first()->as_Register(), src.first()->as_Register());
a61af66fc99e Initial load
duke
parents:
diff changeset
1104 if (dst.first() != src.first()) {
a61af66fc99e Initial load
duke
parents:
diff changeset
1105 __ movq(dst.first()->as_Register(), src.first()->as_Register());
a61af66fc99e Initial load
duke
parents:
diff changeset
1106 }
a61af66fc99e Initial load
duke
parents:
diff changeset
1107 }
a61af66fc99e Initial load
duke
parents:
diff changeset
1108 }
a61af66fc99e Initial load
duke
parents:
diff changeset
1109
4873
0382d2b469b2 7013347: allow crypto functions to be called inline to enhance performance
never
parents: 4057
diff changeset
1110 static void move_ptr(MacroAssembler* masm, VMRegPair src, VMRegPair dst) {
0382d2b469b2 7013347: allow crypto functions to be called inline to enhance performance
never
parents: 4057
diff changeset
1111 if (src.first()->is_stack()) {
0382d2b469b2 7013347: allow crypto functions to be called inline to enhance performance
never
parents: 4057
diff changeset
1112 if (dst.first()->is_stack()) {
0382d2b469b2 7013347: allow crypto functions to be called inline to enhance performance
never
parents: 4057
diff changeset
1113 // stack to stack
0382d2b469b2 7013347: allow crypto functions to be called inline to enhance performance
never
parents: 4057
diff changeset
1114 __ movq(rax, Address(rbp, reg2offset_in(src.first())));
0382d2b469b2 7013347: allow crypto functions to be called inline to enhance performance
never
parents: 4057
diff changeset
1115 __ movq(Address(rsp, reg2offset_out(dst.first())), rax);
0382d2b469b2 7013347: allow crypto functions to be called inline to enhance performance
never
parents: 4057
diff changeset
1116 } else {
0382d2b469b2 7013347: allow crypto functions to be called inline to enhance performance
never
parents: 4057
diff changeset
1117 // stack to reg
0382d2b469b2 7013347: allow crypto functions to be called inline to enhance performance
never
parents: 4057
diff changeset
1118 __ movq(dst.first()->as_Register(), Address(rbp, reg2offset_in(src.first())));
0382d2b469b2 7013347: allow crypto functions to be called inline to enhance performance
never
parents: 4057
diff changeset
1119 }
0382d2b469b2 7013347: allow crypto functions to be called inline to enhance performance
never
parents: 4057
diff changeset
1120 } else if (dst.first()->is_stack()) {
0382d2b469b2 7013347: allow crypto functions to be called inline to enhance performance
never
parents: 4057
diff changeset
1121 // reg to stack
0382d2b469b2 7013347: allow crypto functions to be called inline to enhance performance
never
parents: 4057
diff changeset
1122 __ movq(Address(rsp, reg2offset_out(dst.first())), src.first()->as_Register());
0382d2b469b2 7013347: allow crypto functions to be called inline to enhance performance
never
parents: 4057
diff changeset
1123 } else {
0382d2b469b2 7013347: allow crypto functions to be called inline to enhance performance
never
parents: 4057
diff changeset
1124 if (dst.first() != src.first()) {
0382d2b469b2 7013347: allow crypto functions to be called inline to enhance performance
never
parents: 4057
diff changeset
1125 __ movq(dst.first()->as_Register(), src.first()->as_Register());
0382d2b469b2 7013347: allow crypto functions to be called inline to enhance performance
never
parents: 4057
diff changeset
1126 }
0382d2b469b2 7013347: allow crypto functions to be called inline to enhance performance
never
parents: 4057
diff changeset
1127 }
0382d2b469b2 7013347: allow crypto functions to be called inline to enhance performance
never
parents: 4057
diff changeset
1128 }
0
a61af66fc99e Initial load
duke
parents:
diff changeset
1129
a61af66fc99e Initial load
duke
parents:
diff changeset
1130 // An oop arg. Must pass a handle not the oop itself
a61af66fc99e Initial load
duke
parents:
diff changeset
1131 static void object_move(MacroAssembler* masm,
a61af66fc99e Initial load
duke
parents:
diff changeset
1132 OopMap* map,
a61af66fc99e Initial load
duke
parents:
diff changeset
1133 int oop_handle_offset,
a61af66fc99e Initial load
duke
parents:
diff changeset
1134 int framesize_in_slots,
a61af66fc99e Initial load
duke
parents:
diff changeset
1135 VMRegPair src,
a61af66fc99e Initial load
duke
parents:
diff changeset
1136 VMRegPair dst,
a61af66fc99e Initial load
duke
parents:
diff changeset
1137 bool is_receiver,
a61af66fc99e Initial load
duke
parents:
diff changeset
1138 int* receiver_offset) {
a61af66fc99e Initial load
duke
parents:
diff changeset
1139
a61af66fc99e Initial load
duke
parents:
diff changeset
1140 // must pass a handle. First figure out the location we use as a handle
a61af66fc99e Initial load
duke
parents:
diff changeset
1141
a61af66fc99e Initial load
duke
parents:
diff changeset
1142 Register rHandle = dst.first()->is_stack() ? rax : dst.first()->as_Register();
a61af66fc99e Initial load
duke
parents:
diff changeset
1143
a61af66fc99e Initial load
duke
parents:
diff changeset
1144 // See if oop is NULL if it is we need no handle
a61af66fc99e Initial load
duke
parents:
diff changeset
1145
a61af66fc99e Initial load
duke
parents:
diff changeset
1146 if (src.first()->is_stack()) {
a61af66fc99e Initial load
duke
parents:
diff changeset
1147
a61af66fc99e Initial load
duke
parents:
diff changeset
1148 // Oop is already on the stack as an argument
a61af66fc99e Initial load
duke
parents:
diff changeset
1149 int offset_in_older_frame = src.first()->reg2stack() + SharedRuntime::out_preserve_stack_slots();
a61af66fc99e Initial load
duke
parents:
diff changeset
1150 map->set_oop(VMRegImpl::stack2reg(offset_in_older_frame + framesize_in_slots));
a61af66fc99e Initial load
duke
parents:
diff changeset
1151 if (is_receiver) {
a61af66fc99e Initial load
duke
parents:
diff changeset
1152 *receiver_offset = (offset_in_older_frame + framesize_in_slots) * VMRegImpl::stack_slot_size;
a61af66fc99e Initial load
duke
parents:
diff changeset
1153 }
a61af66fc99e Initial load
duke
parents:
diff changeset
1154
304
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 196
diff changeset
1155 __ cmpptr(Address(rbp, reg2offset_in(src.first())), (int32_t)NULL_WORD);
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 196
diff changeset
1156 __ lea(rHandle, Address(rbp, reg2offset_in(src.first())));
0
a61af66fc99e Initial load
duke
parents:
diff changeset
1157 // conditionally move a NULL
304
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 196
diff changeset
1158 __ cmovptr(Assembler::equal, rHandle, Address(rbp, reg2offset_in(src.first())));
0
a61af66fc99e Initial load
duke
parents:
diff changeset
1159 } else {
a61af66fc99e Initial load
duke
parents:
diff changeset
1160
a61af66fc99e Initial load
duke
parents:
diff changeset
1161 // Oop is in an a register we must store it to the space we reserve
a61af66fc99e Initial load
duke
parents:
diff changeset
1162 // on the stack for oop_handles and pass a handle if oop is non-NULL
a61af66fc99e Initial load
duke
parents:
diff changeset
1163
a61af66fc99e Initial load
duke
parents:
diff changeset
1164 const Register rOop = src.first()->as_Register();
a61af66fc99e Initial load
duke
parents:
diff changeset
1165 int oop_slot;
a61af66fc99e Initial load
duke
parents:
diff changeset
1166 if (rOop == j_rarg0)
a61af66fc99e Initial load
duke
parents:
diff changeset
1167 oop_slot = 0;
a61af66fc99e Initial load
duke
parents:
diff changeset
1168 else if (rOop == j_rarg1)
a61af66fc99e Initial load
duke
parents:
diff changeset
1169 oop_slot = 1;
a61af66fc99e Initial load
duke
parents:
diff changeset
1170 else if (rOop == j_rarg2)
a61af66fc99e Initial load
duke
parents:
diff changeset
1171 oop_slot = 2;
a61af66fc99e Initial load
duke
parents:
diff changeset
1172 else if (rOop == j_rarg3)
a61af66fc99e Initial load
duke
parents:
diff changeset
1173 oop_slot = 3;
a61af66fc99e Initial load
duke
parents:
diff changeset
1174 else if (rOop == j_rarg4)
a61af66fc99e Initial load
duke
parents:
diff changeset
1175 oop_slot = 4;
a61af66fc99e Initial load
duke
parents:
diff changeset
1176 else {
a61af66fc99e Initial load
duke
parents:
diff changeset
1177 assert(rOop == j_rarg5, "wrong register");
a61af66fc99e Initial load
duke
parents:
diff changeset
1178 oop_slot = 5;
a61af66fc99e Initial load
duke
parents:
diff changeset
1179 }
a61af66fc99e Initial load
duke
parents:
diff changeset
1180
a61af66fc99e Initial load
duke
parents:
diff changeset
1181 oop_slot = oop_slot * VMRegImpl::slots_per_word + oop_handle_offset;
a61af66fc99e Initial load
duke
parents:
diff changeset
1182 int offset = oop_slot*VMRegImpl::stack_slot_size;
a61af66fc99e Initial load
duke
parents:
diff changeset
1183
a61af66fc99e Initial load
duke
parents:
diff changeset
1184 map->set_oop(VMRegImpl::stack2reg(oop_slot));
a61af66fc99e Initial load
duke
parents:
diff changeset
1185 // Store oop in handle area, may be NULL
304
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 196
diff changeset
1186 __ movptr(Address(rsp, offset), rOop);
0
a61af66fc99e Initial load
duke
parents:
diff changeset
1187 if (is_receiver) {
a61af66fc99e Initial load
duke
parents:
diff changeset
1188 *receiver_offset = offset;
a61af66fc99e Initial load
duke
parents:
diff changeset
1189 }
a61af66fc99e Initial load
duke
parents:
diff changeset
1190
304
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 196
diff changeset
1191 __ cmpptr(rOop, (int32_t)NULL_WORD);
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 196
diff changeset
1192 __ lea(rHandle, Address(rsp, offset));
0
a61af66fc99e Initial load
duke
parents:
diff changeset
1193 // conditionally move a NULL from the handle area where it was just stored
304
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 196
diff changeset
1194 __ cmovptr(Assembler::equal, rHandle, Address(rsp, offset));
0
a61af66fc99e Initial load
duke
parents:
diff changeset
1195 }
a61af66fc99e Initial load
duke
parents:
diff changeset
1196
a61af66fc99e Initial load
duke
parents:
diff changeset
1197 // If arg is on the stack then place it otherwise it is already in correct reg.
a61af66fc99e Initial load
duke
parents:
diff changeset
1198 if (dst.first()->is_stack()) {
304
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 196
diff changeset
1199 __ movptr(Address(rsp, reg2offset_out(dst.first())), rHandle);
0
a61af66fc99e Initial load
duke
parents:
diff changeset
1200 }
a61af66fc99e Initial load
duke
parents:
diff changeset
1201 }
a61af66fc99e Initial load
duke
parents:
diff changeset
1202
a61af66fc99e Initial load
duke
parents:
diff changeset
1203 // A float arg may have to do float reg int reg conversion
a61af66fc99e Initial load
duke
parents:
diff changeset
1204 static void float_move(MacroAssembler* masm, VMRegPair src, VMRegPair dst) {
a61af66fc99e Initial load
duke
parents:
diff changeset
1205 assert(!src.second()->is_valid() && !dst.second()->is_valid(), "bad float_move");
a61af66fc99e Initial load
duke
parents:
diff changeset
1206
a61af66fc99e Initial load
duke
parents:
diff changeset
1207 // The calling conventions assures us that each VMregpair is either
a61af66fc99e Initial load
duke
parents:
diff changeset
1208 // all really one physical register or adjacent stack slots.
a61af66fc99e Initial load
duke
parents:
diff changeset
1209 // This greatly simplifies the cases here compared to sparc.
a61af66fc99e Initial load
duke
parents:
diff changeset
1210
a61af66fc99e Initial load
duke
parents:
diff changeset
1211 if (src.first()->is_stack()) {
a61af66fc99e Initial load
duke
parents:
diff changeset
1212 if (dst.first()->is_stack()) {
a61af66fc99e Initial load
duke
parents:
diff changeset
1213 __ movl(rax, Address(rbp, reg2offset_in(src.first())));
304
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 196
diff changeset
1214 __ movptr(Address(rsp, reg2offset_out(dst.first())), rax);
0
a61af66fc99e Initial load
duke
parents:
diff changeset
1215 } else {
a61af66fc99e Initial load
duke
parents:
diff changeset
1216 // stack to reg
a61af66fc99e Initial load
duke
parents:
diff changeset
1217 assert(dst.first()->is_XMMRegister(), "only expect xmm registers as parameters");
a61af66fc99e Initial load
duke
parents:
diff changeset
1218 __ movflt(dst.first()->as_XMMRegister(), Address(rbp, reg2offset_in(src.first())));
a61af66fc99e Initial load
duke
parents:
diff changeset
1219 }
a61af66fc99e Initial load
duke
parents:
diff changeset
1220 } else if (dst.first()->is_stack()) {
a61af66fc99e Initial load
duke
parents:
diff changeset
1221 // reg to stack
a61af66fc99e Initial load
duke
parents:
diff changeset
1222 assert(src.first()->is_XMMRegister(), "only expect xmm registers as parameters");
a61af66fc99e Initial load
duke
parents:
diff changeset
1223 __ movflt(Address(rsp, reg2offset_out(dst.first())), src.first()->as_XMMRegister());
a61af66fc99e Initial load
duke
parents:
diff changeset
1224 } else {
a61af66fc99e Initial load
duke
parents:
diff changeset
1225 // reg to reg
a61af66fc99e Initial load
duke
parents:
diff changeset
1226 // In theory these overlap but the ordering is such that this is likely a nop
a61af66fc99e Initial load
duke
parents:
diff changeset
1227 if ( src.first() != dst.first()) {
a61af66fc99e Initial load
duke
parents:
diff changeset
1228 __ movdbl(dst.first()->as_XMMRegister(), src.first()->as_XMMRegister());
a61af66fc99e Initial load
duke
parents:
diff changeset
1229 }
a61af66fc99e Initial load
duke
parents:
diff changeset
1230 }
a61af66fc99e Initial load
duke
parents:
diff changeset
1231 }
a61af66fc99e Initial load
duke
parents:
diff changeset
1232
a61af66fc99e Initial load
duke
parents:
diff changeset
1233 // A long move
a61af66fc99e Initial load
duke
parents:
diff changeset
1234 static void long_move(MacroAssembler* masm, VMRegPair src, VMRegPair dst) {
a61af66fc99e Initial load
duke
parents:
diff changeset
1235
a61af66fc99e Initial load
duke
parents:
diff changeset
1236 // The calling conventions assures us that each VMregpair is either
a61af66fc99e Initial load
duke
parents:
diff changeset
1237 // all really one physical register or adjacent stack slots.
a61af66fc99e Initial load
duke
parents:
diff changeset
1238 // This greatly simplifies the cases here compared to sparc.
a61af66fc99e Initial load
duke
parents:
diff changeset
1239
a61af66fc99e Initial load
duke
parents:
diff changeset
1240 if (src.is_single_phys_reg() ) {
a61af66fc99e Initial load
duke
parents:
diff changeset
1241 if (dst.is_single_phys_reg()) {
a61af66fc99e Initial load
duke
parents:
diff changeset
1242 if (dst.first() != src.first()) {
304
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 196
diff changeset
1243 __ mov(dst.first()->as_Register(), src.first()->as_Register());
0
a61af66fc99e Initial load
duke
parents:
diff changeset
1244 }
a61af66fc99e Initial load
duke
parents:
diff changeset
1245 } else {
a61af66fc99e Initial load
duke
parents:
diff changeset
1246 assert(dst.is_single_reg(), "not a stack pair");
a61af66fc99e Initial load
duke
parents:
diff changeset
1247 __ movq(Address(rsp, reg2offset_out(dst.first())), src.first()->as_Register());
a61af66fc99e Initial load
duke
parents:
diff changeset
1248 }
a61af66fc99e Initial load
duke
parents:
diff changeset
1249 } else if (dst.is_single_phys_reg()) {
a61af66fc99e Initial load
duke
parents:
diff changeset
1250 assert(src.is_single_reg(), "not a stack pair");
a61af66fc99e Initial load
duke
parents:
diff changeset
1251 __ movq(dst.first()->as_Register(), Address(rbp, reg2offset_out(src.first())));
a61af66fc99e Initial load
duke
parents:
diff changeset
1252 } else {
a61af66fc99e Initial load
duke
parents:
diff changeset
1253 assert(src.is_single_reg() && dst.is_single_reg(), "not stack pairs");
a61af66fc99e Initial load
duke
parents:
diff changeset
1254 __ movq(rax, Address(rbp, reg2offset_in(src.first())));
a61af66fc99e Initial load
duke
parents:
diff changeset
1255 __ movq(Address(rsp, reg2offset_out(dst.first())), rax);
a61af66fc99e Initial load
duke
parents:
diff changeset
1256 }
a61af66fc99e Initial load
duke
parents:
diff changeset
1257 }
a61af66fc99e Initial load
duke
parents:
diff changeset
1258
a61af66fc99e Initial load
duke
parents:
diff changeset
1259 // A double move
a61af66fc99e Initial load
duke
parents:
diff changeset
1260 static void double_move(MacroAssembler* masm, VMRegPair src, VMRegPair dst) {
a61af66fc99e Initial load
duke
parents:
diff changeset
1261
a61af66fc99e Initial load
duke
parents:
diff changeset
1262 // The calling conventions assures us that each VMregpair is either
a61af66fc99e Initial load
duke
parents:
diff changeset
1263 // all really one physical register or adjacent stack slots.
a61af66fc99e Initial load
duke
parents:
diff changeset
1264 // This greatly simplifies the cases here compared to sparc.
a61af66fc99e Initial load
duke
parents:
diff changeset
1265
a61af66fc99e Initial load
duke
parents:
diff changeset
1266 if (src.is_single_phys_reg() ) {
a61af66fc99e Initial load
duke
parents:
diff changeset
1267 if (dst.is_single_phys_reg()) {
a61af66fc99e Initial load
duke
parents:
diff changeset
1268 // In theory these overlap but the ordering is such that this is likely a nop
a61af66fc99e Initial load
duke
parents:
diff changeset
1269 if ( src.first() != dst.first()) {
a61af66fc99e Initial load
duke
parents:
diff changeset
1270 __ movdbl(dst.first()->as_XMMRegister(), src.first()->as_XMMRegister());
a61af66fc99e Initial load
duke
parents:
diff changeset
1271 }
a61af66fc99e Initial load
duke
parents:
diff changeset
1272 } else {
a61af66fc99e Initial load
duke
parents:
diff changeset
1273 assert(dst.is_single_reg(), "not a stack pair");
a61af66fc99e Initial load
duke
parents:
diff changeset
1274 __ movdbl(Address(rsp, reg2offset_out(dst.first())), src.first()->as_XMMRegister());
a61af66fc99e Initial load
duke
parents:
diff changeset
1275 }
a61af66fc99e Initial load
duke
parents:
diff changeset
1276 } else if (dst.is_single_phys_reg()) {
a61af66fc99e Initial load
duke
parents:
diff changeset
1277 assert(src.is_single_reg(), "not a stack pair");
a61af66fc99e Initial load
duke
parents:
diff changeset
1278 __ movdbl(dst.first()->as_XMMRegister(), Address(rbp, reg2offset_out(src.first())));
a61af66fc99e Initial load
duke
parents:
diff changeset
1279 } else {
a61af66fc99e Initial load
duke
parents:
diff changeset
1280 assert(src.is_single_reg() && dst.is_single_reg(), "not stack pairs");
a61af66fc99e Initial load
duke
parents:
diff changeset
1281 __ movq(rax, Address(rbp, reg2offset_in(src.first())));
a61af66fc99e Initial load
duke
parents:
diff changeset
1282 __ movq(Address(rsp, reg2offset_out(dst.first())), rax);
a61af66fc99e Initial load
duke
parents:
diff changeset
1283 }
a61af66fc99e Initial load
duke
parents:
diff changeset
1284 }
a61af66fc99e Initial load
duke
parents:
diff changeset
1285
a61af66fc99e Initial load
duke
parents:
diff changeset
1286
a61af66fc99e Initial load
duke
parents:
diff changeset
1287 void SharedRuntime::save_native_result(MacroAssembler *masm, BasicType ret_type, int frame_slots) {
a61af66fc99e Initial load
duke
parents:
diff changeset
1288 // We always ignore the frame_slots arg and just use the space just below frame pointer
a61af66fc99e Initial load
duke
parents:
diff changeset
1289 // which by this time is free to use
a61af66fc99e Initial load
duke
parents:
diff changeset
1290 switch (ret_type) {
a61af66fc99e Initial load
duke
parents:
diff changeset
1291 case T_FLOAT:
a61af66fc99e Initial load
duke
parents:
diff changeset
1292 __ movflt(Address(rbp, -wordSize), xmm0);
a61af66fc99e Initial load
duke
parents:
diff changeset
1293 break;
a61af66fc99e Initial load
duke
parents:
diff changeset
1294 case T_DOUBLE:
a61af66fc99e Initial load
duke
parents:
diff changeset
1295 __ movdbl(Address(rbp, -wordSize), xmm0);
a61af66fc99e Initial load
duke
parents:
diff changeset
1296 break;
a61af66fc99e Initial load
duke
parents:
diff changeset
1297 case T_VOID: break;
a61af66fc99e Initial load
duke
parents:
diff changeset
1298 default: {
304
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 196
diff changeset
1299 __ movptr(Address(rbp, -wordSize), rax);
0
a61af66fc99e Initial load
duke
parents:
diff changeset
1300 }
a61af66fc99e Initial load
duke
parents:
diff changeset
1301 }
a61af66fc99e Initial load
duke
parents:
diff changeset
1302 }
a61af66fc99e Initial load
duke
parents:
diff changeset
1303
a61af66fc99e Initial load
duke
parents:
diff changeset
1304 void SharedRuntime::restore_native_result(MacroAssembler *masm, BasicType ret_type, int frame_slots) {
a61af66fc99e Initial load
duke
parents:
diff changeset
1305 // We always ignore the frame_slots arg and just use the space just below frame pointer
a61af66fc99e Initial load
duke
parents:
diff changeset
1306 // which by this time is free to use
a61af66fc99e Initial load
duke
parents:
diff changeset
1307 switch (ret_type) {
a61af66fc99e Initial load
duke
parents:
diff changeset
1308 case T_FLOAT:
a61af66fc99e Initial load
duke
parents:
diff changeset
1309 __ movflt(xmm0, Address(rbp, -wordSize));
a61af66fc99e Initial load
duke
parents:
diff changeset
1310 break;
a61af66fc99e Initial load
duke
parents:
diff changeset
1311 case T_DOUBLE:
a61af66fc99e Initial load
duke
parents:
diff changeset
1312 __ movdbl(xmm0, Address(rbp, -wordSize));
a61af66fc99e Initial load
duke
parents:
diff changeset
1313 break;
a61af66fc99e Initial load
duke
parents:
diff changeset
1314 case T_VOID: break;
a61af66fc99e Initial load
duke
parents:
diff changeset
1315 default: {
304
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 196
diff changeset
1316 __ movptr(rax, Address(rbp, -wordSize));
0
a61af66fc99e Initial load
duke
parents:
diff changeset
1317 }
a61af66fc99e Initial load
duke
parents:
diff changeset
1318 }
a61af66fc99e Initial load
duke
parents:
diff changeset
1319 }
a61af66fc99e Initial load
duke
parents:
diff changeset
1320
a61af66fc99e Initial load
duke
parents:
diff changeset
1321 static void save_args(MacroAssembler *masm, int arg_count, int first_arg, VMRegPair *args) {
a61af66fc99e Initial load
duke
parents:
diff changeset
1322 for ( int i = first_arg ; i < arg_count ; i++ ) {
a61af66fc99e Initial load
duke
parents:
diff changeset
1323 if (args[i].first()->is_Register()) {
304
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 196
diff changeset
1324 __ push(args[i].first()->as_Register());
0
a61af66fc99e Initial load
duke
parents:
diff changeset
1325 } else if (args[i].first()->is_XMMRegister()) {
304
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 196
diff changeset
1326 __ subptr(rsp, 2*wordSize);
0
a61af66fc99e Initial load
duke
parents:
diff changeset
1327 __ movdbl(Address(rsp, 0), args[i].first()->as_XMMRegister());
a61af66fc99e Initial load
duke
parents:
diff changeset
1328 }
a61af66fc99e Initial load
duke
parents:
diff changeset
1329 }
a61af66fc99e Initial load
duke
parents:
diff changeset
1330 }
a61af66fc99e Initial load
duke
parents:
diff changeset
1331
a61af66fc99e Initial load
duke
parents:
diff changeset
1332 static void restore_args(MacroAssembler *masm, int arg_count, int first_arg, VMRegPair *args) {
a61af66fc99e Initial load
duke
parents:
diff changeset
1333 for ( int i = arg_count - 1 ; i >= first_arg ; i-- ) {
a61af66fc99e Initial load
duke
parents:
diff changeset
1334 if (args[i].first()->is_Register()) {
304
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 196
diff changeset
1335 __ pop(args[i].first()->as_Register());
0
a61af66fc99e Initial load
duke
parents:
diff changeset
1336 } else if (args[i].first()->is_XMMRegister()) {
a61af66fc99e Initial load
duke
parents:
diff changeset
1337 __ movdbl(args[i].first()->as_XMMRegister(), Address(rsp, 0));
304
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 196
diff changeset
1338 __ addptr(rsp, 2*wordSize);
0
a61af66fc99e Initial load
duke
parents:
diff changeset
1339 }
a61af66fc99e Initial load
duke
parents:
diff changeset
1340 }
a61af66fc99e Initial load
duke
parents:
diff changeset
1341 }
a61af66fc99e Initial load
duke
parents:
diff changeset
1342
4873
0382d2b469b2 7013347: allow crypto functions to be called inline to enhance performance
never
parents: 4057
diff changeset
1343
0382d2b469b2 7013347: allow crypto functions to be called inline to enhance performance
never
parents: 4057
diff changeset
1344 static void save_or_restore_arguments(MacroAssembler* masm,
0382d2b469b2 7013347: allow crypto functions to be called inline to enhance performance
never
parents: 4057
diff changeset
1345 const int stack_slots,
0382d2b469b2 7013347: allow crypto functions to be called inline to enhance performance
never
parents: 4057
diff changeset
1346 const int total_in_args,
0382d2b469b2 7013347: allow crypto functions to be called inline to enhance performance
never
parents: 4057
diff changeset
1347 const int arg_save_area,
0382d2b469b2 7013347: allow crypto functions to be called inline to enhance performance
never
parents: 4057
diff changeset
1348 OopMap* map,
0382d2b469b2 7013347: allow crypto functions to be called inline to enhance performance
never
parents: 4057
diff changeset
1349 VMRegPair* in_regs,
0382d2b469b2 7013347: allow crypto functions to be called inline to enhance performance
never
parents: 4057
diff changeset
1350 BasicType* in_sig_bt) {
0382d2b469b2 7013347: allow crypto functions to be called inline to enhance performance
never
parents: 4057
diff changeset
1351 // if map is non-NULL then the code should store the values,
0382d2b469b2 7013347: allow crypto functions to be called inline to enhance performance
never
parents: 4057
diff changeset
1352 // otherwise it should load them.
5905
2ee7dcc77c63 7145024: Crashes in ucrypto related to C2
never
parents: 5904
diff changeset
1353 int slot = arg_save_area;
4873
0382d2b469b2 7013347: allow crypto functions to be called inline to enhance performance
never
parents: 4057
diff changeset
1354 // Save down double word first
0382d2b469b2 7013347: allow crypto functions to be called inline to enhance performance
never
parents: 4057
diff changeset
1355 for ( int i = 0; i < total_in_args; i++) {
0382d2b469b2 7013347: allow crypto functions to be called inline to enhance performance
never
parents: 4057
diff changeset
1356 if (in_regs[i].first()->is_XMMRegister() && in_sig_bt[i] == T_DOUBLE) {
0382d2b469b2 7013347: allow crypto functions to be called inline to enhance performance
never
parents: 4057
diff changeset
1357 int offset = slot * VMRegImpl::stack_slot_size;
5905
2ee7dcc77c63 7145024: Crashes in ucrypto related to C2
never
parents: 5904
diff changeset
1358 slot += VMRegImpl::slots_per_word;
2ee7dcc77c63 7145024: Crashes in ucrypto related to C2
never
parents: 5904
diff changeset
1359 assert(slot <= stack_slots, "overflow");
4873
0382d2b469b2 7013347: allow crypto functions to be called inline to enhance performance
never
parents: 4057
diff changeset
1360 if (map != NULL) {
0382d2b469b2 7013347: allow crypto functions to be called inline to enhance performance
never
parents: 4057
diff changeset
1361 __ movdbl(Address(rsp, offset), in_regs[i].first()->as_XMMRegister());
0382d2b469b2 7013347: allow crypto functions to be called inline to enhance performance
never
parents: 4057
diff changeset
1362 } else {
0382d2b469b2 7013347: allow crypto functions to be called inline to enhance performance
never
parents: 4057
diff changeset
1363 __ movdbl(in_regs[i].first()->as_XMMRegister(), Address(rsp, offset));
0382d2b469b2 7013347: allow crypto functions to be called inline to enhance performance
never
parents: 4057
diff changeset
1364 }
0382d2b469b2 7013347: allow crypto functions to be called inline to enhance performance
never
parents: 4057
diff changeset
1365 }
0382d2b469b2 7013347: allow crypto functions to be called inline to enhance performance
never
parents: 4057
diff changeset
1366 if (in_regs[i].first()->is_Register() &&
0382d2b469b2 7013347: allow crypto functions to be called inline to enhance performance
never
parents: 4057
diff changeset
1367 (in_sig_bt[i] == T_LONG || in_sig_bt[i] == T_ARRAY)) {
0382d2b469b2 7013347: allow crypto functions to be called inline to enhance performance
never
parents: 4057
diff changeset
1368 int offset = slot * VMRegImpl::stack_slot_size;
0382d2b469b2 7013347: allow crypto functions to be called inline to enhance performance
never
parents: 4057
diff changeset
1369 if (map != NULL) {
0382d2b469b2 7013347: allow crypto functions to be called inline to enhance performance
never
parents: 4057
diff changeset
1370 __ movq(Address(rsp, offset), in_regs[i].first()->as_Register());
0382d2b469b2 7013347: allow crypto functions to be called inline to enhance performance
never
parents: 4057
diff changeset
1371 if (in_sig_bt[i] == T_ARRAY) {
0382d2b469b2 7013347: allow crypto functions to be called inline to enhance performance
never
parents: 4057
diff changeset
1372 map->set_oop(VMRegImpl::stack2reg(slot));;
0382d2b469b2 7013347: allow crypto functions to be called inline to enhance performance
never
parents: 4057
diff changeset
1373 }
0382d2b469b2 7013347: allow crypto functions to be called inline to enhance performance
never
parents: 4057
diff changeset
1374 } else {
0382d2b469b2 7013347: allow crypto functions to be called inline to enhance performance
never
parents: 4057
diff changeset
1375 __ movq(in_regs[i].first()->as_Register(), Address(rsp, offset));
0382d2b469b2 7013347: allow crypto functions to be called inline to enhance performance
never
parents: 4057
diff changeset
1376 }
5907
031df0387c09 7150051: incorrect oopmap in critical native
never
parents: 5905
diff changeset
1377 slot += VMRegImpl::slots_per_word;
4873
0382d2b469b2 7013347: allow crypto functions to be called inline to enhance performance
never
parents: 4057
diff changeset
1378 }
0382d2b469b2 7013347: allow crypto functions to be called inline to enhance performance
never
parents: 4057
diff changeset
1379 }
0382d2b469b2 7013347: allow crypto functions to be called inline to enhance performance
never
parents: 4057
diff changeset
1380 // Save or restore single word registers
0382d2b469b2 7013347: allow crypto functions to be called inline to enhance performance
never
parents: 4057
diff changeset
1381 for ( int i = 0; i < total_in_args; i++) {
0382d2b469b2 7013347: allow crypto functions to be called inline to enhance performance
never
parents: 4057
diff changeset
1382 if (in_regs[i].first()->is_Register()) {
0382d2b469b2 7013347: allow crypto functions to be called inline to enhance performance
never
parents: 4057
diff changeset
1383 int offset = slot * VMRegImpl::stack_slot_size;
5905
2ee7dcc77c63 7145024: Crashes in ucrypto related to C2
never
parents: 5904
diff changeset
1384 slot++;
2ee7dcc77c63 7145024: Crashes in ucrypto related to C2
never
parents: 5904
diff changeset
1385 assert(slot <= stack_slots, "overflow");
4873
0382d2b469b2 7013347: allow crypto functions to be called inline to enhance performance
never
parents: 4057
diff changeset
1386
0382d2b469b2 7013347: allow crypto functions to be called inline to enhance performance
never
parents: 4057
diff changeset
1387 // Value is in an input register pass we must flush it to the stack
0382d2b469b2 7013347: allow crypto functions to be called inline to enhance performance
never
parents: 4057
diff changeset
1388 const Register reg = in_regs[i].first()->as_Register();
0382d2b469b2 7013347: allow crypto functions to be called inline to enhance performance
never
parents: 4057
diff changeset
1389 switch (in_sig_bt[i]) {
0382d2b469b2 7013347: allow crypto functions to be called inline to enhance performance
never
parents: 4057
diff changeset
1390 case T_BOOLEAN:
0382d2b469b2 7013347: allow crypto functions to be called inline to enhance performance
never
parents: 4057
diff changeset
1391 case T_CHAR:
0382d2b469b2 7013347: allow crypto functions to be called inline to enhance performance
never
parents: 4057
diff changeset
1392 case T_BYTE:
0382d2b469b2 7013347: allow crypto functions to be called inline to enhance performance
never
parents: 4057
diff changeset
1393 case T_SHORT:
0382d2b469b2 7013347: allow crypto functions to be called inline to enhance performance
never
parents: 4057
diff changeset
1394 case T_INT:
0382d2b469b2 7013347: allow crypto functions to be called inline to enhance performance
never
parents: 4057
diff changeset
1395 if (map != NULL) {
0382d2b469b2 7013347: allow crypto functions to be called inline to enhance performance
never
parents: 4057
diff changeset
1396 __ movl(Address(rsp, offset), reg);
0382d2b469b2 7013347: allow crypto functions to be called inline to enhance performance
never
parents: 4057
diff changeset
1397 } else {
0382d2b469b2 7013347: allow crypto functions to be called inline to enhance performance
never
parents: 4057
diff changeset
1398 __ movl(reg, Address(rsp, offset));
0382d2b469b2 7013347: allow crypto functions to be called inline to enhance performance
never
parents: 4057
diff changeset
1399 }
0382d2b469b2 7013347: allow crypto functions to be called inline to enhance performance
never
parents: 4057
diff changeset
1400 break;
0382d2b469b2 7013347: allow crypto functions to be called inline to enhance performance
never
parents: 4057
diff changeset
1401 case T_ARRAY:
0382d2b469b2 7013347: allow crypto functions to be called inline to enhance performance
never
parents: 4057
diff changeset
1402 case T_LONG:
0382d2b469b2 7013347: allow crypto functions to be called inline to enhance performance
never
parents: 4057
diff changeset
1403 // handled above
0382d2b469b2 7013347: allow crypto functions to be called inline to enhance performance
never
parents: 4057
diff changeset
1404 break;
0382d2b469b2 7013347: allow crypto functions to be called inline to enhance performance
never
parents: 4057
diff changeset
1405 case T_OBJECT:
0382d2b469b2 7013347: allow crypto functions to be called inline to enhance performance
never
parents: 4057
diff changeset
1406 default: ShouldNotReachHere();
0382d2b469b2 7013347: allow crypto functions to be called inline to enhance performance
never
parents: 4057
diff changeset
1407 }
0382d2b469b2 7013347: allow crypto functions to be called inline to enhance performance
never
parents: 4057
diff changeset
1408 } else if (in_regs[i].first()->is_XMMRegister()) {
0382d2b469b2 7013347: allow crypto functions to be called inline to enhance performance
never
parents: 4057
diff changeset
1409 if (in_sig_bt[i] == T_FLOAT) {
0382d2b469b2 7013347: allow crypto functions to be called inline to enhance performance
never
parents: 4057
diff changeset
1410 int offset = slot * VMRegImpl::stack_slot_size;
5905
2ee7dcc77c63 7145024: Crashes in ucrypto related to C2
never
parents: 5904
diff changeset
1411 slot++;
2ee7dcc77c63 7145024: Crashes in ucrypto related to C2
never
parents: 5904
diff changeset
1412 assert(slot <= stack_slots, "overflow");
4873
0382d2b469b2 7013347: allow crypto functions to be called inline to enhance performance
never
parents: 4057
diff changeset
1413 if (map != NULL) {
0382d2b469b2 7013347: allow crypto functions to be called inline to enhance performance
never
parents: 4057
diff changeset
1414 __ movflt(Address(rsp, offset), in_regs[i].first()->as_XMMRegister());
0382d2b469b2 7013347: allow crypto functions to be called inline to enhance performance
never
parents: 4057
diff changeset
1415 } else {
0382d2b469b2 7013347: allow crypto functions to be called inline to enhance performance
never
parents: 4057
diff changeset
1416 __ movflt(in_regs[i].first()->as_XMMRegister(), Address(rsp, offset));
0382d2b469b2 7013347: allow crypto functions to be called inline to enhance performance
never
parents: 4057
diff changeset
1417 }
0382d2b469b2 7013347: allow crypto functions to be called inline to enhance performance
never
parents: 4057
diff changeset
1418 }
0382d2b469b2 7013347: allow crypto functions to be called inline to enhance performance
never
parents: 4057
diff changeset
1419 } else if (in_regs[i].first()->is_stack()) {
0382d2b469b2 7013347: allow crypto functions to be called inline to enhance performance
never
parents: 4057
diff changeset
1420 if (in_sig_bt[i] == T_ARRAY && map != NULL) {
0382d2b469b2 7013347: allow crypto functions to be called inline to enhance performance
never
parents: 4057
diff changeset
1421 int offset_in_older_frame = in_regs[i].first()->reg2stack() + SharedRuntime::out_preserve_stack_slots();
0382d2b469b2 7013347: allow crypto functions to be called inline to enhance performance
never
parents: 4057
diff changeset
1422 map->set_oop(VMRegImpl::stack2reg(offset_in_older_frame + stack_slots));
0382d2b469b2 7013347: allow crypto functions to be called inline to enhance performance
never
parents: 4057
diff changeset
1423 }
0382d2b469b2 7013347: allow crypto functions to be called inline to enhance performance
never
parents: 4057
diff changeset
1424 }
0382d2b469b2 7013347: allow crypto functions to be called inline to enhance performance
never
parents: 4057
diff changeset
1425 }
0382d2b469b2 7013347: allow crypto functions to be called inline to enhance performance
never
parents: 4057
diff changeset
1426 }
0382d2b469b2 7013347: allow crypto functions to be called inline to enhance performance
never
parents: 4057
diff changeset
1427
0382d2b469b2 7013347: allow crypto functions to be called inline to enhance performance
never
parents: 4057
diff changeset
1428
0382d2b469b2 7013347: allow crypto functions to be called inline to enhance performance
never
parents: 4057
diff changeset
1429 // Check GC_locker::needs_gc and enter the runtime if it's true. This
0382d2b469b2 7013347: allow crypto functions to be called inline to enhance performance
never
parents: 4057
diff changeset
1430 // keeps a new JNI critical region from starting until a GC has been
0382d2b469b2 7013347: allow crypto functions to be called inline to enhance performance
never
parents: 4057
diff changeset
1431 // forced. Save down any oops in registers and describe them in an
0382d2b469b2 7013347: allow crypto functions to be called inline to enhance performance
never
parents: 4057
diff changeset
1432 // OopMap.
0382d2b469b2 7013347: allow crypto functions to be called inline to enhance performance
never
parents: 4057
diff changeset
1433 static void check_needs_gc_for_critical_native(MacroAssembler* masm,
0382d2b469b2 7013347: allow crypto functions to be called inline to enhance performance
never
parents: 4057
diff changeset
1434 int stack_slots,
0382d2b469b2 7013347: allow crypto functions to be called inline to enhance performance
never
parents: 4057
diff changeset
1435 int total_c_args,
0382d2b469b2 7013347: allow crypto functions to be called inline to enhance performance
never
parents: 4057
diff changeset
1436 int total_in_args,
0382d2b469b2 7013347: allow crypto functions to be called inline to enhance performance
never
parents: 4057
diff changeset
1437 int arg_save_area,
0382d2b469b2 7013347: allow crypto functions to be called inline to enhance performance
never
parents: 4057
diff changeset
1438 OopMapSet* oop_maps,
0382d2b469b2 7013347: allow crypto functions to be called inline to enhance performance
never
parents: 4057
diff changeset
1439 VMRegPair* in_regs,
0382d2b469b2 7013347: allow crypto functions to be called inline to enhance performance
never
parents: 4057
diff changeset
1440 BasicType* in_sig_bt) {
0382d2b469b2 7013347: allow crypto functions to be called inline to enhance performance
never
parents: 4057
diff changeset
1441 __ block_comment("check GC_locker::needs_gc");
0382d2b469b2 7013347: allow crypto functions to be called inline to enhance performance
never
parents: 4057
diff changeset
1442 Label cont;
0382d2b469b2 7013347: allow crypto functions to be called inline to enhance performance
never
parents: 4057
diff changeset
1443 __ cmp8(ExternalAddress((address)GC_locker::needs_gc_address()), false);
0382d2b469b2 7013347: allow crypto functions to be called inline to enhance performance
never
parents: 4057
diff changeset
1444 __ jcc(Assembler::equal, cont);
0382d2b469b2 7013347: allow crypto functions to be called inline to enhance performance
never
parents: 4057
diff changeset
1445
0382d2b469b2 7013347: allow crypto functions to be called inline to enhance performance
never
parents: 4057
diff changeset
1446 // Save down any incoming oops and call into the runtime to halt for a GC
0382d2b469b2 7013347: allow crypto functions to be called inline to enhance performance
never
parents: 4057
diff changeset
1447
0382d2b469b2 7013347: allow crypto functions to be called inline to enhance performance
never
parents: 4057
diff changeset
1448 OopMap* map = new OopMap(stack_slots * 2, 0 /* arg_slots*/);
0382d2b469b2 7013347: allow crypto functions to be called inline to enhance performance
never
parents: 4057
diff changeset
1449 save_or_restore_arguments(masm, stack_slots, total_in_args,
0382d2b469b2 7013347: allow crypto functions to be called inline to enhance performance
never
parents: 4057
diff changeset
1450 arg_save_area, map, in_regs, in_sig_bt);
0382d2b469b2 7013347: allow crypto functions to be called inline to enhance performance
never
parents: 4057
diff changeset
1451
0382d2b469b2 7013347: allow crypto functions to be called inline to enhance performance
never
parents: 4057
diff changeset
1452 address the_pc = __ pc();
0382d2b469b2 7013347: allow crypto functions to be called inline to enhance performance
never
parents: 4057
diff changeset
1453 oop_maps->add_gc_map( __ offset(), map);
0382d2b469b2 7013347: allow crypto functions to be called inline to enhance performance
never
parents: 4057
diff changeset
1454 __ set_last_Java_frame(rsp, noreg, the_pc);
0382d2b469b2 7013347: allow crypto functions to be called inline to enhance performance
never
parents: 4057
diff changeset
1455
0382d2b469b2 7013347: allow crypto functions to be called inline to enhance performance
never
parents: 4057
diff changeset
1456 __ block_comment("block_for_jni_critical");
0382d2b469b2 7013347: allow crypto functions to be called inline to enhance performance
never
parents: 4057
diff changeset
1457 __ movptr(c_rarg0, r15_thread);
0382d2b469b2 7013347: allow crypto functions to be called inline to enhance performance
never
parents: 4057
diff changeset
1458 __ mov(r12, rsp); // remember sp
0382d2b469b2 7013347: allow crypto functions to be called inline to enhance performance
never
parents: 4057
diff changeset
1459 __ subptr(rsp, frame::arg_reg_save_area_bytes); // windows
0382d2b469b2 7013347: allow crypto functions to be called inline to enhance performance
never
parents: 4057
diff changeset
1460 __ andptr(rsp, -16); // align stack as required by ABI
0382d2b469b2 7013347: allow crypto functions to be called inline to enhance performance
never
parents: 4057
diff changeset
1461 __ call(RuntimeAddress(CAST_FROM_FN_PTR(address, SharedRuntime::block_for_jni_critical)));
0382d2b469b2 7013347: allow crypto functions to be called inline to enhance performance
never
parents: 4057
diff changeset
1462 __ mov(rsp, r12); // restore sp
0382d2b469b2 7013347: allow crypto functions to be called inline to enhance performance
never
parents: 4057
diff changeset
1463 __ reinit_heapbase();
0382d2b469b2 7013347: allow crypto functions to be called inline to enhance performance
never
parents: 4057
diff changeset
1464
0382d2b469b2 7013347: allow crypto functions to be called inline to enhance performance
never
parents: 4057
diff changeset
1465 __ reset_last_Java_frame(false, true);
0382d2b469b2 7013347: allow crypto functions to be called inline to enhance performance
never
parents: 4057
diff changeset
1466
0382d2b469b2 7013347: allow crypto functions to be called inline to enhance performance
never
parents: 4057
diff changeset
1467 save_or_restore_arguments(masm, stack_slots, total_in_args,
0382d2b469b2 7013347: allow crypto functions to be called inline to enhance performance
never
parents: 4057
diff changeset
1468 arg_save_area, NULL, in_regs, in_sig_bt);
0382d2b469b2 7013347: allow crypto functions to be called inline to enhance performance
never
parents: 4057
diff changeset
1469
0382d2b469b2 7013347: allow crypto functions to be called inline to enhance performance
never
parents: 4057
diff changeset
1470 __ bind(cont);
0382d2b469b2 7013347: allow crypto functions to be called inline to enhance performance
never
parents: 4057
diff changeset
1471 #ifdef ASSERT
0382d2b469b2 7013347: allow crypto functions to be called inline to enhance performance
never
parents: 4057
diff changeset
1472 if (StressCriticalJNINatives) {
0382d2b469b2 7013347: allow crypto functions to be called inline to enhance performance
never
parents: 4057
diff changeset
1473 // Stress register saving
0382d2b469b2 7013347: allow crypto functions to be called inline to enhance performance
never
parents: 4057
diff changeset
1474 OopMap* map = new OopMap(stack_slots * 2, 0 /* arg_slots*/);
0382d2b469b2 7013347: allow crypto functions to be called inline to enhance performance
never
parents: 4057
diff changeset
1475 save_or_restore_arguments(masm, stack_slots, total_in_args,
0382d2b469b2 7013347: allow crypto functions to be called inline to enhance performance
never
parents: 4057
diff changeset
1476 arg_save_area, map, in_regs, in_sig_bt);
0382d2b469b2 7013347: allow crypto functions to be called inline to enhance performance
never
parents: 4057
diff changeset
1477 // Destroy argument registers
0382d2b469b2 7013347: allow crypto functions to be called inline to enhance performance
never
parents: 4057
diff changeset
1478 for (int i = 0; i < total_in_args - 1; i++) {
0382d2b469b2 7013347: allow crypto functions to be called inline to enhance performance
never
parents: 4057
diff changeset
1479 if (in_regs[i].first()->is_Register()) {
0382d2b469b2 7013347: allow crypto functions to be called inline to enhance performance
never
parents: 4057
diff changeset
1480 const Register reg = in_regs[i].first()->as_Register();
0382d2b469b2 7013347: allow crypto functions to be called inline to enhance performance
never
parents: 4057
diff changeset
1481 __ xorptr(reg, reg);
0382d2b469b2 7013347: allow crypto functions to be called inline to enhance performance
never
parents: 4057
diff changeset
1482 } else if (in_regs[i].first()->is_XMMRegister()) {
0382d2b469b2 7013347: allow crypto functions to be called inline to enhance performance
never
parents: 4057
diff changeset
1483 __ xorpd(in_regs[i].first()->as_XMMRegister(), in_regs[i].first()->as_XMMRegister());
0382d2b469b2 7013347: allow crypto functions to be called inline to enhance performance
never
parents: 4057
diff changeset
1484 } else if (in_regs[i].first()->is_FloatRegister()) {
0382d2b469b2 7013347: allow crypto functions to be called inline to enhance performance
never
parents: 4057
diff changeset
1485 ShouldNotReachHere();
0382d2b469b2 7013347: allow crypto functions to be called inline to enhance performance
never
parents: 4057
diff changeset
1486 } else if (in_regs[i].first()->is_stack()) {
0382d2b469b2 7013347: allow crypto functions to be called inline to enhance performance
never
parents: 4057
diff changeset
1487 // Nothing to do
0382d2b469b2 7013347: allow crypto functions to be called inline to enhance performance
never
parents: 4057
diff changeset
1488 } else {
0382d2b469b2 7013347: allow crypto functions to be called inline to enhance performance
never
parents: 4057
diff changeset
1489 ShouldNotReachHere();
0382d2b469b2 7013347: allow crypto functions to be called inline to enhance performance
never
parents: 4057
diff changeset
1490 }
0382d2b469b2 7013347: allow crypto functions to be called inline to enhance performance
never
parents: 4057
diff changeset
1491 if (in_sig_bt[i] == T_LONG || in_sig_bt[i] == T_DOUBLE) {
0382d2b469b2 7013347: allow crypto functions to be called inline to enhance performance
never
parents: 4057
diff changeset
1492 i++;
0382d2b469b2 7013347: allow crypto functions to be called inline to enhance performance
never
parents: 4057
diff changeset
1493 }
0382d2b469b2 7013347: allow crypto functions to be called inline to enhance performance
never
parents: 4057
diff changeset
1494 }
0382d2b469b2 7013347: allow crypto functions to be called inline to enhance performance
never
parents: 4057
diff changeset
1495
0382d2b469b2 7013347: allow crypto functions to be called inline to enhance performance
never
parents: 4057
diff changeset
1496 save_or_restore_arguments(masm, stack_slots, total_in_args,
0382d2b469b2 7013347: allow crypto functions to be called inline to enhance performance
never
parents: 4057
diff changeset
1497 arg_save_area, NULL, in_regs, in_sig_bt);
0382d2b469b2 7013347: allow crypto functions to be called inline to enhance performance
never
parents: 4057
diff changeset
1498 }
0382d2b469b2 7013347: allow crypto functions to be called inline to enhance performance
never
parents: 4057
diff changeset
1499 #endif
0382d2b469b2 7013347: allow crypto functions to be called inline to enhance performance
never
parents: 4057
diff changeset
1500 }
0382d2b469b2 7013347: allow crypto functions to be called inline to enhance performance
never
parents: 4057
diff changeset
1501
0382d2b469b2 7013347: allow crypto functions to be called inline to enhance performance
never
parents: 4057
diff changeset
1502 // Unpack an array argument into a pointer to the body and the length
0382d2b469b2 7013347: allow crypto functions to be called inline to enhance performance
never
parents: 4057
diff changeset
1503 // if the array is non-null, otherwise pass 0 for both.
0382d2b469b2 7013347: allow crypto functions to be called inline to enhance performance
never
parents: 4057
diff changeset
1504 static void unpack_array_argument(MacroAssembler* masm, VMRegPair reg, BasicType in_elem_type, VMRegPair body_arg, VMRegPair length_arg) {
0382d2b469b2 7013347: allow crypto functions to be called inline to enhance performance
never
parents: 4057
diff changeset
1505 Register tmp_reg = rax;
0382d2b469b2 7013347: allow crypto functions to be called inline to enhance performance
never
parents: 4057
diff changeset
1506 assert(!body_arg.first()->is_Register() || body_arg.first()->as_Register() != tmp_reg,
0382d2b469b2 7013347: allow crypto functions to be called inline to enhance performance
never
parents: 4057
diff changeset
1507 "possible collision");
0382d2b469b2 7013347: allow crypto functions to be called inline to enhance performance
never
parents: 4057
diff changeset
1508 assert(!length_arg.first()->is_Register() || length_arg.first()->as_Register() != tmp_reg,
0382d2b469b2 7013347: allow crypto functions to be called inline to enhance performance
never
parents: 4057
diff changeset
1509 "possible collision");
0382d2b469b2 7013347: allow crypto functions to be called inline to enhance performance
never
parents: 4057
diff changeset
1510
10998
e7f5651d459c 8003268: SharedRuntime::generate_native_wrapper doesn't save all registers across runtime tracing calls for JNI critical native methods
twisti
parents: 8873
diff changeset
1511 __ block_comment("unpack_array_argument {");
e7f5651d459c 8003268: SharedRuntime::generate_native_wrapper doesn't save all registers across runtime tracing calls for JNI critical native methods
twisti
parents: 8873
diff changeset
1512
4873
0382d2b469b2 7013347: allow crypto functions to be called inline to enhance performance
never
parents: 4057
diff changeset
1513 // Pass the length, ptr pair
0382d2b469b2 7013347: allow crypto functions to be called inline to enhance performance
never
parents: 4057
diff changeset
1514 Label is_null, done;
0382d2b469b2 7013347: allow crypto functions to be called inline to enhance performance
never
parents: 4057
diff changeset
1515 VMRegPair tmp;
0382d2b469b2 7013347: allow crypto functions to be called inline to enhance performance
never
parents: 4057
diff changeset
1516 tmp.set_ptr(tmp_reg->as_VMReg());
0382d2b469b2 7013347: allow crypto functions to be called inline to enhance performance
never
parents: 4057
diff changeset
1517 if (reg.first()->is_stack()) {
0382d2b469b2 7013347: allow crypto functions to be called inline to enhance performance
never
parents: 4057
diff changeset
1518 // Load the arg up from the stack
0382d2b469b2 7013347: allow crypto functions to be called inline to enhance performance
never
parents: 4057
diff changeset
1519 move_ptr(masm, reg, tmp);
0382d2b469b2 7013347: allow crypto functions to be called inline to enhance performance
never
parents: 4057
diff changeset
1520 reg = tmp;
0382d2b469b2 7013347: allow crypto functions to be called inline to enhance performance
never
parents: 4057
diff changeset
1521 }
0382d2b469b2 7013347: allow crypto functions to be called inline to enhance performance
never
parents: 4057
diff changeset
1522 __ testptr(reg.first()->as_Register(), reg.first()->as_Register());
0382d2b469b2 7013347: allow crypto functions to be called inline to enhance performance
never
parents: 4057
diff changeset
1523 __ jccb(Assembler::equal, is_null);
0382d2b469b2 7013347: allow crypto functions to be called inline to enhance performance
never
parents: 4057
diff changeset
1524 __ lea(tmp_reg, Address(reg.first()->as_Register(), arrayOopDesc::base_offset_in_bytes(in_elem_type)));
0382d2b469b2 7013347: allow crypto functions to be called inline to enhance performance
never
parents: 4057
diff changeset
1525 move_ptr(masm, tmp, body_arg);
0382d2b469b2 7013347: allow crypto functions to be called inline to enhance performance
never
parents: 4057
diff changeset
1526 // load the length relative to the body.
0382d2b469b2 7013347: allow crypto functions to be called inline to enhance performance
never
parents: 4057
diff changeset
1527 __ movl(tmp_reg, Address(tmp_reg, arrayOopDesc::length_offset_in_bytes() -
0382d2b469b2 7013347: allow crypto functions to be called inline to enhance performance
never
parents: 4057
diff changeset
1528 arrayOopDesc::base_offset_in_bytes(in_elem_type)));
0382d2b469b2 7013347: allow crypto functions to be called inline to enhance performance
never
parents: 4057
diff changeset
1529 move32_64(masm, tmp, length_arg);
0382d2b469b2 7013347: allow crypto functions to be called inline to enhance performance
never
parents: 4057
diff changeset
1530 __ jmpb(done);
0382d2b469b2 7013347: allow crypto functions to be called inline to enhance performance
never
parents: 4057
diff changeset
1531 __ bind(is_null);
0382d2b469b2 7013347: allow crypto functions to be called inline to enhance performance
never
parents: 4057
diff changeset
1532 // Pass zeros
0382d2b469b2 7013347: allow crypto functions to be called inline to enhance performance
never
parents: 4057
diff changeset
1533 __ xorptr(tmp_reg, tmp_reg);
0382d2b469b2 7013347: allow crypto functions to be called inline to enhance performance
never
parents: 4057
diff changeset
1534 move_ptr(masm, tmp, body_arg);
0382d2b469b2 7013347: allow crypto functions to be called inline to enhance performance
never
parents: 4057
diff changeset
1535 move32_64(masm, tmp, length_arg);
0382d2b469b2 7013347: allow crypto functions to be called inline to enhance performance
never
parents: 4057
diff changeset
1536 __ bind(done);
10998
e7f5651d459c 8003268: SharedRuntime::generate_native_wrapper doesn't save all registers across runtime tracing calls for JNI critical native methods
twisti
parents: 8873
diff changeset
1537
e7f5651d459c 8003268: SharedRuntime::generate_native_wrapper doesn't save all registers across runtime tracing calls for JNI critical native methods
twisti
parents: 8873
diff changeset
1538 __ block_comment("} unpack_array_argument");
4873
0382d2b469b2 7013347: allow crypto functions to be called inline to enhance performance
never
parents: 4057
diff changeset
1539 }
0382d2b469b2 7013347: allow crypto functions to be called inline to enhance performance
never
parents: 4057
diff changeset
1540
5905
2ee7dcc77c63 7145024: Crashes in ucrypto related to C2
never
parents: 5904
diff changeset
1541
6266
1d7922586cf6 7023639: JSR 292 method handle invocation needs a fast path for compiled code
twisti
parents: 5907
diff changeset
1542 // Different signatures may require very different orders for the move
1d7922586cf6 7023639: JSR 292 method handle invocation needs a fast path for compiled code
twisti
parents: 5907
diff changeset
1543 // to avoid clobbering other arguments. There's no simple way to
1d7922586cf6 7023639: JSR 292 method handle invocation needs a fast path for compiled code
twisti
parents: 5907
diff changeset
1544 // order them safely. Compute a safe order for issuing stores and
1d7922586cf6 7023639: JSR 292 method handle invocation needs a fast path for compiled code
twisti
parents: 5907
diff changeset
1545 // break any cycles in those stores. This code is fairly general but
1d7922586cf6 7023639: JSR 292 method handle invocation needs a fast path for compiled code
twisti
parents: 5907
diff changeset
1546 // it's not necessary on the other platforms so we keep it in the
1d7922586cf6 7023639: JSR 292 method handle invocation needs a fast path for compiled code
twisti
parents: 5907
diff changeset
1547 // platform dependent code instead of moving it into a shared file.
1d7922586cf6 7023639: JSR 292 method handle invocation needs a fast path for compiled code
twisti
parents: 5907
diff changeset
1548 // (See bugs 7013347 & 7145024.)
1d7922586cf6 7023639: JSR 292 method handle invocation needs a fast path for compiled code
twisti
parents: 5907
diff changeset
1549 // Note that this code is specific to LP64.
5905
2ee7dcc77c63 7145024: Crashes in ucrypto related to C2
never
parents: 5904
diff changeset
1550 class ComputeMoveOrder: public StackObj {
2ee7dcc77c63 7145024: Crashes in ucrypto related to C2
never
parents: 5904
diff changeset
1551 class MoveOperation: public ResourceObj {
2ee7dcc77c63 7145024: Crashes in ucrypto related to C2
never
parents: 5904
diff changeset
1552 friend class ComputeMoveOrder;
2ee7dcc77c63 7145024: Crashes in ucrypto related to C2
never
parents: 5904
diff changeset
1553 private:
2ee7dcc77c63 7145024: Crashes in ucrypto related to C2
never
parents: 5904
diff changeset
1554 VMRegPair _src;
2ee7dcc77c63 7145024: Crashes in ucrypto related to C2
never
parents: 5904
diff changeset
1555 VMRegPair _dst;
2ee7dcc77c63 7145024: Crashes in ucrypto related to C2
never
parents: 5904
diff changeset
1556 int _src_index;
2ee7dcc77c63 7145024: Crashes in ucrypto related to C2
never
parents: 5904
diff changeset
1557 int _dst_index;
2ee7dcc77c63 7145024: Crashes in ucrypto related to C2
never
parents: 5904
diff changeset
1558 bool _processed;
2ee7dcc77c63 7145024: Crashes in ucrypto related to C2
never
parents: 5904
diff changeset
1559 MoveOperation* _next;
2ee7dcc77c63 7145024: Crashes in ucrypto related to C2
never
parents: 5904
diff changeset
1560 MoveOperation* _prev;
2ee7dcc77c63 7145024: Crashes in ucrypto related to C2
never
parents: 5904
diff changeset
1561
2ee7dcc77c63 7145024: Crashes in ucrypto related to C2
never
parents: 5904
diff changeset
1562 static int get_id(VMRegPair r) {
2ee7dcc77c63 7145024: Crashes in ucrypto related to C2
never
parents: 5904
diff changeset
1563 return r.first()->value();
2ee7dcc77c63 7145024: Crashes in ucrypto related to C2
never
parents: 5904
diff changeset
1564 }
2ee7dcc77c63 7145024: Crashes in ucrypto related to C2
never
parents: 5904
diff changeset
1565
2ee7dcc77c63 7145024: Crashes in ucrypto related to C2
never
parents: 5904
diff changeset
1566 public:
2ee7dcc77c63 7145024: Crashes in ucrypto related to C2
never
parents: 5904
diff changeset
1567 MoveOperation(int src_index, VMRegPair src, int dst_index, VMRegPair dst):
2ee7dcc77c63 7145024: Crashes in ucrypto related to C2
never
parents: 5904
diff changeset
1568 _src(src)
2ee7dcc77c63 7145024: Crashes in ucrypto related to C2
never
parents: 5904
diff changeset
1569 , _src_index(src_index)
2ee7dcc77c63 7145024: Crashes in ucrypto related to C2
never
parents: 5904
diff changeset
1570 , _dst(dst)
2ee7dcc77c63 7145024: Crashes in ucrypto related to C2
never
parents: 5904
diff changeset
1571 , _dst_index(dst_index)
2ee7dcc77c63 7145024: Crashes in ucrypto related to C2
never
parents: 5904
diff changeset
1572 , _next(NULL)
2ee7dcc77c63 7145024: Crashes in ucrypto related to C2
never
parents: 5904
diff changeset
1573 , _prev(NULL)
2ee7dcc77c63 7145024: Crashes in ucrypto related to C2
never
parents: 5904
diff changeset
1574 , _processed(false) {
2ee7dcc77c63 7145024: Crashes in ucrypto related to C2
never
parents: 5904
diff changeset
1575 }
2ee7dcc77c63 7145024: Crashes in ucrypto related to C2
never
parents: 5904
diff changeset
1576
2ee7dcc77c63 7145024: Crashes in ucrypto related to C2
never
parents: 5904
diff changeset
1577 VMRegPair src() const { return _src; }
2ee7dcc77c63 7145024: Crashes in ucrypto related to C2
never
parents: 5904
diff changeset
1578 int src_id() const { return get_id(src()); }
2ee7dcc77c63 7145024: Crashes in ucrypto related to C2
never
parents: 5904
diff changeset
1579 int src_index() const { return _src_index; }
2ee7dcc77c63 7145024: Crashes in ucrypto related to C2
never
parents: 5904
diff changeset
1580 VMRegPair dst() const { return _dst; }
2ee7dcc77c63 7145024: Crashes in ucrypto related to C2
never
parents: 5904
diff changeset
1581 void set_dst(int i, VMRegPair dst) { _dst_index = i, _dst = dst; }
2ee7dcc77c63 7145024: Crashes in ucrypto related to C2
never
parents: 5904
diff changeset
1582 int dst_index() const { return _dst_index; }
2ee7dcc77c63 7145024: Crashes in ucrypto related to C2
never
parents: 5904
diff changeset
1583 int dst_id() const { return get_id(dst()); }
2ee7dcc77c63 7145024: Crashes in ucrypto related to C2
never
parents: 5904
diff changeset
1584 MoveOperation* next() const { return _next; }
2ee7dcc77c63 7145024: Crashes in ucrypto related to C2
never
parents: 5904
diff changeset
1585 MoveOperation* prev() const { return _prev; }
2ee7dcc77c63 7145024: Crashes in ucrypto related to C2
never
parents: 5904
diff changeset
1586 void set_processed() { _processed = true; }
2ee7dcc77c63 7145024: Crashes in ucrypto related to C2
never
parents: 5904
diff changeset
1587 bool is_processed() const { return _processed; }
2ee7dcc77c63 7145024: Crashes in ucrypto related to C2
never
parents: 5904
diff changeset
1588
2ee7dcc77c63 7145024: Crashes in ucrypto related to C2
never
parents: 5904
diff changeset
1589 // insert
2ee7dcc77c63 7145024: Crashes in ucrypto related to C2
never
parents: 5904
diff changeset
1590 void break_cycle(VMRegPair temp_register) {
2ee7dcc77c63 7145024: Crashes in ucrypto related to C2
never
parents: 5904
diff changeset
1591 // create a new store following the last store
2ee7dcc77c63 7145024: Crashes in ucrypto related to C2
never
parents: 5904
diff changeset
1592 // to move from the temp_register to the original
2ee7dcc77c63 7145024: Crashes in ucrypto related to C2
never
parents: 5904
diff changeset
1593 MoveOperation* new_store = new MoveOperation(-1, temp_register, dst_index(), dst());
2ee7dcc77c63 7145024: Crashes in ucrypto related to C2
never
parents: 5904
diff changeset
1594
2ee7dcc77c63 7145024: Crashes in ucrypto related to C2
never
parents: 5904
diff changeset
1595 // break the cycle of links and insert new_store at the end
2ee7dcc77c63 7145024: Crashes in ucrypto related to C2
never
parents: 5904
diff changeset
1596 // break the reverse link.
2ee7dcc77c63 7145024: Crashes in ucrypto related to C2
never
parents: 5904
diff changeset
1597 MoveOperation* p = prev();
2ee7dcc77c63 7145024: Crashes in ucrypto related to C2
never
parents: 5904
diff changeset
1598 assert(p->next() == this, "must be");
2ee7dcc77c63 7145024: Crashes in ucrypto related to C2
never
parents: 5904
diff changeset
1599 _prev = NULL;
2ee7dcc77c63 7145024: Crashes in ucrypto related to C2
never
parents: 5904
diff changeset
1600 p->_next = new_store;
2ee7dcc77c63 7145024: Crashes in ucrypto related to C2
never
parents: 5904
diff changeset
1601 new_store->_prev = p;
2ee7dcc77c63 7145024: Crashes in ucrypto related to C2
never
parents: 5904
diff changeset
1602
2ee7dcc77c63 7145024: Crashes in ucrypto related to C2
never
parents: 5904
diff changeset
1603 // change the original store to save it's value in the temp.
2ee7dcc77c63 7145024: Crashes in ucrypto related to C2
never
parents: 5904
diff changeset
1604 set_dst(-1, temp_register);
2ee7dcc77c63 7145024: Crashes in ucrypto related to C2
never
parents: 5904
diff changeset
1605 }
2ee7dcc77c63 7145024: Crashes in ucrypto related to C2
never
parents: 5904
diff changeset
1606
2ee7dcc77c63 7145024: Crashes in ucrypto related to C2
never
parents: 5904
diff changeset
1607 void link(GrowableArray<MoveOperation*>& killer) {
2ee7dcc77c63 7145024: Crashes in ucrypto related to C2
never
parents: 5904
diff changeset
1608 // link this store in front the store that it depends on
2ee7dcc77c63 7145024: Crashes in ucrypto related to C2
never
parents: 5904
diff changeset
1609 MoveOperation* n = killer.at_grow(src_id(), NULL);
2ee7dcc77c63 7145024: Crashes in ucrypto related to C2
never
parents: 5904
diff changeset
1610 if (n != NULL) {
2ee7dcc77c63 7145024: Crashes in ucrypto related to C2
never
parents: 5904
diff changeset
1611 assert(_next == NULL && n->_prev == NULL, "shouldn't have been set yet");
2ee7dcc77c63 7145024: Crashes in ucrypto related to C2
never
parents: 5904
diff changeset
1612 _next = n;
2ee7dcc77c63 7145024: Crashes in ucrypto related to C2
never
parents: 5904
diff changeset
1613 n->_prev = this;
2ee7dcc77c63 7145024: Crashes in ucrypto related to C2
never
parents: 5904
diff changeset
1614 }
2ee7dcc77c63 7145024: Crashes in ucrypto related to C2
never
parents: 5904
diff changeset
1615 }
2ee7dcc77c63 7145024: Crashes in ucrypto related to C2
never
parents: 5904
diff changeset
1616 };
2ee7dcc77c63 7145024: Crashes in ucrypto related to C2
never
parents: 5904
diff changeset
1617
2ee7dcc77c63 7145024: Crashes in ucrypto related to C2
never
parents: 5904
diff changeset
1618 private:
2ee7dcc77c63 7145024: Crashes in ucrypto related to C2
never
parents: 5904
diff changeset
1619 GrowableArray<MoveOperation*> edges;
2ee7dcc77c63 7145024: Crashes in ucrypto related to C2
never
parents: 5904
diff changeset
1620
2ee7dcc77c63 7145024: Crashes in ucrypto related to C2
never
parents: 5904
diff changeset
1621 public:
2ee7dcc77c63 7145024: Crashes in ucrypto related to C2
never
parents: 5904
diff changeset
1622 ComputeMoveOrder(int total_in_args, VMRegPair* in_regs, int total_c_args, VMRegPair* out_regs,
2ee7dcc77c63 7145024: Crashes in ucrypto related to C2
never
parents: 5904
diff changeset
1623 BasicType* in_sig_bt, GrowableArray<int>& arg_order, VMRegPair tmp_vmreg) {
2ee7dcc77c63 7145024: Crashes in ucrypto related to C2
never
parents: 5904
diff changeset
1624 // Move operations where the dest is the stack can all be
2ee7dcc77c63 7145024: Crashes in ucrypto related to C2
never
parents: 5904
diff changeset
1625 // scheduled first since they can't interfere with the other moves.
2ee7dcc77c63 7145024: Crashes in ucrypto related to C2
never
parents: 5904
diff changeset
1626 for (int i = total_in_args - 1, c_arg = total_c_args - 1; i >= 0; i--, c_arg--) {
2ee7dcc77c63 7145024: Crashes in ucrypto related to C2
never
parents: 5904
diff changeset
1627 if (in_sig_bt[i] == T_ARRAY) {
2ee7dcc77c63 7145024: Crashes in ucrypto related to C2
never
parents: 5904
diff changeset
1628 c_arg--;
2ee7dcc77c63 7145024: Crashes in ucrypto related to C2
never
parents: 5904
diff changeset
1629 if (out_regs[c_arg].first()->is_stack() &&
2ee7dcc77c63 7145024: Crashes in ucrypto related to C2
never
parents: 5904
diff changeset
1630 out_regs[c_arg + 1].first()->is_stack()) {
2ee7dcc77c63 7145024: Crashes in ucrypto related to C2
never
parents: 5904
diff changeset
1631 arg_order.push(i);
2ee7dcc77c63 7145024: Crashes in ucrypto related to C2
never
parents: 5904
diff changeset
1632 arg_order.push(c_arg);
2ee7dcc77c63 7145024: Crashes in ucrypto related to C2
never
parents: 5904
diff changeset
1633 } else {
2ee7dcc77c63 7145024: Crashes in ucrypto related to C2
never
parents: 5904
diff changeset
1634 if (out_regs[c_arg].first()->is_stack() ||
2ee7dcc77c63 7145024: Crashes in ucrypto related to C2
never
parents: 5904
diff changeset
1635 in_regs[i].first() == out_regs[c_arg].first()) {
2ee7dcc77c63 7145024: Crashes in ucrypto related to C2
never
parents: 5904
diff changeset
1636 add_edge(i, in_regs[i].first(), c_arg, out_regs[c_arg + 1]);
2ee7dcc77c63 7145024: Crashes in ucrypto related to C2
never
parents: 5904
diff changeset
1637 } else {
2ee7dcc77c63 7145024: Crashes in ucrypto related to C2
never
parents: 5904
diff changeset
1638 add_edge(i, in_regs[i].first(), c_arg, out_regs[c_arg]);
2ee7dcc77c63 7145024: Crashes in ucrypto related to C2
never
parents: 5904
diff changeset
1639 }
2ee7dcc77c63 7145024: Crashes in ucrypto related to C2
never
parents: 5904
diff changeset
1640 }
2ee7dcc77c63 7145024: Crashes in ucrypto related to C2
never
parents: 5904
diff changeset
1641 } else if (in_sig_bt[i] == T_VOID) {
2ee7dcc77c63 7145024: Crashes in ucrypto related to C2
never
parents: 5904
diff changeset
1642 arg_order.push(i);
2ee7dcc77c63 7145024: Crashes in ucrypto related to C2
never
parents: 5904
diff changeset
1643 arg_order.push(c_arg);
2ee7dcc77c63 7145024: Crashes in ucrypto related to C2
never
parents: 5904
diff changeset
1644 } else {
2ee7dcc77c63 7145024: Crashes in ucrypto related to C2
never
parents: 5904
diff changeset
1645 if (out_regs[c_arg].first()->is_stack() ||
2ee7dcc77c63 7145024: Crashes in ucrypto related to C2
never
parents: 5904
diff changeset
1646 in_regs[i].first() == out_regs[c_arg].first()) {
2ee7dcc77c63 7145024: Crashes in ucrypto related to C2
never
parents: 5904
diff changeset
1647 arg_order.push(i);
2ee7dcc77c63 7145024: Crashes in ucrypto related to C2
never
parents: 5904
diff changeset
1648 arg_order.push(c_arg);
2ee7dcc77c63 7145024: Crashes in ucrypto related to C2
never
parents: 5904
diff changeset
1649 } else {
2ee7dcc77c63 7145024: Crashes in ucrypto related to C2
never
parents: 5904
diff changeset
1650 add_edge(i, in_regs[i].first(), c_arg, out_regs[c_arg]);
2ee7dcc77c63 7145024: Crashes in ucrypto related to C2
never
parents: 5904
diff changeset
1651 }
2ee7dcc77c63 7145024: Crashes in ucrypto related to C2
never
parents: 5904
diff changeset
1652 }
2ee7dcc77c63 7145024: Crashes in ucrypto related to C2
never
parents: 5904
diff changeset
1653 }
2ee7dcc77c63 7145024: Crashes in ucrypto related to C2
never
parents: 5904
diff changeset
1654 // Break any cycles in the register moves and emit the in the
2ee7dcc77c63 7145024: Crashes in ucrypto related to C2
never
parents: 5904
diff changeset
1655 // proper order.
2ee7dcc77c63 7145024: Crashes in ucrypto related to C2
never
parents: 5904
diff changeset
1656 GrowableArray<MoveOperation*>* stores = get_store_order(tmp_vmreg);
2ee7dcc77c63 7145024: Crashes in ucrypto related to C2
never
parents: 5904
diff changeset
1657 for (int i = 0; i < stores->length(); i++) {
2ee7dcc77c63 7145024: Crashes in ucrypto related to C2
never
parents: 5904
diff changeset
1658 arg_order.push(stores->at(i)->src_index());
2ee7dcc77c63 7145024: Crashes in ucrypto related to C2
never
parents: 5904
diff changeset
1659 arg_order.push(stores->at(i)->dst_index());
2ee7dcc77c63 7145024: Crashes in ucrypto related to C2
never
parents: 5904
diff changeset
1660 }
2ee7dcc77c63 7145024: Crashes in ucrypto related to C2
never
parents: 5904
diff changeset
1661 }
2ee7dcc77c63 7145024: Crashes in ucrypto related to C2
never
parents: 5904
diff changeset
1662
2ee7dcc77c63 7145024: Crashes in ucrypto related to C2
never
parents: 5904
diff changeset
1663 // Collected all the move operations
2ee7dcc77c63 7145024: Crashes in ucrypto related to C2
never
parents: 5904
diff changeset
1664 void add_edge(int src_index, VMRegPair src, int dst_index, VMRegPair dst) {
2ee7dcc77c63 7145024: Crashes in ucrypto related to C2
never
parents: 5904
diff changeset
1665 if (src.first() == dst.first()) return;
2ee7dcc77c63 7145024: Crashes in ucrypto related to C2
never
parents: 5904
diff changeset
1666 edges.append(new MoveOperation(src_index, src, dst_index, dst));
2ee7dcc77c63 7145024: Crashes in ucrypto related to C2
never
parents: 5904
diff changeset
1667 }
2ee7dcc77c63 7145024: Crashes in ucrypto related to C2
never
parents: 5904
diff changeset
1668
2ee7dcc77c63 7145024: Crashes in ucrypto related to C2
never
parents: 5904
diff changeset
1669 // Walk the edges breaking cycles between moves. The result list
2ee7dcc77c63 7145024: Crashes in ucrypto related to C2
never
parents: 5904
diff changeset
1670 // can be walked in order to produce the proper set of loads
2ee7dcc77c63 7145024: Crashes in ucrypto related to C2
never
parents: 5904
diff changeset
1671 GrowableArray<MoveOperation*>* get_store_order(VMRegPair temp_register) {
2ee7dcc77c63 7145024: Crashes in ucrypto related to C2
never
parents: 5904
diff changeset
1672 // Record which moves kill which values
2ee7dcc77c63 7145024: Crashes in ucrypto related to C2
never
parents: 5904
diff changeset
1673 GrowableArray<MoveOperation*> killer;
2ee7dcc77c63 7145024: Crashes in ucrypto related to C2
never
parents: 5904
diff changeset
1674 for (int i = 0; i < edges.length(); i++) {
2ee7dcc77c63 7145024: Crashes in ucrypto related to C2
never
parents: 5904
diff changeset
1675 MoveOperation* s = edges.at(i);
2ee7dcc77c63 7145024: Crashes in ucrypto related to C2
never
parents: 5904
diff changeset
1676 assert(killer.at_grow(s->dst_id(), NULL) == NULL, "only one killer");
2ee7dcc77c63 7145024: Crashes in ucrypto related to C2
never
parents: 5904
diff changeset
1677 killer.at_put_grow(s->dst_id(), s, NULL);
2ee7dcc77c63 7145024: Crashes in ucrypto related to C2
never
parents: 5904
diff changeset
1678 }
2ee7dcc77c63 7145024: Crashes in ucrypto related to C2
never
parents: 5904
diff changeset
1679 assert(killer.at_grow(MoveOperation::get_id(temp_register), NULL) == NULL,
2ee7dcc77c63 7145024: Crashes in ucrypto related to C2
never
parents: 5904
diff changeset
1680 "make sure temp isn't in the registers that are killed");
2ee7dcc77c63 7145024: Crashes in ucrypto related to C2
never
parents: 5904
diff changeset
1681
2ee7dcc77c63 7145024: Crashes in ucrypto related to C2
never
parents: 5904
diff changeset
1682 // create links between loads and stores
2ee7dcc77c63 7145024: Crashes in ucrypto related to C2
never
parents: 5904
diff changeset
1683 for (int i = 0; i < edges.length(); i++) {
2ee7dcc77c63 7145024: Crashes in ucrypto related to C2
never
parents: 5904
diff changeset
1684 edges.at(i)->link(killer);
2ee7dcc77c63 7145024: Crashes in ucrypto related to C2
never
parents: 5904
diff changeset
1685 }
2ee7dcc77c63 7145024: Crashes in ucrypto related to C2
never
parents: 5904
diff changeset
1686
2ee7dcc77c63 7145024: Crashes in ucrypto related to C2
never
parents: 5904
diff changeset
1687 // at this point, all the move operations are chained together
2ee7dcc77c63 7145024: Crashes in ucrypto related to C2
never
parents: 5904
diff changeset
1688 // in a doubly linked list. Processing it backwards finds
2ee7dcc77c63 7145024: Crashes in ucrypto related to C2
never
parents: 5904
diff changeset
1689 // the beginning of the chain, forwards finds the end. If there's
2ee7dcc77c63 7145024: Crashes in ucrypto related to C2
never
parents: 5904
diff changeset
1690 // a cycle it can be broken at any point, so pick an edge and walk
2ee7dcc77c63 7145024: Crashes in ucrypto related to C2
never
parents: 5904
diff changeset
1691 // backward until the list ends or we end where we started.
2ee7dcc77c63 7145024: Crashes in ucrypto related to C2
never
parents: 5904
diff changeset
1692 GrowableArray<MoveOperation*>* stores = new GrowableArray<MoveOperation*>();
2ee7dcc77c63 7145024: Crashes in ucrypto related to C2
never
parents: 5904
diff changeset
1693 for (int e = 0; e < edges.length(); e++) {
2ee7dcc77c63 7145024: Crashes in ucrypto related to C2
never
parents: 5904
diff changeset
1694 MoveOperation* s = edges.at(e);
2ee7dcc77c63 7145024: Crashes in ucrypto related to C2
never
parents: 5904
diff changeset
1695 if (!s->is_processed()) {
2ee7dcc77c63 7145024: Crashes in ucrypto related to C2
never
parents: 5904
diff changeset
1696 MoveOperation* start = s;
2ee7dcc77c63 7145024: Crashes in ucrypto related to C2
never
parents: 5904
diff changeset
1697 // search for the beginning of the chain or cycle
2ee7dcc77c63 7145024: Crashes in ucrypto related to C2
never
parents: 5904
diff changeset
1698 while (start->prev() != NULL && start->prev() != s) {
2ee7dcc77c63 7145024: Crashes in ucrypto related to C2
never
parents: 5904
diff changeset
1699 start = start->prev();
2ee7dcc77c63 7145024: Crashes in ucrypto related to C2
never
parents: 5904
diff changeset
1700 }
2ee7dcc77c63 7145024: Crashes in ucrypto related to C2
never
parents: 5904
diff changeset
1701 if (start->prev() == s) {
2ee7dcc77c63 7145024: Crashes in ucrypto related to C2
never
parents: 5904
diff changeset
1702 start->break_cycle(temp_register);
2ee7dcc77c63 7145024: Crashes in ucrypto related to C2
never
parents: 5904
diff changeset
1703 }
2ee7dcc77c63 7145024: Crashes in ucrypto related to C2
never
parents: 5904
diff changeset
1704 // walk the chain forward inserting to store list
2ee7dcc77c63 7145024: Crashes in ucrypto related to C2
never
parents: 5904
diff changeset
1705 while (start != NULL) {
2ee7dcc77c63 7145024: Crashes in ucrypto related to C2
never
parents: 5904
diff changeset
1706 stores->append(start);
2ee7dcc77c63 7145024: Crashes in ucrypto related to C2
never
parents: 5904
diff changeset
1707 start->set_processed();
2ee7dcc77c63 7145024: Crashes in ucrypto related to C2
never
parents: 5904
diff changeset
1708 start = start->next();
2ee7dcc77c63 7145024: Crashes in ucrypto related to C2
never
parents: 5904
diff changeset
1709 }
2ee7dcc77c63 7145024: Crashes in ucrypto related to C2
never
parents: 5904
diff changeset
1710 }
2ee7dcc77c63 7145024: Crashes in ucrypto related to C2
never
parents: 5904
diff changeset
1711 }
2ee7dcc77c63 7145024: Crashes in ucrypto related to C2
never
parents: 5904
diff changeset
1712 return stores;
2ee7dcc77c63 7145024: Crashes in ucrypto related to C2
never
parents: 5904
diff changeset
1713 }
2ee7dcc77c63 7145024: Crashes in ucrypto related to C2
never
parents: 5904
diff changeset
1714 };
2ee7dcc77c63 7145024: Crashes in ucrypto related to C2
never
parents: 5904
diff changeset
1715
6266
1d7922586cf6 7023639: JSR 292 method handle invocation needs a fast path for compiled code
twisti
parents: 5907
diff changeset
1716 static void verify_oop_args(MacroAssembler* masm,
6790
2cb2f30450c7 7196262: JSR 292: java/lang/invoke/PrivateInvokeTest.java fails on solaris-sparc
twisti
parents: 6739
diff changeset
1717 methodHandle method,
6266
1d7922586cf6 7023639: JSR 292 method handle invocation needs a fast path for compiled code
twisti
parents: 5907
diff changeset
1718 const BasicType* sig_bt,
1d7922586cf6 7023639: JSR 292 method handle invocation needs a fast path for compiled code
twisti
parents: 5907
diff changeset
1719 const VMRegPair* regs) {
1d7922586cf6 7023639: JSR 292 method handle invocation needs a fast path for compiled code
twisti
parents: 5907
diff changeset
1720 Register temp_reg = rbx; // not part of any compiled calling seq
1d7922586cf6 7023639: JSR 292 method handle invocation needs a fast path for compiled code
twisti
parents: 5907
diff changeset
1721 if (VerifyOops) {
6790
2cb2f30450c7 7196262: JSR 292: java/lang/invoke/PrivateInvokeTest.java fails on solaris-sparc
twisti
parents: 6739
diff changeset
1722 for (int i = 0; i < method->size_of_parameters(); i++) {
6266
1d7922586cf6 7023639: JSR 292 method handle invocation needs a fast path for compiled code
twisti
parents: 5907
diff changeset
1723 if (sig_bt[i] == T_OBJECT ||
1d7922586cf6 7023639: JSR 292 method handle invocation needs a fast path for compiled code
twisti
parents: 5907
diff changeset
1724 sig_bt[i] == T_ARRAY) {
1d7922586cf6 7023639: JSR 292 method handle invocation needs a fast path for compiled code
twisti
parents: 5907
diff changeset
1725 VMReg r = regs[i].first();
1d7922586cf6 7023639: JSR 292 method handle invocation needs a fast path for compiled code
twisti
parents: 5907
diff changeset
1726 assert(r->is_valid(), "bad oop arg");
1d7922586cf6 7023639: JSR 292 method handle invocation needs a fast path for compiled code
twisti
parents: 5907
diff changeset
1727 if (r->is_stack()) {
1d7922586cf6 7023639: JSR 292 method handle invocation needs a fast path for compiled code
twisti
parents: 5907
diff changeset
1728 __ movptr(temp_reg, Address(rsp, r->reg2stack() * VMRegImpl::stack_slot_size + wordSize));
1d7922586cf6 7023639: JSR 292 method handle invocation needs a fast path for compiled code
twisti
parents: 5907
diff changeset
1729 __ verify_oop(temp_reg);
1d7922586cf6 7023639: JSR 292 method handle invocation needs a fast path for compiled code
twisti
parents: 5907
diff changeset
1730 } else {
1d7922586cf6 7023639: JSR 292 method handle invocation needs a fast path for compiled code
twisti
parents: 5907
diff changeset
1731 __ verify_oop(r->as_Register());
1d7922586cf6 7023639: JSR 292 method handle invocation needs a fast path for compiled code
twisti
parents: 5907
diff changeset
1732 }
1d7922586cf6 7023639: JSR 292 method handle invocation needs a fast path for compiled code
twisti
parents: 5907
diff changeset
1733 }
1d7922586cf6 7023639: JSR 292 method handle invocation needs a fast path for compiled code
twisti
parents: 5907
diff changeset
1734 }
1d7922586cf6 7023639: JSR 292 method handle invocation needs a fast path for compiled code
twisti
parents: 5907
diff changeset
1735 }
1d7922586cf6 7023639: JSR 292 method handle invocation needs a fast path for compiled code
twisti
parents: 5907
diff changeset
1736 }
1d7922586cf6 7023639: JSR 292 method handle invocation needs a fast path for compiled code
twisti
parents: 5907
diff changeset
1737
1d7922586cf6 7023639: JSR 292 method handle invocation needs a fast path for compiled code
twisti
parents: 5907
diff changeset
1738 static void gen_special_dispatch(MacroAssembler* masm,
6790
2cb2f30450c7 7196262: JSR 292: java/lang/invoke/PrivateInvokeTest.java fails on solaris-sparc
twisti
parents: 6739
diff changeset
1739 methodHandle method,
6266
1d7922586cf6 7023639: JSR 292 method handle invocation needs a fast path for compiled code
twisti
parents: 5907
diff changeset
1740 const BasicType* sig_bt,
1d7922586cf6 7023639: JSR 292 method handle invocation needs a fast path for compiled code
twisti
parents: 5907
diff changeset
1741 const VMRegPair* regs) {
6790
2cb2f30450c7 7196262: JSR 292: java/lang/invoke/PrivateInvokeTest.java fails on solaris-sparc
twisti
parents: 6739
diff changeset
1742 verify_oop_args(masm, method, sig_bt, regs);
2cb2f30450c7 7196262: JSR 292: java/lang/invoke/PrivateInvokeTest.java fails on solaris-sparc
twisti
parents: 6739
diff changeset
1743 vmIntrinsics::ID iid = method->intrinsic_id();
6266
1d7922586cf6 7023639: JSR 292 method handle invocation needs a fast path for compiled code
twisti
parents: 5907
diff changeset
1744
1d7922586cf6 7023639: JSR 292 method handle invocation needs a fast path for compiled code
twisti
parents: 5907
diff changeset
1745 // Now write the args into the outgoing interpreter space
1d7922586cf6 7023639: JSR 292 method handle invocation needs a fast path for compiled code
twisti
parents: 5907
diff changeset
1746 bool has_receiver = false;
1d7922586cf6 7023639: JSR 292 method handle invocation needs a fast path for compiled code
twisti
parents: 5907
diff changeset
1747 Register receiver_reg = noreg;
1d7922586cf6 7023639: JSR 292 method handle invocation needs a fast path for compiled code
twisti
parents: 5907
diff changeset
1748 int member_arg_pos = -1;
1d7922586cf6 7023639: JSR 292 method handle invocation needs a fast path for compiled code
twisti
parents: 5907
diff changeset
1749 Register member_reg = noreg;
6790
2cb2f30450c7 7196262: JSR 292: java/lang/invoke/PrivateInvokeTest.java fails on solaris-sparc
twisti
parents: 6739
diff changeset
1750 int ref_kind = MethodHandles::signature_polymorphic_intrinsic_ref_kind(iid);
6266
1d7922586cf6 7023639: JSR 292 method handle invocation needs a fast path for compiled code
twisti
parents: 5907
diff changeset
1751 if (ref_kind != 0) {
6790
2cb2f30450c7 7196262: JSR 292: java/lang/invoke/PrivateInvokeTest.java fails on solaris-sparc
twisti
parents: 6739
diff changeset
1752 member_arg_pos = method->size_of_parameters() - 1; // trailing MemberName argument
6266
1d7922586cf6 7023639: JSR 292 method handle invocation needs a fast path for compiled code
twisti
parents: 5907
diff changeset
1753 member_reg = rbx; // known to be free at this point
1d7922586cf6 7023639: JSR 292 method handle invocation needs a fast path for compiled code
twisti
parents: 5907
diff changeset
1754 has_receiver = MethodHandles::ref_kind_has_receiver(ref_kind);
6790
2cb2f30450c7 7196262: JSR 292: java/lang/invoke/PrivateInvokeTest.java fails on solaris-sparc
twisti
parents: 6739
diff changeset
1755 } else if (iid == vmIntrinsics::_invokeBasic) {
6266
1d7922586cf6 7023639: JSR 292 method handle invocation needs a fast path for compiled code
twisti
parents: 5907
diff changeset
1756 has_receiver = true;
1d7922586cf6 7023639: JSR 292 method handle invocation needs a fast path for compiled code
twisti
parents: 5907
diff changeset
1757 } else {
6790
2cb2f30450c7 7196262: JSR 292: java/lang/invoke/PrivateInvokeTest.java fails on solaris-sparc
twisti
parents: 6739
diff changeset
1758 fatal(err_msg_res("unexpected intrinsic id %d", iid));
6266
1d7922586cf6 7023639: JSR 292 method handle invocation needs a fast path for compiled code
twisti
parents: 5907
diff changeset
1759 }
1d7922586cf6 7023639: JSR 292 method handle invocation needs a fast path for compiled code
twisti
parents: 5907
diff changeset
1760
1d7922586cf6 7023639: JSR 292 method handle invocation needs a fast path for compiled code
twisti
parents: 5907
diff changeset
1761 if (member_reg != noreg) {
1d7922586cf6 7023639: JSR 292 method handle invocation needs a fast path for compiled code
twisti
parents: 5907
diff changeset
1762 // Load the member_arg into register, if necessary.
6790
2cb2f30450c7 7196262: JSR 292: java/lang/invoke/PrivateInvokeTest.java fails on solaris-sparc
twisti
parents: 6739
diff changeset
1763 SharedRuntime::check_member_name_argument_is_last_argument(method, sig_bt, regs);
6266
1d7922586cf6 7023639: JSR 292 method handle invocation needs a fast path for compiled code
twisti
parents: 5907
diff changeset
1764 VMReg r = regs[member_arg_pos].first();
1d7922586cf6 7023639: JSR 292 method handle invocation needs a fast path for compiled code
twisti
parents: 5907
diff changeset
1765 if (r->is_stack()) {
1d7922586cf6 7023639: JSR 292 method handle invocation needs a fast path for compiled code
twisti
parents: 5907
diff changeset
1766 __ movptr(member_reg, Address(rsp, r->reg2stack() * VMRegImpl::stack_slot_size + wordSize));
1d7922586cf6 7023639: JSR 292 method handle invocation needs a fast path for compiled code
twisti
parents: 5907
diff changeset
1767 } else {
1d7922586cf6 7023639: JSR 292 method handle invocation needs a fast path for compiled code
twisti
parents: 5907
diff changeset
1768 // no data motion is needed
1d7922586cf6 7023639: JSR 292 method handle invocation needs a fast path for compiled code
twisti
parents: 5907
diff changeset
1769 member_reg = r->as_Register();
1d7922586cf6 7023639: JSR 292 method handle invocation needs a fast path for compiled code
twisti
parents: 5907
diff changeset
1770 }
1d7922586cf6 7023639: JSR 292 method handle invocation needs a fast path for compiled code
twisti
parents: 5907
diff changeset
1771 }
1d7922586cf6 7023639: JSR 292 method handle invocation needs a fast path for compiled code
twisti
parents: 5907
diff changeset
1772
1d7922586cf6 7023639: JSR 292 method handle invocation needs a fast path for compiled code
twisti
parents: 5907
diff changeset
1773 if (has_receiver) {
1d7922586cf6 7023639: JSR 292 method handle invocation needs a fast path for compiled code
twisti
parents: 5907
diff changeset
1774 // Make sure the receiver is loaded into a register.
6790
2cb2f30450c7 7196262: JSR 292: java/lang/invoke/PrivateInvokeTest.java fails on solaris-sparc
twisti
parents: 6739
diff changeset
1775 assert(method->size_of_parameters() > 0, "oob");
6266
1d7922586cf6 7023639: JSR 292 method handle invocation needs a fast path for compiled code
twisti
parents: 5907
diff changeset
1776 assert(sig_bt[0] == T_OBJECT, "receiver argument must be an object");
1d7922586cf6 7023639: JSR 292 method handle invocation needs a fast path for compiled code
twisti
parents: 5907
diff changeset
1777 VMReg r = regs[0].first();
1d7922586cf6 7023639: JSR 292 method handle invocation needs a fast path for compiled code
twisti
parents: 5907
diff changeset
1778 assert(r->is_valid(), "bad receiver arg");
1d7922586cf6 7023639: JSR 292 method handle invocation needs a fast path for compiled code
twisti
parents: 5907
diff changeset
1779 if (r->is_stack()) {
1d7922586cf6 7023639: JSR 292 method handle invocation needs a fast path for compiled code
twisti
parents: 5907
diff changeset
1780 // Porting note: This assumes that compiled calling conventions always
1d7922586cf6 7023639: JSR 292 method handle invocation needs a fast path for compiled code
twisti
parents: 5907
diff changeset
1781 // pass the receiver oop in a register. If this is not true on some
1d7922586cf6 7023639: JSR 292 method handle invocation needs a fast path for compiled code
twisti
parents: 5907
diff changeset
1782 // platform, pick a temp and load the receiver from stack.
6790
2cb2f30450c7 7196262: JSR 292: java/lang/invoke/PrivateInvokeTest.java fails on solaris-sparc
twisti
parents: 6739
diff changeset
1783 fatal("receiver always in a register");
6266
1d7922586cf6 7023639: JSR 292 method handle invocation needs a fast path for compiled code
twisti
parents: 5907
diff changeset
1784 receiver_reg = j_rarg0; // known to be free at this point
1d7922586cf6 7023639: JSR 292 method handle invocation needs a fast path for compiled code
twisti
parents: 5907
diff changeset
1785 __ movptr(receiver_reg, Address(rsp, r->reg2stack() * VMRegImpl::stack_slot_size + wordSize));
1d7922586cf6 7023639: JSR 292 method handle invocation needs a fast path for compiled code
twisti
parents: 5907
diff changeset
1786 } else {
1d7922586cf6 7023639: JSR 292 method handle invocation needs a fast path for compiled code
twisti
parents: 5907
diff changeset
1787 // no data motion is needed
1d7922586cf6 7023639: JSR 292 method handle invocation needs a fast path for compiled code
twisti
parents: 5907
diff changeset
1788 receiver_reg = r->as_Register();
1d7922586cf6 7023639: JSR 292 method handle invocation needs a fast path for compiled code
twisti
parents: 5907
diff changeset
1789 }
1d7922586cf6 7023639: JSR 292 method handle invocation needs a fast path for compiled code
twisti
parents: 5907
diff changeset
1790 }
1d7922586cf6 7023639: JSR 292 method handle invocation needs a fast path for compiled code
twisti
parents: 5907
diff changeset
1791
1d7922586cf6 7023639: JSR 292 method handle invocation needs a fast path for compiled code
twisti
parents: 5907
diff changeset
1792 // Figure out which address we are really jumping to:
6790
2cb2f30450c7 7196262: JSR 292: java/lang/invoke/PrivateInvokeTest.java fails on solaris-sparc
twisti
parents: 6739
diff changeset
1793 MethodHandles::generate_method_handle_dispatch(masm, iid,
6266
1d7922586cf6 7023639: JSR 292 method handle invocation needs a fast path for compiled code
twisti
parents: 5907
diff changeset
1794 receiver_reg, member_reg, /*for_compiler_entry:*/ true);
1d7922586cf6 7023639: JSR 292 method handle invocation needs a fast path for compiled code
twisti
parents: 5907
diff changeset
1795 }
5905
2ee7dcc77c63 7145024: Crashes in ucrypto related to C2
never
parents: 5904
diff changeset
1796
0
a61af66fc99e Initial load
duke
parents:
diff changeset
1797 // ---------------------------------------------------------------------------
a61af66fc99e Initial load
duke
parents:
diff changeset
1798 // Generate a native wrapper for a given method. The method takes arguments
a61af66fc99e Initial load
duke
parents:
diff changeset
1799 // in the Java compiled code convention, marshals them to the native
a61af66fc99e Initial load
duke
parents:
diff changeset
1800 // convention (handlizes oops, etc), transitions to native, makes the call,
a61af66fc99e Initial load
duke
parents:
diff changeset
1801 // returns to java state (possibly blocking), unhandlizes any result and
a61af66fc99e Initial load
duke
parents:
diff changeset
1802 // returns.
6266
1d7922586cf6 7023639: JSR 292 method handle invocation needs a fast path for compiled code
twisti
parents: 5907
diff changeset
1803 //
1d7922586cf6 7023639: JSR 292 method handle invocation needs a fast path for compiled code
twisti
parents: 5907
diff changeset
1804 // Critical native functions are a shorthand for the use of
1d7922586cf6 7023639: JSR 292 method handle invocation needs a fast path for compiled code
twisti
parents: 5907
diff changeset
1805 // GetPrimtiveArrayCritical and disallow the use of any other JNI
1d7922586cf6 7023639: JSR 292 method handle invocation needs a fast path for compiled code
twisti
parents: 5907
diff changeset
1806 // functions. The wrapper is expected to unpack the arguments before
1d7922586cf6 7023639: JSR 292 method handle invocation needs a fast path for compiled code
twisti
parents: 5907
diff changeset
1807 // passing them to the callee and perform checks before and after the
1d7922586cf6 7023639: JSR 292 method handle invocation needs a fast path for compiled code
twisti
parents: 5907
diff changeset
1808 // native call to ensure that they GC_locker
1d7922586cf6 7023639: JSR 292 method handle invocation needs a fast path for compiled code
twisti
parents: 5907
diff changeset
1809 // lock_critical/unlock_critical semantics are followed. Some other
1d7922586cf6 7023639: JSR 292 method handle invocation needs a fast path for compiled code
twisti
parents: 5907
diff changeset
1810 // parts of JNI setup are skipped like the tear down of the JNI handle
1d7922586cf6 7023639: JSR 292 method handle invocation needs a fast path for compiled code
twisti
parents: 5907
diff changeset
1811 // block and the check for pending exceptions it's impossible for them
1d7922586cf6 7023639: JSR 292 method handle invocation needs a fast path for compiled code
twisti
parents: 5907
diff changeset
1812 // to be thrown.
1d7922586cf6 7023639: JSR 292 method handle invocation needs a fast path for compiled code
twisti
parents: 5907
diff changeset
1813 //
1d7922586cf6 7023639: JSR 292 method handle invocation needs a fast path for compiled code
twisti
parents: 5907
diff changeset
1814 // They are roughly structured like this:
1d7922586cf6 7023639: JSR 292 method handle invocation needs a fast path for compiled code
twisti
parents: 5907
diff changeset
1815 // if (GC_locker::needs_gc())
1d7922586cf6 7023639: JSR 292 method handle invocation needs a fast path for compiled code
twisti
parents: 5907
diff changeset
1816 // SharedRuntime::block_for_jni_critical();
1d7922586cf6 7023639: JSR 292 method handle invocation needs a fast path for compiled code
twisti
parents: 5907
diff changeset
1817 // tranistion to thread_in_native
1d7922586cf6 7023639: JSR 292 method handle invocation needs a fast path for compiled code
twisti
parents: 5907
diff changeset
1818 // unpack arrray arguments and call native entry point
1d7922586cf6 7023639: JSR 292 method handle invocation needs a fast path for compiled code
twisti
parents: 5907
diff changeset
1819 // check for safepoint in progress
1d7922586cf6 7023639: JSR 292 method handle invocation needs a fast path for compiled code
twisti
parents: 5907
diff changeset
1820 // check if any thread suspend flags are set
1d7922586cf6 7023639: JSR 292 method handle invocation needs a fast path for compiled code
twisti
parents: 5907
diff changeset
1821 // call into JVM and possible unlock the JNI critical
1d7922586cf6 7023639: JSR 292 method handle invocation needs a fast path for compiled code
twisti
parents: 5907
diff changeset
1822 // if a GC was suppressed while in the critical native.
1d7922586cf6 7023639: JSR 292 method handle invocation needs a fast path for compiled code
twisti
parents: 5907
diff changeset
1823 // transition back to thread_in_Java
1d7922586cf6 7023639: JSR 292 method handle invocation needs a fast path for compiled code
twisti
parents: 5907
diff changeset
1824 // return to caller
1d7922586cf6 7023639: JSR 292 method handle invocation needs a fast path for compiled code
twisti
parents: 5907
diff changeset
1825 //
1d7922586cf6 7023639: JSR 292 method handle invocation needs a fast path for compiled code
twisti
parents: 5907
diff changeset
1826 nmethod* SharedRuntime::generate_native_wrapper(MacroAssembler* masm,
0
a61af66fc99e Initial load
duke
parents:
diff changeset
1827 methodHandle method,
2405
3d58a4983660 7022998: JSR 292 recursive method handle calls inline themselves infinitely
twisti
parents: 2245
diff changeset
1828 int compile_id,
6266
1d7922586cf6 7023639: JSR 292 method handle invocation needs a fast path for compiled code
twisti
parents: 5907
diff changeset
1829 BasicType* in_sig_bt,
1d7922586cf6 7023639: JSR 292 method handle invocation needs a fast path for compiled code
twisti
parents: 5907
diff changeset
1830 VMRegPair* in_regs,
0
a61af66fc99e Initial load
duke
parents:
diff changeset
1831 BasicType ret_type) {
6266
1d7922586cf6 7023639: JSR 292 method handle invocation needs a fast path for compiled code
twisti
parents: 5907
diff changeset
1832 if (method->is_method_handle_intrinsic()) {
1d7922586cf6 7023639: JSR 292 method handle invocation needs a fast path for compiled code
twisti
parents: 5907
diff changeset
1833 vmIntrinsics::ID iid = method->intrinsic_id();
1d7922586cf6 7023639: JSR 292 method handle invocation needs a fast path for compiled code
twisti
parents: 5907
diff changeset
1834 intptr_t start = (intptr_t)__ pc();
1d7922586cf6 7023639: JSR 292 method handle invocation needs a fast path for compiled code
twisti
parents: 5907
diff changeset
1835 int vep_offset = ((intptr_t)__ pc()) - start;
1d7922586cf6 7023639: JSR 292 method handle invocation needs a fast path for compiled code
twisti
parents: 5907
diff changeset
1836 gen_special_dispatch(masm,
6790
2cb2f30450c7 7196262: JSR 292: java/lang/invoke/PrivateInvokeTest.java fails on solaris-sparc
twisti
parents: 6739
diff changeset
1837 method,
6266
1d7922586cf6 7023639: JSR 292 method handle invocation needs a fast path for compiled code
twisti
parents: 5907
diff changeset
1838 in_sig_bt,
1d7922586cf6 7023639: JSR 292 method handle invocation needs a fast path for compiled code
twisti
parents: 5907
diff changeset
1839 in_regs);
1d7922586cf6 7023639: JSR 292 method handle invocation needs a fast path for compiled code
twisti
parents: 5907
diff changeset
1840 int frame_complete = ((intptr_t)__ pc()) - start; // not complete, period
1d7922586cf6 7023639: JSR 292 method handle invocation needs a fast path for compiled code
twisti
parents: 5907
diff changeset
1841 __ flush();
1d7922586cf6 7023639: JSR 292 method handle invocation needs a fast path for compiled code
twisti
parents: 5907
diff changeset
1842 int stack_slots = SharedRuntime::out_preserve_stack_slots(); // no out slots at all, actually
1d7922586cf6 7023639: JSR 292 method handle invocation needs a fast path for compiled code
twisti
parents: 5907
diff changeset
1843 return nmethod::new_native_nmethod(method,
1d7922586cf6 7023639: JSR 292 method handle invocation needs a fast path for compiled code
twisti
parents: 5907
diff changeset
1844 compile_id,
1d7922586cf6 7023639: JSR 292 method handle invocation needs a fast path for compiled code
twisti
parents: 5907
diff changeset
1845 masm->code(),
1d7922586cf6 7023639: JSR 292 method handle invocation needs a fast path for compiled code
twisti
parents: 5907
diff changeset
1846 vep_offset,
1d7922586cf6 7023639: JSR 292 method handle invocation needs a fast path for compiled code
twisti
parents: 5907
diff changeset
1847 frame_complete,
1d7922586cf6 7023639: JSR 292 method handle invocation needs a fast path for compiled code
twisti
parents: 5907
diff changeset
1848 stack_slots / VMRegImpl::slots_per_word,
1d7922586cf6 7023639: JSR 292 method handle invocation needs a fast path for compiled code
twisti
parents: 5907
diff changeset
1849 in_ByteSize(-1),
1d7922586cf6 7023639: JSR 292 method handle invocation needs a fast path for compiled code
twisti
parents: 5907
diff changeset
1850 in_ByteSize(-1),
1d7922586cf6 7023639: JSR 292 method handle invocation needs a fast path for compiled code
twisti
parents: 5907
diff changeset
1851 (OopMapSet*)NULL);
1d7922586cf6 7023639: JSR 292 method handle invocation needs a fast path for compiled code
twisti
parents: 5907
diff changeset
1852 }
4873
0382d2b469b2 7013347: allow crypto functions to be called inline to enhance performance
never
parents: 4057
diff changeset
1853 bool is_critical_native = true;
0382d2b469b2 7013347: allow crypto functions to be called inline to enhance performance
never
parents: 4057
diff changeset
1854 address native_func = method->critical_native_function();
0382d2b469b2 7013347: allow crypto functions to be called inline to enhance performance
never
parents: 4057
diff changeset
1855 if (native_func == NULL) {
0382d2b469b2 7013347: allow crypto functions to be called inline to enhance performance
never
parents: 4057
diff changeset
1856 native_func = method->native_function();
0382d2b469b2 7013347: allow crypto functions to be called inline to enhance performance
never
parents: 4057
diff changeset
1857 is_critical_native = false;
0382d2b469b2 7013347: allow crypto functions to be called inline to enhance performance
never
parents: 4057
diff changeset
1858 }
0382d2b469b2 7013347: allow crypto functions to be called inline to enhance performance
never
parents: 4057
diff changeset
1859 assert(native_func != NULL, "must have function");
0382d2b469b2 7013347: allow crypto functions to be called inline to enhance performance
never
parents: 4057
diff changeset
1860
0
a61af66fc99e Initial load
duke
parents:
diff changeset
1861 // An OopMap for lock (and class if static)
a61af66fc99e Initial load
duke
parents:
diff changeset
1862 OopMapSet *oop_maps = new OopMapSet();
a61af66fc99e Initial load
duke
parents:
diff changeset
1863 intptr_t start = (intptr_t)__ pc();
a61af66fc99e Initial load
duke
parents:
diff changeset
1864
a61af66fc99e Initial load
duke
parents:
diff changeset
1865 // We have received a description of where all the java arg are located
a61af66fc99e Initial load
duke
parents:
diff changeset
1866 // on entry to the wrapper. We need to convert these args to where
a61af66fc99e Initial load
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parents:
diff changeset
1867 // the jni function will expect them. To figure out where they go
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parents:
diff changeset
1868 // we convert the java signature to a C signature by inserting
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parents:
diff changeset
1869 // the hidden arguments as arg[0] and possibly arg[1] (static method)
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diff changeset
1870
6790
2cb2f30450c7 7196262: JSR 292: java/lang/invoke/PrivateInvokeTest.java fails on solaris-sparc
twisti
parents: 6739
diff changeset
1871 const int total_in_args = method->size_of_parameters();
4873
0382d2b469b2 7013347: allow crypto functions to be called inline to enhance performance
never
parents: 4057
diff changeset
1872 int total_c_args = total_in_args;
0382d2b469b2 7013347: allow crypto functions to be called inline to enhance performance
never
parents: 4057
diff changeset
1873 if (!is_critical_native) {
0382d2b469b2 7013347: allow crypto functions to be called inline to enhance performance
never
parents: 4057
diff changeset
1874 total_c_args += 1;
0382d2b469b2 7013347: allow crypto functions to be called inline to enhance performance
never
parents: 4057
diff changeset
1875 if (method->is_static()) {
0382d2b469b2 7013347: allow crypto functions to be called inline to enhance performance
never
parents: 4057
diff changeset
1876 total_c_args++;
0382d2b469b2 7013347: allow crypto functions to be called inline to enhance performance
never
parents: 4057
diff changeset
1877 }
0382d2b469b2 7013347: allow crypto functions to be called inline to enhance performance
never
parents: 4057
diff changeset
1878 } else {
0382d2b469b2 7013347: allow crypto functions to be called inline to enhance performance
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parents: 4057
diff changeset
1879 for (int i = 0; i < total_in_args; i++) {
0382d2b469b2 7013347: allow crypto functions to be called inline to enhance performance
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parents: 4057
diff changeset
1880 if (in_sig_bt[i] == T_ARRAY) {
0382d2b469b2 7013347: allow crypto functions to be called inline to enhance performance
never
parents: 4057
diff changeset
1881 total_c_args++;
0382d2b469b2 7013347: allow crypto functions to be called inline to enhance performance
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parents: 4057
diff changeset
1882 }
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diff changeset
1883 }
0
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1884 }
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1885
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1886 BasicType* out_sig_bt = NEW_RESOURCE_ARRAY(BasicType, total_c_args);
4873
0382d2b469b2 7013347: allow crypto functions to be called inline to enhance performance
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parents: 4057
diff changeset
1887 VMRegPair* out_regs = NEW_RESOURCE_ARRAY(VMRegPair, total_c_args);
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diff changeset
1888 BasicType* in_elem_bt = NULL;
0
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1889
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diff changeset
1890 int argc = 0;
4873
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diff changeset
1891 if (!is_critical_native) {
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diff changeset
1892 out_sig_bt[argc++] = T_ADDRESS;
0382d2b469b2 7013347: allow crypto functions to be called inline to enhance performance
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parents: 4057
diff changeset
1893 if (method->is_static()) {
0382d2b469b2 7013347: allow crypto functions to be called inline to enhance performance
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diff changeset
1894 out_sig_bt[argc++] = T_OBJECT;
0382d2b469b2 7013347: allow crypto functions to be called inline to enhance performance
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parents: 4057
diff changeset
1895 }
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diff changeset
1896
0382d2b469b2 7013347: allow crypto functions to be called inline to enhance performance
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parents: 4057
diff changeset
1897 for (int i = 0; i < total_in_args ; i++ ) {
0382d2b469b2 7013347: allow crypto functions to be called inline to enhance performance
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parents: 4057
diff changeset
1898 out_sig_bt[argc++] = in_sig_bt[i];
0382d2b469b2 7013347: allow crypto functions to be called inline to enhance performance
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parents: 4057
diff changeset
1899 }
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parents: 4057
diff changeset
1900 } else {
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diff changeset
1901 Thread* THREAD = Thread::current();
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never
parents: 4057
diff changeset
1902 in_elem_bt = NEW_RESOURCE_ARRAY(BasicType, total_in_args);
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never
parents: 4057
diff changeset
1903 SignatureStream ss(method->signature());
0382d2b469b2 7013347: allow crypto functions to be called inline to enhance performance
never
parents: 4057
diff changeset
1904 for (int i = 0; i < total_in_args ; i++ ) {
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never
parents: 4057
diff changeset
1905 if (in_sig_bt[i] == T_ARRAY) {
0382d2b469b2 7013347: allow crypto functions to be called inline to enhance performance
never
parents: 4057
diff changeset
1906 // Arrays are passed as int, elem* pair
0382d2b469b2 7013347: allow crypto functions to be called inline to enhance performance
never
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diff changeset
1907 out_sig_bt[argc++] = T_INT;
0382d2b469b2 7013347: allow crypto functions to be called inline to enhance performance
never
parents: 4057
diff changeset
1908 out_sig_bt[argc++] = T_ADDRESS;
0382d2b469b2 7013347: allow crypto functions to be called inline to enhance performance
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parents: 4057
diff changeset
1909 Symbol* atype = ss.as_symbol(CHECK_NULL);
0382d2b469b2 7013347: allow crypto functions to be called inline to enhance performance
never
parents: 4057
diff changeset
1910 const char* at = atype->as_C_string();
0382d2b469b2 7013347: allow crypto functions to be called inline to enhance performance
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parents: 4057
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1911 if (strlen(at) == 2) {
0382d2b469b2 7013347: allow crypto functions to be called inline to enhance performance
never
parents: 4057
diff changeset
1912 assert(at[0] == '[', "must be");
0382d2b469b2 7013347: allow crypto functions to be called inline to enhance performance
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parents: 4057
diff changeset
1913 switch (at[1]) {
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never
parents: 4057
diff changeset
1914 case 'B': in_elem_bt[i] = T_BYTE; break;
0382d2b469b2 7013347: allow crypto functions to be called inline to enhance performance
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parents: 4057
diff changeset
1915 case 'C': in_elem_bt[i] = T_CHAR; break;
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parents: 4057
diff changeset
1916 case 'D': in_elem_bt[i] = T_DOUBLE; break;
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parents: 4057
diff changeset
1917 case 'F': in_elem_bt[i] = T_FLOAT; break;
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diff changeset
1918 case 'I': in_elem_bt[i] = T_INT; break;
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parents: 4057
diff changeset
1919 case 'J': in_elem_bt[i] = T_LONG; break;
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diff changeset
1920 case 'S': in_elem_bt[i] = T_SHORT; break;
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diff changeset
1921 case 'Z': in_elem_bt[i] = T_BOOLEAN; break;
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parents: 4057
diff changeset
1922 default: ShouldNotReachHere();
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never
parents: 4057
diff changeset
1923 }
0382d2b469b2 7013347: allow crypto functions to be called inline to enhance performance
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parents: 4057
diff changeset
1924 }
0382d2b469b2 7013347: allow crypto functions to be called inline to enhance performance
never
parents: 4057
diff changeset
1925 } else {
0382d2b469b2 7013347: allow crypto functions to be called inline to enhance performance
never
parents: 4057
diff changeset
1926 out_sig_bt[argc++] = in_sig_bt[i];
0382d2b469b2 7013347: allow crypto functions to be called inline to enhance performance
never
parents: 4057
diff changeset
1927 in_elem_bt[i] = T_VOID;
0382d2b469b2 7013347: allow crypto functions to be called inline to enhance performance
never
parents: 4057
diff changeset
1928 }
0382d2b469b2 7013347: allow crypto functions to be called inline to enhance performance
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parents: 4057
diff changeset
1929 if (in_sig_bt[i] != T_VOID) {
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parents: 4057
diff changeset
1930 assert(in_sig_bt[i] == ss.type(), "must match");
0382d2b469b2 7013347: allow crypto functions to be called inline to enhance performance
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diff changeset
1931 ss.next();
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diff changeset
1932 }
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1933 }
0
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1934 }
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1935
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1936 // Now figure out where the args must be stored and how much stack space
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diff changeset
1937 // they require.
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diff changeset
1938 int out_arg_slots;
14416
6a936747b569 8024344: PPC64 (part 112): C argument in register AND stack slot.
goetz
parents: 10998
diff changeset
1939 out_arg_slots = c_calling_convention(out_sig_bt, out_regs, NULL, total_c_args);
0
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1940
a61af66fc99e Initial load
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diff changeset
1941 // Compute framesize for the wrapper. We need to handlize all oops in
a61af66fc99e Initial load
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diff changeset
1942 // incoming registers
a61af66fc99e Initial load
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1943
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1944 // Calculate the total number of stack slots we will need.
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1945
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diff changeset
1946 // First count the abi requirement plus all of the outgoing args
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diff changeset
1947 int stack_slots = SharedRuntime::out_preserve_stack_slots() + out_arg_slots;
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diff changeset
1948
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diff changeset
1949 // Now the space for the inbound oop handle area
4873
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diff changeset
1950 int total_save_slots = 6 * VMRegImpl::slots_per_word; // 6 arguments passed in registers
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diff changeset
1951 if (is_critical_native) {
0382d2b469b2 7013347: allow crypto functions to be called inline to enhance performance
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diff changeset
1952 // Critical natives may have to call out so they need a save area
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never
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diff changeset
1953 // for register arguments.
0382d2b469b2 7013347: allow crypto functions to be called inline to enhance performance
never
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diff changeset
1954 int double_slots = 0;
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diff changeset
1955 int single_slots = 0;
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diff changeset
1956 for ( int i = 0; i < total_in_args; i++) {
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diff changeset
1957 if (in_regs[i].first()->is_Register()) {
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diff changeset
1958 const Register reg = in_regs[i].first()->as_Register();
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diff changeset
1959 switch (in_sig_bt[i]) {
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diff changeset
1960 case T_BOOLEAN:
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diff changeset
1961 case T_BYTE:
0382d2b469b2 7013347: allow crypto functions to be called inline to enhance performance
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diff changeset
1962 case T_SHORT:
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diff changeset
1963 case T_CHAR:
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diff changeset
1964 case T_INT: single_slots++; break;
6266
1d7922586cf6 7023639: JSR 292 method handle invocation needs a fast path for compiled code
twisti
parents: 5907
diff changeset
1965 case T_ARRAY: // specific to LP64 (7145024)
4873
0382d2b469b2 7013347: allow crypto functions to be called inline to enhance performance
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diff changeset
1966 case T_LONG: double_slots++; break;
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diff changeset
1967 default: ShouldNotReachHere();
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diff changeset
1968 }
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diff changeset
1969 } else if (in_regs[i].first()->is_XMMRegister()) {
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diff changeset
1970 switch (in_sig_bt[i]) {
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never
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diff changeset
1971 case T_FLOAT: single_slots++; break;
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never
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diff changeset
1972 case T_DOUBLE: double_slots++; break;
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diff changeset
1973 default: ShouldNotReachHere();
0382d2b469b2 7013347: allow crypto functions to be called inline to enhance performance
never
parents: 4057
diff changeset
1974 }
0382d2b469b2 7013347: allow crypto functions to be called inline to enhance performance
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diff changeset
1975 } else if (in_regs[i].first()->is_FloatRegister()) {
0382d2b469b2 7013347: allow crypto functions to be called inline to enhance performance
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diff changeset
1976 ShouldNotReachHere();
0382d2b469b2 7013347: allow crypto functions to be called inline to enhance performance
never
parents: 4057
diff changeset
1977 }
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never
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diff changeset
1978 }
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diff changeset
1979 total_save_slots = double_slots * 2 + single_slots;
0382d2b469b2 7013347: allow crypto functions to be called inline to enhance performance
never
parents: 4057
diff changeset
1980 // align the save area
0382d2b469b2 7013347: allow crypto functions to be called inline to enhance performance
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diff changeset
1981 if (double_slots != 0) {
0382d2b469b2 7013347: allow crypto functions to be called inline to enhance performance
never
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diff changeset
1982 stack_slots = round_to(stack_slots, 2);
0382d2b469b2 7013347: allow crypto functions to be called inline to enhance performance
never
parents: 4057
diff changeset
1983 }
0382d2b469b2 7013347: allow crypto functions to be called inline to enhance performance
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diff changeset
1984 }
0
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diff changeset
1985
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diff changeset
1986 int oop_handle_offset = stack_slots;
4873
0382d2b469b2 7013347: allow crypto functions to be called inline to enhance performance
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parents: 4057
diff changeset
1987 stack_slots += total_save_slots;
0
a61af66fc99e Initial load
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parents:
diff changeset
1988
a61af66fc99e Initial load
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parents:
diff changeset
1989 // Now any space we need for handlizing a klass if static method
a61af66fc99e Initial load
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parents:
diff changeset
1990
a61af66fc99e Initial load
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parents:
diff changeset
1991 int klass_slot_offset = 0;
a61af66fc99e Initial load
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parents:
diff changeset
1992 int klass_offset = -1;
a61af66fc99e Initial load
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parents:
diff changeset
1993 int lock_slot_offset = 0;
a61af66fc99e Initial load
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parents:
diff changeset
1994 bool is_static = false;
a61af66fc99e Initial load
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parents:
diff changeset
1995
a61af66fc99e Initial load
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parents:
diff changeset
1996 if (method->is_static()) {
a61af66fc99e Initial load
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parents:
diff changeset
1997 klass_slot_offset = stack_slots;
a61af66fc99e Initial load
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parents:
diff changeset
1998 stack_slots += VMRegImpl::slots_per_word;
a61af66fc99e Initial load
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parents:
diff changeset
1999 klass_offset = klass_slot_offset * VMRegImpl::stack_slot_size;
a61af66fc99e Initial load
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parents:
diff changeset
2000 is_static = true;
a61af66fc99e Initial load
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parents:
diff changeset
2001 }
a61af66fc99e Initial load
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parents:
diff changeset
2002
a61af66fc99e Initial load
duke
parents:
diff changeset
2003 // Plus a lock if needed
a61af66fc99e Initial load
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parents:
diff changeset
2004
a61af66fc99e Initial load
duke
parents:
diff changeset
2005 if (method->is_synchronized()) {
a61af66fc99e Initial load
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parents:
diff changeset
2006 lock_slot_offset = stack_slots;
a61af66fc99e Initial load
duke
parents:
diff changeset
2007 stack_slots += VMRegImpl::slots_per_word;
a61af66fc99e Initial load
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parents:
diff changeset
2008 }
a61af66fc99e Initial load
duke
parents:
diff changeset
2009
a61af66fc99e Initial load
duke
parents:
diff changeset
2010 // Now a place (+2) to save return values or temp during shuffling
a61af66fc99e Initial load
duke
parents:
diff changeset
2011 // + 4 for return address (which we own) and saved rbp
a61af66fc99e Initial load
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parents:
diff changeset
2012 stack_slots += 6;
a61af66fc99e Initial load
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parents:
diff changeset
2013
a61af66fc99e Initial load
duke
parents:
diff changeset
2014 // Ok The space we have allocated will look like:
a61af66fc99e Initial load
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parents:
diff changeset
2015 //
a61af66fc99e Initial load
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parents:
diff changeset
2016 //
a61af66fc99e Initial load
duke
parents:
diff changeset
2017 // FP-> | |
a61af66fc99e Initial load
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parents:
diff changeset
2018 // |---------------------|
a61af66fc99e Initial load
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parents:
diff changeset
2019 // | 2 slots for moves |
a61af66fc99e Initial load
duke
parents:
diff changeset
2020 // |---------------------|
a61af66fc99e Initial load
duke
parents:
diff changeset
2021 // | lock box (if sync) |
a61af66fc99e Initial load
duke
parents:
diff changeset
2022 // |---------------------| <- lock_slot_offset
a61af66fc99e Initial load
duke
parents:
diff changeset
2023 // | klass (if static) |
a61af66fc99e Initial load
duke
parents:
diff changeset
2024 // |---------------------| <- klass_slot_offset
a61af66fc99e Initial load
duke
parents:
diff changeset
2025 // | oopHandle area |
a61af66fc99e Initial load
duke
parents:
diff changeset
2026 // |---------------------| <- oop_handle_offset (6 java arg registers)
a61af66fc99e Initial load
duke
parents:
diff changeset
2027 // | outbound memory |
a61af66fc99e Initial load
duke
parents:
diff changeset
2028 // | based arguments |
a61af66fc99e Initial load
duke
parents:
diff changeset
2029 // | |
a61af66fc99e Initial load
duke
parents:
diff changeset
2030 // |---------------------|
a61af66fc99e Initial load
duke
parents:
diff changeset
2031 // | |
a61af66fc99e Initial load
duke
parents:
diff changeset
2032 // SP-> | out_preserved_slots |
a61af66fc99e Initial load
duke
parents:
diff changeset
2033 //
a61af66fc99e Initial load
duke
parents:
diff changeset
2034 //
a61af66fc99e Initial load
duke
parents:
diff changeset
2035
a61af66fc99e Initial load
duke
parents:
diff changeset
2036
a61af66fc99e Initial load
duke
parents:
diff changeset
2037 // Now compute actual number of stack words we need rounding to make
a61af66fc99e Initial load
duke
parents:
diff changeset
2038 // stack properly aligned.
524
c9004fe53695 6792301: StackAlignmentInBytes not honored for compiled native methods
xlu
parents: 520
diff changeset
2039 stack_slots = round_to(stack_slots, StackAlignmentInSlots);
0
a61af66fc99e Initial load
duke
parents:
diff changeset
2040
a61af66fc99e Initial load
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parents:
diff changeset
2041 int stack_size = stack_slots * VMRegImpl::stack_slot_size;
a61af66fc99e Initial load
duke
parents:
diff changeset
2042
a61af66fc99e Initial load
duke
parents:
diff changeset
2043 // First thing make an ic check to see if we should even be here
a61af66fc99e Initial load
duke
parents:
diff changeset
2044
a61af66fc99e Initial load
duke
parents:
diff changeset
2045 // We are free to use all registers as temps without saving them and
a61af66fc99e Initial load
duke
parents:
diff changeset
2046 // restoring them except rbp. rbp is the only callee save register
a61af66fc99e Initial load
duke
parents:
diff changeset
2047 // as far as the interpreter and the compiler(s) are concerned.
a61af66fc99e Initial load
duke
parents:
diff changeset
2048
a61af66fc99e Initial load
duke
parents:
diff changeset
2049
a61af66fc99e Initial load
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parents:
diff changeset
2050 const Register ic_reg = rax;
a61af66fc99e Initial load
duke
parents:
diff changeset
2051 const Register receiver = j_rarg0;
a61af66fc99e Initial load
duke
parents:
diff changeset
2052
4873
0382d2b469b2 7013347: allow crypto functions to be called inline to enhance performance
never
parents: 4057
diff changeset
2053 Label hit;
0
a61af66fc99e Initial load
duke
parents:
diff changeset
2054 Label exception_pending;
a61af66fc99e Initial load
duke
parents:
diff changeset
2055
848
fe95187e8882 6859338: amd64 native unverified entry point pushes values before implicit null check
never
parents: 682
diff changeset
2056 assert_different_registers(ic_reg, receiver, rscratch1);
0
a61af66fc99e Initial load
duke
parents:
diff changeset
2057 __ verify_oop(receiver);
848
fe95187e8882 6859338: amd64 native unverified entry point pushes values before implicit null check
never
parents: 682
diff changeset
2058 __ load_klass(rscratch1, receiver);
fe95187e8882 6859338: amd64 native unverified entry point pushes values before implicit null check
never
parents: 682
diff changeset
2059 __ cmpq(ic_reg, rscratch1);
4873
0382d2b469b2 7013347: allow crypto functions to be called inline to enhance performance
never
parents: 4057
diff changeset
2060 __ jcc(Assembler::equal, hit);
0
a61af66fc99e Initial load
duke
parents:
diff changeset
2061
a61af66fc99e Initial load
duke
parents:
diff changeset
2062 __ jump(RuntimeAddress(SharedRuntime::get_ic_miss_stub()));
a61af66fc99e Initial load
duke
parents:
diff changeset
2063
a61af66fc99e Initial load
duke
parents:
diff changeset
2064 // Verified entry point must be aligned
a61af66fc99e Initial load
duke
parents:
diff changeset
2065 __ align(8);
a61af66fc99e Initial load
duke
parents:
diff changeset
2066
4873
0382d2b469b2 7013347: allow crypto functions to be called inline to enhance performance
never
parents: 4057
diff changeset
2067 __ bind(hit);
0382d2b469b2 7013347: allow crypto functions to be called inline to enhance performance
never
parents: 4057
diff changeset
2068
0
a61af66fc99e Initial load
duke
parents:
diff changeset
2069 int vep_offset = ((intptr_t)__ pc()) - start;
a61af66fc99e Initial load
duke
parents:
diff changeset
2070
a61af66fc99e Initial load
duke
parents:
diff changeset
2071 // The instruction at the verified entry point must be 5 bytes or longer
a61af66fc99e Initial load
duke
parents:
diff changeset
2072 // because it can be patched on the fly by make_non_entrant. The stack bang
a61af66fc99e Initial load
duke
parents:
diff changeset
2073 // instruction fits that requirement.
a61af66fc99e Initial load
duke
parents:
diff changeset
2074
a61af66fc99e Initial load
duke
parents:
diff changeset
2075 // Generate stack overflow check
a61af66fc99e Initial load
duke
parents:
diff changeset
2076
a61af66fc99e Initial load
duke
parents:
diff changeset
2077 if (UseStackBanging) {
a61af66fc99e Initial load
duke
parents:
diff changeset
2078 __ bang_stack_with_offset(StackShadowPages*os::vm_page_size());
a61af66fc99e Initial load
duke
parents:
diff changeset
2079 } else {
a61af66fc99e Initial load
duke
parents:
diff changeset
2080 // need a 5 byte instruction to allow MT safe patching to non-entrant
a61af66fc99e Initial load
duke
parents:
diff changeset
2081 __ fat_nop();
a61af66fc99e Initial load
duke
parents:
diff changeset
2082 }
a61af66fc99e Initial load
duke
parents:
diff changeset
2083
a61af66fc99e Initial load
duke
parents:
diff changeset
2084 // Generate a new frame for the wrapper.
a61af66fc99e Initial load
duke
parents:
diff changeset
2085 __ enter();
a61af66fc99e Initial load
duke
parents:
diff changeset
2086 // -2 because return address is already present and so is saved rbp
304
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 196
diff changeset
2087 __ subptr(rsp, stack_size - 2*wordSize);
0
a61af66fc99e Initial load
duke
parents:
diff changeset
2088
4873
0382d2b469b2 7013347: allow crypto functions to be called inline to enhance performance
never
parents: 4057
diff changeset
2089 // Frame is now completed as far as size and linkage.
0382d2b469b2 7013347: allow crypto functions to be called inline to enhance performance
never
parents: 4057
diff changeset
2090 int frame_complete = ((intptr_t)__ pc()) - start;
0
a61af66fc99e Initial load
duke
parents:
diff changeset
2091
17780
606acabe7b5c 8031320: Use Intel RTM instructions for locks
kvn
parents: 14223
diff changeset
2092 if (UseRTMLocking) {
606acabe7b5c 8031320: Use Intel RTM instructions for locks
kvn
parents: 14223
diff changeset
2093 // Abort RTM transaction before calling JNI
606acabe7b5c 8031320: Use Intel RTM instructions for locks
kvn
parents: 14223
diff changeset
2094 // because critical section will be large and will be
606acabe7b5c 8031320: Use Intel RTM instructions for locks
kvn
parents: 14223
diff changeset
2095 // aborted anyway. Also nmethod could be deoptimized.
606acabe7b5c 8031320: Use Intel RTM instructions for locks
kvn
parents: 14223
diff changeset
2096 __ xabort(0);
606acabe7b5c 8031320: Use Intel RTM instructions for locks
kvn
parents: 14223
diff changeset
2097 }
606acabe7b5c 8031320: Use Intel RTM instructions for locks
kvn
parents: 14223
diff changeset
2098
0
a61af66fc99e Initial load
duke
parents:
diff changeset
2099 #ifdef ASSERT
a61af66fc99e Initial load
duke
parents:
diff changeset
2100 {
a61af66fc99e Initial load
duke
parents:
diff changeset
2101 Label L;
304
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 196
diff changeset
2102 __ mov(rax, rsp);
605
98cb887364d3 6810672: Comment typos
twisti
parents: 524
diff changeset
2103 __ andptr(rax, -16); // must be 16 byte boundary (see amd64 ABI)
304
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 196
diff changeset
2104 __ cmpptr(rax, rsp);
0
a61af66fc99e Initial load
duke
parents:
diff changeset
2105 __ jcc(Assembler::equal, L);
a61af66fc99e Initial load
duke
parents:
diff changeset
2106 __ stop("improperly aligned stack");
a61af66fc99e Initial load
duke
parents:
diff changeset
2107 __ bind(L);
a61af66fc99e Initial load
duke
parents:
diff changeset
2108 }
a61af66fc99e Initial load
duke
parents:
diff changeset
2109 #endif /* ASSERT */
a61af66fc99e Initial load
duke
parents:
diff changeset
2110
a61af66fc99e Initial load
duke
parents:
diff changeset
2111
a61af66fc99e Initial load
duke
parents:
diff changeset
2112 // We use r14 as the oop handle for the receiver/klass
a61af66fc99e Initial load
duke
parents:
diff changeset
2113 // It is callee save so it survives the call to native
a61af66fc99e Initial load
duke
parents:
diff changeset
2114
a61af66fc99e Initial load
duke
parents:
diff changeset
2115 const Register oop_handle_reg = r14;
a61af66fc99e Initial load
duke
parents:
diff changeset
2116
4873
0382d2b469b2 7013347: allow crypto functions to be called inline to enhance performance
never
parents: 4057
diff changeset
2117 if (is_critical_native) {
0382d2b469b2 7013347: allow crypto functions to be called inline to enhance performance
never
parents: 4057
diff changeset
2118 check_needs_gc_for_critical_native(masm, stack_slots, total_c_args, total_in_args,
0382d2b469b2 7013347: allow crypto functions to be called inline to enhance performance
never
parents: 4057
diff changeset
2119 oop_handle_offset, oop_maps, in_regs, in_sig_bt);
0382d2b469b2 7013347: allow crypto functions to be called inline to enhance performance
never
parents: 4057
diff changeset
2120 }
0
a61af66fc99e Initial load
duke
parents:
diff changeset
2121
a61af66fc99e Initial load
duke
parents:
diff changeset
2122 //
a61af66fc99e Initial load
duke
parents:
diff changeset
2123 // We immediately shuffle the arguments so that any vm call we have to
a61af66fc99e Initial load
duke
parents:
diff changeset
2124 // make from here on out (sync slow path, jvmti, etc.) we will have
a61af66fc99e Initial load
duke
parents:
diff changeset
2125 // captured the oops from our caller and have a valid oopMap for
a61af66fc99e Initial load
duke
parents:
diff changeset
2126 // them.
a61af66fc99e Initial load
duke
parents:
diff changeset
2127
a61af66fc99e Initial load
duke
parents:
diff changeset
2128 // -----------------
a61af66fc99e Initial load
duke
parents:
diff changeset
2129 // The Grand Shuffle
a61af66fc99e Initial load
duke
parents:
diff changeset
2130
a61af66fc99e Initial load
duke
parents:
diff changeset
2131 // The Java calling convention is either equal (linux) or denser (win64) than the
a61af66fc99e Initial load
duke
parents:
diff changeset
2132 // c calling convention. However the because of the jni_env argument the c calling
a61af66fc99e Initial load
duke
parents:
diff changeset
2133 // convention always has at least one more (and two for static) arguments than Java.
a61af66fc99e Initial load
duke
parents:
diff changeset
2134 // Therefore if we move the args from java -> c backwards then we will never have
a61af66fc99e Initial load
duke
parents:
diff changeset
2135 // a register->register conflict and we don't have to build a dependency graph
a61af66fc99e Initial load
duke
parents:
diff changeset
2136 // and figure out how to break any cycles.
a61af66fc99e Initial load
duke
parents:
diff changeset
2137 //
a61af66fc99e Initial load
duke
parents:
diff changeset
2138
a61af66fc99e Initial load
duke
parents:
diff changeset
2139 // Record esp-based slot for receiver on stack for non-static methods
a61af66fc99e Initial load
duke
parents:
diff changeset
2140 int receiver_offset = -1;
a61af66fc99e Initial load
duke
parents:
diff changeset
2141
a61af66fc99e Initial load
duke
parents:
diff changeset
2142 // This is a trick. We double the stack slots so we can claim
a61af66fc99e Initial load
duke
parents:
diff changeset
2143 // the oops in the caller's frame. Since we are sure to have
a61af66fc99e Initial load
duke
parents:
diff changeset
2144 // more args than the caller doubling is enough to make
a61af66fc99e Initial load
duke
parents:
diff changeset
2145 // sure we can capture all the incoming oop args from the
a61af66fc99e Initial load
duke
parents:
diff changeset
2146 // caller.
a61af66fc99e Initial load
duke
parents:
diff changeset
2147 //
a61af66fc99e Initial load
duke
parents:
diff changeset
2148 OopMap* map = new OopMap(stack_slots * 2, 0 /* arg_slots*/);
a61af66fc99e Initial load
duke
parents:
diff changeset
2149
a61af66fc99e Initial load
duke
parents:
diff changeset
2150 // Mark location of rbp (someday)
a61af66fc99e Initial load
duke
parents:
diff changeset
2151 // map->set_callee_saved(VMRegImpl::stack2reg( stack_slots - 2), stack_slots * 2, 0, vmreg(rbp));
a61af66fc99e Initial load
duke
parents:
diff changeset
2152
a61af66fc99e Initial load
duke
parents:
diff changeset
2153 // Use eax, ebx as temporaries during any memory-memory moves we have to do
a61af66fc99e Initial load
duke
parents:
diff changeset
2154 // All inbound args are referenced based on rbp and all outbound args via rsp.
a61af66fc99e Initial load
duke
parents:
diff changeset
2155
a61af66fc99e Initial load
duke
parents:
diff changeset
2156
a61af66fc99e Initial load
duke
parents:
diff changeset
2157 #ifdef ASSERT
a61af66fc99e Initial load
duke
parents:
diff changeset
2158 bool reg_destroyed[RegisterImpl::number_of_registers];
a61af66fc99e Initial load
duke
parents:
diff changeset
2159 bool freg_destroyed[XMMRegisterImpl::number_of_registers];
a61af66fc99e Initial load
duke
parents:
diff changeset
2160 for ( int r = 0 ; r < RegisterImpl::number_of_registers ; r++ ) {
a61af66fc99e Initial load
duke
parents:
diff changeset
2161 reg_destroyed[r] = false;
a61af66fc99e Initial load
duke
parents:
diff changeset
2162 }
a61af66fc99e Initial load
duke
parents:
diff changeset
2163 for ( int f = 0 ; f < XMMRegisterImpl::number_of_registers ; f++ ) {
a61af66fc99e Initial load
duke
parents:
diff changeset
2164 freg_destroyed[f] = false;
a61af66fc99e Initial load
duke
parents:
diff changeset
2165 }
a61af66fc99e Initial load
duke
parents:
diff changeset
2166
a61af66fc99e Initial load
duke
parents:
diff changeset
2167 #endif /* ASSERT */
a61af66fc99e Initial load
duke
parents:
diff changeset
2168
4873
0382d2b469b2 7013347: allow crypto functions to be called inline to enhance performance
never
parents: 4057
diff changeset
2169 // This may iterate in two different directions depending on the
0382d2b469b2 7013347: allow crypto functions to be called inline to enhance performance
never
parents: 4057
diff changeset
2170 // kind of native it is. The reason is that for regular JNI natives
0382d2b469b2 7013347: allow crypto functions to be called inline to enhance performance
never
parents: 4057
diff changeset
2171 // the incoming and outgoing registers are offset upwards and for
0382d2b469b2 7013347: allow crypto functions to be called inline to enhance performance
never
parents: 4057
diff changeset
2172 // critical natives they are offset down.
5905
2ee7dcc77c63 7145024: Crashes in ucrypto related to C2
never
parents: 5904
diff changeset
2173 GrowableArray<int> arg_order(2 * total_in_args);
2ee7dcc77c63 7145024: Crashes in ucrypto related to C2
never
parents: 5904
diff changeset
2174 VMRegPair tmp_vmreg;
2ee7dcc77c63 7145024: Crashes in ucrypto related to C2
never
parents: 5904
diff changeset
2175 tmp_vmreg.set1(rbx->as_VMReg());
2ee7dcc77c63 7145024: Crashes in ucrypto related to C2
never
parents: 5904
diff changeset
2176
2ee7dcc77c63 7145024: Crashes in ucrypto related to C2
never
parents: 5904
diff changeset
2177 if (!is_critical_native) {
2ee7dcc77c63 7145024: Crashes in ucrypto related to C2
never
parents: 5904
diff changeset
2178 for (int i = total_in_args - 1, c_arg = total_c_args - 1; i >= 0; i--, c_arg--) {
2ee7dcc77c63 7145024: Crashes in ucrypto related to C2
never
parents: 5904
diff changeset
2179 arg_order.push(i);
2ee7dcc77c63 7145024: Crashes in ucrypto related to C2
never
parents: 5904
diff changeset
2180 arg_order.push(c_arg);
2ee7dcc77c63 7145024: Crashes in ucrypto related to C2
never
parents: 5904
diff changeset
2181 }
2ee7dcc77c63 7145024: Crashes in ucrypto related to C2
never
parents: 5904
diff changeset
2182 } else {
2ee7dcc77c63 7145024: Crashes in ucrypto related to C2
never
parents: 5904
diff changeset
2183 // Compute a valid move order, using tmp_vmreg to break any cycles
2ee7dcc77c63 7145024: Crashes in ucrypto related to C2
never
parents: 5904
diff changeset
2184 ComputeMoveOrder cmo(total_in_args, in_regs, total_c_args, out_regs, in_sig_bt, arg_order, tmp_vmreg);
4873
0382d2b469b2 7013347: allow crypto functions to be called inline to enhance performance
never
parents: 4057
diff changeset
2185 }
5905
2ee7dcc77c63 7145024: Crashes in ucrypto related to C2
never
parents: 5904
diff changeset
2186
2ee7dcc77c63 7145024: Crashes in ucrypto related to C2
never
parents: 5904
diff changeset
2187 int temploc = -1;
2ee7dcc77c63 7145024: Crashes in ucrypto related to C2
never
parents: 5904
diff changeset
2188 for (int ai = 0; ai < arg_order.length(); ai += 2) {
2ee7dcc77c63 7145024: Crashes in ucrypto related to C2
never
parents: 5904
diff changeset
2189 int i = arg_order.at(ai);
2ee7dcc77c63 7145024: Crashes in ucrypto related to C2
never
parents: 5904
diff changeset
2190 int c_arg = arg_order.at(ai + 1);
2ee7dcc77c63 7145024: Crashes in ucrypto related to C2
never
parents: 5904
diff changeset
2191 __ block_comment(err_msg("move %d -> %d", i, c_arg));
2ee7dcc77c63 7145024: Crashes in ucrypto related to C2
never
parents: 5904
diff changeset
2192 if (c_arg == -1) {
2ee7dcc77c63 7145024: Crashes in ucrypto related to C2
never
parents: 5904
diff changeset
2193 assert(is_critical_native, "should only be required for critical natives");
2ee7dcc77c63 7145024: Crashes in ucrypto related to C2
never
parents: 5904
diff changeset
2194 // This arg needs to be moved to a temporary
2ee7dcc77c63 7145024: Crashes in ucrypto related to C2
never
parents: 5904
diff changeset
2195 __ mov(tmp_vmreg.first()->as_Register(), in_regs[i].first()->as_Register());
2ee7dcc77c63 7145024: Crashes in ucrypto related to C2
never
parents: 5904
diff changeset
2196 in_regs[i] = tmp_vmreg;
2ee7dcc77c63 7145024: Crashes in ucrypto related to C2
never
parents: 5904
diff changeset
2197 temploc = i;
2ee7dcc77c63 7145024: Crashes in ucrypto related to C2
never
parents: 5904
diff changeset
2198 continue;
2ee7dcc77c63 7145024: Crashes in ucrypto related to C2
never
parents: 5904
diff changeset
2199 } else if (i == -1) {
2ee7dcc77c63 7145024: Crashes in ucrypto related to C2
never
parents: 5904
diff changeset
2200 assert(is_critical_native, "should only be required for critical natives");
2ee7dcc77c63 7145024: Crashes in ucrypto related to C2
never
parents: 5904
diff changeset
2201 // Read from the temporary location
2ee7dcc77c63 7145024: Crashes in ucrypto related to C2
never
parents: 5904
diff changeset
2202 assert(temploc != -1, "must be valid");
2ee7dcc77c63 7145024: Crashes in ucrypto related to C2
never
parents: 5904
diff changeset
2203 i = temploc;
2ee7dcc77c63 7145024: Crashes in ucrypto related to C2
never
parents: 5904
diff changeset
2204 temploc = -1;
2ee7dcc77c63 7145024: Crashes in ucrypto related to C2
never
parents: 5904
diff changeset
2205 }
0
a61af66fc99e Initial load
duke
parents:
diff changeset
2206 #ifdef ASSERT
a61af66fc99e Initial load
duke
parents:
diff changeset
2207 if (in_regs[i].first()->is_Register()) {
a61af66fc99e Initial load
duke
parents:
diff changeset
2208 assert(!reg_destroyed[in_regs[i].first()->as_Register()->encoding()], "destroyed reg!");
a61af66fc99e Initial load
duke
parents:
diff changeset
2209 } else if (in_regs[i].first()->is_XMMRegister()) {
a61af66fc99e Initial load
duke
parents:
diff changeset
2210 assert(!freg_destroyed[in_regs[i].first()->as_XMMRegister()->encoding()], "destroyed reg!");
a61af66fc99e Initial load
duke
parents:
diff changeset
2211 }
a61af66fc99e Initial load
duke
parents:
diff changeset
2212 if (out_regs[c_arg].first()->is_Register()) {
a61af66fc99e Initial load
duke
parents:
diff changeset
2213 reg_destroyed[out_regs[c_arg].first()->as_Register()->encoding()] = true;
a61af66fc99e Initial load
duke
parents:
diff changeset
2214 } else if (out_regs[c_arg].first()->is_XMMRegister()) {
a61af66fc99e Initial load
duke
parents:
diff changeset
2215 freg_destroyed[out_regs[c_arg].first()->as_XMMRegister()->encoding()] = true;
a61af66fc99e Initial load
duke
parents:
diff changeset
2216 }
a61af66fc99e Initial load
duke
parents:
diff changeset
2217 #endif /* ASSERT */
a61af66fc99e Initial load
duke
parents:
diff changeset
2218 switch (in_sig_bt[i]) {
a61af66fc99e Initial load
duke
parents:
diff changeset
2219 case T_ARRAY:
4873
0382d2b469b2 7013347: allow crypto functions to be called inline to enhance performance
never
parents: 4057
diff changeset
2220 if (is_critical_native) {
0382d2b469b2 7013347: allow crypto functions to be called inline to enhance performance
never
parents: 4057
diff changeset
2221 unpack_array_argument(masm, in_regs[i], in_elem_bt[i], out_regs[c_arg + 1], out_regs[c_arg]);
0382d2b469b2 7013347: allow crypto functions to be called inline to enhance performance
never
parents: 4057
diff changeset
2222 c_arg++;
0382d2b469b2 7013347: allow crypto functions to be called inline to enhance performance
never
parents: 4057
diff changeset
2223 #ifdef ASSERT
0382d2b469b2 7013347: allow crypto functions to be called inline to enhance performance
never
parents: 4057
diff changeset
2224 if (out_regs[c_arg].first()->is_Register()) {
0382d2b469b2 7013347: allow crypto functions to be called inline to enhance performance
never
parents: 4057
diff changeset
2225 reg_destroyed[out_regs[c_arg].first()->as_Register()->encoding()] = true;
0382d2b469b2 7013347: allow crypto functions to be called inline to enhance performance
never
parents: 4057
diff changeset
2226 } else if (out_regs[c_arg].first()->is_XMMRegister()) {
0382d2b469b2 7013347: allow crypto functions to be called inline to enhance performance
never
parents: 4057
diff changeset
2227 freg_destroyed[out_regs[c_arg].first()->as_XMMRegister()->encoding()] = true;
0382d2b469b2 7013347: allow crypto functions to be called inline to enhance performance
never
parents: 4057
diff changeset
2228 }
0382d2b469b2 7013347: allow crypto functions to be called inline to enhance performance
never
parents: 4057
diff changeset
2229 #endif
0382d2b469b2 7013347: allow crypto functions to be called inline to enhance performance
never
parents: 4057
diff changeset
2230 break;
0382d2b469b2 7013347: allow crypto functions to be called inline to enhance performance
never
parents: 4057
diff changeset
2231 }
0
a61af66fc99e Initial load
duke
parents:
diff changeset
2232 case T_OBJECT:
4873
0382d2b469b2 7013347: allow crypto functions to be called inline to enhance performance
never
parents: 4057
diff changeset
2233 assert(!is_critical_native, "no oop arguments");
0
a61af66fc99e Initial load
duke
parents:
diff changeset
2234 object_move(masm, map, oop_handle_offset, stack_slots, in_regs[i], out_regs[c_arg],
a61af66fc99e Initial load
duke
parents:
diff changeset
2235 ((i == 0) && (!is_static)),
a61af66fc99e Initial load
duke
parents:
diff changeset
2236 &receiver_offset);
a61af66fc99e Initial load
duke
parents:
diff changeset
2237 break;
a61af66fc99e Initial load
duke
parents:
diff changeset
2238 case T_VOID:
a61af66fc99e Initial load
duke
parents:
diff changeset
2239 break;
a61af66fc99e Initial load
duke
parents:
diff changeset
2240
a61af66fc99e Initial load
duke
parents:
diff changeset
2241 case T_FLOAT:
a61af66fc99e Initial load
duke
parents:
diff changeset
2242 float_move(masm, in_regs[i], out_regs[c_arg]);
a61af66fc99e Initial load
duke
parents:
diff changeset
2243 break;
a61af66fc99e Initial load
duke
parents:
diff changeset
2244
a61af66fc99e Initial load
duke
parents:
diff changeset
2245 case T_DOUBLE:
a61af66fc99e Initial load
duke
parents:
diff changeset
2246 assert( i + 1 < total_in_args &&
a61af66fc99e Initial load
duke
parents:
diff changeset
2247 in_sig_bt[i + 1] == T_VOID &&
a61af66fc99e Initial load
duke
parents:
diff changeset
2248 out_sig_bt[c_arg+1] == T_VOID, "bad arg list");
a61af66fc99e Initial load
duke
parents:
diff changeset
2249 double_move(masm, in_regs[i], out_regs[c_arg]);
a61af66fc99e Initial load
duke
parents:
diff changeset
2250 break;
a61af66fc99e Initial load
duke
parents:
diff changeset
2251
a61af66fc99e Initial load
duke
parents:
diff changeset
2252 case T_LONG :
a61af66fc99e Initial load
duke
parents:
diff changeset
2253 long_move(masm, in_regs[i], out_regs[c_arg]);
a61af66fc99e Initial load
duke
parents:
diff changeset
2254 break;
a61af66fc99e Initial load
duke
parents:
diff changeset
2255
a61af66fc99e Initial load
duke
parents:
diff changeset
2256 case T_ADDRESS: assert(false, "found T_ADDRESS in java args");
a61af66fc99e Initial load
duke
parents:
diff changeset
2257
a61af66fc99e Initial load
duke
parents:
diff changeset
2258 default:
a61af66fc99e Initial load
duke
parents:
diff changeset
2259 move32_64(masm, in_regs[i], out_regs[c_arg]);
a61af66fc99e Initial load
duke
parents:
diff changeset
2260 }
a61af66fc99e Initial load
duke
parents:
diff changeset
2261 }
a61af66fc99e Initial load
duke
parents:
diff changeset
2262
10998
e7f5651d459c 8003268: SharedRuntime::generate_native_wrapper doesn't save all registers across runtime tracing calls for JNI critical native methods
twisti
parents: 8873
diff changeset
2263 int c_arg;
0
a61af66fc99e Initial load
duke
parents:
diff changeset
2264
a61af66fc99e Initial load
duke
parents:
diff changeset
2265 // Pre-load a static method's oop into r14. Used both by locking code and
a61af66fc99e Initial load
duke
parents:
diff changeset
2266 // the normal JNI call code.
10998
e7f5651d459c 8003268: SharedRuntime::generate_native_wrapper doesn't save all registers across runtime tracing calls for JNI critical native methods
twisti
parents: 8873
diff changeset
2267 if (!is_critical_native) {
e7f5651d459c 8003268: SharedRuntime::generate_native_wrapper doesn't save all registers across runtime tracing calls for JNI critical native methods
twisti
parents: 8873
diff changeset
2268 // point c_arg at the first arg that is already loaded in case we
e7f5651d459c 8003268: SharedRuntime::generate_native_wrapper doesn't save all registers across runtime tracing calls for JNI critical native methods
twisti
parents: 8873
diff changeset
2269 // need to spill before we call out
e7f5651d459c 8003268: SharedRuntime::generate_native_wrapper doesn't save all registers across runtime tracing calls for JNI critical native methods
twisti
parents: 8873
diff changeset
2270 c_arg = total_c_args - total_in_args;
e7f5651d459c 8003268: SharedRuntime::generate_native_wrapper doesn't save all registers across runtime tracing calls for JNI critical native methods
twisti
parents: 8873
diff changeset
2271
e7f5651d459c 8003268: SharedRuntime::generate_native_wrapper doesn't save all registers across runtime tracing calls for JNI critical native methods
twisti
parents: 8873
diff changeset
2272 if (method->is_static()) {
e7f5651d459c 8003268: SharedRuntime::generate_native_wrapper doesn't save all registers across runtime tracing calls for JNI critical native methods
twisti
parents: 8873
diff changeset
2273
e7f5651d459c 8003268: SharedRuntime::generate_native_wrapper doesn't save all registers across runtime tracing calls for JNI critical native methods
twisti
parents: 8873
diff changeset
2274 // load oop into a register
e7f5651d459c 8003268: SharedRuntime::generate_native_wrapper doesn't save all registers across runtime tracing calls for JNI critical native methods
twisti
parents: 8873
diff changeset
2275 __ movoop(oop_handle_reg, JNIHandles::make_local(method->method_holder()->java_mirror()));
e7f5651d459c 8003268: SharedRuntime::generate_native_wrapper doesn't save all registers across runtime tracing calls for JNI critical native methods
twisti
parents: 8873
diff changeset
2276
e7f5651d459c 8003268: SharedRuntime::generate_native_wrapper doesn't save all registers across runtime tracing calls for JNI critical native methods
twisti
parents: 8873
diff changeset
2277 // Now handlize the static class mirror it's known not-null.
e7f5651d459c 8003268: SharedRuntime::generate_native_wrapper doesn't save all registers across runtime tracing calls for JNI critical native methods
twisti
parents: 8873
diff changeset
2278 __ movptr(Address(rsp, klass_offset), oop_handle_reg);
e7f5651d459c 8003268: SharedRuntime::generate_native_wrapper doesn't save all registers across runtime tracing calls for JNI critical native methods
twisti
parents: 8873
diff changeset
2279 map->set_oop(VMRegImpl::stack2reg(klass_slot_offset));
e7f5651d459c 8003268: SharedRuntime::generate_native_wrapper doesn't save all registers across runtime tracing calls for JNI critical native methods
twisti
parents: 8873
diff changeset
2280
e7f5651d459c 8003268: SharedRuntime::generate_native_wrapper doesn't save all registers across runtime tracing calls for JNI critical native methods
twisti
parents: 8873
diff changeset
2281 // Now get the handle
e7f5651d459c 8003268: SharedRuntime::generate_native_wrapper doesn't save all registers across runtime tracing calls for JNI critical native methods
twisti
parents: 8873
diff changeset
2282 __ lea(oop_handle_reg, Address(rsp, klass_offset));
e7f5651d459c 8003268: SharedRuntime::generate_native_wrapper doesn't save all registers across runtime tracing calls for JNI critical native methods
twisti
parents: 8873
diff changeset
2283 // store the klass handle as second argument
e7f5651d459c 8003268: SharedRuntime::generate_native_wrapper doesn't save all registers across runtime tracing calls for JNI critical native methods
twisti
parents: 8873
diff changeset
2284 __ movptr(c_rarg1, oop_handle_reg);
e7f5651d459c 8003268: SharedRuntime::generate_native_wrapper doesn't save all registers across runtime tracing calls for JNI critical native methods
twisti
parents: 8873
diff changeset
2285 // and protect the arg if we must spill
e7f5651d459c 8003268: SharedRuntime::generate_native_wrapper doesn't save all registers across runtime tracing calls for JNI critical native methods
twisti
parents: 8873
diff changeset
2286 c_arg--;
e7f5651d459c 8003268: SharedRuntime::generate_native_wrapper doesn't save all registers across runtime tracing calls for JNI critical native methods
twisti
parents: 8873
diff changeset
2287 }
e7f5651d459c 8003268: SharedRuntime::generate_native_wrapper doesn't save all registers across runtime tracing calls for JNI critical native methods
twisti
parents: 8873
diff changeset
2288 } else {
e7f5651d459c 8003268: SharedRuntime::generate_native_wrapper doesn't save all registers across runtime tracing calls for JNI critical native methods
twisti
parents: 8873
diff changeset
2289 // For JNI critical methods we need to save all registers in save_args.
e7f5651d459c 8003268: SharedRuntime::generate_native_wrapper doesn't save all registers across runtime tracing calls for JNI critical native methods
twisti
parents: 8873
diff changeset
2290 c_arg = 0;
0
a61af66fc99e Initial load
duke
parents:
diff changeset
2291 }
a61af66fc99e Initial load
duke
parents:
diff changeset
2292
a61af66fc99e Initial load
duke
parents:
diff changeset
2293 // Change state to native (we save the return address in the thread, since it might not
a61af66fc99e Initial load
duke
parents:
diff changeset
2294 // be pushed on the stack when we do a a stack traversal). It is enough that the pc()
a61af66fc99e Initial load
duke
parents:
diff changeset
2295 // points into the right code segment. It does not have to be the correct return pc.
a61af66fc99e Initial load
duke
parents:
diff changeset
2296 // We use the same pc/oopMap repeatedly when we call out
a61af66fc99e Initial load
duke
parents:
diff changeset
2297
a61af66fc99e Initial load
duke
parents:
diff changeset
2298 intptr_t the_pc = (intptr_t) __ pc();
a61af66fc99e Initial load
duke
parents:
diff changeset
2299 oop_maps->add_gc_map(the_pc - start, map);
a61af66fc99e Initial load
duke
parents:
diff changeset
2300
a61af66fc99e Initial load
duke
parents:
diff changeset
2301 __ set_last_Java_frame(rsp, noreg, (address)the_pc);
a61af66fc99e Initial load
duke
parents:
diff changeset
2302
a61af66fc99e Initial load
duke
parents:
diff changeset
2303
a61af66fc99e Initial load
duke
parents:
diff changeset
2304 // We have all of the arguments setup at this point. We must not touch any register
a61af66fc99e Initial load
duke
parents:
diff changeset
2305 // argument registers at this point (what if we save/restore them there are no oop?
a61af66fc99e Initial load
duke
parents:
diff changeset
2306
a61af66fc99e Initial load
duke
parents:
diff changeset
2307 {
a61af66fc99e Initial load
duke
parents:
diff changeset
2308 SkipIfEqual skip(masm, &DTraceMethodProbes, false);
a61af66fc99e Initial load
duke
parents:
diff changeset
2309 // protect the args we've loaded
a61af66fc99e Initial load
duke
parents:
diff changeset
2310 save_args(masm, total_c_args, c_arg, out_regs);
6725
da91efe96a93 6964458: Reimplement class meta-data storage to use native memory
coleenp
parents: 6266
diff changeset
2311 __ mov_metadata(c_rarg1, method());
0
a61af66fc99e Initial load
duke
parents:
diff changeset
2312 __ call_VM_leaf(
a61af66fc99e Initial load
duke
parents:
diff changeset
2313 CAST_FROM_FN_PTR(address, SharedRuntime::dtrace_method_entry),
a61af66fc99e Initial load
duke
parents:
diff changeset
2314 r15_thread, c_rarg1);
a61af66fc99e Initial load
duke
parents:
diff changeset
2315 restore_args(masm, total_c_args, c_arg, out_regs);
a61af66fc99e Initial load
duke
parents:
diff changeset
2316 }
a61af66fc99e Initial load
duke
parents:
diff changeset
2317
610
70998f2e05ef 6805864: 4/3 Problem with jvmti->redefineClasses: some methods don't get redefined
dcubed
parents: 304
diff changeset
2318 // RedefineClasses() tracing support for obsolete method entry
70998f2e05ef 6805864: 4/3 Problem with jvmti->redefineClasses: some methods don't get redefined
dcubed
parents: 304
diff changeset
2319 if (RC_TRACE_IN_RANGE(0x00001000, 0x00002000)) {
70998f2e05ef 6805864: 4/3 Problem with jvmti->redefineClasses: some methods don't get redefined
dcubed
parents: 304
diff changeset
2320 // protect the args we've loaded
70998f2e05ef 6805864: 4/3 Problem with jvmti->redefineClasses: some methods don't get redefined
dcubed
parents: 304
diff changeset
2321 save_args(masm, total_c_args, c_arg, out_regs);
6725
da91efe96a93 6964458: Reimplement class meta-data storage to use native memory
coleenp
parents: 6266
diff changeset
2322 __ mov_metadata(c_rarg1, method());
610
70998f2e05ef 6805864: 4/3 Problem with jvmti->redefineClasses: some methods don't get redefined
dcubed
parents: 304
diff changeset
2323 __ call_VM_leaf(
70998f2e05ef 6805864: 4/3 Problem with jvmti->redefineClasses: some methods don't get redefined
dcubed
parents: 304
diff changeset
2324 CAST_FROM_FN_PTR(address, SharedRuntime::rc_trace_method_entry),
70998f2e05ef 6805864: 4/3 Problem with jvmti->redefineClasses: some methods don't get redefined
dcubed
parents: 304
diff changeset
2325 r15_thread, c_rarg1);
70998f2e05ef 6805864: 4/3 Problem with jvmti->redefineClasses: some methods don't get redefined
dcubed
parents: 304
diff changeset
2326 restore_args(masm, total_c_args, c_arg, out_regs);
70998f2e05ef 6805864: 4/3 Problem with jvmti->redefineClasses: some methods don't get redefined
dcubed
parents: 304
diff changeset
2327 }
70998f2e05ef 6805864: 4/3 Problem with jvmti->redefineClasses: some methods don't get redefined
dcubed
parents: 304
diff changeset
2328
0
a61af66fc99e Initial load
duke
parents:
diff changeset
2329 // Lock a synchronized method
a61af66fc99e Initial load
duke
parents:
diff changeset
2330
a61af66fc99e Initial load
duke
parents:
diff changeset
2331 // Register definitions used by locking and unlocking
a61af66fc99e Initial load
duke
parents:
diff changeset
2332
a61af66fc99e Initial load
duke
parents:
diff changeset
2333 const Register swap_reg = rax; // Must use rax for cmpxchg instruction
a61af66fc99e Initial load
duke
parents:
diff changeset
2334 const Register obj_reg = rbx; // Will contain the oop
a61af66fc99e Initial load
duke
parents:
diff changeset
2335 const Register lock_reg = r13; // Address of compiler lock object (BasicLock)
a61af66fc99e Initial load
duke
parents:
diff changeset
2336 const Register old_hdr = r13; // value of old header at unlock time
a61af66fc99e Initial load
duke
parents:
diff changeset
2337
a61af66fc99e Initial load
duke
parents:
diff changeset
2338 Label slow_path_lock;
a61af66fc99e Initial load
duke
parents:
diff changeset
2339 Label lock_done;
a61af66fc99e Initial load
duke
parents:
diff changeset
2340
a61af66fc99e Initial load
duke
parents:
diff changeset
2341 if (method->is_synchronized()) {
4873
0382d2b469b2 7013347: allow crypto functions to be called inline to enhance performance
never
parents: 4057
diff changeset
2342 assert(!is_critical_native, "unhandled");
0
a61af66fc99e Initial load
duke
parents:
diff changeset
2343
a61af66fc99e Initial load
duke
parents:
diff changeset
2344
a61af66fc99e Initial load
duke
parents:
diff changeset
2345 const int mark_word_offset = BasicLock::displaced_header_offset_in_bytes();
a61af66fc99e Initial load
duke
parents:
diff changeset
2346
a61af66fc99e Initial load
duke
parents:
diff changeset
2347 // Get the handle (the 2nd argument)
304
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 196
diff changeset
2348 __ mov(oop_handle_reg, c_rarg1);
0
a61af66fc99e Initial load
duke
parents:
diff changeset
2349
a61af66fc99e Initial load
duke
parents:
diff changeset
2350 // Get address of the box
a61af66fc99e Initial load
duke
parents:
diff changeset
2351
304
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 196
diff changeset
2352 __ lea(lock_reg, Address(rsp, lock_slot_offset * VMRegImpl::stack_slot_size));
0
a61af66fc99e Initial load
duke
parents:
diff changeset
2353
a61af66fc99e Initial load
duke
parents:
diff changeset
2354 // Load the oop from the handle
304
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 196
diff changeset
2355 __ movptr(obj_reg, Address(oop_handle_reg, 0));
0
a61af66fc99e Initial load
duke
parents:
diff changeset
2356
a61af66fc99e Initial load
duke
parents:
diff changeset
2357 if (UseBiasedLocking) {
a61af66fc99e Initial load
duke
parents:
diff changeset
2358 __ biased_locking_enter(lock_reg, obj_reg, swap_reg, rscratch1, false, lock_done, &slow_path_lock);
a61af66fc99e Initial load
duke
parents:
diff changeset
2359 }
a61af66fc99e Initial load
duke
parents:
diff changeset
2360
a61af66fc99e Initial load
duke
parents:
diff changeset
2361 // Load immediate 1 into swap_reg %rax
a61af66fc99e Initial load
duke
parents:
diff changeset
2362 __ movl(swap_reg, 1);
a61af66fc99e Initial load
duke
parents:
diff changeset
2363
a61af66fc99e Initial load
duke
parents:
diff changeset
2364 // Load (object->mark() | 1) into swap_reg %rax
304
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 196
diff changeset
2365 __ orptr(swap_reg, Address(obj_reg, 0));
0
a61af66fc99e Initial load
duke
parents:
diff changeset
2366
a61af66fc99e Initial load
duke
parents:
diff changeset
2367 // Save (object->mark() | 1) into BasicLock's displaced header
304
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 196
diff changeset
2368 __ movptr(Address(lock_reg, mark_word_offset), swap_reg);
0
a61af66fc99e Initial load
duke
parents:
diff changeset
2369
a61af66fc99e Initial load
duke
parents:
diff changeset
2370 if (os::is_MP()) {
a61af66fc99e Initial load
duke
parents:
diff changeset
2371 __ lock();
a61af66fc99e Initial load
duke
parents:
diff changeset
2372 }
a61af66fc99e Initial load
duke
parents:
diff changeset
2373
a61af66fc99e Initial load
duke
parents:
diff changeset
2374 // src -> dest iff dest == rax else rax <- dest
304
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 196
diff changeset
2375 __ cmpxchgptr(lock_reg, Address(obj_reg, 0));
0
a61af66fc99e Initial load
duke
parents:
diff changeset
2376 __ jcc(Assembler::equal, lock_done);
a61af66fc99e Initial load
duke
parents:
diff changeset
2377
a61af66fc99e Initial load
duke
parents:
diff changeset
2378 // Hmm should this move to the slow path code area???
a61af66fc99e Initial load
duke
parents:
diff changeset
2379
a61af66fc99e Initial load
duke
parents:
diff changeset
2380 // Test if the oopMark is an obvious stack pointer, i.e.,
a61af66fc99e Initial load
duke
parents:
diff changeset
2381 // 1) (mark & 3) == 0, and
a61af66fc99e Initial load
duke
parents:
diff changeset
2382 // 2) rsp <= mark < mark + os::pagesize()
a61af66fc99e Initial load
duke
parents:
diff changeset
2383 // These 3 tests can be done by evaluating the following
a61af66fc99e Initial load
duke
parents:
diff changeset
2384 // expression: ((mark - rsp) & (3 - os::vm_page_size())),
a61af66fc99e Initial load
duke
parents:
diff changeset
2385 // assuming both stack pointer and pagesize have their
a61af66fc99e Initial load
duke
parents:
diff changeset
2386 // least significant 2 bits clear.
a61af66fc99e Initial load
duke
parents:
diff changeset
2387 // NOTE: the oopMark is in swap_reg %rax as the result of cmpxchg
a61af66fc99e Initial load
duke
parents:
diff changeset
2388
304
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 196
diff changeset
2389 __ subptr(swap_reg, rsp);
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 196
diff changeset
2390 __ andptr(swap_reg, 3 - os::vm_page_size());
0
a61af66fc99e Initial load
duke
parents:
diff changeset
2391
a61af66fc99e Initial load
duke
parents:
diff changeset
2392 // Save the test result, for recursive case, the result is zero
304
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 196
diff changeset
2393 __ movptr(Address(lock_reg, mark_word_offset), swap_reg);
0
a61af66fc99e Initial load
duke
parents:
diff changeset
2394 __ jcc(Assembler::notEqual, slow_path_lock);
a61af66fc99e Initial load
duke
parents:
diff changeset
2395
a61af66fc99e Initial load
duke
parents:
diff changeset
2396 // Slow path will re-enter here
a61af66fc99e Initial load
duke
parents:
diff changeset
2397
a61af66fc99e Initial load
duke
parents:
diff changeset
2398 __ bind(lock_done);
a61af66fc99e Initial load
duke
parents:
diff changeset
2399 }
a61af66fc99e Initial load
duke
parents:
diff changeset
2400
a61af66fc99e Initial load
duke
parents:
diff changeset
2401
a61af66fc99e Initial load
duke
parents:
diff changeset
2402 // Finally just about ready to make the JNI call
a61af66fc99e Initial load
duke
parents:
diff changeset
2403
a61af66fc99e Initial load
duke
parents:
diff changeset
2404
a61af66fc99e Initial load
duke
parents:
diff changeset
2405 // get JNIEnv* which is first argument to native
4873
0382d2b469b2 7013347: allow crypto functions to be called inline to enhance performance
never
parents: 4057
diff changeset
2406 if (!is_critical_native) {
0382d2b469b2 7013347: allow crypto functions to be called inline to enhance performance
never
parents: 4057
diff changeset
2407 __ lea(c_rarg0, Address(r15_thread, in_bytes(JavaThread::jni_environment_offset())));
0382d2b469b2 7013347: allow crypto functions to be called inline to enhance performance
never
parents: 4057
diff changeset
2408 }
0
a61af66fc99e Initial load
duke
parents:
diff changeset
2409
a61af66fc99e Initial load
duke
parents:
diff changeset
2410 // Now set thread in native
304
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 196
diff changeset
2411 __ movl(Address(r15_thread, JavaThread::thread_state_offset()), _thread_in_native);
0
a61af66fc99e Initial load
duke
parents:
diff changeset
2412
4873
0382d2b469b2 7013347: allow crypto functions to be called inline to enhance performance
never
parents: 4057
diff changeset
2413 __ call(RuntimeAddress(native_func));
0
a61af66fc99e Initial load
duke
parents:
diff changeset
2414
8873
e961c11b85fe 8011102: Clear AVX registers after return from JNI call
kvn
parents: 7199
diff changeset
2415 // Verify or restore cpu control state after JNI call
e961c11b85fe 8011102: Clear AVX registers after return from JNI call
kvn
parents: 7199
diff changeset
2416 __ restore_cpu_control_state_after_jni();
0
a61af66fc99e Initial load
duke
parents:
diff changeset
2417
a61af66fc99e Initial load
duke
parents:
diff changeset
2418 // Unpack native results.
a61af66fc99e Initial load
duke
parents:
diff changeset
2419 switch (ret_type) {
a61af66fc99e Initial load
duke
parents:
diff changeset
2420 case T_BOOLEAN: __ c2bool(rax); break;
a61af66fc99e Initial load
duke
parents:
diff changeset
2421 case T_CHAR : __ movzwl(rax, rax); break;
a61af66fc99e Initial load
duke
parents:
diff changeset
2422 case T_BYTE : __ sign_extend_byte (rax); break;
a61af66fc99e Initial load
duke
parents:
diff changeset
2423 case T_SHORT : __ sign_extend_short(rax); break;
a61af66fc99e Initial load
duke
parents:
diff changeset
2424 case T_INT : /* nothing to do */ break;
a61af66fc99e Initial load
duke
parents:
diff changeset
2425 case T_DOUBLE :
a61af66fc99e Initial load
duke
parents:
diff changeset
2426 case T_FLOAT :
a61af66fc99e Initial load
duke
parents:
diff changeset
2427 // Result is in xmm0 we'll save as needed
a61af66fc99e Initial load
duke
parents:
diff changeset
2428 break;
a61af66fc99e Initial load
duke
parents:
diff changeset
2429 case T_ARRAY: // Really a handle
a61af66fc99e Initial load
duke
parents:
diff changeset
2430 case T_OBJECT: // Really a handle
a61af66fc99e Initial load
duke
parents:
diff changeset
2431 break; // can't de-handlize until after safepoint check
a61af66fc99e Initial load
duke
parents:
diff changeset
2432 case T_VOID: break;
a61af66fc99e Initial load
duke
parents:
diff changeset
2433 case T_LONG: break;
a61af66fc99e Initial load
duke
parents:
diff changeset
2434 default : ShouldNotReachHere();
a61af66fc99e Initial load
duke
parents:
diff changeset
2435 }
a61af66fc99e Initial load
duke
parents:
diff changeset
2436
a61af66fc99e Initial load
duke
parents:
diff changeset
2437 // Switch thread to "native transition" state before reading the synchronization state.
a61af66fc99e Initial load
duke
parents:
diff changeset
2438 // This additional state is necessary because reading and testing the synchronization
a61af66fc99e Initial load
duke
parents:
diff changeset
2439 // state is not atomic w.r.t. GC, as this scenario demonstrates:
a61af66fc99e Initial load
duke
parents:
diff changeset
2440 // Java thread A, in _thread_in_native state, loads _not_synchronized and is preempted.
a61af66fc99e Initial load
duke
parents:
diff changeset
2441 // VM thread changes sync state to synchronizing and suspends threads for GC.
a61af66fc99e Initial load
duke
parents:
diff changeset
2442 // Thread A is resumed to finish this native method, but doesn't block here since it
a61af66fc99e Initial load
duke
parents:
diff changeset
2443 // didn't see any synchronization is progress, and escapes.
304
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 196
diff changeset
2444 __ movl(Address(r15_thread, JavaThread::thread_state_offset()), _thread_in_native_trans);
0
a61af66fc99e Initial load
duke
parents:
diff changeset
2445
a61af66fc99e Initial load
duke
parents:
diff changeset
2446 if(os::is_MP()) {
a61af66fc99e Initial load
duke
parents:
diff changeset
2447 if (UseMembar) {
a61af66fc99e Initial load
duke
parents:
diff changeset
2448 // Force this write out before the read below
a61af66fc99e Initial load
duke
parents:
diff changeset
2449 __ membar(Assembler::Membar_mask_bits(
a61af66fc99e Initial load
duke
parents:
diff changeset
2450 Assembler::LoadLoad | Assembler::LoadStore |
a61af66fc99e Initial load
duke
parents:
diff changeset
2451 Assembler::StoreLoad | Assembler::StoreStore));
a61af66fc99e Initial load
duke
parents:
diff changeset
2452 } else {
a61af66fc99e Initial load
duke
parents:
diff changeset
2453 // Write serialization page so VM thread can do a pseudo remote membar.
a61af66fc99e Initial load
duke
parents:
diff changeset
2454 // We use the current thread pointer to calculate a thread specific
a61af66fc99e Initial load
duke
parents:
diff changeset
2455 // offset to write to within the page. This minimizes bus traffic
a61af66fc99e Initial load
duke
parents:
diff changeset
2456 // due to cache line collision.
a61af66fc99e Initial load
duke
parents:
diff changeset
2457 __ serialize_memory(r15_thread, rcx);
a61af66fc99e Initial load
duke
parents:
diff changeset
2458 }
a61af66fc99e Initial load
duke
parents:
diff changeset
2459 }
a61af66fc99e Initial load
duke
parents:
diff changeset
2460
4873
0382d2b469b2 7013347: allow crypto functions to be called inline to enhance performance
never
parents: 4057
diff changeset
2461 Label after_transition;
0
a61af66fc99e Initial load
duke
parents:
diff changeset
2462
a61af66fc99e Initial load
duke
parents:
diff changeset
2463 // check for safepoint operation in progress and/or pending suspend requests
a61af66fc99e Initial load
duke
parents:
diff changeset
2464 {
a61af66fc99e Initial load
duke
parents:
diff changeset
2465 Label Continue;
a61af66fc99e Initial load
duke
parents:
diff changeset
2466
a61af66fc99e Initial load
duke
parents:
diff changeset
2467 __ cmp32(ExternalAddress((address)SafepointSynchronize::address_of_state()),
a61af66fc99e Initial load
duke
parents:
diff changeset
2468 SafepointSynchronize::_not_synchronized);
a61af66fc99e Initial load
duke
parents:
diff changeset
2469
a61af66fc99e Initial load
duke
parents:
diff changeset
2470 Label L;
a61af66fc99e Initial load
duke
parents:
diff changeset
2471 __ jcc(Assembler::notEqual, L);
a61af66fc99e Initial load
duke
parents:
diff changeset
2472 __ cmpl(Address(r15_thread, JavaThread::suspend_flags_offset()), 0);
a61af66fc99e Initial load
duke
parents:
diff changeset
2473 __ jcc(Assembler::equal, Continue);
a61af66fc99e Initial load
duke
parents:
diff changeset
2474 __ bind(L);
a61af66fc99e Initial load
duke
parents:
diff changeset
2475
a61af66fc99e Initial load
duke
parents:
diff changeset
2476 // Don't use call_VM as it will see a possible pending exception and forward it
a61af66fc99e Initial load
duke
parents:
diff changeset
2477 // and never return here preventing us from clearing _last_native_pc down below.
a61af66fc99e Initial load
duke
parents:
diff changeset
2478 // Also can't use call_VM_leaf either as it will check to see if rsi & rdi are
a61af66fc99e Initial load
duke
parents:
diff changeset
2479 // preserved and correspond to the bcp/locals pointers. So we do a runtime call
a61af66fc99e Initial load
duke
parents:
diff changeset
2480 // by hand.
a61af66fc99e Initial load
duke
parents:
diff changeset
2481 //
a61af66fc99e Initial load
duke
parents:
diff changeset
2482 save_native_result(masm, ret_type, stack_slots);
304
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 196
diff changeset
2483 __ mov(c_rarg0, r15_thread);
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 196
diff changeset
2484 __ mov(r12, rsp); // remember sp
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 196
diff changeset
2485 __ subptr(rsp, frame::arg_reg_save_area_bytes); // windows
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 196
diff changeset
2486 __ andptr(rsp, -16); // align stack as required by ABI
4873
0382d2b469b2 7013347: allow crypto functions to be called inline to enhance performance
never
parents: 4057
diff changeset
2487 if (!is_critical_native) {
0382d2b469b2 7013347: allow crypto functions to be called inline to enhance performance
never
parents: 4057
diff changeset
2488 __ call(RuntimeAddress(CAST_FROM_FN_PTR(address, JavaThread::check_special_condition_for_native_trans)));
0382d2b469b2 7013347: allow crypto functions to be called inline to enhance performance
never
parents: 4057
diff changeset
2489 } else {
0382d2b469b2 7013347: allow crypto functions to be called inline to enhance performance
never
parents: 4057
diff changeset
2490 __ call(RuntimeAddress(CAST_FROM_FN_PTR(address, JavaThread::check_special_condition_for_native_trans_and_transition)));
0382d2b469b2 7013347: allow crypto functions to be called inline to enhance performance
never
parents: 4057
diff changeset
2491 }
304
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 196
diff changeset
2492 __ mov(rsp, r12); // restore sp
113
ba764ed4b6f2 6420645: Create a vm that uses compressed oops for up to 32gb heapsizes
coleenp
parents: 0
diff changeset
2493 __ reinit_heapbase();
0
a61af66fc99e Initial load
duke
parents:
diff changeset
2494 // Restore any method result value
a61af66fc99e Initial load
duke
parents:
diff changeset
2495 restore_native_result(masm, ret_type, stack_slots);
4873
0382d2b469b2 7013347: allow crypto functions to be called inline to enhance performance
never
parents: 4057
diff changeset
2496
0382d2b469b2 7013347: allow crypto functions to be called inline to enhance performance
never
parents: 4057
diff changeset
2497 if (is_critical_native) {
0382d2b469b2 7013347: allow crypto functions to be called inline to enhance performance
never
parents: 4057
diff changeset
2498 // The call above performed the transition to thread_in_Java so
0382d2b469b2 7013347: allow crypto functions to be called inline to enhance performance
never
parents: 4057
diff changeset
2499 // skip the transition logic below.
0382d2b469b2 7013347: allow crypto functions to be called inline to enhance performance
never
parents: 4057
diff changeset
2500 __ jmpb(after_transition);
0382d2b469b2 7013347: allow crypto functions to be called inline to enhance performance
never
parents: 4057
diff changeset
2501 }
0382d2b469b2 7013347: allow crypto functions to be called inline to enhance performance
never
parents: 4057
diff changeset
2502
0
a61af66fc99e Initial load
duke
parents:
diff changeset
2503 __ bind(Continue);
a61af66fc99e Initial load
duke
parents:
diff changeset
2504 }
a61af66fc99e Initial load
duke
parents:
diff changeset
2505
a61af66fc99e Initial load
duke
parents:
diff changeset
2506 // change thread state
a61af66fc99e Initial load
duke
parents:
diff changeset
2507 __ movl(Address(r15_thread, JavaThread::thread_state_offset()), _thread_in_Java);
4873
0382d2b469b2 7013347: allow crypto functions to be called inline to enhance performance
never
parents: 4057
diff changeset
2508 __ bind(after_transition);
0
a61af66fc99e Initial load
duke
parents:
diff changeset
2509
a61af66fc99e Initial load
duke
parents:
diff changeset
2510 Label reguard;
a61af66fc99e Initial load
duke
parents:
diff changeset
2511 Label reguard_done;
a61af66fc99e Initial load
duke
parents:
diff changeset
2512 __ cmpl(Address(r15_thread, JavaThread::stack_guard_state_offset()), JavaThread::stack_guard_yellow_disabled);
a61af66fc99e Initial load
duke
parents:
diff changeset
2513 __ jcc(Assembler::equal, reguard);
a61af66fc99e Initial load
duke
parents:
diff changeset
2514 __ bind(reguard_done);
a61af66fc99e Initial load
duke
parents:
diff changeset
2515
a61af66fc99e Initial load
duke
parents:
diff changeset
2516 // native result if any is live
a61af66fc99e Initial load
duke
parents:
diff changeset
2517
a61af66fc99e Initial load
duke
parents:
diff changeset
2518 // Unlock
a61af66fc99e Initial load
duke
parents:
diff changeset
2519 Label unlock_done;
a61af66fc99e Initial load
duke
parents:
diff changeset
2520 Label slow_path_unlock;
a61af66fc99e Initial load
duke
parents:
diff changeset
2521 if (method->is_synchronized()) {
a61af66fc99e Initial load
duke
parents:
diff changeset
2522
a61af66fc99e Initial load
duke
parents:
diff changeset
2523 // Get locked oop from the handle we passed to jni
304
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 196
diff changeset
2524 __ movptr(obj_reg, Address(oop_handle_reg, 0));
0
a61af66fc99e Initial load
duke
parents:
diff changeset
2525
a61af66fc99e Initial load
duke
parents:
diff changeset
2526 Label done;
a61af66fc99e Initial load
duke
parents:
diff changeset
2527
a61af66fc99e Initial load
duke
parents:
diff changeset
2528 if (UseBiasedLocking) {
a61af66fc99e Initial load
duke
parents:
diff changeset
2529 __ biased_locking_exit(obj_reg, old_hdr, done);
a61af66fc99e Initial load
duke
parents:
diff changeset
2530 }
a61af66fc99e Initial load
duke
parents:
diff changeset
2531
a61af66fc99e Initial load
duke
parents:
diff changeset
2532 // Simple recursive lock?
a61af66fc99e Initial load
duke
parents:
diff changeset
2533
304
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 196
diff changeset
2534 __ cmpptr(Address(rsp, lock_slot_offset * VMRegImpl::stack_slot_size), (int32_t)NULL_WORD);
0
a61af66fc99e Initial load
duke
parents:
diff changeset
2535 __ jcc(Assembler::equal, done);
a61af66fc99e Initial load
duke
parents:
diff changeset
2536
a61af66fc99e Initial load
duke
parents:
diff changeset
2537 // Must save rax if if it is live now because cmpxchg must use it
a61af66fc99e Initial load
duke
parents:
diff changeset
2538 if (ret_type != T_FLOAT && ret_type != T_DOUBLE && ret_type != T_VOID) {
a61af66fc99e Initial load
duke
parents:
diff changeset
2539 save_native_result(masm, ret_type, stack_slots);
a61af66fc99e Initial load
duke
parents:
diff changeset
2540 }
a61af66fc99e Initial load
duke
parents:
diff changeset
2541
a61af66fc99e Initial load
duke
parents:
diff changeset
2542
a61af66fc99e Initial load
duke
parents:
diff changeset
2543 // get address of the stack lock
304
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 196
diff changeset
2544 __ lea(rax, Address(rsp, lock_slot_offset * VMRegImpl::stack_slot_size));
0
a61af66fc99e Initial load
duke
parents:
diff changeset
2545 // get old displaced header
304
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 196
diff changeset
2546 __ movptr(old_hdr, Address(rax, 0));
0
a61af66fc99e Initial load
duke
parents:
diff changeset
2547
a61af66fc99e Initial load
duke
parents:
diff changeset
2548 // Atomic swap old header if oop still contains the stack lock
a61af66fc99e Initial load
duke
parents:
diff changeset
2549 if (os::is_MP()) {
a61af66fc99e Initial load
duke
parents:
diff changeset
2550 __ lock();
a61af66fc99e Initial load
duke
parents:
diff changeset
2551 }
304
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 196
diff changeset
2552 __ cmpxchgptr(old_hdr, Address(obj_reg, 0));
0
a61af66fc99e Initial load
duke
parents:
diff changeset
2553 __ jcc(Assembler::notEqual, slow_path_unlock);
a61af66fc99e Initial load
duke
parents:
diff changeset
2554
a61af66fc99e Initial load
duke
parents:
diff changeset
2555 // slow path re-enters here
a61af66fc99e Initial load
duke
parents:
diff changeset
2556 __ bind(unlock_done);
a61af66fc99e Initial load
duke
parents:
diff changeset
2557 if (ret_type != T_FLOAT && ret_type != T_DOUBLE && ret_type != T_VOID) {
a61af66fc99e Initial load
duke
parents:
diff changeset
2558 restore_native_result(masm, ret_type, stack_slots);
a61af66fc99e Initial load
duke
parents:
diff changeset
2559 }
a61af66fc99e Initial load
duke
parents:
diff changeset
2560
a61af66fc99e Initial load
duke
parents:
diff changeset
2561 __ bind(done);
a61af66fc99e Initial load
duke
parents:
diff changeset
2562
a61af66fc99e Initial load
duke
parents:
diff changeset
2563 }
a61af66fc99e Initial load
duke
parents:
diff changeset
2564 {
a61af66fc99e Initial load
duke
parents:
diff changeset
2565 SkipIfEqual skip(masm, &DTraceMethodProbes, false);
a61af66fc99e Initial load
duke
parents:
diff changeset
2566 save_native_result(masm, ret_type, stack_slots);
6725
da91efe96a93 6964458: Reimplement class meta-data storage to use native memory
coleenp
parents: 6266
diff changeset
2567 __ mov_metadata(c_rarg1, method());
0
a61af66fc99e Initial load
duke
parents:
diff changeset
2568 __ call_VM_leaf(
a61af66fc99e Initial load
duke
parents:
diff changeset
2569 CAST_FROM_FN_PTR(address, SharedRuntime::dtrace_method_exit),
a61af66fc99e Initial load
duke
parents:
diff changeset
2570 r15_thread, c_rarg1);
a61af66fc99e Initial load
duke
parents:
diff changeset
2571 restore_native_result(masm, ret_type, stack_slots);
a61af66fc99e Initial load
duke
parents:
diff changeset
2572 }
a61af66fc99e Initial load
duke
parents:
diff changeset
2573
a61af66fc99e Initial load
duke
parents:
diff changeset
2574 __ reset_last_Java_frame(false, true);
a61af66fc99e Initial load
duke
parents:
diff changeset
2575
a61af66fc99e Initial load
duke
parents:
diff changeset
2576 // Unpack oop result
a61af66fc99e Initial load
duke
parents:
diff changeset
2577 if (ret_type == T_OBJECT || ret_type == T_ARRAY) {
a61af66fc99e Initial load
duke
parents:
diff changeset
2578 Label L;
304
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 196
diff changeset
2579 __ testptr(rax, rax);
0
a61af66fc99e Initial load
duke
parents:
diff changeset
2580 __ jcc(Assembler::zero, L);
304
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 196
diff changeset
2581 __ movptr(rax, Address(rax, 0));
0
a61af66fc99e Initial load
duke
parents:
diff changeset
2582 __ bind(L);
a61af66fc99e Initial load
duke
parents:
diff changeset
2583 __ verify_oop(rax);
a61af66fc99e Initial load
duke
parents:
diff changeset
2584 }
a61af66fc99e Initial load
duke
parents:
diff changeset
2585
4873
0382d2b469b2 7013347: allow crypto functions to be called inline to enhance performance
never
parents: 4057
diff changeset
2586 if (!is_critical_native) {
0382d2b469b2 7013347: allow crypto functions to be called inline to enhance performance
never
parents: 4057
diff changeset
2587 // reset handle block
0382d2b469b2 7013347: allow crypto functions to be called inline to enhance performance
never
parents: 4057
diff changeset
2588 __ movptr(rcx, Address(r15_thread, JavaThread::active_handles_offset()));
17850
2100bf712e2a 8039146: Fix 64-bit store to int JNIHandleBlock::_top
goetz
parents: 17810
diff changeset
2589 __ movl(Address(rcx, JNIHandleBlock::top_offset_in_bytes()), (int32_t)NULL_WORD);
4873
0382d2b469b2 7013347: allow crypto functions to be called inline to enhance performance
never
parents: 4057
diff changeset
2590 }
0
a61af66fc99e Initial load
duke
parents:
diff changeset
2591
a61af66fc99e Initial load
duke
parents:
diff changeset
2592 // pop our frame
a61af66fc99e Initial load
duke
parents:
diff changeset
2593
a61af66fc99e Initial load
duke
parents:
diff changeset
2594 __ leave();
a61af66fc99e Initial load
duke
parents:
diff changeset
2595
4873
0382d2b469b2 7013347: allow crypto functions to be called inline to enhance performance
never
parents: 4057
diff changeset
2596 if (!is_critical_native) {
0382d2b469b2 7013347: allow crypto functions to be called inline to enhance performance
never
parents: 4057
diff changeset
2597 // Any exception pending?
0382d2b469b2 7013347: allow crypto functions to be called inline to enhance performance
never
parents: 4057
diff changeset
2598 __ cmpptr(Address(r15_thread, in_bytes(Thread::pending_exception_offset())), (int32_t)NULL_WORD);
0382d2b469b2 7013347: allow crypto functions to be called inline to enhance performance
never
parents: 4057
diff changeset
2599 __ jcc(Assembler::notEqual, exception_pending);
0382d2b469b2 7013347: allow crypto functions to be called inline to enhance performance
never
parents: 4057
diff changeset
2600 }
0
a61af66fc99e Initial load
duke
parents:
diff changeset
2601
a61af66fc99e Initial load
duke
parents:
diff changeset
2602 // Return
a61af66fc99e Initial load
duke
parents:
diff changeset
2603
a61af66fc99e Initial load
duke
parents:
diff changeset
2604 __ ret(0);
a61af66fc99e Initial load
duke
parents:
diff changeset
2605
a61af66fc99e Initial load
duke
parents:
diff changeset
2606 // Unexpected paths are out of line and go here
a61af66fc99e Initial load
duke
parents:
diff changeset
2607
4873
0382d2b469b2 7013347: allow crypto functions to be called inline to enhance performance
never
parents: 4057
diff changeset
2608 if (!is_critical_native) {
0382d2b469b2 7013347: allow crypto functions to be called inline to enhance performance
never
parents: 4057
diff changeset
2609 // forward the exception
0382d2b469b2 7013347: allow crypto functions to be called inline to enhance performance
never
parents: 4057
diff changeset
2610 __ bind(exception_pending);
0382d2b469b2 7013347: allow crypto functions to be called inline to enhance performance
never
parents: 4057
diff changeset
2611
0382d2b469b2 7013347: allow crypto functions to be called inline to enhance performance
never
parents: 4057
diff changeset
2612 // and forward the exception
0382d2b469b2 7013347: allow crypto functions to be called inline to enhance performance
never
parents: 4057
diff changeset
2613 __ jump(RuntimeAddress(StubRoutines::forward_exception_entry()));
0382d2b469b2 7013347: allow crypto functions to be called inline to enhance performance
never
parents: 4057
diff changeset
2614 }
0
a61af66fc99e Initial load
duke
parents:
diff changeset
2615
a61af66fc99e Initial load
duke
parents:
diff changeset
2616 // Slow path locking & unlocking
a61af66fc99e Initial load
duke
parents:
diff changeset
2617 if (method->is_synchronized()) {
a61af66fc99e Initial load
duke
parents:
diff changeset
2618
a61af66fc99e Initial load
duke
parents:
diff changeset
2619 // BEGIN Slow path lock
a61af66fc99e Initial load
duke
parents:
diff changeset
2620 __ bind(slow_path_lock);
a61af66fc99e Initial load
duke
parents:
diff changeset
2621
a61af66fc99e Initial load
duke
parents:
diff changeset
2622 // has last_Java_frame setup. No exceptions so do vanilla call not call_VM
a61af66fc99e Initial load
duke
parents:
diff changeset
2623 // args are (oop obj, BasicLock* lock, JavaThread* thread)
a61af66fc99e Initial load
duke
parents:
diff changeset
2624
a61af66fc99e Initial load
duke
parents:
diff changeset
2625 // protect the args we've loaded
a61af66fc99e Initial load
duke
parents:
diff changeset
2626 save_args(masm, total_c_args, c_arg, out_regs);
a61af66fc99e Initial load
duke
parents:
diff changeset
2627
304
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 196
diff changeset
2628 __ mov(c_rarg0, obj_reg);
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 196
diff changeset
2629 __ mov(c_rarg1, lock_reg);
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 196
diff changeset
2630 __ mov(c_rarg2, r15_thread);
0
a61af66fc99e Initial load
duke
parents:
diff changeset
2631
a61af66fc99e Initial load
duke
parents:
diff changeset
2632 // Not a leaf but we have last_Java_frame setup as we want
a61af66fc99e Initial load
duke
parents:
diff changeset
2633 __ call_VM_leaf(CAST_FROM_FN_PTR(address, SharedRuntime::complete_monitor_locking_C), 3);
a61af66fc99e Initial load
duke
parents:
diff changeset
2634 restore_args(masm, total_c_args, c_arg, out_regs);
a61af66fc99e Initial load
duke
parents:
diff changeset
2635
a61af66fc99e Initial load
duke
parents:
diff changeset
2636 #ifdef ASSERT
a61af66fc99e Initial load
duke
parents:
diff changeset
2637 { Label L;
304
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 196
diff changeset
2638 __ cmpptr(Address(r15_thread, in_bytes(Thread::pending_exception_offset())), (int32_t)NULL_WORD);
0
a61af66fc99e Initial load
duke
parents:
diff changeset
2639 __ jcc(Assembler::equal, L);
a61af66fc99e Initial load
duke
parents:
diff changeset
2640 __ stop("no pending exception allowed on exit from monitorenter");
a61af66fc99e Initial load
duke
parents:
diff changeset
2641 __ bind(L);
a61af66fc99e Initial load
duke
parents:
diff changeset
2642 }
a61af66fc99e Initial load
duke
parents:
diff changeset
2643 #endif
a61af66fc99e Initial load
duke
parents:
diff changeset
2644 __ jmp(lock_done);
a61af66fc99e Initial load
duke
parents:
diff changeset
2645
a61af66fc99e Initial load
duke
parents:
diff changeset
2646 // END Slow path lock
a61af66fc99e Initial load
duke
parents:
diff changeset
2647
a61af66fc99e Initial load
duke
parents:
diff changeset
2648 // BEGIN Slow path unlock
a61af66fc99e Initial load
duke
parents:
diff changeset
2649 __ bind(slow_path_unlock);
a61af66fc99e Initial load
duke
parents:
diff changeset
2650
a61af66fc99e Initial load
duke
parents:
diff changeset
2651 // If we haven't already saved the native result we must save it now as xmm registers
a61af66fc99e Initial load
duke
parents:
diff changeset
2652 // are still exposed.
a61af66fc99e Initial load
duke
parents:
diff changeset
2653
a61af66fc99e Initial load
duke
parents:
diff changeset
2654 if (ret_type == T_FLOAT || ret_type == T_DOUBLE ) {
a61af66fc99e Initial load
duke
parents:
diff changeset
2655 save_native_result(masm, ret_type, stack_slots);
a61af66fc99e Initial load
duke
parents:
diff changeset
2656 }
a61af66fc99e Initial load
duke
parents:
diff changeset
2657
304
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 196
diff changeset
2658 __ lea(c_rarg1, Address(rsp, lock_slot_offset * VMRegImpl::stack_slot_size));
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 196
diff changeset
2659
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 196
diff changeset
2660 __ mov(c_rarg0, obj_reg);
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 196
diff changeset
2661 __ mov(r12, rsp); // remember sp
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 196
diff changeset
2662 __ subptr(rsp, frame::arg_reg_save_area_bytes); // windows
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 196
diff changeset
2663 __ andptr(rsp, -16); // align stack as required by ABI
0
a61af66fc99e Initial load
duke
parents:
diff changeset
2664
a61af66fc99e Initial load
duke
parents:
diff changeset
2665 // Save pending exception around call to VM (which contains an EXCEPTION_MARK)
a61af66fc99e Initial load
duke
parents:
diff changeset
2666 // NOTE that obj_reg == rbx currently
304
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 196
diff changeset
2667 __ movptr(rbx, Address(r15_thread, in_bytes(Thread::pending_exception_offset())));
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 196
diff changeset
2668 __ movptr(Address(r15_thread, in_bytes(Thread::pending_exception_offset())), (int32_t)NULL_WORD);
0
a61af66fc99e Initial load
duke
parents:
diff changeset
2669
a61af66fc99e Initial load
duke
parents:
diff changeset
2670 __ call(RuntimeAddress(CAST_FROM_FN_PTR(address, SharedRuntime::complete_monitor_unlocking_C)));
304
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 196
diff changeset
2671 __ mov(rsp, r12); // restore sp
113
ba764ed4b6f2 6420645: Create a vm that uses compressed oops for up to 32gb heapsizes
coleenp
parents: 0
diff changeset
2672 __ reinit_heapbase();
0
a61af66fc99e Initial load
duke
parents:
diff changeset
2673 #ifdef ASSERT
a61af66fc99e Initial load
duke
parents:
diff changeset
2674 {
a61af66fc99e Initial load
duke
parents:
diff changeset
2675 Label L;
304
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 196
diff changeset
2676 __ cmpptr(Address(r15_thread, in_bytes(Thread::pending_exception_offset())), (int)NULL_WORD);
0
a61af66fc99e Initial load
duke
parents:
diff changeset
2677 __ jcc(Assembler::equal, L);
a61af66fc99e Initial load
duke
parents:
diff changeset
2678 __ stop("no pending exception allowed on exit complete_monitor_unlocking_C");
a61af66fc99e Initial load
duke
parents:
diff changeset
2679 __ bind(L);
a61af66fc99e Initial load
duke
parents:
diff changeset
2680 }
a61af66fc99e Initial load
duke
parents:
diff changeset
2681 #endif /* ASSERT */
a61af66fc99e Initial load
duke
parents:
diff changeset
2682
304
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 196
diff changeset
2683 __ movptr(Address(r15_thread, in_bytes(Thread::pending_exception_offset())), rbx);
0
a61af66fc99e Initial load
duke
parents:
diff changeset
2684
a61af66fc99e Initial load
duke
parents:
diff changeset
2685 if (ret_type == T_FLOAT || ret_type == T_DOUBLE ) {
a61af66fc99e Initial load
duke
parents:
diff changeset
2686 restore_native_result(masm, ret_type, stack_slots);
a61af66fc99e Initial load
duke
parents:
diff changeset
2687 }
a61af66fc99e Initial load
duke
parents:
diff changeset
2688 __ jmp(unlock_done);
a61af66fc99e Initial load
duke
parents:
diff changeset
2689
a61af66fc99e Initial load
duke
parents:
diff changeset
2690 // END Slow path unlock
a61af66fc99e Initial load
duke
parents:
diff changeset
2691
a61af66fc99e Initial load
duke
parents:
diff changeset
2692 } // synchronized
a61af66fc99e Initial load
duke
parents:
diff changeset
2693
a61af66fc99e Initial load
duke
parents:
diff changeset
2694 // SLOW PATH Reguard the stack if needed
a61af66fc99e Initial load
duke
parents:
diff changeset
2695
a61af66fc99e Initial load
duke
parents:
diff changeset
2696 __ bind(reguard);
a61af66fc99e Initial load
duke
parents:
diff changeset
2697 save_native_result(masm, ret_type, stack_slots);
304
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 196
diff changeset
2698 __ mov(r12, rsp); // remember sp
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 196
diff changeset
2699 __ subptr(rsp, frame::arg_reg_save_area_bytes); // windows
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 196
diff changeset
2700 __ andptr(rsp, -16); // align stack as required by ABI
0
a61af66fc99e Initial load
duke
parents:
diff changeset
2701 __ call(RuntimeAddress(CAST_FROM_FN_PTR(address, SharedRuntime::reguard_yellow_pages)));
304
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 196
diff changeset
2702 __ mov(rsp, r12); // restore sp
113
ba764ed4b6f2 6420645: Create a vm that uses compressed oops for up to 32gb heapsizes
coleenp
parents: 0
diff changeset
2703 __ reinit_heapbase();
0
a61af66fc99e Initial load
duke
parents:
diff changeset
2704 restore_native_result(masm, ret_type, stack_slots);
a61af66fc99e Initial load
duke
parents:
diff changeset
2705 // and continue
a61af66fc99e Initial load
duke
parents:
diff changeset
2706 __ jmp(reguard_done);
a61af66fc99e Initial load
duke
parents:
diff changeset
2707
a61af66fc99e Initial load
duke
parents:
diff changeset
2708
a61af66fc99e Initial load
duke
parents:
diff changeset
2709
a61af66fc99e Initial load
duke
parents:
diff changeset
2710 __ flush();
a61af66fc99e Initial load
duke
parents:
diff changeset
2711
a61af66fc99e Initial load
duke
parents:
diff changeset
2712 nmethod *nm = nmethod::new_native_nmethod(method,
2405
3d58a4983660 7022998: JSR 292 recursive method handle calls inline themselves infinitely
twisti
parents: 2245
diff changeset
2713 compile_id,
0
a61af66fc99e Initial load
duke
parents:
diff changeset
2714 masm->code(),
a61af66fc99e Initial load
duke
parents:
diff changeset
2715 vep_offset,
a61af66fc99e Initial load
duke
parents:
diff changeset
2716 frame_complete,
a61af66fc99e Initial load
duke
parents:
diff changeset
2717 stack_slots / VMRegImpl::slots_per_word,
a61af66fc99e Initial load
duke
parents:
diff changeset
2718 (is_static ? in_ByteSize(klass_offset) : in_ByteSize(receiver_offset)),
a61af66fc99e Initial load
duke
parents:
diff changeset
2719 in_ByteSize(lock_slot_offset*VMRegImpl::stack_slot_size),
a61af66fc99e Initial load
duke
parents:
diff changeset
2720 oop_maps);
4873
0382d2b469b2 7013347: allow crypto functions to be called inline to enhance performance
never
parents: 4057
diff changeset
2721
0382d2b469b2 7013347: allow crypto functions to be called inline to enhance performance
never
parents: 4057
diff changeset
2722 if (is_critical_native) {
0382d2b469b2 7013347: allow crypto functions to be called inline to enhance performance
never
parents: 4057
diff changeset
2723 nm->set_lazy_critical_native(true);
0382d2b469b2 7013347: allow crypto functions to be called inline to enhance performance
never
parents: 4057
diff changeset
2724 }
0382d2b469b2 7013347: allow crypto functions to be called inline to enhance performance
never
parents: 4057
diff changeset
2725
0
a61af66fc99e Initial load
duke
parents:
diff changeset
2726 return nm;
a61af66fc99e Initial load
duke
parents:
diff changeset
2727
a61af66fc99e Initial load
duke
parents:
diff changeset
2728 }
a61af66fc99e Initial load
duke
parents:
diff changeset
2729
116
018d5b58dd4f 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 113
diff changeset
2730 #ifdef HAVE_DTRACE_H
018d5b58dd4f 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 113
diff changeset
2731 // ---------------------------------------------------------------------------
018d5b58dd4f 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 113
diff changeset
2732 // Generate a dtrace nmethod for a given signature. The method takes arguments
018d5b58dd4f 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 113
diff changeset
2733 // in the Java compiled code convention, marshals them to the native
018d5b58dd4f 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 113
diff changeset
2734 // abi and then leaves nops at the position you would expect to call a native
018d5b58dd4f 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 113
diff changeset
2735 // function. When the probe is enabled the nops are replaced with a trap
018d5b58dd4f 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 113
diff changeset
2736 // instruction that dtrace inserts and the trace will cause a notification
018d5b58dd4f 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 113
diff changeset
2737 // to dtrace.
018d5b58dd4f 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 113
diff changeset
2738 //
018d5b58dd4f 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 113
diff changeset
2739 // The probes are only able to take primitive types and java/lang/String as
018d5b58dd4f 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 113
diff changeset
2740 // arguments. No other java types are allowed. Strings are converted to utf8
018d5b58dd4f 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 113
diff changeset
2741 // strings so that from dtrace point of view java strings are converted to C
018d5b58dd4f 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 113
diff changeset
2742 // strings. There is an arbitrary fixed limit on the total space that a method
018d5b58dd4f 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 113
diff changeset
2743 // can use for converting the strings. (256 chars per string in the signature).
018d5b58dd4f 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 113
diff changeset
2744 // So any java string larger then this is truncated.
018d5b58dd4f 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 113
diff changeset
2745
018d5b58dd4f 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 113
diff changeset
2746 static int fp_offset[ConcreteRegisterImpl::number_of_registers] = { 0 };
018d5b58dd4f 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 113
diff changeset
2747 static bool offsets_initialized = false;
018d5b58dd4f 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 113
diff changeset
2748
018d5b58dd4f 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 113
diff changeset
2749
018d5b58dd4f 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 113
diff changeset
2750 nmethod *SharedRuntime::generate_dtrace_nmethod(MacroAssembler *masm,
018d5b58dd4f 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 113
diff changeset
2751 methodHandle method) {
018d5b58dd4f 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 113
diff changeset
2752
018d5b58dd4f 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 113
diff changeset
2753
018d5b58dd4f 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 113
diff changeset
2754 // generate_dtrace_nmethod is guarded by a mutex so we are sure to
018d5b58dd4f 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 113
diff changeset
2755 // be single threaded in this method.
018d5b58dd4f 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 113
diff changeset
2756 assert(AdapterHandlerLibrary_lock->owned_by_self(), "must be");
018d5b58dd4f 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 113
diff changeset
2757
018d5b58dd4f 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 113
diff changeset
2758 if (!offsets_initialized) {
018d5b58dd4f 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 113
diff changeset
2759 fp_offset[c_rarg0->as_VMReg()->value()] = -1 * wordSize;
018d5b58dd4f 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 113
diff changeset
2760 fp_offset[c_rarg1->as_VMReg()->value()] = -2 * wordSize;
018d5b58dd4f 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 113
diff changeset
2761 fp_offset[c_rarg2->as_VMReg()->value()] = -3 * wordSize;
018d5b58dd4f 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 113
diff changeset
2762 fp_offset[c_rarg3->as_VMReg()->value()] = -4 * wordSize;
018d5b58dd4f 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 113
diff changeset
2763 fp_offset[c_rarg4->as_VMReg()->value()] = -5 * wordSize;
018d5b58dd4f 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 113
diff changeset
2764 fp_offset[c_rarg5->as_VMReg()->value()] = -6 * wordSize;
018d5b58dd4f 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 113
diff changeset
2765
018d5b58dd4f 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 113
diff changeset
2766 fp_offset[c_farg0->as_VMReg()->value()] = -7 * wordSize;
018d5b58dd4f 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 113
diff changeset
2767 fp_offset[c_farg1->as_VMReg()->value()] = -8 * wordSize;
018d5b58dd4f 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 113
diff changeset
2768 fp_offset[c_farg2->as_VMReg()->value()] = -9 * wordSize;
018d5b58dd4f 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 113
diff changeset
2769 fp_offset[c_farg3->as_VMReg()->value()] = -10 * wordSize;
018d5b58dd4f 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 113
diff changeset
2770 fp_offset[c_farg4->as_VMReg()->value()] = -11 * wordSize;
018d5b58dd4f 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 113
diff changeset
2771 fp_offset[c_farg5->as_VMReg()->value()] = -12 * wordSize;
018d5b58dd4f 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 113
diff changeset
2772 fp_offset[c_farg6->as_VMReg()->value()] = -13 * wordSize;
018d5b58dd4f 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 113
diff changeset
2773 fp_offset[c_farg7->as_VMReg()->value()] = -14 * wordSize;
018d5b58dd4f 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 113
diff changeset
2774
018d5b58dd4f 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 113
diff changeset
2775 offsets_initialized = true;
018d5b58dd4f 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 113
diff changeset
2776 }
018d5b58dd4f 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 113
diff changeset
2777 // Fill in the signature array, for the calling-convention call.
018d5b58dd4f 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 113
diff changeset
2778 int total_args_passed = method->size_of_parameters();
018d5b58dd4f 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 113
diff changeset
2779
018d5b58dd4f 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 113
diff changeset
2780 BasicType* in_sig_bt = NEW_RESOURCE_ARRAY(BasicType, total_args_passed);
018d5b58dd4f 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 113
diff changeset
2781 VMRegPair *in_regs = NEW_RESOURCE_ARRAY(VMRegPair, total_args_passed);
018d5b58dd4f 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 113
diff changeset
2782
018d5b58dd4f 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 113
diff changeset
2783 // The signature we are going to use for the trap that dtrace will see
018d5b58dd4f 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 113
diff changeset
2784 // java/lang/String is converted. We drop "this" and any other object
018d5b58dd4f 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 113
diff changeset
2785 // is converted to NULL. (A one-slot java/lang/Long object reference
018d5b58dd4f 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 113
diff changeset
2786 // is converted to a two-slot long, which is why we double the allocation).
018d5b58dd4f 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 113
diff changeset
2787 BasicType* out_sig_bt = NEW_RESOURCE_ARRAY(BasicType, total_args_passed * 2);
018d5b58dd4f 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 113
diff changeset
2788 VMRegPair* out_regs = NEW_RESOURCE_ARRAY(VMRegPair, total_args_passed * 2);
018d5b58dd4f 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 113
diff changeset
2789
018d5b58dd4f 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 113
diff changeset
2790 int i=0;
018d5b58dd4f 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 113
diff changeset
2791 int total_strings = 0;
018d5b58dd4f 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 113
diff changeset
2792 int first_arg_to_pass = 0;
018d5b58dd4f 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 113
diff changeset
2793 int total_c_args = 0;
018d5b58dd4f 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 113
diff changeset
2794
018d5b58dd4f 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 113
diff changeset
2795 // Skip the receiver as dtrace doesn't want to see it
018d5b58dd4f 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 113
diff changeset
2796 if( !method->is_static() ) {
018d5b58dd4f 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 113
diff changeset
2797 in_sig_bt[i++] = T_OBJECT;
018d5b58dd4f 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 113
diff changeset
2798 first_arg_to_pass = 1;
018d5b58dd4f 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 113
diff changeset
2799 }
018d5b58dd4f 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 113
diff changeset
2800
018d5b58dd4f 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 113
diff changeset
2801 // We need to convert the java args to where a native (non-jni) function
018d5b58dd4f 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 113
diff changeset
2802 // would expect them. To figure out where they go we convert the java
018d5b58dd4f 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 113
diff changeset
2803 // signature to a C signature.
018d5b58dd4f 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 113
diff changeset
2804
018d5b58dd4f 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 113
diff changeset
2805 SignatureStream ss(method->signature());
018d5b58dd4f 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 113
diff changeset
2806 for ( ; !ss.at_return_type(); ss.next()) {
018d5b58dd4f 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 113
diff changeset
2807 BasicType bt = ss.type();
018d5b58dd4f 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 113
diff changeset
2808 in_sig_bt[i++] = bt; // Collect remaining bits of signature
018d5b58dd4f 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 113
diff changeset
2809 out_sig_bt[total_c_args++] = bt;
018d5b58dd4f 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 113
diff changeset
2810 if( bt == T_OBJECT) {
2177
3582bf76420e 6990754: Use native memory and reference counting to implement SymbolTable
coleenp
parents: 1972
diff changeset
2811 Symbol* s = ss.as_symbol_or_null(); // symbol is created
116
018d5b58dd4f 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 113
diff changeset
2812 if (s == vmSymbols::java_lang_String()) {
018d5b58dd4f 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 113
diff changeset
2813 total_strings++;
018d5b58dd4f 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 113
diff changeset
2814 out_sig_bt[total_c_args-1] = T_ADDRESS;
018d5b58dd4f 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 113
diff changeset
2815 } else if (s == vmSymbols::java_lang_Boolean() ||
018d5b58dd4f 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 113
diff changeset
2816 s == vmSymbols::java_lang_Character() ||
018d5b58dd4f 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 113
diff changeset
2817 s == vmSymbols::java_lang_Byte() ||
018d5b58dd4f 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 113
diff changeset
2818 s == vmSymbols::java_lang_Short() ||
018d5b58dd4f 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 113
diff changeset
2819 s == vmSymbols::java_lang_Integer() ||
018d5b58dd4f 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 113
diff changeset
2820 s == vmSymbols::java_lang_Float()) {
018d5b58dd4f 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 113
diff changeset
2821 out_sig_bt[total_c_args-1] = T_INT;
018d5b58dd4f 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 113
diff changeset
2822 } else if (s == vmSymbols::java_lang_Long() ||
018d5b58dd4f 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 113
diff changeset
2823 s == vmSymbols::java_lang_Double()) {
018d5b58dd4f 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 113
diff changeset
2824 out_sig_bt[total_c_args-1] = T_LONG;
018d5b58dd4f 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 113
diff changeset
2825 out_sig_bt[total_c_args++] = T_VOID;
018d5b58dd4f 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 113
diff changeset
2826 }
018d5b58dd4f 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 113
diff changeset
2827 } else if ( bt == T_LONG || bt == T_DOUBLE ) {
018d5b58dd4f 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 113
diff changeset
2828 in_sig_bt[i++] = T_VOID; // Longs & doubles take 2 Java slots
018d5b58dd4f 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 113
diff changeset
2829 // We convert double to long
018d5b58dd4f 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 113
diff changeset
2830 out_sig_bt[total_c_args-1] = T_LONG;
018d5b58dd4f 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 113
diff changeset
2831 out_sig_bt[total_c_args++] = T_VOID;
018d5b58dd4f 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 113
diff changeset
2832 } else if ( bt == T_FLOAT) {
018d5b58dd4f 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 113
diff changeset
2833 // We convert float to int
018d5b58dd4f 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 113
diff changeset
2834 out_sig_bt[total_c_args-1] = T_INT;
018d5b58dd4f 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 113
diff changeset
2835 }
018d5b58dd4f 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 113
diff changeset
2836 }
018d5b58dd4f 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 113
diff changeset
2837
018d5b58dd4f 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 113
diff changeset
2838 assert(i==total_args_passed, "validly parsed signature");
018d5b58dd4f 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 113
diff changeset
2839
018d5b58dd4f 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 113
diff changeset
2840 // Now get the compiled-Java layout as input arguments
018d5b58dd4f 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 113
diff changeset
2841 int comp_args_on_stack;
018d5b58dd4f 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 113
diff changeset
2842 comp_args_on_stack = SharedRuntime::java_calling_convention(
018d5b58dd4f 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 113
diff changeset
2843 in_sig_bt, in_regs, total_args_passed, false);
018d5b58dd4f 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 113
diff changeset
2844
018d5b58dd4f 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 113
diff changeset
2845 // Now figure out where the args must be stored and how much stack space
018d5b58dd4f 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 113
diff changeset
2846 // they require (neglecting out_preserve_stack_slots but space for storing
018d5b58dd4f 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 113
diff changeset
2847 // the 1st six register arguments). It's weird see int_stk_helper.
018d5b58dd4f 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 113
diff changeset
2848
018d5b58dd4f 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 113
diff changeset
2849 int out_arg_slots;
14416
6a936747b569 8024344: PPC64 (part 112): C argument in register AND stack slot.
goetz
parents: 10998
diff changeset
2850 out_arg_slots = c_calling_convention(out_sig_bt, out_regs, NULL, total_c_args);
116
018d5b58dd4f 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 113
diff changeset
2851
018d5b58dd4f 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 113
diff changeset
2852 // Calculate the total number of stack slots we will need.
018d5b58dd4f 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 113
diff changeset
2853
018d5b58dd4f 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 113
diff changeset
2854 // First count the abi requirement plus all of the outgoing args
018d5b58dd4f 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 113
diff changeset
2855 int stack_slots = SharedRuntime::out_preserve_stack_slots() + out_arg_slots;
018d5b58dd4f 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 113
diff changeset
2856
018d5b58dd4f 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 113
diff changeset
2857 // Now space for the string(s) we must convert
018d5b58dd4f 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 113
diff changeset
2858 int* string_locs = NEW_RESOURCE_ARRAY(int, total_strings + 1);
018d5b58dd4f 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 113
diff changeset
2859 for (i = 0; i < total_strings ; i++) {
018d5b58dd4f 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 113
diff changeset
2860 string_locs[i] = stack_slots;
018d5b58dd4f 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 113
diff changeset
2861 stack_slots += max_dtrace_string_size / VMRegImpl::stack_slot_size;
018d5b58dd4f 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 113
diff changeset
2862 }
018d5b58dd4f 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 113
diff changeset
2863
018d5b58dd4f 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 113
diff changeset
2864 // Plus the temps we might need to juggle register args
018d5b58dd4f 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 113
diff changeset
2865 // regs take two slots each
018d5b58dd4f 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 113
diff changeset
2866 stack_slots += (Argument::n_int_register_parameters_c +
018d5b58dd4f 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 113
diff changeset
2867 Argument::n_float_register_parameters_c) * 2;
018d5b58dd4f 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 113
diff changeset
2868
018d5b58dd4f 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 113
diff changeset
2869
018d5b58dd4f 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 113
diff changeset
2870 // + 4 for return address (which we own) and saved rbp,
018d5b58dd4f 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 113
diff changeset
2871
018d5b58dd4f 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 113
diff changeset
2872 stack_slots += 4;
018d5b58dd4f 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 113
diff changeset
2873
018d5b58dd4f 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 113
diff changeset
2874 // Ok The space we have allocated will look like:
018d5b58dd4f 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 113
diff changeset
2875 //
018d5b58dd4f 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 113
diff changeset
2876 //
018d5b58dd4f 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 113
diff changeset
2877 // FP-> | |
018d5b58dd4f 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 113
diff changeset
2878 // |---------------------|
018d5b58dd4f 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 113
diff changeset
2879 // | string[n] |
018d5b58dd4f 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 113
diff changeset
2880 // |---------------------| <- string_locs[n]
018d5b58dd4f 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 113
diff changeset
2881 // | string[n-1] |
018d5b58dd4f 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 113
diff changeset
2882 // |---------------------| <- string_locs[n-1]
018d5b58dd4f 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 113
diff changeset
2883 // | ... |
018d5b58dd4f 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 113
diff changeset
2884 // | ... |
018d5b58dd4f 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 113
diff changeset
2885 // |---------------------| <- string_locs[1]
018d5b58dd4f 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 113
diff changeset
2886 // | string[0] |
018d5b58dd4f 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 113
diff changeset
2887 // |---------------------| <- string_locs[0]
018d5b58dd4f 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 113
diff changeset
2888 // | outbound memory |
018d5b58dd4f 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 113
diff changeset
2889 // | based arguments |
018d5b58dd4f 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 113
diff changeset
2890 // | |
018d5b58dd4f 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 113
diff changeset
2891 // |---------------------|
018d5b58dd4f 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 113
diff changeset
2892 // | |
018d5b58dd4f 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 113
diff changeset
2893 // SP-> | out_preserved_slots |
018d5b58dd4f 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 113
diff changeset
2894 //
018d5b58dd4f 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 113
diff changeset
2895 //
018d5b58dd4f 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 113
diff changeset
2896
018d5b58dd4f 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 113
diff changeset
2897 // Now compute actual number of stack words we need rounding to make
018d5b58dd4f 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 113
diff changeset
2898 // stack properly aligned.
018d5b58dd4f 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 113
diff changeset
2899 stack_slots = round_to(stack_slots, 4 * VMRegImpl::slots_per_word);
018d5b58dd4f 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 113
diff changeset
2900
018d5b58dd4f 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 113
diff changeset
2901 int stack_size = stack_slots * VMRegImpl::stack_slot_size;
018d5b58dd4f 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 113
diff changeset
2902
018d5b58dd4f 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 113
diff changeset
2903 intptr_t start = (intptr_t)__ pc();
018d5b58dd4f 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 113
diff changeset
2904
018d5b58dd4f 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 113
diff changeset
2905 // First thing make an ic check to see if we should even be here
018d5b58dd4f 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 113
diff changeset
2906
018d5b58dd4f 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 113
diff changeset
2907 // We are free to use all registers as temps without saving them and
018d5b58dd4f 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 113
diff changeset
2908 // restoring them except rbp. rbp, is the only callee save register
018d5b58dd4f 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 113
diff changeset
2909 // as far as the interpreter and the compiler(s) are concerned.
018d5b58dd4f 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 113
diff changeset
2910
018d5b58dd4f 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 113
diff changeset
2911 const Register ic_reg = rax;
018d5b58dd4f 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 113
diff changeset
2912 const Register receiver = rcx;
018d5b58dd4f 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 113
diff changeset
2913 Label hit;
018d5b58dd4f 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 113
diff changeset
2914 Label exception_pending;
018d5b58dd4f 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 113
diff changeset
2915
018d5b58dd4f 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 113
diff changeset
2916
018d5b58dd4f 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 113
diff changeset
2917 __ verify_oop(receiver);
018d5b58dd4f 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 113
diff changeset
2918 __ cmpl(ic_reg, Address(receiver, oopDesc::klass_offset_in_bytes()));
018d5b58dd4f 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 113
diff changeset
2919 __ jcc(Assembler::equal, hit);
018d5b58dd4f 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 113
diff changeset
2920
018d5b58dd4f 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 113
diff changeset
2921 __ jump(RuntimeAddress(SharedRuntime::get_ic_miss_stub()));
018d5b58dd4f 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 113
diff changeset
2922
018d5b58dd4f 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 113
diff changeset
2923 // verified entry must be aligned for code patching.
018d5b58dd4f 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 113
diff changeset
2924 // and the first 5 bytes must be in the same cache line
018d5b58dd4f 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 113
diff changeset
2925 // if we align at 8 then we will be sure 5 bytes are in the same line
018d5b58dd4f 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 113
diff changeset
2926 __ align(8);
018d5b58dd4f 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 113
diff changeset
2927
018d5b58dd4f 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 113
diff changeset
2928 __ bind(hit);
018d5b58dd4f 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 113
diff changeset
2929
018d5b58dd4f 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 113
diff changeset
2930 int vep_offset = ((intptr_t)__ pc()) - start;
018d5b58dd4f 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 113
diff changeset
2931
018d5b58dd4f 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 113
diff changeset
2932
018d5b58dd4f 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 113
diff changeset
2933 // The instruction at the verified entry point must be 5 bytes or longer
018d5b58dd4f 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 113
diff changeset
2934 // because it can be patched on the fly by make_non_entrant. The stack bang
018d5b58dd4f 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 113
diff changeset
2935 // instruction fits that requirement.
018d5b58dd4f 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 113
diff changeset
2936
018d5b58dd4f 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 113
diff changeset
2937 // Generate stack overflow check
018d5b58dd4f 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 113
diff changeset
2938
018d5b58dd4f 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 113
diff changeset
2939 if (UseStackBanging) {
018d5b58dd4f 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 113
diff changeset
2940 if (stack_size <= StackShadowPages*os::vm_page_size()) {
018d5b58dd4f 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 113
diff changeset
2941 __ bang_stack_with_offset(StackShadowPages*os::vm_page_size());
018d5b58dd4f 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 113
diff changeset
2942 } else {
018d5b58dd4f 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 113
diff changeset
2943 __ movl(rax, stack_size);
018d5b58dd4f 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 113
diff changeset
2944 __ bang_stack_size(rax, rbx);
018d5b58dd4f 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 113
diff changeset
2945 }
018d5b58dd4f 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 113
diff changeset
2946 } else {
018d5b58dd4f 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 113
diff changeset
2947 // need a 5 byte instruction to allow MT safe patching to non-entrant
018d5b58dd4f 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 113
diff changeset
2948 __ fat_nop();
018d5b58dd4f 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 113
diff changeset
2949 }
018d5b58dd4f 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 113
diff changeset
2950
018d5b58dd4f 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 113
diff changeset
2951 assert(((uintptr_t)__ pc() - start - vep_offset) >= 5,
018d5b58dd4f 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 113
diff changeset
2952 "valid size for make_non_entrant");
018d5b58dd4f 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 113
diff changeset
2953
018d5b58dd4f 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 113
diff changeset
2954 // Generate a new frame for the wrapper.
018d5b58dd4f 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 113
diff changeset
2955 __ enter();
018d5b58dd4f 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 113
diff changeset
2956
018d5b58dd4f 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 113
diff changeset
2957 // -4 because return address is already present and so is saved rbp,
018d5b58dd4f 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 113
diff changeset
2958 if (stack_size - 2*wordSize != 0) {
018d5b58dd4f 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 113
diff changeset
2959 __ subq(rsp, stack_size - 2*wordSize);
018d5b58dd4f 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 113
diff changeset
2960 }
018d5b58dd4f 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 113
diff changeset
2961
018d5b58dd4f 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 113
diff changeset
2962 // Frame is now completed as far a size and linkage.
018d5b58dd4f 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 113
diff changeset
2963
018d5b58dd4f 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 113
diff changeset
2964 int frame_complete = ((intptr_t)__ pc()) - start;
018d5b58dd4f 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 113
diff changeset
2965
018d5b58dd4f 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 113
diff changeset
2966 int c_arg, j_arg;
018d5b58dd4f 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 113
diff changeset
2967
018d5b58dd4f 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 113
diff changeset
2968 // State of input register args
018d5b58dd4f 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 113
diff changeset
2969
018d5b58dd4f 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 113
diff changeset
2970 bool live[ConcreteRegisterImpl::number_of_registers];
018d5b58dd4f 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 113
diff changeset
2971
018d5b58dd4f 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 113
diff changeset
2972 live[j_rarg0->as_VMReg()->value()] = false;
018d5b58dd4f 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 113
diff changeset
2973 live[j_rarg1->as_VMReg()->value()] = false;
018d5b58dd4f 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 113
diff changeset
2974 live[j_rarg2->as_VMReg()->value()] = false;
018d5b58dd4f 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 113
diff changeset
2975 live[j_rarg3->as_VMReg()->value()] = false;
018d5b58dd4f 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 113
diff changeset
2976 live[j_rarg4->as_VMReg()->value()] = false;
018d5b58dd4f 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 113
diff changeset
2977 live[j_rarg5->as_VMReg()->value()] = false;
018d5b58dd4f 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 113
diff changeset
2978
018d5b58dd4f 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 113
diff changeset
2979 live[j_farg0->as_VMReg()->value()] = false;
018d5b58dd4f 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 113
diff changeset
2980 live[j_farg1->as_VMReg()->value()] = false;
018d5b58dd4f 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 113
diff changeset
2981 live[j_farg2->as_VMReg()->value()] = false;
018d5b58dd4f 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 113
diff changeset
2982 live[j_farg3->as_VMReg()->value()] = false;
018d5b58dd4f 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 113
diff changeset
2983 live[j_farg4->as_VMReg()->value()] = false;
018d5b58dd4f 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 113
diff changeset
2984 live[j_farg5->as_VMReg()->value()] = false;
018d5b58dd4f 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 113
diff changeset
2985 live[j_farg6->as_VMReg()->value()] = false;
018d5b58dd4f 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 113
diff changeset
2986 live[j_farg7->as_VMReg()->value()] = false;
018d5b58dd4f 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 113
diff changeset
2987
018d5b58dd4f 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 113
diff changeset
2988
018d5b58dd4f 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 113
diff changeset
2989 bool rax_is_zero = false;
018d5b58dd4f 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 113
diff changeset
2990
018d5b58dd4f 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 113
diff changeset
2991 // All args (except strings) destined for the stack are moved first
018d5b58dd4f 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 113
diff changeset
2992 for (j_arg = first_arg_to_pass, c_arg = 0 ;
018d5b58dd4f 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 113
diff changeset
2993 j_arg < total_args_passed ; j_arg++, c_arg++ ) {
018d5b58dd4f 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 113
diff changeset
2994 VMRegPair src = in_regs[j_arg];
018d5b58dd4f 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 113
diff changeset
2995 VMRegPair dst = out_regs[c_arg];
018d5b58dd4f 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 113
diff changeset
2996
018d5b58dd4f 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 113
diff changeset
2997 // Get the real reg value or a dummy (rsp)
018d5b58dd4f 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 113
diff changeset
2998
018d5b58dd4f 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 113
diff changeset
2999 int src_reg = src.first()->is_reg() ?
018d5b58dd4f 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 113
diff changeset
3000 src.first()->value() :
018d5b58dd4f 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 113
diff changeset
3001 rsp->as_VMReg()->value();
018d5b58dd4f 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 113
diff changeset
3002
018d5b58dd4f 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 113
diff changeset
3003 bool useless = in_sig_bt[j_arg] == T_ARRAY ||
018d5b58dd4f 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 113
diff changeset
3004 (in_sig_bt[j_arg] == T_OBJECT &&
018d5b58dd4f 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 113
diff changeset
3005 out_sig_bt[c_arg] != T_INT &&
018d5b58dd4f 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 113
diff changeset
3006 out_sig_bt[c_arg] != T_ADDRESS &&
018d5b58dd4f 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 113
diff changeset
3007 out_sig_bt[c_arg] != T_LONG);
018d5b58dd4f 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 113
diff changeset
3008
018d5b58dd4f 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 113
diff changeset
3009 live[src_reg] = !useless;
018d5b58dd4f 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 113
diff changeset
3010
018d5b58dd4f 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 113
diff changeset
3011 if (dst.first()->is_stack()) {
018d5b58dd4f 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 113
diff changeset
3012
018d5b58dd4f 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 113
diff changeset
3013 // Even though a string arg in a register is still live after this loop
018d5b58dd4f 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 113
diff changeset
3014 // after the string conversion loop (next) it will be dead so we take
018d5b58dd4f 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 113
diff changeset
3015 // advantage of that now for simpler code to manage live.
018d5b58dd4f 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 113
diff changeset
3016
018d5b58dd4f 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 113
diff changeset
3017 live[src_reg] = false;
018d5b58dd4f 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 113
diff changeset
3018 switch (in_sig_bt[j_arg]) {
018d5b58dd4f 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 113
diff changeset
3019
018d5b58dd4f 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 113
diff changeset
3020 case T_ARRAY:
018d5b58dd4f 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 113
diff changeset
3021 case T_OBJECT:
018d5b58dd4f 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 113
diff changeset
3022 {
018d5b58dd4f 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 113
diff changeset
3023 Address stack_dst(rsp, reg2offset_out(dst.first()));
018d5b58dd4f 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 113
diff changeset
3024
018d5b58dd4f 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 113
diff changeset
3025 if (out_sig_bt[c_arg] == T_INT || out_sig_bt[c_arg] == T_LONG) {
018d5b58dd4f 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 113
diff changeset
3026 // need to unbox a one-word value
018d5b58dd4f 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 113
diff changeset
3027 Register in_reg = rax;
018d5b58dd4f 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 113
diff changeset
3028 if ( src.first()->is_reg() ) {
018d5b58dd4f 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 113
diff changeset
3029 in_reg = src.first()->as_Register();
018d5b58dd4f 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 113
diff changeset
3030 } else {
018d5b58dd4f 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 113
diff changeset
3031 __ movq(rax, Address(rbp, reg2offset_in(src.first())));
018d5b58dd4f 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 113
diff changeset
3032 rax_is_zero = false;
018d5b58dd4f 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 113
diff changeset
3033 }
018d5b58dd4f 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 113
diff changeset
3034 Label skipUnbox;
018d5b58dd4f 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 113
diff changeset
3035 __ movptr(Address(rsp, reg2offset_out(dst.first())),
018d5b58dd4f 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 113
diff changeset
3036 (int32_t)NULL_WORD);
018d5b58dd4f 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 113
diff changeset
3037 __ testq(in_reg, in_reg);
018d5b58dd4f 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 113
diff changeset
3038 __ jcc(Assembler::zero, skipUnbox);
018d5b58dd4f 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 113
diff changeset
3039
165
437d03ea40b1 6703888: Compressed Oops: use the 32-bits gap after klass in a object
kvn
parents: 116
diff changeset
3040 BasicType bt = out_sig_bt[c_arg];
437d03ea40b1 6703888: Compressed Oops: use the 32-bits gap after klass in a object
kvn
parents: 116
diff changeset
3041 int box_offset = java_lang_boxing_object::value_offset_in_bytes(bt);
116
018d5b58dd4f 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 113
diff changeset
3042 Address src1(in_reg, box_offset);
165
437d03ea40b1 6703888: Compressed Oops: use the 32-bits gap after klass in a object
kvn
parents: 116
diff changeset
3043 if ( bt == T_LONG ) {
116
018d5b58dd4f 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 113
diff changeset
3044 __ movq(in_reg, src1);
018d5b58dd4f 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 113
diff changeset
3045 __ movq(stack_dst, in_reg);
018d5b58dd4f 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 113
diff changeset
3046 assert(out_sig_bt[c_arg+1] == T_VOID, "must be");
018d5b58dd4f 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 113
diff changeset
3047 ++c_arg; // skip over T_VOID to keep the loop indices in sync
018d5b58dd4f 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 113
diff changeset
3048 } else {
018d5b58dd4f 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 113
diff changeset
3049 __ movl(in_reg, src1);
018d5b58dd4f 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 113
diff changeset
3050 __ movl(stack_dst, in_reg);
018d5b58dd4f 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 113
diff changeset
3051 }
018d5b58dd4f 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 113
diff changeset
3052
018d5b58dd4f 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 113
diff changeset
3053 __ bind(skipUnbox);
018d5b58dd4f 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 113
diff changeset
3054 } else if (out_sig_bt[c_arg] != T_ADDRESS) {
018d5b58dd4f 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 113
diff changeset
3055 // Convert the arg to NULL
018d5b58dd4f 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 113
diff changeset
3056 if (!rax_is_zero) {
018d5b58dd4f 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 113
diff changeset
3057 __ xorq(rax, rax);
018d5b58dd4f 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 113
diff changeset
3058 rax_is_zero = true;
018d5b58dd4f 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 113
diff changeset
3059 }
018d5b58dd4f 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 113
diff changeset
3060 __ movq(stack_dst, rax);
018d5b58dd4f 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 113
diff changeset
3061 }
018d5b58dd4f 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 113
diff changeset
3062 }
018d5b58dd4f 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 113
diff changeset
3063 break;
018d5b58dd4f 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 113
diff changeset
3064
018d5b58dd4f 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 113
diff changeset
3065 case T_VOID:
018d5b58dd4f 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 113
diff changeset
3066 break;
018d5b58dd4f 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 113
diff changeset
3067
018d5b58dd4f 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 113
diff changeset
3068 case T_FLOAT:
018d5b58dd4f 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 113
diff changeset
3069 // This does the right thing since we know it is destined for the
018d5b58dd4f 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 113
diff changeset
3070 // stack
018d5b58dd4f 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 113
diff changeset
3071 float_move(masm, src, dst);
018d5b58dd4f 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 113
diff changeset
3072 break;
018d5b58dd4f 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 113
diff changeset
3073
018d5b58dd4f 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 113
diff changeset
3074 case T_DOUBLE:
018d5b58dd4f 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 113
diff changeset
3075 // This does the right thing since we know it is destined for the
018d5b58dd4f 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 113
diff changeset
3076 // stack
018d5b58dd4f 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 113
diff changeset
3077 double_move(masm, src, dst);
018d5b58dd4f 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 113
diff changeset
3078 break;
018d5b58dd4f 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 113
diff changeset
3079
018d5b58dd4f 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 113
diff changeset
3080 case T_LONG :
018d5b58dd4f 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 113
diff changeset
3081 long_move(masm, src, dst);
018d5b58dd4f 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 113
diff changeset
3082 break;
018d5b58dd4f 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 113
diff changeset
3083
018d5b58dd4f 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 113
diff changeset
3084 case T_ADDRESS: assert(false, "found T_ADDRESS in java args");
018d5b58dd4f 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 113
diff changeset
3085
018d5b58dd4f 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 113
diff changeset
3086 default:
018d5b58dd4f 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 113
diff changeset
3087 move32_64(masm, src, dst);
018d5b58dd4f 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 113
diff changeset
3088 }
018d5b58dd4f 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 113
diff changeset
3089 }
018d5b58dd4f 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 113
diff changeset
3090
018d5b58dd4f 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 113
diff changeset
3091 }
018d5b58dd4f 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 113
diff changeset
3092
018d5b58dd4f 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 113
diff changeset
3093 // If we have any strings we must store any register based arg to the stack
018d5b58dd4f 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 113
diff changeset
3094 // This includes any still live xmm registers too.
018d5b58dd4f 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 113
diff changeset
3095
018d5b58dd4f 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 113
diff changeset
3096 int sid = 0;
018d5b58dd4f 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 113
diff changeset
3097
018d5b58dd4f 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 113
diff changeset
3098 if (total_strings > 0 ) {
018d5b58dd4f 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 113
diff changeset
3099 for (j_arg = first_arg_to_pass, c_arg = 0 ;
018d5b58dd4f 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 113
diff changeset
3100 j_arg < total_args_passed ; j_arg++, c_arg++ ) {
018d5b58dd4f 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 113
diff changeset
3101 VMRegPair src = in_regs[j_arg];
018d5b58dd4f 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 113
diff changeset
3102 VMRegPair dst = out_regs[c_arg];
018d5b58dd4f 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 113
diff changeset
3103
018d5b58dd4f 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 113
diff changeset
3104 if (src.first()->is_reg()) {
018d5b58dd4f 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 113
diff changeset
3105 Address src_tmp(rbp, fp_offset[src.first()->value()]);
018d5b58dd4f 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 113
diff changeset
3106
018d5b58dd4f 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 113
diff changeset
3107 // string oops were left untouched by the previous loop even if the
018d5b58dd4f 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 113
diff changeset
3108 // eventual (converted) arg is destined for the stack so park them
018d5b58dd4f 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 113
diff changeset
3109 // away now (except for first)
018d5b58dd4f 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 113
diff changeset
3110
018d5b58dd4f 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 113
diff changeset
3111 if (out_sig_bt[c_arg] == T_ADDRESS) {
018d5b58dd4f 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 113
diff changeset
3112 Address utf8_addr = Address(
018d5b58dd4f 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 113
diff changeset
3113 rsp, string_locs[sid++] * VMRegImpl::stack_slot_size);
018d5b58dd4f 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 113
diff changeset
3114 if (sid != 1) {
018d5b58dd4f 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 113
diff changeset
3115 // The first string arg won't be killed until after the utf8
018d5b58dd4f 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 113
diff changeset
3116 // conversion
018d5b58dd4f 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 113
diff changeset
3117 __ movq(utf8_addr, src.first()->as_Register());
018d5b58dd4f 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 113
diff changeset
3118 }
018d5b58dd4f 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 113
diff changeset
3119 } else if (dst.first()->is_reg()) {
018d5b58dd4f 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 113
diff changeset
3120 if (in_sig_bt[j_arg] == T_FLOAT || in_sig_bt[j_arg] == T_DOUBLE) {
018d5b58dd4f 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 113
diff changeset
3121
018d5b58dd4f 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 113
diff changeset
3122 // Convert the xmm register to an int and store it in the reserved
018d5b58dd4f 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 113
diff changeset
3123 // location for the eventual c register arg
018d5b58dd4f 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 113
diff changeset
3124 XMMRegister f = src.first()->as_XMMRegister();
018d5b58dd4f 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 113
diff changeset
3125 if (in_sig_bt[j_arg] == T_FLOAT) {
018d5b58dd4f 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 113
diff changeset
3126 __ movflt(src_tmp, f);
018d5b58dd4f 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 113
diff changeset
3127 } else {
018d5b58dd4f 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 113
diff changeset
3128 __ movdbl(src_tmp, f);
018d5b58dd4f 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 113
diff changeset
3129 }
018d5b58dd4f 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 113
diff changeset
3130 } else {
018d5b58dd4f 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 113
diff changeset
3131 // If the arg is an oop type we don't support don't bother to store
018d5b58dd4f 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 113
diff changeset
3132 // it remember string was handled above.
018d5b58dd4f 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 113
diff changeset
3133 bool useless = in_sig_bt[j_arg] == T_ARRAY ||
018d5b58dd4f 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 113
diff changeset
3134 (in_sig_bt[j_arg] == T_OBJECT &&
018d5b58dd4f 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 113
diff changeset
3135 out_sig_bt[c_arg] != T_INT &&
018d5b58dd4f 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 113
diff changeset
3136 out_sig_bt[c_arg] != T_LONG);
018d5b58dd4f 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 113
diff changeset
3137
018d5b58dd4f 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 113
diff changeset
3138 if (!useless) {
018d5b58dd4f 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 113
diff changeset
3139 __ movq(src_tmp, src.first()->as_Register());
018d5b58dd4f 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 113
diff changeset
3140 }
018d5b58dd4f 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 113
diff changeset
3141 }
018d5b58dd4f 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 113
diff changeset
3142 }
018d5b58dd4f 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 113
diff changeset
3143 }
018d5b58dd4f 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 113
diff changeset
3144 if (in_sig_bt[j_arg] == T_OBJECT && out_sig_bt[c_arg] == T_LONG) {
018d5b58dd4f 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 113
diff changeset
3145 assert(out_sig_bt[c_arg+1] == T_VOID, "must be");
018d5b58dd4f 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 113
diff changeset
3146 ++c_arg; // skip over T_VOID to keep the loop indices in sync
018d5b58dd4f 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 113
diff changeset
3147 }
018d5b58dd4f 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 113
diff changeset
3148 }
018d5b58dd4f 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 113
diff changeset
3149
018d5b58dd4f 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 113
diff changeset
3150 // Now that the volatile registers are safe, convert all the strings
018d5b58dd4f 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 113
diff changeset
3151 sid = 0;
018d5b58dd4f 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 113
diff changeset
3152
018d5b58dd4f 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 113
diff changeset
3153 for (j_arg = first_arg_to_pass, c_arg = 0 ;
018d5b58dd4f 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 113
diff changeset
3154 j_arg < total_args_passed ; j_arg++, c_arg++ ) {
018d5b58dd4f 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 113
diff changeset
3155 if (out_sig_bt[c_arg] == T_ADDRESS) {
018d5b58dd4f 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 113
diff changeset
3156 // It's a string
018d5b58dd4f 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 113
diff changeset
3157 Address utf8_addr = Address(
018d5b58dd4f 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 113
diff changeset
3158 rsp, string_locs[sid++] * VMRegImpl::stack_slot_size);
018d5b58dd4f 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 113
diff changeset
3159 // The first string we find might still be in the original java arg
018d5b58dd4f 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 113
diff changeset
3160 // register
018d5b58dd4f 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 113
diff changeset
3161
018d5b58dd4f 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 113
diff changeset
3162 VMReg src = in_regs[j_arg].first();
018d5b58dd4f 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 113
diff changeset
3163
018d5b58dd4f 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 113
diff changeset
3164 // We will need to eventually save the final argument to the trap
018d5b58dd4f 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 113
diff changeset
3165 // in the von-volatile location dedicated to src. This is the offset
018d5b58dd4f 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 113
diff changeset
3166 // from fp we will use.
018d5b58dd4f 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 113
diff changeset
3167 int src_off = src->is_reg() ?
018d5b58dd4f 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 113
diff changeset
3168 fp_offset[src->value()] : reg2offset_in(src);
018d5b58dd4f 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 113
diff changeset
3169
018d5b58dd4f 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 113
diff changeset
3170 // This is where the argument will eventually reside
018d5b58dd4f 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 113
diff changeset
3171 VMRegPair dst = out_regs[c_arg];
018d5b58dd4f 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 113
diff changeset
3172
018d5b58dd4f 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 113
diff changeset
3173 if (src->is_reg()) {
018d5b58dd4f 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 113
diff changeset
3174 if (sid == 1) {
018d5b58dd4f 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 113
diff changeset
3175 __ movq(c_rarg0, src->as_Register());
018d5b58dd4f 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 113
diff changeset
3176 } else {
018d5b58dd4f 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 113
diff changeset
3177 __ movq(c_rarg0, utf8_addr);
018d5b58dd4f 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 113
diff changeset
3178 }
018d5b58dd4f 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 113
diff changeset
3179 } else {
018d5b58dd4f 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 113
diff changeset
3180 // arg is still in the original location
018d5b58dd4f 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 113
diff changeset
3181 __ movq(c_rarg0, Address(rbp, reg2offset_in(src)));
018d5b58dd4f 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 113
diff changeset
3182 }
018d5b58dd4f 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 113
diff changeset
3183 Label done, convert;
018d5b58dd4f 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 113
diff changeset
3184
018d5b58dd4f 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 113
diff changeset
3185 // see if the oop is NULL
018d5b58dd4f 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 113
diff changeset
3186 __ testq(c_rarg0, c_rarg0);
018d5b58dd4f 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 113
diff changeset
3187 __ jcc(Assembler::notEqual, convert);
018d5b58dd4f 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 113
diff changeset
3188
018d5b58dd4f 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 113
diff changeset
3189 if (dst.first()->is_reg()) {
018d5b58dd4f 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 113
diff changeset
3190 // Save the ptr to utf string in the origina src loc or the tmp
018d5b58dd4f 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 113
diff changeset
3191 // dedicated to it
018d5b58dd4f 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 113
diff changeset
3192 __ movq(Address(rbp, src_off), c_rarg0);
018d5b58dd4f 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 113
diff changeset
3193 } else {
018d5b58dd4f 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 113
diff changeset
3194 __ movq(Address(rsp, reg2offset_out(dst.first())), c_rarg0);
018d5b58dd4f 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 113
diff changeset
3195 }
018d5b58dd4f 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 113
diff changeset
3196 __ jmp(done);
018d5b58dd4f 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 113
diff changeset
3197
018d5b58dd4f 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 113
diff changeset
3198 __ bind(convert);
018d5b58dd4f 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 113
diff changeset
3199
018d5b58dd4f 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 113
diff changeset
3200 __ lea(c_rarg1, utf8_addr);
018d5b58dd4f 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 113
diff changeset
3201 if (dst.first()->is_reg()) {
018d5b58dd4f 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 113
diff changeset
3202 __ movq(Address(rbp, src_off), c_rarg1);
018d5b58dd4f 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 113
diff changeset
3203 } else {
018d5b58dd4f 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 113
diff changeset
3204 __ movq(Address(rsp, reg2offset_out(dst.first())), c_rarg1);
018d5b58dd4f 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 113
diff changeset
3205 }
018d5b58dd4f 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 113
diff changeset
3206 // And do the conversion
018d5b58dd4f 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 113
diff changeset
3207 __ call(RuntimeAddress(
018d5b58dd4f 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 113
diff changeset
3208 CAST_FROM_FN_PTR(address, SharedRuntime::get_utf)));
018d5b58dd4f 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 113
diff changeset
3209
018d5b58dd4f 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 113
diff changeset
3210 __ bind(done);
018d5b58dd4f 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 113
diff changeset
3211 }
018d5b58dd4f 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 113
diff changeset
3212 if (in_sig_bt[j_arg] == T_OBJECT && out_sig_bt[c_arg] == T_LONG) {
018d5b58dd4f 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 113
diff changeset
3213 assert(out_sig_bt[c_arg+1] == T_VOID, "must be");
018d5b58dd4f 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 113
diff changeset
3214 ++c_arg; // skip over T_VOID to keep the loop indices in sync
018d5b58dd4f 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 113
diff changeset
3215 }
018d5b58dd4f 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 113
diff changeset
3216 }
018d5b58dd4f 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 113
diff changeset
3217 // The get_utf call killed all the c_arg registers
018d5b58dd4f 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 113
diff changeset
3218 live[c_rarg0->as_VMReg()->value()] = false;
018d5b58dd4f 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 113
diff changeset
3219 live[c_rarg1->as_VMReg()->value()] = false;
018d5b58dd4f 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 113
diff changeset
3220 live[c_rarg2->as_VMReg()->value()] = false;
018d5b58dd4f 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 113
diff changeset
3221 live[c_rarg3->as_VMReg()->value()] = false;
018d5b58dd4f 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 113
diff changeset
3222 live[c_rarg4->as_VMReg()->value()] = false;
018d5b58dd4f 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 113
diff changeset
3223 live[c_rarg5->as_VMReg()->value()] = false;
018d5b58dd4f 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 113
diff changeset
3224
018d5b58dd4f 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 113
diff changeset
3225 live[c_farg0->as_VMReg()->value()] = false;
018d5b58dd4f 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 113
diff changeset
3226 live[c_farg1->as_VMReg()->value()] = false;
018d5b58dd4f 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 113
diff changeset
3227 live[c_farg2->as_VMReg()->value()] = false;
018d5b58dd4f 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 113
diff changeset
3228 live[c_farg3->as_VMReg()->value()] = false;
018d5b58dd4f 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 113
diff changeset
3229 live[c_farg4->as_VMReg()->value()] = false;
018d5b58dd4f 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 113
diff changeset
3230 live[c_farg5->as_VMReg()->value()] = false;
018d5b58dd4f 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 113
diff changeset
3231 live[c_farg6->as_VMReg()->value()] = false;
018d5b58dd4f 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 113
diff changeset
3232 live[c_farg7->as_VMReg()->value()] = false;
018d5b58dd4f 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 113
diff changeset
3233 }
018d5b58dd4f 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 113
diff changeset
3234
018d5b58dd4f 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 113
diff changeset
3235 // Now we can finally move the register args to their desired locations
018d5b58dd4f 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 113
diff changeset
3236
018d5b58dd4f 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 113
diff changeset
3237 rax_is_zero = false;
018d5b58dd4f 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 113
diff changeset
3238
018d5b58dd4f 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 113
diff changeset
3239 for (j_arg = first_arg_to_pass, c_arg = 0 ;
018d5b58dd4f 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 113
diff changeset
3240 j_arg < total_args_passed ; j_arg++, c_arg++ ) {
018d5b58dd4f 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 113
diff changeset
3241
018d5b58dd4f 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 113
diff changeset
3242 VMRegPair src = in_regs[j_arg];
018d5b58dd4f 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 113
diff changeset
3243 VMRegPair dst = out_regs[c_arg];
018d5b58dd4f 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 113
diff changeset
3244
018d5b58dd4f 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 113
diff changeset
3245 // Only need to look for args destined for the interger registers (since we
018d5b58dd4f 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 113
diff changeset
3246 // convert float/double args to look like int/long outbound)
018d5b58dd4f 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 113
diff changeset
3247 if (dst.first()->is_reg()) {
018d5b58dd4f 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 113
diff changeset
3248 Register r = dst.first()->as_Register();
018d5b58dd4f 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 113
diff changeset
3249
018d5b58dd4f 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 113
diff changeset
3250 // Check if the java arg is unsupported and thereofre useless
018d5b58dd4f 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 113
diff changeset
3251 bool useless = in_sig_bt[j_arg] == T_ARRAY ||
018d5b58dd4f 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 113
diff changeset
3252 (in_sig_bt[j_arg] == T_OBJECT &&
018d5b58dd4f 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 113
diff changeset
3253 out_sig_bt[c_arg] != T_INT &&
018d5b58dd4f 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 113
diff changeset
3254 out_sig_bt[c_arg] != T_ADDRESS &&
018d5b58dd4f 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 113
diff changeset
3255 out_sig_bt[c_arg] != T_LONG);
018d5b58dd4f 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 113
diff changeset
3256
018d5b58dd4f 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 113
diff changeset
3257
018d5b58dd4f 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 113
diff changeset
3258 // If we're going to kill an existing arg save it first
018d5b58dd4f 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 113
diff changeset
3259 if (live[dst.first()->value()]) {
018d5b58dd4f 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 113
diff changeset
3260 // you can't kill yourself
018d5b58dd4f 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 113
diff changeset
3261 if (src.first() != dst.first()) {
018d5b58dd4f 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 113
diff changeset
3262 __ movq(Address(rbp, fp_offset[dst.first()->value()]), r);
018d5b58dd4f 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 113
diff changeset
3263 }
018d5b58dd4f 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 113
diff changeset
3264 }
018d5b58dd4f 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 113
diff changeset
3265 if (src.first()->is_reg()) {
018d5b58dd4f 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 113
diff changeset
3266 if (live[src.first()->value()] ) {
018d5b58dd4f 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 113
diff changeset
3267 if (in_sig_bt[j_arg] == T_FLOAT) {
018d5b58dd4f 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 113
diff changeset
3268 __ movdl(r, src.first()->as_XMMRegister());
018d5b58dd4f 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 113
diff changeset
3269 } else if (in_sig_bt[j_arg] == T_DOUBLE) {
018d5b58dd4f 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 113
diff changeset
3270 __ movdq(r, src.first()->as_XMMRegister());
018d5b58dd4f 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 113
diff changeset
3271 } else if (r != src.first()->as_Register()) {
018d5b58dd4f 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 113
diff changeset
3272 if (!useless) {
018d5b58dd4f 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 113
diff changeset
3273 __ movq(r, src.first()->as_Register());
018d5b58dd4f 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 113
diff changeset
3274 }
018d5b58dd4f 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 113
diff changeset
3275 }
018d5b58dd4f 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 113
diff changeset
3276 } else {
018d5b58dd4f 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 113
diff changeset
3277 // If the arg is an oop type we don't support don't bother to store
018d5b58dd4f 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 113
diff changeset
3278 // it
018d5b58dd4f 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 113
diff changeset
3279 if (!useless) {
018d5b58dd4f 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 113
diff changeset
3280 if (in_sig_bt[j_arg] == T_DOUBLE ||
018d5b58dd4f 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 113
diff changeset
3281 in_sig_bt[j_arg] == T_LONG ||
018d5b58dd4f 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 113
diff changeset
3282 in_sig_bt[j_arg] == T_OBJECT ) {
018d5b58dd4f 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 113
diff changeset
3283 __ movq(r, Address(rbp, fp_offset[src.first()->value()]));
018d5b58dd4f 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 113
diff changeset
3284 } else {
018d5b58dd4f 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 113
diff changeset
3285 __ movl(r, Address(rbp, fp_offset[src.first()->value()]));
018d5b58dd4f 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 113
diff changeset
3286 }
018d5b58dd4f 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 113
diff changeset
3287 }
018d5b58dd4f 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 113
diff changeset
3288 }
018d5b58dd4f 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 113
diff changeset
3289 live[src.first()->value()] = false;
018d5b58dd4f 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 113
diff changeset
3290 } else if (!useless) {
018d5b58dd4f 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 113
diff changeset
3291 // full sized move even for int should be ok
018d5b58dd4f 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 113
diff changeset
3292 __ movq(r, Address(rbp, reg2offset_in(src.first())));
018d5b58dd4f 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 113
diff changeset
3293 }
018d5b58dd4f 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 113
diff changeset
3294
018d5b58dd4f 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 113
diff changeset
3295 // At this point r has the original java arg in the final location
018d5b58dd4f 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 113
diff changeset
3296 // (assuming it wasn't useless). If the java arg was an oop
018d5b58dd4f 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 113
diff changeset
3297 // we have a bit more to do
018d5b58dd4f 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 113
diff changeset
3298
018d5b58dd4f 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 113
diff changeset
3299 if (in_sig_bt[j_arg] == T_ARRAY || in_sig_bt[j_arg] == T_OBJECT ) {
018d5b58dd4f 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 113
diff changeset
3300 if (out_sig_bt[c_arg] == T_INT || out_sig_bt[c_arg] == T_LONG) {
018d5b58dd4f 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 113
diff changeset
3301 // need to unbox a one-word value
018d5b58dd4f 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 113
diff changeset
3302 Label skip;
018d5b58dd4f 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 113
diff changeset
3303 __ testq(r, r);
018d5b58dd4f 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 113
diff changeset
3304 __ jcc(Assembler::equal, skip);
165
437d03ea40b1 6703888: Compressed Oops: use the 32-bits gap after klass in a object
kvn
parents: 116
diff changeset
3305 BasicType bt = out_sig_bt[c_arg];
437d03ea40b1 6703888: Compressed Oops: use the 32-bits gap after klass in a object
kvn
parents: 116
diff changeset
3306 int box_offset = java_lang_boxing_object::value_offset_in_bytes(bt);
116
018d5b58dd4f 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 113
diff changeset
3307 Address src1(r, box_offset);
165
437d03ea40b1 6703888: Compressed Oops: use the 32-bits gap after klass in a object
kvn
parents: 116
diff changeset
3308 if ( bt == T_LONG ) {
116
018d5b58dd4f 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 113
diff changeset
3309 __ movq(r, src1);
018d5b58dd4f 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 113
diff changeset
3310 } else {
018d5b58dd4f 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 113
diff changeset
3311 __ movl(r, src1);
018d5b58dd4f 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 113
diff changeset
3312 }
018d5b58dd4f 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 113
diff changeset
3313 __ bind(skip);
018d5b58dd4f 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 113
diff changeset
3314
018d5b58dd4f 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 113
diff changeset
3315 } else if (out_sig_bt[c_arg] != T_ADDRESS) {
018d5b58dd4f 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 113
diff changeset
3316 // Convert the arg to NULL
018d5b58dd4f 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 113
diff changeset
3317 __ xorq(r, r);
018d5b58dd4f 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 113
diff changeset
3318 }
018d5b58dd4f 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 113
diff changeset
3319 }
018d5b58dd4f 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 113
diff changeset
3320
018d5b58dd4f 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 113
diff changeset
3321 // dst can longer be holding an input value
018d5b58dd4f 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 113
diff changeset
3322 live[dst.first()->value()] = false;
018d5b58dd4f 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 113
diff changeset
3323 }
018d5b58dd4f 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 113
diff changeset
3324 if (in_sig_bt[j_arg] == T_OBJECT && out_sig_bt[c_arg] == T_LONG) {
018d5b58dd4f 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 113
diff changeset
3325 assert(out_sig_bt[c_arg+1] == T_VOID, "must be");
018d5b58dd4f 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 113
diff changeset
3326 ++c_arg; // skip over T_VOID to keep the loop indices in sync
018d5b58dd4f 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 113
diff changeset
3327 }
018d5b58dd4f 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 113
diff changeset
3328 }
018d5b58dd4f 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 113
diff changeset
3329
018d5b58dd4f 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 113
diff changeset
3330
018d5b58dd4f 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 113
diff changeset
3331 // Ok now we are done. Need to place the nop that dtrace wants in order to
018d5b58dd4f 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 113
diff changeset
3332 // patch in the trap
018d5b58dd4f 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 113
diff changeset
3333 int patch_offset = ((intptr_t)__ pc()) - start;
018d5b58dd4f 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 113
diff changeset
3334
018d5b58dd4f 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 113
diff changeset
3335 __ nop();
018d5b58dd4f 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 113
diff changeset
3336
018d5b58dd4f 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 113
diff changeset
3337
018d5b58dd4f 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 113
diff changeset
3338 // Return
018d5b58dd4f 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 113
diff changeset
3339
018d5b58dd4f 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 113
diff changeset
3340 __ leave();
018d5b58dd4f 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 113
diff changeset
3341 __ ret(0);
018d5b58dd4f 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 113
diff changeset
3342
018d5b58dd4f 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 113
diff changeset
3343 __ flush();
018d5b58dd4f 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 113
diff changeset
3344
018d5b58dd4f 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 113
diff changeset
3345 nmethod *nm = nmethod::new_dtrace_nmethod(
018d5b58dd4f 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 113
diff changeset
3346 method, masm->code(), vep_offset, patch_offset, frame_complete,
018d5b58dd4f 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 113
diff changeset
3347 stack_slots / VMRegImpl::slots_per_word);
018d5b58dd4f 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 113
diff changeset
3348 return nm;
018d5b58dd4f 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 113
diff changeset
3349
018d5b58dd4f 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 113
diff changeset
3350 }
018d5b58dd4f 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 113
diff changeset
3351
018d5b58dd4f 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 113
diff changeset
3352 #endif // HAVE_DTRACE_H
018d5b58dd4f 6537506: Provide a mechanism for specifying Java-level USDT-like dtrace probes
kamg
parents: 113
diff changeset
3353
0
a61af66fc99e Initial load
duke
parents:
diff changeset
3354 // this function returns the adjust size (in number of words) to a c2i adapter
a61af66fc99e Initial load
duke
parents:
diff changeset
3355 // activation for use during deoptimization
a61af66fc99e Initial load
duke
parents:
diff changeset
3356 int Deoptimization::last_frame_adjust(int callee_parameters, int callee_locals ) {
1506
2338d41fbd81 6943304: remove tagged stack interpreter
twisti
parents: 1368
diff changeset
3357 return (callee_locals - callee_parameters) * Interpreter::stackElementWords;
0
a61af66fc99e Initial load
duke
parents:
diff changeset
3358 }
a61af66fc99e Initial load
duke
parents:
diff changeset
3359
a61af66fc99e Initial load
duke
parents:
diff changeset
3360
a61af66fc99e Initial load
duke
parents:
diff changeset
3361 uint SharedRuntime::out_preserve_stack_slots() {
a61af66fc99e Initial load
duke
parents:
diff changeset
3362 return 0;
a61af66fc99e Initial load
duke
parents:
diff changeset
3363 }
a61af66fc99e Initial load
duke
parents:
diff changeset
3364
a61af66fc99e Initial load
duke
parents:
diff changeset
3365 //------------------------------generate_deopt_blob----------------------------
a61af66fc99e Initial load
duke
parents:
diff changeset
3366 void SharedRuntime::generate_deopt_blob() {
a61af66fc99e Initial load
duke
parents:
diff changeset
3367 // Allocate space for the code
a61af66fc99e Initial load
duke
parents:
diff changeset
3368 ResourceMark rm;
a61af66fc99e Initial load
duke
parents:
diff changeset
3369 // Setup code generation tools
a61af66fc99e Initial load
duke
parents:
diff changeset
3370 CodeBuffer buffer("deopt_blob", 2048, 1024);
a61af66fc99e Initial load
duke
parents:
diff changeset
3371 MacroAssembler* masm = new MacroAssembler(&buffer);
a61af66fc99e Initial load
duke
parents:
diff changeset
3372 int frame_size_in_words;
a61af66fc99e Initial load
duke
parents:
diff changeset
3373 OopMap* map = NULL;
a61af66fc99e Initial load
duke
parents:
diff changeset
3374 OopMapSet *oop_maps = new OopMapSet();
a61af66fc99e Initial load
duke
parents:
diff changeset
3375
a61af66fc99e Initial load
duke
parents:
diff changeset
3376 // -------------
a61af66fc99e Initial load
duke
parents:
diff changeset
3377 // This code enters when returning to a de-optimized nmethod. A return
a61af66fc99e Initial load
duke
parents:
diff changeset
3378 // address has been pushed on the the stack, and return values are in
a61af66fc99e Initial load
duke
parents:
diff changeset
3379 // registers.
a61af66fc99e Initial load
duke
parents:
diff changeset
3380 // If we are doing a normal deopt then we were called from the patched
a61af66fc99e Initial load
duke
parents:
diff changeset
3381 // nmethod from the point we returned to the nmethod. So the return
a61af66fc99e Initial load
duke
parents:
diff changeset
3382 // address on the stack is wrong by NativeCall::instruction_size
a61af66fc99e Initial load
duke
parents:
diff changeset
3383 // We will adjust the value so it looks like we have the original return
a61af66fc99e Initial load
duke
parents:
diff changeset
3384 // address on the stack (like when we eagerly deoptimized).
a61af66fc99e Initial load
duke
parents:
diff changeset
3385 // In the case of an exception pending when deoptimizing, we enter
a61af66fc99e Initial load
duke
parents:
diff changeset
3386 // with a return address on the stack that points after the call we patched
a61af66fc99e Initial load
duke
parents:
diff changeset
3387 // into the exception handler. We have the following register state from,
a61af66fc99e Initial load
duke
parents:
diff changeset
3388 // e.g., the forward exception stub (see stubGenerator_x86_64.cpp).
a61af66fc99e Initial load
duke
parents:
diff changeset
3389 // rax: exception oop
a61af66fc99e Initial load
duke
parents:
diff changeset
3390 // rbx: exception handler
a61af66fc99e Initial load
duke
parents:
diff changeset
3391 // rdx: throwing pc
a61af66fc99e Initial load
duke
parents:
diff changeset
3392 // So in this case we simply jam rdx into the useless return address and
a61af66fc99e Initial load
duke
parents:
diff changeset
3393 // the stack looks just like we want.
a61af66fc99e Initial load
duke
parents:
diff changeset
3394 //
a61af66fc99e Initial load
duke
parents:
diff changeset
3395 // At this point we need to de-opt. We save the argument return
a61af66fc99e Initial load
duke
parents:
diff changeset
3396 // registers. We call the first C routine, fetch_unroll_info(). This
a61af66fc99e Initial load
duke
parents:
diff changeset
3397 // routine captures the return values and returns a structure which
a61af66fc99e Initial load
duke
parents:
diff changeset
3398 // describes the current frame size and the sizes of all replacement frames.
a61af66fc99e Initial load
duke
parents:
diff changeset
3399 // The current frame is compiled code and may contain many inlined
a61af66fc99e Initial load
duke
parents:
diff changeset
3400 // functions, each with their own JVM state. We pop the current frame, then
a61af66fc99e Initial load
duke
parents:
diff changeset
3401 // push all the new frames. Then we call the C routine unpack_frames() to
a61af66fc99e Initial load
duke
parents:
diff changeset
3402 // populate these frames. Finally unpack_frames() returns us the new target
a61af66fc99e Initial load
duke
parents:
diff changeset
3403 // address. Notice that callee-save registers are BLOWN here; they have
a61af66fc99e Initial load
duke
parents:
diff changeset
3404 // already been captured in the vframeArray at the time the return PC was
a61af66fc99e Initial load
duke
parents:
diff changeset
3405 // patched.
a61af66fc99e Initial load
duke
parents:
diff changeset
3406 address start = __ pc();
a61af66fc99e Initial load
duke
parents:
diff changeset
3407 Label cont;
a61af66fc99e Initial load
duke
parents:
diff changeset
3408
a61af66fc99e Initial load
duke
parents:
diff changeset
3409 // Prolog for non exception case!
a61af66fc99e Initial load
duke
parents:
diff changeset
3410
a61af66fc99e Initial load
duke
parents:
diff changeset
3411 // Save everything in sight.
a61af66fc99e Initial load
duke
parents:
diff changeset
3412 map = RegisterSaver::save_live_registers(masm, 0, &frame_size_in_words);
a61af66fc99e Initial load
duke
parents:
diff changeset
3413
a61af66fc99e Initial load
duke
parents:
diff changeset
3414 // Normal deoptimization. Save exec mode for unpack_frames.
113
ba764ed4b6f2 6420645: Create a vm that uses compressed oops for up to 32gb heapsizes
coleenp
parents: 0
diff changeset
3415 __ movl(r14, Deoptimization::Unpack_deopt); // callee-saved
0
a61af66fc99e Initial load
duke
parents:
diff changeset
3416 __ jmp(cont);
304
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 196
diff changeset
3417
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 196
diff changeset
3418 int reexecute_offset = __ pc() - start;
21559
be896a1983c0 recast all Graal native code as JVMCI code (JBS:GRAAL-53)
Doug Simon <doug.simon@oracle.com>
parents: 21074
diff changeset
3419 #if defined(COMPILERJVMCI) && !defined(COMPILER1)
be896a1983c0 recast all Graal native code as JVMCI code (JBS:GRAAL-53)
Doug Simon <doug.simon@oracle.com>
parents: 21074
diff changeset
3420 // JVMCI does not use this kind of deoptimization
9112
6c33b2076d7c minor HotSpot deoptimization cleanups
Christian Haeubl <haeubl@ssw.jku.at>
parents: 8883
diff changeset
3421 __ should_not_reach_here();
6c33b2076d7c minor HotSpot deoptimization cleanups
Christian Haeubl <haeubl@ssw.jku.at>
parents: 8883
diff changeset
3422 #endif
304
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 196
diff changeset
3423
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 196
diff changeset
3424 // Reexecute case
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 196
diff changeset
3425 // return address is the pc describes what bci to do re-execute at
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 196
diff changeset
3426
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 196
diff changeset
3427 // No need to update map as each call to save_live_registers will produce identical oopmap
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 196
diff changeset
3428 (void) RegisterSaver::save_live_registers(masm, 0, &frame_size_in_words);
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 196
diff changeset
3429
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 196
diff changeset
3430 __ movl(r14, Deoptimization::Unpack_reexecute); // callee-saved
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 196
diff changeset
3431 __ jmp(cont);
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 196
diff changeset
3432
22298
c28cb37b2e1d Rename JVMCI to INCLUDE_JVMCI.
twisti
parents: 21884
diff changeset
3433 #if INCLUDE_JVMCI
9112
6c33b2076d7c minor HotSpot deoptimization cleanups
Christian Haeubl <haeubl@ssw.jku.at>
parents: 8883
diff changeset
3434 int implicit_exception_uncommon_trap_offset = __ pc() - start;
15104
ed29f7ff71eb add DeoptimizationStub
twisti
parents: 14957
diff changeset
3435
21559
be896a1983c0 recast all Graal native code as JVMCI code (JBS:GRAAL-53)
Doug Simon <doug.simon@oracle.com>
parents: 21074
diff changeset
3436 __ pushptr(Address(r15_thread, in_bytes(JavaThread::jvmci_implicit_exception_pc_offset())));
9112
6c33b2076d7c minor HotSpot deoptimization cleanups
Christian Haeubl <haeubl@ssw.jku.at>
parents: 8883
diff changeset
3437
19462
33a783b15758 made use of Graal stubs instead of equivalent HotSpot stubs optional and off by default
Doug Simon <doug.simon@oracle.com>
parents: 18041
diff changeset
3438 int uncommon_trap_offset = __ pc() - start;
33a783b15758 made use of Graal stubs instead of equivalent HotSpot stubs optional and off by default
Doug Simon <doug.simon@oracle.com>
parents: 18041
diff changeset
3439
9112
6c33b2076d7c minor HotSpot deoptimization cleanups
Christian Haeubl <haeubl@ssw.jku.at>
parents: 8883
diff changeset
3440 // Save everything in sight.
6c33b2076d7c minor HotSpot deoptimization cleanups
Christian Haeubl <haeubl@ssw.jku.at>
parents: 8883
diff changeset
3441 RegisterSaver::save_live_registers(masm, 0, &frame_size_in_words);
6c33b2076d7c minor HotSpot deoptimization cleanups
Christian Haeubl <haeubl@ssw.jku.at>
parents: 8883
diff changeset
3442 // fetch_unroll_info needs to call last_java_frame()
6c33b2076d7c minor HotSpot deoptimization cleanups
Christian Haeubl <haeubl@ssw.jku.at>
parents: 8883
diff changeset
3443 __ set_last_Java_frame(noreg, noreg, NULL);
6c33b2076d7c minor HotSpot deoptimization cleanups
Christian Haeubl <haeubl@ssw.jku.at>
parents: 8883
diff changeset
3444
6c33b2076d7c minor HotSpot deoptimization cleanups
Christian Haeubl <haeubl@ssw.jku.at>
parents: 8883
diff changeset
3445 __ movl(c_rarg1, Address(r15_thread, in_bytes(ThreadShadow::pending_deoptimization_offset())));
6c33b2076d7c minor HotSpot deoptimization cleanups
Christian Haeubl <haeubl@ssw.jku.at>
parents: 8883
diff changeset
3446 __ movl(Address(r15_thread, in_bytes(ThreadShadow::pending_deoptimization_offset())), -1);
6c33b2076d7c minor HotSpot deoptimization cleanups
Christian Haeubl <haeubl@ssw.jku.at>
parents: 8883
diff changeset
3447
6c33b2076d7c minor HotSpot deoptimization cleanups
Christian Haeubl <haeubl@ssw.jku.at>
parents: 8883
diff changeset
3448 __ movl(r14, (int32_t)Deoptimization::Unpack_reexecute);
6c33b2076d7c minor HotSpot deoptimization cleanups
Christian Haeubl <haeubl@ssw.jku.at>
parents: 8883
diff changeset
3449 __ mov(c_rarg0, r15_thread);
6c33b2076d7c minor HotSpot deoptimization cleanups
Christian Haeubl <haeubl@ssw.jku.at>
parents: 8883
diff changeset
3450 __ call(RuntimeAddress(CAST_FROM_FN_PTR(address, Deoptimization::uncommon_trap)));
6c33b2076d7c minor HotSpot deoptimization cleanups
Christian Haeubl <haeubl@ssw.jku.at>
parents: 8883
diff changeset
3451 oop_maps->add_gc_map( __ pc()-start, map->deep_copy());
6c33b2076d7c minor HotSpot deoptimization cleanups
Christian Haeubl <haeubl@ssw.jku.at>
parents: 8883
diff changeset
3452
6c33b2076d7c minor HotSpot deoptimization cleanups
Christian Haeubl <haeubl@ssw.jku.at>
parents: 8883
diff changeset
3453 __ reset_last_Java_frame(false, false);
6c33b2076d7c minor HotSpot deoptimization cleanups
Christian Haeubl <haeubl@ssw.jku.at>
parents: 8883
diff changeset
3454
6c33b2076d7c minor HotSpot deoptimization cleanups
Christian Haeubl <haeubl@ssw.jku.at>
parents: 8883
diff changeset
3455 Label after_fetch_unroll_info_call;
6c33b2076d7c minor HotSpot deoptimization cleanups
Christian Haeubl <haeubl@ssw.jku.at>
parents: 8883
diff changeset
3456 __ jmp(after_fetch_unroll_info_call);
22298
c28cb37b2e1d Rename JVMCI to INCLUDE_JVMCI.
twisti
parents: 21884
diff changeset
3457 #endif // INCLUDE_JVMCI
9112
6c33b2076d7c minor HotSpot deoptimization cleanups
Christian Haeubl <haeubl@ssw.jku.at>
parents: 8883
diff changeset
3458
0
a61af66fc99e Initial load
duke
parents:
diff changeset
3459 int exception_offset = __ pc() - start;
a61af66fc99e Initial load
duke
parents:
diff changeset
3460
a61af66fc99e Initial load
duke
parents:
diff changeset
3461 // Prolog for exception case
a61af66fc99e Initial load
duke
parents:
diff changeset
3462
304
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 196
diff changeset
3463 // all registers are dead at this entry point, except for rax, and
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 196
diff changeset
3464 // rdx which contain the exception oop and exception pc
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 196
diff changeset
3465 // respectively. Set them in TLS and fall thru to the
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 196
diff changeset
3466 // unpack_with_exception_in_tls entry point.
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 196
diff changeset
3467
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 196
diff changeset
3468 __ movptr(Address(r15_thread, JavaThread::exception_pc_offset()), rdx);
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 196
diff changeset
3469 __ movptr(Address(r15_thread, JavaThread::exception_oop_offset()), rax);
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 196
diff changeset
3470
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 196
diff changeset
3471 int exception_in_tls_offset = __ pc() - start;
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 196
diff changeset
3472
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 196
diff changeset
3473 // new implementation because exception oop is now passed in JavaThread
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 196
diff changeset
3474
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 196
diff changeset
3475 // Prolog for exception case
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 196
diff changeset
3476 // All registers must be preserved because they might be used by LinearScan
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 196
diff changeset
3477 // Exceptiop oop and throwing PC are passed in JavaThread
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 196
diff changeset
3478 // tos: stack at point of call to method that threw the exception (i.e. only
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 196
diff changeset
3479 // args are on the stack, no return address)
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 196
diff changeset
3480
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 196
diff changeset
3481 // make room on stack for the return address
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 196
diff changeset
3482 // It will be patched later with the throwing pc. The correct value is not
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 196
diff changeset
3483 // available now because loading it from memory would destroy registers.
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 196
diff changeset
3484 __ push(0);
0
a61af66fc99e Initial load
duke
parents:
diff changeset
3485
a61af66fc99e Initial load
duke
parents:
diff changeset
3486 // Save everything in sight.
a61af66fc99e Initial load
duke
parents:
diff changeset
3487 map = RegisterSaver::save_live_registers(masm, 0, &frame_size_in_words);
a61af66fc99e Initial load
duke
parents:
diff changeset
3488
304
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 196
diff changeset
3489 // Now it is safe to overwrite any register
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 196
diff changeset
3490
0
a61af66fc99e Initial load
duke
parents:
diff changeset
3491 // Deopt during an exception. Save exec mode for unpack_frames.
113
ba764ed4b6f2 6420645: Create a vm that uses compressed oops for up to 32gb heapsizes
coleenp
parents: 0
diff changeset
3492 __ movl(r14, Deoptimization::Unpack_exception); // callee-saved
0
a61af66fc99e Initial load
duke
parents:
diff changeset
3493
304
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 196
diff changeset
3494 // load throwing pc from JavaThread and patch it as the return address
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 196
diff changeset
3495 // of the current frame. Then clear the field in JavaThread
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 196
diff changeset
3496
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 196
diff changeset
3497 __ movptr(rdx, Address(r15_thread, JavaThread::exception_pc_offset()));
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 196
diff changeset
3498 __ movptr(Address(rbp, wordSize), rdx);
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 196
diff changeset
3499 __ movptr(Address(r15_thread, JavaThread::exception_pc_offset()), (int32_t)NULL_WORD);
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 196
diff changeset
3500
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 196
diff changeset
3501 #ifdef ASSERT
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 196
diff changeset
3502 // verify that there is really an exception oop in JavaThread
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 196
diff changeset
3503 __ movptr(rax, Address(r15_thread, JavaThread::exception_oop_offset()));
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 196
diff changeset
3504 __ verify_oop(rax);
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 196
diff changeset
3505
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 196
diff changeset
3506 // verify that there is no pending exception
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 196
diff changeset
3507 Label no_pending_exception;
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 196
diff changeset
3508 __ movptr(rax, Address(r15_thread, Thread::pending_exception_offset()));
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 196
diff changeset
3509 __ testptr(rax, rax);
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 196
diff changeset
3510 __ jcc(Assembler::zero, no_pending_exception);
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 196
diff changeset
3511 __ stop("must not have pending exception here");
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 196
diff changeset
3512 __ bind(no_pending_exception);
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 196
diff changeset
3513 #endif
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 196
diff changeset
3514
0
a61af66fc99e Initial load
duke
parents:
diff changeset
3515 __ bind(cont);
a61af66fc99e Initial load
duke
parents:
diff changeset
3516
a61af66fc99e Initial load
duke
parents:
diff changeset
3517 // Call C code. Need thread and this frame, but NOT official VM entry
a61af66fc99e Initial load
duke
parents:
diff changeset
3518 // crud. We cannot block on this call, no GC can happen.
a61af66fc99e Initial load
duke
parents:
diff changeset
3519 //
a61af66fc99e Initial load
duke
parents:
diff changeset
3520 // UnrollBlock* fetch_unroll_info(JavaThread* thread)
a61af66fc99e Initial load
duke
parents:
diff changeset
3521
a61af66fc99e Initial load
duke
parents:
diff changeset
3522 // fetch_unroll_info needs to call last_java_frame().
a61af66fc99e Initial load
duke
parents:
diff changeset
3523
a61af66fc99e Initial load
duke
parents:
diff changeset
3524 __ set_last_Java_frame(noreg, noreg, NULL);
a61af66fc99e Initial load
duke
parents:
diff changeset
3525 #ifdef ASSERT
a61af66fc99e Initial load
duke
parents:
diff changeset
3526 { Label L;
304
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 196
diff changeset
3527 __ cmpptr(Address(r15_thread,
0
a61af66fc99e Initial load
duke
parents:
diff changeset
3528 JavaThread::last_Java_fp_offset()),
304
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 196
diff changeset
3529 (int32_t)0);
0
a61af66fc99e Initial load
duke
parents:
diff changeset
3530 __ jcc(Assembler::equal, L);
a61af66fc99e Initial load
duke
parents:
diff changeset
3531 __ stop("SharedRuntime::generate_deopt_blob: last_Java_fp not cleared");
a61af66fc99e Initial load
duke
parents:
diff changeset
3532 __ bind(L);
a61af66fc99e Initial load
duke
parents:
diff changeset
3533 }
a61af66fc99e Initial load
duke
parents:
diff changeset
3534 #endif // ASSERT
304
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 196
diff changeset
3535 __ mov(c_rarg0, r15_thread);
0
a61af66fc99e Initial load
duke
parents:
diff changeset
3536 __ call(RuntimeAddress(CAST_FROM_FN_PTR(address, Deoptimization::fetch_unroll_info)));
a61af66fc99e Initial load
duke
parents:
diff changeset
3537
a61af66fc99e Initial load
duke
parents:
diff changeset
3538 // Need to have an oopmap that tells fetch_unroll_info where to
a61af66fc99e Initial load
duke
parents:
diff changeset
3539 // find any register it might need.
a61af66fc99e Initial load
duke
parents:
diff changeset
3540 oop_maps->add_gc_map(__ pc() - start, map);
a61af66fc99e Initial load
duke
parents:
diff changeset
3541
a61af66fc99e Initial load
duke
parents:
diff changeset
3542 __ reset_last_Java_frame(false, false);
a61af66fc99e Initial load
duke
parents:
diff changeset
3543
22298
c28cb37b2e1d Rename JVMCI to INCLUDE_JVMCI.
twisti
parents: 21884
diff changeset
3544 #if INCLUDE_JVMCI
2059
9508a52cbd32 Add deoptimization blob support.
Thomas Wuerthinger <wuerthinger@ssw.jku.at>
parents: 1972
diff changeset
3545 __ bind(after_fetch_unroll_info_call);
4985
0d2a2797a61f 2 more #ifdef GRAAL
Thomas Wuerthinger <thomas.wuerthinger@oracle.com>
parents: 4984
diff changeset
3546 #endif
2059
9508a52cbd32 Add deoptimization blob support.
Thomas Wuerthinger <wuerthinger@ssw.jku.at>
parents: 1972
diff changeset
3547
0
a61af66fc99e Initial load
duke
parents:
diff changeset
3548 // Load UnrollBlock* into rdi
304
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 196
diff changeset
3549 __ mov(rdi, rax);
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 196
diff changeset
3550
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 196
diff changeset
3551 Label noException;
682
69aefafe69c1 6824463: deopt blob is testing wrong register on 64-bit x86
never
parents: 628
diff changeset
3552 __ cmpl(r14, Deoptimization::Unpack_exception); // Was exception pending?
304
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 196
diff changeset
3553 __ jcc(Assembler::notEqual, noException);
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 196
diff changeset
3554 __ movptr(rax, Address(r15_thread, JavaThread::exception_oop_offset()));
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 196
diff changeset
3555 // QQQ this is useless it was NULL above
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 196
diff changeset
3556 __ movptr(rdx, Address(r15_thread, JavaThread::exception_pc_offset()));
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 196
diff changeset
3557 __ movptr(Address(r15_thread, JavaThread::exception_oop_offset()), (int32_t)NULL_WORD);
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 196
diff changeset
3558 __ movptr(Address(r15_thread, JavaThread::exception_pc_offset()), (int32_t)NULL_WORD);
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 196
diff changeset
3559
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 196
diff changeset
3560 __ verify_oop(rax);
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 196
diff changeset
3561
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 196
diff changeset
3562 // Overwrite the result registers with the exception results.
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 196
diff changeset
3563 __ movptr(Address(rsp, RegisterSaver::rax_offset_in_bytes()), rax);
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 196
diff changeset
3564 // I think this is useless
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 196
diff changeset
3565 __ movptr(Address(rsp, RegisterSaver::rdx_offset_in_bytes()), rdx);
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 196
diff changeset
3566
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 196
diff changeset
3567 __ bind(noException);
0
a61af66fc99e Initial load
duke
parents:
diff changeset
3568
a61af66fc99e Initial load
duke
parents:
diff changeset
3569 // Only register save data is on the stack.
a61af66fc99e Initial load
duke
parents:
diff changeset
3570 // Now restore the result registers. Everything else is either dead
a61af66fc99e Initial load
duke
parents:
diff changeset
3571 // or captured in the vframeArray.
a61af66fc99e Initial load
duke
parents:
diff changeset
3572 RegisterSaver::restore_result_registers(masm);
a61af66fc99e Initial load
duke
parents:
diff changeset
3573
a61af66fc99e Initial load
duke
parents:
diff changeset
3574 // All of the register save area has been popped of the stack. Only the
a61af66fc99e Initial load
duke
parents:
diff changeset
3575 // return address remains.
a61af66fc99e Initial load
duke
parents:
diff changeset
3576
a61af66fc99e Initial load
duke
parents:
diff changeset
3577 // Pop all the frames we must move/replace.
a61af66fc99e Initial load
duke
parents:
diff changeset
3578 //
a61af66fc99e Initial load
duke
parents:
diff changeset
3579 // Frame picture (youngest to oldest)
a61af66fc99e Initial load
duke
parents:
diff changeset
3580 // 1: self-frame (no frame link)
a61af66fc99e Initial load
duke
parents:
diff changeset
3581 // 2: deopting frame (no frame link)
a61af66fc99e Initial load
duke
parents:
diff changeset
3582 // 3: caller of deopting frame (could be compiled/interpreted).
a61af66fc99e Initial load
duke
parents:
diff changeset
3583 //
a61af66fc99e Initial load
duke
parents:
diff changeset
3584 // Note: by leaving the return address of self-frame on the stack
a61af66fc99e Initial load
duke
parents:
diff changeset
3585 // and using the size of frame 2 to adjust the stack
a61af66fc99e Initial load
duke
parents:
diff changeset
3586 // when we are done the return to frame 3 will still be on the stack.
a61af66fc99e Initial load
duke
parents:
diff changeset
3587
a61af66fc99e Initial load
duke
parents:
diff changeset
3588 // Pop deoptimized frame
a61af66fc99e Initial load
duke
parents:
diff changeset
3589 __ movl(rcx, Address(rdi, Deoptimization::UnrollBlock::size_of_deoptimized_frame_offset_in_bytes()));
304
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 196
diff changeset
3590 __ addptr(rsp, rcx);
0
a61af66fc99e Initial load
duke
parents:
diff changeset
3591
a61af66fc99e Initial load
duke
parents:
diff changeset
3592 // rsp should be pointing at the return address to the caller (3)
a61af66fc99e Initial load
duke
parents:
diff changeset
3593
13384
fca8f4799229 8028308: nsk regression, assert(obj->is_oop()) failed: not an oop
roland
parents: 10998
diff changeset
3594 // Pick up the initial fp we should save
fca8f4799229 8028308: nsk regression, assert(obj->is_oop()) failed: not an oop
roland
parents: 10998
diff changeset
3595 // restore rbp before stack bang because if stack overflow is thrown it needs to be pushed (and preserved)
fca8f4799229 8028308: nsk regression, assert(obj->is_oop()) failed: not an oop
roland
parents: 10998
diff changeset
3596 __ movptr(rbp, Address(rdi, Deoptimization::UnrollBlock::initial_info_offset_in_bytes()));
fca8f4799229 8028308: nsk regression, assert(obj->is_oop()) failed: not an oop
roland
parents: 10998
diff changeset
3597
17980
0bf37f737702 8032410: compiler/uncommontrap/TestStackBangRbp.java times out on Solaris-Sparc V9
roland
parents: 17850
diff changeset
3598 #ifdef ASSERT
0bf37f737702 8032410: compiler/uncommontrap/TestStackBangRbp.java times out on Solaris-Sparc V9
roland
parents: 17850
diff changeset
3599 // Compilers generate code that bang the stack by as much as the
0bf37f737702 8032410: compiler/uncommontrap/TestStackBangRbp.java times out on Solaris-Sparc V9
roland
parents: 17850
diff changeset
3600 // interpreter would need. So this stack banging should never
0bf37f737702 8032410: compiler/uncommontrap/TestStackBangRbp.java times out on Solaris-Sparc V9
roland
parents: 17850
diff changeset
3601 // trigger a fault. Verify that it does not on non product builds.
0
a61af66fc99e Initial load
duke
parents:
diff changeset
3602 if (UseStackBanging) {
a61af66fc99e Initial load
duke
parents:
diff changeset
3603 __ movl(rbx, Address(rdi, Deoptimization::UnrollBlock::total_frame_sizes_offset_in_bytes()));
a61af66fc99e Initial load
duke
parents:
diff changeset
3604 __ bang_stack_size(rbx, rcx);
a61af66fc99e Initial load
duke
parents:
diff changeset
3605 }
17980
0bf37f737702 8032410: compiler/uncommontrap/TestStackBangRbp.java times out on Solaris-Sparc V9
roland
parents: 17850
diff changeset
3606 #endif
0
a61af66fc99e Initial load
duke
parents:
diff changeset
3607
a61af66fc99e Initial load
duke
parents:
diff changeset
3608 // Load address of array of frame pcs into rcx
304
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 196
diff changeset
3609 __ movptr(rcx, Address(rdi, Deoptimization::UnrollBlock::frame_pcs_offset_in_bytes()));
0
a61af66fc99e Initial load
duke
parents:
diff changeset
3610
a61af66fc99e Initial load
duke
parents:
diff changeset
3611 // Trash the old pc
304
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 196
diff changeset
3612 __ addptr(rsp, wordSize);
0
a61af66fc99e Initial load
duke
parents:
diff changeset
3613
a61af66fc99e Initial load
duke
parents:
diff changeset
3614 // Load address of array of frame sizes into rsi
304
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 196
diff changeset
3615 __ movptr(rsi, Address(rdi, Deoptimization::UnrollBlock::frame_sizes_offset_in_bytes()));
0
a61af66fc99e Initial load
duke
parents:
diff changeset
3616
a61af66fc99e Initial load
duke
parents:
diff changeset
3617 // Load counter into rdx
a61af66fc99e Initial load
duke
parents:
diff changeset
3618 __ movl(rdx, Address(rdi, Deoptimization::UnrollBlock::number_of_frames_offset_in_bytes()));
a61af66fc99e Initial load
duke
parents:
diff changeset
3619
a61af66fc99e Initial load
duke
parents:
diff changeset
3620 // Now adjust the caller's stack to make up for the extra locals
a61af66fc99e Initial load
duke
parents:
diff changeset
3621 // but record the original sp so that we can save it in the skeletal interpreter
a61af66fc99e Initial load
duke
parents:
diff changeset
3622 // frame and the stack walking of interpreter_sender will get the unextended sp
a61af66fc99e Initial load
duke
parents:
diff changeset
3623 // value and not the "real" sp value.
a61af66fc99e Initial load
duke
parents:
diff changeset
3624
a61af66fc99e Initial load
duke
parents:
diff changeset
3625 const Register sender_sp = r8;
a61af66fc99e Initial load
duke
parents:
diff changeset
3626
304
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 196
diff changeset
3627 __ mov(sender_sp, rsp);
0
a61af66fc99e Initial load
duke
parents:
diff changeset
3628 __ movl(rbx, Address(rdi,
a61af66fc99e Initial load
duke
parents:
diff changeset
3629 Deoptimization::UnrollBlock::
a61af66fc99e Initial load
duke
parents:
diff changeset
3630 caller_adjustment_offset_in_bytes()));
304
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 196
diff changeset
3631 __ subptr(rsp, rbx);
0
a61af66fc99e Initial load
duke
parents:
diff changeset
3632
a61af66fc99e Initial load
duke
parents:
diff changeset
3633 // Push interpreter frames in a loop
a61af66fc99e Initial load
duke
parents:
diff changeset
3634 Label loop;
a61af66fc99e Initial load
duke
parents:
diff changeset
3635 __ bind(loop);
304
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 196
diff changeset
3636 __ movptr(rbx, Address(rsi, 0)); // Load frame size
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 196
diff changeset
3637 #ifdef CC_INTERP
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 196
diff changeset
3638 __ subptr(rbx, 4*wordSize); // we'll push pc and ebp by hand and
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 196
diff changeset
3639 #ifdef ASSERT
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 196
diff changeset
3640 __ push(0xDEADDEAD); // Make a recognizable pattern
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 196
diff changeset
3641 __ push(0xDEADDEAD);
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 196
diff changeset
3642 #else /* ASSERT */
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 196
diff changeset
3643 __ subptr(rsp, 2*wordSize); // skip the "static long no_param"
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 196
diff changeset
3644 #endif /* ASSERT */
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 196
diff changeset
3645 #else
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 196
diff changeset
3646 __ subptr(rbx, 2*wordSize); // We'll push pc and ebp by hand
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 196
diff changeset
3647 #endif // CC_INTERP
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 196
diff changeset
3648 __ pushptr(Address(rcx, 0)); // Save return address
0
a61af66fc99e Initial load
duke
parents:
diff changeset
3649 __ enter(); // Save old & set new ebp
304
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 196
diff changeset
3650 __ subptr(rsp, rbx); // Prolog
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 196
diff changeset
3651 #ifdef CC_INTERP
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 196
diff changeset
3652 __ movptr(Address(rbp,
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 196
diff changeset
3653 -(sizeof(BytecodeInterpreter)) + in_bytes(byte_offset_of(BytecodeInterpreter, _sender_sp))),
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 196
diff changeset
3654 sender_sp); // Make it walkable
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 196
diff changeset
3655 #else /* CC_INTERP */
0
a61af66fc99e Initial load
duke
parents:
diff changeset
3656 // This value is corrected by layout_activation_impl
304
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 196
diff changeset
3657 __ movptr(Address(rbp, frame::interpreter_frame_last_sp_offset * wordSize), (int32_t)NULL_WORD );
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 196
diff changeset
3658 __ movptr(Address(rbp, frame::interpreter_frame_sender_sp_offset * wordSize), sender_sp); // Make it walkable
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 196
diff changeset
3659 #endif /* CC_INTERP */
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 196
diff changeset
3660 __ mov(sender_sp, rsp); // Pass sender_sp to next frame
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 196
diff changeset
3661 __ addptr(rsi, wordSize); // Bump array pointer (sizes)
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 196
diff changeset
3662 __ addptr(rcx, wordSize); // Bump array pointer (pcs)
0
a61af66fc99e Initial load
duke
parents:
diff changeset
3663 __ decrementl(rdx); // Decrement counter
a61af66fc99e Initial load
duke
parents:
diff changeset
3664 __ jcc(Assembler::notZero, loop);
304
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 196
diff changeset
3665 __ pushptr(Address(rcx, 0)); // Save final return address
0
a61af66fc99e Initial load
duke
parents:
diff changeset
3666
a61af66fc99e Initial load
duke
parents:
diff changeset
3667 // Re-push self-frame
a61af66fc99e Initial load
duke
parents:
diff changeset
3668 __ enter(); // Save old & set new ebp
a61af66fc99e Initial load
duke
parents:
diff changeset
3669
a61af66fc99e Initial load
duke
parents:
diff changeset
3670 // Allocate a full sized register save area.
a61af66fc99e Initial load
duke
parents:
diff changeset
3671 // Return address and rbp are in place, so we allocate two less words.
304
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 196
diff changeset
3672 __ subptr(rsp, (frame_size_in_words - 2) * wordSize);
0
a61af66fc99e Initial load
duke
parents:
diff changeset
3673
a61af66fc99e Initial load
duke
parents:
diff changeset
3674 // Restore frame locals after moving the frame
a61af66fc99e Initial load
duke
parents:
diff changeset
3675 __ movdbl(Address(rsp, RegisterSaver::xmm0_offset_in_bytes()), xmm0);
304
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 196
diff changeset
3676 __ movptr(Address(rsp, RegisterSaver::rax_offset_in_bytes()), rax);
0
a61af66fc99e Initial load
duke
parents:
diff changeset
3677
a61af66fc99e Initial load
duke
parents:
diff changeset
3678 // Call C code. Need thread but NOT official VM entry
a61af66fc99e Initial load
duke
parents:
diff changeset
3679 // crud. We cannot block on this call, no GC can happen. Call should
a61af66fc99e Initial load
duke
parents:
diff changeset
3680 // restore return values to their stack-slots with the new SP.
a61af66fc99e Initial load
duke
parents:
diff changeset
3681 //
a61af66fc99e Initial load
duke
parents:
diff changeset
3682 // void Deoptimization::unpack_frames(JavaThread* thread, int exec_mode)
a61af66fc99e Initial load
duke
parents:
diff changeset
3683
a61af66fc99e Initial load
duke
parents:
diff changeset
3684 // Use rbp because the frames look interpreted now
4057
1feb272af3a7 6636110: unaligned stackpointer leads to crash during deoptimization
never
parents: 3931
diff changeset
3685 // Save "the_pc" since it cannot easily be retrieved using the last_java_SP after we aligned SP.
1feb272af3a7 6636110: unaligned stackpointer leads to crash during deoptimization
never
parents: 3931
diff changeset
3686 // Don't need the precise return PC here, just precise enough to point into this code blob.
1feb272af3a7 6636110: unaligned stackpointer leads to crash during deoptimization
never
parents: 3931
diff changeset
3687 address the_pc = __ pc();
1feb272af3a7 6636110: unaligned stackpointer leads to crash during deoptimization
never
parents: 3931
diff changeset
3688 __ set_last_Java_frame(noreg, rbp, the_pc);
1feb272af3a7 6636110: unaligned stackpointer leads to crash during deoptimization
never
parents: 3931
diff changeset
3689
1feb272af3a7 6636110: unaligned stackpointer leads to crash during deoptimization
never
parents: 3931
diff changeset
3690 __ andptr(rsp, -(StackAlignmentInBytes)); // Fix stack alignment as required by ABI
304
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 196
diff changeset
3691 __ mov(c_rarg0, r15_thread);
113
ba764ed4b6f2 6420645: Create a vm that uses compressed oops for up to 32gb heapsizes
coleenp
parents: 0
diff changeset
3692 __ movl(c_rarg1, r14); // second arg: exec_mode
0
a61af66fc99e Initial load
duke
parents:
diff changeset
3693 __ call(RuntimeAddress(CAST_FROM_FN_PTR(address, Deoptimization::unpack_frames)));
4057
1feb272af3a7 6636110: unaligned stackpointer leads to crash during deoptimization
never
parents: 3931
diff changeset
3694 // Revert SP alignment after call since we're going to do some SP relative addressing below
1feb272af3a7 6636110: unaligned stackpointer leads to crash during deoptimization
never
parents: 3931
diff changeset
3695 __ movptr(rsp, Address(r15_thread, JavaThread::last_Java_sp_offset()));
0
a61af66fc99e Initial load
duke
parents:
diff changeset
3696
a61af66fc99e Initial load
duke
parents:
diff changeset
3697 // Set an oopmap for the call site
4057
1feb272af3a7 6636110: unaligned stackpointer leads to crash during deoptimization
never
parents: 3931
diff changeset
3698 // Use the same PC we used for the last java frame
1feb272af3a7 6636110: unaligned stackpointer leads to crash during deoptimization
never
parents: 3931
diff changeset
3699 oop_maps->add_gc_map(the_pc - start,
0
a61af66fc99e Initial load
duke
parents:
diff changeset
3700 new OopMap( frame_size_in_words, 0 ));
a61af66fc99e Initial load
duke
parents:
diff changeset
3701
4057
1feb272af3a7 6636110: unaligned stackpointer leads to crash during deoptimization
never
parents: 3931
diff changeset
3702 // Clear fp AND pc
1feb272af3a7 6636110: unaligned stackpointer leads to crash during deoptimization
never
parents: 3931
diff changeset
3703 __ reset_last_Java_frame(true, true);
0
a61af66fc99e Initial load
duke
parents:
diff changeset
3704
a61af66fc99e Initial load
duke
parents:
diff changeset
3705 // Collect return values
a61af66fc99e Initial load
duke
parents:
diff changeset
3706 __ movdbl(xmm0, Address(rsp, RegisterSaver::xmm0_offset_in_bytes()));
304
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 196
diff changeset
3707 __ movptr(rax, Address(rsp, RegisterSaver::rax_offset_in_bytes()));
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 196
diff changeset
3708 // I think this is useless (throwing pc?)
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 196
diff changeset
3709 __ movptr(rdx, Address(rsp, RegisterSaver::rdx_offset_in_bytes()));
0
a61af66fc99e Initial load
duke
parents:
diff changeset
3710
a61af66fc99e Initial load
duke
parents:
diff changeset
3711 // Pop self-frame.
a61af66fc99e Initial load
duke
parents:
diff changeset
3712 __ leave(); // Epilog
a61af66fc99e Initial load
duke
parents:
diff changeset
3713
a61af66fc99e Initial load
duke
parents:
diff changeset
3714 // Jump to interpreter
a61af66fc99e Initial load
duke
parents:
diff changeset
3715 __ ret(0);
a61af66fc99e Initial load
duke
parents:
diff changeset
3716
a61af66fc99e Initial load
duke
parents:
diff changeset
3717 // Make sure all code is generated
a61af66fc99e Initial load
duke
parents:
diff changeset
3718 masm->flush();
a61af66fc99e Initial load
duke
parents:
diff changeset
3719
304
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 196
diff changeset
3720 _deopt_blob = DeoptimizationBlob::create(&buffer, oop_maps, 0, exception_offset, reexecute_offset, frame_size_in_words);
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 196
diff changeset
3721 _deopt_blob->set_unpack_with_exception_in_tls_offset(exception_in_tls_offset);
22298
c28cb37b2e1d Rename JVMCI to INCLUDE_JVMCI.
twisti
parents: 21884
diff changeset
3722 #if INCLUDE_JVMCI
19462
33a783b15758 made use of Graal stubs instead of equivalent HotSpot stubs optional and off by default
Doug Simon <doug.simon@oracle.com>
parents: 18041
diff changeset
3723 _deopt_blob->set_uncommon_trap_offset(uncommon_trap_offset);
5111
422c979ff392 fixed two cases where DeoptAction was invalid
Christian Haeubl <christian.haeubl@oracle.com>
parents: 5109
diff changeset
3724 _deopt_blob->set_implicit_exception_uncommon_trap_offset(implicit_exception_uncommon_trap_offset);
4985
0d2a2797a61f 2 more #ifdef GRAAL
Thomas Wuerthinger <thomas.wuerthinger@oracle.com>
parents: 4984
diff changeset
3725 #endif
0
a61af66fc99e Initial load
duke
parents:
diff changeset
3726 }
a61af66fc99e Initial load
duke
parents:
diff changeset
3727
a61af66fc99e Initial load
duke
parents:
diff changeset
3728 #ifdef COMPILER2
a61af66fc99e Initial load
duke
parents:
diff changeset
3729 //------------------------------generate_uncommon_trap_blob--------------------
a61af66fc99e Initial load
duke
parents:
diff changeset
3730 void SharedRuntime::generate_uncommon_trap_blob() {
a61af66fc99e Initial load
duke
parents:
diff changeset
3731 // Allocate space for the code
a61af66fc99e Initial load
duke
parents:
diff changeset
3732 ResourceMark rm;
a61af66fc99e Initial load
duke
parents:
diff changeset
3733 // Setup code generation tools
a61af66fc99e Initial load
duke
parents:
diff changeset
3734 CodeBuffer buffer("uncommon_trap_blob", 2048, 1024);
a61af66fc99e Initial load
duke
parents:
diff changeset
3735 MacroAssembler* masm = new MacroAssembler(&buffer);
a61af66fc99e Initial load
duke
parents:
diff changeset
3736
a61af66fc99e Initial load
duke
parents:
diff changeset
3737 assert(SimpleRuntimeFrame::framesize % 4 == 0, "sp not 16-byte aligned");
a61af66fc99e Initial load
duke
parents:
diff changeset
3738
a61af66fc99e Initial load
duke
parents:
diff changeset
3739 address start = __ pc();
a61af66fc99e Initial load
duke
parents:
diff changeset
3740
17780
606acabe7b5c 8031320: Use Intel RTM instructions for locks
kvn
parents: 14223
diff changeset
3741 if (UseRTMLocking) {
606acabe7b5c 8031320: Use Intel RTM instructions for locks
kvn
parents: 14223
diff changeset
3742 // Abort RTM transaction before possible nmethod deoptimization.
606acabe7b5c 8031320: Use Intel RTM instructions for locks
kvn
parents: 14223
diff changeset
3743 __ xabort(0);
606acabe7b5c 8031320: Use Intel RTM instructions for locks
kvn
parents: 14223
diff changeset
3744 }
606acabe7b5c 8031320: Use Intel RTM instructions for locks
kvn
parents: 14223
diff changeset
3745
0
a61af66fc99e Initial load
duke
parents:
diff changeset
3746 // Push self-frame. We get here with a return address on the
a61af66fc99e Initial load
duke
parents:
diff changeset
3747 // stack, so rsp is 8-byte aligned until we allocate our frame.
304
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 196
diff changeset
3748 __ subptr(rsp, SimpleRuntimeFrame::return_off << LogBytesPerInt); // Epilog!
0
a61af66fc99e Initial load
duke
parents:
diff changeset
3749
a61af66fc99e Initial load
duke
parents:
diff changeset
3750 // No callee saved registers. rbp is assumed implicitly saved
304
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 196
diff changeset
3751 __ movptr(Address(rsp, SimpleRuntimeFrame::rbp_off << LogBytesPerInt), rbp);
0
a61af66fc99e Initial load
duke
parents:
diff changeset
3752
a61af66fc99e Initial load
duke
parents:
diff changeset
3753 // compiler left unloaded_class_index in j_rarg0 move to where the
a61af66fc99e Initial load
duke
parents:
diff changeset
3754 // runtime expects it.
a61af66fc99e Initial load
duke
parents:
diff changeset
3755 __ movl(c_rarg1, j_rarg0);
a61af66fc99e Initial load
duke
parents:
diff changeset
3756
a61af66fc99e Initial load
duke
parents:
diff changeset
3757 __ set_last_Java_frame(noreg, noreg, NULL);
a61af66fc99e Initial load
duke
parents:
diff changeset
3758
a61af66fc99e Initial load
duke
parents:
diff changeset
3759 // Call C code. Need thread but NOT official VM entry
a61af66fc99e Initial load
duke
parents:
diff changeset
3760 // crud. We cannot block on this call, no GC can happen. Call should
a61af66fc99e Initial load
duke
parents:
diff changeset
3761 // capture callee-saved registers as well as return values.
a61af66fc99e Initial load
duke
parents:
diff changeset
3762 // Thread is in rdi already.
a61af66fc99e Initial load
duke
parents:
diff changeset
3763 //
a61af66fc99e Initial load
duke
parents:
diff changeset
3764 // UnrollBlock* uncommon_trap(JavaThread* thread, jint unloaded_class_index);
a61af66fc99e Initial load
duke
parents:
diff changeset
3765
304
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 196
diff changeset
3766 __ mov(c_rarg0, r15_thread);
0
a61af66fc99e Initial load
duke
parents:
diff changeset
3767 __ call(RuntimeAddress(CAST_FROM_FN_PTR(address, Deoptimization::uncommon_trap)));
a61af66fc99e Initial load
duke
parents:
diff changeset
3768
a61af66fc99e Initial load
duke
parents:
diff changeset
3769 // Set an oopmap for the call site
a61af66fc99e Initial load
duke
parents:
diff changeset
3770 OopMapSet* oop_maps = new OopMapSet();
a61af66fc99e Initial load
duke
parents:
diff changeset
3771 OopMap* map = new OopMap(SimpleRuntimeFrame::framesize, 0);
a61af66fc99e Initial load
duke
parents:
diff changeset
3772
a61af66fc99e Initial load
duke
parents:
diff changeset
3773 // location of rbp is known implicitly by the frame sender code
a61af66fc99e Initial load
duke
parents:
diff changeset
3774
a61af66fc99e Initial load
duke
parents:
diff changeset
3775 oop_maps->add_gc_map(__ pc() - start, map);
a61af66fc99e Initial load
duke
parents:
diff changeset
3776
a61af66fc99e Initial load
duke
parents:
diff changeset
3777 __ reset_last_Java_frame(false, false);
a61af66fc99e Initial load
duke
parents:
diff changeset
3778
a61af66fc99e Initial load
duke
parents:
diff changeset
3779 // Load UnrollBlock* into rdi
304
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 196
diff changeset
3780 __ mov(rdi, rax);
0
a61af66fc99e Initial load
duke
parents:
diff changeset
3781
a61af66fc99e Initial load
duke
parents:
diff changeset
3782 // Pop all the frames we must move/replace.
a61af66fc99e Initial load
duke
parents:
diff changeset
3783 //
a61af66fc99e Initial load
duke
parents:
diff changeset
3784 // Frame picture (youngest to oldest)
a61af66fc99e Initial load
duke
parents:
diff changeset
3785 // 1: self-frame (no frame link)
a61af66fc99e Initial load
duke
parents:
diff changeset
3786 // 2: deopting frame (no frame link)
a61af66fc99e Initial load
duke
parents:
diff changeset
3787 // 3: caller of deopting frame (could be compiled/interpreted).
a61af66fc99e Initial load
duke
parents:
diff changeset
3788
a61af66fc99e Initial load
duke
parents:
diff changeset
3789 // Pop self-frame. We have no frame, and must rely only on rax and rsp.
304
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 196
diff changeset
3790 __ addptr(rsp, (SimpleRuntimeFrame::framesize - 2) << LogBytesPerInt); // Epilog!
0
a61af66fc99e Initial load
duke
parents:
diff changeset
3791
a61af66fc99e Initial load
duke
parents:
diff changeset
3792 // Pop deoptimized frame (int)
a61af66fc99e Initial load
duke
parents:
diff changeset
3793 __ movl(rcx, Address(rdi,
a61af66fc99e Initial load
duke
parents:
diff changeset
3794 Deoptimization::UnrollBlock::
a61af66fc99e Initial load
duke
parents:
diff changeset
3795 size_of_deoptimized_frame_offset_in_bytes()));
304
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 196
diff changeset
3796 __ addptr(rsp, rcx);
0
a61af66fc99e Initial load
duke
parents:
diff changeset
3797
a61af66fc99e Initial load
duke
parents:
diff changeset
3798 // rsp should be pointing at the return address to the caller (3)
a61af66fc99e Initial load
duke
parents:
diff changeset
3799
13384
fca8f4799229 8028308: nsk regression, assert(obj->is_oop()) failed: not an oop
roland
parents: 10998
diff changeset
3800 // Pick up the initial fp we should save
fca8f4799229 8028308: nsk regression, assert(obj->is_oop()) failed: not an oop
roland
parents: 10998
diff changeset
3801 // restore rbp before stack bang because if stack overflow is thrown it needs to be pushed (and preserved)
fca8f4799229 8028308: nsk regression, assert(obj->is_oop()) failed: not an oop
roland
parents: 10998
diff changeset
3802 __ movptr(rbp, Address(rdi, Deoptimization::UnrollBlock::initial_info_offset_in_bytes()));
fca8f4799229 8028308: nsk regression, assert(obj->is_oop()) failed: not an oop
roland
parents: 10998
diff changeset
3803
17980
0bf37f737702 8032410: compiler/uncommontrap/TestStackBangRbp.java times out on Solaris-Sparc V9
roland
parents: 17850
diff changeset
3804 #ifdef ASSERT
0bf37f737702 8032410: compiler/uncommontrap/TestStackBangRbp.java times out on Solaris-Sparc V9
roland
parents: 17850
diff changeset
3805 // Compilers generate code that bang the stack by as much as the
0bf37f737702 8032410: compiler/uncommontrap/TestStackBangRbp.java times out on Solaris-Sparc V9
roland
parents: 17850
diff changeset
3806 // interpreter would need. So this stack banging should never
0bf37f737702 8032410: compiler/uncommontrap/TestStackBangRbp.java times out on Solaris-Sparc V9
roland
parents: 17850
diff changeset
3807 // trigger a fault. Verify that it does not on non product builds.
0
a61af66fc99e Initial load
duke
parents:
diff changeset
3808 if (UseStackBanging) {
a61af66fc99e Initial load
duke
parents:
diff changeset
3809 __ movl(rbx, Address(rdi ,Deoptimization::UnrollBlock::total_frame_sizes_offset_in_bytes()));
a61af66fc99e Initial load
duke
parents:
diff changeset
3810 __ bang_stack_size(rbx, rcx);
a61af66fc99e Initial load
duke
parents:
diff changeset
3811 }
17980
0bf37f737702 8032410: compiler/uncommontrap/TestStackBangRbp.java times out on Solaris-Sparc V9
roland
parents: 17850
diff changeset
3812 #endif
0
a61af66fc99e Initial load
duke
parents:
diff changeset
3813
a61af66fc99e Initial load
duke
parents:
diff changeset
3814 // Load address of array of frame pcs into rcx (address*)
13384
fca8f4799229 8028308: nsk regression, assert(obj->is_oop()) failed: not an oop
roland
parents: 10998
diff changeset
3815 __ movptr(rcx, Address(rdi, Deoptimization::UnrollBlock::frame_pcs_offset_in_bytes()));
0
a61af66fc99e Initial load
duke
parents:
diff changeset
3816
a61af66fc99e Initial load
duke
parents:
diff changeset
3817 // Trash the return pc
304
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 196
diff changeset
3818 __ addptr(rsp, wordSize);
0
a61af66fc99e Initial load
duke
parents:
diff changeset
3819
a61af66fc99e Initial load
duke
parents:
diff changeset
3820 // Load address of array of frame sizes into rsi (intptr_t*)
13384
fca8f4799229 8028308: nsk regression, assert(obj->is_oop()) failed: not an oop
roland
parents: 10998
diff changeset
3821 __ movptr(rsi, Address(rdi, Deoptimization::UnrollBlock:: frame_sizes_offset_in_bytes()));
0
a61af66fc99e Initial load
duke
parents:
diff changeset
3822
a61af66fc99e Initial load
duke
parents:
diff changeset
3823 // Counter
13384
fca8f4799229 8028308: nsk regression, assert(obj->is_oop()) failed: not an oop
roland
parents: 10998
diff changeset
3824 __ movl(rdx, Address(rdi, Deoptimization::UnrollBlock:: number_of_frames_offset_in_bytes())); // (int)
0
a61af66fc99e Initial load
duke
parents:
diff changeset
3825
a61af66fc99e Initial load
duke
parents:
diff changeset
3826 // Now adjust the caller's stack to make up for the extra locals but
a61af66fc99e Initial load
duke
parents:
diff changeset
3827 // record the original sp so that we can save it in the skeletal
a61af66fc99e Initial load
duke
parents:
diff changeset
3828 // interpreter frame and the stack walking of interpreter_sender
a61af66fc99e Initial load
duke
parents:
diff changeset
3829 // will get the unextended sp value and not the "real" sp value.
a61af66fc99e Initial load
duke
parents:
diff changeset
3830
a61af66fc99e Initial load
duke
parents:
diff changeset
3831 const Register sender_sp = r8;
a61af66fc99e Initial load
duke
parents:
diff changeset
3832
304
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 196
diff changeset
3833 __ mov(sender_sp, rsp);
13384
fca8f4799229 8028308: nsk regression, assert(obj->is_oop()) failed: not an oop
roland
parents: 10998
diff changeset
3834 __ movl(rbx, Address(rdi, Deoptimization::UnrollBlock:: caller_adjustment_offset_in_bytes())); // (int)
304
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 196
diff changeset
3835 __ subptr(rsp, rbx);
0
a61af66fc99e Initial load
duke
parents:
diff changeset
3836
a61af66fc99e Initial load
duke
parents:
diff changeset
3837 // Push interpreter frames in a loop
a61af66fc99e Initial load
duke
parents:
diff changeset
3838 Label loop;
a61af66fc99e Initial load
duke
parents:
diff changeset
3839 __ bind(loop);
304
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 196
diff changeset
3840 __ movptr(rbx, Address(rsi, 0)); // Load frame size
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 196
diff changeset
3841 __ subptr(rbx, 2 * wordSize); // We'll push pc and rbp by hand
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 196
diff changeset
3842 __ pushptr(Address(rcx, 0)); // Save return address
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 196
diff changeset
3843 __ enter(); // Save old & set new rbp
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 196
diff changeset
3844 __ subptr(rsp, rbx); // Prolog
520
52a431267315 6791168: Fix invalid code in bytecodeInterpreter that can cause gcc ICE
coleenp
parents: 304
diff changeset
3845 #ifdef CC_INTERP
52a431267315 6791168: Fix invalid code in bytecodeInterpreter that can cause gcc ICE
coleenp
parents: 304
diff changeset
3846 __ movptr(Address(rbp,
52a431267315 6791168: Fix invalid code in bytecodeInterpreter that can cause gcc ICE
coleenp
parents: 304
diff changeset
3847 -(sizeof(BytecodeInterpreter)) + in_bytes(byte_offset_of(BytecodeInterpreter, _sender_sp))),
52a431267315 6791168: Fix invalid code in bytecodeInterpreter that can cause gcc ICE
coleenp
parents: 304
diff changeset
3848 sender_sp); // Make it walkable
52a431267315 6791168: Fix invalid code in bytecodeInterpreter that can cause gcc ICE
coleenp
parents: 304
diff changeset
3849 #else // CC_INTERP
304
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 196
diff changeset
3850 __ movptr(Address(rbp, frame::interpreter_frame_sender_sp_offset * wordSize),
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 196
diff changeset
3851 sender_sp); // Make it walkable
0
a61af66fc99e Initial load
duke
parents:
diff changeset
3852 // This value is corrected by layout_activation_impl
304
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 196
diff changeset
3853 __ movptr(Address(rbp, frame::interpreter_frame_last_sp_offset * wordSize), (int32_t)NULL_WORD );
520
52a431267315 6791168: Fix invalid code in bytecodeInterpreter that can cause gcc ICE
coleenp
parents: 304
diff changeset
3854 #endif // CC_INTERP
304
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 196
diff changeset
3855 __ mov(sender_sp, rsp); // Pass sender_sp to next frame
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 196
diff changeset
3856 __ addptr(rsi, wordSize); // Bump array pointer (sizes)
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 196
diff changeset
3857 __ addptr(rcx, wordSize); // Bump array pointer (pcs)
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 196
diff changeset
3858 __ decrementl(rdx); // Decrement counter
0
a61af66fc99e Initial load
duke
parents:
diff changeset
3859 __ jcc(Assembler::notZero, loop);
304
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 196
diff changeset
3860 __ pushptr(Address(rcx, 0)); // Save final return address
0
a61af66fc99e Initial load
duke
parents:
diff changeset
3861
a61af66fc99e Initial load
duke
parents:
diff changeset
3862 // Re-push self-frame
a61af66fc99e Initial load
duke
parents:
diff changeset
3863 __ enter(); // Save old & set new rbp
304
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 196
diff changeset
3864 __ subptr(rsp, (SimpleRuntimeFrame::framesize - 4) << LogBytesPerInt);
0
a61af66fc99e Initial load
duke
parents:
diff changeset
3865 // Prolog
a61af66fc99e Initial load
duke
parents:
diff changeset
3866
a61af66fc99e Initial load
duke
parents:
diff changeset
3867 // Use rbp because the frames look interpreted now
4057
1feb272af3a7 6636110: unaligned stackpointer leads to crash during deoptimization
never
parents: 3931
diff changeset
3868 // Save "the_pc" since it cannot easily be retrieved using the last_java_SP after we aligned SP.
1feb272af3a7 6636110: unaligned stackpointer leads to crash during deoptimization
never
parents: 3931
diff changeset
3869 // Don't need the precise return PC here, just precise enough to point into this code blob.
1feb272af3a7 6636110: unaligned stackpointer leads to crash during deoptimization
never
parents: 3931
diff changeset
3870 address the_pc = __ pc();
1feb272af3a7 6636110: unaligned stackpointer leads to crash during deoptimization
never
parents: 3931
diff changeset
3871 __ set_last_Java_frame(noreg, rbp, the_pc);
0
a61af66fc99e Initial load
duke
parents:
diff changeset
3872
a61af66fc99e Initial load
duke
parents:
diff changeset
3873 // Call C code. Need thread but NOT official VM entry
a61af66fc99e Initial load
duke
parents:
diff changeset
3874 // crud. We cannot block on this call, no GC can happen. Call should
a61af66fc99e Initial load
duke
parents:
diff changeset
3875 // restore return values to their stack-slots with the new SP.
a61af66fc99e Initial load
duke
parents:
diff changeset
3876 // Thread is in rdi already.
a61af66fc99e Initial load
duke
parents:
diff changeset
3877 //
a61af66fc99e Initial load
duke
parents:
diff changeset
3878 // BasicType unpack_frames(JavaThread* thread, int exec_mode);
a61af66fc99e Initial load
duke
parents:
diff changeset
3879
4057
1feb272af3a7 6636110: unaligned stackpointer leads to crash during deoptimization
never
parents: 3931
diff changeset
3880 __ andptr(rsp, -(StackAlignmentInBytes)); // Align SP as required by ABI
304
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 196
diff changeset
3881 __ mov(c_rarg0, r15_thread);
0
a61af66fc99e Initial load
duke
parents:
diff changeset
3882 __ movl(c_rarg1, Deoptimization::Unpack_uncommon_trap);
a61af66fc99e Initial load
duke
parents:
diff changeset
3883 __ call(RuntimeAddress(CAST_FROM_FN_PTR(address, Deoptimization::unpack_frames)));
a61af66fc99e Initial load
duke
parents:
diff changeset
3884
a61af66fc99e Initial load
duke
parents:
diff changeset
3885 // Set an oopmap for the call site
4057
1feb272af3a7 6636110: unaligned stackpointer leads to crash during deoptimization
never
parents: 3931
diff changeset
3886 // Use the same PC we used for the last java frame
1feb272af3a7 6636110: unaligned stackpointer leads to crash during deoptimization
never
parents: 3931
diff changeset
3887 oop_maps->add_gc_map(the_pc - start, new OopMap(SimpleRuntimeFrame::framesize, 0));
1feb272af3a7 6636110: unaligned stackpointer leads to crash during deoptimization
never
parents: 3931
diff changeset
3888
1feb272af3a7 6636110: unaligned stackpointer leads to crash during deoptimization
never
parents: 3931
diff changeset
3889 // Clear fp AND pc
1feb272af3a7 6636110: unaligned stackpointer leads to crash during deoptimization
never
parents: 3931
diff changeset
3890 __ reset_last_Java_frame(true, true);
0
a61af66fc99e Initial load
duke
parents:
diff changeset
3891
a61af66fc99e Initial load
duke
parents:
diff changeset
3892 // Pop self-frame.
a61af66fc99e Initial load
duke
parents:
diff changeset
3893 __ leave(); // Epilog
a61af66fc99e Initial load
duke
parents:
diff changeset
3894
a61af66fc99e Initial load
duke
parents:
diff changeset
3895 // Jump to interpreter
a61af66fc99e Initial load
duke
parents:
diff changeset
3896 __ ret(0);
a61af66fc99e Initial load
duke
parents:
diff changeset
3897
a61af66fc99e Initial load
duke
parents:
diff changeset
3898 // Make sure all code is generated
a61af66fc99e Initial load
duke
parents:
diff changeset
3899 masm->flush();
a61af66fc99e Initial load
duke
parents:
diff changeset
3900
a61af66fc99e Initial load
duke
parents:
diff changeset
3901 _uncommon_trap_blob = UncommonTrapBlob::create(&buffer, oop_maps,
a61af66fc99e Initial load
duke
parents:
diff changeset
3902 SimpleRuntimeFrame::framesize >> 1);
a61af66fc99e Initial load
duke
parents:
diff changeset
3903 }
a61af66fc99e Initial load
duke
parents:
diff changeset
3904 #endif // COMPILER2
a61af66fc99e Initial load
duke
parents:
diff changeset
3905
a61af66fc99e Initial load
duke
parents:
diff changeset
3906
a61af66fc99e Initial load
duke
parents:
diff changeset
3907 //------------------------------generate_handler_blob------
a61af66fc99e Initial load
duke
parents:
diff changeset
3908 //
a61af66fc99e Initial load
duke
parents:
diff changeset
3909 // Generate a special Compile2Runtime blob that saves all registers,
a61af66fc99e Initial load
duke
parents:
diff changeset
3910 // and setup oopmap.
a61af66fc99e Initial load
duke
parents:
diff changeset
3911 //
6792
137868b7aa6f 7196199: java/text/Bidi/Bug6665028.java failed: Bidi run count incorrect
kvn
parents: 6790
diff changeset
3912 SafepointBlob* SharedRuntime::generate_handler_blob(address call_ptr, int poll_type) {
0
a61af66fc99e Initial load
duke
parents:
diff changeset
3913 assert(StubRoutines::forward_exception_entry() != NULL,
a61af66fc99e Initial load
duke
parents:
diff changeset
3914 "must be generated before");
a61af66fc99e Initial load
duke
parents:
diff changeset
3915
a61af66fc99e Initial load
duke
parents:
diff changeset
3916 ResourceMark rm;
a61af66fc99e Initial load
duke
parents:
diff changeset
3917 OopMapSet *oop_maps = new OopMapSet();
a61af66fc99e Initial load
duke
parents:
diff changeset
3918 OopMap* map;
a61af66fc99e Initial load
duke
parents:
diff changeset
3919
a61af66fc99e Initial load
duke
parents:
diff changeset
3920 // Allocate space for the code. Setup code generation tools.
a61af66fc99e Initial load
duke
parents:
diff changeset
3921 CodeBuffer buffer("handler_blob", 2048, 1024);
a61af66fc99e Initial load
duke
parents:
diff changeset
3922 MacroAssembler* masm = new MacroAssembler(&buffer);
a61af66fc99e Initial load
duke
parents:
diff changeset
3923
a61af66fc99e Initial load
duke
parents:
diff changeset
3924 address start = __ pc();
a61af66fc99e Initial load
duke
parents:
diff changeset
3925 address call_pc = NULL;
a61af66fc99e Initial load
duke
parents:
diff changeset
3926 int frame_size_in_words;
6792
137868b7aa6f 7196199: java/text/Bidi/Bug6665028.java failed: Bidi run count incorrect
kvn
parents: 6790
diff changeset
3927 bool cause_return = (poll_type == POLL_AT_RETURN);
137868b7aa6f 7196199: java/text/Bidi/Bug6665028.java failed: Bidi run count incorrect
kvn
parents: 6790
diff changeset
3928 bool save_vectors = (poll_type == POLL_AT_VECTOR_LOOP);
0
a61af66fc99e Initial load
duke
parents:
diff changeset
3929
17780
606acabe7b5c 8031320: Use Intel RTM instructions for locks
kvn
parents: 14223
diff changeset
3930 if (UseRTMLocking) {
606acabe7b5c 8031320: Use Intel RTM instructions for locks
kvn
parents: 14223
diff changeset
3931 // Abort RTM transaction before calling runtime
606acabe7b5c 8031320: Use Intel RTM instructions for locks
kvn
parents: 14223
diff changeset
3932 // because critical section will be large and will be
606acabe7b5c 8031320: Use Intel RTM instructions for locks
kvn
parents: 14223
diff changeset
3933 // aborted anyway. Also nmethod could be deoptimized.
606acabe7b5c 8031320: Use Intel RTM instructions for locks
kvn
parents: 14223
diff changeset
3934 __ xabort(0);
606acabe7b5c 8031320: Use Intel RTM instructions for locks
kvn
parents: 14223
diff changeset
3935 }
606acabe7b5c 8031320: Use Intel RTM instructions for locks
kvn
parents: 14223
diff changeset
3936
0
a61af66fc99e Initial load
duke
parents:
diff changeset
3937 // Make room for return address (or push it again)
a61af66fc99e Initial load
duke
parents:
diff changeset
3938 if (!cause_return) {
304
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 196
diff changeset
3939 __ push(rbx);
0
a61af66fc99e Initial load
duke
parents:
diff changeset
3940 }
a61af66fc99e Initial load
duke
parents:
diff changeset
3941
a61af66fc99e Initial load
duke
parents:
diff changeset
3942 // Save registers, fpu state, and flags
6792
137868b7aa6f 7196199: java/text/Bidi/Bug6665028.java failed: Bidi run count incorrect
kvn
parents: 6790
diff changeset
3943 map = RegisterSaver::save_live_registers(masm, 0, &frame_size_in_words, save_vectors);
0
a61af66fc99e Initial load
duke
parents:
diff changeset
3944
a61af66fc99e Initial load
duke
parents:
diff changeset
3945 // The following is basically a call_VM. However, we need the precise
a61af66fc99e Initial load
duke
parents:
diff changeset
3946 // address of the call in order to generate an oopmap. Hence, we do all the
a61af66fc99e Initial load
duke
parents:
diff changeset
3947 // work outselves.
a61af66fc99e Initial load
duke
parents:
diff changeset
3948
a61af66fc99e Initial load
duke
parents:
diff changeset
3949 __ set_last_Java_frame(noreg, noreg, NULL);
a61af66fc99e Initial load
duke
parents:
diff changeset
3950
a61af66fc99e Initial load
duke
parents:
diff changeset
3951 // The return address must always be correct so that frame constructor never
a61af66fc99e Initial load
duke
parents:
diff changeset
3952 // sees an invalid pc.
a61af66fc99e Initial load
duke
parents:
diff changeset
3953
a61af66fc99e Initial load
duke
parents:
diff changeset
3954 if (!cause_return) {
a61af66fc99e Initial load
duke
parents:
diff changeset
3955 // overwrite the dummy value we pushed on entry
304
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 196
diff changeset
3956 __ movptr(c_rarg0, Address(r15_thread, JavaThread::saved_exception_pc_offset()));
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 196
diff changeset
3957 __ movptr(Address(rbp, wordSize), c_rarg0);
0
a61af66fc99e Initial load
duke
parents:
diff changeset
3958 }
a61af66fc99e Initial load
duke
parents:
diff changeset
3959
a61af66fc99e Initial load
duke
parents:
diff changeset
3960 // Do the call
304
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 196
diff changeset
3961 __ mov(c_rarg0, r15_thread);
0
a61af66fc99e Initial load
duke
parents:
diff changeset
3962 __ call(RuntimeAddress(call_ptr));
a61af66fc99e Initial load
duke
parents:
diff changeset
3963
a61af66fc99e Initial load
duke
parents:
diff changeset
3964 // Set an oopmap for the call site. This oopmap will map all
a61af66fc99e Initial load
duke
parents:
diff changeset
3965 // oop-registers and debug-info registers as callee-saved. This
a61af66fc99e Initial load
duke
parents:
diff changeset
3966 // will allow deoptimization at this safepoint to find all possible
a61af66fc99e Initial load
duke
parents:
diff changeset
3967 // debug-info recordings, as well as let GC find all oops.
a61af66fc99e Initial load
duke
parents:
diff changeset
3968
a61af66fc99e Initial load
duke
parents:
diff changeset
3969 oop_maps->add_gc_map( __ pc() - start, map);
a61af66fc99e Initial load
duke
parents:
diff changeset
3970
a61af66fc99e Initial load
duke
parents:
diff changeset
3971 Label noException;
a61af66fc99e Initial load
duke
parents:
diff changeset
3972
a61af66fc99e Initial load
duke
parents:
diff changeset
3973 __ reset_last_Java_frame(false, false);
a61af66fc99e Initial load
duke
parents:
diff changeset
3974
304
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 196
diff changeset
3975 __ cmpptr(Address(r15_thread, Thread::pending_exception_offset()), (int32_t)NULL_WORD);
0
a61af66fc99e Initial load
duke
parents:
diff changeset
3976 __ jcc(Assembler::equal, noException);
a61af66fc99e Initial load
duke
parents:
diff changeset
3977
a61af66fc99e Initial load
duke
parents:
diff changeset
3978 // Exception pending
a61af66fc99e Initial load
duke
parents:
diff changeset
3979
6792
137868b7aa6f 7196199: java/text/Bidi/Bug6665028.java failed: Bidi run count incorrect
kvn
parents: 6790
diff changeset
3980 RegisterSaver::restore_live_registers(masm, save_vectors);
0
a61af66fc99e Initial load
duke
parents:
diff changeset
3981
a61af66fc99e Initial load
duke
parents:
diff changeset
3982 __ jump(RuntimeAddress(StubRoutines::forward_exception_entry()));
a61af66fc99e Initial load
duke
parents:
diff changeset
3983
a61af66fc99e Initial load
duke
parents:
diff changeset
3984 // No exception case
a61af66fc99e Initial load
duke
parents:
diff changeset
3985 __ bind(noException);
a61af66fc99e Initial load
duke
parents:
diff changeset
3986
a61af66fc99e Initial load
duke
parents:
diff changeset
3987 // Normal exit, restore registers and exit.
6792
137868b7aa6f 7196199: java/text/Bidi/Bug6665028.java failed: Bidi run count incorrect
kvn
parents: 6790
diff changeset
3988 RegisterSaver::restore_live_registers(masm, save_vectors);
0
a61af66fc99e Initial load
duke
parents:
diff changeset
3989
a61af66fc99e Initial load
duke
parents:
diff changeset
3990 __ ret(0);
a61af66fc99e Initial load
duke
parents:
diff changeset
3991
a61af66fc99e Initial load
duke
parents:
diff changeset
3992 // Make sure all code is generated
a61af66fc99e Initial load
duke
parents:
diff changeset
3993 masm->flush();
a61af66fc99e Initial load
duke
parents:
diff changeset
3994
a61af66fc99e Initial load
duke
parents:
diff changeset
3995 // Fill-out other meta info
a61af66fc99e Initial load
duke
parents:
diff changeset
3996 return SafepointBlob::create(&buffer, oop_maps, frame_size_in_words);
a61af66fc99e Initial load
duke
parents:
diff changeset
3997 }
a61af66fc99e Initial load
duke
parents:
diff changeset
3998
a61af66fc99e Initial load
duke
parents:
diff changeset
3999 //
a61af66fc99e Initial load
duke
parents:
diff changeset
4000 // generate_resolve_blob - call resolution (static/virtual/opt-virtual/ic-miss
a61af66fc99e Initial load
duke
parents:
diff changeset
4001 //
a61af66fc99e Initial load
duke
parents:
diff changeset
4002 // Generate a stub that calls into vm to find out the proper destination
a61af66fc99e Initial load
duke
parents:
diff changeset
4003 // of a java call. All the argument registers are live at this point
a61af66fc99e Initial load
duke
parents:
diff changeset
4004 // but since this is generic code we don't know what they are and the caller
a61af66fc99e Initial load
duke
parents:
diff changeset
4005 // must do any gc of the args.
a61af66fc99e Initial load
duke
parents:
diff changeset
4006 //
3442
f7d55ea6ee56 7045514: SPARC assembly code for JSR 292 ricochet frames
never
parents: 3363
diff changeset
4007 RuntimeStub* SharedRuntime::generate_resolve_blob(address destination, const char* name) {
0
a61af66fc99e Initial load
duke
parents:
diff changeset
4008 assert (StubRoutines::forward_exception_entry() != NULL, "must be generated before");
a61af66fc99e Initial load
duke
parents:
diff changeset
4009
a61af66fc99e Initial load
duke
parents:
diff changeset
4010 // allocate space for the code
a61af66fc99e Initial load
duke
parents:
diff changeset
4011 ResourceMark rm;
a61af66fc99e Initial load
duke
parents:
diff changeset
4012
a61af66fc99e Initial load
duke
parents:
diff changeset
4013 CodeBuffer buffer(name, 1000, 512);
a61af66fc99e Initial load
duke
parents:
diff changeset
4014 MacroAssembler* masm = new MacroAssembler(&buffer);
a61af66fc99e Initial load
duke
parents:
diff changeset
4015
a61af66fc99e Initial load
duke
parents:
diff changeset
4016 int frame_size_in_words;
a61af66fc99e Initial load
duke
parents:
diff changeset
4017
a61af66fc99e Initial load
duke
parents:
diff changeset
4018 OopMapSet *oop_maps = new OopMapSet();
a61af66fc99e Initial load
duke
parents:
diff changeset
4019 OopMap* map = NULL;
a61af66fc99e Initial load
duke
parents:
diff changeset
4020
a61af66fc99e Initial load
duke
parents:
diff changeset
4021 int start = __ offset();
a61af66fc99e Initial load
duke
parents:
diff changeset
4022
a61af66fc99e Initial load
duke
parents:
diff changeset
4023 map = RegisterSaver::save_live_registers(masm, 0, &frame_size_in_words);
a61af66fc99e Initial load
duke
parents:
diff changeset
4024
a61af66fc99e Initial load
duke
parents:
diff changeset
4025 int frame_complete = __ offset();
a61af66fc99e Initial load
duke
parents:
diff changeset
4026
a61af66fc99e Initial load
duke
parents:
diff changeset
4027 __ set_last_Java_frame(noreg, noreg, NULL);
a61af66fc99e Initial load
duke
parents:
diff changeset
4028
304
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 196
diff changeset
4029 __ mov(c_rarg0, r15_thread);
0
a61af66fc99e Initial load
duke
parents:
diff changeset
4030
a61af66fc99e Initial load
duke
parents:
diff changeset
4031 __ call(RuntimeAddress(destination));
a61af66fc99e Initial load
duke
parents:
diff changeset
4032
a61af66fc99e Initial load
duke
parents:
diff changeset
4033
a61af66fc99e Initial load
duke
parents:
diff changeset
4034 // Set an oopmap for the call site.
a61af66fc99e Initial load
duke
parents:
diff changeset
4035 // We need this not only for callee-saved registers, but also for volatile
a61af66fc99e Initial load
duke
parents:
diff changeset
4036 // registers that the compiler might be keeping live across a safepoint.
a61af66fc99e Initial load
duke
parents:
diff changeset
4037
a61af66fc99e Initial load
duke
parents:
diff changeset
4038 oop_maps->add_gc_map( __ offset() - start, map);
a61af66fc99e Initial load
duke
parents:
diff changeset
4039
a61af66fc99e Initial load
duke
parents:
diff changeset
4040 // rax contains the address we are going to jump to assuming no exception got installed
a61af66fc99e Initial load
duke
parents:
diff changeset
4041
a61af66fc99e Initial load
duke
parents:
diff changeset
4042 // clear last_Java_sp
a61af66fc99e Initial load
duke
parents:
diff changeset
4043 __ reset_last_Java_frame(false, false);
a61af66fc99e Initial load
duke
parents:
diff changeset
4044 // check for pending exceptions
a61af66fc99e Initial load
duke
parents:
diff changeset
4045 Label pending;
304
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 196
diff changeset
4046 __ cmpptr(Address(r15_thread, Thread::pending_exception_offset()), (int32_t)NULL_WORD);
0
a61af66fc99e Initial load
duke
parents:
diff changeset
4047 __ jcc(Assembler::notEqual, pending);
a61af66fc99e Initial load
duke
parents:
diff changeset
4048
6725
da91efe96a93 6964458: Reimplement class meta-data storage to use native memory
coleenp
parents: 6266
diff changeset
4049 // get the returned Method*
da91efe96a93 6964458: Reimplement class meta-data storage to use native memory
coleenp
parents: 6266
diff changeset
4050 __ get_vm_result_2(rbx, r15_thread);
304
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 196
diff changeset
4051 __ movptr(Address(rsp, RegisterSaver::rbx_offset_in_bytes()), rbx);
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 196
diff changeset
4052
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 196
diff changeset
4053 __ movptr(Address(rsp, RegisterSaver::rax_offset_in_bytes()), rax);
0
a61af66fc99e Initial load
duke
parents:
diff changeset
4054
a61af66fc99e Initial load
duke
parents:
diff changeset
4055 RegisterSaver::restore_live_registers(masm);
a61af66fc99e Initial load
duke
parents:
diff changeset
4056
a61af66fc99e Initial load
duke
parents:
diff changeset
4057 // We are back the the original state on entry and ready to go.
a61af66fc99e Initial load
duke
parents:
diff changeset
4058
a61af66fc99e Initial load
duke
parents:
diff changeset
4059 __ jmp(rax);
a61af66fc99e Initial load
duke
parents:
diff changeset
4060
a61af66fc99e Initial load
duke
parents:
diff changeset
4061 // Pending exception after the safepoint
a61af66fc99e Initial load
duke
parents:
diff changeset
4062
a61af66fc99e Initial load
duke
parents:
diff changeset
4063 __ bind(pending);
a61af66fc99e Initial load
duke
parents:
diff changeset
4064
a61af66fc99e Initial load
duke
parents:
diff changeset
4065 RegisterSaver::restore_live_registers(masm);
a61af66fc99e Initial load
duke
parents:
diff changeset
4066
a61af66fc99e Initial load
duke
parents:
diff changeset
4067 // exception pending => remove activation and forward to exception handler
a61af66fc99e Initial load
duke
parents:
diff changeset
4068
a61af66fc99e Initial load
duke
parents:
diff changeset
4069 __ movptr(Address(r15_thread, JavaThread::vm_result_offset()), (int)NULL_WORD);
a61af66fc99e Initial load
duke
parents:
diff changeset
4070
304
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 196
diff changeset
4071 __ movptr(rax, Address(r15_thread, Thread::pending_exception_offset()));
0
a61af66fc99e Initial load
duke
parents:
diff changeset
4072 __ jump(RuntimeAddress(StubRoutines::forward_exception_entry()));
a61af66fc99e Initial load
duke
parents:
diff changeset
4073
a61af66fc99e Initial load
duke
parents:
diff changeset
4074 // -------------
a61af66fc99e Initial load
duke
parents:
diff changeset
4075 // make sure all code is generated
a61af66fc99e Initial load
duke
parents:
diff changeset
4076 masm->flush();
a61af66fc99e Initial load
duke
parents:
diff changeset
4077
a61af66fc99e Initial load
duke
parents:
diff changeset
4078 // return the blob
a61af66fc99e Initial load
duke
parents:
diff changeset
4079 // frame_size_words or bytes??
a61af66fc99e Initial load
duke
parents:
diff changeset
4080 return RuntimeStub::new_runtime_stub(name, &buffer, frame_complete, frame_size_in_words, oop_maps, true);
a61af66fc99e Initial load
duke
parents:
diff changeset
4081 }
a61af66fc99e Initial load
duke
parents:
diff changeset
4082
a61af66fc99e Initial load
duke
parents:
diff changeset
4083
a61af66fc99e Initial load
duke
parents:
diff changeset
4084 #ifdef COMPILER2
a61af66fc99e Initial load
duke
parents:
diff changeset
4085 // This is here instead of runtime_x86_64.cpp because it uses SimpleRuntimeFrame
a61af66fc99e Initial load
duke
parents:
diff changeset
4086 //
a61af66fc99e Initial load
duke
parents:
diff changeset
4087 //------------------------------generate_exception_blob---------------------------
a61af66fc99e Initial load
duke
parents:
diff changeset
4088 // creates exception blob at the end
a61af66fc99e Initial load
duke
parents:
diff changeset
4089 // Using exception blob, this code is jumped from a compiled method.
a61af66fc99e Initial load
duke
parents:
diff changeset
4090 // (see emit_exception_handler in x86_64.ad file)
a61af66fc99e Initial load
duke
parents:
diff changeset
4091 //
a61af66fc99e Initial load
duke
parents:
diff changeset
4092 // Given an exception pc at a call we call into the runtime for the
a61af66fc99e Initial load
duke
parents:
diff changeset
4093 // handler in this method. This handler might merely restore state
a61af66fc99e Initial load
duke
parents:
diff changeset
4094 // (i.e. callee save registers) unwind the frame and jump to the
a61af66fc99e Initial load
duke
parents:
diff changeset
4095 // exception handler for the nmethod if there is no Java level handler
a61af66fc99e Initial load
duke
parents:
diff changeset
4096 // for the nmethod.
a61af66fc99e Initial load
duke
parents:
diff changeset
4097 //
a61af66fc99e Initial load
duke
parents:
diff changeset
4098 // This code is entered with a jmp.
a61af66fc99e Initial load
duke
parents:
diff changeset
4099 //
a61af66fc99e Initial load
duke
parents:
diff changeset
4100 // Arguments:
a61af66fc99e Initial load
duke
parents:
diff changeset
4101 // rax: exception oop
a61af66fc99e Initial load
duke
parents:
diff changeset
4102 // rdx: exception pc
a61af66fc99e Initial load
duke
parents:
diff changeset
4103 //
a61af66fc99e Initial load
duke
parents:
diff changeset
4104 // Results:
a61af66fc99e Initial load
duke
parents:
diff changeset
4105 // rax: exception oop
a61af66fc99e Initial load
duke
parents:
diff changeset
4106 // rdx: exception pc in caller or ???
a61af66fc99e Initial load
duke
parents:
diff changeset
4107 // destination: exception handler of caller
a61af66fc99e Initial load
duke
parents:
diff changeset
4108 //
a61af66fc99e Initial load
duke
parents:
diff changeset
4109 // Note: the exception pc MUST be at a call (precise debug information)
a61af66fc99e Initial load
duke
parents:
diff changeset
4110 // Registers rax, rdx, rcx, rsi, rdi, r8-r11 are not callee saved.
a61af66fc99e Initial load
duke
parents:
diff changeset
4111 //
a61af66fc99e Initial load
duke
parents:
diff changeset
4112
a61af66fc99e Initial load
duke
parents:
diff changeset
4113 void OptoRuntime::generate_exception_blob() {
a61af66fc99e Initial load
duke
parents:
diff changeset
4114 assert(!OptoRuntime::is_callee_saved_register(RDX_num), "");
a61af66fc99e Initial load
duke
parents:
diff changeset
4115 assert(!OptoRuntime::is_callee_saved_register(RAX_num), "");
a61af66fc99e Initial load
duke
parents:
diff changeset
4116 assert(!OptoRuntime::is_callee_saved_register(RCX_num), "");
a61af66fc99e Initial load
duke
parents:
diff changeset
4117
a61af66fc99e Initial load
duke
parents:
diff changeset
4118 assert(SimpleRuntimeFrame::framesize % 4 == 0, "sp not 16-byte aligned");
a61af66fc99e Initial load
duke
parents:
diff changeset
4119
a61af66fc99e Initial load
duke
parents:
diff changeset
4120 // Allocate space for the code
a61af66fc99e Initial load
duke
parents:
diff changeset
4121 ResourceMark rm;
a61af66fc99e Initial load
duke
parents:
diff changeset
4122 // Setup code generation tools
a61af66fc99e Initial load
duke
parents:
diff changeset
4123 CodeBuffer buffer("exception_blob", 2048, 1024);
a61af66fc99e Initial load
duke
parents:
diff changeset
4124 MacroAssembler* masm = new MacroAssembler(&buffer);
a61af66fc99e Initial load
duke
parents:
diff changeset
4125
a61af66fc99e Initial load
duke
parents:
diff changeset
4126
a61af66fc99e Initial load
duke
parents:
diff changeset
4127 address start = __ pc();
a61af66fc99e Initial load
duke
parents:
diff changeset
4128
a61af66fc99e Initial load
duke
parents:
diff changeset
4129 // Exception pc is 'return address' for stack walker
304
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 196
diff changeset
4130 __ push(rdx);
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 196
diff changeset
4131 __ subptr(rsp, SimpleRuntimeFrame::return_off << LogBytesPerInt); // Prolog
0
a61af66fc99e Initial load
duke
parents:
diff changeset
4132
a61af66fc99e Initial load
duke
parents:
diff changeset
4133 // Save callee-saved registers. See x86_64.ad.
a61af66fc99e Initial load
duke
parents:
diff changeset
4134
a61af66fc99e Initial load
duke
parents:
diff changeset
4135 // rbp is an implicitly saved callee saved register (i.e. the calling
a61af66fc99e Initial load
duke
parents:
diff changeset
4136 // convention will save restore it in prolog/epilog) Other than that
a61af66fc99e Initial load
duke
parents:
diff changeset
4137 // there are no callee save registers now that adapter frames are gone.
a61af66fc99e Initial load
duke
parents:
diff changeset
4138
304
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 196
diff changeset
4139 __ movptr(Address(rsp, SimpleRuntimeFrame::rbp_off << LogBytesPerInt), rbp);
0
a61af66fc99e Initial load
duke
parents:
diff changeset
4140
a61af66fc99e Initial load
duke
parents:
diff changeset
4141 // Store exception in Thread object. We cannot pass any arguments to the
a61af66fc99e Initial load
duke
parents:
diff changeset
4142 // handle_exception call, since we do not want to make any assumption
a61af66fc99e Initial load
duke
parents:
diff changeset
4143 // about the size of the frame where the exception happened in.
a61af66fc99e Initial load
duke
parents:
diff changeset
4144 // c_rarg0 is either rdi (Linux) or rcx (Windows).
304
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 196
diff changeset
4145 __ movptr(Address(r15_thread, JavaThread::exception_oop_offset()),rax);
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 196
diff changeset
4146 __ movptr(Address(r15_thread, JavaThread::exception_pc_offset()), rdx);
0
a61af66fc99e Initial load
duke
parents:
diff changeset
4147
a61af66fc99e Initial load
duke
parents:
diff changeset
4148 // This call does all the hard work. It checks if an exception handler
a61af66fc99e Initial load
duke
parents:
diff changeset
4149 // exists in the method.
a61af66fc99e Initial load
duke
parents:
diff changeset
4150 // If so, it returns the handler address.
a61af66fc99e Initial load
duke
parents:
diff changeset
4151 // If not, it prepares for stack-unwinding, restoring the callee-save
a61af66fc99e Initial load
duke
parents:
diff changeset
4152 // registers of the frame being removed.
a61af66fc99e Initial load
duke
parents:
diff changeset
4153 //
a61af66fc99e Initial load
duke
parents:
diff changeset
4154 // address OptoRuntime::handle_exception_C(JavaThread* thread)
a61af66fc99e Initial load
duke
parents:
diff changeset
4155
5904
bf7796b7367a 7148486: At a method handle call returning with an exception may call the runtime with misaligned stack (x64)
roland
parents: 4873
diff changeset
4156 // At a method handle call, the stack may not be properly aligned
bf7796b7367a 7148486: At a method handle call returning with an exception may call the runtime with misaligned stack (x64)
roland
parents: 4873
diff changeset
4157 // when returning with an exception.
bf7796b7367a 7148486: At a method handle call returning with an exception may call the runtime with misaligned stack (x64)
roland
parents: 4873
diff changeset
4158 address the_pc = __ pc();
bf7796b7367a 7148486: At a method handle call returning with an exception may call the runtime with misaligned stack (x64)
roland
parents: 4873
diff changeset
4159 __ set_last_Java_frame(noreg, noreg, the_pc);
304
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 196
diff changeset
4160 __ mov(c_rarg0, r15_thread);
5904
bf7796b7367a 7148486: At a method handle call returning with an exception may call the runtime with misaligned stack (x64)
roland
parents: 4873
diff changeset
4161 __ andptr(rsp, -(StackAlignmentInBytes)); // Align stack
0
a61af66fc99e Initial load
duke
parents:
diff changeset
4162 __ call(RuntimeAddress(CAST_FROM_FN_PTR(address, OptoRuntime::handle_exception_C)));
a61af66fc99e Initial load
duke
parents:
diff changeset
4163
a61af66fc99e Initial load
duke
parents:
diff changeset
4164 // Set an oopmap for the call site. This oopmap will only be used if we
a61af66fc99e Initial load
duke
parents:
diff changeset
4165 // are unwinding the stack. Hence, all locations will be dead.
a61af66fc99e Initial load
duke
parents:
diff changeset
4166 // Callee-saved registers will be the same as the frame above (i.e.,
a61af66fc99e Initial load
duke
parents:
diff changeset
4167 // handle_exception_stub), since they were restored when we got the
a61af66fc99e Initial load
duke
parents:
diff changeset
4168 // exception.
a61af66fc99e Initial load
duke
parents:
diff changeset
4169
a61af66fc99e Initial load
duke
parents:
diff changeset
4170 OopMapSet* oop_maps = new OopMapSet();
a61af66fc99e Initial load
duke
parents:
diff changeset
4171
5904
bf7796b7367a 7148486: At a method handle call returning with an exception may call the runtime with misaligned stack (x64)
roland
parents: 4873
diff changeset
4172 oop_maps->add_gc_map(the_pc - start, new OopMap(SimpleRuntimeFrame::framesize, 0));
bf7796b7367a 7148486: At a method handle call returning with an exception may call the runtime with misaligned stack (x64)
roland
parents: 4873
diff changeset
4173
bf7796b7367a 7148486: At a method handle call returning with an exception may call the runtime with misaligned stack (x64)
roland
parents: 4873
diff changeset
4174 __ reset_last_Java_frame(false, true);
0
a61af66fc99e Initial load
duke
parents:
diff changeset
4175
a61af66fc99e Initial load
duke
parents:
diff changeset
4176 // Restore callee-saved registers
a61af66fc99e Initial load
duke
parents:
diff changeset
4177
a61af66fc99e Initial load
duke
parents:
diff changeset
4178 // rbp is an implicitly saved callee saved register (i.e. the calling
a61af66fc99e Initial load
duke
parents:
diff changeset
4179 // convention will save restore it in prolog/epilog) Other than that
a61af66fc99e Initial load
duke
parents:
diff changeset
4180 // there are no callee save registers no that adapter frames are gone.
a61af66fc99e Initial load
duke
parents:
diff changeset
4181
304
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 196
diff changeset
4182 __ movptr(rbp, Address(rsp, SimpleRuntimeFrame::rbp_off << LogBytesPerInt));
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 196
diff changeset
4183
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 196
diff changeset
4184 __ addptr(rsp, SimpleRuntimeFrame::return_off << LogBytesPerInt); // Epilog
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 196
diff changeset
4185 __ pop(rdx); // No need for exception pc anymore
0
a61af66fc99e Initial load
duke
parents:
diff changeset
4186
a61af66fc99e Initial load
duke
parents:
diff changeset
4187 // rax: exception handler
a61af66fc99e Initial load
duke
parents:
diff changeset
4188
1368
93767e6a2dfd 6941529: SharedRuntime::raw_exception_handler_for_return_address must reset thread MethodHandle flag
twisti
parents: 1187
diff changeset
4189 // Restore SP from BP if the exception PC is a MethodHandle call site.
93767e6a2dfd 6941529: SharedRuntime::raw_exception_handler_for_return_address must reset thread MethodHandle flag
twisti
parents: 1187
diff changeset
4190 __ cmpl(Address(r15_thread, JavaThread::is_method_handle_return_offset()), 0);
1567
110501f54a99 6934104: JSR 292 needs to support SPARC C2
twisti
parents: 1506
diff changeset
4191 __ cmovptr(Assembler::notEqual, rsp, rbp_mh_SP_save);
1135
e66fd840cb6b 6893081: method handle & invokedynamic code needs additional cleanup (post 6815692, 6858164)
twisti
parents: 848
diff changeset
4192
0
a61af66fc99e Initial load
duke
parents:
diff changeset
4193 // We have a handler in rax (could be deopt blob).
304
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 196
diff changeset
4194 __ mov(r8, rax);
0
a61af66fc99e Initial load
duke
parents:
diff changeset
4195
a61af66fc99e Initial load
duke
parents:
diff changeset
4196 // Get the exception oop
304
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 196
diff changeset
4197 __ movptr(rax, Address(r15_thread, JavaThread::exception_oop_offset()));
0
a61af66fc99e Initial load
duke
parents:
diff changeset
4198 // Get the exception pc in case we are deoptimized
304
dc7f315e41f7 5108146: Merge i486 and amd64 cpu directories
never
parents: 196
diff changeset
4199 __ movptr(rdx, Address(r15_thread, JavaThread::exception_pc_offset()));
0
a61af66fc99e Initial load
duke
parents:
diff changeset
4200 #ifdef ASSERT
a61af66fc99e Initial load
duke
parents:
diff changeset
4201 __ movptr(Address(r15_thread, JavaThread::exception_handler_pc_offset()), (int)NULL_WORD);
a61af66fc99e Initial load
duke
parents:
diff changeset
4202 __ movptr(Address(r15_thread, JavaThread::exception_pc_offset()), (int)NULL_WORD);
a61af66fc99e Initial load
duke
parents:
diff changeset
4203 #endif
a61af66fc99e Initial load
duke
parents:
diff changeset
4204 // Clear the exception oop so GC no longer processes it as a root.
a61af66fc99e Initial load
duke
parents:
diff changeset
4205 __ movptr(Address(r15_thread, JavaThread::exception_oop_offset()), (int)NULL_WORD);
a61af66fc99e Initial load
duke
parents:
diff changeset
4206
a61af66fc99e Initial load
duke
parents:
diff changeset
4207 // rax: exception oop
a61af66fc99e Initial load
duke
parents:
diff changeset
4208 // r8: exception handler
a61af66fc99e Initial load
duke
parents:
diff changeset
4209 // rdx: exception pc
a61af66fc99e Initial load
duke
parents:
diff changeset
4210 // Jump to handler
a61af66fc99e Initial load
duke
parents:
diff changeset
4211
a61af66fc99e Initial load
duke
parents:
diff changeset
4212 __ jmp(r8);
a61af66fc99e Initial load
duke
parents:
diff changeset
4213
a61af66fc99e Initial load
duke
parents:
diff changeset
4214 // Make sure all code is generated
a61af66fc99e Initial load
duke
parents:
diff changeset
4215 masm->flush();
a61af66fc99e Initial load
duke
parents:
diff changeset
4216
a61af66fc99e Initial load
duke
parents:
diff changeset
4217 // Set exception blob
a61af66fc99e Initial load
duke
parents:
diff changeset
4218 _exception_blob = ExceptionBlob::create(&buffer, oop_maps, SimpleRuntimeFrame::framesize >> 1);
a61af66fc99e Initial load
duke
parents:
diff changeset
4219 }
a61af66fc99e Initial load
duke
parents:
diff changeset
4220 #endif // COMPILER2