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annotate src/os_cpu/solaris_sparc/vm/vm_version_solaris_sparc.cpp @ 20421:d635fd1ac81c

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8056124: Hotspot should use PICL interface to get cacheline size on SPARC Summary: Using libpicl to get L1 data and L2 cache line sizes Reviewed-by: kvn, roland, morris
author iveresov
date Mon, 08 Sep 2014 18:11:37 -0700
parents b20a35eae442
children c49cd31b6da6
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1 /*
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2 * Copyright (c) 2006, 2014, Oracle and/or its affiliates. All rights reserved.
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3 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
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4 *
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5 * This code is free software; you can redistribute it and/or modify it
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6 * under the terms of the GNU General Public License version 2 only, as
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7 * published by the Free Software Foundation.
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8 *
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9 * This code is distributed in the hope that it will be useful, but WITHOUT
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10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
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12 * version 2 for more details (a copy is included in the LICENSE file that
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13 * accompanied this code).
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14 *
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15 * You should have received a copy of the GNU General Public License version
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16 * 2 along with this work; if not, write to the Free Software Foundation,
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17 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
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18 *
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19 * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
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20 * or visit www.oracle.com if you need additional information or have any
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21 * questions.
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22 *
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23 */
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24
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25 #include "precompiled.hpp"
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26 #include "runtime/os.hpp"
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27 #include "vm_version_sparc.hpp"
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28
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29 #include <sys/auxv.h>
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30 #include <sys/auxv_SPARC.h>
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31 #include <sys/systeminfo.h>
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32 #include <kstat.h>
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33 #include <picl.h>
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34
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35 extern "C" static int PICL_get_l1_data_cache_line_size_helper(picl_nodehdl_t nodeh, void *result);
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36 extern "C" static int PICL_get_l2_cache_line_size_helper(picl_nodehdl_t nodeh, void *result);
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37
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38 class PICL {
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39 // Get a value of the integer property. The value in the tree can be either 32 or 64 bit
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40 // depending on the platform. The result is converted to int.
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41 static int get_int_property(picl_nodehdl_t nodeh, const char* name, int* result) {
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42 picl_propinfo_t pinfo;
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43 picl_prophdl_t proph;
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44 if (picl_get_prop_by_name(nodeh, name, &proph) != PICL_SUCCESS ||
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45 picl_get_propinfo(proph, &pinfo) != PICL_SUCCESS) {
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46 return PICL_FAILURE;
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47 }
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48
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49 if (pinfo.type != PICL_PTYPE_INT && pinfo.type != PICL_PTYPE_UNSIGNED_INT) {
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50 assert(false, "Invalid property type");
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51 return PICL_FAILURE;
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52 }
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53 if (pinfo.size == sizeof(int64_t)) {
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54 int64_t val;
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55 if (picl_get_propval(proph, &val, sizeof(int64_t)) != PICL_SUCCESS) {
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56 return PICL_FAILURE;
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57 }
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58 *result = static_cast<int>(val);
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59 } else if (pinfo.size == sizeof(int32_t)) {
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60 int32_t val;
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61 if (picl_get_propval(proph, &val, sizeof(int32_t)) != PICL_SUCCESS) {
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62 return PICL_FAILURE;
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63 }
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64 *result = static_cast<int>(val);
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65 } else {
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66 assert(false, "Unexpected integer property size");
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67 return PICL_FAILURE;
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68 }
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69 return PICL_SUCCESS;
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70 }
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71
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72 // Visitor and a state machine that visits integer properties and verifies that the
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73 // values are the same. Stores the unique value observed.
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74 class UniqueValueVisitor {
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75 enum {
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76 INITIAL, // Start state, no assignments happened
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77 ASSIGNED, // Assigned a value
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78 INCONSISTENT // Inconsistent value seen
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79 } _state;
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80 int _value;
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81 public:
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82 UniqueValueVisitor() : _state(INITIAL) { }
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83 int value() {
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84 assert(_state == ASSIGNED, "Precondition");
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85 return _value;
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86 }
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87 void set_value(int value) {
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88 assert(_state == INITIAL, "Precondition");
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89 _value = value;
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90 _state = ASSIGNED;
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91 }
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92 bool is_initial() { return _state == INITIAL; }
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93 bool is_assigned() { return _state == ASSIGNED; }
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94 bool is_inconsistent() { return _state == INCONSISTENT; }
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95 void set_inconsistent() { _state = INCONSISTENT; }
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96
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97 static int visit(picl_nodehdl_t nodeh, const char* name, void *arg) {
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98 UniqueValueVisitor *state = static_cast<UniqueValueVisitor*>(arg);
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99 assert(!state->is_inconsistent(), "Precondition");
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100 int curr;
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101 if (PICL::get_int_property(nodeh, name, &curr) == PICL_SUCCESS) {
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102 if (!state->is_assigned()) { // first iteration
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103 state->set_value(curr);
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104 } else if (curr != state->value()) { // following iterations
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105 state->set_inconsistent();
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106 }
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107 }
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108 if (state->is_inconsistent()) {
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109 return PICL_WALK_TERMINATE;
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110 }
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111 return PICL_WALK_CONTINUE;
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112 }
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113 };
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114
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115 int _L1_data_cache_line_size;
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116 int _L2_cache_line_size;
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117 public:
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118 static int get_l1_data_cache_line_size(picl_nodehdl_t nodeh, void *state) {
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119 return UniqueValueVisitor::visit(nodeh, "l1-dcache-line-size", state);
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120 }
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121 static int get_l2_cache_line_size(picl_nodehdl_t nodeh, void *state) {
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122 return UniqueValueVisitor::visit(nodeh, "l2-cache-line-size", state);
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123 }
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124
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125 PICL() : _L1_data_cache_line_size(0), _L2_cache_line_size(0) {
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126 if (picl_initialize() == PICL_SUCCESS) {
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127 picl_nodehdl_t rooth;
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128 if (picl_get_root(&rooth) == PICL_SUCCESS) {
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129 UniqueValueVisitor L1_state;
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130 // Visit all "cpu" class instances
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131 picl_walk_tree_by_class(rooth, "cpu", &L1_state, PICL_get_l1_data_cache_line_size_helper);
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132 if (L1_state.is_initial()) { // Still initial, iteration found no values
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133 // Try walk all "core" class instances, it might be a Fujitsu machine
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134 picl_walk_tree_by_class(rooth, "core", &L1_state, PICL_get_l1_data_cache_line_size_helper);
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135 }
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136 if (L1_state.is_assigned()) { // Is there a value?
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137 _L1_data_cache_line_size = L1_state.value();
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138 }
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139
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140 UniqueValueVisitor L2_state;
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141 picl_walk_tree_by_class(rooth, "cpu", &L2_state, PICL_get_l2_cache_line_size_helper);
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142 if (L2_state.is_initial()) {
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parents: 20313
diff changeset
143 picl_walk_tree_by_class(rooth, "core", &L2_state, PICL_get_l2_cache_line_size_helper);
d635fd1ac81c 8056124: Hotspot should use PICL interface to get cacheline size on SPARC
iveresov
parents: 20313
diff changeset
144 }
d635fd1ac81c 8056124: Hotspot should use PICL interface to get cacheline size on SPARC
iveresov
parents: 20313
diff changeset
145 if (L2_state.is_assigned()) {
d635fd1ac81c 8056124: Hotspot should use PICL interface to get cacheline size on SPARC
iveresov
parents: 20313
diff changeset
146 _L2_cache_line_size = L2_state.value();
d635fd1ac81c 8056124: Hotspot should use PICL interface to get cacheline size on SPARC
iveresov
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diff changeset
147 }
d635fd1ac81c 8056124: Hotspot should use PICL interface to get cacheline size on SPARC
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diff changeset
148 }
d635fd1ac81c 8056124: Hotspot should use PICL interface to get cacheline size on SPARC
iveresov
parents: 20313
diff changeset
149 picl_shutdown();
d635fd1ac81c 8056124: Hotspot should use PICL interface to get cacheline size on SPARC
iveresov
parents: 20313
diff changeset
150 }
d635fd1ac81c 8056124: Hotspot should use PICL interface to get cacheline size on SPARC
iveresov
parents: 20313
diff changeset
151 }
d635fd1ac81c 8056124: Hotspot should use PICL interface to get cacheline size on SPARC
iveresov
parents: 20313
diff changeset
152
d635fd1ac81c 8056124: Hotspot should use PICL interface to get cacheline size on SPARC
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diff changeset
153 unsigned int L1_data_cache_line_size() const { return _L1_data_cache_line_size; }
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diff changeset
154 unsigned int L2_cache_line_size() const { return _L2_cache_line_size; }
d635fd1ac81c 8056124: Hotspot should use PICL interface to get cacheline size on SPARC
iveresov
parents: 20313
diff changeset
155 };
d635fd1ac81c 8056124: Hotspot should use PICL interface to get cacheline size on SPARC
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diff changeset
156
d635fd1ac81c 8056124: Hotspot should use PICL interface to get cacheline size on SPARC
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diff changeset
157 extern "C" static int PICL_get_l1_data_cache_line_size_helper(picl_nodehdl_t nodeh, void *result) {
d635fd1ac81c 8056124: Hotspot should use PICL interface to get cacheline size on SPARC
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parents: 20313
diff changeset
158 return PICL::get_l1_data_cache_line_size(nodeh, result);
d635fd1ac81c 8056124: Hotspot should use PICL interface to get cacheline size on SPARC
iveresov
parents: 20313
diff changeset
159 }
d635fd1ac81c 8056124: Hotspot should use PICL interface to get cacheline size on SPARC
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diff changeset
160 extern "C" static int PICL_get_l2_cache_line_size_helper(picl_nodehdl_t nodeh, void *result) {
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161 return PICL::get_l2_cache_line_size(nodeh, result);
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162 }
0
a61af66fc99e Initial load
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163
641
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164 // We need to keep these here as long as we have to build on Solaris
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165 // versions before 10.
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166 #ifndef SI_ARCHITECTURE_32
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167 #define SI_ARCHITECTURE_32 516 /* basic 32-bit SI_ARCHITECTURE */
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diff changeset
168 #endif
6af0a709d52b 6812587: Use auxv to determine SPARC hardware features on Solaris
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169
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170 #ifndef SI_ARCHITECTURE_64
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171 #define SI_ARCHITECTURE_64 517 /* basic 64-bit SI_ARCHITECTURE */
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172 #endif
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173
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174 static void do_sysinfo(int si, const char* string, int* features, int mask) {
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175 char tmp;
6af0a709d52b 6812587: Use auxv to determine SPARC hardware features on Solaris
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176 size_t bufsize = sysinfo(si, &tmp, 1);
6af0a709d52b 6812587: Use auxv to determine SPARC hardware features on Solaris
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177
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178 // All SI defines used below must be supported.
6af0a709d52b 6812587: Use auxv to determine SPARC hardware features on Solaris
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179 guarantee(bufsize != -1, "must be supported");
6af0a709d52b 6812587: Use auxv to determine SPARC hardware features on Solaris
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diff changeset
180
6af0a709d52b 6812587: Use auxv to determine SPARC hardware features on Solaris
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181 char* buf = (char*) malloc(bufsize);
6af0a709d52b 6812587: Use auxv to determine SPARC hardware features on Solaris
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diff changeset
182
6af0a709d52b 6812587: Use auxv to determine SPARC hardware features on Solaris
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diff changeset
183 if (buf == NULL)
6af0a709d52b 6812587: Use auxv to determine SPARC hardware features on Solaris
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diff changeset
184 return;
6af0a709d52b 6812587: Use auxv to determine SPARC hardware features on Solaris
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diff changeset
185
6af0a709d52b 6812587: Use auxv to determine SPARC hardware features on Solaris
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diff changeset
186 if (sysinfo(si, buf, bufsize) == bufsize) {
6af0a709d52b 6812587: Use auxv to determine SPARC hardware features on Solaris
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parents: 0
diff changeset
187 // Compare the string.
6af0a709d52b 6812587: Use auxv to determine SPARC hardware features on Solaris
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parents: 0
diff changeset
188 if (strcmp(buf, string) == 0) {
6af0a709d52b 6812587: Use auxv to determine SPARC hardware features on Solaris
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parents: 0
diff changeset
189 *features |= mask;
6af0a709d52b 6812587: Use auxv to determine SPARC hardware features on Solaris
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diff changeset
190 }
6af0a709d52b 6812587: Use auxv to determine SPARC hardware features on Solaris
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diff changeset
191 }
6af0a709d52b 6812587: Use auxv to determine SPARC hardware features on Solaris
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diff changeset
192
6af0a709d52b 6812587: Use auxv to determine SPARC hardware features on Solaris
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diff changeset
193 free(buf);
6af0a709d52b 6812587: Use auxv to determine SPARC hardware features on Solaris
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parents: 0
diff changeset
194 }
6af0a709d52b 6812587: Use auxv to determine SPARC hardware features on Solaris
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diff changeset
195
0
a61af66fc99e Initial load
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196 int VM_Version::platform_features(int features) {
641
6af0a709d52b 6812587: Use auxv to determine SPARC hardware features on Solaris
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parents: 0
diff changeset
197 // getisax(2), SI_ARCHITECTURE_32, and SI_ARCHITECTURE_64 are
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diff changeset
198 // supported on Solaris 10 and later.
6af0a709d52b 6812587: Use auxv to determine SPARC hardware features on Solaris
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diff changeset
199 if (os::Solaris::supports_getisax()) {
0
a61af66fc99e Initial load
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diff changeset
200
641
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diff changeset
201 // Check 32-bit architecture.
6af0a709d52b 6812587: Use auxv to determine SPARC hardware features on Solaris
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diff changeset
202 do_sysinfo(SI_ARCHITECTURE_32, "sparc", &features, v8_instructions_m);
6af0a709d52b 6812587: Use auxv to determine SPARC hardware features on Solaris
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diff changeset
203
6af0a709d52b 6812587: Use auxv to determine SPARC hardware features on Solaris
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diff changeset
204 // Check 64-bit architecture.
6af0a709d52b 6812587: Use auxv to determine SPARC hardware features on Solaris
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parents: 0
diff changeset
205 do_sysinfo(SI_ARCHITECTURE_64, "sparcv9", &features, generic_v9_m);
6af0a709d52b 6812587: Use auxv to determine SPARC hardware features on Solaris
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diff changeset
206
6af0a709d52b 6812587: Use auxv to determine SPARC hardware features on Solaris
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diff changeset
207 // Extract valid instruction set extensions.
17683
031b06eac1a9 8031290: Adjust call to getisax() for additional words returned
jmasa
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diff changeset
208 uint_t avs[2];
031b06eac1a9 8031290: Adjust call to getisax() for additional words returned
jmasa
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diff changeset
209 uint_t avn = os::Solaris::getisax(avs, 2);
031b06eac1a9 8031290: Adjust call to getisax() for additional words returned
jmasa
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210 assert(avn <= 2, "should return two or less av's");
031b06eac1a9 8031290: Adjust call to getisax() for additional words returned
jmasa
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diff changeset
211 uint_t av = avs[0];
0
a61af66fc99e Initial load
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212
1914
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213 #ifndef PRODUCT
17683
031b06eac1a9 8031290: Adjust call to getisax() for additional words returned
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214 if (PrintMiscellaneous && Verbose) {
031b06eac1a9 8031290: Adjust call to getisax() for additional words returned
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215 tty->print("getisax(2) returned: " PTR32_FORMAT, av);
031b06eac1a9 8031290: Adjust call to getisax() for additional words returned
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216 if (avn > 1) {
031b06eac1a9 8031290: Adjust call to getisax() for additional words returned
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217 tty->print(", " PTR32_FORMAT, avs[1]);
031b06eac1a9 8031290: Adjust call to getisax() for additional words returned
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diff changeset
218 }
031b06eac1a9 8031290: Adjust call to getisax() for additional words returned
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219 tty->cr();
031b06eac1a9 8031290: Adjust call to getisax() for additional words returned
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220 }
1914
ae065c367d93 6987135: Performance regression on Intel platform with 32-bits edition between 6u13 and 6u14.
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221 #endif
ae065c367d93 6987135: Performance regression on Intel platform with 32-bits edition between 6u13 and 6u14.
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222
641
6af0a709d52b 6812587: Use auxv to determine SPARC hardware features on Solaris
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223 if (av & AV_SPARC_MUL32) features |= hardware_mul32_m;
6af0a709d52b 6812587: Use auxv to determine SPARC hardware features on Solaris
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parents: 0
diff changeset
224 if (av & AV_SPARC_DIV32) features |= hardware_div32_m;
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parents: 0
diff changeset
225 if (av & AV_SPARC_FSMULD) features |= hardware_fsmuld_m;
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diff changeset
226 if (av & AV_SPARC_V8PLUS) features |= v9_instructions_m;
643
c771b7f43bbf 6378821: bitCount() should use POPC on SPARC processors and AMD+10h
twisti
parents: 641
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227 if (av & AV_SPARC_POPC) features |= hardware_popc_m;
641
6af0a709d52b 6812587: Use auxv to determine SPARC hardware features on Solaris
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diff changeset
228 if (av & AV_SPARC_VIS) features |= vis1_instructions_m;
6af0a709d52b 6812587: Use auxv to determine SPARC hardware features on Solaris
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parents: 0
diff changeset
229 if (av & AV_SPARC_VIS2) features |= vis2_instructions_m;
17683
031b06eac1a9 8031290: Adjust call to getisax() for additional words returned
jmasa
parents: 17670
diff changeset
230 if (avn > 1) {
031b06eac1a9 8031290: Adjust call to getisax() for additional words returned
jmasa
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diff changeset
231 uint_t av2 = avs[1];
031b06eac1a9 8031290: Adjust call to getisax() for additional words returned
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parents: 17670
diff changeset
232 #ifndef AV2_SPARC_SPARC5
031b06eac1a9 8031290: Adjust call to getisax() for additional words returned
jmasa
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233 #define AV2_SPARC_SPARC5 0x00000008 /* The 29 new fp and sub instructions */
031b06eac1a9 8031290: Adjust call to getisax() for additional words returned
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diff changeset
234 #endif
031b06eac1a9 8031290: Adjust call to getisax() for additional words returned
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diff changeset
235 if (av2 & AV2_SPARC_SPARC5) features |= sparc5_instructions_m;
031b06eac1a9 8031290: Adjust call to getisax() for additional words returned
jmasa
parents: 17670
diff changeset
236 }
1914
ae065c367d93 6987135: Performance regression on Intel platform with 32-bits edition between 6u13 and 6u14.
kvn
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diff changeset
237
ae065c367d93 6987135: Performance regression on Intel platform with 32-bits edition between 6u13 and 6u14.
kvn
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diff changeset
238 // Next values are not defined before Solaris 10
ae065c367d93 6987135: Performance regression on Intel platform with 32-bits edition between 6u13 and 6u14.
kvn
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diff changeset
239 // but Solaris 8 is used for jdk6 update builds.
ae065c367d93 6987135: Performance regression on Intel platform with 32-bits edition between 6u13 and 6u14.
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diff changeset
240 #ifndef AV_SPARC_ASI_BLK_INIT
ae065c367d93 6987135: Performance regression on Intel platform with 32-bits edition between 6u13 and 6u14.
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diff changeset
241 #define AV_SPARC_ASI_BLK_INIT 0x0080 /* ASI_BLK_INIT_xxx ASI */
ae065c367d93 6987135: Performance regression on Intel platform with 32-bits edition between 6u13 and 6u14.
kvn
parents: 1552
diff changeset
242 #endif
2080
c04052fd6ae1 7006505: Use kstat info to identify SPARC processor
kvn
parents: 1972
diff changeset
243 if (av & AV_SPARC_ASI_BLK_INIT) features |= blk_init_instructions_m;
c04052fd6ae1 7006505: Use kstat info to identify SPARC processor
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diff changeset
244
1914
ae065c367d93 6987135: Performance regression on Intel platform with 32-bits edition between 6u13 and 6u14.
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diff changeset
245 #ifndef AV_SPARC_FMAF
2080
c04052fd6ae1 7006505: Use kstat info to identify SPARC processor
kvn
parents: 1972
diff changeset
246 #define AV_SPARC_FMAF 0x0100 /* Fused Multiply-Add */
1914
ae065c367d93 6987135: Performance regression on Intel platform with 32-bits edition between 6u13 and 6u14.
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diff changeset
247 #endif
ae065c367d93 6987135: Performance regression on Intel platform with 32-bits edition between 6u13 and 6u14.
kvn
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diff changeset
248 if (av & AV_SPARC_FMAF) features |= fmaf_instructions_m;
2080
c04052fd6ae1 7006505: Use kstat info to identify SPARC processor
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diff changeset
249
c04052fd6ae1 7006505: Use kstat info to identify SPARC processor
kvn
parents: 1972
diff changeset
250 #ifndef AV_SPARC_FMAU
c04052fd6ae1 7006505: Use kstat info to identify SPARC processor
kvn
parents: 1972
diff changeset
251 #define AV_SPARC_FMAU 0x0200 /* Unfused Multiply-Add */
c04052fd6ae1 7006505: Use kstat info to identify SPARC processor
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parents: 1972
diff changeset
252 #endif
c04052fd6ae1 7006505: Use kstat info to identify SPARC processor
kvn
parents: 1972
diff changeset
253 if (av & AV_SPARC_FMAU) features |= fmau_instructions_m;
c04052fd6ae1 7006505: Use kstat info to identify SPARC processor
kvn
parents: 1972
diff changeset
254
c04052fd6ae1 7006505: Use kstat info to identify SPARC processor
kvn
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diff changeset
255 #ifndef AV_SPARC_VIS3
c04052fd6ae1 7006505: Use kstat info to identify SPARC processor
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diff changeset
256 #define AV_SPARC_VIS3 0x0400 /* VIS3 instruction set extensions */
c04052fd6ae1 7006505: Use kstat info to identify SPARC processor
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diff changeset
257 #endif
c04052fd6ae1 7006505: Use kstat info to identify SPARC processor
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diff changeset
258 if (av & AV_SPARC_VIS3) features |= vis3_instructions_m;
c04052fd6ae1 7006505: Use kstat info to identify SPARC processor
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parents: 1972
diff changeset
259
3839
3d42f82cd811 7063628: Use cbcond on T4
kvn
parents: 2247
diff changeset
260 #ifndef AV_SPARC_CBCOND
3d42f82cd811 7063628: Use cbcond on T4
kvn
parents: 2247
diff changeset
261 #define AV_SPARC_CBCOND 0x10000000 /* compare and branch instrs supported */
3d42f82cd811 7063628: Use cbcond on T4
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parents: 2247
diff changeset
262 #endif
3d42f82cd811 7063628: Use cbcond on T4
kvn
parents: 2247
diff changeset
263 if (av & AV_SPARC_CBCOND) features |= cbcond_instructions_m;
3d42f82cd811 7063628: Use cbcond on T4
kvn
parents: 2247
diff changeset
264
17670
04d32e7fad07 8002074: Support for AES on SPARC
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diff changeset
265 #ifndef AV_SPARC_AES
04d32e7fad07 8002074: Support for AES on SPARC
kvn
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diff changeset
266 #define AV_SPARC_AES 0x00020000 /* aes instrs supported */
04d32e7fad07 8002074: Support for AES on SPARC
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parents: 6842
diff changeset
267 #endif
04d32e7fad07 8002074: Support for AES on SPARC
kvn
parents: 6842
diff changeset
268 if (av & AV_SPARC_AES) features |= aes_instructions_m;
04d32e7fad07 8002074: Support for AES on SPARC
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diff changeset
269
20313
b20a35eae442 8035968: Leverage CPU Instructions to Improve SHA Performance on SPARC
kvn
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diff changeset
270 #ifndef AV_SPARC_SHA1
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diff changeset
271 #define AV_SPARC_SHA1 0x00400000 /* sha1 instruction supported */
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diff changeset
272 #endif
b20a35eae442 8035968: Leverage CPU Instructions to Improve SHA Performance on SPARC
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diff changeset
273 if (av & AV_SPARC_SHA1) features |= sha1_instruction_m;
b20a35eae442 8035968: Leverage CPU Instructions to Improve SHA Performance on SPARC
kvn
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diff changeset
274
b20a35eae442 8035968: Leverage CPU Instructions to Improve SHA Performance on SPARC
kvn
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diff changeset
275 #ifndef AV_SPARC_SHA256
b20a35eae442 8035968: Leverage CPU Instructions to Improve SHA Performance on SPARC
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diff changeset
276 #define AV_SPARC_SHA256 0x00800000 /* sha256 instruction supported */
b20a35eae442 8035968: Leverage CPU Instructions to Improve SHA Performance on SPARC
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diff changeset
277 #endif
b20a35eae442 8035968: Leverage CPU Instructions to Improve SHA Performance on SPARC
kvn
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diff changeset
278 if (av & AV_SPARC_SHA256) features |= sha256_instruction_m;
b20a35eae442 8035968: Leverage CPU Instructions to Improve SHA Performance on SPARC
kvn
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diff changeset
279
b20a35eae442 8035968: Leverage CPU Instructions to Improve SHA Performance on SPARC
kvn
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diff changeset
280 #ifndef AV_SPARC_SHA512
b20a35eae442 8035968: Leverage CPU Instructions to Improve SHA Performance on SPARC
kvn
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diff changeset
281 #define AV_SPARC_SHA512 0x01000000 /* sha512 instruction supported */
b20a35eae442 8035968: Leverage CPU Instructions to Improve SHA Performance on SPARC
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diff changeset
282 #endif
b20a35eae442 8035968: Leverage CPU Instructions to Improve SHA Performance on SPARC
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parents: 17683
diff changeset
283 if (av & AV_SPARC_SHA512) features |= sha512_instruction_m;
b20a35eae442 8035968: Leverage CPU Instructions to Improve SHA Performance on SPARC
kvn
parents: 17683
diff changeset
284
641
6af0a709d52b 6812587: Use auxv to determine SPARC hardware features on Solaris
twisti
parents: 0
diff changeset
285 } else {
6af0a709d52b 6812587: Use auxv to determine SPARC hardware features on Solaris
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parents: 0
diff changeset
286 // getisax(2) failed, use the old legacy code.
6af0a709d52b 6812587: Use auxv to determine SPARC hardware features on Solaris
twisti
parents: 0
diff changeset
287 #ifndef PRODUCT
6af0a709d52b 6812587: Use auxv to determine SPARC hardware features on Solaris
twisti
parents: 0
diff changeset
288 if (PrintMiscellaneous && Verbose)
1914
ae065c367d93 6987135: Performance regression on Intel platform with 32-bits edition between 6u13 and 6u14.
kvn
parents: 1552
diff changeset
289 tty->print_cr("getisax(2) is not supported.");
641
6af0a709d52b 6812587: Use auxv to determine SPARC hardware features on Solaris
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diff changeset
290 #endif
6af0a709d52b 6812587: Use auxv to determine SPARC hardware features on Solaris
twisti
parents: 0
diff changeset
291
6af0a709d52b 6812587: Use auxv to determine SPARC hardware features on Solaris
twisti
parents: 0
diff changeset
292 char tmp;
6af0a709d52b 6812587: Use auxv to determine SPARC hardware features on Solaris
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293 size_t bufsize = sysinfo(SI_ISALIST, &tmp, 1);
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294 char* buf = (char*) malloc(bufsize);
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295
641
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296 if (buf != NULL) {
6af0a709d52b 6812587: Use auxv to determine SPARC hardware features on Solaris
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297 if (sysinfo(SI_ISALIST, buf, bufsize) == bufsize) {
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298 // Figure out what kind of sparc we have
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299 char *sparc_string = strstr(buf, "sparc");
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300 if (sparc_string != NULL) { features |= v8_instructions_m;
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301 if (sparc_string[5] == 'v') {
6af0a709d52b 6812587: Use auxv to determine SPARC hardware features on Solaris
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302 if (sparc_string[6] == '8') {
6af0a709d52b 6812587: Use auxv to determine SPARC hardware features on Solaris
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303 if (sparc_string[7] == '-') { features |= hardware_mul32_m;
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304 features |= hardware_div32_m;
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305 } else if (sparc_string[7] == 'p') features |= generic_v9_m;
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306 else features |= generic_v8_m;
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307 } else if (sparc_string[6] == '9') features |= generic_v9_m;
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308 }
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309 }
6af0a709d52b 6812587: Use auxv to determine SPARC hardware features on Solaris
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310
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311 // Check for visualization instructions
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312 char *vis = strstr(buf, "vis");
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313 if (vis != NULL) { features |= vis1_instructions_m;
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314 if (vis[3] == '2') features |= vis2_instructions_m;
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315 }
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316 }
641
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317 free(buf);
0
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318 }
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319 }
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320
641
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321 // Determine the machine type.
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322 do_sysinfo(SI_MACHINE, "sun4v", &features, sun4v_m);
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323
2080
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324 {
c04052fd6ae1 7006505: Use kstat info to identify SPARC processor
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325 // Using kstat to determine the machine type.
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326 kstat_ctl_t* kc = kstat_open();
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327 kstat_t* ksp = kstat_lookup(kc, (char*)"cpu_info", -1, NULL);
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328 const char* implementation = "UNKNOWN";
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329 if (ksp != NULL) {
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330 if (kstat_read(kc, ksp, NULL) != -1 && ksp->ks_data != NULL) {
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331 kstat_named_t* knm = (kstat_named_t *)ksp->ks_data;
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332 for (int i = 0; i < ksp->ks_ndata; i++) {
c04052fd6ae1 7006505: Use kstat info to identify SPARC processor
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333 if (strcmp((const char*)&(knm[i].name),"implementation") == 0) {
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334 #ifndef KSTAT_DATA_STRING
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335 #define KSTAT_DATA_STRING 9
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336 #endif
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337 if (knm[i].data_type == KSTAT_DATA_CHAR) {
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338 // VM is running on Solaris 8 which does not have value.str.
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339 implementation = &(knm[i].value.c[0]);
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340 } else if (knm[i].data_type == KSTAT_DATA_STRING) {
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341 // VM is running on Solaris 10.
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342 #ifndef KSTAT_NAMED_STR_PTR
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343 // Solaris 8 was used to build VM, define the structure it misses.
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344 struct str_t {
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345 union {
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346 char *ptr; /* NULL-term string */
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347 char __pad[8]; /* 64-bit padding */
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348 } addr;
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349 uint32_t len; /* # bytes for strlen + '\0' */
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350 };
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351 #define KSTAT_NAMED_STR_PTR(knptr) (( (str_t*)&((knptr)->value) )->addr.ptr)
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352 #endif
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353 implementation = KSTAT_NAMED_STR_PTR(&knm[i]);
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354 }
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355 #ifndef PRODUCT
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356 if (PrintMiscellaneous && Verbose) {
c04052fd6ae1 7006505: Use kstat info to identify SPARC processor
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357 tty->print_cr("cpu_info.implementation: %s", implementation);
c04052fd6ae1 7006505: Use kstat info to identify SPARC processor
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358 }
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359 #endif
2247
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360 // Convert to UPPER case before compare.
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361 char* impl = strdup(implementation);
c52cba2a3359 7014998: assert(is_T_family(features) == is_niagara(features)) failed: Niagara should be T series
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362
c52cba2a3359 7014998: assert(is_T_family(features) == is_niagara(features)) failed: Niagara should be T series
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363 for (int i = 0; impl[i] != 0; i++)
c52cba2a3359 7014998: assert(is_T_family(features) == is_niagara(features)) failed: Niagara should be T series
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364 impl[i] = (char)toupper((uint)impl[i]);
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365 if (strstr(impl, "SPARC64") != NULL) {
2080
c04052fd6ae1 7006505: Use kstat info to identify SPARC processor
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366 features |= sparc64_family_m;
6269
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367 } else if (strstr(impl, "SPARC-M") != NULL) {
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368 // M-series SPARC is based on T-series.
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369 features |= (M_family_m | T_family_m);
2247
c52cba2a3359 7014998: assert(is_T_family(features) == is_niagara(features)) failed: Niagara should be T series
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370 } else if (strstr(impl, "SPARC-T") != NULL) {
2080
c04052fd6ae1 7006505: Use kstat info to identify SPARC processor
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371 features |= T_family_m;
2247
c52cba2a3359 7014998: assert(is_T_family(features) == is_niagara(features)) failed: Niagara should be T series
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diff changeset
372 if (strstr(impl, "SPARC-T1") != NULL) {
2080
c04052fd6ae1 7006505: Use kstat info to identify SPARC processor
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373 features |= T1_model_m;
c04052fd6ae1 7006505: Use kstat info to identify SPARC processor
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374 }
2247
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diff changeset
375 } else {
6269
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diff changeset
376 if (strstr(impl, "SPARC") == NULL) {
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377 #ifndef PRODUCT
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378 // kstat on Solaris 8 virtual machines (branded zones)
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379 // returns "(unsupported)" implementation.
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380 warning("kstat cpu_info implementation = '%s', should contain SPARC", impl);
8cb110fd7627 7188227: VM should recognize M-series SPARC
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diff changeset
381 #endif
8cb110fd7627 7188227: VM should recognize M-series SPARC
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382 implementation = "SPARC";
8cb110fd7627 7188227: VM should recognize M-series SPARC
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diff changeset
383 }
2080
c04052fd6ae1 7006505: Use kstat info to identify SPARC processor
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diff changeset
384 }
2247
c52cba2a3359 7014998: assert(is_T_family(features) == is_niagara(features)) failed: Niagara should be T series
kvn
parents: 2080
diff changeset
385 free((void*)impl);
2080
c04052fd6ae1 7006505: Use kstat info to identify SPARC processor
kvn
parents: 1972
diff changeset
386 break;
c04052fd6ae1 7006505: Use kstat info to identify SPARC processor
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diff changeset
387 }
c04052fd6ae1 7006505: Use kstat info to identify SPARC processor
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388 } // for(
c04052fd6ae1 7006505: Use kstat info to identify SPARC processor
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389 }
c04052fd6ae1 7006505: Use kstat info to identify SPARC processor
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diff changeset
390 }
c04052fd6ae1 7006505: Use kstat info to identify SPARC processor
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parents: 1972
diff changeset
391 assert(strcmp(implementation, "UNKNOWN") != 0,
c04052fd6ae1 7006505: Use kstat info to identify SPARC processor
kvn
parents: 1972
diff changeset
392 "unknown cpu info (changed kstat interface?)");
c04052fd6ae1 7006505: Use kstat info to identify SPARC processor
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diff changeset
393 kstat_close(kc);
c04052fd6ae1 7006505: Use kstat info to identify SPARC processor
kvn
parents: 1972
diff changeset
394 }
c04052fd6ae1 7006505: Use kstat info to identify SPARC processor
kvn
parents: 1972
diff changeset
395
20421
d635fd1ac81c 8056124: Hotspot should use PICL interface to get cacheline size on SPARC
iveresov
parents: 20313
diff changeset
396 // Figure out cache line sizes using PICL
d635fd1ac81c 8056124: Hotspot should use PICL interface to get cacheline size on SPARC
iveresov
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diff changeset
397 PICL picl;
d635fd1ac81c 8056124: Hotspot should use PICL interface to get cacheline size on SPARC
iveresov
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diff changeset
398 _L2_cache_line_size = picl.L2_cache_line_size();
d635fd1ac81c 8056124: Hotspot should use PICL interface to get cacheline size on SPARC
iveresov
parents: 20313
diff changeset
399
0
a61af66fc99e Initial load
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400 return features;
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401 }