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comparison src/cpu/x86/vm/vm_version_x86.hpp @ 14726:92aa6797d639

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Backed out merge changeset: b51e29501f30 Backed out merge revision to its first parent (8f483e200405)
author Doug Simon <doug.simon@oracle.com>
date Mon, 24 Mar 2014 21:30:43 +0100
parents b51e29501f30
children
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14719:0bdd0d157040 14726:92aa6797d639
140 union ExtCpuid1Ecx { 140 union ExtCpuid1Ecx {
141 uint32_t value; 141 uint32_t value;
142 struct { 142 struct {
143 uint32_t LahfSahf : 1, 143 uint32_t LahfSahf : 1,
144 CmpLegacy : 1, 144 CmpLegacy : 1,
145 : 3, 145 : 4,
146 lzcnt_intel : 1,
147 lzcnt : 1, 146 lzcnt : 1,
148 sse4a : 1, 147 sse4a : 1,
149 misalignsse : 1, 148 misalignsse : 1,
150 prefetchw : 1, 149 prefetchw : 1,
151 : 22; 150 : 22;
251 CPU_TSCINV = (1 << 16), 250 CPU_TSCINV = (1 << 16),
252 CPU_AVX = (1 << 17), 251 CPU_AVX = (1 << 17),
253 CPU_AVX2 = (1 << 18), 252 CPU_AVX2 = (1 << 18),
254 CPU_AES = (1 << 19), 253 CPU_AES = (1 << 19),
255 CPU_ERMS = (1 << 20), // enhanced 'rep movsb/stosb' instructions 254 CPU_ERMS = (1 << 20), // enhanced 'rep movsb/stosb' instructions
256 CPU_CLMUL = (1 << 21), // carryless multiply for CRC 255 CPU_CLMUL = (1 << 21) // carryless multiply for CRC
257 CPU_BMI1 = (1 << 22),
258 CPU_BMI2 = (1 << 23)
259 } cpuFeatureFlags; 256 } cpuFeatureFlags;
260 257
261 enum { 258 enum {
262 // AMD 259 // AMD
263 CPU_FAMILY_AMD_11H = 0x11, 260 CPU_FAMILY_AMD_11H = 0x11,
425 _cpuid_info.xem_xcr0_eax.bits.ymm != 0) { 422 _cpuid_info.xem_xcr0_eax.bits.ymm != 0) {
426 result |= CPU_AVX; 423 result |= CPU_AVX;
427 if (_cpuid_info.sef_cpuid7_ebx.bits.avx2 != 0) 424 if (_cpuid_info.sef_cpuid7_ebx.bits.avx2 != 0)
428 result |= CPU_AVX2; 425 result |= CPU_AVX2;
429 } 426 }
430 if(_cpuid_info.sef_cpuid7_ebx.bits.bmi1 != 0)
431 result |= CPU_BMI1;
432 if (_cpuid_info.std_cpuid1_edx.bits.tsc != 0) 427 if (_cpuid_info.std_cpuid1_edx.bits.tsc != 0)
433 result |= CPU_TSC; 428 result |= CPU_TSC;
434 if (_cpuid_info.ext_cpuid7_edx.bits.tsc_invariance != 0) 429 if (_cpuid_info.ext_cpuid7_edx.bits.tsc_invariance != 0)
435 result |= CPU_TSCINV; 430 result |= CPU_TSCINV;
436 if (_cpuid_info.std_cpuid1_ecx.bits.aes != 0) 431 if (_cpuid_info.std_cpuid1_ecx.bits.aes != 0)
447 result |= CPU_3DNOW_PREFETCH; 442 result |= CPU_3DNOW_PREFETCH;
448 if (_cpuid_info.ext_cpuid1_ecx.bits.lzcnt != 0) 443 if (_cpuid_info.ext_cpuid1_ecx.bits.lzcnt != 0)
449 result |= CPU_LZCNT; 444 result |= CPU_LZCNT;
450 if (_cpuid_info.ext_cpuid1_ecx.bits.sse4a != 0) 445 if (_cpuid_info.ext_cpuid1_ecx.bits.sse4a != 0)
451 result |= CPU_SSE4A; 446 result |= CPU_SSE4A;
452 }
453 // Intel features.
454 if(is_intel()) {
455 if(_cpuid_info.sef_cpuid7_ebx.bits.bmi2 != 0)
456 result |= CPU_BMI2;
457 if(_cpuid_info.ext_cpuid1_ecx.bits.lzcnt_intel != 0)
458 result |= CPU_LZCNT;
459 } 447 }
460 448
461 return result; 449 return result;
462 } 450 }
463 451
571 static bool supports_avx2() { return (_cpuFeatures & CPU_AVX2) != 0; } 559 static bool supports_avx2() { return (_cpuFeatures & CPU_AVX2) != 0; }
572 static bool supports_tsc() { return (_cpuFeatures & CPU_TSC) != 0; } 560 static bool supports_tsc() { return (_cpuFeatures & CPU_TSC) != 0; }
573 static bool supports_aes() { return (_cpuFeatures & CPU_AES) != 0; } 561 static bool supports_aes() { return (_cpuFeatures & CPU_AES) != 0; }
574 static bool supports_erms() { return (_cpuFeatures & CPU_ERMS) != 0; } 562 static bool supports_erms() { return (_cpuFeatures & CPU_ERMS) != 0; }
575 static bool supports_clmul() { return (_cpuFeatures & CPU_CLMUL) != 0; } 563 static bool supports_clmul() { return (_cpuFeatures & CPU_CLMUL) != 0; }
576 static bool supports_bmi1() { return (_cpuFeatures & CPU_BMI1) != 0; } 564
577 static bool supports_bmi2() { return (_cpuFeatures & CPU_BMI2) != 0; }
578 // Intel features 565 // Intel features
579 static bool is_intel_family_core() { return is_intel() && 566 static bool is_intel_family_core() { return is_intel() &&
580 extended_cpu_family() == CPU_FAMILY_INTEL_CORE; } 567 extended_cpu_family() == CPU_FAMILY_INTEL_CORE; }
581 568
582 static bool is_intel_tsc_synched_at_init() { 569 static bool is_intel_tsc_synched_at_init() {