Mercurial > hg > truffle
annotate src/share/vm/opto/matcher.cpp @ 729:04fa5affa478
6709742: find_base_for_derived's use of Ideal NULL is unsafe causing crashes during register allocation
Summary: Create a mach node corresponding to ideal node ConP #NULL specifically for derived pointers.
Reviewed-by: never
author | kvn |
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date | Wed, 22 Apr 2009 17:03:18 -0700 |
parents | fbde8ec322d0 |
children | 14367225a853 |
rev | line source |
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0 | 1 /* |
579 | 2 * Copyright 1997-2009 Sun Microsystems, Inc. All Rights Reserved. |
0 | 3 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. |
4 * | |
5 * This code is free software; you can redistribute it and/or modify it | |
6 * under the terms of the GNU General Public License version 2 only, as | |
7 * published by the Free Software Foundation. | |
8 * | |
9 * This code is distributed in the hope that it will be useful, but WITHOUT | |
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or | |
11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License | |
12 * version 2 for more details (a copy is included in the LICENSE file that | |
13 * accompanied this code). | |
14 * | |
15 * You should have received a copy of the GNU General Public License version | |
16 * 2 along with this work; if not, write to the Free Software Foundation, | |
17 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA. | |
18 * | |
19 * Please contact Sun Microsystems, Inc., 4150 Network Circle, Santa Clara, | |
20 * CA 95054 USA or visit www.sun.com if you need additional information or | |
21 * have any questions. | |
22 * | |
23 */ | |
24 | |
25 #include "incls/_precompiled.incl" | |
26 #include "incls/_matcher.cpp.incl" | |
27 | |
28 OptoReg::Name OptoReg::c_frame_pointer; | |
29 | |
30 | |
31 | |
32 const int Matcher::base2reg[Type::lastype] = { | |
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33 Node::NotAMachineReg,0,0, Op_RegI, Op_RegL, 0, Op_RegN, |
0 | 34 Node::NotAMachineReg, Node::NotAMachineReg, /* tuple, array */ |
35 Op_RegP, Op_RegP, Op_RegP, Op_RegP, Op_RegP, Op_RegP, /* the pointers */ | |
36 0, 0/*abio*/, | |
37 Op_RegP /* Return address */, 0, /* the memories */ | |
38 Op_RegF, Op_RegF, Op_RegF, Op_RegD, Op_RegD, Op_RegD, | |
39 0 /*bottom*/ | |
40 }; | |
41 | |
42 const RegMask *Matcher::idealreg2regmask[_last_machine_leaf]; | |
43 RegMask Matcher::mreg2regmask[_last_Mach_Reg]; | |
44 RegMask Matcher::STACK_ONLY_mask; | |
45 RegMask Matcher::c_frame_ptr_mask; | |
46 const uint Matcher::_begin_rematerialize = _BEGIN_REMATERIALIZE; | |
47 const uint Matcher::_end_rematerialize = _END_REMATERIALIZE; | |
48 | |
49 //---------------------------Matcher------------------------------------------- | |
50 Matcher::Matcher( Node_List &proj_list ) : | |
51 PhaseTransform( Phase::Ins_Select ), | |
52 #ifdef ASSERT | |
53 _old2new_map(C->comp_arena()), | |
222 | 54 _new2old_map(C->comp_arena()), |
0 | 55 #endif |
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56 _shared_nodes(C->comp_arena()), |
0 | 57 _reduceOp(reduceOp), _leftOp(leftOp), _rightOp(rightOp), |
58 _swallowed(swallowed), | |
59 _begin_inst_chain_rule(_BEGIN_INST_CHAIN_RULE), | |
60 _end_inst_chain_rule(_END_INST_CHAIN_RULE), | |
61 _must_clone(must_clone), _proj_list(proj_list), | |
62 _register_save_policy(register_save_policy), | |
63 _c_reg_save_policy(c_reg_save_policy), | |
64 _register_save_type(register_save_type), | |
65 _ruleName(ruleName), | |
66 _allocation_started(false), | |
67 _states_arena(Chunk::medium_size), | |
68 _visited(&_states_arena), | |
69 _shared(&_states_arena), | |
70 _dontcare(&_states_arena) { | |
71 C->set_matcher(this); | |
72 | |
73 idealreg2spillmask[Op_RegI] = NULL; | |
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74 idealreg2spillmask[Op_RegN] = NULL; |
0 | 75 idealreg2spillmask[Op_RegL] = NULL; |
76 idealreg2spillmask[Op_RegF] = NULL; | |
77 idealreg2spillmask[Op_RegD] = NULL; | |
78 idealreg2spillmask[Op_RegP] = NULL; | |
79 | |
80 idealreg2debugmask[Op_RegI] = NULL; | |
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81 idealreg2debugmask[Op_RegN] = NULL; |
0 | 82 idealreg2debugmask[Op_RegL] = NULL; |
83 idealreg2debugmask[Op_RegF] = NULL; | |
84 idealreg2debugmask[Op_RegD] = NULL; | |
85 idealreg2debugmask[Op_RegP] = NULL; | |
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86 debug_only(_mem_node = NULL;) // Ideal memory node consumed by mach node |
0 | 87 } |
88 | |
89 //------------------------------warp_incoming_stk_arg------------------------ | |
90 // This warps a VMReg into an OptoReg::Name | |
91 OptoReg::Name Matcher::warp_incoming_stk_arg( VMReg reg ) { | |
92 OptoReg::Name warped; | |
93 if( reg->is_stack() ) { // Stack slot argument? | |
94 warped = OptoReg::add(_old_SP, reg->reg2stack() ); | |
95 warped = OptoReg::add(warped, C->out_preserve_stack_slots()); | |
96 if( warped >= _in_arg_limit ) | |
97 _in_arg_limit = OptoReg::add(warped, 1); // Bump max stack slot seen | |
98 if (!RegMask::can_represent(warped)) { | |
99 // the compiler cannot represent this method's calling sequence | |
100 C->record_method_not_compilable_all_tiers("unsupported incoming calling sequence"); | |
101 return OptoReg::Bad; | |
102 } | |
103 return warped; | |
104 } | |
105 return OptoReg::as_OptoReg(reg); | |
106 } | |
107 | |
108 //---------------------------compute_old_SP------------------------------------ | |
109 OptoReg::Name Compile::compute_old_SP() { | |
110 int fixed = fixed_slots(); | |
111 int preserve = in_preserve_stack_slots(); | |
112 return OptoReg::stack2reg(round_to(fixed + preserve, Matcher::stack_alignment_in_slots())); | |
113 } | |
114 | |
115 | |
116 | |
117 #ifdef ASSERT | |
118 void Matcher::verify_new_nodes_only(Node* xroot) { | |
119 // Make sure that the new graph only references new nodes | |
120 ResourceMark rm; | |
121 Unique_Node_List worklist; | |
122 VectorSet visited(Thread::current()->resource_area()); | |
123 worklist.push(xroot); | |
124 while (worklist.size() > 0) { | |
125 Node* n = worklist.pop(); | |
126 visited <<= n->_idx; | |
127 assert(C->node_arena()->contains(n), "dead node"); | |
128 for (uint j = 0; j < n->req(); j++) { | |
129 Node* in = n->in(j); | |
130 if (in != NULL) { | |
131 assert(C->node_arena()->contains(in), "dead node"); | |
132 if (!visited.test(in->_idx)) { | |
133 worklist.push(in); | |
134 } | |
135 } | |
136 } | |
137 } | |
138 } | |
139 #endif | |
140 | |
141 | |
142 //---------------------------match--------------------------------------------- | |
143 void Matcher::match( ) { | |
144 // One-time initialization of some register masks. | |
145 init_spill_mask( C->root()->in(1) ); | |
146 _return_addr_mask = return_addr(); | |
147 #ifdef _LP64 | |
148 // Pointers take 2 slots in 64-bit land | |
149 _return_addr_mask.Insert(OptoReg::add(return_addr(),1)); | |
150 #endif | |
151 | |
152 // Map a Java-signature return type into return register-value | |
153 // machine registers for 0, 1 and 2 returned values. | |
154 const TypeTuple *range = C->tf()->range(); | |
155 if( range->cnt() > TypeFunc::Parms ) { // If not a void function | |
156 // Get ideal-register return type | |
157 int ireg = base2reg[range->field_at(TypeFunc::Parms)->base()]; | |
158 // Get machine return register | |
159 uint sop = C->start()->Opcode(); | |
160 OptoRegPair regs = return_value(ireg, false); | |
161 | |
162 // And mask for same | |
163 _return_value_mask = RegMask(regs.first()); | |
164 if( OptoReg::is_valid(regs.second()) ) | |
165 _return_value_mask.Insert(regs.second()); | |
166 } | |
167 | |
168 // --------------- | |
169 // Frame Layout | |
170 | |
171 // Need the method signature to determine the incoming argument types, | |
172 // because the types determine which registers the incoming arguments are | |
173 // in, and this affects the matched code. | |
174 const TypeTuple *domain = C->tf()->domain(); | |
175 uint argcnt = domain->cnt() - TypeFunc::Parms; | |
176 BasicType *sig_bt = NEW_RESOURCE_ARRAY( BasicType, argcnt ); | |
177 VMRegPair *vm_parm_regs = NEW_RESOURCE_ARRAY( VMRegPair, argcnt ); | |
178 _parm_regs = NEW_RESOURCE_ARRAY( OptoRegPair, argcnt ); | |
179 _calling_convention_mask = NEW_RESOURCE_ARRAY( RegMask, argcnt ); | |
180 uint i; | |
181 for( i = 0; i<argcnt; i++ ) { | |
182 sig_bt[i] = domain->field_at(i+TypeFunc::Parms)->basic_type(); | |
183 } | |
184 | |
185 // Pass array of ideal registers and length to USER code (from the AD file) | |
186 // that will convert this to an array of register numbers. | |
187 const StartNode *start = C->start(); | |
188 start->calling_convention( sig_bt, vm_parm_regs, argcnt ); | |
189 #ifdef ASSERT | |
190 // Sanity check users' calling convention. Real handy while trying to | |
191 // get the initial port correct. | |
192 { for (uint i = 0; i<argcnt; i++) { | |
193 if( !vm_parm_regs[i].first()->is_valid() && !vm_parm_regs[i].second()->is_valid() ) { | |
194 assert(domain->field_at(i+TypeFunc::Parms)==Type::HALF, "only allowed on halve" ); | |
195 _parm_regs[i].set_bad(); | |
196 continue; | |
197 } | |
198 VMReg parm_reg = vm_parm_regs[i].first(); | |
199 assert(parm_reg->is_valid(), "invalid arg?"); | |
200 if (parm_reg->is_reg()) { | |
201 OptoReg::Name opto_parm_reg = OptoReg::as_OptoReg(parm_reg); | |
202 assert(can_be_java_arg(opto_parm_reg) || | |
203 C->stub_function() == CAST_FROM_FN_PTR(address, OptoRuntime::rethrow_C) || | |
204 opto_parm_reg == inline_cache_reg(), | |
205 "parameters in register must be preserved by runtime stubs"); | |
206 } | |
207 for (uint j = 0; j < i; j++) { | |
208 assert(parm_reg != vm_parm_regs[j].first(), | |
209 "calling conv. must produce distinct regs"); | |
210 } | |
211 } | |
212 } | |
213 #endif | |
214 | |
215 // Do some initial frame layout. | |
216 | |
217 // Compute the old incoming SP (may be called FP) as | |
218 // OptoReg::stack0() + locks + in_preserve_stack_slots + pad2. | |
219 _old_SP = C->compute_old_SP(); | |
220 assert( is_even(_old_SP), "must be even" ); | |
221 | |
222 // Compute highest incoming stack argument as | |
223 // _old_SP + out_preserve_stack_slots + incoming argument size. | |
224 _in_arg_limit = OptoReg::add(_old_SP, C->out_preserve_stack_slots()); | |
225 assert( is_even(_in_arg_limit), "out_preserve must be even" ); | |
226 for( i = 0; i < argcnt; i++ ) { | |
227 // Permit args to have no register | |
228 _calling_convention_mask[i].Clear(); | |
229 if( !vm_parm_regs[i].first()->is_valid() && !vm_parm_regs[i].second()->is_valid() ) { | |
230 continue; | |
231 } | |
232 // calling_convention returns stack arguments as a count of | |
233 // slots beyond OptoReg::stack0()/VMRegImpl::stack0. We need to convert this to | |
234 // the allocators point of view, taking into account all the | |
235 // preserve area, locks & pad2. | |
236 | |
237 OptoReg::Name reg1 = warp_incoming_stk_arg(vm_parm_regs[i].first()); | |
238 if( OptoReg::is_valid(reg1)) | |
239 _calling_convention_mask[i].Insert(reg1); | |
240 | |
241 OptoReg::Name reg2 = warp_incoming_stk_arg(vm_parm_regs[i].second()); | |
242 if( OptoReg::is_valid(reg2)) | |
243 _calling_convention_mask[i].Insert(reg2); | |
244 | |
245 // Saved biased stack-slot register number | |
246 _parm_regs[i].set_pair(reg2, reg1); | |
247 } | |
248 | |
249 // Finally, make sure the incoming arguments take up an even number of | |
250 // words, in case the arguments or locals need to contain doubleword stack | |
251 // slots. The rest of the system assumes that stack slot pairs (in | |
252 // particular, in the spill area) which look aligned will in fact be | |
253 // aligned relative to the stack pointer in the target machine. Double | |
254 // stack slots will always be allocated aligned. | |
255 _new_SP = OptoReg::Name(round_to(_in_arg_limit, RegMask::SlotsPerLong)); | |
256 | |
257 // Compute highest outgoing stack argument as | |
258 // _new_SP + out_preserve_stack_slots + max(outgoing argument size). | |
259 _out_arg_limit = OptoReg::add(_new_SP, C->out_preserve_stack_slots()); | |
260 assert( is_even(_out_arg_limit), "out_preserve must be even" ); | |
261 | |
262 if (!RegMask::can_represent(OptoReg::add(_out_arg_limit,-1))) { | |
263 // the compiler cannot represent this method's calling sequence | |
264 C->record_method_not_compilable("must be able to represent all call arguments in reg mask"); | |
265 } | |
266 | |
267 if (C->failing()) return; // bailed out on incoming arg failure | |
268 | |
269 // --------------- | |
270 // Collect roots of matcher trees. Every node for which | |
271 // _shared[_idx] is cleared is guaranteed to not be shared, and thus | |
272 // can be a valid interior of some tree. | |
273 find_shared( C->root() ); | |
274 find_shared( C->top() ); | |
275 | |
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276 C->print_method("Before Matching"); |
0 | 277 |
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278 // Create new ideal node ConP #NULL even if it does exist in old space |
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279 // to avoid false sharing if the corresponding mach node is not used. |
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280 // The corresponding mach node is only used in rare cases for derived |
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281 // pointers. |
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282 Node* new_ideal_null = ConNode::make(C, TypePtr::NULL_PTR); |
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283 |
0 | 284 // Swap out to old-space; emptying new-space |
285 Arena *old = C->node_arena()->move_contents(C->old_arena()); | |
286 | |
287 // Save debug and profile information for nodes in old space: | |
288 _old_node_note_array = C->node_note_array(); | |
289 if (_old_node_note_array != NULL) { | |
290 C->set_node_note_array(new(C->comp_arena()) GrowableArray<Node_Notes*> | |
291 (C->comp_arena(), _old_node_note_array->length(), | |
292 0, NULL)); | |
293 } | |
294 | |
295 // Pre-size the new_node table to avoid the need for range checks. | |
296 grow_new_node_array(C->unique()); | |
297 | |
298 // Reset node counter so MachNodes start with _idx at 0 | |
299 int nodes = C->unique(); // save value | |
300 C->set_unique(0); | |
301 | |
302 // Recursively match trees from old space into new space. | |
303 // Correct leaves of new-space Nodes; they point to old-space. | |
304 _visited.Clear(); // Clear visit bits for xform call | |
305 C->set_cached_top_node(xform( C->top(), nodes )); | |
306 if (!C->failing()) { | |
307 Node* xroot = xform( C->root(), 1 ); | |
308 if (xroot == NULL) { | |
309 Matcher::soft_match_failure(); // recursive matching process failed | |
310 C->record_method_not_compilable("instruction match failed"); | |
311 } else { | |
312 // During matching shared constants were attached to C->root() | |
313 // because xroot wasn't available yet, so transfer the uses to | |
314 // the xroot. | |
315 for( DUIterator_Fast jmax, j = C->root()->fast_outs(jmax); j < jmax; j++ ) { | |
316 Node* n = C->root()->fast_out(j); | |
317 if (C->node_arena()->contains(n)) { | |
318 assert(n->in(0) == C->root(), "should be control user"); | |
319 n->set_req(0, xroot); | |
320 --j; | |
321 --jmax; | |
322 } | |
323 } | |
324 | |
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325 // Generate new mach node for ConP #NULL |
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326 assert(new_ideal_null != NULL, "sanity"); |
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327 _mach_null = match_tree(new_ideal_null); |
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328 // Don't set control, it will confuse GCM since there are no uses. |
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329 // The control will be set when this node is used first time |
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330 // in find_base_for_derived(). |
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331 assert(_mach_null != NULL, ""); |
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332 |
0 | 333 C->set_root(xroot->is_Root() ? xroot->as_Root() : NULL); |
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334 |
0 | 335 #ifdef ASSERT |
336 verify_new_nodes_only(xroot); | |
337 #endif | |
338 } | |
339 } | |
340 if (C->top() == NULL || C->root() == NULL) { | |
341 C->record_method_not_compilable("graph lost"); // %%% cannot happen? | |
342 } | |
343 if (C->failing()) { | |
344 // delete old; | |
345 old->destruct_contents(); | |
346 return; | |
347 } | |
348 assert( C->top(), "" ); | |
349 assert( C->root(), "" ); | |
350 validate_null_checks(); | |
351 | |
352 // Now smoke old-space | |
353 NOT_DEBUG( old->destruct_contents() ); | |
354 | |
355 // ------------------------ | |
356 // Set up save-on-entry registers | |
357 Fixup_Save_On_Entry( ); | |
358 } | |
359 | |
360 | |
361 //------------------------------Fixup_Save_On_Entry---------------------------- | |
362 // The stated purpose of this routine is to take care of save-on-entry | |
363 // registers. However, the overall goal of the Match phase is to convert into | |
364 // machine-specific instructions which have RegMasks to guide allocation. | |
365 // So what this procedure really does is put a valid RegMask on each input | |
366 // to the machine-specific variations of all Return, TailCall and Halt | |
367 // instructions. It also adds edgs to define the save-on-entry values (and of | |
368 // course gives them a mask). | |
369 | |
370 static RegMask *init_input_masks( uint size, RegMask &ret_adr, RegMask &fp ) { | |
371 RegMask *rms = NEW_RESOURCE_ARRAY( RegMask, size ); | |
372 // Do all the pre-defined register masks | |
373 rms[TypeFunc::Control ] = RegMask::Empty; | |
374 rms[TypeFunc::I_O ] = RegMask::Empty; | |
375 rms[TypeFunc::Memory ] = RegMask::Empty; | |
376 rms[TypeFunc::ReturnAdr] = ret_adr; | |
377 rms[TypeFunc::FramePtr ] = fp; | |
378 return rms; | |
379 } | |
380 | |
381 //---------------------------init_first_stack_mask----------------------------- | |
382 // Create the initial stack mask used by values spilling to the stack. | |
383 // Disallow any debug info in outgoing argument areas by setting the | |
384 // initial mask accordingly. | |
385 void Matcher::init_first_stack_mask() { | |
386 | |
387 // Allocate storage for spill masks as masks for the appropriate load type. | |
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388 RegMask *rms = (RegMask*)C->comp_arena()->Amalloc_D(sizeof(RegMask)*12); |
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389 idealreg2spillmask[Op_RegN] = &rms[0]; |
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390 idealreg2spillmask[Op_RegI] = &rms[1]; |
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391 idealreg2spillmask[Op_RegL] = &rms[2]; |
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392 idealreg2spillmask[Op_RegF] = &rms[3]; |
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393 idealreg2spillmask[Op_RegD] = &rms[4]; |
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394 idealreg2spillmask[Op_RegP] = &rms[5]; |
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395 idealreg2debugmask[Op_RegN] = &rms[6]; |
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396 idealreg2debugmask[Op_RegI] = &rms[7]; |
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397 idealreg2debugmask[Op_RegL] = &rms[8]; |
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398 idealreg2debugmask[Op_RegF] = &rms[9]; |
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399 idealreg2debugmask[Op_RegD] = &rms[10]; |
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400 idealreg2debugmask[Op_RegP] = &rms[11]; |
0 | 401 |
402 OptoReg::Name i; | |
403 | |
404 // At first, start with the empty mask | |
405 C->FIRST_STACK_mask().Clear(); | |
406 | |
407 // Add in the incoming argument area | |
408 OptoReg::Name init = OptoReg::add(_old_SP, C->out_preserve_stack_slots()); | |
409 for (i = init; i < _in_arg_limit; i = OptoReg::add(i,1)) | |
410 C->FIRST_STACK_mask().Insert(i); | |
411 | |
412 // Add in all bits past the outgoing argument area | |
413 guarantee(RegMask::can_represent(OptoReg::add(_out_arg_limit,-1)), | |
414 "must be able to represent all call arguments in reg mask"); | |
415 init = _out_arg_limit; | |
416 for (i = init; RegMask::can_represent(i); i = OptoReg::add(i,1)) | |
417 C->FIRST_STACK_mask().Insert(i); | |
418 | |
419 // Finally, set the "infinite stack" bit. | |
420 C->FIRST_STACK_mask().set_AllStack(); | |
421 | |
422 // Make spill masks. Registers for their class, plus FIRST_STACK_mask. | |
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423 #ifdef _LP64 |
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424 *idealreg2spillmask[Op_RegN] = *idealreg2regmask[Op_RegN]; |
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425 idealreg2spillmask[Op_RegN]->OR(C->FIRST_STACK_mask()); |
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426 #endif |
0 | 427 *idealreg2spillmask[Op_RegI] = *idealreg2regmask[Op_RegI]; |
428 idealreg2spillmask[Op_RegI]->OR(C->FIRST_STACK_mask()); | |
429 *idealreg2spillmask[Op_RegL] = *idealreg2regmask[Op_RegL]; | |
430 idealreg2spillmask[Op_RegL]->OR(C->FIRST_STACK_mask()); | |
431 *idealreg2spillmask[Op_RegF] = *idealreg2regmask[Op_RegF]; | |
432 idealreg2spillmask[Op_RegF]->OR(C->FIRST_STACK_mask()); | |
433 *idealreg2spillmask[Op_RegD] = *idealreg2regmask[Op_RegD]; | |
434 idealreg2spillmask[Op_RegD]->OR(C->FIRST_STACK_mask()); | |
435 *idealreg2spillmask[Op_RegP] = *idealreg2regmask[Op_RegP]; | |
436 idealreg2spillmask[Op_RegP]->OR(C->FIRST_STACK_mask()); | |
437 | |
438 // Make up debug masks. Any spill slot plus callee-save registers. | |
439 // Caller-save registers are assumed to be trashable by the various | |
440 // inline-cache fixup routines. | |
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441 *idealreg2debugmask[Op_RegN]= *idealreg2spillmask[Op_RegN]; |
0 | 442 *idealreg2debugmask[Op_RegI]= *idealreg2spillmask[Op_RegI]; |
443 *idealreg2debugmask[Op_RegL]= *idealreg2spillmask[Op_RegL]; | |
444 *idealreg2debugmask[Op_RegF]= *idealreg2spillmask[Op_RegF]; | |
445 *idealreg2debugmask[Op_RegD]= *idealreg2spillmask[Op_RegD]; | |
446 *idealreg2debugmask[Op_RegP]= *idealreg2spillmask[Op_RegP]; | |
447 | |
448 // Prevent stub compilations from attempting to reference | |
449 // callee-saved registers from debug info | |
450 bool exclude_soe = !Compile::current()->is_method_compilation(); | |
451 | |
452 for( i=OptoReg::Name(0); i<OptoReg::Name(_last_Mach_Reg); i = OptoReg::add(i,1) ) { | |
453 // registers the caller has to save do not work | |
454 if( _register_save_policy[i] == 'C' || | |
455 _register_save_policy[i] == 'A' || | |
456 (_register_save_policy[i] == 'E' && exclude_soe) ) { | |
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457 idealreg2debugmask[Op_RegN]->Remove(i); |
0 | 458 idealreg2debugmask[Op_RegI]->Remove(i); // Exclude save-on-call |
459 idealreg2debugmask[Op_RegL]->Remove(i); // registers from debug | |
460 idealreg2debugmask[Op_RegF]->Remove(i); // masks | |
461 idealreg2debugmask[Op_RegD]->Remove(i); | |
462 idealreg2debugmask[Op_RegP]->Remove(i); | |
463 } | |
464 } | |
465 } | |
466 | |
467 //---------------------------is_save_on_entry---------------------------------- | |
468 bool Matcher::is_save_on_entry( int reg ) { | |
469 return | |
470 _register_save_policy[reg] == 'E' || | |
471 _register_save_policy[reg] == 'A' || // Save-on-entry register? | |
472 // Also save argument registers in the trampolining stubs | |
473 (C->save_argument_registers() && is_spillable_arg(reg)); | |
474 } | |
475 | |
476 //---------------------------Fixup_Save_On_Entry------------------------------- | |
477 void Matcher::Fixup_Save_On_Entry( ) { | |
478 init_first_stack_mask(); | |
479 | |
480 Node *root = C->root(); // Short name for root | |
481 // Count number of save-on-entry registers. | |
482 uint soe_cnt = number_of_saved_registers(); | |
483 uint i; | |
484 | |
485 // Find the procedure Start Node | |
486 StartNode *start = C->start(); | |
487 assert( start, "Expect a start node" ); | |
488 | |
489 // Save argument registers in the trampolining stubs | |
490 if( C->save_argument_registers() ) | |
491 for( i = 0; i < _last_Mach_Reg; i++ ) | |
492 if( is_spillable_arg(i) ) | |
493 soe_cnt++; | |
494 | |
495 // Input RegMask array shared by all Returns. | |
496 // The type for doubles and longs has a count of 2, but | |
497 // there is only 1 returned value | |
498 uint ret_edge_cnt = TypeFunc::Parms + ((C->tf()->range()->cnt() == TypeFunc::Parms) ? 0 : 1); | |
499 RegMask *ret_rms = init_input_masks( ret_edge_cnt + soe_cnt, _return_addr_mask, c_frame_ptr_mask ); | |
500 // Returns have 0 or 1 returned values depending on call signature. | |
501 // Return register is specified by return_value in the AD file. | |
502 if (ret_edge_cnt > TypeFunc::Parms) | |
503 ret_rms[TypeFunc::Parms+0] = _return_value_mask; | |
504 | |
505 // Input RegMask array shared by all Rethrows. | |
506 uint reth_edge_cnt = TypeFunc::Parms+1; | |
507 RegMask *reth_rms = init_input_masks( reth_edge_cnt + soe_cnt, _return_addr_mask, c_frame_ptr_mask ); | |
508 // Rethrow takes exception oop only, but in the argument 0 slot. | |
509 reth_rms[TypeFunc::Parms] = mreg2regmask[find_receiver(false)]; | |
510 #ifdef _LP64 | |
511 // Need two slots for ptrs in 64-bit land | |
512 reth_rms[TypeFunc::Parms].Insert(OptoReg::add(OptoReg::Name(find_receiver(false)),1)); | |
513 #endif | |
514 | |
515 // Input RegMask array shared by all TailCalls | |
516 uint tail_call_edge_cnt = TypeFunc::Parms+2; | |
517 RegMask *tail_call_rms = init_input_masks( tail_call_edge_cnt + soe_cnt, _return_addr_mask, c_frame_ptr_mask ); | |
518 | |
519 // Input RegMask array shared by all TailJumps | |
520 uint tail_jump_edge_cnt = TypeFunc::Parms+2; | |
521 RegMask *tail_jump_rms = init_input_masks( tail_jump_edge_cnt + soe_cnt, _return_addr_mask, c_frame_ptr_mask ); | |
522 | |
523 // TailCalls have 2 returned values (target & moop), whose masks come | |
524 // from the usual MachNode/MachOper mechanism. Find a sample | |
525 // TailCall to extract these masks and put the correct masks into | |
526 // the tail_call_rms array. | |
527 for( i=1; i < root->req(); i++ ) { | |
528 MachReturnNode *m = root->in(i)->as_MachReturn(); | |
529 if( m->ideal_Opcode() == Op_TailCall ) { | |
530 tail_call_rms[TypeFunc::Parms+0] = m->MachNode::in_RegMask(TypeFunc::Parms+0); | |
531 tail_call_rms[TypeFunc::Parms+1] = m->MachNode::in_RegMask(TypeFunc::Parms+1); | |
532 break; | |
533 } | |
534 } | |
535 | |
536 // TailJumps have 2 returned values (target & ex_oop), whose masks come | |
537 // from the usual MachNode/MachOper mechanism. Find a sample | |
538 // TailJump to extract these masks and put the correct masks into | |
539 // the tail_jump_rms array. | |
540 for( i=1; i < root->req(); i++ ) { | |
541 MachReturnNode *m = root->in(i)->as_MachReturn(); | |
542 if( m->ideal_Opcode() == Op_TailJump ) { | |
543 tail_jump_rms[TypeFunc::Parms+0] = m->MachNode::in_RegMask(TypeFunc::Parms+0); | |
544 tail_jump_rms[TypeFunc::Parms+1] = m->MachNode::in_RegMask(TypeFunc::Parms+1); | |
545 break; | |
546 } | |
547 } | |
548 | |
549 // Input RegMask array shared by all Halts | |
550 uint halt_edge_cnt = TypeFunc::Parms; | |
551 RegMask *halt_rms = init_input_masks( halt_edge_cnt + soe_cnt, _return_addr_mask, c_frame_ptr_mask ); | |
552 | |
553 // Capture the return input masks into each exit flavor | |
554 for( i=1; i < root->req(); i++ ) { | |
555 MachReturnNode *exit = root->in(i)->as_MachReturn(); | |
556 switch( exit->ideal_Opcode() ) { | |
557 case Op_Return : exit->_in_rms = ret_rms; break; | |
558 case Op_Rethrow : exit->_in_rms = reth_rms; break; | |
559 case Op_TailCall : exit->_in_rms = tail_call_rms; break; | |
560 case Op_TailJump : exit->_in_rms = tail_jump_rms; break; | |
561 case Op_Halt : exit->_in_rms = halt_rms; break; | |
562 default : ShouldNotReachHere(); | |
563 } | |
564 } | |
565 | |
566 // Next unused projection number from Start. | |
567 int proj_cnt = C->tf()->domain()->cnt(); | |
568 | |
569 // Do all the save-on-entry registers. Make projections from Start for | |
570 // them, and give them a use at the exit points. To the allocator, they | |
571 // look like incoming register arguments. | |
572 for( i = 0; i < _last_Mach_Reg; i++ ) { | |
573 if( is_save_on_entry(i) ) { | |
574 | |
575 // Add the save-on-entry to the mask array | |
576 ret_rms [ ret_edge_cnt] = mreg2regmask[i]; | |
577 reth_rms [ reth_edge_cnt] = mreg2regmask[i]; | |
578 tail_call_rms[tail_call_edge_cnt] = mreg2regmask[i]; | |
579 tail_jump_rms[tail_jump_edge_cnt] = mreg2regmask[i]; | |
580 // Halts need the SOE registers, but only in the stack as debug info. | |
581 // A just-prior uncommon-trap or deoptimization will use the SOE regs. | |
582 halt_rms [ halt_edge_cnt] = *idealreg2spillmask[_register_save_type[i]]; | |
583 | |
584 Node *mproj; | |
585 | |
586 // Is this a RegF low half of a RegD? Double up 2 adjacent RegF's | |
587 // into a single RegD. | |
588 if( (i&1) == 0 && | |
589 _register_save_type[i ] == Op_RegF && | |
590 _register_save_type[i+1] == Op_RegF && | |
591 is_save_on_entry(i+1) ) { | |
592 // Add other bit for double | |
593 ret_rms [ ret_edge_cnt].Insert(OptoReg::Name(i+1)); | |
594 reth_rms [ reth_edge_cnt].Insert(OptoReg::Name(i+1)); | |
595 tail_call_rms[tail_call_edge_cnt].Insert(OptoReg::Name(i+1)); | |
596 tail_jump_rms[tail_jump_edge_cnt].Insert(OptoReg::Name(i+1)); | |
597 halt_rms [ halt_edge_cnt].Insert(OptoReg::Name(i+1)); | |
598 mproj = new (C, 1) MachProjNode( start, proj_cnt, ret_rms[ret_edge_cnt], Op_RegD ); | |
599 proj_cnt += 2; // Skip 2 for doubles | |
600 } | |
601 else if( (i&1) == 1 && // Else check for high half of double | |
602 _register_save_type[i-1] == Op_RegF && | |
603 _register_save_type[i ] == Op_RegF && | |
604 is_save_on_entry(i-1) ) { | |
605 ret_rms [ ret_edge_cnt] = RegMask::Empty; | |
606 reth_rms [ reth_edge_cnt] = RegMask::Empty; | |
607 tail_call_rms[tail_call_edge_cnt] = RegMask::Empty; | |
608 tail_jump_rms[tail_jump_edge_cnt] = RegMask::Empty; | |
609 halt_rms [ halt_edge_cnt] = RegMask::Empty; | |
610 mproj = C->top(); | |
611 } | |
612 // Is this a RegI low half of a RegL? Double up 2 adjacent RegI's | |
613 // into a single RegL. | |
614 else if( (i&1) == 0 && | |
615 _register_save_type[i ] == Op_RegI && | |
616 _register_save_type[i+1] == Op_RegI && | |
617 is_save_on_entry(i+1) ) { | |
618 // Add other bit for long | |
619 ret_rms [ ret_edge_cnt].Insert(OptoReg::Name(i+1)); | |
620 reth_rms [ reth_edge_cnt].Insert(OptoReg::Name(i+1)); | |
621 tail_call_rms[tail_call_edge_cnt].Insert(OptoReg::Name(i+1)); | |
622 tail_jump_rms[tail_jump_edge_cnt].Insert(OptoReg::Name(i+1)); | |
623 halt_rms [ halt_edge_cnt].Insert(OptoReg::Name(i+1)); | |
624 mproj = new (C, 1) MachProjNode( start, proj_cnt, ret_rms[ret_edge_cnt], Op_RegL ); | |
625 proj_cnt += 2; // Skip 2 for longs | |
626 } | |
627 else if( (i&1) == 1 && // Else check for high half of long | |
628 _register_save_type[i-1] == Op_RegI && | |
629 _register_save_type[i ] == Op_RegI && | |
630 is_save_on_entry(i-1) ) { | |
631 ret_rms [ ret_edge_cnt] = RegMask::Empty; | |
632 reth_rms [ reth_edge_cnt] = RegMask::Empty; | |
633 tail_call_rms[tail_call_edge_cnt] = RegMask::Empty; | |
634 tail_jump_rms[tail_jump_edge_cnt] = RegMask::Empty; | |
635 halt_rms [ halt_edge_cnt] = RegMask::Empty; | |
636 mproj = C->top(); | |
637 } else { | |
638 // Make a projection for it off the Start | |
639 mproj = new (C, 1) MachProjNode( start, proj_cnt++, ret_rms[ret_edge_cnt], _register_save_type[i] ); | |
640 } | |
641 | |
642 ret_edge_cnt ++; | |
643 reth_edge_cnt ++; | |
644 tail_call_edge_cnt ++; | |
645 tail_jump_edge_cnt ++; | |
646 halt_edge_cnt ++; | |
647 | |
648 // Add a use of the SOE register to all exit paths | |
649 for( uint j=1; j < root->req(); j++ ) | |
650 root->in(j)->add_req(mproj); | |
651 } // End of if a save-on-entry register | |
652 } // End of for all machine registers | |
653 } | |
654 | |
655 //------------------------------init_spill_mask-------------------------------- | |
656 void Matcher::init_spill_mask( Node *ret ) { | |
657 if( idealreg2regmask[Op_RegI] ) return; // One time only init | |
658 | |
659 OptoReg::c_frame_pointer = c_frame_pointer(); | |
660 c_frame_ptr_mask = c_frame_pointer(); | |
661 #ifdef _LP64 | |
662 // pointers are twice as big | |
663 c_frame_ptr_mask.Insert(OptoReg::add(c_frame_pointer(),1)); | |
664 #endif | |
665 | |
666 // Start at OptoReg::stack0() | |
667 STACK_ONLY_mask.Clear(); | |
668 OptoReg::Name init = OptoReg::stack2reg(0); | |
669 // STACK_ONLY_mask is all stack bits | |
670 OptoReg::Name i; | |
671 for (i = init; RegMask::can_represent(i); i = OptoReg::add(i,1)) | |
672 STACK_ONLY_mask.Insert(i); | |
673 // Also set the "infinite stack" bit. | |
674 STACK_ONLY_mask.set_AllStack(); | |
675 | |
676 // Copy the register names over into the shared world | |
677 for( i=OptoReg::Name(0); i<OptoReg::Name(_last_Mach_Reg); i = OptoReg::add(i,1) ) { | |
678 // SharedInfo::regName[i] = regName[i]; | |
679 // Handy RegMasks per machine register | |
680 mreg2regmask[i].Insert(i); | |
681 } | |
682 | |
683 // Grab the Frame Pointer | |
684 Node *fp = ret->in(TypeFunc::FramePtr); | |
685 Node *mem = ret->in(TypeFunc::Memory); | |
686 const TypePtr* atp = TypePtr::BOTTOM; | |
687 // Share frame pointer while making spill ops | |
688 set_shared(fp); | |
689 | |
690 // Compute generic short-offset Loads | |
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691 #ifdef _LP64 |
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692 MachNode *spillCP = match_tree(new (C, 3) LoadNNode(NULL,mem,fp,atp,TypeInstPtr::BOTTOM)); |
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693 #endif |
0 | 694 MachNode *spillI = match_tree(new (C, 3) LoadINode(NULL,mem,fp,atp)); |
695 MachNode *spillL = match_tree(new (C, 3) LoadLNode(NULL,mem,fp,atp)); | |
696 MachNode *spillF = match_tree(new (C, 3) LoadFNode(NULL,mem,fp,atp)); | |
697 MachNode *spillD = match_tree(new (C, 3) LoadDNode(NULL,mem,fp,atp)); | |
698 MachNode *spillP = match_tree(new (C, 3) LoadPNode(NULL,mem,fp,atp,TypeInstPtr::BOTTOM)); | |
699 assert(spillI != NULL && spillL != NULL && spillF != NULL && | |
700 spillD != NULL && spillP != NULL, ""); | |
701 | |
702 // Get the ADLC notion of the right regmask, for each basic type. | |
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703 #ifdef _LP64 |
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704 idealreg2regmask[Op_RegN] = &spillCP->out_RegMask(); |
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705 #endif |
0 | 706 idealreg2regmask[Op_RegI] = &spillI->out_RegMask(); |
707 idealreg2regmask[Op_RegL] = &spillL->out_RegMask(); | |
708 idealreg2regmask[Op_RegF] = &spillF->out_RegMask(); | |
709 idealreg2regmask[Op_RegD] = &spillD->out_RegMask(); | |
710 idealreg2regmask[Op_RegP] = &spillP->out_RegMask(); | |
711 } | |
712 | |
713 #ifdef ASSERT | |
714 static void match_alias_type(Compile* C, Node* n, Node* m) { | |
715 if (!VerifyAliases) return; // do not go looking for trouble by default | |
716 const TypePtr* nat = n->adr_type(); | |
717 const TypePtr* mat = m->adr_type(); | |
718 int nidx = C->get_alias_index(nat); | |
719 int midx = C->get_alias_index(mat); | |
720 // Detune the assert for cases like (AndI 0xFF (LoadB p)). | |
721 if (nidx == Compile::AliasIdxTop && midx >= Compile::AliasIdxRaw) { | |
722 for (uint i = 1; i < n->req(); i++) { | |
723 Node* n1 = n->in(i); | |
724 const TypePtr* n1at = n1->adr_type(); | |
725 if (n1at != NULL) { | |
726 nat = n1at; | |
727 nidx = C->get_alias_index(n1at); | |
728 } | |
729 } | |
730 } | |
731 // %%% Kludgery. Instead, fix ideal adr_type methods for all these cases: | |
732 if (nidx == Compile::AliasIdxTop && midx == Compile::AliasIdxRaw) { | |
733 switch (n->Opcode()) { | |
734 case Op_PrefetchRead: | |
735 case Op_PrefetchWrite: | |
736 nidx = Compile::AliasIdxRaw; | |
737 nat = TypeRawPtr::BOTTOM; | |
738 break; | |
739 } | |
740 } | |
741 if (nidx == Compile::AliasIdxRaw && midx == Compile::AliasIdxTop) { | |
742 switch (n->Opcode()) { | |
743 case Op_ClearArray: | |
744 midx = Compile::AliasIdxRaw; | |
745 mat = TypeRawPtr::BOTTOM; | |
746 break; | |
747 } | |
748 } | |
749 if (nidx == Compile::AliasIdxTop && midx == Compile::AliasIdxBot) { | |
750 switch (n->Opcode()) { | |
751 case Op_Return: | |
752 case Op_Rethrow: | |
753 case Op_Halt: | |
754 case Op_TailCall: | |
755 case Op_TailJump: | |
756 nidx = Compile::AliasIdxBot; | |
757 nat = TypePtr::BOTTOM; | |
758 break; | |
759 } | |
760 } | |
761 if (nidx == Compile::AliasIdxBot && midx == Compile::AliasIdxTop) { | |
762 switch (n->Opcode()) { | |
763 case Op_StrComp: | |
681 | 764 case Op_StrEquals: |
765 case Op_StrIndexOf: | |
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766 case Op_AryEq: |
0 | 767 case Op_MemBarVolatile: |
768 case Op_MemBarCPUOrder: // %%% these ideals should have narrower adr_type? | |
769 nidx = Compile::AliasIdxTop; | |
770 nat = NULL; | |
771 break; | |
772 } | |
773 } | |
774 if (nidx != midx) { | |
775 if (PrintOpto || (PrintMiscellaneous && (WizardMode || Verbose))) { | |
776 tty->print_cr("==== Matcher alias shift %d => %d", nidx, midx); | |
777 n->dump(); | |
778 m->dump(); | |
779 } | |
780 assert(C->subsume_loads() && C->must_alias(nat, midx), | |
781 "must not lose alias info when matching"); | |
782 } | |
783 } | |
784 #endif | |
785 | |
786 | |
787 //------------------------------MStack----------------------------------------- | |
788 // State and MStack class used in xform() and find_shared() iterative methods. | |
789 enum Node_State { Pre_Visit, // node has to be pre-visited | |
790 Visit, // visit node | |
791 Post_Visit, // post-visit node | |
792 Alt_Post_Visit // alternative post-visit path | |
793 }; | |
794 | |
795 class MStack: public Node_Stack { | |
796 public: | |
797 MStack(int size) : Node_Stack(size) { } | |
798 | |
799 void push(Node *n, Node_State ns) { | |
800 Node_Stack::push(n, (uint)ns); | |
801 } | |
802 void push(Node *n, Node_State ns, Node *parent, int indx) { | |
803 ++_inode_top; | |
804 if ((_inode_top + 1) >= _inode_max) grow(); | |
805 _inode_top->node = parent; | |
806 _inode_top->indx = (uint)indx; | |
807 ++_inode_top; | |
808 _inode_top->node = n; | |
809 _inode_top->indx = (uint)ns; | |
810 } | |
811 Node *parent() { | |
812 pop(); | |
813 return node(); | |
814 } | |
815 Node_State state() const { | |
816 return (Node_State)index(); | |
817 } | |
818 void set_state(Node_State ns) { | |
819 set_index((uint)ns); | |
820 } | |
821 }; | |
822 | |
823 | |
824 //------------------------------xform------------------------------------------ | |
825 // Given a Node in old-space, Match him (Label/Reduce) to produce a machine | |
826 // Node in new-space. Given a new-space Node, recursively walk his children. | |
827 Node *Matcher::transform( Node *n ) { ShouldNotCallThis(); return n; } | |
828 Node *Matcher::xform( Node *n, int max_stack ) { | |
829 // Use one stack to keep both: child's node/state and parent's node/index | |
830 MStack mstack(max_stack * 2 * 2); // C->unique() * 2 * 2 | |
831 mstack.push(n, Visit, NULL, -1); // set NULL as parent to indicate root | |
832 | |
833 while (mstack.is_nonempty()) { | |
834 n = mstack.node(); // Leave node on stack | |
835 Node_State nstate = mstack.state(); | |
836 if (nstate == Visit) { | |
837 mstack.set_state(Post_Visit); | |
838 Node *oldn = n; | |
839 // Old-space or new-space check | |
840 if (!C->node_arena()->contains(n)) { | |
841 // Old space! | |
842 Node* m; | |
843 if (has_new_node(n)) { // Not yet Label/Reduced | |
844 m = new_node(n); | |
845 } else { | |
846 if (!is_dontcare(n)) { // Matcher can match this guy | |
847 // Calls match special. They match alone with no children. | |
848 // Their children, the incoming arguments, match normally. | |
849 m = n->is_SafePoint() ? match_sfpt(n->as_SafePoint()):match_tree(n); | |
850 if (C->failing()) return NULL; | |
851 if (m == NULL) { Matcher::soft_match_failure(); return NULL; } | |
852 } else { // Nothing the matcher cares about | |
853 if( n->is_Proj() && n->in(0)->is_Multi()) { // Projections? | |
854 // Convert to machine-dependent projection | |
855 m = n->in(0)->as_Multi()->match( n->as_Proj(), this ); | |
222 | 856 #ifdef ASSERT |
857 _new2old_map.map(m->_idx, n); | |
858 #endif | |
0 | 859 if (m->in(0) != NULL) // m might be top |
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860 collect_null_checks(m, n); |
0 | 861 } else { // Else just a regular 'ol guy |
862 m = n->clone(); // So just clone into new-space | |
222 | 863 #ifdef ASSERT |
864 _new2old_map.map(m->_idx, n); | |
865 #endif | |
0 | 866 // Def-Use edges will be added incrementally as Uses |
867 // of this node are matched. | |
868 assert(m->outcnt() == 0, "no Uses of this clone yet"); | |
869 } | |
870 } | |
871 | |
872 set_new_node(n, m); // Map old to new | |
873 if (_old_node_note_array != NULL) { | |
874 Node_Notes* nn = C->locate_node_notes(_old_node_note_array, | |
875 n->_idx); | |
876 C->set_node_notes_at(m->_idx, nn); | |
877 } | |
878 debug_only(match_alias_type(C, n, m)); | |
879 } | |
880 n = m; // n is now a new-space node | |
881 mstack.set_node(n); | |
882 } | |
883 | |
884 // New space! | |
885 if (_visited.test_set(n->_idx)) continue; // while(mstack.is_nonempty()) | |
886 | |
887 int i; | |
888 // Put precedence edges on stack first (match them last). | |
889 for (i = oldn->req(); (uint)i < oldn->len(); i++) { | |
890 Node *m = oldn->in(i); | |
891 if (m == NULL) break; | |
892 // set -1 to call add_prec() instead of set_req() during Step1 | |
893 mstack.push(m, Visit, n, -1); | |
894 } | |
895 | |
896 // For constant debug info, I'd rather have unmatched constants. | |
897 int cnt = n->req(); | |
898 JVMState* jvms = n->jvms(); | |
899 int debug_cnt = jvms ? jvms->debug_start() : cnt; | |
900 | |
901 // Now do only debug info. Clone constants rather than matching. | |
902 // Constants are represented directly in the debug info without | |
903 // the need for executable machine instructions. | |
904 // Monitor boxes are also represented directly. | |
905 for (i = cnt - 1; i >= debug_cnt; --i) { // For all debug inputs do | |
906 Node *m = n->in(i); // Get input | |
907 int op = m->Opcode(); | |
908 assert((op == Op_BoxLock) == jvms->is_monitor_use(i), "boxes only at monitor sites"); | |
163 | 909 if( op == Op_ConI || op == Op_ConP || op == Op_ConN || |
0 | 910 op == Op_ConF || op == Op_ConD || op == Op_ConL |
911 // || op == Op_BoxLock // %%%% enable this and remove (+++) in chaitin.cpp | |
912 ) { | |
913 m = m->clone(); | |
222 | 914 #ifdef ASSERT |
915 _new2old_map.map(m->_idx, n); | |
916 #endif | |
605 | 917 mstack.push(m, Post_Visit, n, i); // Don't need to visit |
0 | 918 mstack.push(m->in(0), Visit, m, 0); |
919 } else { | |
920 mstack.push(m, Visit, n, i); | |
921 } | |
922 } | |
923 | |
924 // And now walk his children, and convert his inputs to new-space. | |
925 for( ; i >= 0; --i ) { // For all normal inputs do | |
926 Node *m = n->in(i); // Get input | |
927 if(m != NULL) | |
928 mstack.push(m, Visit, n, i); | |
929 } | |
930 | |
931 } | |
932 else if (nstate == Post_Visit) { | |
933 // Set xformed input | |
934 Node *p = mstack.parent(); | |
935 if (p != NULL) { // root doesn't have parent | |
936 int i = (int)mstack.index(); | |
937 if (i >= 0) | |
938 p->set_req(i, n); // required input | |
939 else if (i == -1) | |
940 p->add_prec(n); // precedence input | |
941 else | |
942 ShouldNotReachHere(); | |
943 } | |
944 mstack.pop(); // remove processed node from stack | |
945 } | |
946 else { | |
947 ShouldNotReachHere(); | |
948 } | |
949 } // while (mstack.is_nonempty()) | |
950 return n; // Return new-space Node | |
951 } | |
952 | |
953 //------------------------------warp_outgoing_stk_arg------------------------ | |
954 OptoReg::Name Matcher::warp_outgoing_stk_arg( VMReg reg, OptoReg::Name begin_out_arg_area, OptoReg::Name &out_arg_limit_per_call ) { | |
955 // Convert outgoing argument location to a pre-biased stack offset | |
956 if (reg->is_stack()) { | |
957 OptoReg::Name warped = reg->reg2stack(); | |
958 // Adjust the stack slot offset to be the register number used | |
959 // by the allocator. | |
960 warped = OptoReg::add(begin_out_arg_area, warped); | |
961 // Keep track of the largest numbered stack slot used for an arg. | |
962 // Largest used slot per call-site indicates the amount of stack | |
963 // that is killed by the call. | |
964 if( warped >= out_arg_limit_per_call ) | |
965 out_arg_limit_per_call = OptoReg::add(warped,1); | |
966 if (!RegMask::can_represent(warped)) { | |
967 C->record_method_not_compilable_all_tiers("unsupported calling sequence"); | |
968 return OptoReg::Bad; | |
969 } | |
970 return warped; | |
971 } | |
972 return OptoReg::as_OptoReg(reg); | |
973 } | |
974 | |
975 | |
976 //------------------------------match_sfpt------------------------------------- | |
977 // Helper function to match call instructions. Calls match special. | |
978 // They match alone with no children. Their children, the incoming | |
979 // arguments, match normally. | |
980 MachNode *Matcher::match_sfpt( SafePointNode *sfpt ) { | |
981 MachSafePointNode *msfpt = NULL; | |
982 MachCallNode *mcall = NULL; | |
983 uint cnt; | |
984 // Split out case for SafePoint vs Call | |
985 CallNode *call; | |
986 const TypeTuple *domain; | |
987 ciMethod* method = NULL; | |
988 if( sfpt->is_Call() ) { | |
989 call = sfpt->as_Call(); | |
990 domain = call->tf()->domain(); | |
991 cnt = domain->cnt(); | |
992 | |
993 // Match just the call, nothing else | |
994 MachNode *m = match_tree(call); | |
995 if (C->failing()) return NULL; | |
996 if( m == NULL ) { Matcher::soft_match_failure(); return NULL; } | |
997 | |
998 // Copy data from the Ideal SafePoint to the machine version | |
999 mcall = m->as_MachCall(); | |
1000 | |
1001 mcall->set_tf( call->tf()); | |
1002 mcall->set_entry_point(call->entry_point()); | |
1003 mcall->set_cnt( call->cnt()); | |
1004 | |
1005 if( mcall->is_MachCallJava() ) { | |
1006 MachCallJavaNode *mcall_java = mcall->as_MachCallJava(); | |
1007 const CallJavaNode *call_java = call->as_CallJava(); | |
1008 method = call_java->method(); | |
1009 mcall_java->_method = method; | |
1010 mcall_java->_bci = call_java->_bci; | |
1011 mcall_java->_optimized_virtual = call_java->is_optimized_virtual(); | |
1012 if( mcall_java->is_MachCallStaticJava() ) | |
1013 mcall_java->as_MachCallStaticJava()->_name = | |
1014 call_java->as_CallStaticJava()->_name; | |
1015 if( mcall_java->is_MachCallDynamicJava() ) | |
1016 mcall_java->as_MachCallDynamicJava()->_vtable_index = | |
1017 call_java->as_CallDynamicJava()->_vtable_index; | |
1018 } | |
1019 else if( mcall->is_MachCallRuntime() ) { | |
1020 mcall->as_MachCallRuntime()->_name = call->as_CallRuntime()->_name; | |
1021 } | |
1022 msfpt = mcall; | |
1023 } | |
1024 // This is a non-call safepoint | |
1025 else { | |
1026 call = NULL; | |
1027 domain = NULL; | |
1028 MachNode *mn = match_tree(sfpt); | |
1029 if (C->failing()) return NULL; | |
1030 msfpt = mn->as_MachSafePoint(); | |
1031 cnt = TypeFunc::Parms; | |
1032 } | |
1033 | |
1034 // Advertise the correct memory effects (for anti-dependence computation). | |
1035 msfpt->set_adr_type(sfpt->adr_type()); | |
1036 | |
1037 // Allocate a private array of RegMasks. These RegMasks are not shared. | |
1038 msfpt->_in_rms = NEW_RESOURCE_ARRAY( RegMask, cnt ); | |
1039 // Empty them all. | |
1040 memset( msfpt->_in_rms, 0, sizeof(RegMask)*cnt ); | |
1041 | |
1042 // Do all the pre-defined non-Empty register masks | |
1043 msfpt->_in_rms[TypeFunc::ReturnAdr] = _return_addr_mask; | |
1044 msfpt->_in_rms[TypeFunc::FramePtr ] = c_frame_ptr_mask; | |
1045 | |
1046 // Place first outgoing argument can possibly be put. | |
1047 OptoReg::Name begin_out_arg_area = OptoReg::add(_new_SP, C->out_preserve_stack_slots()); | |
1048 assert( is_even(begin_out_arg_area), "" ); | |
1049 // Compute max outgoing register number per call site. | |
1050 OptoReg::Name out_arg_limit_per_call = begin_out_arg_area; | |
1051 // Calls to C may hammer extra stack slots above and beyond any arguments. | |
1052 // These are usually backing store for register arguments for varargs. | |
1053 if( call != NULL && call->is_CallRuntime() ) | |
1054 out_arg_limit_per_call = OptoReg::add(out_arg_limit_per_call,C->varargs_C_out_slots_killed()); | |
1055 | |
1056 | |
1057 // Do the normal argument list (parameters) register masks | |
1058 int argcnt = cnt - TypeFunc::Parms; | |
1059 if( argcnt > 0 ) { // Skip it all if we have no args | |
1060 BasicType *sig_bt = NEW_RESOURCE_ARRAY( BasicType, argcnt ); | |
1061 VMRegPair *parm_regs = NEW_RESOURCE_ARRAY( VMRegPair, argcnt ); | |
1062 int i; | |
1063 for( i = 0; i < argcnt; i++ ) { | |
1064 sig_bt[i] = domain->field_at(i+TypeFunc::Parms)->basic_type(); | |
1065 } | |
1066 // V-call to pick proper calling convention | |
1067 call->calling_convention( sig_bt, parm_regs, argcnt ); | |
1068 | |
1069 #ifdef ASSERT | |
1070 // Sanity check users' calling convention. Really handy during | |
1071 // the initial porting effort. Fairly expensive otherwise. | |
1072 { for (int i = 0; i<argcnt; i++) { | |
1073 if( !parm_regs[i].first()->is_valid() && | |
1074 !parm_regs[i].second()->is_valid() ) continue; | |
1075 VMReg reg1 = parm_regs[i].first(); | |
1076 VMReg reg2 = parm_regs[i].second(); | |
1077 for (int j = 0; j < i; j++) { | |
1078 if( !parm_regs[j].first()->is_valid() && | |
1079 !parm_regs[j].second()->is_valid() ) continue; | |
1080 VMReg reg3 = parm_regs[j].first(); | |
1081 VMReg reg4 = parm_regs[j].second(); | |
1082 if( !reg1->is_valid() ) { | |
1083 assert( !reg2->is_valid(), "valid halvsies" ); | |
1084 } else if( !reg3->is_valid() ) { | |
1085 assert( !reg4->is_valid(), "valid halvsies" ); | |
1086 } else { | |
1087 assert( reg1 != reg2, "calling conv. must produce distinct regs"); | |
1088 assert( reg1 != reg3, "calling conv. must produce distinct regs"); | |
1089 assert( reg1 != reg4, "calling conv. must produce distinct regs"); | |
1090 assert( reg2 != reg3, "calling conv. must produce distinct regs"); | |
1091 assert( reg2 != reg4 || !reg2->is_valid(), "calling conv. must produce distinct regs"); | |
1092 assert( reg3 != reg4, "calling conv. must produce distinct regs"); | |
1093 } | |
1094 } | |
1095 } | |
1096 } | |
1097 #endif | |
1098 | |
1099 // Visit each argument. Compute its outgoing register mask. | |
1100 // Return results now can have 2 bits returned. | |
1101 // Compute max over all outgoing arguments both per call-site | |
1102 // and over the entire method. | |
1103 for( i = 0; i < argcnt; i++ ) { | |
1104 // Address of incoming argument mask to fill in | |
1105 RegMask *rm = &mcall->_in_rms[i+TypeFunc::Parms]; | |
1106 if( !parm_regs[i].first()->is_valid() && | |
1107 !parm_regs[i].second()->is_valid() ) { | |
1108 continue; // Avoid Halves | |
1109 } | |
1110 // Grab first register, adjust stack slots and insert in mask. | |
1111 OptoReg::Name reg1 = warp_outgoing_stk_arg(parm_regs[i].first(), begin_out_arg_area, out_arg_limit_per_call ); | |
1112 if (OptoReg::is_valid(reg1)) | |
1113 rm->Insert( reg1 ); | |
1114 // Grab second register (if any), adjust stack slots and insert in mask. | |
1115 OptoReg::Name reg2 = warp_outgoing_stk_arg(parm_regs[i].second(), begin_out_arg_area, out_arg_limit_per_call ); | |
1116 if (OptoReg::is_valid(reg2)) | |
1117 rm->Insert( reg2 ); | |
1118 } // End of for all arguments | |
1119 | |
1120 // Compute number of stack slots needed to restore stack in case of | |
1121 // Pascal-style argument popping. | |
1122 mcall->_argsize = out_arg_limit_per_call - begin_out_arg_area; | |
1123 } | |
1124 | |
1125 // Compute the max stack slot killed by any call. These will not be | |
1126 // available for debug info, and will be used to adjust FIRST_STACK_mask | |
1127 // after all call sites have been visited. | |
1128 if( _out_arg_limit < out_arg_limit_per_call) | |
1129 _out_arg_limit = out_arg_limit_per_call; | |
1130 | |
1131 if (mcall) { | |
1132 // Kill the outgoing argument area, including any non-argument holes and | |
1133 // any legacy C-killed slots. Use Fat-Projections to do the killing. | |
1134 // Since the max-per-method covers the max-per-call-site and debug info | |
1135 // is excluded on the max-per-method basis, debug info cannot land in | |
1136 // this killed area. | |
1137 uint r_cnt = mcall->tf()->range()->cnt(); | |
1138 MachProjNode *proj = new (C, 1) MachProjNode( mcall, r_cnt+10000, RegMask::Empty, MachProjNode::fat_proj ); | |
1139 if (!RegMask::can_represent(OptoReg::Name(out_arg_limit_per_call-1))) { | |
1140 C->record_method_not_compilable_all_tiers("unsupported outgoing calling sequence"); | |
1141 } else { | |
1142 for (int i = begin_out_arg_area; i < out_arg_limit_per_call; i++) | |
1143 proj->_rout.Insert(OptoReg::Name(i)); | |
1144 } | |
1145 if( proj->_rout.is_NotEmpty() ) | |
1146 _proj_list.push(proj); | |
1147 } | |
1148 // Transfer the safepoint information from the call to the mcall | |
1149 // Move the JVMState list | |
1150 msfpt->set_jvms(sfpt->jvms()); | |
1151 for (JVMState* jvms = msfpt->jvms(); jvms; jvms = jvms->caller()) { | |
1152 jvms->set_map(sfpt); | |
1153 } | |
1154 | |
1155 // Debug inputs begin just after the last incoming parameter | |
1156 assert( (mcall == NULL) || (mcall->jvms() == NULL) || | |
1157 (mcall->jvms()->debug_start() + mcall->_jvmadj == mcall->tf()->domain()->cnt()), "" ); | |
1158 | |
1159 // Move the OopMap | |
1160 msfpt->_oop_map = sfpt->_oop_map; | |
1161 | |
1162 // Registers killed by the call are set in the local scheduling pass | |
1163 // of Global Code Motion. | |
1164 return msfpt; | |
1165 } | |
1166 | |
1167 //---------------------------match_tree---------------------------------------- | |
1168 // Match a Ideal Node DAG - turn it into a tree; Label & Reduce. Used as part | |
1169 // of the whole-sale conversion from Ideal to Mach Nodes. Also used for | |
1170 // making GotoNodes while building the CFG and in init_spill_mask() to identify | |
1171 // a Load's result RegMask for memoization in idealreg2regmask[] | |
1172 MachNode *Matcher::match_tree( const Node *n ) { | |
1173 assert( n->Opcode() != Op_Phi, "cannot match" ); | |
1174 assert( !n->is_block_start(), "cannot match" ); | |
1175 // Set the mark for all locally allocated State objects. | |
1176 // When this call returns, the _states_arena arena will be reset | |
1177 // freeing all State objects. | |
1178 ResourceMark rm( &_states_arena ); | |
1179 | |
1180 LabelRootDepth = 0; | |
1181 | |
1182 // StoreNodes require their Memory input to match any LoadNodes | |
1183 Node *mem = n->is_Store() ? n->in(MemNode::Memory) : (Node*)1 ; | |
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1184 #ifdef ASSERT |
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1185 Node* save_mem_node = _mem_node; |
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1186 _mem_node = n->is_Store() ? (Node*)n : NULL; |
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1187 #endif |
0 | 1188 // State object for root node of match tree |
1189 // Allocate it on _states_arena - stack allocation can cause stack overflow. | |
1190 State *s = new (&_states_arena) State; | |
1191 s->_kids[0] = NULL; | |
1192 s->_kids[1] = NULL; | |
1193 s->_leaf = (Node*)n; | |
1194 // Label the input tree, allocating labels from top-level arena | |
1195 Label_Root( n, s, n->in(0), mem ); | |
1196 if (C->failing()) return NULL; | |
1197 | |
1198 // The minimum cost match for the whole tree is found at the root State | |
1199 uint mincost = max_juint; | |
1200 uint cost = max_juint; | |
1201 uint i; | |
1202 for( i = 0; i < NUM_OPERANDS; i++ ) { | |
1203 if( s->valid(i) && // valid entry and | |
1204 s->_cost[i] < cost && // low cost and | |
1205 s->_rule[i] >= NUM_OPERANDS ) // not an operand | |
1206 cost = s->_cost[mincost=i]; | |
1207 } | |
1208 if (mincost == max_juint) { | |
1209 #ifndef PRODUCT | |
1210 tty->print("No matching rule for:"); | |
1211 s->dump(); | |
1212 #endif | |
1213 Matcher::soft_match_failure(); | |
1214 return NULL; | |
1215 } | |
1216 // Reduce input tree based upon the state labels to machine Nodes | |
1217 MachNode *m = ReduceInst( s, s->_rule[mincost], mem ); | |
1218 #ifdef ASSERT | |
1219 _old2new_map.map(n->_idx, m); | |
222 | 1220 _new2old_map.map(m->_idx, (Node*)n); |
0 | 1221 #endif |
1222 | |
1223 // Add any Matcher-ignored edges | |
1224 uint cnt = n->req(); | |
1225 uint start = 1; | |
1226 if( mem != (Node*)1 ) start = MemNode::Memory+1; | |
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1227 if( n->is_AddP() ) { |
0 | 1228 assert( mem == (Node*)1, "" ); |
1229 start = AddPNode::Base+1; | |
1230 } | |
1231 for( i = start; i < cnt; i++ ) { | |
1232 if( !n->match_edge(i) ) { | |
1233 if( i < m->req() ) | |
1234 m->ins_req( i, n->in(i) ); | |
1235 else | |
1236 m->add_req( n->in(i) ); | |
1237 } | |
1238 } | |
1239 | |
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1240 debug_only( _mem_node = save_mem_node; ) |
0 | 1241 return m; |
1242 } | |
1243 | |
1244 | |
1245 //------------------------------match_into_reg--------------------------------- | |
1246 // Choose to either match this Node in a register or part of the current | |
1247 // match tree. Return true for requiring a register and false for matching | |
1248 // as part of the current match tree. | |
1249 static bool match_into_reg( const Node *n, Node *m, Node *control, int i, bool shared ) { | |
1250 | |
1251 const Type *t = m->bottom_type(); | |
1252 | |
1253 if( t->singleton() ) { | |
1254 // Never force constants into registers. Allow them to match as | |
1255 // constants or registers. Copies of the same value will share | |
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1256 // the same register. See find_shared_node. |
0 | 1257 return false; |
1258 } else { // Not a constant | |
1259 // Stop recursion if they have different Controls. | |
1260 // Slot 0 of constants is not really a Control. | |
1261 if( control && m->in(0) && control != m->in(0) ) { | |
1262 | |
1263 // Actually, we can live with the most conservative control we | |
1264 // find, if it post-dominates the others. This allows us to | |
1265 // pick up load/op/store trees where the load can float a little | |
1266 // above the store. | |
1267 Node *x = control; | |
1268 const uint max_scan = 6; // Arbitrary scan cutoff | |
1269 uint j; | |
1270 for( j=0; j<max_scan; j++ ) { | |
1271 if( x->is_Region() ) // Bail out at merge points | |
1272 return true; | |
1273 x = x->in(0); | |
1274 if( x == m->in(0) ) // Does 'control' post-dominate | |
1275 break; // m->in(0)? If so, we can use it | |
1276 } | |
1277 if( j == max_scan ) // No post-domination before scan end? | |
1278 return true; // Then break the match tree up | |
1279 } | |
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1280 if (m->is_DecodeN() && Matcher::clone_shift_expressions) { |
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1281 // These are commonly used in address expressions and can |
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1282 // efficiently fold into them on X64 in some cases. |
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1283 return false; |
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1284 } |
0 | 1285 } |
1286 | |
605 | 1287 // Not forceable cloning. If shared, put it into a register. |
0 | 1288 return shared; |
1289 } | |
1290 | |
1291 | |
1292 //------------------------------Instruction Selection-------------------------- | |
1293 // Label method walks a "tree" of nodes, using the ADLC generated DFA to match | |
1294 // ideal nodes to machine instructions. Trees are delimited by shared Nodes, | |
1295 // things the Matcher does not match (e.g., Memory), and things with different | |
1296 // Controls (hence forced into different blocks). We pass in the Control | |
1297 // selected for this entire State tree. | |
1298 | |
1299 // The Matcher works on Trees, but an Intel add-to-memory requires a DAG: the | |
1300 // Store and the Load must have identical Memories (as well as identical | |
1301 // pointers). Since the Matcher does not have anything for Memory (and | |
1302 // does not handle DAGs), I have to match the Memory input myself. If the | |
1303 // Tree root is a Store, I require all Loads to have the identical memory. | |
1304 Node *Matcher::Label_Root( const Node *n, State *svec, Node *control, const Node *mem){ | |
1305 // Since Label_Root is a recursive function, its possible that we might run | |
1306 // out of stack space. See bugs 6272980 & 6227033 for more info. | |
1307 LabelRootDepth++; | |
1308 if (LabelRootDepth > MaxLabelRootDepth) { | |
1309 C->record_method_not_compilable_all_tiers("Out of stack space, increase MaxLabelRootDepth"); | |
1310 return NULL; | |
1311 } | |
1312 uint care = 0; // Edges matcher cares about | |
1313 uint cnt = n->req(); | |
1314 uint i = 0; | |
1315 | |
1316 // Examine children for memory state | |
1317 // Can only subsume a child into your match-tree if that child's memory state | |
1318 // is not modified along the path to another input. | |
1319 // It is unsafe even if the other inputs are separate roots. | |
1320 Node *input_mem = NULL; | |
1321 for( i = 1; i < cnt; i++ ) { | |
1322 if( !n->match_edge(i) ) continue; | |
1323 Node *m = n->in(i); // Get ith input | |
1324 assert( m, "expect non-null children" ); | |
1325 if( m->is_Load() ) { | |
1326 if( input_mem == NULL ) { | |
1327 input_mem = m->in(MemNode::Memory); | |
1328 } else if( input_mem != m->in(MemNode::Memory) ) { | |
1329 input_mem = NodeSentinel; | |
1330 } | |
1331 } | |
1332 } | |
1333 | |
1334 for( i = 1; i < cnt; i++ ){// For my children | |
1335 if( !n->match_edge(i) ) continue; | |
1336 Node *m = n->in(i); // Get ith input | |
1337 // Allocate states out of a private arena | |
1338 State *s = new (&_states_arena) State; | |
1339 svec->_kids[care++] = s; | |
1340 assert( care <= 2, "binary only for now" ); | |
1341 | |
1342 // Recursively label the State tree. | |
1343 s->_kids[0] = NULL; | |
1344 s->_kids[1] = NULL; | |
1345 s->_leaf = m; | |
1346 | |
1347 // Check for leaves of the State Tree; things that cannot be a part of | |
1348 // the current tree. If it finds any, that value is matched as a | |
1349 // register operand. If not, then the normal matching is used. | |
1350 if( match_into_reg(n, m, control, i, is_shared(m)) || | |
1351 // | |
1352 // Stop recursion if this is LoadNode and the root of this tree is a | |
1353 // StoreNode and the load & store have different memories. | |
1354 ((mem!=(Node*)1) && m->is_Load() && m->in(MemNode::Memory) != mem) || | |
1355 // Can NOT include the match of a subtree when its memory state | |
1356 // is used by any of the other subtrees | |
1357 (input_mem == NodeSentinel) ) { | |
1358 #ifndef PRODUCT | |
1359 // Print when we exclude matching due to different memory states at input-loads | |
1360 if( PrintOpto && (Verbose && WizardMode) && (input_mem == NodeSentinel) | |
1361 && !((mem!=(Node*)1) && m->is_Load() && m->in(MemNode::Memory) != mem) ) { | |
1362 tty->print_cr("invalid input_mem"); | |
1363 } | |
1364 #endif | |
1365 // Switch to a register-only opcode; this value must be in a register | |
1366 // and cannot be subsumed as part of a larger instruction. | |
1367 s->DFA( m->ideal_reg(), m ); | |
1368 | |
1369 } else { | |
1370 // If match tree has no control and we do, adopt it for entire tree | |
1371 if( control == NULL && m->in(0) != NULL && m->req() > 1 ) | |
1372 control = m->in(0); // Pick up control | |
1373 // Else match as a normal part of the match tree. | |
1374 control = Label_Root(m,s,control,mem); | |
1375 if (C->failing()) return NULL; | |
1376 } | |
1377 } | |
1378 | |
1379 | |
1380 // Call DFA to match this node, and return | |
1381 svec->DFA( n->Opcode(), n ); | |
1382 | |
1383 #ifdef ASSERT | |
1384 uint x; | |
1385 for( x = 0; x < _LAST_MACH_OPER; x++ ) | |
1386 if( svec->valid(x) ) | |
1387 break; | |
1388 | |
1389 if (x >= _LAST_MACH_OPER) { | |
1390 n->dump(); | |
1391 svec->dump(); | |
1392 assert( false, "bad AD file" ); | |
1393 } | |
1394 #endif | |
1395 return control; | |
1396 } | |
1397 | |
1398 | |
1399 // Con nodes reduced using the same rule can share their MachNode | |
1400 // which reduces the number of copies of a constant in the final | |
1401 // program. The register allocator is free to split uses later to | |
1402 // split live ranges. | |
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1403 MachNode* Matcher::find_shared_node(Node* leaf, uint rule) { |
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1404 if (!leaf->is_Con() && !leaf->is_DecodeN()) return NULL; |
0 | 1405 |
1406 // See if this Con has already been reduced using this rule. | |
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1407 if (_shared_nodes.Size() <= leaf->_idx) return NULL; |
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1408 MachNode* last = (MachNode*)_shared_nodes.at(leaf->_idx); |
0 | 1409 if (last != NULL && rule == last->rule()) { |
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1410 // Don't expect control change for DecodeN |
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1411 if (leaf->is_DecodeN()) |
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1412 return last; |
0 | 1413 // Get the new space root. |
1414 Node* xroot = new_node(C->root()); | |
1415 if (xroot == NULL) { | |
1416 // This shouldn't happen give the order of matching. | |
1417 return NULL; | |
1418 } | |
1419 | |
1420 // Shared constants need to have their control be root so they | |
1421 // can be scheduled properly. | |
1422 Node* control = last->in(0); | |
1423 if (control != xroot) { | |
1424 if (control == NULL || control == C->root()) { | |
1425 last->set_req(0, xroot); | |
1426 } else { | |
1427 assert(false, "unexpected control"); | |
1428 return NULL; | |
1429 } | |
1430 } | |
1431 return last; | |
1432 } | |
1433 return NULL; | |
1434 } | |
1435 | |
1436 | |
1437 //------------------------------ReduceInst------------------------------------- | |
1438 // Reduce a State tree (with given Control) into a tree of MachNodes. | |
1439 // This routine (and it's cohort ReduceOper) convert Ideal Nodes into | |
1440 // complicated machine Nodes. Each MachNode covers some tree of Ideal Nodes. | |
1441 // Each MachNode has a number of complicated MachOper operands; each | |
1442 // MachOper also covers a further tree of Ideal Nodes. | |
1443 | |
1444 // The root of the Ideal match tree is always an instruction, so we enter | |
1445 // the recursion here. After building the MachNode, we need to recurse | |
1446 // the tree checking for these cases: | |
1447 // (1) Child is an instruction - | |
1448 // Build the instruction (recursively), add it as an edge. | |
1449 // Build a simple operand (register) to hold the result of the instruction. | |
1450 // (2) Child is an interior part of an instruction - | |
1451 // Skip over it (do nothing) | |
1452 // (3) Child is the start of a operand - | |
1453 // Build the operand, place it inside the instruction | |
1454 // Call ReduceOper. | |
1455 MachNode *Matcher::ReduceInst( State *s, int rule, Node *&mem ) { | |
1456 assert( rule >= NUM_OPERANDS, "called with operand rule" ); | |
1457 | |
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1458 MachNode* shared_node = find_shared_node(s->_leaf, rule); |
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1459 if (shared_node != NULL) { |
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1460 return shared_node; |
0 | 1461 } |
1462 | |
1463 // Build the object to represent this state & prepare for recursive calls | |
1464 MachNode *mach = s->MachNodeGenerator( rule, C ); | |
1465 mach->_opnds[0] = s->MachOperGenerator( _reduceOp[rule], C ); | |
1466 assert( mach->_opnds[0] != NULL, "Missing result operand" ); | |
1467 Node *leaf = s->_leaf; | |
1468 // Check for instruction or instruction chain rule | |
1469 if( rule >= _END_INST_CHAIN_RULE || rule < _BEGIN_INST_CHAIN_RULE ) { | |
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1470 assert(C->node_arena()->contains(s->_leaf) || !has_new_node(s->_leaf), |
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1471 "duplicating node that's already been matched"); |
0 | 1472 // Instruction |
1473 mach->add_req( leaf->in(0) ); // Set initial control | |
1474 // Reduce interior of complex instruction | |
1475 ReduceInst_Interior( s, rule, mem, mach, 1 ); | |
1476 } else { | |
1477 // Instruction chain rules are data-dependent on their inputs | |
1478 mach->add_req(0); // Set initial control to none | |
1479 ReduceInst_Chain_Rule( s, rule, mem, mach ); | |
1480 } | |
1481 | |
1482 // If a Memory was used, insert a Memory edge | |
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1483 if( mem != (Node*)1 ) { |
0 | 1484 mach->ins_req(MemNode::Memory,mem); |
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1485 #ifdef ASSERT |
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1486 // Verify adr type after matching memory operation |
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1487 const MachOper* oper = mach->memory_operand(); |
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1488 if (oper != NULL && oper != (MachOper*)-1 && |
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1489 mach->adr_type() != TypeRawPtr::BOTTOM) { // non-direct addressing mode |
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1490 // It has a unique memory operand. Find corresponding ideal mem node. |
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1491 Node* m = NULL; |
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1492 if (leaf->is_Mem()) { |
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1493 m = leaf; |
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1494 } else { |
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1495 m = _mem_node; |
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1496 assert(m != NULL && m->is_Mem(), "expecting memory node"); |
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1497 } |
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1498 const Type* mach_at = mach->adr_type(); |
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1499 // DecodeN node consumed by an address may have different type |
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1500 // then its input. Don't compare types for such case. |
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1501 if (m->adr_type() != mach_at && |
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1502 (m->in(MemNode::Address)->is_DecodeN() || |
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1503 m->in(MemNode::Address)->is_AddP() && |
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1504 m->in(MemNode::Address)->in(AddPNode::Address)->is_DecodeN() || |
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1505 m->in(MemNode::Address)->is_AddP() && |
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1506 m->in(MemNode::Address)->in(AddPNode::Address)->is_AddP() && |
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1507 m->in(MemNode::Address)->in(AddPNode::Address)->in(AddPNode::Address)->is_DecodeN())) { |
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1508 mach_at = m->adr_type(); |
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1509 } |
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1510 if (m->adr_type() != mach_at) { |
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1511 m->dump(); |
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1512 tty->print_cr("mach:"); |
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1513 mach->dump(1); |
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1514 } |
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1515 assert(m->adr_type() == mach_at, "matcher should not change adr type"); |
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1516 } |
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1517 #endif |
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1518 } |
0 | 1519 |
1520 // If the _leaf is an AddP, insert the base edge | |
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1521 if( leaf->is_AddP() ) |
0 | 1522 mach->ins_req(AddPNode::Base,leaf->in(AddPNode::Base)); |
1523 | |
1524 uint num_proj = _proj_list.size(); | |
1525 | |
1526 // Perform any 1-to-many expansions required | |
1527 MachNode *ex = mach->Expand(s,_proj_list); | |
1528 if( ex != mach ) { | |
1529 assert(ex->ideal_reg() == mach->ideal_reg(), "ideal types should match"); | |
1530 if( ex->in(1)->is_Con() ) | |
1531 ex->in(1)->set_req(0, C->root()); | |
1532 // Remove old node from the graph | |
1533 for( uint i=0; i<mach->req(); i++ ) { | |
1534 mach->set_req(i,NULL); | |
1535 } | |
222 | 1536 #ifdef ASSERT |
1537 _new2old_map.map(ex->_idx, s->_leaf); | |
1538 #endif | |
0 | 1539 } |
1540 | |
1541 // PhaseChaitin::fixup_spills will sometimes generate spill code | |
1542 // via the matcher. By the time, nodes have been wired into the CFG, | |
1543 // and any further nodes generated by expand rules will be left hanging | |
1544 // in space, and will not get emitted as output code. Catch this. | |
1545 // Also, catch any new register allocation constraints ("projections") | |
1546 // generated belatedly during spill code generation. | |
1547 if (_allocation_started) { | |
1548 guarantee(ex == mach, "no expand rules during spill generation"); | |
1549 guarantee(_proj_list.size() == num_proj, "no allocation during spill generation"); | |
1550 } | |
1551 | |
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1552 if (leaf->is_Con() || leaf->is_DecodeN()) { |
0 | 1553 // Record the con for sharing |
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1554 _shared_nodes.map(leaf->_idx, ex); |
0 | 1555 } |
1556 | |
1557 return ex; | |
1558 } | |
1559 | |
1560 void Matcher::ReduceInst_Chain_Rule( State *s, int rule, Node *&mem, MachNode *mach ) { | |
1561 // 'op' is what I am expecting to receive | |
1562 int op = _leftOp[rule]; | |
1563 // Operand type to catch childs result | |
1564 // This is what my child will give me. | |
1565 int opnd_class_instance = s->_rule[op]; | |
1566 // Choose between operand class or not. | |
605 | 1567 // This is what I will receive. |
0 | 1568 int catch_op = (FIRST_OPERAND_CLASS <= op && op < NUM_OPERANDS) ? opnd_class_instance : op; |
1569 // New rule for child. Chase operand classes to get the actual rule. | |
1570 int newrule = s->_rule[catch_op]; | |
1571 | |
1572 if( newrule < NUM_OPERANDS ) { | |
1573 // Chain from operand or operand class, may be output of shared node | |
1574 assert( 0 <= opnd_class_instance && opnd_class_instance < NUM_OPERANDS, | |
1575 "Bad AD file: Instruction chain rule must chain from operand"); | |
1576 // Insert operand into array of operands for this instruction | |
1577 mach->_opnds[1] = s->MachOperGenerator( opnd_class_instance, C ); | |
1578 | |
1579 ReduceOper( s, newrule, mem, mach ); | |
1580 } else { | |
1581 // Chain from the result of an instruction | |
1582 assert( newrule >= _LAST_MACH_OPER, "Do NOT chain from internal operand"); | |
1583 mach->_opnds[1] = s->MachOperGenerator( _reduceOp[catch_op], C ); | |
1584 Node *mem1 = (Node*)1; | |
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1585 debug_only(Node *save_mem_node = _mem_node;) |
0 | 1586 mach->add_req( ReduceInst(s, newrule, mem1) ); |
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1587 debug_only(_mem_node = save_mem_node;) |
0 | 1588 } |
1589 return; | |
1590 } | |
1591 | |
1592 | |
1593 uint Matcher::ReduceInst_Interior( State *s, int rule, Node *&mem, MachNode *mach, uint num_opnds ) { | |
1594 if( s->_leaf->is_Load() ) { | |
1595 Node *mem2 = s->_leaf->in(MemNode::Memory); | |
1596 assert( mem == (Node*)1 || mem == mem2, "multiple Memories being matched at once?" ); | |
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1597 debug_only( if( mem == (Node*)1 ) _mem_node = s->_leaf;) |
0 | 1598 mem = mem2; |
1599 } | |
1600 if( s->_leaf->in(0) != NULL && s->_leaf->req() > 1) { | |
1601 if( mach->in(0) == NULL ) | |
1602 mach->set_req(0, s->_leaf->in(0)); | |
1603 } | |
1604 | |
1605 // Now recursively walk the state tree & add operand list. | |
1606 for( uint i=0; i<2; i++ ) { // binary tree | |
1607 State *newstate = s->_kids[i]; | |
1608 if( newstate == NULL ) break; // Might only have 1 child | |
1609 // 'op' is what I am expecting to receive | |
1610 int op; | |
1611 if( i == 0 ) { | |
1612 op = _leftOp[rule]; | |
1613 } else { | |
1614 op = _rightOp[rule]; | |
1615 } | |
1616 // Operand type to catch childs result | |
1617 // This is what my child will give me. | |
1618 int opnd_class_instance = newstate->_rule[op]; | |
1619 // Choose between operand class or not. | |
1620 // This is what I will receive. | |
1621 int catch_op = (op >= FIRST_OPERAND_CLASS && op < NUM_OPERANDS) ? opnd_class_instance : op; | |
1622 // New rule for child. Chase operand classes to get the actual rule. | |
1623 int newrule = newstate->_rule[catch_op]; | |
1624 | |
1625 if( newrule < NUM_OPERANDS ) { // Operand/operandClass or internalOp/instruction? | |
1626 // Operand/operandClass | |
1627 // Insert operand into array of operands for this instruction | |
1628 mach->_opnds[num_opnds++] = newstate->MachOperGenerator( opnd_class_instance, C ); | |
1629 ReduceOper( newstate, newrule, mem, mach ); | |
1630 | |
1631 } else { // Child is internal operand or new instruction | |
1632 if( newrule < _LAST_MACH_OPER ) { // internal operand or instruction? | |
1633 // internal operand --> call ReduceInst_Interior | |
1634 // Interior of complex instruction. Do nothing but recurse. | |
1635 num_opnds = ReduceInst_Interior( newstate, newrule, mem, mach, num_opnds ); | |
1636 } else { | |
1637 // instruction --> call build operand( ) to catch result | |
1638 // --> ReduceInst( newrule ) | |
1639 mach->_opnds[num_opnds++] = s->MachOperGenerator( _reduceOp[catch_op], C ); | |
1640 Node *mem1 = (Node*)1; | |
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1641 debug_only(Node *save_mem_node = _mem_node;) |
0 | 1642 mach->add_req( ReduceInst( newstate, newrule, mem1 ) ); |
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1643 debug_only(_mem_node = save_mem_node;) |
0 | 1644 } |
1645 } | |
1646 assert( mach->_opnds[num_opnds-1], "" ); | |
1647 } | |
1648 return num_opnds; | |
1649 } | |
1650 | |
1651 // This routine walks the interior of possible complex operands. | |
1652 // At each point we check our children in the match tree: | |
1653 // (1) No children - | |
1654 // We are a leaf; add _leaf field as an input to the MachNode | |
1655 // (2) Child is an internal operand - | |
1656 // Skip over it ( do nothing ) | |
1657 // (3) Child is an instruction - | |
1658 // Call ReduceInst recursively and | |
1659 // and instruction as an input to the MachNode | |
1660 void Matcher::ReduceOper( State *s, int rule, Node *&mem, MachNode *mach ) { | |
1661 assert( rule < _LAST_MACH_OPER, "called with operand rule" ); | |
1662 State *kid = s->_kids[0]; | |
1663 assert( kid == NULL || s->_leaf->in(0) == NULL, "internal operands have no control" ); | |
1664 | |
1665 // Leaf? And not subsumed? | |
1666 if( kid == NULL && !_swallowed[rule] ) { | |
1667 mach->add_req( s->_leaf ); // Add leaf pointer | |
1668 return; // Bail out | |
1669 } | |
1670 | |
1671 if( s->_leaf->is_Load() ) { | |
1672 assert( mem == (Node*)1, "multiple Memories being matched at once?" ); | |
1673 mem = s->_leaf->in(MemNode::Memory); | |
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1674 debug_only(_mem_node = s->_leaf;) |
0 | 1675 } |
1676 if( s->_leaf->in(0) && s->_leaf->req() > 1) { | |
1677 if( !mach->in(0) ) | |
1678 mach->set_req(0,s->_leaf->in(0)); | |
1679 else { | |
1680 assert( s->_leaf->in(0) == mach->in(0), "same instruction, differing controls?" ); | |
1681 } | |
1682 } | |
1683 | |
1684 for( uint i=0; kid != NULL && i<2; kid = s->_kids[1], i++ ) { // binary tree | |
1685 int newrule; | |
1686 if( i == 0 ) | |
1687 newrule = kid->_rule[_leftOp[rule]]; | |
1688 else | |
1689 newrule = kid->_rule[_rightOp[rule]]; | |
1690 | |
1691 if( newrule < _LAST_MACH_OPER ) { // Operand or instruction? | |
1692 // Internal operand; recurse but do nothing else | |
1693 ReduceOper( kid, newrule, mem, mach ); | |
1694 | |
1695 } else { // Child is a new instruction | |
1696 // Reduce the instruction, and add a direct pointer from this | |
1697 // machine instruction to the newly reduced one. | |
1698 Node *mem1 = (Node*)1; | |
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1699 debug_only(Node *save_mem_node = _mem_node;) |
0 | 1700 mach->add_req( ReduceInst( kid, newrule, mem1 ) ); |
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1701 debug_only(_mem_node = save_mem_node;) |
0 | 1702 } |
1703 } | |
1704 } | |
1705 | |
1706 | |
1707 // ------------------------------------------------------------------------- | |
1708 // Java-Java calling convention | |
1709 // (what you use when Java calls Java) | |
1710 | |
1711 //------------------------------find_receiver---------------------------------- | |
1712 // For a given signature, return the OptoReg for parameter 0. | |
1713 OptoReg::Name Matcher::find_receiver( bool is_outgoing ) { | |
1714 VMRegPair regs; | |
1715 BasicType sig_bt = T_OBJECT; | |
1716 calling_convention(&sig_bt, ®s, 1, is_outgoing); | |
1717 // Return argument 0 register. In the LP64 build pointers | |
1718 // take 2 registers, but the VM wants only the 'main' name. | |
1719 return OptoReg::as_OptoReg(regs.first()); | |
1720 } | |
1721 | |
1722 // A method-klass-holder may be passed in the inline_cache_reg | |
1723 // and then expanded into the inline_cache_reg and a method_oop register | |
1724 // defined in ad_<arch>.cpp | |
1725 | |
1726 | |
1727 //------------------------------find_shared------------------------------------ | |
1728 // Set bits if Node is shared or otherwise a root | |
1729 void Matcher::find_shared( Node *n ) { | |
1730 // Allocate stack of size C->unique() * 2 to avoid frequent realloc | |
1731 MStack mstack(C->unique() * 2); | |
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1732 // Mark nodes as address_visited if they are inputs to an address expression |
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1733 VectorSet address_visited(Thread::current()->resource_area()); |
0 | 1734 mstack.push(n, Visit); // Don't need to pre-visit root node |
1735 while (mstack.is_nonempty()) { | |
1736 n = mstack.node(); // Leave node on stack | |
1737 Node_State nstate = mstack.state(); | |
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1738 uint nop = n->Opcode(); |
0 | 1739 if (nstate == Pre_Visit) { |
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1740 if (address_visited.test(n->_idx)) { // Visited in address already? |
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1741 // Flag as visited and shared now. |
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1742 set_visited(n); |
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1743 } |
0 | 1744 if (is_visited(n)) { // Visited already? |
1745 // Node is shared and has no reason to clone. Flag it as shared. | |
1746 // This causes it to match into a register for the sharing. | |
1747 set_shared(n); // Flag as shared and | |
1748 mstack.pop(); // remove node from stack | |
1749 continue; | |
1750 } | |
1751 nstate = Visit; // Not already visited; so visit now | |
1752 } | |
1753 if (nstate == Visit) { | |
1754 mstack.set_state(Post_Visit); | |
1755 set_visited(n); // Flag as visited now | |
1756 bool mem_op = false; | |
1757 | |
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1758 switch( nop ) { // Handle some opcodes special |
0 | 1759 case Op_Phi: // Treat Phis as shared roots |
1760 case Op_Parm: | |
1761 case Op_Proj: // All handled specially during matching | |
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1762 case Op_SafePointScalarObject: |
0 | 1763 set_shared(n); |
1764 set_dontcare(n); | |
1765 break; | |
1766 case Op_If: | |
1767 case Op_CountedLoopEnd: | |
1768 mstack.set_state(Alt_Post_Visit); // Alternative way | |
1769 // Convert (If (Bool (CmpX A B))) into (If (Bool) (CmpX A B)). Helps | |
1770 // with matching cmp/branch in 1 instruction. The Matcher needs the | |
1771 // Bool and CmpX side-by-side, because it can only get at constants | |
1772 // that are at the leaves of Match trees, and the Bool's condition acts | |
1773 // as a constant here. | |
1774 mstack.push(n->in(1), Visit); // Clone the Bool | |
1775 mstack.push(n->in(0), Pre_Visit); // Visit control input | |
1776 continue; // while (mstack.is_nonempty()) | |
1777 case Op_ConvI2D: // These forms efficiently match with a prior | |
1778 case Op_ConvI2F: // Load but not a following Store | |
1779 if( n->in(1)->is_Load() && // Prior load | |
1780 n->outcnt() == 1 && // Not already shared | |
1781 n->unique_out()->is_Store() ) // Following store | |
1782 set_shared(n); // Force it to be a root | |
1783 break; | |
1784 case Op_ReverseBytesI: | |
1785 case Op_ReverseBytesL: | |
1786 if( n->in(1)->is_Load() && // Prior load | |
1787 n->outcnt() == 1 ) // Not already shared | |
1788 set_shared(n); // Force it to be a root | |
1789 break; | |
1790 case Op_BoxLock: // Cant match until we get stack-regs in ADLC | |
1791 case Op_IfFalse: | |
1792 case Op_IfTrue: | |
1793 case Op_MachProj: | |
1794 case Op_MergeMem: | |
1795 case Op_Catch: | |
1796 case Op_CatchProj: | |
1797 case Op_CProj: | |
1798 case Op_JumpProj: | |
1799 case Op_JProj: | |
1800 case Op_NeverBranch: | |
1801 set_dontcare(n); | |
1802 break; | |
1803 case Op_Jump: | |
1804 mstack.push(n->in(1), Visit); // Switch Value | |
1805 mstack.push(n->in(0), Pre_Visit); // Visit Control input | |
1806 continue; // while (mstack.is_nonempty()) | |
1807 case Op_StrComp: | |
681 | 1808 case Op_StrEquals: |
1809 case Op_StrIndexOf: | |
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1810 case Op_AryEq: |
0 | 1811 set_shared(n); // Force result into register (it will be anyways) |
1812 break; | |
1813 case Op_ConP: { // Convert pointers above the centerline to NUL | |
1814 TypeNode *tn = n->as_Type(); // Constants derive from type nodes | |
1815 const TypePtr* tp = tn->type()->is_ptr(); | |
1816 if (tp->_ptr == TypePtr::AnyNull) { | |
1817 tn->set_type(TypePtr::NULL_PTR); | |
1818 } | |
1819 break; | |
1820 } | |
163 | 1821 case Op_ConN: { // Convert narrow pointers above the centerline to NUL |
1822 TypeNode *tn = n->as_Type(); // Constants derive from type nodes | |
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1823 const TypePtr* tp = tn->type()->make_ptr(); |
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1824 if (tp && tp->_ptr == TypePtr::AnyNull) { |
163 | 1825 tn->set_type(TypeNarrowOop::NULL_PTR); |
1826 } | |
1827 break; | |
1828 } | |
0 | 1829 case Op_Binary: // These are introduced in the Post_Visit state. |
1830 ShouldNotReachHere(); | |
1831 break; | |
1832 case Op_StoreB: // Do match these, despite no ideal reg | |
1833 case Op_StoreC: | |
1834 case Op_StoreCM: | |
1835 case Op_StoreD: | |
1836 case Op_StoreF: | |
1837 case Op_StoreI: | |
1838 case Op_StoreL: | |
1839 case Op_StoreP: | |
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1840 case Op_StoreN: |
0 | 1841 case Op_Store16B: |
1842 case Op_Store8B: | |
1843 case Op_Store4B: | |
1844 case Op_Store8C: | |
1845 case Op_Store4C: | |
1846 case Op_Store2C: | |
1847 case Op_Store4I: | |
1848 case Op_Store2I: | |
1849 case Op_Store2L: | |
1850 case Op_Store4F: | |
1851 case Op_Store2F: | |
1852 case Op_Store2D: | |
1853 case Op_ClearArray: | |
1854 case Op_SafePoint: | |
1855 mem_op = true; | |
1856 break; | |
1857 case Op_LoadB: | |
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1858 case Op_LoadUS: |
0 | 1859 case Op_LoadD: |
1860 case Op_LoadF: | |
1861 case Op_LoadI: | |
1862 case Op_LoadKlass: | |
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1863 case Op_LoadNKlass: |
0 | 1864 case Op_LoadL: |
1865 case Op_LoadS: | |
1866 case Op_LoadP: | |
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1867 case Op_LoadN: |
0 | 1868 case Op_LoadRange: |
1869 case Op_LoadD_unaligned: | |
1870 case Op_LoadL_unaligned: | |
1871 case Op_Load16B: | |
1872 case Op_Load8B: | |
1873 case Op_Load4B: | |
1874 case Op_Load4C: | |
1875 case Op_Load2C: | |
1876 case Op_Load8C: | |
1877 case Op_Load8S: | |
1878 case Op_Load4S: | |
1879 case Op_Load2S: | |
1880 case Op_Load4I: | |
1881 case Op_Load2I: | |
1882 case Op_Load2L: | |
1883 case Op_Load4F: | |
1884 case Op_Load2F: | |
1885 case Op_Load2D: | |
1886 mem_op = true; | |
1887 // Must be root of match tree due to prior load conflict | |
1888 if( C->subsume_loads() == false ) { | |
1889 set_shared(n); | |
1890 } | |
1891 // Fall into default case | |
1892 default: | |
1893 if( !n->ideal_reg() ) | |
1894 set_dontcare(n); // Unmatchable Nodes | |
1895 } // end_switch | |
1896 | |
1897 for(int i = n->req() - 1; i >= 0; --i) { // For my children | |
1898 Node *m = n->in(i); // Get ith input | |
1899 if (m == NULL) continue; // Ignore NULLs | |
1900 uint mop = m->Opcode(); | |
1901 | |
1902 // Must clone all producers of flags, or we will not match correctly. | |
1903 // Suppose a compare setting int-flags is shared (e.g., a switch-tree) | |
1904 // then it will match into an ideal Op_RegFlags. Alas, the fp-flags | |
1905 // are also there, so we may match a float-branch to int-flags and | |
1906 // expect the allocator to haul the flags from the int-side to the | |
1907 // fp-side. No can do. | |
1908 if( _must_clone[mop] ) { | |
1909 mstack.push(m, Visit); | |
1910 continue; // for(int i = ...) | |
1911 } | |
1912 | |
1913 // Clone addressing expressions as they are "free" in most instructions | |
1914 if( mem_op && i == MemNode::Address && mop == Op_AddP ) { | |
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1915 if (m->in(AddPNode::Base)->Opcode() == Op_DecodeN) { |
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1916 // Bases used in addresses must be shared but since |
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1917 // they are shared through a DecodeN they may appear |
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1918 // to have a single use so force sharing here. |
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1919 set_shared(m->in(AddPNode::Base)->in(1)); |
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1920 } |
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1921 |
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1922 // Some inputs for address expression are not put on stack |
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1923 // to avoid marking them as shared and forcing them into register |
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1924 // if they are used only in address expressions. |
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1925 // But they should be marked as shared if there are other uses |
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1926 // besides address expressions. |
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1927 |
0 | 1928 Node *off = m->in(AddPNode::Offset); |
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1929 if( off->is_Con() && |
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1930 // When there are other uses besides address expressions |
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1931 // put it on stack and mark as shared. |
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1932 !is_visited(m) ) { |
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1933 address_visited.test_set(m->_idx); // Flag as address_visited |
0 | 1934 Node *adr = m->in(AddPNode::Address); |
1935 | |
1936 // Intel, ARM and friends can handle 2 adds in addressing mode | |
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1937 if( clone_shift_expressions && adr->is_AddP() && |
0 | 1938 // AtomicAdd is not an addressing expression. |
1939 // Cheap to find it by looking for screwy base. | |
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1940 !adr->in(AddPNode::Base)->is_top() && |
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1941 // Are there other uses besides address expressions? |
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1942 !is_visited(adr) ) { |
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1943 address_visited.set(adr->_idx); // Flag as address_visited |
0 | 1944 Node *shift = adr->in(AddPNode::Offset); |
1945 // Check for shift by small constant as well | |
1946 if( shift->Opcode() == Op_LShiftX && shift->in(2)->is_Con() && | |
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1947 shift->in(2)->get_int() <= 3 && |
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1948 // Are there other uses besides address expressions? |
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1949 !is_visited(shift) ) { |
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1950 address_visited.set(shift->_idx); // Flag as address_visited |
0 | 1951 mstack.push(shift->in(2), Visit); |
586
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1952 Node *conv = shift->in(1); |
0 | 1953 #ifdef _LP64 |
1954 // Allow Matcher to match the rule which bypass | |
1955 // ConvI2L operation for an array index on LP64 | |
1956 // if the index value is positive. | |
586
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1957 if( conv->Opcode() == Op_ConvI2L && |
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1958 conv->as_Type()->type()->is_long()->_lo >= 0 && |
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1959 // Are there other uses besides address expressions? |
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1960 !is_visited(conv) ) { |
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1961 address_visited.set(conv->_idx); // Flag as address_visited |
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1962 mstack.push(conv->in(1), Pre_Visit); |
0 | 1963 } else |
1964 #endif | |
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1965 mstack.push(conv, Pre_Visit); |
0 | 1966 } else { |
1967 mstack.push(shift, Pre_Visit); | |
1968 } | |
1969 mstack.push(adr->in(AddPNode::Address), Pre_Visit); | |
1970 mstack.push(adr->in(AddPNode::Base), Pre_Visit); | |
1971 } else { // Sparc, Alpha, PPC and friends | |
1972 mstack.push(adr, Pre_Visit); | |
1973 } | |
1974 | |
1975 // Clone X+offset as it also folds into most addressing expressions | |
1976 mstack.push(off, Visit); | |
1977 mstack.push(m->in(AddPNode::Base), Pre_Visit); | |
1978 continue; // for(int i = ...) | |
1979 } // if( off->is_Con() ) | |
1980 } // if( mem_op && | |
1981 mstack.push(m, Pre_Visit); | |
1982 } // for(int i = ...) | |
1983 } | |
1984 else if (nstate == Alt_Post_Visit) { | |
1985 mstack.pop(); // Remove node from stack | |
1986 // We cannot remove the Cmp input from the Bool here, as the Bool may be | |
1987 // shared and all users of the Bool need to move the Cmp in parallel. | |
1988 // This leaves both the Bool and the If pointing at the Cmp. To | |
1989 // prevent the Matcher from trying to Match the Cmp along both paths | |
1990 // BoolNode::match_edge always returns a zero. | |
1991 | |
1992 // We reorder the Op_If in a pre-order manner, so we can visit without | |
605 | 1993 // accidentally sharing the Cmp (the Bool and the If make 2 users). |
0 | 1994 n->add_req( n->in(1)->in(1) ); // Add the Cmp next to the Bool |
1995 } | |
1996 else if (nstate == Post_Visit) { | |
1997 mstack.pop(); // Remove node from stack | |
1998 | |
1999 // Now hack a few special opcodes | |
2000 switch( n->Opcode() ) { // Handle some opcodes special | |
2001 case Op_StorePConditional: | |
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2002 case Op_StoreIConditional: |
0 | 2003 case Op_StoreLConditional: |
2004 case Op_CompareAndSwapI: | |
2005 case Op_CompareAndSwapL: | |
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2006 case Op_CompareAndSwapP: |
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2007 case Op_CompareAndSwapN: { // Convert trinary to binary-tree |
0 | 2008 Node *newval = n->in(MemNode::ValueIn ); |
2009 Node *oldval = n->in(LoadStoreNode::ExpectedIn); | |
2010 Node *pair = new (C, 3) BinaryNode( oldval, newval ); | |
2011 n->set_req(MemNode::ValueIn,pair); | |
2012 n->del_req(LoadStoreNode::ExpectedIn); | |
2013 break; | |
2014 } | |
2015 case Op_CMoveD: // Convert trinary to binary-tree | |
2016 case Op_CMoveF: | |
2017 case Op_CMoveI: | |
2018 case Op_CMoveL: | |
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2019 case Op_CMoveN: |
0 | 2020 case Op_CMoveP: { |
2021 // Restructure into a binary tree for Matching. It's possible that | |
2022 // we could move this code up next to the graph reshaping for IfNodes | |
2023 // or vice-versa, but I do not want to debug this for Ladybird. | |
2024 // 10/2/2000 CNC. | |
2025 Node *pair1 = new (C, 3) BinaryNode(n->in(1),n->in(1)->in(1)); | |
2026 n->set_req(1,pair1); | |
2027 Node *pair2 = new (C, 3) BinaryNode(n->in(2),n->in(3)); | |
2028 n->set_req(2,pair2); | |
2029 n->del_req(3); | |
2030 break; | |
2031 } | |
2032 default: | |
2033 break; | |
2034 } | |
2035 } | |
2036 else { | |
2037 ShouldNotReachHere(); | |
2038 } | |
2039 } // end of while (mstack.is_nonempty()) | |
2040 } | |
2041 | |
2042 #ifdef ASSERT | |
2043 // machine-independent root to machine-dependent root | |
2044 void Matcher::dump_old2new_map() { | |
2045 _old2new_map.dump(); | |
2046 } | |
2047 #endif | |
2048 | |
2049 //---------------------------collect_null_checks------------------------------- | |
2050 // Find null checks in the ideal graph; write a machine-specific node for | |
2051 // it. Used by later implicit-null-check handling. Actually collects | |
2052 // either an IfTrue or IfFalse for the common NOT-null path, AND the ideal | |
2053 // value being tested. | |
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2054 void Matcher::collect_null_checks( Node *proj, Node *orig_proj ) { |
0 | 2055 Node *iff = proj->in(0); |
2056 if( iff->Opcode() == Op_If ) { | |
2057 // During matching If's have Bool & Cmp side-by-side | |
2058 BoolNode *b = iff->in(1)->as_Bool(); | |
2059 Node *cmp = iff->in(2); | |
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2060 int opc = cmp->Opcode(); |
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2061 if (opc != Op_CmpP && opc != Op_CmpN) return; |
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2062 |
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2063 const Type* ct = cmp->in(2)->bottom_type(); |
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2064 if (ct == TypePtr::NULL_PTR || |
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2065 (opc == Op_CmpN && ct == TypeNarrowOop::NULL_PTR)) { |
0 | 2066 |
368
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2067 bool push_it = false; |
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2068 if( proj->Opcode() == Op_IfTrue ) { |
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2069 extern int all_null_checks_found; |
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2070 all_null_checks_found++; |
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2071 if( b->_test._test == BoolTest::ne ) { |
368
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2072 push_it = true; |
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2073 } |
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2074 } else { |
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2075 assert( proj->Opcode() == Op_IfFalse, "" ); |
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2076 if( b->_test._test == BoolTest::eq ) { |
368
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2077 push_it = true; |
0 | 2078 } |
2079 } | |
368
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2080 if( push_it ) { |
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2081 _null_check_tests.push(proj); |
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2082 Node* val = cmp->in(1); |
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2083 #ifdef _LP64 |
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2084 if (UseCompressedOops && !Matcher::clone_shift_expressions && |
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2085 val->bottom_type()->isa_narrowoop()) { |
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2086 // |
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2087 // Look for DecodeN node which should be pinned to orig_proj. |
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2088 // On platforms (Sparc) which can not handle 2 adds |
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2089 // in addressing mode we have to keep a DecodeN node and |
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2090 // use it to do implicit NULL check in address. |
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2091 // |
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2092 // DecodeN node was pinned to non-null path (orig_proj) during |
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2093 // CastPP transformation in final_graph_reshaping_impl(). |
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2094 // |
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2095 uint cnt = orig_proj->outcnt(); |
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2096 for (uint i = 0; i < orig_proj->outcnt(); i++) { |
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2097 Node* d = orig_proj->raw_out(i); |
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2098 if (d->is_DecodeN() && d->in(1) == val) { |
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2099 val = d; |
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2100 val->set_req(0, NULL); // Unpin now. |
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2101 break; |
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2102 } |
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2103 } |
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2104 } |
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2105 #endif |
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2106 _null_check_tests.push(val); |
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2107 } |
0 | 2108 } |
2109 } | |
2110 } | |
2111 | |
2112 //---------------------------validate_null_checks------------------------------ | |
2113 // Its possible that the value being NULL checked is not the root of a match | |
2114 // tree. If so, I cannot use the value in an implicit null check. | |
2115 void Matcher::validate_null_checks( ) { | |
2116 uint cnt = _null_check_tests.size(); | |
2117 for( uint i=0; i < cnt; i+=2 ) { | |
2118 Node *test = _null_check_tests[i]; | |
2119 Node *val = _null_check_tests[i+1]; | |
2120 if (has_new_node(val)) { | |
2121 // Is a match-tree root, so replace with the matched value | |
2122 _null_check_tests.map(i+1, new_node(val)); | |
2123 } else { | |
2124 // Yank from candidate list | |
2125 _null_check_tests.map(i+1,_null_check_tests[--cnt]); | |
2126 _null_check_tests.map(i,_null_check_tests[--cnt]); | |
2127 _null_check_tests.pop(); | |
2128 _null_check_tests.pop(); | |
2129 i-=2; | |
2130 } | |
2131 } | |
2132 } | |
2133 | |
2134 | |
2135 // Used by the DFA in dfa_sparc.cpp. Check for a prior FastLock | |
2136 // acting as an Acquire and thus we don't need an Acquire here. We | |
2137 // retain the Node to act as a compiler ordering barrier. | |
2138 bool Matcher::prior_fast_lock( const Node *acq ) { | |
2139 Node *r = acq->in(0); | |
2140 if( !r->is_Region() || r->req() <= 1 ) return false; | |
2141 Node *proj = r->in(1); | |
2142 if( !proj->is_Proj() ) return false; | |
2143 Node *call = proj->in(0); | |
2144 if( !call->is_Call() || call->as_Call()->entry_point() != OptoRuntime::complete_monitor_locking_Java() ) | |
2145 return false; | |
2146 | |
2147 return true; | |
2148 } | |
2149 | |
2150 // Used by the DFA in dfa_sparc.cpp. Check for a following FastUnLock | |
2151 // acting as a Release and thus we don't need a Release here. We | |
2152 // retain the Node to act as a compiler ordering barrier. | |
2153 bool Matcher::post_fast_unlock( const Node *rel ) { | |
2154 Compile *C = Compile::current(); | |
2155 assert( rel->Opcode() == Op_MemBarRelease, "" ); | |
2156 const MemBarReleaseNode *mem = (const MemBarReleaseNode*)rel; | |
2157 DUIterator_Fast imax, i = mem->fast_outs(imax); | |
2158 Node *ctrl = NULL; | |
2159 while( true ) { | |
2160 ctrl = mem->fast_out(i); // Throw out-of-bounds if proj not found | |
2161 assert( ctrl->is_Proj(), "only projections here" ); | |
2162 ProjNode *proj = (ProjNode*)ctrl; | |
2163 if( proj->_con == TypeFunc::Control && | |
2164 !C->node_arena()->contains(ctrl) ) // Unmatched old-space only | |
2165 break; | |
2166 i++; | |
2167 } | |
2168 Node *iff = NULL; | |
2169 for( DUIterator_Fast jmax, j = ctrl->fast_outs(jmax); j < jmax; j++ ) { | |
2170 Node *x = ctrl->fast_out(j); | |
2171 if( x->is_If() && x->req() > 1 && | |
2172 !C->node_arena()->contains(x) ) { // Unmatched old-space only | |
2173 iff = x; | |
2174 break; | |
2175 } | |
2176 } | |
2177 if( !iff ) return false; | |
2178 Node *bol = iff->in(1); | |
2179 // The iff might be some random subclass of If or bol might be Con-Top | |
2180 if (!bol->is_Bool()) return false; | |
2181 assert( bol->req() > 1, "" ); | |
2182 return (bol->in(1)->Opcode() == Op_FastUnlock); | |
2183 } | |
2184 | |
2185 // Used by the DFA in dfa_xxx.cpp. Check for a following barrier or | |
2186 // atomic instruction acting as a store_load barrier without any | |
2187 // intervening volatile load, and thus we don't need a barrier here. | |
2188 // We retain the Node to act as a compiler ordering barrier. | |
2189 bool Matcher::post_store_load_barrier(const Node *vmb) { | |
2190 Compile *C = Compile::current(); | |
2191 assert( vmb->is_MemBar(), "" ); | |
2192 assert( vmb->Opcode() != Op_MemBarAcquire, "" ); | |
2193 const MemBarNode *mem = (const MemBarNode*)vmb; | |
2194 | |
2195 // Get the Proj node, ctrl, that can be used to iterate forward | |
2196 Node *ctrl = NULL; | |
2197 DUIterator_Fast imax, i = mem->fast_outs(imax); | |
2198 while( true ) { | |
2199 ctrl = mem->fast_out(i); // Throw out-of-bounds if proj not found | |
2200 assert( ctrl->is_Proj(), "only projections here" ); | |
2201 ProjNode *proj = (ProjNode*)ctrl; | |
2202 if( proj->_con == TypeFunc::Control && | |
2203 !C->node_arena()->contains(ctrl) ) // Unmatched old-space only | |
2204 break; | |
2205 i++; | |
2206 } | |
2207 | |
2208 for( DUIterator_Fast jmax, j = ctrl->fast_outs(jmax); j < jmax; j++ ) { | |
2209 Node *x = ctrl->fast_out(j); | |
2210 int xop = x->Opcode(); | |
2211 | |
2212 // We don't need current barrier if we see another or a lock | |
2213 // before seeing volatile load. | |
2214 // | |
2215 // Op_Fastunlock previously appeared in the Op_* list below. | |
2216 // With the advent of 1-0 lock operations we're no longer guaranteed | |
2217 // that a monitor exit operation contains a serializing instruction. | |
2218 | |
2219 if (xop == Op_MemBarVolatile || | |
2220 xop == Op_FastLock || | |
2221 xop == Op_CompareAndSwapL || | |
2222 xop == Op_CompareAndSwapP || | |
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2223 xop == Op_CompareAndSwapN || |
0 | 2224 xop == Op_CompareAndSwapI) |
2225 return true; | |
2226 | |
2227 if (x->is_MemBar()) { | |
2228 // We must retain this membar if there is an upcoming volatile | |
2229 // load, which will be preceded by acquire membar. | |
2230 if (xop == Op_MemBarAcquire) | |
2231 return false; | |
2232 // For other kinds of barriers, check by pretending we | |
2233 // are them, and seeing if we can be removed. | |
2234 else | |
2235 return post_store_load_barrier((const MemBarNode*)x); | |
2236 } | |
2237 | |
2238 // Delicate code to detect case of an upcoming fastlock block | |
2239 if( x->is_If() && x->req() > 1 && | |
2240 !C->node_arena()->contains(x) ) { // Unmatched old-space only | |
2241 Node *iff = x; | |
2242 Node *bol = iff->in(1); | |
2243 // The iff might be some random subclass of If or bol might be Con-Top | |
2244 if (!bol->is_Bool()) return false; | |
2245 assert( bol->req() > 1, "" ); | |
2246 return (bol->in(1)->Opcode() == Op_FastUnlock); | |
2247 } | |
2248 // probably not necessary to check for these | |
2249 if (x->is_Call() || x->is_SafePoint() || x->is_block_proj()) | |
2250 return false; | |
2251 } | |
2252 return false; | |
2253 } | |
2254 | |
2255 //============================================================================= | |
2256 //---------------------------State--------------------------------------------- | |
2257 State::State(void) { | |
2258 #ifdef ASSERT | |
2259 _id = 0; | |
2260 _kids[0] = _kids[1] = (State*)(intptr_t) CONST64(0xcafebabecafebabe); | |
2261 _leaf = (Node*)(intptr_t) CONST64(0xbaadf00dbaadf00d); | |
2262 //memset(_cost, -1, sizeof(_cost)); | |
2263 //memset(_rule, -1, sizeof(_rule)); | |
2264 #endif | |
2265 memset(_valid, 0, sizeof(_valid)); | |
2266 } | |
2267 | |
2268 #ifdef ASSERT | |
2269 State::~State() { | |
2270 _id = 99; | |
2271 _kids[0] = _kids[1] = (State*)(intptr_t) CONST64(0xcafebabecafebabe); | |
2272 _leaf = (Node*)(intptr_t) CONST64(0xbaadf00dbaadf00d); | |
2273 memset(_cost, -3, sizeof(_cost)); | |
2274 memset(_rule, -3, sizeof(_rule)); | |
2275 } | |
2276 #endif | |
2277 | |
2278 #ifndef PRODUCT | |
2279 //---------------------------dump---------------------------------------------- | |
2280 void State::dump() { | |
2281 tty->print("\n"); | |
2282 dump(0); | |
2283 } | |
2284 | |
2285 void State::dump(int depth) { | |
2286 for( int j = 0; j < depth; j++ ) | |
2287 tty->print(" "); | |
2288 tty->print("--N: "); | |
2289 _leaf->dump(); | |
2290 uint i; | |
2291 for( i = 0; i < _LAST_MACH_OPER; i++ ) | |
2292 // Check for valid entry | |
2293 if( valid(i) ) { | |
2294 for( int j = 0; j < depth; j++ ) | |
2295 tty->print(" "); | |
2296 assert(_cost[i] != max_juint, "cost must be a valid value"); | |
2297 assert(_rule[i] < _last_Mach_Node, "rule[i] must be valid rule"); | |
2298 tty->print_cr("%s %d %s", | |
2299 ruleName[i], _cost[i], ruleName[_rule[i]] ); | |
2300 } | |
2301 tty->print_cr(""); | |
2302 | |
2303 for( i=0; i<2; i++ ) | |
2304 if( _kids[i] ) | |
2305 _kids[i]->dump(depth+1); | |
2306 } | |
2307 #endif |