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annotate src/cpu/x86/vm/globals_x86.hpp @ 20438:166d744df0de

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8055494: Add C2 x86 intrinsic for BigInteger::multiplyToLen() method Summary: Add new C2 intrinsic for BigInteger::multiplyToLen() on x86 in 64-bit VM. Reviewed-by: roland
author kvn
date Tue, 02 Sep 2014 12:48:45 -0700
parents dac61d838654
children 7848fc12602b
Ignore whitespace changes - Everywhere: Within whitespace: At end of lines:
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1 /*
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2 * Copyright (c) 2000, 2013, Oracle and/or its affiliates. All rights reserved.
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3 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
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4 *
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5 * This code is free software; you can redistribute it and/or modify it
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6 * under the terms of the GNU General Public License version 2 only, as
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7 * published by the Free Software Foundation.
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8 *
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9 * This code is distributed in the hope that it will be useful, but WITHOUT
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10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
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12 * version 2 for more details (a copy is included in the LICENSE file that
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13 * accompanied this code).
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14 *
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15 * You should have received a copy of the GNU General Public License version
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16 * 2 along with this work; if not, write to the Free Software Foundation,
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17 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
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18 *
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19 * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
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20 * or visit www.oracle.com if you need additional information or have any
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21 * questions.
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22 *
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23 */
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24
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25 #ifndef CPU_X86_VM_GLOBALS_X86_HPP
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26 #define CPU_X86_VM_GLOBALS_X86_HPP
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27
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28 #include "utilities/globalDefinitions.hpp"
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29 #include "utilities/macros.hpp"
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30
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31 // Sets the default values for platform dependent flags used by the runtime system.
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32 // (see globals.hpp)
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33
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34 define_pd_global(bool, ConvertSleepToYield, true);
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35 define_pd_global(bool, ShareVtableStubs, true);
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36 define_pd_global(bool, CountInterpCalls, true);
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37 define_pd_global(bool, NeedsDeoptSuspend, false); // only register window machines need this
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38
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39 define_pd_global(bool, ImplicitNullChecks, true); // Generate code for implicit null checks
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40 define_pd_global(bool, TrapBasedNullChecks, false); // Not needed on x86.
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41 define_pd_global(bool, UncommonNullCast, true); // Uncommon-trap NULLs passed to check cast
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42
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43 // See 4827828 for this change. There is no globals_core_i486.hpp. I can't
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44 // assign a different value for C2 without touching a number of files. Use
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45 // #ifdef to minimize the change as it's late in Mantis. -- FIXME.
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46 // c1 doesn't have this problem because the fix to 4858033 assures us
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47 // the the vep is aligned at CodeEntryAlignment whereas c2 only aligns
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48 // the uep and the vep doesn't get real alignment but just slops on by
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49 // only assured that the entry instruction meets the 5 byte size requirement.
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50 #ifdef COMPILER2
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51 define_pd_global(intx, CodeEntryAlignment, 32);
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52 #else
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53 define_pd_global(intx, CodeEntryAlignment, 16);
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54 #endif // COMPILER2
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55 define_pd_global(intx, OptoLoopAlignment, 16);
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56 define_pd_global(intx, InlineFrequencyCount, 100);
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57 define_pd_global(intx, InlineSmallCode, 1000);
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58
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59 define_pd_global(intx, StackYellowPages, NOT_WINDOWS(2) WINDOWS_ONLY(3));
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60 define_pd_global(intx, StackRedPages, 1);
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61 #ifdef AMD64
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62 // Very large C++ stack frames using solaris-amd64 optimized builds
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63 // due to lack of optimization caused by C++ compiler bugs
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64 define_pd_global(intx, StackShadowPages, NOT_WIN64(20) WIN64_ONLY(6) DEBUG_ONLY(+2));
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65 #else
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66 define_pd_global(intx, StackShadowPages, 4 DEBUG_ONLY(+5));
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67 #endif // AMD64
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68
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69 define_pd_global(intx, PreInflateSpin, 10);
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71 define_pd_global(bool, RewriteBytecodes, true);
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72 define_pd_global(bool, RewriteFrequentPairs, true);
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73
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74 #ifdef _ALLBSD_SOURCE
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75 define_pd_global(bool, UseMembar, true);
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76 #else
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77 define_pd_global(bool, UseMembar, false);
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78 #endif
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79
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80 // GC Ergo Flags
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81 define_pd_global(uintx, CMSYoungGenPerWorker, 64*M); // default max size of CMS young gen, per GC worker thread
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82
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83 define_pd_global(uintx, TypeProfileLevel, 111);
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84
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85 #define ARCH_FLAGS(develop, product, diagnostic, experimental, notproduct) \
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86 \
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87 develop(bool, IEEEPrecision, true, \
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88 "Enables IEEE precision (for INTEL only)") \
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89 \
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90 product(intx, FenceInstruction, 0, \
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91 "(Unsafe,Unstable) Experimental") \
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92 \
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93 product(intx, ReadPrefetchInstr, 0, \
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94 "Prefetch instruction to prefetch ahead") \
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95 \
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96 product(bool, UseStoreImmI16, true, \
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97 "Use store immediate 16-bits value instruction on x86") \
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98 \
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99 product(intx, UseAVX, 99, \
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100 "Highest supported AVX instructions set on x86/x64") \
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101 \
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102 product(bool, UseCLMUL, false, \
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103 "Control whether CLMUL instructions can be used on x86/x64") \
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104 \
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105 diagnostic(bool, UseIncDec, true, \
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106 "Use INC, DEC instructions on x86") \
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107 \
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108 product(bool, UseNewLongLShift, false, \
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109 "Use optimized bitwise shift left") \
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110 \
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111 product(bool, UseAddressNop, false, \
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112 "Use '0F 1F [addr]' NOP instructions on x86 cpus") \
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113 \
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114 product(bool, UseXmmLoadAndClearUpper, true, \
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115 "Load low part of XMM register and clear upper part") \
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116 \
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117 product(bool, UseXmmRegToRegMoveAll, false, \
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118 "Copy all XMM register bits when moving value between registers") \
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119 \
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120 product(bool, UseXmmI2D, false, \
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121 "Use SSE2 CVTDQ2PD instruction to convert Integer to Double") \
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122 \
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123 product(bool, UseXmmI2F, false, \
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124 "Use SSE2 CVTDQ2PS instruction to convert Integer to Float") \
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125 \
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126 product(bool, UseUnalignedLoadStores, false, \
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127 "Use SSE2 MOVDQU instruction for Arraycopy") \
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128 \
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129 product(bool, UseFastStosb, false, \
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130 "Use fast-string operation for zeroing: rep stosb") \
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131 \
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132 /* Use Restricted Transactional Memory for lock eliding */ \
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133 product(bool, UseRTMLocking, false, \
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134 "Enable RTM lock eliding for inflated locks in compiled code") \
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135 \
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136 experimental(bool, UseRTMForStackLocks, false, \
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137 "Enable RTM lock eliding for stack locks in compiled code") \
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138 \
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139 product(bool, UseRTMDeopt, false, \
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140 "Perform deopt and recompilation based on RTM abort ratio") \
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141 \
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142 product(uintx, RTMRetryCount, 5, \
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143 "Number of RTM retries on lock abort or busy") \
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144 \
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145 experimental(intx, RTMSpinLoopCount, 100, \
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146 "Spin count for lock to become free before RTM retry") \
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147 \
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148 experimental(intx, RTMAbortThreshold, 1000, \
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149 "Calculate abort ratio after this number of aborts") \
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150 \
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151 experimental(intx, RTMLockingThreshold, 10000, \
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152 "Lock count at which to do RTM lock eliding without " \
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153 "abort ratio calculation") \
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154 \
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155 experimental(intx, RTMAbortRatio, 50, \
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156 "Lock abort ratio at which to stop use RTM lock eliding") \
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157 \
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158 experimental(intx, RTMTotalCountIncrRate, 64, \
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159 "Increment total RTM attempted lock count once every n times") \
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160 \
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161 experimental(intx, RTMLockingCalculationDelay, 0, \
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162 "Number of milliseconds to wait before start calculating aborts " \
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163 "for RTM locking") \
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164 \
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165 experimental(bool, UseRTMXendForLockBusy, true, \
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166 "Use RTM Xend instead of Xabort when lock busy") \
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167 \
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168 /* assembler */ \
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169 product(bool, Use486InstrsOnly, false, \
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170 "Use 80486 Compliant instruction subset") \
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171 \
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172 product(bool, UseCountLeadingZerosInstruction, false, \
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173 "Use count leading zeros instruction") \
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174 \
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175 product(bool, UseCountTrailingZerosInstruction, false, \
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176 "Use count trailing zeros instruction") \
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177 \
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178 product(bool, UseBMI1Instructions, false, \
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179 "Use BMI1 instructions") \
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180 \
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181 product(bool, UseBMI2Instructions, false, \
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182 "Use BMI2 instructions")
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183 #endif // CPU_X86_VM_GLOBALS_X86_HPP