Mercurial > hg > truffle
annotate graal/com.oracle.jvmci.asm.amd64/src/com/oracle/jvmci/asm/amd64/AMD64MacroAssembler.java @ 21710:26774dc3a5e7
removed ExcludeFromIdentityComparisonVerification and replaced it with a white list in CheckGraalInvariants
author | Doug Simon <doug.simon@oracle.com> |
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date | Wed, 03 Jun 2015 21:34:21 +0200 |
parents | 6df25b1418be |
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rev | line source |
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1 /* |
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2 * Copyright (c) 2009, 2015, Oracle and/or its affiliates. All rights reserved. |
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3 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. |
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4 * |
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5 * This code is free software; you can redistribute it and/or modify it |
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6 * under the terms of the GNU General Public License version 2 only, as |
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7 * published by the Free Software Foundation. |
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8 * |
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9 * This code is distributed in the hope that it will be useful, but WITHOUT |
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10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or |
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11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License |
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12 * version 2 for more details (a copy is included in the LICENSE file that |
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13 * accompanied this code). |
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14 * |
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15 * You should have received a copy of the GNU General Public License version |
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16 * 2 along with this work; if not, write to the Free Software Foundation, |
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17 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA. |
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18 * |
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19 * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA |
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20 * or visit www.oracle.com if you need additional information or have any |
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21 * questions. |
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22 */ |
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23 package com.oracle.jvmci.asm.amd64; |
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24 |
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25 import com.oracle.jvmci.amd64.*; |
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26 import com.oracle.jvmci.asm.*; |
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27 import com.oracle.jvmci.code.Register; |
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28 import com.oracle.jvmci.code.CalleeSaveLayout; |
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29 import com.oracle.jvmci.code.TargetDescription; |
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30 import com.oracle.jvmci.code.RegisterConfig; |
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31 import com.oracle.jvmci.meta.Kind; |
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32 |
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33 import static com.oracle.jvmci.asm.amd64.AMD64AsmOptions.*; |
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34 |
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35 /** |
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36 * This class implements commonly used X86 code patterns. |
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37 */ |
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38 public class AMD64MacroAssembler extends AMD64Assembler { |
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39 |
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40 public AMD64MacroAssembler(TargetDescription target, RegisterConfig registerConfig) { |
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41 super(target, registerConfig); |
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42 } |
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43 |
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44 public final void decrementq(Register reg, int value) { |
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45 if (value == Integer.MIN_VALUE) { |
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46 subq(reg, value); |
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47 return; |
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48 } |
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49 if (value < 0) { |
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50 incrementq(reg, -value); |
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51 return; |
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52 } |
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53 if (value == 0) { |
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54 return; |
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55 } |
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56 if (value == 1 && UseIncDec) { |
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57 decq(reg); |
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58 } else { |
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59 subq(reg, value); |
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60 } |
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61 } |
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62 |
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63 public final void decrementq(AMD64Address dst, int value) { |
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64 if (value == Integer.MIN_VALUE) { |
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65 subq(dst, value); |
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66 return; |
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67 } |
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68 if (value < 0) { |
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69 incrementq(dst, -value); |
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70 return; |
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71 } |
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72 if (value == 0) { |
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73 return; |
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74 } |
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75 if (value == 1 && UseIncDec) { |
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76 decq(dst); |
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77 } else { |
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78 subq(dst, value); |
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79 } |
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80 } |
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81 |
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82 public void incrementq(Register reg, int value) { |
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83 if (value == Integer.MIN_VALUE) { |
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84 addq(reg, value); |
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85 return; |
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86 } |
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87 if (value < 0) { |
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88 decrementq(reg, -value); |
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89 return; |
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90 } |
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91 if (value == 0) { |
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92 return; |
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93 } |
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94 if (value == 1 && UseIncDec) { |
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95 incq(reg); |
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96 } else { |
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97 addq(reg, value); |
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98 } |
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99 } |
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100 |
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101 public final void incrementq(AMD64Address dst, int value) { |
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102 if (value == Integer.MIN_VALUE) { |
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103 addq(dst, value); |
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104 return; |
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105 } |
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106 if (value < 0) { |
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107 decrementq(dst, -value); |
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108 return; |
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109 } |
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110 if (value == 0) { |
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AMD64Assembler: introduce DEC and incrementq/decrementq macros for AMD64Addresses.
Josef Eisl <josef.eisl@jku.at>
parents:
19867
diff
changeset
|
111 return; |
5a42f9b582c6
AMD64Assembler: introduce DEC and incrementq/decrementq macros for AMD64Addresses.
Josef Eisl <josef.eisl@jku.at>
parents:
19867
diff
changeset
|
112 } |
5a42f9b582c6
AMD64Assembler: introduce DEC and incrementq/decrementq macros for AMD64Addresses.
Josef Eisl <josef.eisl@jku.at>
parents:
19867
diff
changeset
|
113 if (value == 1 && UseIncDec) { |
5a42f9b582c6
AMD64Assembler: introduce DEC and incrementq/decrementq macros for AMD64Addresses.
Josef Eisl <josef.eisl@jku.at>
parents:
19867
diff
changeset
|
114 incq(dst); |
5a42f9b582c6
AMD64Assembler: introduce DEC and incrementq/decrementq macros for AMD64Addresses.
Josef Eisl <josef.eisl@jku.at>
parents:
19867
diff
changeset
|
115 } else { |
5a42f9b582c6
AMD64Assembler: introduce DEC and incrementq/decrementq macros for AMD64Addresses.
Josef Eisl <josef.eisl@jku.at>
parents:
19867
diff
changeset
|
116 addq(dst, value); |
5a42f9b582c6
AMD64Assembler: introduce DEC and incrementq/decrementq macros for AMD64Addresses.
Josef Eisl <josef.eisl@jku.at>
parents:
19867
diff
changeset
|
117 } |
5a42f9b582c6
AMD64Assembler: introduce DEC and incrementq/decrementq macros for AMD64Addresses.
Josef Eisl <josef.eisl@jku.at>
parents:
19867
diff
changeset
|
118 } |
5a42f9b582c6
AMD64Assembler: introduce DEC and incrementq/decrementq macros for AMD64Addresses.
Josef Eisl <josef.eisl@jku.at>
parents:
19867
diff
changeset
|
119 |
15456
bb97b75d1d65
AMD64: implemented DeoptimizationStub.deoptimizationHandler
twisti
parents:
14559
diff
changeset
|
120 public final void movptr(Register dst, AMD64Address src) { |
bb97b75d1d65
AMD64: implemented DeoptimizationStub.deoptimizationHandler
twisti
parents:
14559
diff
changeset
|
121 movq(dst, src); |
bb97b75d1d65
AMD64: implemented DeoptimizationStub.deoptimizationHandler
twisti
parents:
14559
diff
changeset
|
122 } |
bb97b75d1d65
AMD64: implemented DeoptimizationStub.deoptimizationHandler
twisti
parents:
14559
diff
changeset
|
123 |
bb97b75d1d65
AMD64: implemented DeoptimizationStub.deoptimizationHandler
twisti
parents:
14559
diff
changeset
|
124 public final void movptr(AMD64Address dst, Register src) { |
bb97b75d1d65
AMD64: implemented DeoptimizationStub.deoptimizationHandler
twisti
parents:
14559
diff
changeset
|
125 movq(dst, src); |
bb97b75d1d65
AMD64: implemented DeoptimizationStub.deoptimizationHandler
twisti
parents:
14559
diff
changeset
|
126 } |
bb97b75d1d65
AMD64: implemented DeoptimizationStub.deoptimizationHandler
twisti
parents:
14559
diff
changeset
|
127 |
7839
838293a77af7
Make Address class platform specific.
Roland Schatz <roland.schatz@oracle.com>
parents:
7822
diff
changeset
|
128 public final void movptr(AMD64Address dst, int src) { |
3733
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Added Java files from Maxine project.
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parents:
diff
changeset
|
129 movslq(dst, src); |
e233f5660da4
Added Java files from Maxine project.
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parents:
diff
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|
130 } |
e233f5660da4
Added Java files from Maxine project.
Thomas Wuerthinger <thomas.wuerthinger@oracle.com>
parents:
diff
changeset
|
131 |
7822
03eec5b7a546
Clean up of AMD64MacroAssembler.
Thomas Wuerthinger <thomas.wuerthinger@oracle.com>
parents:
7791
diff
changeset
|
132 public final void cmpptr(Register src1, Register src2) { |
3733
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Added Java files from Maxine project.
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parents:
diff
changeset
|
133 cmpq(src1, src2); |
e233f5660da4
Added Java files from Maxine project.
Thomas Wuerthinger <thomas.wuerthinger@oracle.com>
parents:
diff
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|
134 } |
e233f5660da4
Added Java files from Maxine project.
Thomas Wuerthinger <thomas.wuerthinger@oracle.com>
parents:
diff
changeset
|
135 |
7839
838293a77af7
Make Address class platform specific.
Roland Schatz <roland.schatz@oracle.com>
parents:
7822
diff
changeset
|
136 public final void cmpptr(Register src1, AMD64Address src2) { |
3733
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Added Java files from Maxine project.
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parents:
diff
changeset
|
137 cmpq(src1, src2); |
e233f5660da4
Added Java files from Maxine project.
Thomas Wuerthinger <thomas.wuerthinger@oracle.com>
parents:
diff
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|
138 } |
e233f5660da4
Added Java files from Maxine project.
Thomas Wuerthinger <thomas.wuerthinger@oracle.com>
parents:
diff
changeset
|
139 |
7822
03eec5b7a546
Clean up of AMD64MacroAssembler.
Thomas Wuerthinger <thomas.wuerthinger@oracle.com>
parents:
7791
diff
changeset
|
140 public final void decrementl(Register reg, int value) { |
3733
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parents:
diff
changeset
|
141 if (value == Integer.MIN_VALUE) { |
e233f5660da4
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parents:
diff
changeset
|
142 subl(reg, value); |
e233f5660da4
Added Java files from Maxine project.
Thomas Wuerthinger <thomas.wuerthinger@oracle.com>
parents:
diff
changeset
|
143 return; |
e233f5660da4
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Thomas Wuerthinger <thomas.wuerthinger@oracle.com>
parents:
diff
changeset
|
144 } |
e233f5660da4
Added Java files from Maxine project.
Thomas Wuerthinger <thomas.wuerthinger@oracle.com>
parents:
diff
changeset
|
145 if (value < 0) { |
e233f5660da4
Added Java files from Maxine project.
Thomas Wuerthinger <thomas.wuerthinger@oracle.com>
parents:
diff
changeset
|
146 incrementl(reg, -value); |
e233f5660da4
Added Java files from Maxine project.
Thomas Wuerthinger <thomas.wuerthinger@oracle.com>
parents:
diff
changeset
|
147 return; |
e233f5660da4
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Thomas Wuerthinger <thomas.wuerthinger@oracle.com>
parents:
diff
changeset
|
148 } |
e233f5660da4
Added Java files from Maxine project.
Thomas Wuerthinger <thomas.wuerthinger@oracle.com>
parents:
diff
changeset
|
149 if (value == 0) { |
e233f5660da4
Added Java files from Maxine project.
Thomas Wuerthinger <thomas.wuerthinger@oracle.com>
parents:
diff
changeset
|
150 return; |
e233f5660da4
Added Java files from Maxine project.
Thomas Wuerthinger <thomas.wuerthinger@oracle.com>
parents:
diff
changeset
|
151 } |
6493
85c1b84f8fd9
moved ADM64-specific assembler code into separate project
Doug Simon <doug.simon@oracle.com>
parents:
6329
diff
changeset
|
152 if (value == 1 && UseIncDec) { |
3733
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Thomas Wuerthinger <thomas.wuerthinger@oracle.com>
parents:
diff
changeset
|
153 decl(reg); |
e233f5660da4
Added Java files from Maxine project.
Thomas Wuerthinger <thomas.wuerthinger@oracle.com>
parents:
diff
changeset
|
154 } else { |
e233f5660da4
Added Java files from Maxine project.
Thomas Wuerthinger <thomas.wuerthinger@oracle.com>
parents:
diff
changeset
|
155 subl(reg, value); |
e233f5660da4
Added Java files from Maxine project.
Thomas Wuerthinger <thomas.wuerthinger@oracle.com>
parents:
diff
changeset
|
156 } |
e233f5660da4
Added Java files from Maxine project.
Thomas Wuerthinger <thomas.wuerthinger@oracle.com>
parents:
diff
changeset
|
157 } |
e233f5660da4
Added Java files from Maxine project.
Thomas Wuerthinger <thomas.wuerthinger@oracle.com>
parents:
diff
changeset
|
158 |
7839
838293a77af7
Make Address class platform specific.
Roland Schatz <roland.schatz@oracle.com>
parents:
7822
diff
changeset
|
159 public final void decrementl(AMD64Address dst, int value) { |
3733
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Added Java files from Maxine project.
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parents:
diff
changeset
|
160 if (value == Integer.MIN_VALUE) { |
e233f5660da4
Added Java files from Maxine project.
Thomas Wuerthinger <thomas.wuerthinger@oracle.com>
parents:
diff
changeset
|
161 subl(dst, value); |
e233f5660da4
Added Java files from Maxine project.
Thomas Wuerthinger <thomas.wuerthinger@oracle.com>
parents:
diff
changeset
|
162 return; |
e233f5660da4
Added Java files from Maxine project.
Thomas Wuerthinger <thomas.wuerthinger@oracle.com>
parents:
diff
changeset
|
163 } |
e233f5660da4
Added Java files from Maxine project.
Thomas Wuerthinger <thomas.wuerthinger@oracle.com>
parents:
diff
changeset
|
164 if (value < 0) { |
e233f5660da4
Added Java files from Maxine project.
Thomas Wuerthinger <thomas.wuerthinger@oracle.com>
parents:
diff
changeset
|
165 incrementl(dst, -value); |
e233f5660da4
Added Java files from Maxine project.
Thomas Wuerthinger <thomas.wuerthinger@oracle.com>
parents:
diff
changeset
|
166 return; |
e233f5660da4
Added Java files from Maxine project.
Thomas Wuerthinger <thomas.wuerthinger@oracle.com>
parents:
diff
changeset
|
167 } |
e233f5660da4
Added Java files from Maxine project.
Thomas Wuerthinger <thomas.wuerthinger@oracle.com>
parents:
diff
changeset
|
168 if (value == 0) { |
e233f5660da4
Added Java files from Maxine project.
Thomas Wuerthinger <thomas.wuerthinger@oracle.com>
parents:
diff
changeset
|
169 return; |
e233f5660da4
Added Java files from Maxine project.
Thomas Wuerthinger <thomas.wuerthinger@oracle.com>
parents:
diff
changeset
|
170 } |
6493
85c1b84f8fd9
moved ADM64-specific assembler code into separate project
Doug Simon <doug.simon@oracle.com>
parents:
6329
diff
changeset
|
171 if (value == 1 && UseIncDec) { |
3733
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Added Java files from Maxine project.
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parents:
diff
changeset
|
172 decl(dst); |
e233f5660da4
Added Java files from Maxine project.
Thomas Wuerthinger <thomas.wuerthinger@oracle.com>
parents:
diff
changeset
|
173 } else { |
e233f5660da4
Added Java files from Maxine project.
Thomas Wuerthinger <thomas.wuerthinger@oracle.com>
parents:
diff
changeset
|
174 subl(dst, value); |
e233f5660da4
Added Java files from Maxine project.
Thomas Wuerthinger <thomas.wuerthinger@oracle.com>
parents:
diff
changeset
|
175 } |
e233f5660da4
Added Java files from Maxine project.
Thomas Wuerthinger <thomas.wuerthinger@oracle.com>
parents:
diff
changeset
|
176 } |
e233f5660da4
Added Java files from Maxine project.
Thomas Wuerthinger <thomas.wuerthinger@oracle.com>
parents:
diff
changeset
|
177 |
7822
03eec5b7a546
Clean up of AMD64MacroAssembler.
Thomas Wuerthinger <thomas.wuerthinger@oracle.com>
parents:
7791
diff
changeset
|
178 public final void incrementl(Register reg, int value) { |
3733
e233f5660da4
Added Java files from Maxine project.
Thomas Wuerthinger <thomas.wuerthinger@oracle.com>
parents:
diff
changeset
|
179 if (value == Integer.MIN_VALUE) { |
e233f5660da4
Added Java files from Maxine project.
Thomas Wuerthinger <thomas.wuerthinger@oracle.com>
parents:
diff
changeset
|
180 addl(reg, value); |
e233f5660da4
Added Java files from Maxine project.
Thomas Wuerthinger <thomas.wuerthinger@oracle.com>
parents:
diff
changeset
|
181 return; |
e233f5660da4
Added Java files from Maxine project.
Thomas Wuerthinger <thomas.wuerthinger@oracle.com>
parents:
diff
changeset
|
182 } |
e233f5660da4
Added Java files from Maxine project.
Thomas Wuerthinger <thomas.wuerthinger@oracle.com>
parents:
diff
changeset
|
183 if (value < 0) { |
e233f5660da4
Added Java files from Maxine project.
Thomas Wuerthinger <thomas.wuerthinger@oracle.com>
parents:
diff
changeset
|
184 decrementl(reg, -value); |
e233f5660da4
Added Java files from Maxine project.
Thomas Wuerthinger <thomas.wuerthinger@oracle.com>
parents:
diff
changeset
|
185 return; |
e233f5660da4
Added Java files from Maxine project.
Thomas Wuerthinger <thomas.wuerthinger@oracle.com>
parents:
diff
changeset
|
186 } |
e233f5660da4
Added Java files from Maxine project.
Thomas Wuerthinger <thomas.wuerthinger@oracle.com>
parents:
diff
changeset
|
187 if (value == 0) { |
e233f5660da4
Added Java files from Maxine project.
Thomas Wuerthinger <thomas.wuerthinger@oracle.com>
parents:
diff
changeset
|
188 return; |
e233f5660da4
Added Java files from Maxine project.
Thomas Wuerthinger <thomas.wuerthinger@oracle.com>
parents:
diff
changeset
|
189 } |
6493
85c1b84f8fd9
moved ADM64-specific assembler code into separate project
Doug Simon <doug.simon@oracle.com>
parents:
6329
diff
changeset
|
190 if (value == 1 && UseIncDec) { |
3733
e233f5660da4
Added Java files from Maxine project.
Thomas Wuerthinger <thomas.wuerthinger@oracle.com>
parents:
diff
changeset
|
191 incl(reg); |
e233f5660da4
Added Java files from Maxine project.
Thomas Wuerthinger <thomas.wuerthinger@oracle.com>
parents:
diff
changeset
|
192 } else { |
e233f5660da4
Added Java files from Maxine project.
Thomas Wuerthinger <thomas.wuerthinger@oracle.com>
parents:
diff
changeset
|
193 addl(reg, value); |
e233f5660da4
Added Java files from Maxine project.
Thomas Wuerthinger <thomas.wuerthinger@oracle.com>
parents:
diff
changeset
|
194 } |
e233f5660da4
Added Java files from Maxine project.
Thomas Wuerthinger <thomas.wuerthinger@oracle.com>
parents:
diff
changeset
|
195 } |
e233f5660da4
Added Java files from Maxine project.
Thomas Wuerthinger <thomas.wuerthinger@oracle.com>
parents:
diff
changeset
|
196 |
7839
838293a77af7
Make Address class platform specific.
Roland Schatz <roland.schatz@oracle.com>
parents:
7822
diff
changeset
|
197 public final void incrementl(AMD64Address dst, int value) { |
3733
e233f5660da4
Added Java files from Maxine project.
Thomas Wuerthinger <thomas.wuerthinger@oracle.com>
parents:
diff
changeset
|
198 if (value == Integer.MIN_VALUE) { |
e233f5660da4
Added Java files from Maxine project.
Thomas Wuerthinger <thomas.wuerthinger@oracle.com>
parents:
diff
changeset
|
199 addl(dst, value); |
e233f5660da4
Added Java files from Maxine project.
Thomas Wuerthinger <thomas.wuerthinger@oracle.com>
parents:
diff
changeset
|
200 return; |
e233f5660da4
Added Java files from Maxine project.
Thomas Wuerthinger <thomas.wuerthinger@oracle.com>
parents:
diff
changeset
|
201 } |
e233f5660da4
Added Java files from Maxine project.
Thomas Wuerthinger <thomas.wuerthinger@oracle.com>
parents:
diff
changeset
|
202 if (value < 0) { |
e233f5660da4
Added Java files from Maxine project.
Thomas Wuerthinger <thomas.wuerthinger@oracle.com>
parents:
diff
changeset
|
203 decrementl(dst, -value); |
e233f5660da4
Added Java files from Maxine project.
Thomas Wuerthinger <thomas.wuerthinger@oracle.com>
parents:
diff
changeset
|
204 return; |
e233f5660da4
Added Java files from Maxine project.
Thomas Wuerthinger <thomas.wuerthinger@oracle.com>
parents:
diff
changeset
|
205 } |
e233f5660da4
Added Java files from Maxine project.
Thomas Wuerthinger <thomas.wuerthinger@oracle.com>
parents:
diff
changeset
|
206 if (value == 0) { |
e233f5660da4
Added Java files from Maxine project.
Thomas Wuerthinger <thomas.wuerthinger@oracle.com>
parents:
diff
changeset
|
207 return; |
e233f5660da4
Added Java files from Maxine project.
Thomas Wuerthinger <thomas.wuerthinger@oracle.com>
parents:
diff
changeset
|
208 } |
6493
85c1b84f8fd9
moved ADM64-specific assembler code into separate project
Doug Simon <doug.simon@oracle.com>
parents:
6329
diff
changeset
|
209 if (value == 1 && UseIncDec) { |
3733
e233f5660da4
Added Java files from Maxine project.
Thomas Wuerthinger <thomas.wuerthinger@oracle.com>
parents:
diff
changeset
|
210 incl(dst); |
e233f5660da4
Added Java files from Maxine project.
Thomas Wuerthinger <thomas.wuerthinger@oracle.com>
parents:
diff
changeset
|
211 } else { |
e233f5660da4
Added Java files from Maxine project.
Thomas Wuerthinger <thomas.wuerthinger@oracle.com>
parents:
diff
changeset
|
212 addl(dst, value); |
e233f5660da4
Added Java files from Maxine project.
Thomas Wuerthinger <thomas.wuerthinger@oracle.com>
parents:
diff
changeset
|
213 } |
e233f5660da4
Added Java files from Maxine project.
Thomas Wuerthinger <thomas.wuerthinger@oracle.com>
parents:
diff
changeset
|
214 } |
e233f5660da4
Added Java files from Maxine project.
Thomas Wuerthinger <thomas.wuerthinger@oracle.com>
parents:
diff
changeset
|
215 |
13265
2d76d0c85345
Make selection of x86 floating point move instruction extensible.
Roland Schatz <roland.schatz@oracle.com>
parents:
10513
diff
changeset
|
216 public void movflt(Register dst, Register src) { |
18253
edb88f5425e6
switch to using use .equals() instead of == when comparing RegisterCaterory objects for equality
Doug Simon <doug.simon@oracle.com>
parents:
15456
diff
changeset
|
217 assert dst.getRegisterCategory().equals(AMD64.XMM) && src.getRegisterCategory().equals(AMD64.XMM); |
6493
85c1b84f8fd9
moved ADM64-specific assembler code into separate project
Doug Simon <doug.simon@oracle.com>
parents:
6329
diff
changeset
|
218 if (UseXmmRegToRegMoveAll) { |
3733
e233f5660da4
Added Java files from Maxine project.
Thomas Wuerthinger <thomas.wuerthinger@oracle.com>
parents:
diff
changeset
|
219 movaps(dst, src); |
e233f5660da4
Added Java files from Maxine project.
Thomas Wuerthinger <thomas.wuerthinger@oracle.com>
parents:
diff
changeset
|
220 } else { |
e233f5660da4
Added Java files from Maxine project.
Thomas Wuerthinger <thomas.wuerthinger@oracle.com>
parents:
diff
changeset
|
221 movss(dst, src); |
e233f5660da4
Added Java files from Maxine project.
Thomas Wuerthinger <thomas.wuerthinger@oracle.com>
parents:
diff
changeset
|
222 } |
e233f5660da4
Added Java files from Maxine project.
Thomas Wuerthinger <thomas.wuerthinger@oracle.com>
parents:
diff
changeset
|
223 } |
e233f5660da4
Added Java files from Maxine project.
Thomas Wuerthinger <thomas.wuerthinger@oracle.com>
parents:
diff
changeset
|
224 |
13265
2d76d0c85345
Make selection of x86 floating point move instruction extensible.
Roland Schatz <roland.schatz@oracle.com>
parents:
10513
diff
changeset
|
225 public void movflt(Register dst, AMD64Address src) { |
18253
edb88f5425e6
switch to using use .equals() instead of == when comparing RegisterCaterory objects for equality
Doug Simon <doug.simon@oracle.com>
parents:
15456
diff
changeset
|
226 assert dst.getRegisterCategory().equals(AMD64.XMM); |
3733
e233f5660da4
Added Java files from Maxine project.
Thomas Wuerthinger <thomas.wuerthinger@oracle.com>
parents:
diff
changeset
|
227 movss(dst, src); |
e233f5660da4
Added Java files from Maxine project.
Thomas Wuerthinger <thomas.wuerthinger@oracle.com>
parents:
diff
changeset
|
228 } |
e233f5660da4
Added Java files from Maxine project.
Thomas Wuerthinger <thomas.wuerthinger@oracle.com>
parents:
diff
changeset
|
229 |
13265
2d76d0c85345
Make selection of x86 floating point move instruction extensible.
Roland Schatz <roland.schatz@oracle.com>
parents:
10513
diff
changeset
|
230 public void movflt(AMD64Address dst, Register src) { |
18253
edb88f5425e6
switch to using use .equals() instead of == when comparing RegisterCaterory objects for equality
Doug Simon <doug.simon@oracle.com>
parents:
15456
diff
changeset
|
231 assert src.getRegisterCategory().equals(AMD64.XMM); |
3733
e233f5660da4
Added Java files from Maxine project.
Thomas Wuerthinger <thomas.wuerthinger@oracle.com>
parents:
diff
changeset
|
232 movss(dst, src); |
e233f5660da4
Added Java files from Maxine project.
Thomas Wuerthinger <thomas.wuerthinger@oracle.com>
parents:
diff
changeset
|
233 } |
e233f5660da4
Added Java files from Maxine project.
Thomas Wuerthinger <thomas.wuerthinger@oracle.com>
parents:
diff
changeset
|
234 |
13265
2d76d0c85345
Make selection of x86 floating point move instruction extensible.
Roland Schatz <roland.schatz@oracle.com>
parents:
10513
diff
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|
235 public void movdbl(Register dst, Register src) { |
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236 assert dst.getRegisterCategory().equals(AMD64.XMM) && src.getRegisterCategory().equals(AMD64.XMM); |
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237 if (UseXmmRegToRegMoveAll) { |
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238 movapd(dst, src); |
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239 } else { |
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240 movsd(dst, src); |
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241 } |
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242 } |
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243 |
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244 public void movdbl(Register dst, AMD64Address src) { |
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245 assert dst.getRegisterCategory().equals(AMD64.XMM); |
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246 if (UseXmmLoadAndClearUpper) { |
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247 movsd(dst, src); |
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248 } else { |
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249 movlpd(dst, src); |
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250 } |
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251 } |
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252 |
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253 public void movdbl(AMD64Address dst, Register src) { |
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254 assert src.getRegisterCategory().equals(AMD64.XMM); |
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255 movsd(dst, src); |
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256 } |
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257 |
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258 /** |
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259 * Non-atomic write of a 64-bit constant to memory. Do not use if the address might be a |
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260 * volatile field! |
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261 */ |
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262 public final void movlong(AMD64Address dst, long src) { |
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263 if (NumUtil.isInt(src)) { |
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264 AMD64MIOp.MOV.emit(this, OperandSize.QWORD, dst, (int) src); |
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265 } else { |
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266 AMD64Address high = new AMD64Address(dst.getBase(), dst.getIndex(), dst.getScale(), dst.getDisplacement() + 4); |
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267 movl(dst, (int) (src & 0xFFFFFFFF)); |
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268 movl(high, (int) (src >> 32)); |
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269 } |
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270 |
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271 } |
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272 |
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273 public final void flog(Register dest, Register value, boolean base10) { |
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274 if (base10) { |
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275 fldlg2(); |
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276 } else { |
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277 fldln2(); |
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278 } |
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279 AMD64Address tmp = trigPrologue(value); |
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280 fyl2x(); |
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281 trigEpilogue(dest, tmp); |
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282 } |
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283 |
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284 public final void fsin(Register dest, Register value) { |
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285 AMD64Address tmp = trigPrologue(value); |
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286 fsin(); |
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287 trigEpilogue(dest, tmp); |
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288 } |
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289 |
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290 public final void fcos(Register dest, Register value) { |
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291 AMD64Address tmp = trigPrologue(value); |
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292 fcos(); |
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293 trigEpilogue(dest, tmp); |
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294 } |
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295 |
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296 public final void ftan(Register dest, Register value) { |
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297 AMD64Address tmp = trigPrologue(value); |
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298 fptan(); |
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299 fstp(0); // ftan pushes 1.0 in addition to the actual result, pop |
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300 trigEpilogue(dest, tmp); |
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301 } |
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302 |
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303 public final void fpop() { |
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304 ffree(0); |
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305 fincstp(); |
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306 } |
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307 |
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308 private AMD64Address trigPrologue(Register value) { |
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309 assert value.getRegisterCategory().equals(AMD64.XMM); |
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310 AMD64Address tmp = new AMD64Address(AMD64.rsp); |
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311 subq(AMD64.rsp, target.getSizeInBytes(Kind.Double)); |
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312 movdbl(tmp, value); |
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313 fldd(tmp); |
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314 return tmp; |
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315 } |
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316 |
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317 private void trigEpilogue(Register dest, AMD64Address tmp) { |
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318 assert dest.getRegisterCategory().equals(AMD64.XMM); |
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319 fstpd(tmp); |
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320 movdbl(dest, tmp); |
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321 addq(AMD64.rsp, target.getSizeInBytes(Kind.Double)); |
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322 } |
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323 |
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324 /** |
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325 * Emit code to save a given set of callee save registers in the {@linkplain CalleeSaveLayout |
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326 * CSA} within the frame. |
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327 * |
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328 * @param csl the description of the CSA |
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329 * @param frameToCSA offset from the frame pointer to the CSA |
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330 */ |
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331 public final void save(CalleeSaveLayout csl, int frameToCSA) { |
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332 for (Register r : csl.registers) { |
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333 int offset = csl.offsetOf(r); |
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334 movq(new AMD64Address(frameRegister, frameToCSA + offset), r); |
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335 } |
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336 } |
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337 |
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338 public final void restore(CalleeSaveLayout csl, int frameToCSA) { |
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339 for (Register r : csl.registers) { |
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340 int offset = csl.offsetOf(r); |
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341 movq(r, new AMD64Address(frameRegister, frameToCSA + offset)); |
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342 } |
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343 } |
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344 } |